clk: qcom: gdsc: Add support to enable retention of GSDCR

[linux-2.6-microblaze.git] / drivers / clk / qcom / gdsc.c

diff --git a/drivers/clk/qcom/gdsc.c b/drivers/clk/qcom/gdsc.c
index 7e4273f..bfc4ac0 100644 (file)
--- a/drivers/clk/qcom/gdsc.c
+++ b/drivers/clk/qcom/gdsc.c
@@ -30,6 +30,7 @@
 /* CFG_GDSCR */
 #define GDSC_POWER_UP_COMPLETE         BIT(16)
 #define GDSC_POWER_DOWN_COMPLETE       BIT(15)
+#define GDSC_RETAIN_FF_ENABLE          BIT(11)
 #define CFG_GDSCR_OFFSET               0x4
 
 /* Wait 2^n CXO cycles between all states. Here, n=2 (4 cycles). */
@@ -217,6 +218,14 @@ static inline void gdsc_assert_reset_aon(struct gdsc *sc)
        regmap_update_bits(sc->regmap, sc->clamp_io_ctrl,
                           GMEM_RESET_MASK, 0);
 }
+
+static void gdsc_retain_ff_on(struct gdsc *sc)
+{
+       u32 mask = GDSC_RETAIN_FF_ENABLE;
+
+       regmap_update_bits(sc->regmap, sc->gdscr, mask, mask);
+}
+
 static int gdsc_enable(struct generic_pm_domain *domain)
 {
        struct gdsc *sc = domain_to_gdsc(domain);
@@ -269,6 +278,9 @@ static int gdsc_enable(struct generic_pm_domain *domain)
                udelay(1);
        }
 
+       if (sc->flags & RETAIN_FF_ENABLE)
+               gdsc_retain_ff_on(sc);
+
        return 0;
 }