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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
[linux-2.6-microblaze.git] / drivers / clk / qcom / clk-smd-rpm.c
diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c
index b2c142f..66d7807 100644 (file)
--- a/drivers/clk/qcom/clk-smd-rpm.c
+++ b/drivers/clk/qcom/clk-smd-rpm.c
@@ -913,10 +913,166 @@ static const struct rpm_smd_clk_desc rpm_clk_sdm660 = {
        .num_clks = ARRAY_SIZE(sdm660_clks),
 };
 
+static struct clk_smd_rpm *mdm9607_clks[] = {
+       [RPM_SMD_XO_CLK_SRC]            = &sdm660_bi_tcxo,
+       [RPM_SMD_XO_A_CLK_SRC]          = &sdm660_bi_tcxo_a,
+       [RPM_SMD_PCNOC_CLK]             = &msm8916_pcnoc_clk,
+       [RPM_SMD_PCNOC_A_CLK]           = &msm8916_pcnoc_a_clk,
+       [RPM_SMD_BIMC_CLK]              = &msm8916_bimc_clk,
+       [RPM_SMD_BIMC_A_CLK]            = &msm8916_bimc_a_clk,
+       [RPM_SMD_QPIC_CLK]              = &qcs404_qpic_clk,
+       [RPM_SMD_QPIC_CLK_A]            = &qcs404_qpic_a_clk,
+       [RPM_SMD_QDSS_CLK]              = &msm8916_qdss_clk,
+       [RPM_SMD_QDSS_A_CLK]            = &msm8916_qdss_a_clk,
+       [RPM_SMD_BB_CLK1]               = &msm8916_bb_clk1,
+       [RPM_SMD_BB_CLK1_A]             = &msm8916_bb_clk1_a,
+       [RPM_SMD_BB_CLK1_PIN]           = &msm8916_bb_clk1_pin,
+       [RPM_SMD_BB_CLK1_A_PIN]         = &msm8916_bb_clk1_a_pin,
+};
+
+static const struct rpm_smd_clk_desc rpm_clk_mdm9607 = {
+       .clks = mdm9607_clks,
+       .num_clks = ARRAY_SIZE(mdm9607_clks),
+};
+
+static struct clk_smd_rpm *msm8953_clks[] = {
+       [RPM_SMD_XO_CLK_SRC]            = &sdm660_bi_tcxo,
+       [RPM_SMD_XO_A_CLK_SRC]          = &sdm660_bi_tcxo_a,
+       [RPM_SMD_PCNOC_CLK]             = &msm8916_pcnoc_clk,
+       [RPM_SMD_PCNOC_A_CLK]           = &msm8916_pcnoc_a_clk,
+       [RPM_SMD_SNOC_CLK]              = &msm8916_snoc_clk,
+       [RPM_SMD_SNOC_A_CLK]            = &msm8916_snoc_a_clk,
+       [RPM_SMD_BIMC_CLK]              = &msm8916_bimc_clk,
+       [RPM_SMD_BIMC_A_CLK]            = &msm8916_bimc_a_clk,
+       [RPM_SMD_IPA_CLK]               = &msm8976_ipa_clk,
+       [RPM_SMD_IPA_A_CLK]             = &msm8976_ipa_a_clk,
+       [RPM_SMD_SYSMMNOC_CLK]          = &msm8936_sysmmnoc_clk,
+       [RPM_SMD_SYSMMNOC_A_CLK]        = &msm8936_sysmmnoc_a_clk,
+       [RPM_SMD_QDSS_CLK]              = &msm8916_qdss_clk,
+       [RPM_SMD_QDSS_A_CLK]            = &msm8916_qdss_a_clk,
+       [RPM_SMD_BB_CLK1]               = &msm8916_bb_clk1,
+       [RPM_SMD_BB_CLK1_A]             = &msm8916_bb_clk1_a,
+       [RPM_SMD_BB_CLK2]               = &msm8916_bb_clk2,
+       [RPM_SMD_BB_CLK2_A]             = &msm8916_bb_clk2_a,
+       [RPM_SMD_RF_CLK2]               = &msm8916_rf_clk2,
+       [RPM_SMD_RF_CLK2_A]             = &msm8916_rf_clk2_a,
+       [RPM_SMD_RF_CLK3]               = &msm8992_ln_bb_clk,
+       [RPM_SMD_RF_CLK3_A]             = &msm8992_ln_bb_a_clk,
+       [RPM_SMD_DIV_CLK2]              = &msm8974_div_clk2,
+       [RPM_SMD_DIV_A_CLK2]            = &msm8974_div_a_clk2,
+       [RPM_SMD_BB_CLK1_PIN]           = &msm8916_bb_clk1_pin,
+       [RPM_SMD_BB_CLK1_A_PIN]         = &msm8916_bb_clk1_a_pin,
+       [RPM_SMD_BB_CLK2_PIN]           = &msm8916_bb_clk2_pin,
+       [RPM_SMD_BB_CLK2_A_PIN]         = &msm8916_bb_clk2_a_pin,
+};
+
+static const struct rpm_smd_clk_desc rpm_clk_msm8953 = {
+       .clks = msm8953_clks,
+       .num_clks = ARRAY_SIZE(msm8953_clks),
+};
+
+/* SM6125 */
+DEFINE_CLK_SMD_RPM(sm6125, cnoc_clk, cnoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 1);
+DEFINE_CLK_SMD_RPM(sm6125, snoc_clk, snoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 2);
+DEFINE_CLK_SMD_RPM_BRANCH(sm6125, qdss_clk, qdss_a_clk,
+                                       QCOM_SMD_RPM_MISC_CLK, 1, 19200000);
+DEFINE_CLK_SMD_RPM(sm6125, qup_clk, qup_a_clk, QCOM_SMD_RPM_QUP_CLK, 0);
+DEFINE_CLK_SMD_RPM(sm6125, mmnrt_clk, mmnrt_a_clk, QCOM_SMD_RPM_MMAXI_CLK, 0);
+DEFINE_CLK_SMD_RPM(sm6125, mmrt_clk, mmrt_a_clk, QCOM_SMD_RPM_MMAXI_CLK, 1);
+DEFINE_CLK_SMD_RPM(sm6125, snoc_periph_clk, snoc_periph_a_clk,
+                                               QCOM_SMD_RPM_BUS_CLK, 0);
+DEFINE_CLK_SMD_RPM(sm6125, snoc_lpass_clk, snoc_lpass_a_clk,
+                                               QCOM_SMD_RPM_BUS_CLK, 5);
+
+static struct clk_smd_rpm *sm6125_clks[] = {
+       [RPM_SMD_XO_CLK_SRC] = &sdm660_bi_tcxo,
+       [RPM_SMD_XO_A_CLK_SRC] = &sdm660_bi_tcxo_a,
+       [RPM_SMD_SNOC_CLK] = &sm6125_snoc_clk,
+       [RPM_SMD_SNOC_A_CLK] = &sm6125_snoc_a_clk,
+       [RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk,
+       [RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk,
+       [RPM_SMD_QDSS_CLK] = &sm6125_qdss_clk,
+       [RPM_SMD_QDSS_A_CLK] = &sm6125_qdss_a_clk,
+       [RPM_SMD_RF_CLK1] = &msm8916_rf_clk1,
+       [RPM_SMD_RF_CLK1_A] = &msm8916_rf_clk1_a,
+       [RPM_SMD_RF_CLK2] = &msm8916_rf_clk2,
+       [RPM_SMD_RF_CLK2_A] = &msm8916_rf_clk2_a,
+       [RPM_SMD_CNOC_CLK] = &sm6125_cnoc_clk,
+       [RPM_SMD_CNOC_A_CLK] = &sm6125_cnoc_a_clk,
+       [RPM_SMD_IPA_CLK] = &msm8976_ipa_clk,
+       [RPM_SMD_IPA_A_CLK] = &msm8976_ipa_a_clk,
+       [RPM_SMD_CE1_CLK] = &msm8992_ce1_clk,
+       [RPM_SMD_CE1_A_CLK] = &msm8992_ce1_a_clk,
+       [RPM_SMD_LN_BB_CLK1] = &msm8916_bb_clk1,
+       [RPM_SMD_LN_BB_CLK1_A] = &msm8916_bb_clk1_a,
+       [RPM_SMD_LN_BB_CLK2] = &msm8916_bb_clk2,
+       [RPM_SMD_LN_BB_CLK2_A] = &msm8916_bb_clk2_a,
+       [RPM_SMD_LN_BB_CLK3] = &sdm660_ln_bb_clk3,
+       [RPM_SMD_LN_BB_CLK3_A] = &sdm660_ln_bb_clk3_a,
+       [RPM_SMD_QUP_CLK] = &sm6125_qup_clk,
+       [RPM_SMD_QUP_A_CLK] = &sm6125_qup_a_clk,
+       [RPM_SMD_MMRT_CLK] = &sm6125_mmrt_clk,
+       [RPM_SMD_MMRT_A_CLK] = &sm6125_mmrt_a_clk,
+       [RPM_SMD_MMNRT_CLK] = &sm6125_mmnrt_clk,
+       [RPM_SMD_MMNRT_A_CLK] = &sm6125_mmnrt_a_clk,
+       [RPM_SMD_SNOC_PERIPH_CLK] = &sm6125_snoc_periph_clk,
+       [RPM_SMD_SNOC_PERIPH_A_CLK] = &sm6125_snoc_periph_a_clk,
+       [RPM_SMD_SNOC_LPASS_CLK] = &sm6125_snoc_lpass_clk,
+       [RPM_SMD_SNOC_LPASS_A_CLK] = &sm6125_snoc_lpass_a_clk,
+};
+
+static const struct rpm_smd_clk_desc rpm_clk_sm6125 = {
+       .clks = sm6125_clks,
+       .num_clks = ARRAY_SIZE(sm6125_clks),
+};
+
+/* SM6115 */
+static struct clk_smd_rpm *sm6115_clks[] = {
+       [RPM_SMD_XO_CLK_SRC] = &sdm660_bi_tcxo,
+       [RPM_SMD_XO_A_CLK_SRC] = &sdm660_bi_tcxo_a,
+       [RPM_SMD_SNOC_CLK] = &sm6125_snoc_clk,
+       [RPM_SMD_SNOC_A_CLK] = &sm6125_snoc_a_clk,
+       [RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk,
+       [RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk,
+       [RPM_SMD_QDSS_CLK] = &sm6125_qdss_clk,
+       [RPM_SMD_QDSS_A_CLK] = &sm6125_qdss_a_clk,
+       [RPM_SMD_RF_CLK1] = &msm8916_rf_clk1,
+       [RPM_SMD_RF_CLK1_A] = &msm8916_rf_clk1_a,
+       [RPM_SMD_RF_CLK2] = &msm8916_rf_clk2,
+       [RPM_SMD_RF_CLK2_A] = &msm8916_rf_clk2_a,
+       [RPM_SMD_CNOC_CLK] = &sm6125_cnoc_clk,
+       [RPM_SMD_CNOC_A_CLK] = &sm6125_cnoc_a_clk,
+       [RPM_SMD_IPA_CLK] = &msm8976_ipa_clk,
+       [RPM_SMD_IPA_A_CLK] = &msm8976_ipa_a_clk,
+       [RPM_SMD_CE1_CLK] = &msm8992_ce1_clk,
+       [RPM_SMD_CE1_A_CLK] = &msm8992_ce1_a_clk,
+       [RPM_SMD_QUP_CLK] = &sm6125_qup_clk,
+       [RPM_SMD_QUP_A_CLK] = &sm6125_qup_a_clk,
+       [RPM_SMD_MMRT_CLK] = &sm6125_mmrt_clk,
+       [RPM_SMD_MMRT_A_CLK] = &sm6125_mmrt_a_clk,
+       [RPM_SMD_MMNRT_CLK] = &sm6125_mmnrt_clk,
+       [RPM_SMD_MMNRT_A_CLK] = &sm6125_mmnrt_a_clk,
+       [RPM_SMD_SNOC_PERIPH_CLK] = &sm6125_snoc_periph_clk,
+       [RPM_SMD_SNOC_PERIPH_A_CLK] = &sm6125_snoc_periph_a_clk,
+       [RPM_SMD_SNOC_LPASS_CLK] = &sm6125_snoc_lpass_clk,
+       [RPM_SMD_SNOC_LPASS_A_CLK] = &sm6125_snoc_lpass_a_clk,
+       [RPM_SMD_RF_CLK1_PIN] = &msm8916_rf_clk1_pin,
+       [RPM_SMD_RF_CLK1_A_PIN] = &msm8916_rf_clk1_a_pin,
+       [RPM_SMD_RF_CLK2_PIN] = &msm8916_rf_clk2_pin,
+       [RPM_SMD_RF_CLK2_A_PIN] = &msm8916_rf_clk2_a_pin,
+};
+
+static const struct rpm_smd_clk_desc rpm_clk_sm6115 = {
+       .clks = sm6115_clks,
+       .num_clks = ARRAY_SIZE(sm6115_clks),
+};
+
 static const struct of_device_id rpm_smd_clk_match_table[] = {
+       { .compatible = "qcom,rpmcc-mdm9607", .data = &rpm_clk_mdm9607 },
        { .compatible = "qcom,rpmcc-msm8226", .data = &rpm_clk_msm8974 },
        { .compatible = "qcom,rpmcc-msm8916", .data = &rpm_clk_msm8916 },
        { .compatible = "qcom,rpmcc-msm8936", .data = &rpm_clk_msm8936 },
+       { .compatible = "qcom,rpmcc-msm8953", .data = &rpm_clk_msm8953 },
        { .compatible = "qcom,rpmcc-msm8974", .data = &rpm_clk_msm8974 },
        { .compatible = "qcom,rpmcc-msm8976", .data = &rpm_clk_msm8976 },
        { .compatible = "qcom,rpmcc-msm8992", .data = &rpm_clk_msm8992 },
@@ -925,6 +1081,8 @@ static const struct of_device_id rpm_smd_clk_match_table[] = {
        { .compatible = "qcom,rpmcc-msm8998", .data = &rpm_clk_msm8998 },
        { .compatible = "qcom,rpmcc-qcs404",  .data = &rpm_clk_qcs404  },
        { .compatible = "qcom,rpmcc-sdm660",  .data = &rpm_clk_sdm660  },
+       { .compatible = "qcom,rpmcc-sm6115",  .data = &rpm_clk_sm6115  },
+       { .compatible = "qcom,rpmcc-sm6125",  .data = &rpm_clk_sm6125  },
        { }
 };
 MODULE_DEVICE_TABLE(of, rpm_smd_clk_match_table);
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