Merge tag 'locking-urgent-2020-08-10' of git://git.kernel.org/pub/scm/linux/kernel...

[linux-2.6-microblaze.git] / arch / x86 / kernel / cpu / common.c

diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 95c090a..c5d6f17 100644 (file)
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -45,6 +45,7 @@
 #include <asm/mtrr.h>
 #include <asm/hwcap2.h>
 #include <linux/numa.h>
+#include <asm/numa.h>
 #include <asm/asm.h>
 #include <asm/bugs.h>
 #include <asm/cpu.h>
@@ -441,6 +442,22 @@ static void __init setup_cr_pinning(void)
        static_key_enable(&cr_pinning.key);
 }
 
+static __init int x86_nofsgsbase_setup(char *arg)
+{
+       /* Require an exact match without trailing characters. */
+       if (strlen(arg))
+               return 0;
+
+       /* Do not emit a message if the feature is not present. */
+       if (!boot_cpu_has(X86_FEATURE_FSGSBASE))
+               return 1;
+
+       setup_clear_cpu_cap(X86_FEATURE_FSGSBASE);
+       pr_info("FSGSBASE disabled via kernel command line\n");
+       return 1;
+}
+__setup("nofsgsbase", x86_nofsgsbase_setup);
+
 /*
  * Protection Keys are not available in 32-bit mode.
  */
@@ -1495,6 +1512,12 @@ static void identify_cpu(struct cpuinfo_x86 *c)
        setup_smap(c);
        setup_umip(c);
 
+       /* Enable FSGSBASE instructions if available. */
+       if (cpu_has(c, X86_FEATURE_FSGSBASE)) {
+               cr4_set_bits(X86_CR4_FSGSBASE);
+               elf_hwcap2 |= HWCAP2_FSGSBASE;
+       }
+
        /*
         * The vendor-specific functions might have changed features.
         * Now we do "generic changes."