Merge tag 'powerpc-5.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc...
[linux-2.6-microblaze.git] / arch / powerpc / platforms / powernv / pci.c
index ff1a33f..6104418 100644 (file)
@@ -34,7 +34,6 @@
 #include "powernv.h"
 #include "pci.h"
 
-static DEFINE_MUTEX(p2p_mutex);
 static DEFINE_MUTEX(tunnel_mutex);
 
 int pnv_pci_get_slot_id(struct device_node *np, uint64_t *id)
@@ -857,79 +856,6 @@ void pnv_pci_dma_bus_setup(struct pci_bus *bus)
        }
 }
 
-int pnv_pci_set_p2p(struct pci_dev *initiator, struct pci_dev *target, u64 desc)
-{
-       struct pci_controller *hose;
-       struct pnv_phb *phb_init, *phb_target;
-       struct pnv_ioda_pe *pe_init;
-       int rc;
-
-       if (!opal_check_token(OPAL_PCI_SET_P2P))
-               return -ENXIO;
-
-       hose = pci_bus_to_host(initiator->bus);
-       phb_init = hose->private_data;
-
-       hose = pci_bus_to_host(target->bus);
-       phb_target = hose->private_data;
-
-       pe_init = pnv_ioda_get_pe(initiator);
-       if (!pe_init)
-               return -ENODEV;
-
-       /*
-        * Configuring the initiator's PHB requires to adjust its
-        * TVE#1 setting. Since the same device can be an initiator
-        * several times for different target devices, we need to keep
-        * a reference count to know when we can restore the default
-        * bypass setting on its TVE#1 when disabling. Opal is not
-        * tracking PE states, so we add a reference count on the PE
-        * in linux.
-        *
-        * For the target, the configuration is per PHB, so we keep a
-        * target reference count on the PHB.
-        */
-       mutex_lock(&p2p_mutex);
-
-       if (desc & OPAL_PCI_P2P_ENABLE) {
-               /* always go to opal to validate the configuration */
-               rc = opal_pci_set_p2p(phb_init->opal_id, phb_target->opal_id,
-                                     desc, pe_init->pe_number);
-
-               if (rc != OPAL_SUCCESS) {
-                       rc = -EIO;
-                       goto out;
-               }
-
-               pe_init->p2p_initiator_count++;
-               phb_target->p2p_target_count++;
-       } else {
-               if (!pe_init->p2p_initiator_count ||
-                       !phb_target->p2p_target_count) {
-                       rc = -EINVAL;
-                       goto out;
-               }
-
-               if (--pe_init->p2p_initiator_count == 0)
-                       pnv_pci_ioda2_set_bypass(pe_init, true);
-
-               if (--phb_target->p2p_target_count == 0) {
-                       rc = opal_pci_set_p2p(phb_init->opal_id,
-                                             phb_target->opal_id, desc,
-                                             pe_init->pe_number);
-                       if (rc != OPAL_SUCCESS) {
-                               rc = -EIO;
-                               goto out;
-                       }
-               }
-       }
-       rc = 0;
-out:
-       mutex_unlock(&p2p_mutex);
-       return rc;
-}
-EXPORT_SYMBOL_GPL(pnv_pci_set_p2p);
-
 struct device_node *pnv_pci_get_phb_node(struct pci_dev *dev)
 {
        struct pci_controller *hose = pci_bus_to_host(dev->bus);
@@ -938,54 +864,6 @@ struct device_node *pnv_pci_get_phb_node(struct pci_dev *dev)
 }
 EXPORT_SYMBOL(pnv_pci_get_phb_node);
 
-int pnv_pci_enable_tunnel(struct pci_dev *dev, u64 *asnind)
-{
-       struct device_node *np;
-       const __be32 *prop;
-       struct pnv_ioda_pe *pe;
-       uint16_t window_id;
-       int rc;
-
-       if (!radix_enabled())
-               return -ENXIO;
-
-       if (!(np = pnv_pci_get_phb_node(dev)))
-               return -ENXIO;
-
-       prop = of_get_property(np, "ibm,phb-indications", NULL);
-       of_node_put(np);
-
-       if (!prop || !prop[1])
-               return -ENXIO;
-
-       *asnind = (u64)be32_to_cpu(prop[1]);
-       pe = pnv_ioda_get_pe(dev);
-       if (!pe)
-               return -ENODEV;
-
-       /* Increase real window size to accept as_notify messages. */
-       window_id = (pe->pe_number << 1 ) + 1;
-       rc = opal_pci_map_pe_dma_window_real(pe->phb->opal_id, pe->pe_number,
-                                            window_id, pe->tce_bypass_base,
-                                            (uint64_t)1 << 48);
-       return opal_error_code(rc);
-}
-EXPORT_SYMBOL_GPL(pnv_pci_enable_tunnel);
-
-int pnv_pci_disable_tunnel(struct pci_dev *dev)
-{
-       struct pnv_ioda_pe *pe;
-
-       pe = pnv_ioda_get_pe(dev);
-       if (!pe)
-               return -ENODEV;
-
-       /* Restore default real window size. */
-       pnv_pci_ioda2_set_bypass(pe, true);
-       return 0;
-}
-EXPORT_SYMBOL_GPL(pnv_pci_disable_tunnel);
-
 int pnv_pci_set_tunnel_bar(struct pci_dev *dev, u64 addr, int enable)
 {
        __be64 val;
@@ -1040,29 +918,6 @@ out:
 }
 EXPORT_SYMBOL_GPL(pnv_pci_set_tunnel_bar);
 
-#ifdef CONFIG_PPC64    /* for thread.tidr */
-int pnv_pci_get_as_notify_info(struct task_struct *task, u32 *lpid, u32 *pid,
-                              u32 *tid)
-{
-       struct mm_struct *mm = NULL;
-
-       if (task == NULL)
-               return -EINVAL;
-
-       mm = get_task_mm(task);
-       if (mm == NULL)
-               return -EINVAL;
-
-       *pid = mm->context.id;
-       mmput(mm);
-
-       *tid = task->thread.tidr;
-       *lpid = mfspr(SPRN_LPID);
-       return 0;
-}
-EXPORT_SYMBOL_GPL(pnv_pci_get_as_notify_info);
-#endif
-
 void pnv_pci_shutdown(void)
 {
        struct pci_controller *hose;