Merge tag 'kbuild-v5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy...

[linux-2.6-microblaze.git] / arch / arm64 / kernel / process.c

diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c
index 5f7ac9a..19100fe 100644 (file)
--- a/arch/arm64/kernel/process.c
+++ b/arch/arm64/kernel/process.c
@@ -18,6 +18,7 @@
 #include <linux/mman.h>
 #include <linux/mm.h>
 #include <linux/nospec.h>
+#include <linux/sched.h>
 #include <linux/stddef.h>
 #include <linux/sysctl.h>
 #include <linux/unistd.h>
@@ -160,7 +161,7 @@ static void print_pstate(struct pt_regs *regs)
        u64 pstate = regs->pstate;
 
        if (compat_user_mode(regs)) {
-               printk("pstate: %08llx (%c%c%c%c %c %s %s %c%c%c)\n",
+               printk("pstate: %08llx (%c%c%c%c %c %s %s %c%c%c %cDIT %cSSBS)\n",
                        pstate,
                        pstate & PSR_AA32_N_BIT ? 'N' : 'n',
                        pstate & PSR_AA32_Z_BIT ? 'Z' : 'z',
@@ -171,12 +172,14 @@ static void print_pstate(struct pt_regs *regs)
                        pstate & PSR_AA32_E_BIT ? "BE" : "LE",
                        pstate & PSR_AA32_A_BIT ? 'A' : 'a',
                        pstate & PSR_AA32_I_BIT ? 'I' : 'i',
-                       pstate & PSR_AA32_F_BIT ? 'F' : 'f');
+                       pstate & PSR_AA32_F_BIT ? 'F' : 'f',
+                       pstate & PSR_AA32_DIT_BIT ? '+' : '-',
+                       pstate & PSR_AA32_SSBS_BIT ? '+' : '-');
        } else {
                const char *btype_str = btypes[(pstate & PSR_BTYPE_MASK) >>
                                               PSR_BTYPE_SHIFT];
 
-               printk("pstate: %08llx (%c%c%c%c %c%c%c%c %cPAN %cUAO %cTCO BTYPE=%s)\n",
+               printk("pstate: %08llx (%c%c%c%c %c%c%c%c %cPAN %cUAO %cTCO %cDIT %cSSBS BTYPE=%s)\n",
                        pstate,
                        pstate & PSR_N_BIT ? 'N' : 'n',
                        pstate & PSR_Z_BIT ? 'Z' : 'z',
@@ -189,6 +192,8 @@ static void print_pstate(struct pt_regs *regs)
                        pstate & PSR_PAN_BIT ? '+' : '-',
                        pstate & PSR_UAO_BIT ? '+' : '-',
                        pstate & PSR_TCO_BIT ? '+' : '-',
+                       pstate & PSR_DIT_BIT ? '+' : '-',
+                       pstate & PSR_SSBS_BIT ? '+' : '-',
                        btype_str);
        }
 }
@@ -465,16 +470,13 @@ static void erratum_1418040_thread_switch(struct task_struct *prev,
        write_sysreg(val, cntkctl_el1);
 }
 
-static void compat_thread_switch(struct task_struct *next)
-{
-       if (!is_compat_thread(task_thread_info(next)))
-               return;
-
-       if (static_branch_unlikely(&arm64_mismatched_32bit_el0))
-               set_tsk_thread_flag(next, TIF_NOTIFY_RESUME);
-}
-
-static void update_sctlr_el1(u64 sctlr)
+/*
+ * __switch_to() checks current->thread.sctlr_user as an optimisation. Therefore
+ * this function must be called with preemption disabled and the update to
+ * sctlr_user must be made in the same preemption disabled block so that
+ * __switch_to() does not see the variable update before the SCTLR_EL1 one.
+ */
+void update_sctlr_el1(u64 sctlr)
 {
        /*
         * EnIA must not be cleared while in the kernel as this is necessary for
@@ -486,19 +488,6 @@ static void update_sctlr_el1(u64 sctlr)
        isb();
 }
 
-void set_task_sctlr_el1(u64 sctlr)
-{
-       /*
-        * __switch_to() checks current->thread.sctlr as an
-        * optimisation. Disable preemption so that it does not see
-        * the variable update before the SCTLR_EL1 one.
-        */
-       preempt_disable();
-       current->thread.sctlr_user = sctlr;
-       update_sctlr_el1(sctlr);
-       preempt_enable();
-}
-
 /*
  * Thread switching.
  */
@@ -515,7 +504,6 @@ __notrace_funcgraph struct task_struct *__switch_to(struct task_struct *prev,
        ssbs_thread_switch(next);
        erratum_1418040_thread_switch(prev, next);
        ptrauth_thread_switch_user(next);
-       compat_thread_switch(next);
 
        /*
         * Complete any pending TLB or cache maintenance on this CPU in case
@@ -576,6 +564,28 @@ unsigned long arch_align_stack(unsigned long sp)
        return sp & ~0xf;
 }
 
+#ifdef CONFIG_COMPAT
+int compat_elf_check_arch(const struct elf32_hdr *hdr)
+{
+       if (!system_supports_32bit_el0())
+               return false;
+
+       if ((hdr)->e_machine != EM_ARM)
+               return false;
+
+       if (!((hdr)->e_flags & EF_ARM_EABI_MASK))
+               return false;
+
+       /*
+        * Prevent execve() of a 32-bit program from a deadline task
+        * if the restricted affinity mask would be inadmissible on an
+        * asymmetric system.
+        */
+       return !static_branch_unlikely(&arm64_mismatched_32bit_el0) ||
+              !dl_task_check_affinity(current, system_32bit_el0_cpumask());
+}
+#endif
+
 /*
  * Called from setup_new_exec() after (COMPAT_)SET_PERSONALITY.
  */
@@ -585,8 +595,20 @@ void arch_setup_new_exec(void)
 
        if (is_compat_task()) {
                mmflags = MMCF_AARCH32;
+
+               /*
+                * Restrict the CPU affinity mask for a 32-bit task so that
+                * it contains only 32-bit-capable CPUs.
+                *
+                * From the perspective of the task, this looks similar to
+                * what would happen if the 64-bit-only CPUs were hot-unplugged
+                * at the point of execve(), although we try a bit harder to
+                * honour the cpuset hierarchy.
+                */
                if (static_branch_unlikely(&arm64_mismatched_32bit_el0))
-                       set_tsk_thread_flag(current, TIF_NOTIFY_RESUME);
+                       force_compatible_cpus_allowed_ptr(current);
+       } else if (static_branch_unlikely(&arm64_mismatched_32bit_el0)) {
+               relax_compatible_cpus_allowed_ptr(current);
        }
 
        current->mm->context.flags = mmflags;