Merge branch 'for-next/scs' into for-next/core

[linux-2.6-microblaze.git] / arch / arm64 / kernel / entry.S

diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S
index 741faf0..5304d19 100644 (file)
--- a/arch/arm64/kernel/entry.S
+++ b/arch/arm64/kernel/entry.S
@@ -179,7 +179,7 @@ alternative_cb_end
 
        apply_ssbd 1, x22, x23
 
-       ptrauth_keys_install_kernel tsk, 1, x20, x22, x23
+       ptrauth_keys_install_kernel tsk, x20, x22, x23
 
        scs_load tsk, x20
        .else
@@ -745,21 +745,10 @@ el0_error_naked:
        b       ret_to_user
 SYM_CODE_END(el0_error)
 
-/*
- * Ok, we need to do extra processing, enter the slow path.
- */
-work_pending:
-       mov     x0, sp                          // 'regs'
-       bl      do_notify_resume
-#ifdef CONFIG_TRACE_IRQFLAGS
-       bl      trace_hardirqs_on               // enabled while in userspace
-#endif
-       ldr     x1, [tsk, #TSK_TI_FLAGS]        // re-check for single-step
-       b       finish_ret_to_user
 /*
  * "slow" syscall return path.
  */
-ret_to_user:
+SYM_CODE_START_LOCAL(ret_to_user)
        disable_daif
        gic_prio_kentry_setup tmp=x3
        ldr     x1, [tsk, #TSK_TI_FLAGS]
@@ -771,7 +760,19 @@ finish_ret_to_user:
        bl      stackleak_erase
 #endif
        kernel_exit 0
-ENDPROC(ret_to_user)
+
+/*
+ * Ok, we need to do extra processing, enter the slow path.
+ */
+work_pending:
+       mov     x0, sp                          // 'regs'
+       bl      do_notify_resume
+#ifdef CONFIG_TRACE_IRQFLAGS
+       bl      trace_hardirqs_on               // enabled while in userspace
+#endif
+       ldr     x1, [tsk, #TSK_TI_FLAGS]        // re-check for single-step
+       b       finish_ret_to_user
+SYM_CODE_END(ret_to_user)
 
        .popsection                             // .entry.text
 
@@ -918,7 +919,7 @@ SYM_FUNC_START(cpu_switch_to)
        ldr     lr, [x8]
        mov     sp, x9
        msr     sp_el0, x1
-       ptrauth_keys_install_kernel x1, 1, x8, x9, x10
+       ptrauth_keys_install_kernel x1, x8, x9, x10
        scs_save x0, x8
        scs_load x1, x8
        ret