arm64: mte: change ASYNC and SYNC TCF settings into bitfields

[linux-2.6-microblaze.git] / arch / arm64 / include / asm / processor.h

diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h
index b6517fd..ee82ebb 100644 (file)
--- a/arch/arm64/include/asm/processor.h
+++ b/arch/arm64/include/asm/processor.h
@@ -16,6 +16,12 @@
  */
 #define NET_IP_ALIGN   0
 
+#define MTE_CTRL_GCR_USER_EXCL_SHIFT   0
+#define MTE_CTRL_GCR_USER_EXCL_MASK    0xffff
+
+#define MTE_CTRL_TCF_SYNC              (1UL << 16)
+#define MTE_CTRL_TCF_ASYNC             (1UL << 17)
+
 #ifndef __ASSEMBLY__
 
 #include <linux/build_bug.h>
@@ -153,7 +159,7 @@ struct thread_struct {
 #endif
 #endif
 #ifdef CONFIG_ARM64_MTE
-       u64                     gcr_user_excl;
+       u64                     mte_ctrl;
 #endif
        u64                     sctlr_user;
 };