arm64: mte: change ASYNC and SYNC TCF settings into bitfields
[linux-2.6-microblaze.git] / arch / arm64 / include / asm / processor.h
index 54d3427..ee82ebb 100644 (file)
@@ -19,6 +19,9 @@
 #define MTE_CTRL_GCR_USER_EXCL_SHIFT   0
 #define MTE_CTRL_GCR_USER_EXCL_MASK    0xffff
 
+#define MTE_CTRL_TCF_SYNC              (1UL << 16)
+#define MTE_CTRL_TCF_ASYNC             (1UL << 17)
+
 #ifndef __ASSEMBLY__
 
 #include <linux/build_bug.h>