Merge tag 'block-5.14-2021-08-07' of git://git.kernel.dk/linux-block

[linux-2.6-microblaze.git] / arch / arm64 / boot / dts / renesas / r8a77961.dtsi

diff --git a/arch/arm64/boot/dts/renesas/r8a77961.dtsi b/arch/arm64/boot/dts/renesas/r8a77961.dtsi
index d980476..91b501e 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r8a77961.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77961.dtsi
@@ -52,18 +52,19 @@
 
                opp-500000000 {
                        opp-hz = /bits/ 64 <500000000>;
-                       opp-microvolt = <820000>;
+                       opp-microvolt = <830000>;
                        clock-latency-ns = <300000>;
                };
                opp-1000000000 {
                        opp-hz = /bits/ 64 <1000000000>;
-                       opp-microvolt = <820000>;
+                       opp-microvolt = <830000>;
                        clock-latency-ns = <300000>;
                };
                opp-1500000000 {
                        opp-hz = /bits/ 64 <1500000000>;
-                       opp-microvolt = <820000>;
+                       opp-microvolt = <830000>;
                        clock-latency-ns = <300000>;
+                       opp-suspend;
                };
                opp-1600000000 {
                        opp-hz = /bits/ 64 <1600000000>;
@@ -559,10 +560,19 @@
                };
 
                intc_ex: interrupt-controller@e61c0000 {
+                       compatible = "renesas,intc-ex-r8a77961", "renesas,irqc";
                        #interrupt-cells = <2>;
                        interrupt-controller;
                        reg = <0 0xe61c0000 0 0x200>;
-                       /* placeholder */
+                       interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 407>;
+                       power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
+                       resets = <&cpg 407>;
                };
 
                tmu0: timer@e61e0000 {
@@ -1144,6 +1154,7 @@
                                          "ch20", "ch21", "ch22", "ch23",
                                          "ch24";
                        clocks = <&cpg CPG_MOD 812>;
+                       clock-names = "fck";
                        power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
                        resets = <&cpg 812>;
                        phy-mode = "rgmii";