arm64: dts: qcom: SC7280: Add rpmhcc clock controller node

[linux-2.6-microblaze.git] / arch / arm64 / boot / dts / qcom / sc7280.dtsi

diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 92c3826..baae828 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -6,6 +6,7 @@
  */
 
 #include <dt-bindings/clock/qcom,gcc-sc7280.h>
+#include <dt-bindings/clock/qcom,rpmh.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
 
@@ -179,6 +180,14 @@
                gcc: clock-controller@100000 {
                        compatible = "qcom,gcc-sc7280";
                        reg = <0 0x00100000 0 0x1f0000>;
+                       clocks = <&rpmhcc RPMH_CXO_CLK>,
+                                <&rpmhcc RPMH_CXO_CLK_A>, <&sleep_clk>,
+                                <0>, <0>, <0>, <0>, <0>, <0>;
+                       clock-names = "bi_tcxo", "bi_tcxo_ao", "sleep_clk",
+                                     "pcie_0_pipe_clk", "pcie_1_pipe-clk",
+                                     "ufs_phy_rx_symbol_0_clk", "ufs_phy_rx_symbol_1_clk",
+                                     "ufs_phy_tx_symbol_0_clk",
+                                     "usb3_phy_wrapper_gcc_usb30_pipe_clk";
                        #clock-cells = <1>;
                        #reset-cells = <1>;
                        #power-domain-cells = <1>;
@@ -330,6 +339,13 @@
                                          <SLEEP_TCS   3>,
                                          <WAKE_TCS    3>,
                                          <CONTROL_TCS 1>;
+
+                       rpmhcc: clock-controller {
+                               compatible = "qcom,sc7280-rpmh-clk";
+                               clocks = <&xo_board>;
+                               clock-names = "xo";
+                               #clock-cells = <1>;
+                       };
                };
        };