Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux

[linux-2.6-microblaze.git] / arch / arm64 / boot / dts / nvidia / tegra186.dtsi

diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
index d02f6bf..e94f8ad 100644 (file)
--- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
@@ -548,6 +548,83 @@
                status = "disabled";
        };
 
+       pwm1: pwm@3280000 {
+               compatible = "nvidia,tegra186-pwm";
+               reg = <0x0 0x3280000 0x0 0x10000>;
+               clocks = <&bpmp TEGRA186_CLK_PWM1>;
+               clock-names = "pwm";
+               resets = <&bpmp TEGRA186_RESET_PWM1>;
+               reset-names = "pwm";
+               status = "disabled";
+               #pwm-cells = <2>;
+       };
+
+       pwm2: pwm@3290000 {
+               compatible = "nvidia,tegra186-pwm";
+               reg = <0x0 0x3290000 0x0 0x10000>;
+               clocks = <&bpmp TEGRA186_CLK_PWM2>;
+               clock-names = "pwm";
+               resets = <&bpmp TEGRA186_RESET_PWM2>;
+               reset-names = "pwm";
+               status = "disabled";
+               #pwm-cells = <2>;
+       };
+
+       pwm3: pwm@32a0000 {
+               compatible = "nvidia,tegra186-pwm";
+               reg = <0x0 0x32a0000 0x0 0x10000>;
+               clocks = <&bpmp TEGRA186_CLK_PWM3>;
+               clock-names = "pwm";
+               resets = <&bpmp TEGRA186_RESET_PWM3>;
+               reset-names = "pwm";
+               status = "disabled";
+               #pwm-cells = <2>;
+       };
+
+       pwm5: pwm@32c0000 {
+               compatible = "nvidia,tegra186-pwm";
+               reg = <0x0 0x32c0000 0x0 0x10000>;
+               clocks = <&bpmp TEGRA186_CLK_PWM5>;
+               clock-names = "pwm";
+               resets = <&bpmp TEGRA186_RESET_PWM5>;
+               reset-names = "pwm";
+               status = "disabled";
+               #pwm-cells = <2>;
+       };
+
+       pwm6: pwm@32d0000 {
+               compatible = "nvidia,tegra186-pwm";
+               reg = <0x0 0x32d0000 0x0 0x10000>;
+               clocks = <&bpmp TEGRA186_CLK_PWM6>;
+               clock-names = "pwm";
+               resets = <&bpmp TEGRA186_RESET_PWM6>;
+               reset-names = "pwm";
+               status = "disabled";
+               #pwm-cells = <2>;
+       };
+
+       pwm7: pwm@32e0000 {
+               compatible = "nvidia,tegra186-pwm";
+               reg = <0x0 0x32e0000 0x0 0x10000>;
+               clocks = <&bpmp TEGRA186_CLK_PWM7>;
+               clock-names = "pwm";
+               resets = <&bpmp TEGRA186_RESET_PWM7>;
+               reset-names = "pwm";
+               status = "disabled";
+               #pwm-cells = <2>;
+       };
+
+       pwm8: pwm@32f0000 {
+               compatible = "nvidia,tegra186-pwm";
+               reg = <0x0 0x32f0000 0x0 0x10000>;
+               clocks = <&bpmp TEGRA186_CLK_PWM8>;
+               clock-names = "pwm";
+               resets = <&bpmp TEGRA186_RESET_PWM8>;
+               reset-names = "pwm";
+               status = "disabled";
+               #pwm-cells = <2>;
+       };
+
        sdmmc1: mmc@3400000 {
                compatible = "nvidia,tegra186-sdhci";
                reg = <0x0 0x03400000 0x0 0x10000>;
@@ -826,6 +903,9 @@
                         <&bpmp TEGRA186_CLK_XUSB_CORE_SS>,
                         <&bpmp TEGRA186_CLK_XUSB_FS>;
                clock-names = "dev", "ss", "ss_src", "fs_src";
+               interconnects = <&mc TEGRA186_MEMORY_CLIENT_XUSB_DEVR &emc>,
+                               <&mc TEGRA186_MEMORY_CLIENT_XUSB_DEVW &emc>;
+               interconnect-names = "dma-mem", "write";
                iommus = <&smmu TEGRA186_SID_XUSB_DEV>;
                power-domains = <&bpmp TEGRA186_POWER_DOMAIN_XUSBB>,
                                <&bpmp TEGRA186_POWER_DOMAIN_XUSBA>;
@@ -944,6 +1024,17 @@
                #interrupt-cells = <2>;
        };
 
+       pwm4: pwm@c340000 {
+               compatible = "nvidia,tegra186-pwm";
+               reg = <0x0 0xc340000 0x0 0x10000>;
+               clocks = <&bpmp TEGRA186_CLK_PWM4>;
+               clock-names = "pwm";
+               resets = <&bpmp TEGRA186_RESET_PWM4>;
+               reset-names = "pwm";
+               status = "disabled";
+               #pwm-cells = <2>;
+       };
+
        pmc: pmc@c360000 {
                compatible = "nvidia,tegra186-pmc";
                reg = <0 0x0c360000 0 0x10000>,