arm64: dts: ls1043a: use constants in the clockgen phandle
[linux-2.6-microblaze.git] / arch / arm64 / boot / dts / freescale / fsl-ls1043a.dtsi
index bbae4b3..5a8a1dc 100644 (file)
@@ -8,6 +8,7 @@
  * Mingkai Hu <Mingkai.hu@freescale.com>
  */
 
+#include <dt-bindings/clock/fsl,qoriq-clockgen.h>
 #include <dt-bindings/thermal/thermal.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 
@@ -44,7 +45,7 @@
                        device_type = "cpu";
                        compatible = "arm,cortex-a53";
                        reg = <0x0>;
-                       clocks = <&clockgen 1 0>;
+                       clocks = <&clockgen QORIQ_CLK_CMUX 0>;
                        next-level-cache = <&l2>;
                        cpu-idle-states = <&CPU_PH20>;
                        #cooling-cells = <2>;
@@ -54,7 +55,7 @@
                        device_type = "cpu";
                        compatible = "arm,cortex-a53";
                        reg = <0x1>;
-                       clocks = <&clockgen 1 0>;
+                       clocks = <&clockgen QORIQ_CLK_CMUX 0>;
                        next-level-cache = <&l2>;
                        cpu-idle-states = <&CPU_PH20>;
                        #cooling-cells = <2>;
@@ -64,7 +65,7 @@
                        device_type = "cpu";
                        compatible = "arm,cortex-a53";
                        reg = <0x2>;
-                       clocks = <&clockgen 1 0>;
+                       clocks = <&clockgen QORIQ_CLK_CMUX 0>;
                        next-level-cache = <&l2>;
                        cpu-idle-states = <&CPU_PH20>;
                        #cooling-cells = <2>;
@@ -74,7 +75,7 @@
                        device_type = "cpu";
                        compatible = "arm,cortex-a53";
                        reg = <0x3>;
-                       clocks = <&clockgen 1 0>;
+                       clocks = <&clockgen QORIQ_CLK_CMUX 0>;
                        next-level-cache = <&l2>;
                        cpu-idle-states = <&CPU_PH20>;
                        #cooling-cells = <2>;
                        compatible = "fsl,ls1043a-scfg", "syscon";
                        reg = <0x0 0x1570000 0x0 0x10000>;
                        big-endian;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges = <0x0 0x0 0x1570000 0x10000>;
+
+                       extirq: interrupt-controller@1ac {
+                               compatible = "fsl,ls1043a-extirq";
+                               #interrupt-cells = <2>;
+                               #address-cells = <0>;
+                               interrupt-controller;
+                               reg = <0x1ac 4>;
+                               interrupt-map =
+                                       <0 0 &gic GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+                                       <1 0 &gic GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
+                                       <2 0 &gic GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
+                                       <3 0 &gic GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
+                                       <4 0 &gic GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
+                                       <5 0 &gic GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
+                                       <6 0 &gic GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
+                                       <7 0 &gic GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
+                                       <8 0 &gic GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
+                                       <9 0 &gic GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
+                                       <10 0 &gic GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>,
+                                       <11 0 &gic GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupt-map-mask = <0xffffffff 0x0>;
+                       };
                };
 
                crypto: crypto@1700000 {
                        reg-names = "QuadSPI", "QuadSPI-memory";
                        interrupts = <0 99 0x4>;
                        clock-names = "qspi_en", "qspi";
-                       clocks = <&clockgen 4 0>, <&clockgen 4 0>;
+                       clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+                                           QORIQ_CLK_PLL_DIV(1)>,
+                                <&clockgen QORIQ_CLK_PLATFORM_PLL
+                                           QORIQ_CLK_PLL_DIV(1)>;
                        status = "disabled";
                };
 
                        reg = <0x0 0x2100000 0x0 0x10000>;
                        interrupts = <0 64 0x4>;
                        clock-names = "dspi";
-                       clocks = <&clockgen 4 0>;
+                       clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+                                           QORIQ_CLK_PLL_DIV(1)>;
                        spi-num-chipselects = <5>;
                        big-endian;
                        status = "disabled";
                        reg = <0x0 0x2110000 0x0 0x10000>;
                        interrupts = <0 65 0x4>;
                        clock-names = "dspi";
-                       clocks = <&clockgen 4 0>;
+                       clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+                                           QORIQ_CLK_PLL_DIV(1)>;
                        spi-num-chipselects = <5>;
                        big-endian;
                        status = "disabled";
                        reg = <0x0 0x2180000 0x0 0x10000>;
                        interrupts = <0 56 0x4>;
                        clock-names = "i2c";
-                       clocks = <&clockgen 4 0>;
+                       clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+                                           QORIQ_CLK_PLL_DIV(1)>;
                        dmas = <&edma0 1 39>,
                               <&edma0 1 38>;
                        dma-names = "tx", "rx";
                        reg = <0x0 0x2190000 0x0 0x10000>;
                        interrupts = <0 57 0x4>;
                        clock-names = "i2c";
-                       clocks = <&clockgen 4 0>;
+                       clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+                                           QORIQ_CLK_PLL_DIV(1)>;
                        status = "disabled";
                };
 
                        reg = <0x0 0x21a0000 0x0 0x10000>;
                        interrupts = <0 58 0x4>;
                        clock-names = "i2c";
-                       clocks = <&clockgen 4 0>;
+                       clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+                                           QORIQ_CLK_PLL_DIV(1)>;
                        status = "disabled";
                };
 
                        reg = <0x0 0x21b0000 0x0 0x10000>;
                        interrupts = <0 59 0x4>;
                        clock-names = "i2c";
-                       clocks = <&clockgen 4 0>;
+                       clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+                                           QORIQ_CLK_PLL_DIV(1)>;
                        status = "disabled";
                };
 
                        compatible = "fsl,ns16550", "ns16550a";
                        reg = <0x00 0x21c0500 0x0 0x100>;
                        interrupts = <0 54 0x4>;
-                       clocks = <&clockgen 4 0>;
+                       clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+                                           QORIQ_CLK_PLL_DIV(1)>;
                };
 
                duart1: serial@21c0600 {
                        compatible = "fsl,ns16550", "ns16550a";
                        reg = <0x00 0x21c0600 0x0 0x100>;
                        interrupts = <0 54 0x4>;
-                       clocks = <&clockgen 4 0>;
+                       clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+                                           QORIQ_CLK_PLL_DIV(1)>;
                };
 
                duart2: serial@21d0500 {
                        compatible = "fsl,ns16550", "ns16550a";
                        reg = <0x0 0x21d0500 0x0 0x100>;
                        interrupts = <0 55 0x4>;
-                       clocks = <&clockgen 4 0>;
+                       clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+                                           QORIQ_CLK_PLL_DIV(1)>;
                };
 
                duart3: serial@21d0600 {
                        compatible = "fsl,ns16550", "ns16550a";
                        reg = <0x0 0x21d0600 0x0 0x100>;
                        interrupts = <0 55 0x4>;
-                       clocks = <&clockgen 4 0>;
+                       clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+                                           QORIQ_CLK_PLL_DIV(1)>;
                };
 
                gpio1: gpio@2300000 {
                        compatible = "fsl,ls1021a-lpuart";
                        reg = <0x0 0x2950000 0x0 0x1000>;
                        interrupts = <0 48 0x4>;
-                       clocks = <&clockgen 0 0>;
+                       clocks = <&clockgen QORIQ_CLK_SYSCLK 0>;
                        clock-names = "ipg";
                        status = "disabled";
                };
                        compatible = "fsl,ls1021a-lpuart";
                        reg = <0x0 0x2960000 0x0 0x1000>;
                        interrupts = <0 49 0x4>;
-                       clocks = <&clockgen 4 0>;
+                       clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+                                           QORIQ_CLK_PLL_DIV(1)>;
                        clock-names = "ipg";
                        status = "disabled";
                };
                        compatible = "fsl,ls1021a-lpuart";
                        reg = <0x0 0x2970000 0x0 0x1000>;
                        interrupts = <0 50 0x4>;
-                       clocks = <&clockgen 4 0>;
+                       clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+                                           QORIQ_CLK_PLL_DIV(1)>;
                        clock-names = "ipg";
                        status = "disabled";
                };
                        compatible = "fsl,ls1021a-lpuart";
                        reg = <0x0 0x2980000 0x0 0x1000>;
                        interrupts = <0 51 0x4>;
-                       clocks = <&clockgen 4 0>;
+                       clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+                                           QORIQ_CLK_PLL_DIV(1)>;
                        clock-names = "ipg";
                        status = "disabled";
                };
                        compatible = "fsl,ls1021a-lpuart";
                        reg = <0x0 0x2990000 0x0 0x1000>;
                        interrupts = <0 52 0x4>;
-                       clocks = <&clockgen 4 0>;
+                       clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+                                           QORIQ_CLK_PLL_DIV(1)>;
                        clock-names = "ipg";
                        status = "disabled";
                };
                        compatible = "fsl,ls1021a-lpuart";
                        reg = <0x0 0x29a0000 0x0 0x1000>;
                        interrupts = <0 53 0x4>;
-                       clocks = <&clockgen 4 0>;
+                       clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+                                           QORIQ_CLK_PLL_DIV(1)>;
                        clock-names = "ipg";
                        status = "disabled";
                };
                        compatible = "fsl,ls1043a-wdt", "fsl,imx21-wdt";
                        reg = <0x0 0x2ad0000 0x0 0x10000>;
                        interrupts = <0 83 0x4>;
-                       clocks = <&clockgen 4 0>;
+                       clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+                                           QORIQ_CLK_PLL_DIV(1)>;
                        clock-names = "wdog";
                        big-endian;
                };
                        dma-channels = <32>;
                        big-endian;
                        clock-names = "dmamux0", "dmamux1";
-                       clocks = <&clockgen 4 0>,
-                                <&clockgen 4 0>;
+                       clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+                                           QORIQ_CLK_PLL_DIV(1)>,
+                                <&clockgen QORIQ_CLK_PLATFORM_PLL
+                                           QORIQ_CLK_PLL_DIV(1)>;
                };
 
                usb0: usb@2f00000 {
                                <0x0 0x20140520 0x0 0x4>;
                        reg-names = "ahci", "sata-ecc";
                        interrupts = <0 69 0x4>;
-                       clocks = <&clockgen 4 0>;
+                       clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+                                           QORIQ_CLK_PLL_DIV(1)>;
                        dma-coherent;
                };