Merge tag 'kvmarm-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm...

[linux-2.6-microblaze.git] / arch / arm64 / Kconfig

diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 1273999..6d23283 100644 (file)
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -118,6 +118,7 @@ config ARM64
        select GENERIC_STRNLEN_USER
        select GENERIC_TIME_VSYSCALL
        select GENERIC_GETTIMEOFDAY
+       select GENERIC_VDSO_TIME_NS
        select HANDLE_DOMAIN_IRQ
        select HARDIRQS_SW_RESEND
        select HAVE_PCI
@@ -148,7 +149,6 @@ config ARM64
        select HAVE_CMPXCHG_DOUBLE
        select HAVE_CMPXCHG_LOCAL
        select HAVE_CONTEXT_TRACKING
-       select HAVE_COPY_THREAD_TLS
        select HAVE_DEBUG_BUGVERBOSE
        select HAVE_DEBUG_KMEMLEAK
        select HAVE_DMA_CONTIGUOUS
@@ -1311,6 +1311,8 @@ config SWP_EMULATION
          ARMv8 obsoletes the use of A32 SWP/SWPB instructions such that
          they are always undefined. Say Y here to enable software
          emulation of these instructions for userspace using LDXR/STXR.
+         This feature can be controlled at runtime with the abi.swp
+         sysctl which is disabled by default.
 
          In some older versions of glibc [<=2.8] SWP is used during futex
          trylock() operations with the assumption that the code will not
@@ -1337,7 +1339,8 @@ config CP15_BARRIER_EMULATION
          Say Y here to enable software emulation of these
          instructions for AArch32 userspace code. When this option is
          enabled, CP15 barrier usage is traced which can help
-         identify software that needs updating.
+         identify software that needs updating. This feature can be
+         controlled at runtime with the abi.cp15_barrier sysctl.
 
          If unsure, say Y
 
@@ -1348,7 +1351,8 @@ config SETEND_EMULATION
          AArch32 EL0, and is deprecated in ARMv8.
 
          Say Y here to enable software emulation of the instruction
-         for AArch32 userspace code.
+         for AArch32 userspace code. This feature can be controlled
+         at runtime with the abi.setend sysctl.
 
          Note: All the cpus on the system must have mixed endian support at EL0
          for this feature to be enabled. If a new CPU - which doesn't support mixed
@@ -1578,6 +1582,20 @@ config ARM64_AMU_EXTN
          correctly reflect reality. Most commonly, the value read will be 0,
          indicating that the counter is not enabled.
 
+config AS_HAS_ARMV8_4
+       def_bool $(cc-option,-Wa$(comma)-march=armv8.4-a)
+
+config ARM64_TLB_RANGE
+       bool "Enable support for tlbi range feature"
+       default y
+       depends on AS_HAS_ARMV8_4
+       help
+         ARMv8.4-TLBI provides TLBI invalidation instruction that apply to a
+         range of input addresses.
+
+         The feature introduces new assembly instructions, and they were
+         support when binutils >= 2.30.
+
 endmenu
 
 menu "ARMv8.5 architectural features"