Merge tag 'ext4_for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tytso...

[linux-2.6-microblaze.git] / arch / arm / boot / dts / omap4.dtsi

diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index d6475cc..72e4f64 100644 (file)
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -107,11 +107,6 @@
                        ti,hwmods = "mpu";
                        sram = <&ocmcram>;
                };
-
-               iva {
-                       compatible = "ti,ivahd";
-                       ti,hwmods = "iva";
-               };
        };
 
        /*
@@ -150,24 +145,41 @@
                        reg = <0x40304000 0xa000>; /* 40k */
                };
 
-               gpmc: gpmc@50000000 {
-                       compatible = "ti,omap4430-gpmc";
-                       reg = <0x50000000 0x1000>;
-                       #address-cells = <2>;
-                       #size-cells = <1>;
-                       interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
-                       dmas = <&sdma 4>;
-                       dma-names = "rxtx";
-                       gpmc,num-cs = <8>;
-                       gpmc,num-waitpins = <4>;
-                       ti,hwmods = "gpmc";
+               target-module@50000000 {
+                       compatible = "ti,sysc-omap2", "ti,sysc";
+                       reg = <0x50000000 4>,
+                             <0x50000010 4>,
+                             <0x50000014 4>;
+                       reg-names = "rev", "sysc", "syss";
+                       ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>;
+                       ti,syss-mask = <1>;
                        ti,no-idle-on-init;
-                       clocks = <&l3_div_ck>;
+                       clocks = <&l3_2_clkctrl OMAP4_GPMC_CLKCTRL 0>;
                        clock-names = "fck";
-                       interrupt-controller;
-                       #interrupt-cells = <2>;
-                       gpio-controller;
-                       #gpio-cells = <2>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges = <0x50000000 0x50000000 0x00001000>, /* regs */
+                                <0x00000000 0x00000000 0x40000000>; /* data */
+
+                       gpmc: gpmc@50000000 {
+                               compatible = "ti,omap4430-gpmc";
+                               reg = <0x50000000 0x1000>;
+                               #address-cells = <2>;
+                               #size-cells = <1>;
+                               interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+                               dmas = <&sdma 4>;
+                               dma-names = "rxtx";
+                               gpmc,num-cs = <8>;
+                               gpmc,num-waitpins = <4>;
+                               clocks = <&l3_div_ck>;
+                               clock-names = "fck";
+                               interrupt-controller;
+                               #interrupt-cells = <2>;
+                               gpio-controller;
+                               #gpio-cells = <2>;
+                       };
                };
 
                target-module@52000000 {
@@ -445,6 +457,7 @@
                              <0x58000014 4>;
                        reg-names = "rev", "syss";
                        ti,syss-mask = <1>;
+                       power-domains = <&prm_dss>;
                        clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 0>,
                                 <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 9>,
                                 <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 10>,
@@ -650,6 +663,32 @@
                                };
                        };
                };
+
+               iva_hd_target: target-module@5a000000 {
+                       compatible = "ti,sysc-omap4", "ti,sysc";
+                       reg = <0x5a05a400 0x4>,
+                             <0x5a05a410 0x4>;
+                       reg-names = "rev", "sysc";
+                       ti,sysc-midle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>;
+                       ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>;
+                       power-domains = <&prm_ivahd>;
+                       resets = <&prm_ivahd 2>;
+                       reset-names = "rstctrl";
+                       clocks = <&ivahd_clkctrl OMAP4_IVA_CLKCTRL 0>;
+                       clock-names = "fck";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges = <0x5a000000 0x5a000000 0x1000000>,
+                                <0x5b000000 0x5b000000 0x1000000>;
+
+                       iva {
+                               compatible = "ti,ivahd";
+                       };
+               };
        };
 };
 
@@ -658,10 +697,17 @@
 #include "omap44xx-clocks.dtsi"
 
 &prm {
+       prm_mpu: prm@300 {
+               compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
+               reg = <0x300 0x100>;
+               #power-domain-cells = <0>;
+       };
+
        prm_tesla: prm@400 {
                compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
                reg = <0x400 0x100>;
                #reset-cells = <1>;
+               #power-domain-cells = <0>;
        };
 
        prm_abe: prm@500 {
@@ -670,16 +716,78 @@
                #power-domain-cells = <0>;
        };
 
+       prm_always_on_core: prm@600 {
+               compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
+               reg = <0x600 0x100>;
+               #power-domain-cells = <0>;
+       };
+
        prm_core: prm@700 {
                compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
                reg = <0x700 0x100>;
                #reset-cells = <1>;
+               #power-domain-cells = <0>;
        };
 
        prm_ivahd: prm@f00 {
                compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
                reg = <0xf00 0x100>;
                #reset-cells = <1>;
+               #power-domain-cells = <0>;
+       };
+
+       prm_cam: prm@1000 {
+               compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
+               reg = <0x1000 0x100>;
+               #power-domain-cells = <0>;
+       };
+
+       prm_dss: prm@1100 {
+               compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
+               reg = <0x1100 0x100>;
+               #power-domain-cells = <0>;
+       };
+
+       prm_gfx: prm@1200 {
+               compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
+               reg = <0x1200 0x100>;
+               #power-domain-cells = <0>;
+       };
+
+       prm_l3init: prm@1300 {
+               compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
+               reg = <0x1300 0x100>;
+               #power-domain-cells = <0>;
+       };
+
+       prm_l4per: prm@1400 {
+               compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
+               reg = <0x1400 0x100>;
+               #power-domain-cells = <0>;
+       };
+
+       prm_cefuse: prm@1600 {
+               compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
+               reg = <0x1600 0x100>;
+               #power-domain-cells = <0>;
+       };
+
+       prm_wkup: prm@1700 {
+               compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
+               reg = <0x1700 0x100>;
+               #power-domain-cells = <0>;
+       };
+
+       prm_emu: prm@1900 {
+               compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
+               reg = <0x1900 0x100>;
+               #power-domain-cells = <0>;
+       };
+
+       prm_dss: prm@1100 {
+               compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
+               reg = <0x1100 0x40>;
+               #power-domain-cells = <0>;
        };
 
        prm_device: prm@1b00 {