ARM: dts: hisilicon: fix errors detected by simple-bus.yaml

[linux-2.6-microblaze.git] / arch / arm / boot / dts / hi3620.dtsi

diff --git a/arch/arm/boot/dts/hi3620.dtsi b/arch/arm/boot/dts/hi3620.dtsi
index f0af1bf..905900b 100644 (file)
--- a/arch/arm/boot/dts/hi3620.dtsi
+++ b/arch/arm/boot/dts/hi3620.dtsi
@@ -63,7 +63,7 @@
                };
        };
 
-       amba {
+       amba-bus {
 
                #address-cells = <1>;
                #size-cells = <1>;
@@ -89,7 +89,7 @@
                };
 
                sysctrl: system-controller@802000 {
-                       compatible = "hisilicon,sysctrl";
+                       compatible = "hisilicon,sysctrl", "syscon";
                        #address-cells = <1>;
                        #size-cells = <1>;
                        ranges = <0 0x802000 0x1000>;
@@ -111,8 +111,10 @@
                        reg = <0x800000 0x1000>;
                        /* timer00 & timer01 */
                        interrupts = <0 0 4>, <0 1 4>;
-                       clocks = <&clock HI3620_TIMER0_MUX>, <&clock HI3620_TIMER1_MUX>;
-                       clock-names = "apb_pclk";
+                       clocks = <&clock HI3620_TIMER0_MUX>,
+                                <&clock HI3620_TIMER1_MUX>,
+                                <&clock HI3620_TIMER0_MUX>;
+                       clock-names = "timer0clk", "timer1clk", "apb_pclk";
                        status = "disabled";
                };
 
@@ -121,8 +123,10 @@
                        reg = <0x801000 0x1000>;
                        /* timer10 & timer11 */
                        interrupts = <0 2 4>, <0 3 4>;
-                       clocks = <&clock HI3620_TIMER2_MUX>, <&clock HI3620_TIMER3_MUX>;
-                       clock-names = "apb_pclk";
+                       clocks = <&clock HI3620_TIMER2_MUX>,
+                                <&clock HI3620_TIMER3_MUX>,
+                                <&clock HI3620_TIMER2_MUX>;
+                       clock-names = "timer0clk", "timer1clk", "apb_pclk";
                        status = "disabled";
                };
 
@@ -131,8 +135,10 @@
                        reg = <0xa01000 0x1000>;
                        /* timer20 & timer21 */
                        interrupts = <0 4 4>, <0 5 4>;
-                       clocks = <&clock HI3620_TIMER4_MUX>, <&clock HI3620_TIMER5_MUX>;
-                       clock-names = "apb_pclk";
+                       clocks = <&clock HI3620_TIMER4_MUX>,
+                                <&clock HI3620_TIMER5_MUX>,
+                                <&clock HI3620_TIMER4_MUX>;
+                       clock-names = "timer0lck", "timer1clk", "apb_pclk";
                        status = "disabled";
                };
 
@@ -141,8 +147,10 @@
                        reg = <0xa02000 0x1000>;
                        /* timer30 & timer31 */
                        interrupts = <0 6 4>, <0 7 4>;
-                       clocks = <&clock HI3620_TIMER6_MUX>, <&clock HI3620_TIMER7_MUX>;
-                       clock-names = "apb_pclk";
+                       clocks = <&clock HI3620_TIMER6_MUX>,
+                                <&clock HI3620_TIMER7_MUX>,
+                                <&clock HI3620_TIMER6_MUX>;
+                       clock-names = "timer0clk", "timer1clk", "apb_pclk";
                        status = "disabled";
                };
 
@@ -151,8 +159,10 @@
                        reg = <0xa03000 0x1000>;
                        /* timer40 & timer41 */
                        interrupts = <0 96 4>, <0 97 4>;
-                       clocks = <&clock HI3620_TIMER8_MUX>, <&clock HI3620_TIMER9_MUX>;
-                       clock-names = "apb_pclk";
+                       clocks = <&clock HI3620_TIMER8_MUX>,
+                                <&clock HI3620_TIMER9_MUX>,
+                                <&clock HI3620_TIMER8_MUX>;
+                       clock-names = "timer0clk", "timer1clk", "apb_pclk";
                        status = "disabled";
                };
 
@@ -162,48 +172,48 @@
                        interrupts = <1 13 0xf01>;
                };
 
-               uart0: uart@b00000 {
+               uart0: serial@b00000 {
                        compatible = "arm,pl011", "arm,primecell";
                        reg = <0xb00000 0x1000>;
                        interrupts = <0 20 4>;
-                       clocks = <&clock HI3620_UARTCLK0>;
-                       clock-names = "apb_pclk";
+                       clocks = <&clock HI3620_UARTCLK0>, <&clock HI3620_UARTCLK0>;
+                       clock-names = "uartclk", "apb_pclk";
                        status = "disabled";
                };
 
-               uart1: uart@b01000 {
+               uart1: serial@b01000 {
                        compatible = "arm,pl011", "arm,primecell";
                        reg = <0xb01000 0x1000>;
                        interrupts = <0 21 4>;
-                       clocks = <&clock HI3620_UARTCLK1>;
-                       clock-names = "apb_pclk";
+                       clocks = <&clock HI3620_UARTCLK1>, <&clock HI3620_UARTCLK1>;
+                       clock-names = "uartclk", "apb_pclk";
                        status = "disabled";
                };
 
-               uart2: uart@b02000 {
+               uart2: serial@b02000 {
                        compatible = "arm,pl011", "arm,primecell";
                        reg = <0xb02000 0x1000>;
                        interrupts = <0 22 4>;
-                       clocks = <&clock HI3620_UARTCLK2>;
-                       clock-names = "apb_pclk";
+                       clocks = <&clock HI3620_UARTCLK2>, <&clock HI3620_UARTCLK2>;
+                       clock-names = "uartclk", "apb_pclk";
                        status = "disabled";
                };
 
-               uart3: uart@b03000 {
+               uart3: serial@b03000 {
                        compatible = "arm,pl011", "arm,primecell";
                        reg = <0xb03000 0x1000>;
                        interrupts = <0 23 4>;
-                       clocks = <&clock HI3620_UARTCLK3>;
-                       clock-names = "apb_pclk";
+                       clocks = <&clock HI3620_UARTCLK3>, <&clock HI3620_UARTCLK3>;
+                       clock-names = "uartclk", "apb_pclk";
                        status = "disabled";
                };
 
-               uart4: uart@b04000 {
+               uart4: serial@b04000 {
                        compatible = "arm,pl011", "arm,primecell";
                        reg = <0xb04000 0x1000>;
                        interrupts = <0 24 4>;
-                       clocks = <&clock HI3620_UARTCLK4>;
-                       clock-names = "apb_pclk";
+                       clocks = <&clock HI3620_UARTCLK4>, <&clock HI3620_UARTCLK4>;
+                       clock-names = "uartclk", "apb_pclk";
                        status = "disabled";
                };