Merge tag 'timers-urgent-2020-12-27' of git://git.kernel.org/pub/scm/linux/kernel...

[linux-2.6-microblaze.git] / arch / arm / boot / dts / exynos5422-odroid-core.dtsi

diff --git a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi
index afe0905..d0df560 100644 (file)
--- a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi
+++ b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi
@@ -35,7 +35,7 @@
                };
        };
 
-       bus_wcore_opp_table: opp_table2 {
+       bus_wcore_opp_table: opp-table2 {
                compatible = "operating-points-v2";
 
                /* derived from 532MHz MPLL */
@@ -61,7 +61,7 @@
                };
        };
 
-       bus_noc_opp_table: opp_table3 {
+       bus_noc_opp_table: opp-table3 {
                compatible = "operating-points-v2";
 
                /* derived from 666MHz CPLL */
@@ -79,7 +79,7 @@
                };
        };
 
-       bus_fsys_apb_opp_table: opp_table4 {
+       bus_fsys_apb_opp_table: opp-table4 {
                compatible = "operating-points-v2";
 
                /* derived from 666MHz CPLL */
@@ -91,7 +91,7 @@
                };
        };
 
-       bus_fsys2_opp_table: opp_table5 {
+       bus_fsys2_opp_table: opp-table5 {
                compatible = "operating-points-v2";
 
                /* derived from 600MHz DPLL */
@@ -106,7 +106,7 @@
                };
        };
 
-       bus_mfc_opp_table: opp_table6 {
+       bus_mfc_opp_table: opp-table6 {
                compatible = "operating-points-v2";
 
                /* derived from 666MHz CPLL */
@@ -127,7 +127,7 @@
                };
        };
 
-       bus_gen_opp_table: opp_table7 {
+       bus_gen_opp_table: opp-table7 {
                compatible = "operating-points-v2";
 
                /* derived from 532MHz MPLL */
@@ -145,7 +145,7 @@
                };
        };
 
-       bus_peri_opp_table: opp_table8 {
+       bus_peri_opp_table: opp-table8 {
                compatible = "operating-points-v2";
 
                /* derived from 666MHz CPLL */
@@ -154,7 +154,7 @@
                };
        };
 
-       bus_g2d_opp_table: opp_table9 {
+       bus_g2d_opp_table: opp-table9 {
                compatible = "operating-points-v2";
 
                /* derived from 666MHz CPLL */
@@ -175,7 +175,7 @@
                };
        };
 
-       bus_g2d_acp_opp_table: opp_table10 {
+       bus_g2d_acp_opp_table: opp-table10 {
                compatible = "operating-points-v2";
 
                /* derived from 532MHz MPLL */
@@ -193,7 +193,7 @@
                };
        };
 
-       bus_jpeg_opp_table: opp_table11 {
+       bus_jpeg_opp_table: opp-table11 {
                compatible = "operating-points-v2";
 
                /* derived from 600MHz DPLL */
@@ -211,7 +211,7 @@
                };
        };
 
-       bus_jpeg_apb_opp_table: opp_table12 {
+       bus_jpeg_apb_opp_table: opp-table12 {
                compatible = "operating-points-v2";
 
                /* derived from 666MHz CPLL */
@@ -229,7 +229,7 @@
                };
        };
 
-       bus_disp1_fimd_opp_table: opp_table13 {
+       bus_disp1_fimd_opp_table: opp-table13 {
                compatible = "operating-points-v2";
 
                /* derived from 600MHz DPLL */
@@ -241,7 +241,7 @@
                };
        };
 
-       bus_disp1_opp_table: opp_table14 {
+       bus_disp1_opp_table: opp-table14 {
                compatible = "operating-points-v2";
 
                /* derived from 600MHz DPLL */
@@ -256,7 +256,7 @@
                };
        };
 
-       bus_gscl_opp_table: opp_table15 {
+       bus_gscl_opp_table: opp-table15 {
                compatible = "operating-points-v2";
 
                /* derived from 600MHz DPLL */
@@ -271,7 +271,7 @@
                };
        };
 
-       bus_mscl_opp_table: opp_table16 {
+       bus_mscl_opp_table: opp-table16 {
                compatible = "operating-points-v2";
 
                /* derived from 666MHz CPLL */
@@ -292,7 +292,7 @@
                };
        };
 
-       dmc_opp_table: opp_table17 {
+       dmc_opp_table: opp-table17 {
                compatible = "operating-points-v2";
 
                opp00 {
@@ -333,8 +333,8 @@
                compatible      = "samsung,K3QF2F20DB", "jedec,lpddr3";
                density         = <16384>;
                io-width        = <32>;
-               #address-cells  = <1>;
-               #size-cells     = <0>;
+               #address-cells  = <1>;
+               #size-cells     = <0>;
 
                tRFC-min-tck            = <17>;
                tRRD-min-tck            = <2>;
@@ -503,7 +503,7 @@
 &hsi2c_4 {
        status = "okay";
 
-       s2mps11_pmic@66 {
+       pmic@66 {
                compatible = "samsung,s2mps11-pmic";
                reg = <0x66>;
                samsung,s2mps11-acokb-ground;