Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

[linux-2.6-microblaze.git] / arch / arm / Kconfig

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 1d50861..33b0057 100644 (file)
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -4,6 +4,7 @@ config ARM
        default y
        select ARCH_32BIT_OFF_T
        select ARCH_CLOCKSOURCE_DATA
+       select ARCH_HAS_BINFMT_FLAT
        select ARCH_HAS_DEBUG_VIRTUAL if MMU
        select ARCH_HAS_DEVMEM_IS_ALLOWED
        select ARCH_HAS_ELF_RANDOMIZE
@@ -30,6 +31,7 @@ config ARM
        select ARCH_USE_BUILTIN_BSWAP
        select ARCH_USE_CMPXCHG_LOCKREF
        select ARCH_WANT_IPC_PARSE_VERSION
+       select BINFMT_FLAT_ARGVP_ENVP_ON_STACK
        select BUILDTIME_EXTABLE_SORT if MMU
        select CLONE_BACKWARDS
        select CPU_PM if SUSPEND || CPU_IDLE
@@ -73,6 +75,7 @@ config ARM
        select HAVE_DYNAMIC_FTRACE_WITH_REGS if HAVE_DYNAMIC_FTRACE
        select HAVE_EFFICIENT_UNALIGNED_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && MMU
        select HAVE_EXIT_THREAD
+       select HAVE_FAST_GUP if ARM_LPAE
        select HAVE_FTRACE_MCOUNT_RECORD if !XIP_KERNEL
        select HAVE_FUNCTION_GRAPH_TRACER if !THUMB2_KERNEL && !CC_IS_CLANG
        select HAVE_FUNCTION_TRACER if !XIP_KERNEL
@@ -1165,6 +1168,14 @@ config ARM_ERRATA_825619
          DMB NSHST or DMB ISHST instruction followed by a mix of Cacheable
          and Device/Strongly-Ordered loads and stores might cause deadlock
 
+config ARM_ERRATA_857271
+       bool "ARM errata: A12: CPU might deadlock under some very rare internal conditions"
+       depends on CPU_V7
+       help
+         This option enables the workaround for the 857271 Cortex-A12
+         (all revs) erratum. Under very rare timing conditions, the CPU might
+         hang. The workaround is expected to have a < 1% performance impact.
+
 config ARM_ERRATA_852421
        bool "ARM errata: A17: DMB ST might fail to create order between stores"
        depends on CPU_V7
@@ -1186,6 +1197,16 @@ config ARM_ERRATA_852423
          config option from the A12 erratum due to the way errata are checked
          for and handled.
 
+config ARM_ERRATA_857272
+       bool "ARM errata: A17: CPU might deadlock under some very rare internal conditions"
+       depends on CPU_V7
+       help
+         This option enables the workaround for the 857272 Cortex-A17 erratum.
+         This erratum is not known to be fixed in any A17 revision.
+         This is identical to Cortex-A12 erratum 857271.  It is a separate
+         config option from the A12 erratum due to the way errata are checked
+         for and handled.
+
 endmenu
 
 source "arch/arm/common/Kconfig"
@@ -1222,6 +1243,18 @@ config PCI_HOST_ITE8152
        default y
        select DMABOUNCE
 
+config ARM_ERRATA_814220
+       bool "ARM errata: Cache maintenance by set/way operations can execute out of order"
+       depends on CPU_V7
+       help
+         The v7 ARM states that all cache and branch predictor maintenance
+         operations that do not specify an address execute, relative to
+         each other, in program order.
+         However, because of this erratum, an L2 set/way cache maintenance
+         operation can overtake an L1 set/way cache maintenance operation.
+         This ERRATA only affected the Cortex-A7 and present in r0p2, r0p3,
+         r0p4, r0p5.
+
 endmenu
 
 menu "Kernel Features"
@@ -1253,8 +1286,8 @@ config SMP
          uniprocessor machines. On a uniprocessor machine, the kernel
          will run faster if you say N here.
 
-         See also <file:Documentation/x86/i386/IO-APIC.txt>,
-         <file:Documentation/lockup-watchdogs.txt> and the SMP-HOWTO available at
+         See also <file:Documentation/x86/i386/IO-APIC.rst>,
+         <file:Documentation/admin-guide/lockup-watchdogs.rst> and the SMP-HOWTO available at
          <http://tldp.org/HOWTO/SMP-HOWTO.html>.
 
          If you don't know what to do here, say N.
@@ -1580,16 +1613,9 @@ config ARCH_SPARSEMEM_ENABLE
 config ARCH_SPARSEMEM_DEFAULT
        def_bool ARCH_SPARSEMEM_ENABLE
 
-config ARCH_SELECT_MEMORY_MODEL
-       def_bool ARCH_SPARSEMEM_ENABLE
-
 config HAVE_ARCH_PFN_VALID
        def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
 
-config HAVE_GENERIC_GUP
-       def_bool y
-       depends on ARM_LPAE
-
 config HIGHMEM
        bool "High Memory Support"
        depends on MMU
@@ -2000,7 +2026,7 @@ config CRASH_DUMP
          kdump/kexec. The crash dump kernel must be compiled to a
          memory address not used by the main kernel
 
-         For more details see Documentation/kdump/kdump.txt
+         For more details see Documentation/admin-guide/kdump/kdump.rst
 
 config AUTO_ZRELADDR
        bool "Auto calculation of the decompressed kernel image address"
@@ -2106,7 +2132,7 @@ config VFP
          Say Y to include VFP support code in the kernel. This is needed
          if your hardware includes a VFP unit.
 
-         Please see <file:Documentation/arm/VFP/release-notes.txt> for
+         Please see <file:Documentation/arm/vfp/release-notes.rst> for
          release notes and additional status information.
 
          Say N if your target does not have VFP hardware.