ARC: mm: use SCRATCH_DATA0 register for caching pgdir in ARCv2 only

[linux-2.6-microblaze.git] / arch / arc / mm / tlbex.S

diff --git a/arch/arc/mm/tlbex.S b/arch/arc/mm/tlbex.S
index 062fae4..bcd2909 100644 (file)
--- a/arch/arc/mm/tlbex.S
+++ b/arch/arc/mm/tlbex.S
@@ -39,7 +39,6 @@
 #include <asm/arcregs.h>
 #include <asm/cache.h>
 #include <asm/processor.h>
-#include <asm/tlb-mmu1.h>
 
 #ifdef CONFIG_ISA_ARCOMPACT
 ;-----------------------------------------------------------------
@@ -203,7 +202,7 @@ ex_saved_reg1:
 
        lr  r2, [efa]
 
-#ifdef ARC_USE_SCRATCH_REG
+#ifdef CONFIG_ISA_ARCV2
        lr  r1, [ARC_REG_SCRATCH_DATA0] ; current pgd
 #else
        GET_CURR_TASK_ON_CPU  r1
@@ -279,7 +278,7 @@ ex_saved_reg1:
 ; Commit the TLB entry into MMU
 
 .macro COMMIT_ENTRY_TO_MMU
-#if (CONFIG_ARC_MMU_VER < 4)
+#ifdef CONFIG_ARC_MMU_V3
 
        /* Get free TLB slot: Set = computed from vaddr, way = random */
        sr  TLBGetIndex, [ARC_REG_TLBCOMMAND]
@@ -375,13 +374,6 @@ ENTRY(EV_TLBMissD)
 
        CONV_PTE_TO_TLB
 
-#if (CONFIG_ARC_MMU_VER == 1)
-       ; MMU with 2 way set assoc J-TLB, needs some help in pathetic case of
-       ; memcpy where 3 parties contend for 2 ways, ensuing a livelock.
-       ; But only for old MMU or one with Metal Fix
-       TLB_WRITE_HEURISTICS
-#endif
-
        COMMIT_ENTRY_TO_MMU
        TLBMISS_RESTORE_REGS
 EV_TLBMissD_fast_ret:  ; additional label for VDK OS-kit instrumentation