ARC: mm: move MMU specific bits out of entry code ...

[linux-2.6-microblaze.git] / arch / arc / include / asm / mmu.h

diff --git a/arch/arc/include/asm/mmu.h b/arch/arc/include/asm/mmu.h
index 38a0365..e66e1e4 100644 (file)
--- a/arch/arc/include/asm/mmu.h
+++ b/arch/arc/include/asm/mmu.h
@@ -64,9 +64,18 @@ typedef struct {
        unsigned long asid[NR_CPUS];    /* 8 bit MMU PID + Generation cycle */
 } mm_context_t;
 
-void arc_mmu_init(void);
-extern char *arc_mmu_mumbojumbo(int cpu_id, char *buf, int len);
-void read_decode_mmu_bcr(void);
+static inline void mmu_setup_asid(struct mm_struct *mm, unsigned int asid)
+{
+       write_aux_reg(ARC_REG_PID, asid | MMU_ENABLE);
+}
+
+static inline void mmu_setup_pgd(struct mm_struct *mm, void *pgd)
+{
+       /* PGD cached in MMU reg to avoid 3 mem lookups: task->mm->pgd */
+#ifdef CONFIG_ISA_ARCV2
+       write_aux_reg(ARC_REG_SCRATCH_DATA0, (unsigned int)pgd);
+#endif
+}
 
 static inline int is_pae40_enabled(void)
 {
@@ -75,6 +84,14 @@ static inline int is_pae40_enabled(void)
 
 extern int pae40_exist_but_not_enab(void);
 
+#else
+
+.macro ARC_MMU_REENABLE reg
+       lr \reg, [ARC_REG_PID]
+       or \reg, \reg, MMU_ENABLE
+       sr \reg, [ARC_REG_PID]
+.endm
+
 #endif /* !__ASSEMBLY__ */
 
 #endif