Merge tag 'for-linus-5.15-1' of git://github.com/cminyard/linux-ipmi

[linux-2.6-microblaze.git] / arch / arc / include / asm / cmpxchg.h

diff --git a/arch/arc/include/asm/cmpxchg.h b/arch/arc/include/asm/cmpxchg.h
index 00deb07..c5b544a 100644 (file)
--- a/arch/arc/include/asm/cmpxchg.h
+++ b/arch/arc/include/asm/cmpxchg.h
@@ -38,7 +38,7 @@
        _prev;                                                          \
 })
 
-#define arch_cmpxchg(ptr, old, new)                                    \
+#define arch_cmpxchg_relaxed(ptr, old, new)                            \
 ({                                                                     \
        __typeof__(ptr) _p_ = (ptr);                                    \
        __typeof__(*(ptr)) _o_ = (old);                                 \
@@ -47,12 +47,7 @@
                                                                        \
        switch(sizeof((_p_))) {                                         \
        case 4:                                                         \
-               /*                                                      \
-                * Explicit full memory barrier needed before/after     \
-                */                                                     \
-               smp_mb();                                               \
                _prev_ = __cmpxchg(_p_, _o_, _n_);                      \
-               smp_mb();                                               \
                break;                                                  \
        default:                                                        \
                BUILD_BUG();                                            \
@@ -85,14 +80,6 @@
 
 #endif
 
-/*
- * atomic_cmpxchg is same as cmpxchg
- *   LLSC: only different in data-type, semantics are exactly same
- *  !LLSC: cmpxchg() has to use an external lock atomic_ops_lock to guarantee
- *         semantics, and this lock also happens to be used by atomic_*()
- */
-#define arch_atomic_cmpxchg(v, o, n) ((int)arch_cmpxchg(&((v)->counter), (o), (n)))
-
 /*
  * xchg
  */
@@ -108,16 +95,14 @@
        _val_;          /* get old value */                             \
 })
 
-#define arch_xchg(ptr, val)                                            \
+#define arch_xchg_relaxed(ptr, val)                                    \
 ({                                                                     \
        __typeof__(ptr) _p_ = (ptr);                                    \
        __typeof__(*(ptr)) _val_ = (val);                               \
                                                                        \
        switch(sizeof(*(_p_))) {                                        \
        case 4:                                                         \
-               smp_mb();                                               \
                _val_ = __xchg(_p_, _val_);                             \
-               smp_mb();                                               \
                break;                                                  \
        default:                                                        \
                BUILD_BUG();                                            \
@@ -155,19 +140,4 @@
 
 #endif
 
-/*
- * "atomic" variant of xchg()
- * REQ: It needs to follow the same serialization rules as other atomic_xxx()
- * Since xchg() doesn't always do that, it would seem that following definition
- * is incorrect. But here's the rationale:
- *   SMP : Even xchg() takes the atomic_ops_lock, so OK.
- *   LLSC: atomic_ops_lock are not relevant at all (even if SMP, since LLSC
- *         is natively "SMP safe", no serialization required).
- *   UP  : other atomics disable IRQ, so no way a difft ctxt atomic_xchg()
- *         could clobber them. atomic_xchg() itself would be 1 insn, so it
- *         can't be clobbered by others. Thus no serialization required when
- *         atomic_xchg is involved.
- */
-#define arch_atomic_xchg(v, new) (arch_xchg(&((v)->counter), new))
-
 #endif