arc: include/asm: fix typos of "themselves"

[linux-2.6-microblaze.git] / arch / arc / include / asm / cmpxchg.h

diff --git a/arch/arc/include/asm/cmpxchg.h b/arch/arc/include/asm/cmpxchg.h
index c113981..9b87e16 100644 (file)
--- a/arch/arc/include/asm/cmpxchg.h
+++ b/arch/arc/include/asm/cmpxchg.h
@@ -20,7 +20,7 @@ __cmpxchg(volatile void *ptr, unsigned long expected, unsigned long new)
 
        /*
         * Explicit full memory barrier needed before/after as
-        * LLOCK/SCOND thmeselves don't provide any such semantics
+        * LLOCK/SCOND themselves don't provide any such semantics
         */
        smp_mb();
 
@@ -41,7 +41,7 @@ __cmpxchg(volatile void *ptr, unsigned long expected, unsigned long new)
        return prev;
 }
 
-#elif !defined(CONFIG_ARC_PLAT_EZNPS)
+#else /* !CONFIG_ARC_HAS_LLSC */
 
 static inline unsigned long
 __cmpxchg(volatile void *ptr, unsigned long expected, unsigned long new)
@@ -61,33 +61,7 @@ __cmpxchg(volatile void *ptr, unsigned long expected, unsigned long new)
        return prev;
 }
 
-#else /* CONFIG_ARC_PLAT_EZNPS */
-
-static inline unsigned long
-__cmpxchg(volatile void *ptr, unsigned long expected, unsigned long new)
-{
-       /*
-        * Explicit full memory barrier needed before/after
-        */
-       smp_mb();
-
-       write_aux_reg(CTOP_AUX_GPA1, expected);
-
-       __asm__ __volatile__(
-       "       mov r2, %0\n"
-       "       mov r3, %1\n"
-       "       .word %2\n"
-       "       mov %0, r2"
-       : "+r"(new)
-       : "r"(ptr), "i"(CTOP_INST_EXC_DI_R2_R2_R3)
-       : "r2", "r3", "memory");
-
-       smp_mb();
-
-       return new;
-}
-
-#endif /* CONFIG_ARC_HAS_LLSC */
+#endif
 
 #define cmpxchg(ptr, o, n) ({                          \
        (typeof(*(ptr)))__cmpxchg((ptr),                \
@@ -104,8 +78,6 @@ __cmpxchg(volatile void *ptr, unsigned long expected, unsigned long new)
 #define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n)))
 
 
-#ifndef CONFIG_ARC_PLAT_EZNPS
-
 /*
  * xchg (reg with memory) based on "Native atomic" EX insn
  */
@@ -168,44 +140,6 @@ static inline unsigned long __xchg(unsigned long val, volatile void *ptr,
 
 #endif
 
-#else /* CONFIG_ARC_PLAT_EZNPS */
-
-static inline unsigned long __xchg(unsigned long val, volatile void *ptr,
-                                  int size)
-{
-       extern unsigned long __xchg_bad_pointer(void);
-
-       switch (size) {
-       case 4:
-               /*
-                * Explicit full memory barrier needed before/after
-                */
-               smp_mb();
-
-               __asm__ __volatile__(
-               "       mov r2, %0\n"
-               "       mov r3, %1\n"
-               "       .word %2\n"
-               "       mov %0, r2\n"
-               : "+r"(val)
-               : "r"(ptr), "i"(CTOP_INST_XEX_DI_R2_R2_R3)
-               : "r2", "r3", "memory");
-
-               smp_mb();
-
-               return val;
-       }
-       return __xchg_bad_pointer();
-}
-
-#define xchg(ptr, with) ({                             \
-       (typeof(*(ptr)))__xchg((unsigned long)(with),   \
-                              (ptr),                   \
-                              sizeof(*(ptr)));         \
-})
-
-#endif /* CONFIG_ARC_PLAT_EZNPS */
-
 /*
  * "atomic" variant of xchg()
  * REQ: It needs to follow the same serialization rules as other atomic_xxx()