ntb: intel: add Intel NTB LTR vendor support for gen4 NTB

[linux-2.6-microblaze.git] / Documentation / devicetree / bindings / net / can / fsl-flexcan.txt

diff --git a/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt b/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt
index 94c0f8b..e10b6eb 100644 (file)
--- a/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt
+++ b/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt
@@ -4,6 +4,12 @@ Required properties:
 
 - compatible : Should be "fsl,<processor>-flexcan"
 
+  where <processor> is imx8qm, imx6q, imx28, imx53, imx35, imx25, p1010,
+  vf610, ls1021ar2, lx2160ar1, ls1028ar1.
+
+  The ls1028ar1 must be followed by lx2160ar1, e.g.
+   - "fsl,ls1028ar1-flexcan", "fsl,lx2160ar1-flexcan"
+
   An implementation should also claim any of the following compatibles
   that it is fully backwards compatible with:
 
@@ -25,12 +31,10 @@ Optional properties:
               endian.
 
 - fsl,stop-mode: register bits of stop mode control, the format is
-                <&gpr req_gpr req_bit ack_gpr ack_bit>.
+                <&gpr req_gpr req_bit>.
                 gpr is the phandle to general purpose register node.
                 req_gpr is the gpr register offset of CAN stop request.
                 req_bit is the bit offset of CAN stop request.
-                ack_gpr is the gpr register offset of CAN stop acknowledge.
-                ack_bit is the bit offset of CAN stop acknowledge.
 
 - fsl,clk-source: Select the clock source to the CAN Protocol Engine (PE).
                  It's SoC Implementation dependent. Refer to RM for detailed