6 perf-intel-pt - Support for Intel Processor Trace within perf tools
11 'perf record' -e intel_pt//
16 Intel Processor Trace (Intel PT) is an extension of Intel Architecture that
17 collects information about software execution such as control flow, execution
18 modes and timings and formats it into highly compressed binary packets.
19 Technical details are documented in the Intel 64 and IA-32 Architectures
20 Software Developer Manuals, Chapter 36 Intel Processor Trace.
22 Intel PT is first supported in Intel Core M and 5th generation Intel Core
23 processors that are based on the Intel micro-architecture code name Broadwell.
25 Trace data is collected by 'perf record' and stored within the perf.data file.
26 See below for options to 'perf record'.
28 Trace data must be 'decoded' which involves walking the object code and matching
29 the trace data packets. For example a TNT packet only tells whether a
30 conditional branch was taken or not taken, so to make use of that packet the
31 decoder must know precisely which instruction was being executed.
33 Decoding is done on-the-fly. The decoder outputs samples in the same format as
34 samples output by perf hardware events, for example as though the "instructions"
35 or "branches" events had been recorded. Presently 3 tools support this:
36 'perf script', 'perf report' and 'perf inject'. See below for more information
39 The main distinguishing feature of Intel PT is that the decoder can determine
40 the exact flow of software execution. Intel PT can be used to understand why
41 and how did software get to a certain point, or behave a certain way. The
42 software does not have to be recompiled, so Intel PT works with debug or release
43 builds, however the executed images are needed - which makes use in JIT-compiled
44 environments, or with self-modified code, a challenge. Also symbols need to be
45 provided to make sense of addresses.
47 A limitation of Intel PT is that it produces huge amounts of trace data
48 (hundreds of megabytes per second per core) which takes a long time to decode,
49 for example two or three orders of magnitude longer than it took to collect.
50 Another limitation is the performance impact of tracing, something that will
51 vary depending on the use-case and architecture.
57 It is important to start small. That is because it is easy to capture vastly
58 more data than can possibly be processed.
60 The simplest thing to do with Intel PT is userspace profiling of small programs.
61 Data is captured with 'perf record' e.g. to trace 'ls' userspace-only:
63 perf record -e intel_pt//u ls
65 And profiled with 'perf report' e.g.
69 To also trace kernel space presents a problem, namely kernel self-modifying
70 code. A fairly good kernel image is available in /proc/kcore but to get an
71 accurate image a copy of /proc/kcore needs to be made under the same conditions
72 as the data capture. 'perf record' can make a copy of /proc/kcore if the option
73 --kcore is used, but access to /proc/kcore is restricted e.g.
75 sudo perf record -o pt_ls --kcore -e intel_pt// -- ls
77 which will create a directory named 'pt_ls' and put the perf.data file (named
78 simply 'data') and copies of /proc/kcore, /proc/kallsyms and /proc/modules into
79 it. The other tools understand the directory format, so to use 'perf report'
82 sudo perf report -i pt_ls
84 Because samples are synthesized after-the-fact, the sampling period can be
85 selected for reporting. e.g. sample every microsecond
87 sudo perf report pt_ls --itrace=i1usge
89 See the sections below for more information about the --itrace option.
91 Beware the smaller the period, the more samples that are produced, and the
92 longer it takes to process them.
94 Also note that the coarseness of Intel PT timing information will start to
95 distort the statistical value of the sampling as the sampling period becomes
98 To represent software control flow, "branches" samples are produced. By default
99 a branch sample is synthesized for every single branch. To get an idea what
100 data is available you can use the 'perf script' tool with all itrace sampling
101 options, which will list all the samples.
103 perf record -e intel_pt//u ls
104 perf script --itrace=ibxwpe
106 An interesting field that is not printed by default is 'flags' which can be
107 displayed as follows:
109 perf script --itrace=ibxwpe -F+flags
111 The flags are "bcrosyiABExgh" which stand for branch, call, return, conditional,
112 system, asynchronous, interrupt, transaction abort, trace begin, trace end,
113 in transaction, VM-entry, and VM-exit respectively.
115 perf script also supports higher level ways to dump instruction traces:
117 perf script --insn-trace --xed
119 Dump all instructions. This requires installing the xed tool (see XED below)
120 Dumping all instructions in a long trace can be fairly slow. It is usually better
121 to start with higher level decoding, like
123 perf script --call-trace
127 perf script --call-ret-trace
129 and then select a time range of interest. The time range can then be examined
132 perf script --time starttime,stoptime --insn-trace --xed
134 While examining the trace it's also useful to filter on specific CPUs using
137 perf script --time starttime,stoptime --insn-trace --xed -C 1
139 Dump all instructions in time range on CPU 1.
141 Another interesting field that is not printed by default is 'ipc' which can be
142 displayed as follows:
144 perf script --itrace=be -F+ipc
146 There are two ways that instructions-per-cycle (IPC) can be calculated depending
149 If the 'cyc' config term (see config terms section below) was used, then IPC is
150 calculated using the cycle count from CYC packets, otherwise MTC packets are
151 used - refer to the 'mtc' config term. When MTC is used, however, the values
152 are less accurate because the timing is less accurate.
154 Because Intel PT does not update the cycle count on every branch or instruction,
155 the values will often be zero. When there are values, they will be the number
156 of instructions and number of cycles since the last update, and thus represent
157 the average IPC since the last IPC for that event type. Note IPC for "branches"
158 events is calculated separately from IPC for "instructions" events.
160 Also note that the IPC instruction count may or may not include the current
161 instruction. If the cycle count is associated with an asynchronous branch
162 (e.g. page fault or interrupt), then the instruction count does not include the
163 current instruction, otherwise it does. That is consistent with whether or not
164 that instruction has retired when the cycle count is updated.
166 Another note, in the case of "branches" events, non-taken branches are not
167 presently sampled, so IPC values for them do not appear e.g. a CYC packet with a
168 TNT packet that starts with a non-taken branch. To see every possible IPC
169 value, "instructions" events can be used e.g. --itrace=i0ns
171 While it is possible to create scripts to analyze the data, an alternative
172 approach is available to export the data to a sqlite or postgresql database.
173 Refer to script export-to-sqlite.py or export-to-postgresql.py for more details,
174 and to script exported-sql-viewer.py for an example of using the database.
176 There is also script intel-pt-events.py which provides an example of how to
177 unpack the raw data for power events and PTWRITE. The script also displays
178 branches, and supports 2 additional modes selected by option:
180 --insn-trace - instruction trace
181 --src-trace - source trace
183 As mentioned above, it is easy to capture too much data. One way to limit the
184 data captured is to use 'snapshot' mode which is explained further below.
185 Refer to 'new snapshot option' and 'Intel PT modes of operation' further below.
187 Another problem that will be experienced is decoder errors. They can be caused
188 by inability to access the executed image, self-modified or JIT-ed code, or the
189 inability to match side-band information (such as context switches and mmaps)
190 which results in the decoder not knowing what code was executed.
192 There is also the problem of perf not being able to copy the data fast enough,
193 resulting in data lost because the buffer was full. See 'Buffer handling' below
203 The Intel PT kernel driver creates a new PMU for Intel PT. PMU events are
204 selected by providing the PMU name followed by the "config" separated by slashes.
205 An enhancement has been made to allow default "config" e.g. the option
209 will use a default config value. Currently that is the same as
211 -e intel_pt/tsc,noretcomp=0/
215 -e intel_pt/tsc=1,noretcomp=0/
217 Note there are now new config terms - see section 'config terms' further below.
219 The config terms are listed in /sys/devices/intel_pt/format. They are bit
220 fields within the config member of the struct perf_event_attr which is
221 passed to the kernel by the perf_event_open system call. They correspond to bit
222 fields in the IA32_RTIT_CTL MSR. Here is a list of them and their definitions:
224 $ grep -H . /sys/bus/event_source/devices/intel_pt/format/*
225 /sys/bus/event_source/devices/intel_pt/format/cyc:config:1
226 /sys/bus/event_source/devices/intel_pt/format/cyc_thresh:config:19-22
227 /sys/bus/event_source/devices/intel_pt/format/mtc:config:9
228 /sys/bus/event_source/devices/intel_pt/format/mtc_period:config:14-17
229 /sys/bus/event_source/devices/intel_pt/format/noretcomp:config:11
230 /sys/bus/event_source/devices/intel_pt/format/psb_period:config:24-27
231 /sys/bus/event_source/devices/intel_pt/format/tsc:config:10
233 Note that the default config must be overridden for each term i.e.
235 -e intel_pt/noretcomp=0/
239 -e intel_pt/tsc=1,noretcomp=0/
241 So, to disable TSC packets use:
245 It is also possible to specify the config value explicitly:
247 -e intel_pt/config=0x400/
249 Note that, as with all events, the event is suffixed with event modifiers:
258 'h', 'G' and 'H' are for virtualization which is not supported by Intel PT.
259 'p' is also not relevant to Intel PT. So only options 'u' and 'k' are
260 meaningful for Intel PT.
262 perf_event_attr is displayed if the -vv option is used e.g.
264 ------------------------------------------------------------
269 { sample_period, sample_freq } 1
270 sample_type IP|TID|TIME|CPU|IDENTIFIER
278 ------------------------------------------------------------
279 sys_perf_event_open: pid 31104 cpu 0 group_fd -1 flags 0x8
280 sys_perf_event_open: pid 31104 cpu 1 group_fd -1 flags 0x8
281 sys_perf_event_open: pid 31104 cpu 2 group_fd -1 flags 0x8
282 sys_perf_event_open: pid 31104 cpu 3 group_fd -1 flags 0x8
283 ------------------------------------------------------------
289 The June 2015 version of Intel 64 and IA-32 Architectures Software Developer
290 Manuals, Chapter 36 Intel Processor Trace, defined new Intel PT features.
291 Some of the features are reflect in new config terms. All the config terms are
294 tsc Always supported. Produces TSC timestamp packets to provide
295 timing information. In some cases it is possible to decode
296 without timing information, for example a per-thread context
297 that does not overlap executable memory maps.
299 The default config selects tsc (i.e. tsc=1).
301 noretcomp Always supported. Disables "return compression" so a TIP packet
302 is produced when a function returns. Causes more packets to be
303 produced but might make decoding more reliable.
305 The default config does not select noretcomp (i.e. noretcomp=0).
307 psb_period Allows the frequency of PSB packets to be specified.
309 The PSB packet is a synchronization packet that provides a
310 starting point for decoding or recovery from errors.
312 Support for psb_period is indicated by:
314 /sys/bus/event_source/devices/intel_pt/caps/psb_cyc
316 which contains "1" if the feature is supported and "0"
319 Valid values are given by:
321 /sys/bus/event_source/devices/intel_pt/caps/psb_periods
323 which contains a hexadecimal value, the bits of which represent
324 valid values e.g. bit 2 set means value 2 is valid.
326 The psb_period value is converted to the approximate number of
327 trace bytes between PSB packets as:
331 e.g. value 3 means 16KiB bytes between PSBs
333 If an invalid value is entered, the error message
334 will give a list of valid values e.g.
336 $ perf record -e intel_pt/psb_period=15/u uname
337 Invalid psb_period for intel_pt. Valid values are: 0-5
339 If MTC packets are selected, the default config selects a value
340 of 3 (i.e. psb_period=3) or the nearest lower value that is
341 supported (0 is always supported). Otherwise the default is 0.
343 If decoding is expected to be reliable and the buffer is large
344 then a large PSB period can be used.
346 Because a TSC packet is produced with PSB, the PSB period can
347 also affect the granularity to timing information in the absence
350 mtc Produces MTC timing packets.
352 MTC packets provide finer grain timestamp information than TSC
353 packets. MTC packets record time using the hardware crystal
354 clock (CTC) which is related to TSC packets using a TMA packet.
356 Support for this feature is indicated by:
358 /sys/bus/event_source/devices/intel_pt/caps/mtc
360 which contains "1" if the feature is supported and
363 The frequency of MTC packets can also be specified - see
366 mtc_period Specifies how frequently MTC packets are produced - see mtc
367 above for how to determine if MTC packets are supported.
369 Valid values are given by:
371 /sys/bus/event_source/devices/intel_pt/caps/mtc_periods
373 which contains a hexadecimal value, the bits of which represent
374 valid values e.g. bit 2 set means value 2 is valid.
376 The mtc_period value is converted to the MTC frequency as:
378 CTC-frequency / (2 ^ value)
380 e.g. value 3 means one eighth of CTC-frequency
382 Where CTC is the hardware crystal clock, the frequency of which
383 can be related to TSC via values provided in cpuid leaf 0x15.
385 If an invalid value is entered, the error message
386 will give a list of valid values e.g.
388 $ perf record -e intel_pt/mtc_period=15/u uname
389 Invalid mtc_period for intel_pt. Valid values are: 0,3,6,9
391 The default value is 3 or the nearest lower value
392 that is supported (0 is always supported).
394 cyc Produces CYC timing packets.
396 CYC packets provide even finer grain timestamp information than
397 MTC and TSC packets. A CYC packet contains the number of CPU
398 cycles since the last CYC packet. Unlike MTC and TSC packets,
399 CYC packets are only sent when another packet is also sent.
401 Support for this feature is indicated by:
403 /sys/bus/event_source/devices/intel_pt/caps/psb_cyc
405 which contains "1" if the feature is supported and
408 The number of CYC packets produced can be reduced by specifying
409 a threshold - see cyc_thresh below.
411 cyc_thresh Specifies how frequently CYC packets are produced - see cyc
412 above for how to determine if CYC packets are supported.
414 Valid cyc_thresh values are given by:
416 /sys/bus/event_source/devices/intel_pt/caps/cycle_thresholds
418 which contains a hexadecimal value, the bits of which represent
419 valid values e.g. bit 2 set means value 2 is valid.
421 The cyc_thresh value represents the minimum number of CPU cycles
422 that must have passed before a CYC packet can be sent. The
423 number of CPU cycles is:
427 e.g. value 4 means 8 CPU cycles must pass before a CYC packet
428 can be sent. Note a CYC packet is still only sent when another
429 packet is sent, not at, e.g. every 8 CPU cycles.
431 If an invalid value is entered, the error message
432 will give a list of valid values e.g.
434 $ perf record -e intel_pt/cyc,cyc_thresh=15/u uname
435 Invalid cyc_thresh for intel_pt. Valid values are: 0-12
437 CYC packets are not requested by default.
439 pt Specifies pass-through which enables the 'branch' config term.
441 The default config selects 'pt' if it is available, so a user will
442 never need to specify this term.
444 branch Enable branch tracing. Branch tracing is enabled by default so to
445 disable branch tracing use 'branch=0'.
447 The default config selects 'branch' if it is available.
449 ptw Enable PTWRITE packets which are produced when a ptwrite instruction
452 Support for this feature is indicated by:
454 /sys/bus/event_source/devices/intel_pt/caps/ptwrite
456 which contains "1" if the feature is supported and
459 fup_on_ptw Enable a FUP packet to follow the PTWRITE packet. The FUP packet
460 provides the address of the ptwrite instruction. In the absence of
461 fup_on_ptw, the decoder will use the address of the previous branch
462 if branch tracing is enabled, otherwise the address will be zero.
463 Note that fup_on_ptw will work even when branch tracing is disabled.
465 pwr_evt Enable power events. The power events provide information about
466 changes to the CPU C-state.
468 Support for this feature is indicated by:
470 /sys/bus/event_source/devices/intel_pt/caps/power_event_trace
472 which contains "1" if the feature is supported and
476 AUX area sampling option
477 ~~~~~~~~~~~~~~~~~~~~~~~~
479 To select Intel PT "sampling" the AUX area sampling option can be used:
483 Optionally it can be followed by the sample size in bytes e.g.
487 In addition, the Intel PT event to sample must be defined e.g.
491 Samples on other events will be created containing Intel PT data e.g. the
492 following will create Intel PT samples on the branch-misses event, note the
493 events must be grouped using {}:
495 perf record --aux-sample -e '{intel_pt//u,branch-misses:u}'
497 An alternative to '--aux-sample' is to add the config term 'aux-sample-size' to
498 events. In this case, the grouping is implied e.g.
500 perf record -e intel_pt//u -e branch-misses/aux-sample-size=8192/u
504 perf record -e '{intel_pt//u,branch-misses/aux-sample-size=8192/u}'
506 but allows for also using an address filter e.g.:
508 perf record -e intel_pt//u --filter 'filter * @/bin/ls' -e branch-misses/aux-sample-size=8192/u -- ls
510 It is important to select a sample size that is big enough to contain at least
511 one PSB packet. If not a warning will be displayed:
513 Intel PT sample size (%zu) may be too small for PSB period (%zu)
515 The calculation used for that is: if sample_size <= psb_period + 256 display the
516 warning. When sampling is used, psb_period defaults to 0 (2KiB).
518 The default sample size is 4KiB.
520 The sample size is passed in aux_sample_size in struct perf_event_attr. The
521 sample size is limited by the maximum event size which is 64KiB. It is
522 difficult to know how big the event might be without the trace sample attached,
523 but the tool validates that the sample size is not greater than 60KiB.
529 The difference between full trace and snapshot from the kernel's perspective is
530 that in full trace we don't overwrite trace data that the user hasn't collected
531 yet (and indicated that by advancing aux_tail), whereas in snapshot mode we let
532 the trace run and overwrite older data in the buffer so that whenever something
533 interesting happens, we can stop it and grab a snapshot of what was going on
534 around that interesting moment.
536 To select snapshot mode a new option has been added:
540 Optionally it can be followed by the snapshot size e.g.
544 The default snapshot size is the auxtrace mmap size. If neither auxtrace mmap size
545 nor snapshot size is specified, then the default is 4MiB for privileged users
546 (or if /proc/sys/kernel/perf_event_paranoid < 0), 128KiB for unprivileged users.
547 If an unprivileged user does not specify mmap pages, the mmap pages will be
548 reduced as described in the 'new auxtrace mmap size option' section below.
550 The snapshot size is displayed if the option -vv is used e.g.
552 Intel PT snapshot size: %zu
555 new auxtrace mmap size option
556 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
558 Intel PT buffer size is specified by an addition to the -m option e.g.
562 selects a buffer size of 16 pages i.e. 64KiB.
564 Note that the existing functionality of -m is unchanged. The auxtrace mmap size
565 is specified by the optional addition of a comma and the value.
567 The default auxtrace mmap size for Intel PT is 4MiB/page_size for privileged users
568 (or if /proc/sys/kernel/perf_event_paranoid < 0), 128KiB for unprivileged users.
569 If an unprivileged user does not specify mmap pages, the mmap pages will be
570 reduced from the default 512KiB/page_size to 256KiB/page_size, otherwise the
571 user is likely to get an error as they exceed their mlock limit (Max locked
572 memory as shown in /proc/self/limits). Note that perf does not count the first
573 512KiB (actually /proc/sys/kernel/perf_event_mlock_kb minus 1 page) per cpu
574 against the mlock limit so an unprivileged user is allowed 512KiB per cpu plus
575 their mlock limit (which defaults to 64KiB but is not multiplied by the number
578 In full-trace mode, powers of two are allowed for buffer size, with a minimum
579 size of 2 pages. In snapshot mode or sampling mode, it is the same but the
580 minimum size is 1 page.
582 The mmap size and auxtrace mmap size are displayed if the -vv option is used e.g.
585 auxtrace mmap length 4198400
588 Intel PT modes of operation
589 ~~~~~~~~~~~~~~~~~~~~~~~~~~~
591 Intel PT can be used in 3 modes:
596 Full-trace mode traces continuously e.g.
598 perf record -e intel_pt//u uname
600 Sample mode attaches a Intel PT sample to other events e.g.
602 perf record --aux-sample -e intel_pt//u -e branch-misses:u
604 Snapshot mode captures the available data when a signal is sent or "snapshot"
605 control command is issued. e.g. using a signal
607 perf record -v -e intel_pt//u -S ./loopy 1000000000 &
610 Recording AUX area tracing snapshot
612 Note that the signal sent is SIGUSR2.
613 Note that "Recording AUX area tracing snapshot" is displayed because the -v
616 The advantage of using "snapshot" control command is that the access is
617 controlled by access to a FIFO e.g.
619 $ mkfifo perf.control
623 $ sudo ~/bin/perf record --control fifo:perf.control,perf.ack -S -e intel_pt//u -- sleep 60 &
626 15244 pts/1 00:00:00 perf
628 bash: kill: (15244) - Operation not permitted
629 $ echo snapshot > perf.control
632 The 3 Intel PT modes of operation cannot be used together.
638 There may be buffer limitations (i.e. single ToPa entry) which means that actual
639 buffer sizes are limited to powers of 2 up to 4MiB (MAX_ORDER). In order to
640 provide other sizes, and in particular an arbitrarily large size, multiple
641 buffers are logically concatenated. However an interrupt must be used to switch
642 between buffers. That has two potential problems:
643 a) the interrupt may not be handled in time so that the current buffer
644 becomes full and some trace data is lost.
645 b) the interrupts may slow the system and affect the performance
648 If trace data is lost, the driver sets 'truncated' in the PERF_RECORD_AUX event
649 which the tools report as an error.
651 In full-trace mode, the driver waits for data to be copied out before allowing
652 the (logical) buffer to wrap-around. If data is not copied out quickly enough,
653 again 'truncated' is set in the PERF_RECORD_AUX event. If the driver has to
654 wait, the intel_pt event gets disabled. Because it is difficult to know when
655 that happens, perf tools always re-enable the intel_pt event after copying out
659 Intel PT and build ids
660 ~~~~~~~~~~~~~~~~~~~~~~
662 By default "perf record" post-processes the event stream to find all build ids
663 for executables for all addresses sampled. Deliberately, Intel PT is not
664 decoded for that purpose (it would take too long). Instead the build ids for
665 all executables encountered (due to mmap, comm or task events) are included
666 in the perf.data file.
668 To see buildids included in the perf.data file use the command:
672 If the perf.data file contains Intel PT data, that is the same as:
674 perf buildid-list --with-hits
677 Snapshot mode and event disabling
678 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
680 In order to make a snapshot, the intel_pt event is disabled using an IOCTL,
681 namely PERF_EVENT_IOC_DISABLE. However doing that can also disable the
682 collection of side-band information. In order to prevent that, a dummy
683 software event has been introduced that permits tracking events (like mmaps) to
684 continue to be recorded while intel_pt is disabled. That is important to ensure
685 there is complete side-band information to allow the decoding of subsequent
688 A test has been created for that. To find the test:
692 23: Test using a dummy software event to keep tracking
697 23: Test using a dummy software event to keep tracking : Ok
700 perf record modes (nothing new here)
701 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
703 perf record essentially operates in one of three modes:
708 "per thread" mode is selected by -t or by --per-thread (with -p or -u or just a
710 "per cpu" is selected by -C or -a.
711 "workload only" mode is selected by not using the other options but providing a
712 command to run (i.e. the workload).
714 In per-thread mode an exact list of threads is traced. There is no inheritance.
715 Each thread has its own event buffer.
717 In per-cpu mode all processes (or processes from the selected cgroup i.e. -G
718 option, or processes selected with -p or -u) are traced. Each cpu has its own
719 buffer. Inheritance is allowed.
721 In workload-only mode, the workload is traced but with per-cpu buffers.
722 Inheritance is allowed. Note that you can now trace a workload in per-thread
723 mode by using the --per-thread option.
726 Privileged vs non-privileged users
727 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
729 Unless /proc/sys/kernel/perf_event_paranoid is set to -1, unprivileged users
730 have memory limits imposed upon them. That affects what buffer sizes they can
731 have as outlined above.
733 The v4.2 kernel introduced support for a context switch metadata event,
734 PERF_RECORD_SWITCH, which allows unprivileged users to see when their processes
735 are scheduled out and in, just not by whom, which is left for the
736 PERF_RECORD_SWITCH_CPU_WIDE, that is only accessible in system wide context,
737 which in turn requires CAP_PERFMON or CAP_SYS_ADMIN.
739 Please see the 45ac1403f564 ("perf: Add PERF_RECORD_SWITCH to indicate context
740 switches") commit, that introduces these metadata events for further info.
742 When working with kernels < v4.2, the following considerations must be taken,
743 as the sched:sched_switch tracepoints will be used to receive such information:
745 Unless /proc/sys/kernel/perf_event_paranoid is set to -1, unprivileged users are
746 not permitted to use tracepoints which means there is insufficient side-band
747 information to decode Intel PT in per-cpu mode, and potentially workload-only
748 mode too if the workload creates new processes.
750 Note also, that to use tracepoints, read-access to debugfs is required. So if
751 debugfs is not mounted or the user does not have read-access, it will again not
752 be possible to decode Intel PT in per-cpu mode.
755 sched_switch tracepoint
756 ~~~~~~~~~~~~~~~~~~~~~~~
758 The sched_switch tracepoint is used to provide side-band data for Intel PT
759 decoding in kernels where the PERF_RECORD_SWITCH metadata event isn't
762 The sched_switch events are automatically added. e.g. the second event shown
765 $ perf record -vv -e intel_pt//u uname
766 ------------------------------------------------------------
771 { sample_period, sample_freq } 1
772 sample_type IP|TID|TIME|CPU|IDENTIFIER
780 ------------------------------------------------------------
781 sys_perf_event_open: pid 31104 cpu 0 group_fd -1 flags 0x8
782 sys_perf_event_open: pid 31104 cpu 1 group_fd -1 flags 0x8
783 sys_perf_event_open: pid 31104 cpu 2 group_fd -1 flags 0x8
784 sys_perf_event_open: pid 31104 cpu 3 group_fd -1 flags 0x8
785 ------------------------------------------------------------
790 { sample_period, sample_freq } 1
791 sample_type IP|TID|TIME|CPU|PERIOD|RAW|IDENTIFIER
796 ------------------------------------------------------------
797 sys_perf_event_open: pid -1 cpu 0 group_fd -1 flags 0x8
798 sys_perf_event_open: pid -1 cpu 1 group_fd -1 flags 0x8
799 sys_perf_event_open: pid -1 cpu 2 group_fd -1 flags 0x8
800 sys_perf_event_open: pid -1 cpu 3 group_fd -1 flags 0x8
801 ------------------------------------------------------------
806 { sample_period, sample_freq } 1
807 sample_type IP|TID|TIME|IDENTIFIER
820 ------------------------------------------------------------
821 sys_perf_event_open: pid 31104 cpu 0 group_fd -1 flags 0x8
822 sys_perf_event_open: pid 31104 cpu 1 group_fd -1 flags 0x8
823 sys_perf_event_open: pid 31104 cpu 2 group_fd -1 flags 0x8
824 sys_perf_event_open: pid 31104 cpu 3 group_fd -1 flags 0x8
826 AUX area mmap length 4194304
827 perf event ring buffer mmapped per cpu
828 Synthesizing auxtrace information
830 [ perf record: Woken up 1 times to write data ]
831 [ perf record: Captured and wrote 0.042 MB perf.data ]
833 Note, the sched_switch event is only added if the user is permitted to use it
834 and only in per-cpu mode.
836 Note also, the sched_switch event is only added if TSC packets are requested.
837 That is because, in the absence of timing information, the sched_switch events
838 cannot be matched against the Intel PT trace.
844 By default, perf script will decode trace data found in the perf.data file.
845 This can be further controlled by new option --itrace.
851 Having no option is the same as
855 which, in turn, is the same as
861 i synthesize "instructions" events
862 b synthesize "branches" events
863 x synthesize "transactions" events
864 w synthesize "ptwrite" events
865 p synthesize "power" events (incl. PSB events)
866 c synthesize branches events (calls only)
867 r synthesize branches events (returns only)
868 e synthesize tracing error events
870 g synthesize a call chain (use with i or x)
871 G synthesize a call chain on existing event records
872 l synthesize last branch entries (use with i or x)
873 L synthesize last branch entries on existing event records
874 s skip initial number of events
875 q quicker (less detailed) decoding
876 Z prefer to ignore timestamps (so-called "timeless" decoding)
878 "Instructions" events look like they were recorded by "perf record -e
881 "Branches" events look like they were recorded by "perf record -e branches". "c"
882 and "r" can be combined to get calls and returns.
884 "Transactions" events correspond to the start or end of transactions. The
885 'flags' field can be used in perf script to determine whether the event is a
886 tranasaction start, commit or abort.
888 Note that "instructions", "branches" and "transactions" events depend on code
889 flow packets which can be disabled by using the config term "branch=0". Refer
890 to the config terms section above.
892 "ptwrite" events record the payload of the ptwrite instruction and whether
893 "fup_on_ptw" was used. "ptwrite" events depend on PTWRITE packets which are
894 recorded only if the "ptw" config term was used. Refer to the config terms
895 section above. perf script "synth" field displays "ptwrite" information like
896 this: "ip: 0 payload: 0x123456789abcdef0" where "ip" is 1 if "fup_on_ptw" was
899 "Power" events correspond to power event packets and CBR (core-to-bus ratio)
900 packets. While CBR packets are always recorded when tracing is enabled, power
901 event packets are recorded only if the "pwr_evt" config term was used. Refer to
902 the config terms section above. The power events record information about
903 C-state changes, whereas CBR is indicative of CPU frequency. perf script
904 "event,synth" fields display information like this:
905 cbr: cbr: 22 freq: 2189 MHz (200%)
906 mwait: hints: 0x60 extensions: 0x1
907 pwre: hw: 0 cstate: 2 sub-cstate: 0
909 pwrx: deepest cstate: 2 last cstate: 2 wake reason: 0x4
911 "cbr" includes the frequency and the percentage of maximum non-turbo
912 "mwait" shows mwait hints and extensions
913 "pwre" shows C-state transitions (to a C-state deeper than C0) and
914 whether initiated by hardware
915 "exstop" indicates execution stopped and whether the IP was recorded
917 "pwrx" indicates return to C0
918 For more details refer to the Intel 64 and IA-32 Architectures Software
921 PSB events show when a PSB+ occurred and also the byte-offset in the trace.
922 Emitting a PSB+ can cause a CPU a slight delay. When doing timing analysis
923 of code with Intel PT, it is useful to know if a timing bubble was caused
926 Error events show where the decoder lost the trace. Error events
927 are quite important. Users must know if what they are seeing is a complete
928 picture or not. The "e" option may be followed by flags which affect what errors
929 will or will not be reported. Each flag must be preceded by either '+' or '-'.
930 The flags supported by Intel PT are:
931 -o Suppress overflow errors
932 -l Suppress trace data lost errors
933 For example, for errors but not overflow or data lost errors:
937 The "d" option will cause the creation of a file "intel_pt.log" containing all
938 decoded packets and instructions. Note that this option slows down the decoder
939 and that the resulting file may be very large. The "d" option may be followed
940 by flags which affect what debug messages will or will not be logged. Each flag
941 must be preceded by either '+' or '-'. The flags support by Intel PT are:
942 -a Suppress logging of perf events
943 +a Log all perf events
944 By default, logged perf events are filtered by any specified time ranges, but
945 flag +a overrides that.
947 In addition, the period of the "instructions" event can be specified. e.g.
951 sets the period to 10us i.e. one instruction sample is synthesized for each 10
952 microseconds of trace. Alternatives to "us" are "ms" (milliseconds),
953 "ns" (nanoseconds), "t" (TSC ticks) or "i" (instructions).
955 "ms", "us" and "ns" are converted to TSC ticks.
957 The timing information included with Intel PT does not give the time of every
958 instruction. Consequently, for the purpose of sampling, the decoder estimates
959 the time since the last timing packet based on 1 tick per instruction. The time
960 on the sample is *not* adjusted and reflects the last known value of TSC.
962 For Intel PT, the default period is 100us.
964 Setting it to a zero period means "as often as possible".
966 In the case of Intel PT that is the same as a period of 1 and a unit of
967 'instructions' (i.e. --itrace=i1i).
969 Also the call chain size (default 16, max. 1024) for instructions or
970 transactions events can be specified. e.g.
975 Also the number of last branch entries (default 64, max. 1024) for instructions or
976 transactions events can be specified. e.g.
981 Note that last branch entries are cleared for each sample, so there is no overlap
982 from one sample to the next.
984 The G and L options are designed in particular for sample mode, and work much
985 like g and l but add call chain and branch stack to the other selected events
986 instead of synthesized events. For example, to record branch-misses events for
987 'ls' and then add a call chain derived from the Intel PT trace:
989 perf record --aux-sample -e '{intel_pt//u,branch-misses:u}' -- ls
990 perf report --itrace=Ge
992 Although in fact G is a default for perf report, so that is the same as just:
996 One caveat with the G and L options is that they work poorly with "Large PEBS".
997 Large PEBS means PEBS records will be accumulated by hardware and the written
998 into the event buffer in one go. That reduces interrupts, but can give very
999 late timestamps. Because the Intel PT trace is synchronized by timestamps,
1000 the PEBS events do not match the trace. Currently, Large PEBS is used only in
1001 certain circumstances:
1002 - hardware supports it
1004 - event period is specified, instead of frequency
1005 - the sample type is limited to the following flags:
1006 PERF_SAMPLE_IP | PERF_SAMPLE_TID | PERF_SAMPLE_ADDR |
1007 PERF_SAMPLE_ID | PERF_SAMPLE_CPU | PERF_SAMPLE_STREAM_ID |
1008 PERF_SAMPLE_DATA_SRC | PERF_SAMPLE_IDENTIFIER |
1009 PERF_SAMPLE_TRANSACTION | PERF_SAMPLE_PHYS_ADDR |
1010 PERF_SAMPLE_REGS_INTR | PERF_SAMPLE_REGS_USER |
1011 PERF_SAMPLE_PERIOD (and sometimes) | PERF_SAMPLE_TIME
1012 Because Intel PT sample mode uses a different sample type to the list above,
1013 Large PEBS is not used with Intel PT sample mode. To avoid Large PEBS in other
1014 cases, avoid specifying the event period i.e. avoid the 'perf record' -c option,
1015 --count option, or 'period' config term.
1017 To disable trace decoding entirely, use the option --no-itrace.
1019 It is also possible to skip events generated (instructions, branches, transactions)
1020 at the beginning. This is useful to ignore initialization code.
1022 --itrace=i0nss1000000
1024 skips the first million instructions.
1026 The q option changes the way the trace is decoded. The decoding is much faster
1027 but much less detailed. Specifically, with the q option, the decoder does not
1028 decode TNT packets, and does not walk object code, but gets the ip from FUP and
1029 TIP packets. The q option can be used with the b and i options but the period
1030 is not used. The q option decodes more quickly, but is useful only if the
1031 control flow of interest is represented or indicated by FUP, TIP, TIP.PGE, or
1032 TIP.PGD packets (refer below). However the q option could be used to find time
1033 ranges that could then be decoded fully using the --time option.
1035 What will *not* be decoded with the (single) q option:
1037 - direct calls and jmps
1038 - conditional branches
1039 - non-branch instructions
1041 What *will* be decoded with the (single) q option:
1043 - asynchronous branches such as interrupts
1045 - function return target address *if* the noretcomp config term (refer
1046 config terms section) was used
1047 - start of (control-flow) tracing
1048 - end of (control-flow) tracing, if it is not out of context
1049 - power events, ptwrite, transaction start and abort
1050 - instruction pointer associated with PSB packets
1052 Note the q option does not specify what events will be synthesized e.g. the p
1053 option must be used also to show power events.
1055 Repeating the q option (double-q i.e. qq) results in even faster decoding and even
1056 less detail. The decoder decodes only extended PSB (PSB+) packets, getting the
1057 instruction pointer if there is a FUP packet within PSB+ (i.e. between PSB and
1058 PSBEND). Note PSB packets occur regularly in the trace based on the psb_period
1059 config term (refer config terms section). There will be a FUP packet if the
1060 PSB+ occurs while control flow is being traced.
1062 What will *not* be decoded with the qq option:
1064 - everything except instruction pointer associated with PSB packets
1066 What *will* be decoded with the qq option:
1068 - instruction pointer associated with PSB packets
1070 The Z option is equivalent to having recorded a trace without TSC
1071 (i.e. config term tsc=0). It can be useful to avoid timestamp issues when
1072 decoding a trace of a virtual machine.
1078 perf script has an option (-D) to "dump" the events i.e. display the binary
1081 When -D is used, Intel PT packets are displayed. The packet decoder does not
1082 pay attention to PSB packets, but just decodes the bytes - so the packets seen
1083 by the actual decoder may not be identical in places where the data is corrupt.
1084 One example of that would be when the buffer-switching interrupt has been too
1085 slow, and the buffer has been filled completely. In that case, the last packet
1086 in the buffer might be truncated and immediately followed by a PSB as the trace
1087 continues in the next buffer.
1089 To disable the display of Intel PT packets, combine the -D option with
1096 By default, perf report will decode trace data found in the perf.data file.
1097 This can be further controlled by new option --itrace exactly the same as
1098 perf script, with the exception that the default is --itrace=igxe.
1104 perf inject also accepts the --itrace option in which case tracing data is
1105 removed and replaced with the synthesized events. e.g.
1107 perf inject --itrace -i perf.data -o perf.data.new
1109 Below is an example of using Intel PT with autofdo. It requires autofdo
1110 (https://github.com/google/autofdo) and gcc version 5. The bubble
1111 sort example is from the AutoFDO tutorial (https://gcc.gnu.org/wiki/AutoFDO/Tutorial)
1112 amended to take the number of elements as a parameter.
1114 $ gcc-5 -O3 sort.c -o sort_optimized
1115 $ ./sort_optimized 30000
1116 Bubble sorting array of 30000 elements
1123 $ perf record -e intel_pt//u ./sort 3000
1124 Bubble sorting array of 3000 elements
1126 [ perf record: Woken up 2 times to write data ]
1127 [ perf record: Captured and wrote 3.939 MB perf.data ]
1128 $ perf inject -i perf.data -o inj --itrace=i100usle --strip
1129 $ ./create_gcov --binary=./sort --profile=inj --gcov=sort.gcov -gcov_version=1
1130 $ gcc-5 -O3 -fauto-profile=sort.gcov sort.c -o sort_autofdo
1131 $ ./sort_autofdo 30000
1132 Bubble sorting array of 30000 elements
1135 Note there is currently no advantage to using Intel PT instead of LBR, but
1136 that may change in the future if greater use is made of the data.
1142 Some hardware has the feature to redirect PEBS records to the Intel PT trace.
1143 Recording is selected by using the aux-output config term e.g.
1145 perf record -c 10000 -e '{intel_pt/branch=0/,cycles/aux-output/ppp}' uname
1147 Note that currently, software only supports redirecting at most one PEBS event.
1149 To display PEBS events from the Intel PT trace, use the itrace 'o' option e.g.
1151 perf script --itrace=oe
1156 include::build-xed.txt[]
1159 Tracing Virtual Machines
1160 ------------------------
1162 Currently, only kernel tracing is supported and only with either "timeless" decoding
1163 (i.e. no TSC timestamps) or VM Time Correlation. VM Time Correlation is an extra step
1164 using 'perf inject' and requires unchanging VMX TSC Offset and no VMX TSC Scaling.
1166 Other limitations and caveats
1168 VMX controls may suppress packets needed for decoding resulting in decoding errors
1169 VMX controls may block the perf NMI to the host potentially resulting in lost trace data
1170 Guest kernel self-modifying code (e.g. jump labels or JIT-compiled eBPF) will result in decoding errors
1171 Guest thread information is unknown
1172 Guest VCPU is unknown but may be able to be inferred from the host thread
1173 Callchains are not supported
1175 Example using "timeless" decoding
1179 $ sudo virsh start kubuntu20.04
1180 Domain kubuntu20.04 started
1182 Mount the guest file system. Note sshfs needs -o direct_io to enable reading of proc files. root access is needed to read /proc/kcore.
1185 $ sshfs -o direct_io root@vm0:/ vm0
1187 Copy the guest /proc/kallsyms, /proc/modules and /proc/kcore
1189 $ perf buildid-cache -v --kcore vm0/proc/kcore
1190 kcore added to build-id cache directory /home/user/.debug/[kernel.kcore]/9600f316a53a0f54278885e8d9710538ec5f6a08/2021021807494306
1191 $ KALLSYMS=/home/user/.debug/[kernel.kcore]/9600f316a53a0f54278885e8d9710538ec5f6a08/2021021807494306/kallsyms
1195 $ ps -eLl | grep 'KVM\|PID'
1196 F S UID PID PPID LWP C PRI NI ADDR SZ WCHAN TTY TIME CMD
1197 3 S 64055 1430 1 1440 1 80 0 - 1921718 - ? 00:02:47 CPU 0/KVM
1198 3 S 64055 1430 1 1441 1 80 0 - 1921718 - ? 00:02:41 CPU 1/KVM
1199 3 S 64055 1430 1 1442 1 80 0 - 1921718 - ? 00:02:38 CPU 2/KVM
1200 3 S 64055 1430 1 1443 2 80 0 - 1921718 - ? 00:03:18 CPU 3/KVM
1202 Start an open-ended perf record, tracing the VM process, do something on the VM, and then ctrl-C to stop.
1203 TSC is not supported and tsc=0 must be specified. That means mtc is useless, so add mtc=0.
1204 However, IPC can still be determined, hence cyc=1 can be added.
1205 Only kernel decoding is supported, so 'k' must be specified.
1206 Intel PT traces both the host and the guest so --guest and --host need to be specified.
1207 Without timestamps, --per-thread must be specified to distinguish threads.
1209 $ sudo perf kvm --guest --host --guestkallsyms $KALLSYMS record --kcore -e intel_pt/tsc=0,mtc=0,cyc=1/k -p 1430 --per-thread
1211 [ perf record: Woken up 1 times to write data ]
1212 [ perf record: Captured and wrote 5.829 MB ]
1214 perf script can be used to provide an instruction trace
1216 $ perf script --guestkallsyms $KALLSYMS --insn-trace --xed -F+ipc | grep -C10 vmresume | head -21
1217 CPU 0/KVM 1440 ffffffff82133cdd __vmx_vcpu_run+0x3d ([kernel.kallsyms]) movq 0x48(%rax), %r9
1218 CPU 0/KVM 1440 ffffffff82133ce1 __vmx_vcpu_run+0x41 ([kernel.kallsyms]) movq 0x50(%rax), %r10
1219 CPU 0/KVM 1440 ffffffff82133ce5 __vmx_vcpu_run+0x45 ([kernel.kallsyms]) movq 0x58(%rax), %r11
1220 CPU 0/KVM 1440 ffffffff82133ce9 __vmx_vcpu_run+0x49 ([kernel.kallsyms]) movq 0x60(%rax), %r12
1221 CPU 0/KVM 1440 ffffffff82133ced __vmx_vcpu_run+0x4d ([kernel.kallsyms]) movq 0x68(%rax), %r13
1222 CPU 0/KVM 1440 ffffffff82133cf1 __vmx_vcpu_run+0x51 ([kernel.kallsyms]) movq 0x70(%rax), %r14
1223 CPU 0/KVM 1440 ffffffff82133cf5 __vmx_vcpu_run+0x55 ([kernel.kallsyms]) movq 0x78(%rax), %r15
1224 CPU 0/KVM 1440 ffffffff82133cf9 __vmx_vcpu_run+0x59 ([kernel.kallsyms]) movq (%rax), %rax
1225 CPU 0/KVM 1440 ffffffff82133cfc __vmx_vcpu_run+0x5c ([kernel.kallsyms]) callq 0xffffffff82133c40
1226 CPU 0/KVM 1440 ffffffff82133c40 vmx_vmenter+0x0 ([kernel.kallsyms]) jz 0xffffffff82133c46
1227 CPU 0/KVM 1440 ffffffff82133c42 vmx_vmenter+0x2 ([kernel.kallsyms]) vmresume IPC: 0.11 (50/445)
1228 :1440 1440 ffffffffbb678b06 native_write_msr+0x6 ([guest.kernel.kallsyms]) nopl %eax, (%rax,%rax,1)
1229 :1440 1440 ffffffffbb678b0b native_write_msr+0xb ([guest.kernel.kallsyms]) retq IPC: 0.04 (2/41)
1230 :1440 1440 ffffffffbb666646 lapic_next_deadline+0x26 ([guest.kernel.kallsyms]) data16 nop
1231 :1440 1440 ffffffffbb666648 lapic_next_deadline+0x28 ([guest.kernel.kallsyms]) xor %eax, %eax
1232 :1440 1440 ffffffffbb66664a lapic_next_deadline+0x2a ([guest.kernel.kallsyms]) popq %rbp
1233 :1440 1440 ffffffffbb66664b lapic_next_deadline+0x2b ([guest.kernel.kallsyms]) retq IPC: 0.16 (4/25)
1234 :1440 1440 ffffffffbb74607f clockevents_program_event+0x8f ([guest.kernel.kallsyms]) test %eax, %eax
1235 :1440 1440 ffffffffbb746081 clockevents_program_event+0x91 ([guest.kernel.kallsyms]) jz 0xffffffffbb74603c IPC: 0.06 (2/30)
1236 :1440 1440 ffffffffbb74603c clockevents_program_event+0x4c ([guest.kernel.kallsyms]) popq %rbx
1237 :1440 1440 ffffffffbb74603d clockevents_program_event+0x4d ([guest.kernel.kallsyms]) popq %r12
1239 Example using VM Time Correlation
1243 $ sudo virsh start kubuntu20.04
1244 Domain kubuntu20.04 started
1246 Mount the guest file system. Note sshfs needs -o direct_io to enable reading of proc files. root access is needed to read /proc/kcore.
1249 $ sshfs -o direct_io root@vm0:/ vm0
1251 Copy the guest /proc/kallsyms, /proc/modules and /proc/kcore
1253 $ perf buildid-cache -v --kcore vm0/proc/kcore
1254 same kcore found in /home/user/.debug/[kernel.kcore]/cc9c55a98c5e4ec0aeda69302554aabed5cd6491/2021021312450777
1255 $ KALLSYMS=/home/user/.debug/\[kernel.kcore\]/cc9c55a98c5e4ec0aeda69302554aabed5cd6491/2021021312450777/kallsyms
1259 $ ps -eLl | grep 'KVM\|PID'
1260 F S UID PID PPID LWP C PRI NI ADDR SZ WCHAN TTY TIME CMD
1261 3 S 64055 16998 1 17005 13 80 0 - 1818189 - ? 00:00:16 CPU 0/KVM
1262 3 S 64055 16998 1 17006 4 80 0 - 1818189 - ? 00:00:05 CPU 1/KVM
1263 3 S 64055 16998 1 17007 3 80 0 - 1818189 - ? 00:00:04 CPU 2/KVM
1264 3 S 64055 16998 1 17008 4 80 0 - 1818189 - ? 00:00:05 CPU 3/KVM
1266 Start an open-ended perf record, tracing the VM process, do something on the VM, and then ctrl-C to stop.
1267 IPC can be determined, hence cyc=1 can be added.
1268 Only kernel decoding is supported, so 'k' must be specified.
1269 Intel PT traces both the host and the guest so --guest and --host need to be specified.
1271 $ sudo perf kvm --guest --host --guestkallsyms $KALLSYMS record --kcore -e intel_pt/cyc=1/k -p 16998
1272 ^C[ perf record: Woken up 1 times to write data ]
1273 [ perf record: Captured and wrote 9.041 MB perf.data.kvm ]
1275 Now 'perf inject' can be used to determine the VMX TCS Offset. Note, Intel PT TSC packets are
1276 only 7-bytes, so the TSC Offset might differ from the actual value in the 8th byte. That will
1277 have no effect i.e. the resulting timestamps will be correct anyway.
1279 $ perf inject -i perf.data.kvm --vm-time-correlation=dry-run
1280 ERROR: Unknown TSC Offset for VMCS 0x1bff6a
1281 VMCS: 0x1bff6a TSC Offset 0xffffe42722c64c41
1282 ERROR: Unknown TSC Offset for VMCS 0x1cbc08
1283 VMCS: 0x1cbc08 TSC Offset 0xffffe42722c64c41
1284 ERROR: Unknown TSC Offset for VMCS 0x1c3ce8
1285 VMCS: 0x1c3ce8 TSC Offset 0xffffe42722c64c41
1286 ERROR: Unknown TSC Offset for VMCS 0x1cbce9
1287 VMCS: 0x1cbce9 TSC Offset 0xffffe42722c64c41
1289 Each virtual CPU has a different Virtual Machine Control Structure (VMCS)
1290 shown above with the calculated TSC Offset. For an unchanging TSC Offset
1291 they should all be the same for the same virtual machine.
1293 Now that the TSC Offset is known, it can be provided to 'perf inject'
1295 $ perf inject -i perf.data.kvm --vm-time-correlation="dry-run 0xffffe42722c64c41"
1297 Note the options for 'perf inject' --vm-time-correlation are:
1299 [ dry-run ] [ <TSC Offset> [ : <VMCS> [ , <VMCS> ]... ] ]...
1301 So it is possible to specify different TSC Offsets for different VMCS.
1302 The option "dry-run" will cause the file to be processed but without updating it.
1303 Note it is also possible to get a intel_pt.log file by adding option --itrace=d
1305 There were no errors so, do it for real
1307 $ perf inject -i perf.data.kvm --vm-time-correlation=0xffffe42722c64c41 --force
1309 'perf script' can be used to see if there are any decoder errors
1311 $ perf script -i perf.data.kvm --guestkallsyms $KALLSYMS --itrace=e-o
1315 'perf script' can be used to provide an instruction trace showing timestamps
1317 $ perf script -i perf.data.kvm --guestkallsyms $KALLSYMS --insn-trace --xed -F+ipc | grep -C10 vmresume | head -21
1318 CPU 1/KVM 17006 [001] 11500.262865593: ffffffff82133cdd __vmx_vcpu_run+0x3d ([kernel.kallsyms]) movq 0x48(%rax), %r9
1319 CPU 1/KVM 17006 [001] 11500.262865593: ffffffff82133ce1 __vmx_vcpu_run+0x41 ([kernel.kallsyms]) movq 0x50(%rax), %r10
1320 CPU 1/KVM 17006 [001] 11500.262865593: ffffffff82133ce5 __vmx_vcpu_run+0x45 ([kernel.kallsyms]) movq 0x58(%rax), %r11
1321 CPU 1/KVM 17006 [001] 11500.262865593: ffffffff82133ce9 __vmx_vcpu_run+0x49 ([kernel.kallsyms]) movq 0x60(%rax), %r12
1322 CPU 1/KVM 17006 [001] 11500.262865593: ffffffff82133ced __vmx_vcpu_run+0x4d ([kernel.kallsyms]) movq 0x68(%rax), %r13
1323 CPU 1/KVM 17006 [001] 11500.262865593: ffffffff82133cf1 __vmx_vcpu_run+0x51 ([kernel.kallsyms]) movq 0x70(%rax), %r14
1324 CPU 1/KVM 17006 [001] 11500.262865593: ffffffff82133cf5 __vmx_vcpu_run+0x55 ([kernel.kallsyms]) movq 0x78(%rax), %r15
1325 CPU 1/KVM 17006 [001] 11500.262865593: ffffffff82133cf9 __vmx_vcpu_run+0x59 ([kernel.kallsyms]) movq (%rax), %rax
1326 CPU 1/KVM 17006 [001] 11500.262865593: ffffffff82133cfc __vmx_vcpu_run+0x5c ([kernel.kallsyms]) callq 0xffffffff82133c40
1327 CPU 1/KVM 17006 [001] 11500.262865593: ffffffff82133c40 vmx_vmenter+0x0 ([kernel.kallsyms]) jz 0xffffffff82133c46
1328 CPU 1/KVM 17006 [001] 11500.262866075: ffffffff82133c42 vmx_vmenter+0x2 ([kernel.kallsyms]) vmresume IPC: 0.05 (40/769)
1329 :17006 17006 [001] 11500.262869216: ffffffff82200cb0 asm_sysvec_apic_timer_interrupt+0x0 ([guest.kernel.kallsyms]) clac
1330 :17006 17006 [001] 11500.262869216: ffffffff82200cb3 asm_sysvec_apic_timer_interrupt+0x3 ([guest.kernel.kallsyms]) pushq $0xffffffffffffffff
1331 :17006 17006 [001] 11500.262869216: ffffffff82200cb5 asm_sysvec_apic_timer_interrupt+0x5 ([guest.kernel.kallsyms]) callq 0xffffffff82201160
1332 :17006 17006 [001] 11500.262869216: ffffffff82201160 error_entry+0x0 ([guest.kernel.kallsyms]) cld
1333 :17006 17006 [001] 11500.262869216: ffffffff82201161 error_entry+0x1 ([guest.kernel.kallsyms]) pushq %rsi
1334 :17006 17006 [001] 11500.262869216: ffffffff82201162 error_entry+0x2 ([guest.kernel.kallsyms]) movq 0x8(%rsp), %rsi
1335 :17006 17006 [001] 11500.262869216: ffffffff82201167 error_entry+0x7 ([guest.kernel.kallsyms]) movq %rdi, 0x8(%rsp)
1336 :17006 17006 [001] 11500.262869216: ffffffff8220116c error_entry+0xc ([guest.kernel.kallsyms]) pushq %rdx
1337 :17006 17006 [001] 11500.262869216: ffffffff8220116d error_entry+0xd ([guest.kernel.kallsyms]) pushq %rcx
1338 :17006 17006 [001] 11500.262869216: ffffffff8220116e error_entry+0xe ([guest.kernel.kallsyms]) pushq %rax
1345 linkperf:perf-record[1], linkperf:perf-script[1], linkperf:perf-report[1],
1346 linkperf:perf-inject[1]