sound/soc/mediatek/mt8195/mt8195-mt6359-rt1019-rt5682.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 //
   3 // mt8195-mt6359-rt1019-rt5682.c  --
   4 //      MT8195-MT6359-RT1019-RT6358 ALSA SoC machine driver
   5 //
   6 // Copyright (c) 2021 MediaTek Inc.
   7 // Author: Trevor Wu <trevor.wu@mediatek.com>
   8 //
   9
  10 #include <linux/input.h>
  11 #include <linux/module.h>
  12 #include <linux/pm_runtime.h>
  13 #include <sound/jack.h>
  14 #include <sound/pcm_params.h>
  15 #include <sound/rt5682.h>
  16 #include <sound/soc.h>
  17 #include "../../codecs/mt6359.h"
  18 #include "../../codecs/rt5682.h"
  19 #include "../common/mtk-afe-platform-driver.h"
  20 #include "mt8195-afe-common.h"
  21
  22 #define RT1019_CODEC_DAI        "HiFi"
  23 #define RT1019_DEV0_NAME        "rt1019p"
  24
  25 #define RT5682_CODEC_DAI        "rt5682-aif1"
  26 #define RT5682_DEV0_NAME        "rt5682.2-001a"
  27
  28 struct mt8195_mt6359_rt1019_rt5682_priv {
  29         struct snd_soc_jack headset_jack;
  30         struct snd_soc_jack dp_jack;
  31         struct snd_soc_jack hdmi_jack;
  32 };
  33
  34 static const struct snd_soc_dapm_widget
  35         mt8195_mt6359_rt1019_rt5682_widgets[] = {
  36         SND_SOC_DAPM_SPK("Speakers", NULL),
  37         SND_SOC_DAPM_HP("Headphone Jack", NULL),
  38         SND_SOC_DAPM_MIC("Headset Mic", NULL),
  39 };
  40
  41 static const struct snd_soc_dapm_route mt8195_mt6359_rt1019_rt5682_routes[] = {
  42         /* speaker */
  43         { "Speakers", NULL, "Speaker" },
  44         /* headset */
  45         { "Headphone Jack", NULL, "HPOL" },
  46         { "Headphone Jack", NULL, "HPOR" },
  47         { "IN1P", NULL, "Headset Mic" },
  48 };
  49
  50 static const struct snd_kcontrol_new mt8195_mt6359_rt1019_rt5682_controls[] = {
  51         SOC_DAPM_PIN_SWITCH("Speakers"),
  52         SOC_DAPM_PIN_SWITCH("Headphone Jack"),
  53         SOC_DAPM_PIN_SWITCH("Headset Mic"),
  54 };
  55
  56 static int mt8195_rt5682_etdm_hw_params(struct snd_pcm_substream *substream,
  57                                         struct snd_pcm_hw_params *params)
  58 {
  59         struct snd_soc_pcm_runtime *rtd = substream->private_data;
  60         struct snd_soc_card *card = rtd->card;
  61         struct snd_soc_dai *cpu_dai = asoc_rtd_to_cpu(rtd, 0);
  62         struct snd_soc_dai *codec_dai = asoc_rtd_to_codec(rtd, 0);
  63         unsigned int rate = params_rate(params);
  64         unsigned int mclk_fs_ratio = 128;
  65         unsigned int mclk_fs = rate * mclk_fs_ratio;
  66         int bitwidth;
  67         int ret;
  68
  69         bitwidth = snd_pcm_format_width(params_format(params));
  70         if (bitwidth < 0) {
  71                 dev_err(card->dev, "invalid bit width: %d\n", bitwidth);
  72                 return bitwidth;
  73         }
  74
  75         ret = snd_soc_dai_set_tdm_slot(codec_dai, 0x00, 0x0, 0x2, bitwidth);
  76         if (ret) {
  77                 dev_err(card->dev, "failed to set tdm slot\n");
  78                 return ret;
  79         }
  80
  81         ret = snd_soc_dai_set_pll(codec_dai, RT5682_PLL1,
  82                                   RT5682_PLL1_S_BCLK1,
  83                                   params_rate(params) * 64,
  84                                   params_rate(params) * 512);
  85         if (ret) {
  86                 dev_err(card->dev, "failed to set pll\n");
  87                 return ret;
  88         }
  89
  90         ret = snd_soc_dai_set_sysclk(codec_dai,
  91                                      RT5682_SCLK_S_PLL1,
  92                                      params_rate(params) * 512,
  93                                      SND_SOC_CLOCK_IN);
  94         if (ret) {
  95                 dev_err(card->dev, "failed to set sysclk\n");
  96                 return ret;
  97         }
  98
  99         return snd_soc_dai_set_sysclk(cpu_dai, 0, mclk_fs, SND_SOC_CLOCK_OUT);
 100 }
 101
 102 static const struct snd_soc_ops mt8195_rt5682_etdm_ops = {
 103         .hw_params = mt8195_rt5682_etdm_hw_params,
 104 };
 105
 106 #define CKSYS_AUD_TOP_CFG 0x032c
 107 #define CKSYS_AUD_TOP_MON 0x0330
 108
 109 static int mt8195_mt6359_mtkaif_calibration(struct snd_soc_pcm_runtime *rtd)
 110 {
 111         struct snd_soc_component *cmpnt_afe =
 112                 snd_soc_rtdcom_lookup(rtd, AFE_PCM_NAME);
 113         struct snd_soc_component *cmpnt_codec =
 114                 asoc_rtd_to_codec(rtd, 0)->component;
 115         struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt_afe);
 116         struct mt8195_afe_private *afe_priv = afe->platform_priv;
 117         struct mtkaif_param *param = &afe_priv->mtkaif_params;
 118         int phase;
 119         unsigned int monitor;
 120         int mtkaif_calibration_num_phase;
 121         int test_done_1, test_done_2, test_done_3;
 122         int cycle_1, cycle_2, cycle_3;
 123         int prev_cycle_1, prev_cycle_2, prev_cycle_3;
 124         int chosen_phase_1, chosen_phase_2, chosen_phase_3;
 125         int counter;
 126         bool mtkaif_calibration_ok;
 127         int mtkaif_chosen_phase[MT8195_MTKAIF_MISO_NUM];
 128         int mtkaif_phase_cycle[MT8195_MTKAIF_MISO_NUM];
 129         int i;
 130
 131         dev_info(afe->dev, "%s(), start\n", __func__);
 132
 133         param->mtkaif_calibration_ok = false;
 134         for (i = 0; i < MT8195_MTKAIF_MISO_NUM; i++) {
 135                 param->mtkaif_chosen_phase[i] = -1;
 136                 param->mtkaif_phase_cycle[i] = 0;
 137                 mtkaif_chosen_phase[i] = -1;
 138                 mtkaif_phase_cycle[i] = 0;
 139         }
 140
 141         if (IS_ERR(afe_priv->topckgen)) {
 142                 dev_info(afe->dev, "%s() Cannot find topckgen controller\n",
 143                          __func__);
 144                 return 0;
 145         }
 146
 147         pm_runtime_get_sync(afe->dev);
 148         mt6359_mtkaif_calibration_enable(cmpnt_codec);
 149
 150         /* set test type to synchronizer pulse */
 151         regmap_update_bits(afe_priv->topckgen,
 152                            CKSYS_AUD_TOP_CFG, 0xffff, 0x4);
 153         mtkaif_calibration_num_phase = 42;      /* mt6359: 0 ~ 42 */
 154         mtkaif_calibration_ok = true;
 155
 156         for (phase = 0;
 157              phase <= mtkaif_calibration_num_phase && mtkaif_calibration_ok;
 158              phase++) {
 159                 mt6359_set_mtkaif_calibration_phase(cmpnt_codec,
 160                                                     phase, phase, phase);
 161
 162                 regmap_update_bits(afe_priv->topckgen,
 163                                    CKSYS_AUD_TOP_CFG, 0x1, 0x1);
 164
 165                 test_done_1 = 0;
 166                 test_done_2 = 0;
 167                 test_done_3 = 0;
 168                 cycle_1 = -1;
 169                 cycle_2 = -1;
 170                 cycle_3 = -1;
 171                 counter = 0;
 172                 while (!(test_done_1 & test_done_2 & test_done_3)) {
 173                         regmap_read(afe_priv->topckgen,
 174                                     CKSYS_AUD_TOP_MON, &monitor);
 175                         test_done_1 = (monitor >> 28) & 0x1;
 176                         test_done_2 = (monitor >> 29) & 0x1;
 177                         test_done_3 = (monitor >> 30) & 0x1;
 178                         if (test_done_1 == 1)
 179                                 cycle_1 = monitor & 0xf;
 180
 181                         if (test_done_2 == 1)
 182                                 cycle_2 = (monitor >> 4) & 0xf;
 183
 184                         if (test_done_3 == 1)
 185                                 cycle_3 = (monitor >> 8) & 0xf;
 186
 187                         /* handle if never test done */
 188                         if (++counter > 10000) {
 189                                 dev_info(afe->dev, "%s(), test fail, cycle_1 %d, cycle_2 %d, cycle_3 %d, monitor 0x%x\n",
 190                                          __func__,
 191                                          cycle_1, cycle_2, cycle_3, monitor);
 192                                 mtkaif_calibration_ok = false;
 193                                 break;
 194                         }
 195                 }
 196
 197                 if (phase == 0) {
 198                         prev_cycle_1 = cycle_1;
 199                         prev_cycle_2 = cycle_2;
 200                         prev_cycle_3 = cycle_3;
 201                 }
 202
 203                 if (cycle_1 != prev_cycle_1 &&
 204                     mtkaif_chosen_phase[MT8195_MTKAIF_MISO_0] < 0) {
 205                         mtkaif_chosen_phase[MT8195_MTKAIF_MISO_0] = phase - 1;
 206                         mtkaif_phase_cycle[MT8195_MTKAIF_MISO_0] = prev_cycle_1;
 207                 }
 208
 209                 if (cycle_2 != prev_cycle_2 &&
 210                     mtkaif_chosen_phase[MT8195_MTKAIF_MISO_1] < 0) {
 211                         mtkaif_chosen_phase[MT8195_MTKAIF_MISO_1] = phase - 1;
 212                         mtkaif_phase_cycle[MT8195_MTKAIF_MISO_1] = prev_cycle_2;
 213                 }
 214
 215                 if (cycle_3 != prev_cycle_3 &&
 216                     mtkaif_chosen_phase[MT8195_MTKAIF_MISO_2] < 0) {
 217                         mtkaif_chosen_phase[MT8195_MTKAIF_MISO_2] = phase - 1;
 218                         mtkaif_phase_cycle[MT8195_MTKAIF_MISO_2] = prev_cycle_3;
 219                 }
 220
 221                 regmap_update_bits(afe_priv->topckgen,
 222                                    CKSYS_AUD_TOP_CFG, 0x1, 0x0);
 223
 224                 if (mtkaif_chosen_phase[MT8195_MTKAIF_MISO_0] >= 0 &&
 225                     mtkaif_chosen_phase[MT8195_MTKAIF_MISO_1] >= 0 &&
 226                     mtkaif_chosen_phase[MT8195_MTKAIF_MISO_2] >= 0)
 227                         break;
 228         }
 229
 230         if (mtkaif_chosen_phase[MT8195_MTKAIF_MISO_0] < 0) {
 231                 mtkaif_calibration_ok = false;
 232                 chosen_phase_1 = 0;
 233         } else {
 234                 chosen_phase_1 = mtkaif_chosen_phase[MT8195_MTKAIF_MISO_0];
 235         }
 236
 237         if (mtkaif_chosen_phase[MT8195_MTKAIF_MISO_1] < 0) {
 238                 mtkaif_calibration_ok = false;
 239                 chosen_phase_2 = 0;
 240         } else {
 241                 chosen_phase_2 = mtkaif_chosen_phase[MT8195_MTKAIF_MISO_1];
 242         }
 243
 244         if (mtkaif_chosen_phase[MT8195_MTKAIF_MISO_2] < 0) {
 245                 mtkaif_calibration_ok = false;
 246                 chosen_phase_3 = 0;
 247         } else {
 248                 chosen_phase_3 = mtkaif_chosen_phase[MT8195_MTKAIF_MISO_2];
 249         }
 250
 251         mt6359_set_mtkaif_calibration_phase(cmpnt_codec,
 252                                             chosen_phase_1,
 253                                             chosen_phase_2,
 254                                             chosen_phase_3);
 255
 256         mt6359_mtkaif_calibration_disable(cmpnt_codec);
 257         pm_runtime_put(afe->dev);
 258
 259         param->mtkaif_calibration_ok = mtkaif_calibration_ok;
 260         param->mtkaif_chosen_phase[MT8195_MTKAIF_MISO_0] = chosen_phase_1;
 261         param->mtkaif_chosen_phase[MT8195_MTKAIF_MISO_1] = chosen_phase_2;
 262         param->mtkaif_chosen_phase[MT8195_MTKAIF_MISO_2] = chosen_phase_3;
 263         for (i = 0; i < MT8195_MTKAIF_MISO_NUM; i++)
 264                 param->mtkaif_phase_cycle[i] = mtkaif_phase_cycle[i];
 265
 266         dev_info(afe->dev, "%s(), end, calibration ok %d\n",
 267                  __func__, param->mtkaif_calibration_ok);
 268
 269         return 0;
 270 }
 271
 272 static int mt8195_mt6359_init(struct snd_soc_pcm_runtime *rtd)
 273 {
 274         struct snd_soc_component *cmpnt_codec =
 275                 asoc_rtd_to_codec(rtd, 0)->component;
 276
 277         /* set mtkaif protocol */
 278         mt6359_set_mtkaif_protocol(cmpnt_codec,
 279                                    MT6359_MTKAIF_PROTOCOL_2_CLK_P2);
 280
 281         /* mtkaif calibration */
 282         mt8195_mt6359_mtkaif_calibration(rtd);
 283
 284         return 0;
 285 }
 286
 287 static int mt8195_rt5682_init(struct snd_soc_pcm_runtime *rtd)
 288 {
 289         struct snd_soc_component *cmpnt_codec =
 290                 asoc_rtd_to_codec(rtd, 0)->component;
 291         struct mt8195_mt6359_rt1019_rt5682_priv *priv =
 292                 snd_soc_card_get_drvdata(rtd->card);
 293         struct snd_soc_jack *jack = &priv->headset_jack;
 294         int ret;
 295
 296         ret = snd_soc_card_jack_new(rtd->card, "Headset Jack",
 297                                     SND_JACK_HEADSET | SND_JACK_BTN_0 |
 298                                     SND_JACK_BTN_1 | SND_JACK_BTN_2 |
 299                                     SND_JACK_BTN_3,
 300                                     jack, NULL, 0);
 301         if (ret) {
 302                 dev_err(rtd->dev, "Headset Jack creation failed: %d\n", ret);
 303                 return ret;
 304         }
 305
 306         snd_jack_set_key(jack->jack, SND_JACK_BTN_0, KEY_PLAYPAUSE);
 307         snd_jack_set_key(jack->jack, SND_JACK_BTN_1, KEY_VOICECOMMAND);
 308         snd_jack_set_key(jack->jack, SND_JACK_BTN_2, KEY_VOLUMEUP);
 309         snd_jack_set_key(jack->jack, SND_JACK_BTN_3, KEY_VOLUMEDOWN);
 310
 311         ret = snd_soc_component_set_jack(cmpnt_codec, jack, NULL);
 312         if (ret) {
 313                 dev_err(rtd->dev, "Headset Jack set failed: %d\n", ret);
 314                 return ret;
 315         }
 316
 317         return 0;
 318 };
 319
 320 static int mt8195_etdm_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
 321                                        struct snd_pcm_hw_params *params)
 322 {
 323         /* fix BE i2s format to 32bit, clean param mask first */
 324         snd_mask_reset_range(hw_param_mask(params, SNDRV_PCM_HW_PARAM_FORMAT),
 325                              0, (__force unsigned int)SNDRV_PCM_FORMAT_LAST);
 326
 327         params_set_format(params, SNDRV_PCM_FORMAT_S24_LE);
 328
 329         return 0;
 330 }
 331
 332 static int mt8195_hdmitx_dptx_startup(struct snd_pcm_substream *substream)
 333 {
 334         static const unsigned int rates[] = {
 335                 48000
 336         };
 337         static const unsigned int channels[] = {
 338                 2, 4, 6, 8
 339         };
 340         static const struct snd_pcm_hw_constraint_list constraints_rates = {
 341                 .count = ARRAY_SIZE(rates),
 342                 .list  = rates,
 343                 .mask = 0,
 344         };
 345         static const struct snd_pcm_hw_constraint_list constraints_channels = {
 346                 .count = ARRAY_SIZE(channels),
 347                 .list  = channels,
 348                 .mask = 0,
 349         };
 350
 351         struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
 352         struct snd_pcm_runtime *runtime = substream->runtime;
 353         int ret;
 354
 355         ret = snd_pcm_hw_constraint_list(runtime, 0,
 356                                          SNDRV_PCM_HW_PARAM_RATE,
 357                                          &constraints_rates);
 358         if (ret < 0) {
 359                 dev_err(rtd->dev, "hw_constraint_list rate failed\n");
 360                 return ret;
 361         }
 362
 363         ret = snd_pcm_hw_constraint_list(runtime, 0,
 364                                          SNDRV_PCM_HW_PARAM_CHANNELS,
 365                                          &constraints_channels);
 366         if (ret < 0) {
 367                 dev_err(rtd->dev, "hw_constraint_list channel failed\n");
 368                 return ret;
 369         }
 370
 371         return 0;
 372 }
 373
 374 static const struct snd_soc_ops mt8195_hdmitx_dptx_playback_ops = {
 375         .startup = mt8195_hdmitx_dptx_startup,
 376 };
 377
 378 static int mt8195_dptx_hw_params(struct snd_pcm_substream *substream,
 379                                  struct snd_pcm_hw_params *params)
 380 {
 381         struct snd_soc_pcm_runtime *rtd = substream->private_data;
 382         struct snd_soc_dai *cpu_dai = asoc_rtd_to_cpu(rtd, 0);
 383         unsigned int rate = params_rate(params);
 384         unsigned int mclk_fs_ratio = 256;
 385         unsigned int mclk_fs = rate * mclk_fs_ratio;
 386
 387         return snd_soc_dai_set_sysclk(cpu_dai, 0, mclk_fs,
 388                                       SND_SOC_CLOCK_OUT);
 389 }
 390
 391 static struct snd_soc_ops mt8195_dptx_ops = {
 392         .hw_params = mt8195_dptx_hw_params,
 393 };
 394
 395 static int mt8195_dptx_codec_init(struct snd_soc_pcm_runtime *rtd)
 396 {
 397         struct mt8195_mt6359_rt1019_rt5682_priv *priv =
 398                 snd_soc_card_get_drvdata(rtd->card);
 399         struct snd_soc_component *cmpnt_codec =
 400                 asoc_rtd_to_codec(rtd, 0)->component;
 401         int ret = 0;
 402
 403         ret = snd_soc_card_jack_new(rtd->card, "DP Jack", SND_JACK_LINEOUT,
 404                                     &priv->dp_jack, NULL, 0);
 405         if (ret)
 406                 return ret;
 407
 408         return snd_soc_component_set_jack(cmpnt_codec, &priv->dp_jack, NULL);
 409 }
 410
 411 static int mt8195_hdmi_codec_init(struct snd_soc_pcm_runtime *rtd)
 412 {
 413         struct mt8195_mt6359_rt1019_rt5682_priv *priv =
 414                 snd_soc_card_get_drvdata(rtd->card);
 415         struct snd_soc_component *cmpnt_codec =
 416                 asoc_rtd_to_codec(rtd, 0)->component;
 417         int ret = 0;
 418
 419         ret = snd_soc_card_jack_new(rtd->card, "HDMI Jack", SND_JACK_LINEOUT,
 420                                     &priv->hdmi_jack, NULL, 0);
 421         if (ret)
 422                 return ret;
 423
 424         return snd_soc_component_set_jack(cmpnt_codec, &priv->hdmi_jack, NULL);
 425 }
 426
 427 static int mt8195_hdmitx_dptx_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
 428                                               struct snd_pcm_hw_params *params)
 429
 430 {
 431         /* fix BE i2s format to 32bit, clean param mask first */
 432         snd_mask_reset_range(hw_param_mask(params, SNDRV_PCM_HW_PARAM_FORMAT),
 433                              0, (__force unsigned int)SNDRV_PCM_FORMAT_LAST);
 434
 435         params_set_format(params, SNDRV_PCM_FORMAT_S24_LE);
 436
 437         return 0;
 438 }
 439
 440 static int mt8195_playback_startup(struct snd_pcm_substream *substream)
 441 {
 442         static const unsigned int rates[] = {
 443                 48000
 444         };
 445         static const unsigned int channels[] = {
 446                 2
 447         };
 448         static const struct snd_pcm_hw_constraint_list constraints_rates = {
 449                 .count = ARRAY_SIZE(rates),
 450                 .list  = rates,
 451                 .mask = 0,
 452         };
 453         static const struct snd_pcm_hw_constraint_list constraints_channels = {
 454                 .count = ARRAY_SIZE(channels),
 455                 .list  = channels,
 456                 .mask = 0,
 457         };
 458
 459         struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
 460         struct snd_pcm_runtime *runtime = substream->runtime;
 461         int ret;
 462
 463         ret = snd_pcm_hw_constraint_list(runtime, 0,
 464                                          SNDRV_PCM_HW_PARAM_RATE,
 465                                          &constraints_rates);
 466         if (ret < 0) {
 467                 dev_err(rtd->dev, "hw_constraint_list rate failed\n");
 468                 return ret;
 469         }
 470
 471         ret = snd_pcm_hw_constraint_list(runtime, 0,
 472                                          SNDRV_PCM_HW_PARAM_CHANNELS,
 473                                          &constraints_channels);
 474         if (ret < 0) {
 475                 dev_err(rtd->dev, "hw_constraint_list channel failed\n");
 476                 return ret;
 477         }
 478
 479         return 0;
 480 }
 481
 482 static const struct snd_soc_ops mt8195_playback_ops = {
 483         .startup = mt8195_playback_startup,
 484 };
 485
 486 static int mt8195_capture_startup(struct snd_pcm_substream *substream)
 487 {
 488         static const unsigned int rates[] = {
 489                 48000
 490         };
 491         static const unsigned int channels[] = {
 492                 1, 2
 493         };
 494         static const struct snd_pcm_hw_constraint_list constraints_rates = {
 495                 .count = ARRAY_SIZE(rates),
 496                 .list  = rates,
 497                 .mask = 0,
 498         };
 499         static const struct snd_pcm_hw_constraint_list constraints_channels = {
 500                 .count = ARRAY_SIZE(channels),
 501                 .list  = channels,
 502                 .mask = 0,
 503         };
 504
 505         struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
 506         struct snd_pcm_runtime *runtime = substream->runtime;
 507         int ret;
 508
 509         ret = snd_pcm_hw_constraint_list(runtime, 0,
 510                                          SNDRV_PCM_HW_PARAM_RATE,
 511                                          &constraints_rates);
 512         if (ret < 0) {
 513                 dev_err(rtd->dev, "hw_constraint_list rate failed\n");
 514                 return ret;
 515         }
 516
 517         ret = snd_pcm_hw_constraint_list(runtime, 0,
 518                                          SNDRV_PCM_HW_PARAM_CHANNELS,
 519                                          &constraints_channels);
 520         if (ret < 0) {
 521                 dev_err(rtd->dev, "hw_constraint_list channel failed\n");
 522                 return ret;
 523         }
 524
 525         return 0;
 526 }
 527
 528 static const struct snd_soc_ops mt8195_capture_ops = {
 529         .startup = mt8195_capture_startup,
 530 };
 531
 532 enum {
 533         DAI_LINK_DL2_FE,
 534         DAI_LINK_DL3_FE,
 535         DAI_LINK_DL6_FE,
 536         DAI_LINK_DL7_FE,
 537         DAI_LINK_DL8_FE,
 538         DAI_LINK_DL10_FE,
 539         DAI_LINK_DL11_FE,
 540         DAI_LINK_UL1_FE,
 541         DAI_LINK_UL2_FE,
 542         DAI_LINK_UL3_FE,
 543         DAI_LINK_UL4_FE,
 544         DAI_LINK_UL5_FE,
 545         DAI_LINK_UL6_FE,
 546         DAI_LINK_UL8_FE,
 547         DAI_LINK_UL9_FE,
 548         DAI_LINK_UL10_FE,
 549         DAI_LINK_DL_SRC_BE,
 550         DAI_LINK_DPTX_BE,
 551         DAI_LINK_ETDM1_IN_BE,
 552         DAI_LINK_ETDM2_IN_BE,
 553         DAI_LINK_ETDM1_OUT_BE,
 554         DAI_LINK_ETDM2_OUT_BE,
 555         DAI_LINK_ETDM3_OUT_BE,
 556         DAI_LINK_PCM1_BE,
 557         DAI_LINK_UL_SRC1_BE,
 558         DAI_LINK_UL_SRC2_BE,
 559 };
 560
 561 /* FE */
 562 SND_SOC_DAILINK_DEFS(DL2_FE,
 563                      DAILINK_COMP_ARRAY(COMP_CPU("DL2")),
 564                      DAILINK_COMP_ARRAY(COMP_DUMMY()),
 565                      DAILINK_COMP_ARRAY(COMP_EMPTY()));
 566
 567 SND_SOC_DAILINK_DEFS(DL3_FE,
 568                      DAILINK_COMP_ARRAY(COMP_CPU("DL3")),
 569                      DAILINK_COMP_ARRAY(COMP_DUMMY()),
 570                      DAILINK_COMP_ARRAY(COMP_EMPTY()));
 571
 572 SND_SOC_DAILINK_DEFS(DL6_FE,
 573                      DAILINK_COMP_ARRAY(COMP_CPU("DL6")),
 574                      DAILINK_COMP_ARRAY(COMP_DUMMY()),
 575                      DAILINK_COMP_ARRAY(COMP_EMPTY()));
 576
 577 SND_SOC_DAILINK_DEFS(DL7_FE,
 578                      DAILINK_COMP_ARRAY(COMP_CPU("DL7")),
 579                      DAILINK_COMP_ARRAY(COMP_DUMMY()),
 580                      DAILINK_COMP_ARRAY(COMP_EMPTY()));
 581
 582 SND_SOC_DAILINK_DEFS(DL8_FE,
 583                      DAILINK_COMP_ARRAY(COMP_CPU("DL8")),
 584                      DAILINK_COMP_ARRAY(COMP_DUMMY()),
 585                      DAILINK_COMP_ARRAY(COMP_EMPTY()));
 586
 587 SND_SOC_DAILINK_DEFS(DL10_FE,
 588                      DAILINK_COMP_ARRAY(COMP_CPU("DL10")),
 589                      DAILINK_COMP_ARRAY(COMP_DUMMY()),
 590                      DAILINK_COMP_ARRAY(COMP_EMPTY()));
 591
 592 SND_SOC_DAILINK_DEFS(DL11_FE,
 593                      DAILINK_COMP_ARRAY(COMP_CPU("DL11")),
 594                      DAILINK_COMP_ARRAY(COMP_DUMMY()),
 595                      DAILINK_COMP_ARRAY(COMP_EMPTY()));
 596
 597 SND_SOC_DAILINK_DEFS(UL1_FE,
 598                      DAILINK_COMP_ARRAY(COMP_CPU("UL1")),
 599                      DAILINK_COMP_ARRAY(COMP_DUMMY()),
 600                      DAILINK_COMP_ARRAY(COMP_EMPTY()));
 601
 602 SND_SOC_DAILINK_DEFS(UL2_FE,
 603                      DAILINK_COMP_ARRAY(COMP_CPU("UL2")),
 604                      DAILINK_COMP_ARRAY(COMP_DUMMY()),
 605                      DAILINK_COMP_ARRAY(COMP_EMPTY()));
 606
 607 SND_SOC_DAILINK_DEFS(UL3_FE,
 608                      DAILINK_COMP_ARRAY(COMP_CPU("UL3")),
 609                      DAILINK_COMP_ARRAY(COMP_DUMMY()),
 610                      DAILINK_COMP_ARRAY(COMP_EMPTY()));
 611
 612 SND_SOC_DAILINK_DEFS(UL4_FE,
 613                      DAILINK_COMP_ARRAY(COMP_CPU("UL4")),
 614                      DAILINK_COMP_ARRAY(COMP_DUMMY()),
 615                      DAILINK_COMP_ARRAY(COMP_EMPTY()));
 616
 617 SND_SOC_DAILINK_DEFS(UL5_FE,
 618                      DAILINK_COMP_ARRAY(COMP_CPU("UL5")),
 619                      DAILINK_COMP_ARRAY(COMP_DUMMY()),
 620                      DAILINK_COMP_ARRAY(COMP_EMPTY()));
 621
 622 SND_SOC_DAILINK_DEFS(UL6_FE,
 623                      DAILINK_COMP_ARRAY(COMP_CPU("UL6")),
 624                      DAILINK_COMP_ARRAY(COMP_DUMMY()),
 625                      DAILINK_COMP_ARRAY(COMP_EMPTY()));
 626
 627 SND_SOC_DAILINK_DEFS(UL8_FE,
 628                      DAILINK_COMP_ARRAY(COMP_CPU("UL8")),
 629                      DAILINK_COMP_ARRAY(COMP_DUMMY()),
 630                      DAILINK_COMP_ARRAY(COMP_EMPTY()));
 631
 632 SND_SOC_DAILINK_DEFS(UL9_FE,
 633                      DAILINK_COMP_ARRAY(COMP_CPU("UL9")),
 634                      DAILINK_COMP_ARRAY(COMP_DUMMY()),
 635                      DAILINK_COMP_ARRAY(COMP_EMPTY()));
 636
 637 SND_SOC_DAILINK_DEFS(UL10_FE,
 638                      DAILINK_COMP_ARRAY(COMP_CPU("UL10")),
 639                      DAILINK_COMP_ARRAY(COMP_DUMMY()),
 640                      DAILINK_COMP_ARRAY(COMP_EMPTY()));
 641
 642 /* BE */
 643 SND_SOC_DAILINK_DEFS(DL_SRC_BE,
 644                      DAILINK_COMP_ARRAY(COMP_CPU("DL_SRC")),
 645                      DAILINK_COMP_ARRAY(COMP_CODEC("mt6359-sound",
 646                                                    "mt6359-snd-codec-aif1")),
 647                      DAILINK_COMP_ARRAY(COMP_EMPTY()));
 648
 649 SND_SOC_DAILINK_DEFS(DPTX_BE,
 650                      DAILINK_COMP_ARRAY(COMP_CPU("DPTX")),
 651                      DAILINK_COMP_ARRAY(COMP_DUMMY()),
 652                      DAILINK_COMP_ARRAY(COMP_EMPTY()));
 653
 654 SND_SOC_DAILINK_DEFS(ETDM1_IN_BE,
 655                      DAILINK_COMP_ARRAY(COMP_CPU("ETDM1_IN")),
 656                      DAILINK_COMP_ARRAY(COMP_DUMMY()),
 657                      DAILINK_COMP_ARRAY(COMP_EMPTY()));
 658
 659 SND_SOC_DAILINK_DEFS(ETDM2_IN_BE,
 660                      DAILINK_COMP_ARRAY(COMP_CPU("ETDM2_IN")),
 661                      DAILINK_COMP_ARRAY(COMP_CODEC(RT5682_DEV0_NAME,
 662                                                    RT5682_CODEC_DAI)),
 663                      DAILINK_COMP_ARRAY(COMP_EMPTY()));
 664
 665 SND_SOC_DAILINK_DEFS(ETDM1_OUT_BE,
 666                      DAILINK_COMP_ARRAY(COMP_CPU("ETDM1_OUT")),
 667                      DAILINK_COMP_ARRAY(COMP_CODEC(RT5682_DEV0_NAME,
 668                                                    RT5682_CODEC_DAI)),
 669                      DAILINK_COMP_ARRAY(COMP_EMPTY()));
 670
 671 SND_SOC_DAILINK_DEFS(ETDM2_OUT_BE,
 672                      DAILINK_COMP_ARRAY(COMP_CPU("ETDM2_OUT")),
 673                      DAILINK_COMP_ARRAY(COMP_CODEC(RT1019_DEV0_NAME,
 674                                                    RT1019_CODEC_DAI)),
 675                      DAILINK_COMP_ARRAY(COMP_EMPTY()));
 676
 677 SND_SOC_DAILINK_DEFS(ETDM3_OUT_BE,
 678                      DAILINK_COMP_ARRAY(COMP_CPU("ETDM3_OUT")),
 679                      DAILINK_COMP_ARRAY(COMP_DUMMY()),
 680                      DAILINK_COMP_ARRAY(COMP_EMPTY()));
 681
 682 SND_SOC_DAILINK_DEFS(PCM1_BE,
 683                      DAILINK_COMP_ARRAY(COMP_CPU("PCM1")),
 684                      DAILINK_COMP_ARRAY(COMP_DUMMY()),
 685                      DAILINK_COMP_ARRAY(COMP_EMPTY()));
 686
 687 SND_SOC_DAILINK_DEFS(UL_SRC1_BE,
 688                      DAILINK_COMP_ARRAY(COMP_CPU("UL_SRC1")),
 689                      DAILINK_COMP_ARRAY(COMP_CODEC("mt6359-sound",
 690                                                    "mt6359-snd-codec-aif1"),
 691                                         COMP_CODEC("dmic-codec",
 692                                                    "dmic-hifi")),
 693                      DAILINK_COMP_ARRAY(COMP_EMPTY()));
 694
 695 SND_SOC_DAILINK_DEFS(UL_SRC2_BE,
 696                      DAILINK_COMP_ARRAY(COMP_CPU("UL_SRC2")),
 697                      DAILINK_COMP_ARRAY(COMP_CODEC("mt6359-sound",
 698                                                    "mt6359-snd-codec-aif2")),
 699                      DAILINK_COMP_ARRAY(COMP_EMPTY()));
 700
 701 static struct snd_soc_dai_link mt8195_mt6359_rt1019_rt5682_dai_links[] = {
 702         /* FE */
 703         [DAI_LINK_DL2_FE] = {
 704                 .name = "DL2_FE",
 705                 .stream_name = "DL2 Playback",
 706                 .trigger = {
 707                         SND_SOC_DPCM_TRIGGER_POST,
 708                         SND_SOC_DPCM_TRIGGER_POST,
 709                 },
 710                 .dynamic = 1,
 711                 .dpcm_playback = 1,
 712                 .ops = &mt8195_playback_ops,
 713                 SND_SOC_DAILINK_REG(DL2_FE),
 714         },
 715         [DAI_LINK_DL3_FE] = {
 716                 .name = "DL3_FE",
 717                 .stream_name = "DL3 Playback",
 718                 .trigger = {
 719                         SND_SOC_DPCM_TRIGGER_POST,
 720                         SND_SOC_DPCM_TRIGGER_POST,
 721                 },
 722                 .dynamic = 1,
 723                 .dpcm_playback = 1,
 724                 .ops = &mt8195_playback_ops,
 725                 SND_SOC_DAILINK_REG(DL3_FE),
 726         },
 727         [DAI_LINK_DL6_FE] = {
 728                 .name = "DL6_FE",
 729                 .stream_name = "DL6 Playback",
 730                 .trigger = {
 731                         SND_SOC_DPCM_TRIGGER_POST,
 732                         SND_SOC_DPCM_TRIGGER_POST,
 733                 },
 734                 .dynamic = 1,
 735                 .dpcm_playback = 1,
 736                 .ops = &mt8195_playback_ops,
 737                 SND_SOC_DAILINK_REG(DL6_FE),
 738         },
 739         [DAI_LINK_DL7_FE] = {
 740                 .name = "DL7_FE",
 741                 .stream_name = "DL7 Playback",
 742                 .trigger = {
 743                         SND_SOC_DPCM_TRIGGER_PRE,
 744                         SND_SOC_DPCM_TRIGGER_PRE,
 745                 },
 746                 .dynamic = 1,
 747                 .dpcm_playback = 1,
 748                 SND_SOC_DAILINK_REG(DL7_FE),
 749         },
 750         [DAI_LINK_DL8_FE] = {
 751                 .name = "DL8_FE",
 752                 .stream_name = "DL8 Playback",
 753                 .trigger = {
 754                         SND_SOC_DPCM_TRIGGER_POST,
 755                         SND_SOC_DPCM_TRIGGER_POST,
 756                 },
 757                 .dynamic = 1,
 758                 .dpcm_playback = 1,
 759                 .ops = &mt8195_playback_ops,
 760                 SND_SOC_DAILINK_REG(DL8_FE),
 761         },
 762         [DAI_LINK_DL10_FE] = {
 763                 .name = "DL10_FE",
 764                 .stream_name = "DL10 Playback",
 765                 .trigger = {
 766                         SND_SOC_DPCM_TRIGGER_POST,
 767                         SND_SOC_DPCM_TRIGGER_POST,
 768                 },
 769                 .dynamic = 1,
 770                 .dpcm_playback = 1,
 771                 .ops = &mt8195_hdmitx_dptx_playback_ops,
 772                 SND_SOC_DAILINK_REG(DL10_FE),
 773         },
 774         [DAI_LINK_DL11_FE] = {
 775                 .name = "DL11_FE",
 776                 .stream_name = "DL11 Playback",
 777                 .trigger = {
 778                         SND_SOC_DPCM_TRIGGER_POST,
 779                         SND_SOC_DPCM_TRIGGER_POST,
 780                 },
 781                 .dynamic = 1,
 782                 .dpcm_playback = 1,
 783                 .ops = &mt8195_playback_ops,
 784                 SND_SOC_DAILINK_REG(DL11_FE),
 785         },
 786         [DAI_LINK_UL1_FE] = {
 787                 .name = "UL1_FE",
 788                 .stream_name = "UL1 Capture",
 789                 .trigger = {
 790                         SND_SOC_DPCM_TRIGGER_PRE,
 791                         SND_SOC_DPCM_TRIGGER_PRE,
 792                 },
 793                 .dynamic = 1,
 794                 .dpcm_capture = 1,
 795                 SND_SOC_DAILINK_REG(UL1_FE),
 796         },
 797         [DAI_LINK_UL2_FE] = {
 798                 .name = "UL2_FE",
 799                 .stream_name = "UL2 Capture",
 800                 .trigger = {
 801                         SND_SOC_DPCM_TRIGGER_POST,
 802                         SND_SOC_DPCM_TRIGGER_POST,
 803                 },
 804                 .dynamic = 1,
 805                 .dpcm_capture = 1,
 806                 .ops = &mt8195_capture_ops,
 807                 SND_SOC_DAILINK_REG(UL2_FE),
 808         },
 809         [DAI_LINK_UL3_FE] = {
 810                 .name = "UL3_FE",
 811                 .stream_name = "UL3 Capture",
 812                 .trigger = {
 813                         SND_SOC_DPCM_TRIGGER_POST,
 814                         SND_SOC_DPCM_TRIGGER_POST,
 815                 },
 816                 .dynamic = 1,
 817                 .dpcm_capture = 1,
 818                 .ops = &mt8195_capture_ops,
 819                 SND_SOC_DAILINK_REG(UL3_FE),
 820         },
 821         [DAI_LINK_UL4_FE] = {
 822                 .name = "UL4_FE",
 823                 .stream_name = "UL4 Capture",
 824                 .trigger = {
 825                         SND_SOC_DPCM_TRIGGER_POST,
 826                         SND_SOC_DPCM_TRIGGER_POST,
 827                 },
 828                 .dynamic = 1,
 829                 .dpcm_capture = 1,
 830                 .ops = &mt8195_capture_ops,
 831                 SND_SOC_DAILINK_REG(UL4_FE),
 832         },
 833         [DAI_LINK_UL5_FE] = {
 834                 .name = "UL5_FE",
 835                 .stream_name = "UL5 Capture",
 836                 .trigger = {
 837                         SND_SOC_DPCM_TRIGGER_POST,
 838                         SND_SOC_DPCM_TRIGGER_POST,
 839                 },
 840                 .dynamic = 1,
 841                 .dpcm_capture = 1,
 842                 .ops = &mt8195_capture_ops,
 843                 SND_SOC_DAILINK_REG(UL5_FE),
 844         },
 845         [DAI_LINK_UL6_FE] = {
 846                 .name = "UL6_FE",
 847                 .stream_name = "UL6 Capture",
 848                 .trigger = {
 849                         SND_SOC_DPCM_TRIGGER_PRE,
 850                         SND_SOC_DPCM_TRIGGER_PRE,
 851                 },
 852                 .dynamic = 1,
 853                 .dpcm_capture = 1,
 854                 SND_SOC_DAILINK_REG(UL6_FE),
 855         },
 856         [DAI_LINK_UL8_FE] = {
 857                 .name = "UL8_FE",
 858                 .stream_name = "UL8 Capture",
 859                 .trigger = {
 860                         SND_SOC_DPCM_TRIGGER_POST,
 861                         SND_SOC_DPCM_TRIGGER_POST,
 862                 },
 863                 .dynamic = 1,
 864                 .dpcm_capture = 1,
 865                 .ops = &mt8195_capture_ops,
 866                 SND_SOC_DAILINK_REG(UL8_FE),
 867         },
 868         [DAI_LINK_UL9_FE] = {
 869                 .name = "UL9_FE",
 870                 .stream_name = "UL9 Capture",
 871                 .trigger = {
 872                         SND_SOC_DPCM_TRIGGER_POST,
 873                         SND_SOC_DPCM_TRIGGER_POST,
 874                 },
 875                 .dynamic = 1,
 876                 .dpcm_capture = 1,
 877                 .ops = &mt8195_capture_ops,
 878                 SND_SOC_DAILINK_REG(UL9_FE),
 879         },
 880         [DAI_LINK_UL10_FE] = {
 881                 .name = "UL10_FE",
 882                 .stream_name = "UL10 Capture",
 883                 .trigger = {
 884                         SND_SOC_DPCM_TRIGGER_POST,
 885                         SND_SOC_DPCM_TRIGGER_POST,
 886                 },
 887                 .dynamic = 1,
 888                 .dpcm_capture = 1,
 889                 .ops = &mt8195_capture_ops,
 890                 SND_SOC_DAILINK_REG(UL10_FE),
 891         },
 892         /* BE */
 893         [DAI_LINK_DL_SRC_BE] = {
 894                 .name = "DL_SRC_BE",
 895                 .init = mt8195_mt6359_init,
 896                 .no_pcm = 1,
 897                 .dpcm_playback = 1,
 898                 SND_SOC_DAILINK_REG(DL_SRC_BE),
 899         },
 900         [DAI_LINK_DPTX_BE] = {
 901                 .name = "DPTX_BE",
 902                 .no_pcm = 1,
 903                 .dpcm_playback = 1,
 904                 .ops = &mt8195_dptx_ops,
 905                 .be_hw_params_fixup = mt8195_hdmitx_dptx_hw_params_fixup,
 906                 SND_SOC_DAILINK_REG(DPTX_BE),
 907         },
 908         [DAI_LINK_ETDM1_IN_BE] = {
 909                 .name = "ETDM1_IN_BE",
 910                 .no_pcm = 1,
 911                 .dai_fmt = SND_SOC_DAIFMT_I2S |
 912                         SND_SOC_DAIFMT_NB_NF |
 913                         SND_SOC_DAIFMT_CBS_CFS,
 914                 .dpcm_capture = 1,
 915                 SND_SOC_DAILINK_REG(ETDM1_IN_BE),
 916         },
 917         [DAI_LINK_ETDM2_IN_BE] = {
 918                 .name = "ETDM2_IN_BE",
 919                 .no_pcm = 1,
 920                 .dai_fmt = SND_SOC_DAIFMT_I2S |
 921                         SND_SOC_DAIFMT_NB_NF |
 922                         SND_SOC_DAIFMT_CBS_CFS,
 923                 .dpcm_capture = 1,
 924                 .init = mt8195_rt5682_init,
 925                 .ops = &mt8195_rt5682_etdm_ops,
 926                 .be_hw_params_fixup = mt8195_etdm_hw_params_fixup,
 927                 SND_SOC_DAILINK_REG(ETDM2_IN_BE),
 928         },
 929         [DAI_LINK_ETDM1_OUT_BE] = {
 930                 .name = "ETDM1_OUT_BE",
 931                 .no_pcm = 1,
 932                 .dai_fmt = SND_SOC_DAIFMT_I2S |
 933                         SND_SOC_DAIFMT_NB_NF |
 934                         SND_SOC_DAIFMT_CBS_CFS,
 935                 .dpcm_playback = 1,
 936                 .ops = &mt8195_rt5682_etdm_ops,
 937                 .be_hw_params_fixup = mt8195_etdm_hw_params_fixup,
 938                 SND_SOC_DAILINK_REG(ETDM1_OUT_BE),
 939         },
 940         [DAI_LINK_ETDM2_OUT_BE] = {
 941                 .name = "ETDM2_OUT_BE",
 942                 .no_pcm = 1,
 943                 .dai_fmt = SND_SOC_DAIFMT_I2S |
 944                         SND_SOC_DAIFMT_NB_NF |
 945                         SND_SOC_DAIFMT_CBS_CFS,
 946                 .dpcm_playback = 1,
 947                 SND_SOC_DAILINK_REG(ETDM2_OUT_BE),
 948         },
 949         [DAI_LINK_ETDM3_OUT_BE] = {
 950                 .name = "ETDM3_OUT_BE",
 951                 .no_pcm = 1,
 952                 .dai_fmt = SND_SOC_DAIFMT_I2S |
 953                         SND_SOC_DAIFMT_NB_NF |
 954                         SND_SOC_DAIFMT_CBS_CFS,
 955                 .dpcm_playback = 1,
 956                 .be_hw_params_fixup = mt8195_hdmitx_dptx_hw_params_fixup,
 957                 SND_SOC_DAILINK_REG(ETDM3_OUT_BE),
 958         },
 959         [DAI_LINK_PCM1_BE] = {
 960                 .name = "PCM1_BE",
 961                 .no_pcm = 1,
 962                 .dai_fmt = SND_SOC_DAIFMT_I2S |
 963                         SND_SOC_DAIFMT_NB_NF |
 964                         SND_SOC_DAIFMT_CBS_CFS,
 965                 .dpcm_capture = 1,
 966                 SND_SOC_DAILINK_REG(PCM1_BE),
 967         },
 968         [DAI_LINK_UL_SRC1_BE] = {
 969                 .name = "UL_SRC1_BE",
 970                 .no_pcm = 1,
 971                 .dpcm_capture = 1,
 972                 SND_SOC_DAILINK_REG(UL_SRC1_BE),
 973         },
 974         [DAI_LINK_UL_SRC2_BE] = {
 975                 .name = "UL_SRC2_BE",
 976                 .no_pcm = 1,
 977                 .dpcm_capture = 1,
 978                 SND_SOC_DAILINK_REG(UL_SRC2_BE),
 979         },
 980 };
 981
 982 static struct snd_soc_card mt8195_mt6359_rt1019_rt5682_soc_card = {
 983         .name = "mt8195_r1019_5682",
 984         .owner = THIS_MODULE,
 985         .dai_link = mt8195_mt6359_rt1019_rt5682_dai_links,
 986         .num_links = ARRAY_SIZE(mt8195_mt6359_rt1019_rt5682_dai_links),
 987         .controls = mt8195_mt6359_rt1019_rt5682_controls,
 988         .num_controls = ARRAY_SIZE(mt8195_mt6359_rt1019_rt5682_controls),
 989         .dapm_widgets = mt8195_mt6359_rt1019_rt5682_widgets,
 990         .num_dapm_widgets = ARRAY_SIZE(mt8195_mt6359_rt1019_rt5682_widgets),
 991         .dapm_routes = mt8195_mt6359_rt1019_rt5682_routes,
 992         .num_dapm_routes = ARRAY_SIZE(mt8195_mt6359_rt1019_rt5682_routes),
 993 };
 994
 995 static int mt8195_mt6359_rt1019_rt5682_dev_probe(struct platform_device *pdev)
 996 {
 997         struct snd_soc_card *card = &mt8195_mt6359_rt1019_rt5682_soc_card;
 998         struct device_node *platform_node;
 999         struct snd_soc_dai_link *dai_link;
1000         struct mt8195_mt6359_rt1019_rt5682_priv *priv = NULL;
1001         int ret, i;
1002
1003         card->dev = &pdev->dev;
1004
1005         platform_node = of_parse_phandle(pdev->dev.of_node,
1006                                          "mediatek,platform", 0);
1007         if (!platform_node) {
1008                 dev_dbg(&pdev->dev, "Property 'platform' missing or invalid\n");
1009                 return -EINVAL;
1010         }
1011
1012         for_each_card_prelinks(card, i, dai_link) {
1013                 if (!dai_link->platforms->name)
1014                         dai_link->platforms->of_node = platform_node;
1015
1016                 if (strcmp(dai_link->name, "DPTX_BE") == 0) {
1017                         dai_link->codecs->of_node =
1018                                 of_parse_phandle(pdev->dev.of_node,
1019                                                  "mediatek,dptx-codec", 0);
1020                         if (!dai_link->codecs->of_node) {
1021                                 dev_dbg(&pdev->dev, "No property 'dptx-codec'\n");
1022                         } else {
1023                                 dai_link->codecs->name = NULL;
1024                                 dai_link->codecs->dai_name = "i2s-hifi";
1025                                 dai_link->init = mt8195_dptx_codec_init;
1026                         }
1027                 }
1028
1029                 if (strcmp(dai_link->name, "ETDM3_OUT_BE") == 0) {
1030                         dai_link->codecs->of_node =
1031                                 of_parse_phandle(pdev->dev.of_node,
1032                                                  "mediatek,hdmi-codec", 0);
1033                         if (!dai_link->codecs->of_node) {
1034                                 dev_dbg(&pdev->dev, "No property 'hdmi-codec'\n");
1035                         } else {
1036                                 dai_link->codecs->name = NULL;
1037                                 dai_link->codecs->dai_name = "i2s-hifi";
1038                                 dai_link->init = mt8195_hdmi_codec_init;
1039                         }
1040                 }
1041         }
1042
1043         priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
1044         if (!priv)
1045                 return -ENOMEM;
1046
1047         snd_soc_card_set_drvdata(card, priv);
1048
1049         ret = devm_snd_soc_register_card(&pdev->dev, card);
1050         if (ret)
1051                 dev_err(&pdev->dev, "%s snd_soc_register_card fail %d\n",
1052                         __func__, ret);
1053         return ret;
1054 }
1055
1056 #ifdef CONFIG_OF
1057 static const struct of_device_id mt8195_mt6359_rt1019_rt5682_dt_match[] = {
1058         {.compatible = "mediatek,mt8195_mt6359_rt1019_rt5682",},
1059         {}
1060 };
1061 #endif
1062
1063 static const struct dev_pm_ops mt8195_mt6359_rt1019_rt5682_pm_ops = {
1064         .poweroff = snd_soc_poweroff,
1065         .restore = snd_soc_resume,
1066 };
1067
1068 static struct platform_driver mt8195_mt6359_rt1019_rt5682_driver = {
1069         .driver = {
1070                 .name = "mt8195_mt6359_rt1019_rt5682",
1071 #ifdef CONFIG_OF
1072                 .of_match_table = mt8195_mt6359_rt1019_rt5682_dt_match,
1073 #endif
1074                 .pm = &mt8195_mt6359_rt1019_rt5682_pm_ops,
1075         },
1076         .probe = mt8195_mt6359_rt1019_rt5682_dev_probe,
1077 };
1078
1079 module_platform_driver(mt8195_mt6359_rt1019_rt5682_driver);
1080
1081 /* Module information */
1082 MODULE_DESCRIPTION("MT8195-MT6359-RT1019-RT5682 ALSA SoC machine driver");
1083 MODULE_AUTHOR("Trevor Wu <trevor.wu@mediatek.com>");
1084 MODULE_LICENSE("GPL v2");
1085 MODULE_ALIAS("mt8195_mt6359_rt1019_rt5682 soc card");