sound/soc/codecs/rt5682-sdw.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 //
   3 // rt5682-sdw.c  --  RT5682 ALSA SoC audio component driver
   4 //
   5 // Copyright 2019 Realtek Semiconductor Corp.
   6 // Author: Oder Chiou <oder_chiou@realtek.com>
   7 //
   8
   9 #include <linux/module.h>
  10 #include <linux/moduleparam.h>
  11 #include <linux/init.h>
  12 #include <linux/delay.h>
  13 #include <linux/pm.h>
  14 #include <linux/acpi.h>
  15 #include <linux/gpio.h>
  16 #include <linux/of_gpio.h>
  17 #include <linux/pm_runtime.h>
  18 #include <linux/regulator/consumer.h>
  19 #include <linux/mutex.h>
  20 #include <linux/soundwire/sdw.h>
  21 #include <linux/soundwire/sdw_type.h>
  22 #include <linux/soundwire/sdw_registers.h>
  23 #include <sound/core.h>
  24 #include <sound/pcm.h>
  25 #include <sound/pcm_params.h>
  26 #include <sound/jack.h>
  27 #include <sound/soc.h>
  28 #include <sound/soc-dapm.h>
  29 #include <sound/initval.h>
  30 #include <sound/tlv.h>
  31
  32 #include "rt5682.h"
  33
  34 #define RT5682_SDW_ADDR_L                       0x3000
  35 #define RT5682_SDW_ADDR_H                       0x3001
  36 #define RT5682_SDW_DATA_L                       0x3004
  37 #define RT5682_SDW_DATA_H                       0x3005
  38 #define RT5682_SDW_CMD                          0x3008
  39
  40 static int rt5682_sdw_read(void *context, unsigned int reg, unsigned int *val)
  41 {
  42         struct device *dev = context;
  43         struct rt5682_priv *rt5682 = dev_get_drvdata(dev);
  44         unsigned int data_l, data_h;
  45
  46         regmap_write(rt5682->sdw_regmap, RT5682_SDW_CMD, 0);
  47         regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_H, (reg >> 8) & 0xff);
  48         regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_L, (reg & 0xff));
  49         regmap_read(rt5682->sdw_regmap, RT5682_SDW_DATA_H, &data_h);
  50         regmap_read(rt5682->sdw_regmap, RT5682_SDW_DATA_L, &data_l);
  51
  52         *val = (data_h << 8) | data_l;
  53
  54         dev_vdbg(dev, "[%s] %04x => %04x\n", __func__, reg, *val);
  55
  56         return 0;
  57 }
  58
  59 static int rt5682_sdw_write(void *context, unsigned int reg, unsigned int val)
  60 {
  61         struct device *dev = context;
  62         struct rt5682_priv *rt5682 = dev_get_drvdata(dev);
  63
  64         regmap_write(rt5682->sdw_regmap, RT5682_SDW_CMD, 1);
  65         regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_H, (reg >> 8) & 0xff);
  66         regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_L, (reg & 0xff));
  67         regmap_write(rt5682->sdw_regmap, RT5682_SDW_DATA_H, (val >> 8) & 0xff);
  68         regmap_write(rt5682->sdw_regmap, RT5682_SDW_DATA_L, (val & 0xff));
  69
  70         dev_vdbg(dev, "[%s] %04x <= %04x\n", __func__, reg, val);
  71
  72         return 0;
  73 }
  74
  75 static const struct regmap_config rt5682_sdw_indirect_regmap = {
  76         .reg_bits = 16,
  77         .val_bits = 16,
  78         .max_register = RT5682_I2C_MODE,
  79         .volatile_reg = rt5682_volatile_register,
  80         .readable_reg = rt5682_readable_register,
  81         .cache_type = REGCACHE_RBTREE,
  82         .reg_defaults = rt5682_reg,
  83         .num_reg_defaults = RT5682_REG_NUM,
  84         .use_single_read = true,
  85         .use_single_write = true,
  86         .reg_read = rt5682_sdw_read,
  87         .reg_write = rt5682_sdw_write,
  88 };
  89
  90 struct sdw_stream_data {
  91         struct sdw_stream_runtime *sdw_stream;
  92 };
  93
  94 static int rt5682_set_sdw_stream(struct snd_soc_dai *dai, void *sdw_stream,
  95                                  int direction)
  96 {
  97         struct sdw_stream_data *stream;
  98
  99         if (!sdw_stream)
 100                 return 0;
 101
 102         stream = kzalloc(sizeof(*stream), GFP_KERNEL);
 103         if (!stream)
 104                 return -ENOMEM;
 105
 106         stream->sdw_stream = sdw_stream;
 107
 108         /* Use tx_mask or rx_mask to configure stream tag and set dma_data */
 109         if (direction == SNDRV_PCM_STREAM_PLAYBACK)
 110                 dai->playback_dma_data = stream;
 111         else
 112                 dai->capture_dma_data = stream;
 113
 114         return 0;
 115 }
 116
 117 static void rt5682_sdw_shutdown(struct snd_pcm_substream *substream,
 118                                 struct snd_soc_dai *dai)
 119 {
 120         struct sdw_stream_data *stream;
 121
 122         stream = snd_soc_dai_get_dma_data(dai, substream);
 123         snd_soc_dai_set_dma_data(dai, substream, NULL);
 124         kfree(stream);
 125 }
 126
 127 static int rt5682_sdw_hw_params(struct snd_pcm_substream *substream,
 128                                 struct snd_pcm_hw_params *params,
 129                                 struct snd_soc_dai *dai)
 130 {
 131         struct snd_soc_component *component = dai->component;
 132         struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component);
 133         struct sdw_stream_config stream_config;
 134         struct sdw_port_config port_config;
 135         enum sdw_data_direction direction;
 136         struct sdw_stream_data *stream;
 137         int retval, port, num_channels;
 138         unsigned int val_p = 0, val_c = 0, osr_p = 0, osr_c = 0;
 139
 140         dev_dbg(dai->dev, "%s %s", __func__, dai->name);
 141
 142         stream = snd_soc_dai_get_dma_data(dai, substream);
 143         if (!stream)
 144                 return -ENOMEM;
 145
 146         if (!rt5682->slave)
 147                 return -EINVAL;
 148
 149         /* SoundWire specific configuration */
 150         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
 151                 direction = SDW_DATA_DIR_RX;
 152                 port = 1;
 153         } else {
 154                 direction = SDW_DATA_DIR_TX;
 155                 port = 2;
 156         }
 157
 158         stream_config.frame_rate = params_rate(params);
 159         stream_config.ch_count = params_channels(params);
 160         stream_config.bps = snd_pcm_format_width(params_format(params));
 161         stream_config.direction = direction;
 162
 163         num_channels = params_channels(params);
 164         port_config.ch_mask = (1 << (num_channels)) - 1;
 165         port_config.num = port;
 166
 167         retval = sdw_stream_add_slave(rt5682->slave, &stream_config,
 168                                       &port_config, 1, stream->sdw_stream);
 169         if (retval) {
 170                 dev_err(dai->dev, "Unable to configure port\n");
 171                 return retval;
 172         }
 173
 174         switch (params_rate(params)) {
 175         case 48000:
 176                 val_p = RT5682_SDW_REF_1_48K;
 177                 val_c = RT5682_SDW_REF_2_48K;
 178                 break;
 179         case 96000:
 180                 val_p = RT5682_SDW_REF_1_96K;
 181                 val_c = RT5682_SDW_REF_2_96K;
 182                 break;
 183         case 192000:
 184                 val_p = RT5682_SDW_REF_1_192K;
 185                 val_c = RT5682_SDW_REF_2_192K;
 186                 break;
 187         case 32000:
 188                 val_p = RT5682_SDW_REF_1_32K;
 189                 val_c = RT5682_SDW_REF_2_32K;
 190                 break;
 191         case 24000:
 192                 val_p = RT5682_SDW_REF_1_24K;
 193                 val_c = RT5682_SDW_REF_2_24K;
 194                 break;
 195         case 16000:
 196                 val_p = RT5682_SDW_REF_1_16K;
 197                 val_c = RT5682_SDW_REF_2_16K;
 198                 break;
 199         case 12000:
 200                 val_p = RT5682_SDW_REF_1_12K;
 201                 val_c = RT5682_SDW_REF_2_12K;
 202                 break;
 203         case 8000:
 204                 val_p = RT5682_SDW_REF_1_8K;
 205                 val_c = RT5682_SDW_REF_2_8K;
 206                 break;
 207         case 44100:
 208                 val_p = RT5682_SDW_REF_1_44K;
 209                 val_c = RT5682_SDW_REF_2_44K;
 210                 break;
 211         case 88200:
 212                 val_p = RT5682_SDW_REF_1_88K;
 213                 val_c = RT5682_SDW_REF_2_88K;
 214                 break;
 215         case 176400:
 216                 val_p = RT5682_SDW_REF_1_176K;
 217                 val_c = RT5682_SDW_REF_2_176K;
 218                 break;
 219         case 22050:
 220                 val_p = RT5682_SDW_REF_1_22K;
 221                 val_c = RT5682_SDW_REF_2_22K;
 222                 break;
 223         case 11025:
 224                 val_p = RT5682_SDW_REF_1_11K;
 225                 val_c = RT5682_SDW_REF_2_11K;
 226                 break;
 227         default:
 228                 return -EINVAL;
 229         }
 230
 231         if (params_rate(params) <= 48000) {
 232                 osr_p = RT5682_DAC_OSR_D_8;
 233                 osr_c = RT5682_ADC_OSR_D_8;
 234         } else if (params_rate(params) <= 96000) {
 235                 osr_p = RT5682_DAC_OSR_D_4;
 236                 osr_c = RT5682_ADC_OSR_D_4;
 237         } else {
 238                 osr_p = RT5682_DAC_OSR_D_2;
 239                 osr_c = RT5682_ADC_OSR_D_2;
 240         }
 241
 242         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
 243                 regmap_update_bits(rt5682->regmap, RT5682_SDW_REF_CLK,
 244                         RT5682_SDW_REF_1_MASK, val_p);
 245                 regmap_update_bits(rt5682->regmap, RT5682_ADDA_CLK_1,
 246                         RT5682_DAC_OSR_MASK, osr_p);
 247         } else {
 248                 regmap_update_bits(rt5682->regmap, RT5682_SDW_REF_CLK,
 249                         RT5682_SDW_REF_2_MASK, val_c);
 250                 regmap_update_bits(rt5682->regmap, RT5682_ADDA_CLK_1,
 251                         RT5682_ADC_OSR_MASK, osr_c);
 252         }
 253
 254         return retval;
 255 }
 256
 257 static int rt5682_sdw_hw_free(struct snd_pcm_substream *substream,
 258                               struct snd_soc_dai *dai)
 259 {
 260         struct snd_soc_component *component = dai->component;
 261         struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component);
 262         struct sdw_stream_data *stream =
 263                 snd_soc_dai_get_dma_data(dai, substream);
 264
 265         if (!rt5682->slave)
 266                 return -EINVAL;
 267
 268         sdw_stream_remove_slave(rt5682->slave, stream->sdw_stream);
 269         return 0;
 270 }
 271
 272 static const struct snd_soc_dai_ops rt5682_sdw_ops = {
 273         .hw_params      = rt5682_sdw_hw_params,
 274         .hw_free        = rt5682_sdw_hw_free,
 275         .set_sdw_stream = rt5682_set_sdw_stream,
 276         .shutdown       = rt5682_sdw_shutdown,
 277 };
 278
 279 static struct snd_soc_dai_driver rt5682_dai[] = {
 280         {
 281                 .name = "rt5682-aif1",
 282                 .id = RT5682_AIF1,
 283                 .playback = {
 284                         .stream_name = "AIF1 Playback",
 285                         .channels_min = 1,
 286                         .channels_max = 2,
 287                         .rates = RT5682_STEREO_RATES,
 288                         .formats = RT5682_FORMATS,
 289                 },
 290                 .capture = {
 291                         .stream_name = "AIF1 Capture",
 292                         .channels_min = 1,
 293                         .channels_max = 2,
 294                         .rates = RT5682_STEREO_RATES,
 295                         .formats = RT5682_FORMATS,
 296                 },
 297                 .ops = &rt5682_aif1_dai_ops,
 298         },
 299         {
 300                 .name = "rt5682-aif2",
 301                 .id = RT5682_AIF2,
 302                 .capture = {
 303                         .stream_name = "AIF2 Capture",
 304                         .channels_min = 1,
 305                         .channels_max = 2,
 306                         .rates = RT5682_STEREO_RATES,
 307                         .formats = RT5682_FORMATS,
 308                 },
 309                 .ops = &rt5682_aif2_dai_ops,
 310         },
 311         {
 312                 .name = "rt5682-sdw",
 313                 .id = RT5682_SDW,
 314                 .playback = {
 315                         .stream_name = "SDW Playback",
 316                         .channels_min = 1,
 317                         .channels_max = 2,
 318                         .rates = RT5682_STEREO_RATES,
 319                         .formats = RT5682_FORMATS,
 320                 },
 321                 .capture = {
 322                         .stream_name = "SDW Capture",
 323                         .channels_min = 1,
 324                         .channels_max = 2,
 325                         .rates = RT5682_STEREO_RATES,
 326                         .formats = RT5682_FORMATS,
 327                 },
 328                 .ops = &rt5682_sdw_ops,
 329         },
 330 };
 331
 332 static int rt5682_sdw_init(struct device *dev, struct regmap *regmap,
 333                            struct sdw_slave *slave)
 334 {
 335         struct rt5682_priv *rt5682;
 336         int ret;
 337
 338         rt5682 = devm_kzalloc(dev, sizeof(*rt5682), GFP_KERNEL);
 339         if (!rt5682)
 340                 return -ENOMEM;
 341
 342         dev_set_drvdata(dev, rt5682);
 343         rt5682->slave = slave;
 344         rt5682->sdw_regmap = regmap;
 345         rt5682->is_sdw = true;
 346
 347         rt5682->regmap = devm_regmap_init(dev, NULL, dev,
 348                                           &rt5682_sdw_indirect_regmap);
 349         if (IS_ERR(rt5682->regmap)) {
 350                 ret = PTR_ERR(rt5682->regmap);
 351                 dev_err(dev, "Failed to allocate register map: %d\n",
 352                         ret);
 353                 return ret;
 354         }
 355
 356         /*
 357          * Mark hw_init to false
 358          * HW init will be performed when device reports present
 359          */
 360         rt5682->hw_init = false;
 361         rt5682->first_hw_init = false;
 362
 363         mutex_init(&rt5682->calibrate_mutex);
 364         INIT_DELAYED_WORK(&rt5682->jack_detect_work,
 365                 rt5682_jack_detect_handler);
 366
 367         ret = devm_snd_soc_register_component(dev,
 368                                               &rt5682_soc_component_dev,
 369                                               rt5682_dai, ARRAY_SIZE(rt5682_dai));
 370         dev_dbg(&slave->dev, "%s\n", __func__);
 371
 372         return ret;
 373 }
 374
 375 static int rt5682_io_init(struct device *dev, struct sdw_slave *slave)
 376 {
 377         struct rt5682_priv *rt5682 = dev_get_drvdata(dev);
 378         int ret = 0, loop = 10;
 379         unsigned int val;
 380
 381         if (rt5682->hw_init)
 382                 return 0;
 383
 384         /*
 385          * PM runtime is only enabled when a Slave reports as Attached
 386          */
 387         if (!rt5682->first_hw_init) {
 388                 /* set autosuspend parameters */
 389                 pm_runtime_set_autosuspend_delay(&slave->dev, 3000);
 390                 pm_runtime_use_autosuspend(&slave->dev);
 391
 392                 /* update count of parent 'active' children */
 393                 pm_runtime_set_active(&slave->dev);
 394
 395                 /* make sure the device does not suspend immediately */
 396                 pm_runtime_mark_last_busy(&slave->dev);
 397
 398                 pm_runtime_enable(&slave->dev);
 399         }
 400
 401         pm_runtime_get_noresume(&slave->dev);
 402
 403         while (loop > 0) {
 404                 regmap_read(rt5682->regmap, RT5682_DEVICE_ID, &val);
 405                 if (val == DEVICE_ID)
 406                         break;
 407                 dev_warn(dev, "Device with ID register %x is not rt5682\n", val);
 408                 usleep_range(30000, 30005);
 409                 loop--;
 410         }
 411         if (val != DEVICE_ID) {
 412                 dev_err(dev, "Device with ID register %x is not rt5682\n", val);
 413                 return -ENODEV;
 414         }
 415
 416         if (rt5682->first_hw_init) {
 417                 regcache_cache_only(rt5682->regmap, false);
 418                 regcache_cache_bypass(rt5682->regmap, true);
 419         }
 420
 421         rt5682_calibrate(rt5682);
 422
 423         if (rt5682->first_hw_init) {
 424                 regcache_cache_bypass(rt5682->regmap, false);
 425                 regcache_mark_dirty(rt5682->regmap);
 426                 regcache_sync(rt5682->regmap);
 427
 428                 /* volatile registers */
 429                 regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_2,
 430                         RT5682_EXT_JD_SRC, RT5682_EXT_JD_SRC_MANUAL);
 431
 432                 goto reinit;
 433         }
 434
 435         rt5682_apply_patch_list(rt5682, dev);
 436
 437         regmap_write(rt5682->regmap, RT5682_DEPOP_1, 0x0000);
 438
 439         regmap_update_bits(rt5682->regmap, RT5682_PWR_ANLG_1,
 440                 RT5682_LDO1_DVO_MASK | RT5682_HP_DRIVER_MASK,
 441                 RT5682_LDO1_DVO_12 | RT5682_HP_DRIVER_5X);
 442         regmap_write(rt5682->regmap, RT5682_MICBIAS_2, 0x0080);
 443         regmap_write(rt5682->regmap, RT5682_TEST_MODE_CTRL_1, 0x0000);
 444         regmap_update_bits(rt5682->regmap, RT5682_BIAS_CUR_CTRL_8,
 445                 RT5682_HPA_CP_BIAS_CTRL_MASK, RT5682_HPA_CP_BIAS_3UA);
 446         regmap_update_bits(rt5682->regmap, RT5682_CHARGE_PUMP_1,
 447                 RT5682_CP_CLK_HP_MASK, RT5682_CP_CLK_HP_300KHZ);
 448         regmap_update_bits(rt5682->regmap, RT5682_HP_CHARGE_PUMP_1,
 449                 RT5682_PM_HP_MASK, RT5682_PM_HP_HV);
 450
 451         /* Soundwire */
 452         regmap_write(rt5682->regmap, RT5682_PLL2_INTERNAL, 0xa266);
 453         regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_1, 0x1700);
 454         regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_2, 0x0006);
 455         regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_3, 0x2600);
 456         regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_4, 0x0c8f);
 457         regmap_write(rt5682->regmap, RT5682_PLL_TRACK_2, 0x3000);
 458         regmap_write(rt5682->regmap, RT5682_PLL_TRACK_3, 0x4000);
 459         regmap_update_bits(rt5682->regmap, RT5682_GLB_CLK,
 460                 RT5682_SCLK_SRC_MASK | RT5682_PLL2_SRC_MASK,
 461                 RT5682_SCLK_SRC_PLL2 | RT5682_PLL2_SRC_SDW);
 462
 463         regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_2,
 464                 RT5682_EXT_JD_SRC, RT5682_EXT_JD_SRC_MANUAL);
 465         regmap_write(rt5682->regmap, RT5682_CBJ_CTRL_1, 0xd142);
 466         regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_5, 0x0700, 0x0600);
 467         regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_3,
 468                 RT5682_CBJ_IN_BUF_EN, RT5682_CBJ_IN_BUF_EN);
 469         regmap_update_bits(rt5682->regmap, RT5682_SAR_IL_CMD_1,
 470                 RT5682_SAR_POW_MASK, RT5682_SAR_POW_EN);
 471         regmap_update_bits(rt5682->regmap, RT5682_RC_CLK_CTRL,
 472                 RT5682_POW_IRQ | RT5682_POW_JDH |
 473                 RT5682_POW_ANA, RT5682_POW_IRQ |
 474                 RT5682_POW_JDH | RT5682_POW_ANA);
 475         regmap_update_bits(rt5682->regmap, RT5682_PWR_ANLG_2,
 476                 RT5682_PWR_JDH, RT5682_PWR_JDH);
 477         regmap_update_bits(rt5682->regmap, RT5682_IRQ_CTRL_2,
 478                 RT5682_JD1_EN_MASK | RT5682_JD1_IRQ_MASK,
 479                 RT5682_JD1_EN | RT5682_JD1_IRQ_PUL);
 480
 481 reinit:
 482         mod_delayed_work(system_power_efficient_wq,
 483                 &rt5682->jack_detect_work, msecs_to_jiffies(250));
 484
 485         /* Mark Slave initialization complete */
 486         rt5682->hw_init = true;
 487         rt5682->first_hw_init = true;
 488
 489         pm_runtime_mark_last_busy(&slave->dev);
 490         pm_runtime_put_autosuspend(&slave->dev);
 491
 492         dev_dbg(&slave->dev, "%s hw_init complete\n", __func__);
 493
 494         return ret;
 495 }
 496
 497 static bool rt5682_sdw_readable_register(struct device *dev, unsigned int reg)
 498 {
 499         switch (reg) {
 500         case 0x00e0:
 501         case 0x00f0:
 502         case 0x3000:
 503         case 0x3001:
 504         case 0x3004:
 505         case 0x3005:
 506         case 0x3008:
 507                 return true;
 508         default:
 509                 return false;
 510         }
 511 }
 512
 513 static const struct regmap_config rt5682_sdw_regmap = {
 514         .name = "sdw",
 515         .reg_bits = 32,
 516         .val_bits = 8,
 517         .max_register = RT5682_I2C_MODE,
 518         .readable_reg = rt5682_sdw_readable_register,
 519         .cache_type = REGCACHE_NONE,
 520         .use_single_read = true,
 521         .use_single_write = true,
 522 };
 523
 524 static int rt5682_update_status(struct sdw_slave *slave,
 525                                         enum sdw_slave_status status)
 526 {
 527         struct rt5682_priv *rt5682 = dev_get_drvdata(&slave->dev);
 528
 529         /* Update the status */
 530         rt5682->status = status;
 531
 532         if (status == SDW_SLAVE_UNATTACHED)
 533                 rt5682->hw_init = false;
 534
 535         /*
 536          * Perform initialization only if slave status is present and
 537          * hw_init flag is false
 538          */
 539         if (rt5682->hw_init || rt5682->status != SDW_SLAVE_ATTACHED)
 540                 return 0;
 541
 542         /* perform I/O transfers required for Slave initialization */
 543         return rt5682_io_init(&slave->dev, slave);
 544 }
 545
 546 static int rt5682_read_prop(struct sdw_slave *slave)
 547 {
 548         struct sdw_slave_prop *prop = &slave->prop;
 549         int nval, i;
 550         u32 bit;
 551         unsigned long addr;
 552         struct sdw_dpn_prop *dpn;
 553
 554         prop->scp_int1_mask = SDW_SCP_INT1_IMPL_DEF | SDW_SCP_INT1_BUS_CLASH |
 555                 SDW_SCP_INT1_PARITY;
 556         prop->quirks = SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY;
 557
 558         prop->paging_support = false;
 559
 560         /* first we need to allocate memory for set bits in port lists */
 561         prop->source_ports = 0x4;       /* BITMAP: 00000100 */
 562         prop->sink_ports = 0x2;         /* BITMAP: 00000010 */
 563
 564         nval = hweight32(prop->source_ports);
 565         prop->src_dpn_prop = devm_kcalloc(&slave->dev, nval,
 566                                           sizeof(*prop->src_dpn_prop),
 567                                           GFP_KERNEL);
 568         if (!prop->src_dpn_prop)
 569                 return -ENOMEM;
 570
 571         i = 0;
 572         dpn = prop->src_dpn_prop;
 573         addr = prop->source_ports;
 574         for_each_set_bit(bit, &addr, 32) {
 575                 dpn[i].num = bit;
 576                 dpn[i].type = SDW_DPN_FULL;
 577                 dpn[i].simple_ch_prep_sm = true;
 578                 dpn[i].ch_prep_timeout = 10;
 579                 i++;
 580         }
 581
 582         /* do this again for sink now */
 583         nval = hweight32(prop->sink_ports);
 584         prop->sink_dpn_prop = devm_kcalloc(&slave->dev, nval,
 585                                            sizeof(*prop->sink_dpn_prop),
 586                                            GFP_KERNEL);
 587         if (!prop->sink_dpn_prop)
 588                 return -ENOMEM;
 589
 590         i = 0;
 591         dpn = prop->sink_dpn_prop;
 592         addr = prop->sink_ports;
 593         for_each_set_bit(bit, &addr, 32) {
 594                 dpn[i].num = bit;
 595                 dpn[i].type = SDW_DPN_FULL;
 596                 dpn[i].simple_ch_prep_sm = true;
 597                 dpn[i].ch_prep_timeout = 10;
 598                 i++;
 599         }
 600
 601         /* set the timeout values */
 602         prop->clk_stop_timeout = 20;
 603
 604         /* wake-up event */
 605         prop->wake_capable = 1;
 606
 607         return 0;
 608 }
 609
 610 /* Bus clock frequency */
 611 #define RT5682_CLK_FREQ_9600000HZ 9600000
 612 #define RT5682_CLK_FREQ_12000000HZ 12000000
 613 #define RT5682_CLK_FREQ_6000000HZ 6000000
 614 #define RT5682_CLK_FREQ_4800000HZ 4800000
 615 #define RT5682_CLK_FREQ_2400000HZ 2400000
 616 #define RT5682_CLK_FREQ_12288000HZ 12288000
 617
 618 static int rt5682_clock_config(struct device *dev)
 619 {
 620         struct rt5682_priv *rt5682 = dev_get_drvdata(dev);
 621         unsigned int clk_freq, value;
 622
 623         clk_freq = (rt5682->params.curr_dr_freq >> 1);
 624
 625         switch (clk_freq) {
 626         case RT5682_CLK_FREQ_12000000HZ:
 627                 value = 0x0;
 628                 break;
 629         case RT5682_CLK_FREQ_6000000HZ:
 630                 value = 0x1;
 631                 break;
 632         case RT5682_CLK_FREQ_9600000HZ:
 633                 value = 0x2;
 634                 break;
 635         case RT5682_CLK_FREQ_4800000HZ:
 636                 value = 0x3;
 637                 break;
 638         case RT5682_CLK_FREQ_2400000HZ:
 639                 value = 0x4;
 640                 break;
 641         case RT5682_CLK_FREQ_12288000HZ:
 642                 value = 0x5;
 643                 break;
 644         default:
 645                 return -EINVAL;
 646         }
 647
 648         regmap_write(rt5682->sdw_regmap, 0xe0, value);
 649         regmap_write(rt5682->sdw_regmap, 0xf0, value);
 650
 651         dev_dbg(dev, "%s complete, clk_freq=%d\n", __func__, clk_freq);
 652
 653         return 0;
 654 }
 655
 656 static int rt5682_bus_config(struct sdw_slave *slave,
 657                                         struct sdw_bus_params *params)
 658 {
 659         struct rt5682_priv *rt5682 = dev_get_drvdata(&slave->dev);
 660         int ret;
 661
 662         memcpy(&rt5682->params, params, sizeof(*params));
 663
 664         ret = rt5682_clock_config(&slave->dev);
 665         if (ret < 0)
 666                 dev_err(&slave->dev, "Invalid clk config");
 667
 668         return ret;
 669 }
 670
 671 static int rt5682_interrupt_callback(struct sdw_slave *slave,
 672                                         struct sdw_slave_intr_status *status)
 673 {
 674         struct rt5682_priv *rt5682 = dev_get_drvdata(&slave->dev);
 675
 676         dev_dbg(&slave->dev,
 677                 "%s control_port_stat=%x", __func__, status->control_port);
 678
 679         if (status->control_port & 0x4) {
 680                 mod_delayed_work(system_power_efficient_wq,
 681                         &rt5682->jack_detect_work, msecs_to_jiffies(rt5682->irq_work_delay_time));
 682         }
 683
 684         return 0;
 685 }
 686
 687 static const struct sdw_slave_ops rt5682_slave_ops = {
 688         .read_prop = rt5682_read_prop,
 689         .interrupt_callback = rt5682_interrupt_callback,
 690         .update_status = rt5682_update_status,
 691         .bus_config = rt5682_bus_config,
 692 };
 693
 694 static int rt5682_sdw_probe(struct sdw_slave *slave,
 695                            const struct sdw_device_id *id)
 696 {
 697         struct regmap *regmap;
 698
 699         /* Regmap Initialization */
 700         regmap = devm_regmap_init_sdw(slave, &rt5682_sdw_regmap);
 701         if (IS_ERR(regmap))
 702                 return -EINVAL;
 703
 704         rt5682_sdw_init(&slave->dev, regmap, slave);
 705
 706         return 0;
 707 }
 708
 709 static int rt5682_sdw_remove(struct sdw_slave *slave)
 710 {
 711         struct rt5682_priv *rt5682 = dev_get_drvdata(&slave->dev);
 712
 713         if (rt5682 && rt5682->hw_init)
 714                 cancel_delayed_work_sync(&rt5682->jack_detect_work);
 715
 716         return 0;
 717 }
 718
 719 static const struct sdw_device_id rt5682_id[] = {
 720         SDW_SLAVE_ENTRY_EXT(0x025d, 0x5682, 0x2, 0, 0),
 721         {},
 722 };
 723 MODULE_DEVICE_TABLE(sdw, rt5682_id);
 724
 725 static int __maybe_unused rt5682_dev_suspend(struct device *dev)
 726 {
 727         struct rt5682_priv *rt5682 = dev_get_drvdata(dev);
 728
 729         if (!rt5682->hw_init)
 730                 return 0;
 731
 732         cancel_delayed_work_sync(&rt5682->jack_detect_work);
 733
 734         regcache_cache_only(rt5682->regmap, true);
 735         regcache_mark_dirty(rt5682->regmap);
 736
 737         return 0;
 738 }
 739
 740 static int __maybe_unused rt5682_dev_resume(struct device *dev)
 741 {
 742         struct sdw_slave *slave = dev_to_sdw_dev(dev);
 743         struct rt5682_priv *rt5682 = dev_get_drvdata(dev);
 744         unsigned long time;
 745
 746         if (!rt5682->hw_init)
 747                 return 0;
 748
 749         if (!slave->unattach_request)
 750                 goto regmap_sync;
 751
 752         time = wait_for_completion_timeout(&slave->initialization_complete,
 753                                 msecs_to_jiffies(RT5682_PROBE_TIMEOUT));
 754         if (!time) {
 755                 dev_err(&slave->dev, "Initialization not complete, timed out\n");
 756                 return -ETIMEDOUT;
 757         }
 758
 759 regmap_sync:
 760         slave->unattach_request = 0;
 761         regcache_cache_only(rt5682->regmap, false);
 762         regcache_sync(rt5682->regmap);
 763
 764         return 0;
 765 }
 766
 767 static const struct dev_pm_ops rt5682_pm = {
 768         SET_SYSTEM_SLEEP_PM_OPS(rt5682_dev_suspend, rt5682_dev_resume)
 769         SET_RUNTIME_PM_OPS(rt5682_dev_suspend, rt5682_dev_resume, NULL)
 770 };
 771
 772 static struct sdw_driver rt5682_sdw_driver = {
 773         .driver = {
 774                 .name = "rt5682",
 775                 .owner = THIS_MODULE,
 776                 .pm = &rt5682_pm,
 777         },
 778         .probe = rt5682_sdw_probe,
 779         .remove = rt5682_sdw_remove,
 780         .ops = &rt5682_slave_ops,
 781         .id_table = rt5682_id,
 782 };
 783 module_sdw_driver(rt5682_sdw_driver);
 784
 785 MODULE_DESCRIPTION("ASoC RT5682 driver SDW");
 786 MODULE_AUTHOR("Oder Chiou <oder_chiou@realtek.com>");
 787 MODULE_LICENSE("GPL v2");