kernel/dma/direct.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Copyright (C) 2018-2020 Christoph Hellwig.
   4  *
   5  * DMA operations that map physical memory directly without using an IOMMU.
   6  */
   7 #include <linux/memblock.h> /* for max_pfn */
   8 #include <linux/export.h>
   9 #include <linux/mm.h>
  10 #include <linux/dma-map-ops.h>
  11 #include <linux/scatterlist.h>
  12 #include <linux/pfn.h>
  13 #include <linux/vmalloc.h>
  14 #include <linux/set_memory.h>
  15 #include <linux/slab.h>
  16 #include "direct.h"
  17
  18 /*
  19  * Most architectures use ZONE_DMA for the first 16 Megabytes, but some use
  20  * it for entirely different regions. In that case the arch code needs to
  21  * override the variable below for dma-direct to work properly.
  22  */
  23 unsigned int zone_dma_bits __ro_after_init = 24;
  24
  25 static inline dma_addr_t phys_to_dma_direct(struct device *dev,
  26                 phys_addr_t phys)
  27 {
  28         if (force_dma_unencrypted(dev))
  29                 return phys_to_dma_unencrypted(dev, phys);
  30         return phys_to_dma(dev, phys);
  31 }
  32
  33 static inline struct page *dma_direct_to_page(struct device *dev,
  34                 dma_addr_t dma_addr)
  35 {
  36         return pfn_to_page(PHYS_PFN(dma_to_phys(dev, dma_addr)));
  37 }
  38
  39 u64 dma_direct_get_required_mask(struct device *dev)
  40 {
  41         phys_addr_t phys = (phys_addr_t)(max_pfn - 1) << PAGE_SHIFT;
  42         u64 max_dma = phys_to_dma_direct(dev, phys);
  43
  44         return (1ULL << (fls64(max_dma) - 1)) * 2 - 1;
  45 }
  46
  47 static gfp_t dma_direct_optimal_gfp_mask(struct device *dev, u64 dma_mask,
  48                                   u64 *phys_limit)
  49 {
  50         u64 dma_limit = min_not_zero(dma_mask, dev->bus_dma_limit);
  51
  52         /*
  53          * Optimistically try the zone that the physical address mask falls
  54          * into first.  If that returns memory that isn't actually addressable
  55          * we will fallback to the next lower zone and try again.
  56          *
  57          * Note that GFP_DMA32 and GFP_DMA are no ops without the corresponding
  58          * zones.
  59          */
  60         *phys_limit = dma_to_phys(dev, dma_limit);
  61         if (*phys_limit <= DMA_BIT_MASK(zone_dma_bits))
  62                 return GFP_DMA;
  63         if (*phys_limit <= DMA_BIT_MASK(32))
  64                 return GFP_DMA32;
  65         return 0;
  66 }
  67
  68 static bool dma_coherent_ok(struct device *dev, phys_addr_t phys, size_t size)
  69 {
  70         dma_addr_t dma_addr = phys_to_dma_direct(dev, phys);
  71
  72         if (dma_addr == DMA_MAPPING_ERROR)
  73                 return false;
  74         return dma_addr + size - 1 <=
  75                 min_not_zero(dev->coherent_dma_mask, dev->bus_dma_limit);
  76 }
  77
  78 static void __dma_direct_free_pages(struct device *dev, struct page *page,
  79                                     size_t size)
  80 {
  81         if (IS_ENABLED(CONFIG_DMA_RESTRICTED_POOL) &&
  82             swiotlb_free(dev, page, size))
  83                 return;
  84         dma_free_contiguous(dev, page, size);
  85 }
  86
  87 static struct page *__dma_direct_alloc_pages(struct device *dev, size_t size,
  88                 gfp_t gfp)
  89 {
  90         int node = dev_to_node(dev);
  91         struct page *page = NULL;
  92         u64 phys_limit;
  93
  94         WARN_ON_ONCE(!PAGE_ALIGNED(size));
  95
  96         gfp |= dma_direct_optimal_gfp_mask(dev, dev->coherent_dma_mask,
  97                                            &phys_limit);
  98         if (IS_ENABLED(CONFIG_DMA_RESTRICTED_POOL) &&
  99             is_swiotlb_for_alloc(dev)) {
 100                 page = swiotlb_alloc(dev, size);
 101                 if (page && !dma_coherent_ok(dev, page_to_phys(page), size)) {
 102                         __dma_direct_free_pages(dev, page, size);
 103                         return NULL;
 104                 }
 105                 return page;
 106         }
 107
 108         page = dma_alloc_contiguous(dev, size, gfp);
 109         if (page && !dma_coherent_ok(dev, page_to_phys(page), size)) {
 110                 dma_free_contiguous(dev, page, size);
 111                 page = NULL;
 112         }
 113 again:
 114         if (!page)
 115                 page = alloc_pages_node(node, gfp, get_order(size));
 116         if (page && !dma_coherent_ok(dev, page_to_phys(page), size)) {
 117                 dma_free_contiguous(dev, page, size);
 118                 page = NULL;
 119
 120                 if (IS_ENABLED(CONFIG_ZONE_DMA32) &&
 121                     phys_limit < DMA_BIT_MASK(64) &&
 122                     !(gfp & (GFP_DMA32 | GFP_DMA))) {
 123                         gfp |= GFP_DMA32;
 124                         goto again;
 125                 }
 126
 127                 if (IS_ENABLED(CONFIG_ZONE_DMA) && !(gfp & GFP_DMA)) {
 128                         gfp = (gfp & ~GFP_DMA32) | GFP_DMA;
 129                         goto again;
 130                 }
 131         }
 132
 133         return page;
 134 }
 135
 136 static void *dma_direct_alloc_from_pool(struct device *dev, size_t size,
 137                 dma_addr_t *dma_handle, gfp_t gfp)
 138 {
 139         struct page *page;
 140         u64 phys_mask;
 141         void *ret;
 142
 143         gfp |= dma_direct_optimal_gfp_mask(dev, dev->coherent_dma_mask,
 144                                            &phys_mask);
 145         page = dma_alloc_from_pool(dev, size, &ret, gfp, dma_coherent_ok);
 146         if (!page)
 147                 return NULL;
 148         *dma_handle = phys_to_dma_direct(dev, page_to_phys(page));
 149         return ret;
 150 }
 151
 152 void *dma_direct_alloc(struct device *dev, size_t size,
 153                 dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs)
 154 {
 155         struct page *page;
 156         void *ret;
 157         int err;
 158
 159         size = PAGE_ALIGN(size);
 160         if (attrs & DMA_ATTR_NO_WARN)
 161                 gfp |= __GFP_NOWARN;
 162
 163         if ((attrs & DMA_ATTR_NO_KERNEL_MAPPING) &&
 164             !force_dma_unencrypted(dev) && !is_swiotlb_for_alloc(dev)) {
 165                 page = __dma_direct_alloc_pages(dev, size, gfp & ~__GFP_ZERO);
 166                 if (!page)
 167                         return NULL;
 168                 /* remove any dirty cache lines on the kernel alias */
 169                 if (!PageHighMem(page))
 170                         arch_dma_prep_coherent(page, size);
 171                 *dma_handle = phys_to_dma_direct(dev, page_to_phys(page));
 172                 /* return the page pointer as the opaque cookie */
 173                 return page;
 174         }
 175
 176         if (!IS_ENABLED(CONFIG_ARCH_HAS_DMA_SET_UNCACHED) &&
 177             !IS_ENABLED(CONFIG_DMA_DIRECT_REMAP) &&
 178             !IS_ENABLED(CONFIG_DMA_GLOBAL_POOL) &&
 179             !dev_is_dma_coherent(dev) &&
 180             !is_swiotlb_for_alloc(dev))
 181                 return arch_dma_alloc(dev, size, dma_handle, gfp, attrs);
 182
 183         if (IS_ENABLED(CONFIG_DMA_GLOBAL_POOL) &&
 184             !dev_is_dma_coherent(dev))
 185                 return dma_alloc_from_global_coherent(dev, size, dma_handle);
 186
 187         /*
 188          * Remapping or decrypting memory may block. If either is required and
 189          * we can't block, allocate the memory from the atomic pools.
 190          * If restricted DMA (i.e., is_swiotlb_for_alloc) is required, one must
 191          * set up another device coherent pool by shared-dma-pool and use
 192          * dma_alloc_from_dev_coherent instead.
 193          */
 194         if (IS_ENABLED(CONFIG_DMA_COHERENT_POOL) &&
 195             !gfpflags_allow_blocking(gfp) &&
 196             (force_dma_unencrypted(dev) ||
 197              (IS_ENABLED(CONFIG_DMA_DIRECT_REMAP) &&
 198               !dev_is_dma_coherent(dev))) &&
 199             !is_swiotlb_for_alloc(dev))
 200                 return dma_direct_alloc_from_pool(dev, size, dma_handle, gfp);
 201
 202         /* we always manually zero the memory once we are done */
 203         page = __dma_direct_alloc_pages(dev, size, gfp & ~__GFP_ZERO);
 204         if (!page)
 205                 return NULL;
 206
 207         if ((IS_ENABLED(CONFIG_DMA_DIRECT_REMAP) &&
 208              !dev_is_dma_coherent(dev)) ||
 209             (IS_ENABLED(CONFIG_DMA_REMAP) && PageHighMem(page))) {
 210                 /* remove any dirty cache lines on the kernel alias */
 211                 arch_dma_prep_coherent(page, size);
 212
 213                 /* create a coherent mapping */
 214                 ret = dma_common_contiguous_remap(page, size,
 215                                 dma_pgprot(dev, PAGE_KERNEL, attrs),
 216                                 __builtin_return_address(0));
 217                 if (!ret)
 218                         goto out_free_pages;
 219                 if (force_dma_unencrypted(dev)) {
 220                         err = set_memory_decrypted((unsigned long)ret,
 221                                                    1 << get_order(size));
 222                         if (err)
 223                                 goto out_free_pages;
 224                 }
 225                 memset(ret, 0, size);
 226                 goto done;
 227         }
 228
 229         if (PageHighMem(page)) {
 230                 /*
 231                  * Depending on the cma= arguments and per-arch setup
 232                  * dma_alloc_contiguous could return highmem pages.
 233                  * Without remapping there is no way to return them here,
 234                  * so log an error and fail.
 235                  */
 236                 dev_info(dev, "Rejecting highmem page from CMA.\n");
 237                 goto out_free_pages;
 238         }
 239
 240         ret = page_address(page);
 241         if (force_dma_unencrypted(dev)) {
 242                 err = set_memory_decrypted((unsigned long)ret,
 243                                            1 << get_order(size));
 244                 if (err)
 245                         goto out_free_pages;
 246         }
 247
 248         memset(ret, 0, size);
 249
 250         if (IS_ENABLED(CONFIG_ARCH_HAS_DMA_SET_UNCACHED) &&
 251             !dev_is_dma_coherent(dev)) {
 252                 arch_dma_prep_coherent(page, size);
 253                 ret = arch_dma_set_uncached(ret, size);
 254                 if (IS_ERR(ret))
 255                         goto out_encrypt_pages;
 256         }
 257 done:
 258         *dma_handle = phys_to_dma_direct(dev, page_to_phys(page));
 259         return ret;
 260
 261 out_encrypt_pages:
 262         if (force_dma_unencrypted(dev)) {
 263                 err = set_memory_encrypted((unsigned long)page_address(page),
 264                                            1 << get_order(size));
 265                 /* If memory cannot be re-encrypted, it must be leaked */
 266                 if (err)
 267                         return NULL;
 268         }
 269 out_free_pages:
 270         __dma_direct_free_pages(dev, page, size);
 271         return NULL;
 272 }
 273
 274 void dma_direct_free(struct device *dev, size_t size,
 275                 void *cpu_addr, dma_addr_t dma_addr, unsigned long attrs)
 276 {
 277         unsigned int page_order = get_order(size);
 278
 279         if ((attrs & DMA_ATTR_NO_KERNEL_MAPPING) &&
 280             !force_dma_unencrypted(dev) && !is_swiotlb_for_alloc(dev)) {
 281                 /* cpu_addr is a struct page cookie, not a kernel address */
 282                 dma_free_contiguous(dev, cpu_addr, size);
 283                 return;
 284         }
 285
 286         if (!IS_ENABLED(CONFIG_ARCH_HAS_DMA_SET_UNCACHED) &&
 287             !IS_ENABLED(CONFIG_DMA_DIRECT_REMAP) &&
 288             !IS_ENABLED(CONFIG_DMA_GLOBAL_POOL) &&
 289             !dev_is_dma_coherent(dev) &&
 290             !is_swiotlb_for_alloc(dev)) {
 291                 arch_dma_free(dev, size, cpu_addr, dma_addr, attrs);
 292                 return;
 293         }
 294
 295         if (IS_ENABLED(CONFIG_DMA_GLOBAL_POOL) &&
 296             !dev_is_dma_coherent(dev)) {
 297                 if (!dma_release_from_global_coherent(page_order, cpu_addr))
 298                         WARN_ON_ONCE(1);
 299                 return;
 300         }
 301
 302         /* If cpu_addr is not from an atomic pool, dma_free_from_pool() fails */
 303         if (IS_ENABLED(CONFIG_DMA_COHERENT_POOL) &&
 304             dma_free_from_pool(dev, cpu_addr, PAGE_ALIGN(size)))
 305                 return;
 306
 307         if (force_dma_unencrypted(dev))
 308                 set_memory_encrypted((unsigned long)cpu_addr, 1 << page_order);
 309
 310         if (IS_ENABLED(CONFIG_DMA_REMAP) && is_vmalloc_addr(cpu_addr))
 311                 vunmap(cpu_addr);
 312         else if (IS_ENABLED(CONFIG_ARCH_HAS_DMA_CLEAR_UNCACHED))
 313                 arch_dma_clear_uncached(cpu_addr, size);
 314
 315         __dma_direct_free_pages(dev, dma_direct_to_page(dev, dma_addr), size);
 316 }
 317
 318 struct page *dma_direct_alloc_pages(struct device *dev, size_t size,
 319                 dma_addr_t *dma_handle, enum dma_data_direction dir, gfp_t gfp)
 320 {
 321         struct page *page;
 322         void *ret;
 323
 324         if (IS_ENABLED(CONFIG_DMA_COHERENT_POOL) &&
 325             force_dma_unencrypted(dev) && !gfpflags_allow_blocking(gfp) &&
 326             !is_swiotlb_for_alloc(dev))
 327                 return dma_direct_alloc_from_pool(dev, size, dma_handle, gfp);
 328
 329         page = __dma_direct_alloc_pages(dev, size, gfp);
 330         if (!page)
 331                 return NULL;
 332         if (PageHighMem(page)) {
 333                 /*
 334                  * Depending on the cma= arguments and per-arch setup
 335                  * dma_alloc_contiguous could return highmem pages.
 336                  * Without remapping there is no way to return them here,
 337                  * so log an error and fail.
 338                  */
 339                 dev_info(dev, "Rejecting highmem page from CMA.\n");
 340                 goto out_free_pages;
 341         }
 342
 343         ret = page_address(page);
 344         if (force_dma_unencrypted(dev)) {
 345                 if (set_memory_decrypted((unsigned long)ret,
 346                                 1 << get_order(size)))
 347                         goto out_free_pages;
 348         }
 349         memset(ret, 0, size);
 350         *dma_handle = phys_to_dma_direct(dev, page_to_phys(page));
 351         return page;
 352 out_free_pages:
 353         __dma_direct_free_pages(dev, page, size);
 354         return NULL;
 355 }
 356
 357 void dma_direct_free_pages(struct device *dev, size_t size,
 358                 struct page *page, dma_addr_t dma_addr,
 359                 enum dma_data_direction dir)
 360 {
 361         unsigned int page_order = get_order(size);
 362         void *vaddr = page_address(page);
 363
 364         /* If cpu_addr is not from an atomic pool, dma_free_from_pool() fails */
 365         if (IS_ENABLED(CONFIG_DMA_COHERENT_POOL) &&
 366             dma_free_from_pool(dev, vaddr, size))
 367                 return;
 368
 369         if (force_dma_unencrypted(dev))
 370                 set_memory_encrypted((unsigned long)vaddr, 1 << page_order);
 371
 372         __dma_direct_free_pages(dev, page, size);
 373 }
 374
 375 #if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE) || \
 376     defined(CONFIG_SWIOTLB)
 377 void dma_direct_sync_sg_for_device(struct device *dev,
 378                 struct scatterlist *sgl, int nents, enum dma_data_direction dir)
 379 {
 380         struct scatterlist *sg;
 381         int i;
 382
 383         for_each_sg(sgl, sg, nents, i) {
 384                 phys_addr_t paddr = dma_to_phys(dev, sg_dma_address(sg));
 385
 386                 if (unlikely(is_swiotlb_buffer(dev, paddr)))
 387                         swiotlb_sync_single_for_device(dev, paddr, sg->length,
 388                                                        dir);
 389
 390                 if (!dev_is_dma_coherent(dev))
 391                         arch_sync_dma_for_device(paddr, sg->length,
 392                                         dir);
 393         }
 394 }
 395 #endif
 396
 397 #if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU) || \
 398     defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL) || \
 399     defined(CONFIG_SWIOTLB)
 400 void dma_direct_sync_sg_for_cpu(struct device *dev,
 401                 struct scatterlist *sgl, int nents, enum dma_data_direction dir)
 402 {
 403         struct scatterlist *sg;
 404         int i;
 405
 406         for_each_sg(sgl, sg, nents, i) {
 407                 phys_addr_t paddr = dma_to_phys(dev, sg_dma_address(sg));
 408
 409                 if (!dev_is_dma_coherent(dev))
 410                         arch_sync_dma_for_cpu(paddr, sg->length, dir);
 411
 412                 if (unlikely(is_swiotlb_buffer(dev, paddr)))
 413                         swiotlb_sync_single_for_cpu(dev, paddr, sg->length,
 414                                                     dir);
 415
 416                 if (dir == DMA_FROM_DEVICE)
 417                         arch_dma_mark_clean(paddr, sg->length);
 418         }
 419
 420         if (!dev_is_dma_coherent(dev))
 421                 arch_sync_dma_for_cpu_all();
 422 }
 423
 424 void dma_direct_unmap_sg(struct device *dev, struct scatterlist *sgl,
 425                 int nents, enum dma_data_direction dir, unsigned long attrs)
 426 {
 427         struct scatterlist *sg;
 428         int i;
 429
 430         for_each_sg(sgl, sg, nents, i)
 431                 dma_direct_unmap_page(dev, sg->dma_address, sg_dma_len(sg), dir,
 432                              attrs);
 433 }
 434 #endif
 435
 436 int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl, int nents,
 437                 enum dma_data_direction dir, unsigned long attrs)
 438 {
 439         int i;
 440         struct scatterlist *sg;
 441
 442         for_each_sg(sgl, sg, nents, i) {
 443                 sg->dma_address = dma_direct_map_page(dev, sg_page(sg),
 444                                 sg->offset, sg->length, dir, attrs);
 445                 if (sg->dma_address == DMA_MAPPING_ERROR)
 446                         goto out_unmap;
 447                 sg_dma_len(sg) = sg->length;
 448         }
 449
 450         return nents;
 451
 452 out_unmap:
 453         dma_direct_unmap_sg(dev, sgl, i, dir, attrs | DMA_ATTR_SKIP_CPU_SYNC);
 454         return -EIO;
 455 }
 456
 457 dma_addr_t dma_direct_map_resource(struct device *dev, phys_addr_t paddr,
 458                 size_t size, enum dma_data_direction dir, unsigned long attrs)
 459 {
 460         dma_addr_t dma_addr = paddr;
 461
 462         if (unlikely(!dma_capable(dev, dma_addr, size, false))) {
 463                 dev_err_once(dev,
 464                              "DMA addr %pad+%zu overflow (mask %llx, bus limit %llx).\n",
 465                              &dma_addr, size, *dev->dma_mask, dev->bus_dma_limit);
 466                 WARN_ON_ONCE(1);
 467                 return DMA_MAPPING_ERROR;
 468         }
 469
 470         return dma_addr;
 471 }
 472
 473 int dma_direct_get_sgtable(struct device *dev, struct sg_table *sgt,
 474                 void *cpu_addr, dma_addr_t dma_addr, size_t size,
 475                 unsigned long attrs)
 476 {
 477         struct page *page = dma_direct_to_page(dev, dma_addr);
 478         int ret;
 479
 480         ret = sg_alloc_table(sgt, 1, GFP_KERNEL);
 481         if (!ret)
 482                 sg_set_page(sgt->sgl, page, PAGE_ALIGN(size), 0);
 483         return ret;
 484 }
 485
 486 bool dma_direct_can_mmap(struct device *dev)
 487 {
 488         return dev_is_dma_coherent(dev) ||
 489                 IS_ENABLED(CONFIG_DMA_NONCOHERENT_MMAP);
 490 }
 491
 492 int dma_direct_mmap(struct device *dev, struct vm_area_struct *vma,
 493                 void *cpu_addr, dma_addr_t dma_addr, size_t size,
 494                 unsigned long attrs)
 495 {
 496         unsigned long user_count = vma_pages(vma);
 497         unsigned long count = PAGE_ALIGN(size) >> PAGE_SHIFT;
 498         unsigned long pfn = PHYS_PFN(dma_to_phys(dev, dma_addr));
 499         int ret = -ENXIO;
 500
 501         vma->vm_page_prot = dma_pgprot(dev, vma->vm_page_prot, attrs);
 502
 503         if (dma_mmap_from_dev_coherent(dev, vma, cpu_addr, size, &ret))
 504                 return ret;
 505         if (dma_mmap_from_global_coherent(vma, cpu_addr, size, &ret))
 506                 return ret;
 507
 508         if (vma->vm_pgoff >= count || user_count > count - vma->vm_pgoff)
 509                 return -ENXIO;
 510         return remap_pfn_range(vma, vma->vm_start, pfn + vma->vm_pgoff,
 511                         user_count << PAGE_SHIFT, vma->vm_page_prot);
 512 }
 513
 514 int dma_direct_supported(struct device *dev, u64 mask)
 515 {
 516         u64 min_mask = (max_pfn - 1) << PAGE_SHIFT;
 517
 518         /*
 519          * Because 32-bit DMA masks are so common we expect every architecture
 520          * to be able to satisfy them - either by not supporting more physical
 521          * memory, or by providing a ZONE_DMA32.  If neither is the case, the
 522          * architecture needs to use an IOMMU instead of the direct mapping.
 523          */
 524         if (mask >= DMA_BIT_MASK(32))
 525                 return 1;
 526
 527         /*
 528          * This check needs to be against the actual bit mask value, so use
 529          * phys_to_dma_unencrypted() here so that the SME encryption mask isn't
 530          * part of the check.
 531          */
 532         if (IS_ENABLED(CONFIG_ZONE_DMA))
 533                 min_mask = min_t(u64, min_mask, DMA_BIT_MASK(zone_dma_bits));
 534         return mask >= phys_to_dma_unencrypted(dev, min_mask);
 535 }
 536
 537 size_t dma_direct_max_mapping_size(struct device *dev)
 538 {
 539         /* If SWIOTLB is active, use its maximum mapping size */
 540         if (is_swiotlb_active(dev) &&
 541             (dma_addressing_limited(dev) || is_swiotlb_force_bounce(dev)))
 542                 return swiotlb_max_mapping_size(dev);
 543         return SIZE_MAX;
 544 }
 545
 546 bool dma_direct_need_sync(struct device *dev, dma_addr_t dma_addr)
 547 {
 548         return !dev_is_dma_coherent(dev) ||
 549                is_swiotlb_buffer(dev, dma_to_phys(dev, dma_addr));
 550 }
 551
 552 /**
 553  * dma_direct_set_offset - Assign scalar offset for a single DMA range.
 554  * @dev:        device pointer; needed to "own" the alloced memory.
 555  * @cpu_start:  beginning of memory region covered by this offset.
 556  * @dma_start:  beginning of DMA/PCI region covered by this offset.
 557  * @size:       size of the region.
 558  *
 559  * This is for the simple case of a uniform offset which cannot
 560  * be discovered by "dma-ranges".
 561  *
 562  * It returns -ENOMEM if out of memory, -EINVAL if a map
 563  * already exists, 0 otherwise.
 564  *
 565  * Note: any call to this from a driver is a bug.  The mapping needs
 566  * to be described by the device tree or other firmware interfaces.
 567  */
 568 int dma_direct_set_offset(struct device *dev, phys_addr_t cpu_start,
 569                          dma_addr_t dma_start, u64 size)
 570 {
 571         struct bus_dma_region *map;
 572         u64 offset = (u64)cpu_start - (u64)dma_start;
 573
 574         if (dev->dma_range_map) {
 575                 dev_err(dev, "attempt to add DMA range to existing map\n");
 576                 return -EINVAL;
 577         }
 578
 579         if (!offset)
 580                 return 0;
 581
 582         map = kcalloc(2, sizeof(*map), GFP_KERNEL);
 583         if (!map)
 584                 return -ENOMEM;
 585         map[0].cpu_start = cpu_start;
 586         map[0].dma_start = dma_start;
 587         map[0].offset = offset;
 588         map[0].size = size;
 589         dev->dma_range_map = map;
 590         return 0;
 591 }