1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (c) 2018, The Linux Foundation. All rights reserved. */
4 #ifndef _DT_BINDINGS_POWER_QCOM_RPMPD_H
5 #define _DT_BINDINGS_POWER_QCOM_RPMPD_H
7 /* SDM845 Power Domain Indexes */
10 #define SDM845_MX_AO 2
12 #define SDM845_CX_AO 4
18 /* SDX55 Power Domain Indexes */
23 /* SM8150 Power Domain Indexes */
30 #define SM8150_MX_AO 6
32 #define SM8150_CX_AO 8
34 #define SM8150_MMCX_AO 10
36 /* SM8250 Power Domain Indexes */
38 #define SM8250_CX_AO 1
44 #define SM8250_MMCX_AO 7
46 #define SM8250_MX_AO 9
48 /* SM8350 Power Domain Indexes */
50 #define SM8350_CX_AO 1
56 #define SM8350_MMCX_AO 7
58 #define SM8350_MX_AO 9
60 #define SM8350_MXC_AO 11
63 /* SC7180 Power Domain Indexes */
65 #define SC7180_CX_AO 1
68 #define SC7180_MX_AO 4
73 /* SC7280 Power Domain Indexes */
75 #define SC7280_CX_AO 1
79 #define SC7280_MX_AO 5
84 /* SC8180X Power Domain Indexes */
86 #define SC8180X_CX_AO 1
91 #define SC8180X_MMCX 6
92 #define SC8180X_MMCX_AO 7
95 #define SC8180X_MX_AO 10
97 /* SDM845 Power Domain performance levels */
98 #define RPMH_REGULATOR_LEVEL_RETENTION 16
99 #define RPMH_REGULATOR_LEVEL_MIN_SVS 48
100 #define RPMH_REGULATOR_LEVEL_LOW_SVS 64
101 #define RPMH_REGULATOR_LEVEL_SVS 128
102 #define RPMH_REGULATOR_LEVEL_SVS_L0 144
103 #define RPMH_REGULATOR_LEVEL_SVS_L1 192
104 #define RPMH_REGULATOR_LEVEL_SVS_L2 224
105 #define RPMH_REGULATOR_LEVEL_NOM 256
106 #define RPMH_REGULATOR_LEVEL_NOM_L1 320
107 #define RPMH_REGULATOR_LEVEL_NOM_L2 336
108 #define RPMH_REGULATOR_LEVEL_TURBO 384
109 #define RPMH_REGULATOR_LEVEL_TURBO_L1 416
111 /* MDM9607 Power Domains */
112 #define MDM9607_VDDCX 0
113 #define MDM9607_VDDCX_AO 1
114 #define MDM9607_VDDCX_VFL 2
115 #define MDM9607_VDDMX 3
116 #define MDM9607_VDDMX_AO 4
117 #define MDM9607_VDDMX_VFL 5
119 /* MSM8939 Power Domains */
120 #define MSM8939_VDDMDCX 0
121 #define MSM8939_VDDMDCX_AO 1
122 #define MSM8939_VDDMDCX_VFC 2
123 #define MSM8939_VDDCX 3
124 #define MSM8939_VDDCX_AO 4
125 #define MSM8939_VDDCX_VFC 5
126 #define MSM8939_VDDMX 6
127 #define MSM8939_VDDMX_AO 7
129 /* MSM8916 Power Domain Indexes */
130 #define MSM8916_VDDCX 0
131 #define MSM8916_VDDCX_AO 1
132 #define MSM8916_VDDCX_VFC 2
133 #define MSM8916_VDDMX 3
134 #define MSM8916_VDDMX_AO 4
136 /* MSM8976 Power Domain Indexes */
137 #define MSM8976_VDDCX 0
138 #define MSM8976_VDDCX_AO 1
139 #define MSM8976_VDDCX_VFL 2
140 #define MSM8976_VDDMX 3
141 #define MSM8976_VDDMX_AO 4
142 #define MSM8976_VDDMX_VFL 5
144 /* MSM8994 Power Domain Indexes */
145 #define MSM8994_VDDCX 0
146 #define MSM8994_VDDCX_AO 1
147 #define MSM8994_VDDCX_VFC 2
148 #define MSM8994_VDDMX 3
149 #define MSM8994_VDDMX_AO 4
150 #define MSM8994_VDDGFX 5
151 #define MSM8994_VDDGFX_VFC 6
153 /* MSM8996 Power Domain Indexes */
154 #define MSM8996_VDDCX 0
155 #define MSM8996_VDDCX_AO 1
156 #define MSM8996_VDDCX_VFC 2
157 #define MSM8996_VDDMX 3
158 #define MSM8996_VDDMX_AO 4
159 #define MSM8996_VDDSSCX 5
160 #define MSM8996_VDDSSCX_VFC 6
162 /* MSM8998 Power Domain Indexes */
163 #define MSM8998_VDDCX 0
164 #define MSM8998_VDDCX_AO 1
165 #define MSM8998_VDDCX_VFL 2
166 #define MSM8998_VDDMX 3
167 #define MSM8998_VDDMX_AO 4
168 #define MSM8998_VDDMX_VFL 5
169 #define MSM8998_SSCCX 6
170 #define MSM8998_SSCCX_VFL 7
171 #define MSM8998_SSCMX 8
172 #define MSM8998_SSCMX_VFL 9
174 /* QCS404 Power Domains */
175 #define QCS404_VDDMX 0
176 #define QCS404_VDDMX_AO 1
177 #define QCS404_VDDMX_VFL 2
178 #define QCS404_LPICX 3
179 #define QCS404_LPICX_VFL 4
180 #define QCS404_LPIMX 5
181 #define QCS404_LPIMX_VFL 6
183 /* SDM660 Power Domains */
184 #define SDM660_VDDCX 0
185 #define SDM660_VDDCX_AO 1
186 #define SDM660_VDDCX_VFL 2
187 #define SDM660_VDDMX 3
188 #define SDM660_VDDMX_AO 4
189 #define SDM660_VDDMX_VFL 5
190 #define SDM660_SSCCX 6
191 #define SDM660_SSCCX_VFL 7
192 #define SDM660_SSCMX 8
193 #define SDM660_SSCMX_VFL 9
195 /* SM6115 Power Domains */
196 #define SM6115_VDDCX 0
197 #define SM6115_VDDCX_AO 1
198 #define SM6115_VDDCX_VFL 2
199 #define SM6115_VDDMX 3
200 #define SM6115_VDDMX_AO 4
201 #define SM6115_VDDMX_VFL 5
202 #define SM6115_VDD_LPI_CX 6
203 #define SM6115_VDD_LPI_MX 7
205 /* RPM SMD Power Domain performance levels */
206 #define RPM_SMD_LEVEL_RETENTION 16
207 #define RPM_SMD_LEVEL_RETENTION_PLUS 32
208 #define RPM_SMD_LEVEL_MIN_SVS 48
209 #define RPM_SMD_LEVEL_LOW_SVS 64
210 #define RPM_SMD_LEVEL_SVS 128
211 #define RPM_SMD_LEVEL_SVS_PLUS 192
212 #define RPM_SMD_LEVEL_NOM 256
213 #define RPM_SMD_LEVEL_NOM_PLUS 320
214 #define RPM_SMD_LEVEL_TURBO 384
215 #define RPM_SMD_LEVEL_TURBO_NO_CPR 416
216 #define RPM_SMD_LEVEL_TURBO_HIGH 448
217 #define RPM_SMD_LEVEL_BINNING 512