1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
2 /* Copyright (c) 2020 Mellanox Technologies Ltd. */
4 #include <linux/iova.h>
5 #include <linux/mlx5/driver.h>
8 static int alloc_pd(struct mlx5_vdpa_dev *dev, u32 *pdn, u16 uid)
10 struct mlx5_core_dev *mdev = dev->mdev;
12 u32 out[MLX5_ST_SZ_DW(alloc_pd_out)] = {};
13 u32 in[MLX5_ST_SZ_DW(alloc_pd_in)] = {};
16 MLX5_SET(alloc_pd_in, in, opcode, MLX5_CMD_OP_ALLOC_PD);
17 MLX5_SET(alloc_pd_in, in, uid, uid);
19 err = mlx5_cmd_exec_inout(mdev, alloc_pd, in, out);
21 *pdn = MLX5_GET(alloc_pd_out, out, pd);
26 static int dealloc_pd(struct mlx5_vdpa_dev *dev, u32 pdn, u16 uid)
28 u32 in[MLX5_ST_SZ_DW(dealloc_pd_in)] = {};
29 struct mlx5_core_dev *mdev = dev->mdev;
31 MLX5_SET(dealloc_pd_in, in, opcode, MLX5_CMD_OP_DEALLOC_PD);
32 MLX5_SET(dealloc_pd_in, in, pd, pdn);
33 MLX5_SET(dealloc_pd_in, in, uid, uid);
34 return mlx5_cmd_exec_in(mdev, dealloc_pd, in);
37 static int get_null_mkey(struct mlx5_vdpa_dev *dev, u32 *null_mkey)
39 u32 out[MLX5_ST_SZ_DW(query_special_contexts_out)] = {};
40 u32 in[MLX5_ST_SZ_DW(query_special_contexts_in)] = {};
41 struct mlx5_core_dev *mdev = dev->mdev;
44 MLX5_SET(query_special_contexts_in, in, opcode, MLX5_CMD_OP_QUERY_SPECIAL_CONTEXTS);
45 err = mlx5_cmd_exec_inout(mdev, query_special_contexts, in, out);
47 *null_mkey = MLX5_GET(query_special_contexts_out, out, null_mkey);
51 static int create_uctx(struct mlx5_vdpa_dev *mvdev, u16 *uid)
53 u32 out[MLX5_ST_SZ_DW(create_uctx_out)] = {};
58 if (MLX5_CAP_GEN(mvdev->mdev, umem_uid_0))
61 /* 0 means not supported */
62 if (!MLX5_CAP_GEN(mvdev->mdev, log_max_uctx))
65 inlen = MLX5_ST_SZ_BYTES(create_uctx_in);
66 in = kzalloc(inlen, GFP_KERNEL);
70 MLX5_SET(create_uctx_in, in, opcode, MLX5_CMD_OP_CREATE_UCTX);
71 MLX5_SET(create_uctx_in, in, uctx.cap, MLX5_UCTX_CAP_RAW_TX);
73 err = mlx5_cmd_exec(mvdev->mdev, in, inlen, out, sizeof(out));
76 *uid = MLX5_GET(create_uctx_out, out, uid);
81 static void destroy_uctx(struct mlx5_vdpa_dev *mvdev, u32 uid)
83 u32 out[MLX5_ST_SZ_DW(destroy_uctx_out)] = {};
84 u32 in[MLX5_ST_SZ_DW(destroy_uctx_in)] = {};
89 MLX5_SET(destroy_uctx_in, in, opcode, MLX5_CMD_OP_DESTROY_UCTX);
90 MLX5_SET(destroy_uctx_in, in, uid, uid);
92 mlx5_cmd_exec(mvdev->mdev, in, sizeof(in), out, sizeof(out));
95 int mlx5_vdpa_create_tis(struct mlx5_vdpa_dev *mvdev, void *in, u32 *tisn)
97 u32 out[MLX5_ST_SZ_DW(create_tis_out)] = {};
100 MLX5_SET(create_tis_in, in, opcode, MLX5_CMD_OP_CREATE_TIS);
101 MLX5_SET(create_tis_in, in, uid, mvdev->res.uid);
102 err = mlx5_cmd_exec_inout(mvdev->mdev, create_tis, in, out);
104 *tisn = MLX5_GET(create_tis_out, out, tisn);
109 void mlx5_vdpa_destroy_tis(struct mlx5_vdpa_dev *mvdev, u32 tisn)
111 u32 in[MLX5_ST_SZ_DW(destroy_tis_in)] = {};
113 MLX5_SET(destroy_tis_in, in, opcode, MLX5_CMD_OP_DESTROY_TIS);
114 MLX5_SET(destroy_tis_in, in, uid, mvdev->res.uid);
115 MLX5_SET(destroy_tis_in, in, tisn, tisn);
116 mlx5_cmd_exec_in(mvdev->mdev, destroy_tis, in);
119 int mlx5_vdpa_create_rqt(struct mlx5_vdpa_dev *mvdev, void *in, int inlen, u32 *rqtn)
121 u32 out[MLX5_ST_SZ_DW(create_rqt_out)] = {};
124 MLX5_SET(create_rqt_in, in, opcode, MLX5_CMD_OP_CREATE_RQT);
125 err = mlx5_cmd_exec(mvdev->mdev, in, inlen, out, sizeof(out));
127 *rqtn = MLX5_GET(create_rqt_out, out, rqtn);
132 int mlx5_vdpa_modify_rqt(struct mlx5_vdpa_dev *mvdev, void *in, int inlen, u32 rqtn)
134 u32 out[MLX5_ST_SZ_DW(create_rqt_out)] = {};
136 MLX5_SET(modify_rqt_in, in, uid, mvdev->res.uid);
137 MLX5_SET(modify_rqt_in, in, rqtn, rqtn);
138 MLX5_SET(modify_rqt_in, in, opcode, MLX5_CMD_OP_MODIFY_RQT);
139 return mlx5_cmd_exec(mvdev->mdev, in, inlen, out, sizeof(out));
142 void mlx5_vdpa_destroy_rqt(struct mlx5_vdpa_dev *mvdev, u32 rqtn)
144 u32 in[MLX5_ST_SZ_DW(destroy_rqt_in)] = {};
146 MLX5_SET(destroy_rqt_in, in, opcode, MLX5_CMD_OP_DESTROY_RQT);
147 MLX5_SET(destroy_rqt_in, in, uid, mvdev->res.uid);
148 MLX5_SET(destroy_rqt_in, in, rqtn, rqtn);
149 mlx5_cmd_exec_in(mvdev->mdev, destroy_rqt, in);
152 int mlx5_vdpa_create_tir(struct mlx5_vdpa_dev *mvdev, void *in, u32 *tirn)
154 u32 out[MLX5_ST_SZ_DW(create_tir_out)] = {};
157 MLX5_SET(create_tir_in, in, opcode, MLX5_CMD_OP_CREATE_TIR);
158 err = mlx5_cmd_exec_inout(mvdev->mdev, create_tir, in, out);
160 *tirn = MLX5_GET(create_tir_out, out, tirn);
165 void mlx5_vdpa_destroy_tir(struct mlx5_vdpa_dev *mvdev, u32 tirn)
167 u32 in[MLX5_ST_SZ_DW(destroy_tir_in)] = {};
169 MLX5_SET(destroy_tir_in, in, opcode, MLX5_CMD_OP_DESTROY_TIR);
170 MLX5_SET(destroy_tir_in, in, uid, mvdev->res.uid);
171 MLX5_SET(destroy_tir_in, in, tirn, tirn);
172 mlx5_cmd_exec_in(mvdev->mdev, destroy_tir, in);
175 int mlx5_vdpa_alloc_transport_domain(struct mlx5_vdpa_dev *mvdev, u32 *tdn)
177 u32 out[MLX5_ST_SZ_DW(alloc_transport_domain_out)] = {};
178 u32 in[MLX5_ST_SZ_DW(alloc_transport_domain_in)] = {};
181 MLX5_SET(alloc_transport_domain_in, in, opcode, MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN);
182 MLX5_SET(alloc_transport_domain_in, in, uid, mvdev->res.uid);
184 err = mlx5_cmd_exec_inout(mvdev->mdev, alloc_transport_domain, in, out);
186 *tdn = MLX5_GET(alloc_transport_domain_out, out, transport_domain);
191 void mlx5_vdpa_dealloc_transport_domain(struct mlx5_vdpa_dev *mvdev, u32 tdn)
193 u32 in[MLX5_ST_SZ_DW(dealloc_transport_domain_in)] = {};
195 MLX5_SET(dealloc_transport_domain_in, in, opcode, MLX5_CMD_OP_DEALLOC_TRANSPORT_DOMAIN);
196 MLX5_SET(dealloc_transport_domain_in, in, uid, mvdev->res.uid);
197 MLX5_SET(dealloc_transport_domain_in, in, transport_domain, tdn);
198 mlx5_cmd_exec_in(mvdev->mdev, dealloc_transport_domain, in);
201 int mlx5_vdpa_create_mkey(struct mlx5_vdpa_dev *mvdev, struct mlx5_core_mkey *mkey, u32 *in,
204 u32 lout[MLX5_ST_SZ_DW(create_mkey_out)] = {};
209 MLX5_SET(create_mkey_in, in, opcode, MLX5_CMD_OP_CREATE_MKEY);
210 MLX5_SET(create_mkey_in, in, uid, mvdev->res.uid);
212 err = mlx5_cmd_exec(mvdev->mdev, in, inlen, lout, sizeof(lout));
216 mkc = MLX5_ADDR_OF(create_mkey_in, in, memory_key_mkey_entry);
217 mkey_index = MLX5_GET(create_mkey_out, lout, mkey_index);
218 mkey->iova = MLX5_GET64(mkc, mkc, start_addr);
219 mkey->size = MLX5_GET64(mkc, mkc, len);
220 mkey->key |= mlx5_idx_to_mkey(mkey_index);
221 mkey->pd = MLX5_GET(mkc, mkc, pd);
225 int mlx5_vdpa_destroy_mkey(struct mlx5_vdpa_dev *mvdev, struct mlx5_core_mkey *mkey)
227 u32 in[MLX5_ST_SZ_DW(destroy_mkey_in)] = {};
229 MLX5_SET(destroy_mkey_in, in, uid, mvdev->res.uid);
230 MLX5_SET(destroy_mkey_in, in, opcode, MLX5_CMD_OP_DESTROY_MKEY);
231 MLX5_SET(destroy_mkey_in, in, mkey_index, mlx5_mkey_to_idx(mkey->key));
232 return mlx5_cmd_exec_in(mvdev->mdev, destroy_mkey, in);
235 static int init_ctrl_vq(struct mlx5_vdpa_dev *mvdev)
237 mvdev->cvq.iotlb = vhost_iotlb_alloc(0, 0);
238 if (!mvdev->cvq.iotlb)
241 vringh_set_iotlb(&mvdev->cvq.vring, mvdev->cvq.iotlb, &mvdev->cvq.iommu_lock);
246 static void cleanup_ctrl_vq(struct mlx5_vdpa_dev *mvdev)
248 vhost_iotlb_free(mvdev->cvq.iotlb);
251 int mlx5_vdpa_alloc_resources(struct mlx5_vdpa_dev *mvdev)
253 u64 offset = MLX5_CAP64_DEV_VDPA_EMULATION(mvdev->mdev, doorbell_bar_offset);
254 struct mlx5_vdpa_resources *res = &mvdev->res;
255 struct mlx5_core_dev *mdev = mvdev->mdev;
260 mlx5_vdpa_warn(mvdev, "resources already allocated\n");
263 mutex_init(&mvdev->mr.mkey_mtx);
264 res->uar = mlx5_get_uars_page(mdev);
265 if (IS_ERR(res->uar)) {
266 err = PTR_ERR(res->uar);
270 err = create_uctx(mvdev, &res->uid);
274 err = alloc_pd(mvdev, &res->pdn, res->uid);
278 err = get_null_mkey(mvdev, &res->null_mkey);
282 kick_addr = mdev->bar_addr + offset;
283 res->phys_kick_addr = kick_addr;
285 res->kick_addr = ioremap(kick_addr, PAGE_SIZE);
286 if (!res->kick_addr) {
291 err = init_ctrl_vq(mvdev);
300 iounmap(res->kick_addr);
302 dealloc_pd(mvdev, res->pdn, res->uid);
304 destroy_uctx(mvdev, res->uid);
306 mlx5_put_uars_page(mdev, res->uar);
308 mutex_destroy(&mvdev->mr.mkey_mtx);
312 void mlx5_vdpa_free_resources(struct mlx5_vdpa_dev *mvdev)
314 struct mlx5_vdpa_resources *res = &mvdev->res;
319 cleanup_ctrl_vq(mvdev);
320 iounmap(res->kick_addr);
321 res->kick_addr = NULL;
322 dealloc_pd(mvdev, res->pdn, res->uid);
323 destroy_uctx(mvdev, res->uid);
324 mlx5_put_uars_page(mvdev->mdev, res->uar);
325 mutex_destroy(&mvdev->mr.mkey_mtx);