2 * Copyright (c) 2016, Mellanox Technologies. All rights reserved.
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5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
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8 * OpenIB.org BSD license below:
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11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
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21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 #ifndef __MLX5_EN_TC_H__
34 #define __MLX5_EN_TC_H__
36 #include <net/pkt_cls.h>
40 #include "en/tc_tun.h"
43 #define MLX5E_TC_FLOW_ID_MASK 0x0000ffff
45 #ifdef CONFIG_MLX5_ESWITCH
47 #define NIC_FLOW_ATTR_SZ (sizeof(struct mlx5_flow_attr) +\
48 sizeof(struct mlx5_nic_flow_attr))
49 #define ESW_FLOW_ATTR_SZ (sizeof(struct mlx5_flow_attr) +\
50 sizeof(struct mlx5_esw_flow_attr))
51 #define ns_to_attr_sz(ns) (((ns) == MLX5_FLOW_NAMESPACE_FDB) ?\
56 int mlx5e_tc_num_filters(struct mlx5e_priv *priv, unsigned long flags);
58 struct mlx5e_tc_update_priv {
59 struct net_device *tun_dev;
62 struct mlx5_nic_flow_attr {
65 struct mlx5_flow_table *hairpin_ft;
68 struct mlx5_flow_attr {
70 struct mlx5_fc *counter;
71 struct mlx5_modify_hdr *modify_hdr;
72 struct mlx5_ct_attr ct_attr;
73 struct mlx5e_tc_flow_parse_attr *parse_attr;
77 struct mlx5_flow_table *ft;
78 struct mlx5_flow_table *dest_ft;
85 struct mlx5_esw_flow_attr esw_attr[0];
86 struct mlx5_nic_flow_attr nic_attr[0];
90 struct mlx5_rx_tun_attr {
95 } src_ip; /* Valid if decap_vport is not zero */
99 } dst_ip; /* Valid if decap_vport is not zero */
103 #define MLX5E_TC_TABLE_CHAIN_TAG_BITS 16
104 #define MLX5E_TC_TABLE_CHAIN_TAG_MASK GENMASK(MLX5E_TC_TABLE_CHAIN_TAG_BITS - 1, 0)
106 #if IS_ENABLED(CONFIG_MLX5_CLS_ACT)
108 struct tunnel_match_key {
109 struct flow_dissector_key_control enc_control;
110 struct flow_dissector_key_keyid enc_key_id;
111 struct flow_dissector_key_ports enc_tp;
112 struct flow_dissector_key_ip enc_ip;
114 struct flow_dissector_key_ipv4_addrs enc_ipv4;
115 struct flow_dissector_key_ipv6_addrs enc_ipv6;
121 struct tunnel_match_enc_opts {
122 struct flow_dissector_key_enc_opts key;
123 struct flow_dissector_key_enc_opts mask;
126 /* Tunnel_id mapping is TUNNEL_INFO_BITS + ENC_OPTS_BITS.
127 * Upper TUNNEL_INFO_BITS for general tunnel info.
128 * Lower ENC_OPTS_BITS bits for enc_opts.
130 #define TUNNEL_INFO_BITS 12
131 #define TUNNEL_INFO_BITS_MASK GENMASK(TUNNEL_INFO_BITS - 1, 0)
132 #define ENC_OPTS_BITS 12
133 #define ENC_OPTS_BITS_MASK GENMASK(ENC_OPTS_BITS - 1, 0)
134 #define TUNNEL_ID_BITS (TUNNEL_INFO_BITS + ENC_OPTS_BITS)
135 #define TUNNEL_ID_MASK GENMASK(TUNNEL_ID_BITS - 1, 0)
138 MLX5E_TC_FLAG_INGRESS_BIT,
139 MLX5E_TC_FLAG_EGRESS_BIT,
140 MLX5E_TC_FLAG_NIC_OFFLOAD_BIT,
141 MLX5E_TC_FLAG_ESW_OFFLOAD_BIT,
142 MLX5E_TC_FLAG_FT_OFFLOAD_BIT,
143 MLX5E_TC_FLAG_LAST_EXPORTED_BIT = MLX5E_TC_FLAG_FT_OFFLOAD_BIT,
146 #define MLX5_TC_FLAG(flag) BIT(MLX5E_TC_FLAG_##flag##_BIT)
148 int mlx5e_tc_esw_init(struct rhashtable *tc_ht);
149 void mlx5e_tc_esw_cleanup(struct rhashtable *tc_ht);
150 bool mlx5e_is_eswitch_flow(struct mlx5e_tc_flow *flow);
152 int mlx5e_configure_flower(struct net_device *dev, struct mlx5e_priv *priv,
153 struct flow_cls_offload *f, unsigned long flags);
154 int mlx5e_delete_flower(struct net_device *dev, struct mlx5e_priv *priv,
155 struct flow_cls_offload *f, unsigned long flags);
157 int mlx5e_stats_flower(struct net_device *dev, struct mlx5e_priv *priv,
158 struct flow_cls_offload *f, unsigned long flags);
160 int mlx5e_tc_configure_matchall(struct mlx5e_priv *priv,
161 struct tc_cls_matchall_offload *f);
162 int mlx5e_tc_delete_matchall(struct mlx5e_priv *priv,
163 struct tc_cls_matchall_offload *f);
164 void mlx5e_tc_stats_matchall(struct mlx5e_priv *priv,
165 struct tc_cls_matchall_offload *ma);
167 struct mlx5e_encap_entry;
168 void mlx5e_tc_encap_flows_add(struct mlx5e_priv *priv,
169 struct mlx5e_encap_entry *e,
170 struct list_head *flow_list);
171 void mlx5e_tc_encap_flows_del(struct mlx5e_priv *priv,
172 struct mlx5e_encap_entry *e,
173 struct list_head *flow_list);
174 bool mlx5e_encap_take(struct mlx5e_encap_entry *e);
175 void mlx5e_encap_put(struct mlx5e_priv *priv, struct mlx5e_encap_entry *e);
177 void mlx5e_take_all_encap_flows(struct mlx5e_encap_entry *e, struct list_head *flow_list);
178 void mlx5e_put_flow_list(struct mlx5e_priv *priv, struct list_head *flow_list);
180 struct mlx5e_neigh_hash_entry;
181 struct mlx5e_encap_entry *
182 mlx5e_get_next_init_encap(struct mlx5e_neigh_hash_entry *nhe,
183 struct mlx5e_encap_entry *e);
184 void mlx5e_tc_update_neigh_used_value(struct mlx5e_neigh_hash_entry *nhe);
186 void mlx5e_tc_reoffload_flows_work(struct work_struct *work);
188 enum mlx5e_tc_attr_to_reg {
199 NIC_ZONE_RESTORE_TO_REG,
202 struct mlx5e_tc_attr_to_reg_mapping {
203 int mfield; /* rewrite field */
204 int moffset; /* offset of mfield */
205 int mlen; /* bytes to rewrite/match */
207 int soffset; /* offset of spec for match */
210 extern struct mlx5e_tc_attr_to_reg_mapping mlx5e_tc_attr_to_reg_mappings[];
212 bool mlx5e_is_valid_eswitch_fwd_dev(struct mlx5e_priv *priv,
213 struct net_device *out_dev);
215 int mlx5e_tc_match_to_reg_set(struct mlx5_core_dev *mdev,
216 struct mlx5e_tc_mod_hdr_acts *mod_hdr_acts,
217 enum mlx5_flow_namespace_type ns,
218 enum mlx5e_tc_attr_to_reg type,
221 void mlx5e_tc_match_to_reg_mod_hdr_change(struct mlx5_core_dev *mdev,
222 struct mlx5e_tc_mod_hdr_acts *mod_hdr_acts,
223 enum mlx5e_tc_attr_to_reg type,
224 int act_id, u32 data);
226 void mlx5e_tc_match_to_reg_match(struct mlx5_flow_spec *spec,
227 enum mlx5e_tc_attr_to_reg type,
231 void mlx5e_tc_match_to_reg_get_match(struct mlx5_flow_spec *spec,
232 enum mlx5e_tc_attr_to_reg type,
236 int mlx5e_tc_match_to_reg_set_and_get_id(struct mlx5_core_dev *mdev,
237 struct mlx5e_tc_mod_hdr_acts *mod_hdr_acts,
238 enum mlx5_flow_namespace_type ns,
239 enum mlx5e_tc_attr_to_reg type,
242 int mlx5e_tc_add_flow_mod_hdr(struct mlx5e_priv *priv,
243 struct mlx5e_tc_flow_parse_attr *parse_attr,
244 struct mlx5e_tc_flow *flow);
246 int alloc_mod_hdr_actions(struct mlx5_core_dev *mdev,
248 struct mlx5e_tc_mod_hdr_acts *mod_hdr_acts);
249 void dealloc_mod_hdr_actions(struct mlx5e_tc_mod_hdr_acts *mod_hdr_acts);
251 struct mlx5e_tc_flow;
252 u32 mlx5e_tc_get_flow_tun_id(struct mlx5e_tc_flow *flow);
254 void mlx5e_tc_set_ethertype(struct mlx5_core_dev *mdev,
255 struct flow_match_basic *match, bool outer,
256 void *headers_c, void *headers_v);
258 int mlx5e_tc_nic_init(struct mlx5e_priv *priv);
259 void mlx5e_tc_nic_cleanup(struct mlx5e_priv *priv);
261 int mlx5e_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
264 struct mlx5_flow_handle *
265 mlx5e_add_offloaded_nic_rule(struct mlx5e_priv *priv,
266 struct mlx5_flow_spec *spec,
267 struct mlx5_flow_attr *attr);
268 void mlx5e_del_offloaded_nic_rule(struct mlx5e_priv *priv,
269 struct mlx5_flow_handle *rule,
270 struct mlx5_flow_attr *attr);
272 struct mlx5_flow_handle *
273 mlx5_tc_rule_insert(struct mlx5e_priv *priv,
274 struct mlx5_flow_spec *spec,
275 struct mlx5_flow_attr *attr);
277 mlx5_tc_rule_delete(struct mlx5e_priv *priv,
278 struct mlx5_flow_handle *rule,
279 struct mlx5_flow_attr *attr);
281 bool mlx5e_tc_is_vf_tunnel(struct net_device *out_dev, struct net_device *route_dev);
282 int mlx5e_tc_query_route_vport(struct net_device *out_dev, struct net_device *route_dev,
285 #else /* CONFIG_MLX5_CLS_ACT */
286 static inline int mlx5e_tc_nic_init(struct mlx5e_priv *priv) { return 0; }
287 static inline void mlx5e_tc_nic_cleanup(struct mlx5e_priv *priv) {}
289 mlx5e_setup_tc_block_cb(enum tc_setup_type type, void *type_data, void *cb_priv)
290 { return -EOPNOTSUPP; }
292 #endif /* CONFIG_MLX5_CLS_ACT */
294 struct mlx5_flow_attr *mlx5_alloc_flow_attr(enum mlx5_flow_namespace_type type);
296 struct mlx5_flow_handle *
297 mlx5e_add_offloaded_nic_rule(struct mlx5e_priv *priv,
298 struct mlx5_flow_spec *spec,
299 struct mlx5_flow_attr *attr);
300 void mlx5e_del_offloaded_nic_rule(struct mlx5e_priv *priv,
301 struct mlx5_flow_handle *rule,
302 struct mlx5_flow_attr *attr);
304 #else /* CONFIG_MLX5_ESWITCH */
305 static inline int mlx5e_tc_nic_init(struct mlx5e_priv *priv) { return 0; }
306 static inline void mlx5e_tc_nic_cleanup(struct mlx5e_priv *priv) {}
307 static inline int mlx5e_tc_num_filters(struct mlx5e_priv *priv,
314 mlx5e_setup_tc_block_cb(enum tc_setup_type type, void *type_data, void *cb_priv)
315 { return -EOPNOTSUPP; }
318 #if IS_ENABLED(CONFIG_MLX5_CLS_ACT)
319 static inline bool mlx5e_cqe_regb_chain(struct mlx5_cqe64 *cqe)
321 #if IS_ENABLED(CONFIG_NET_TC_SKB_EXT)
324 reg_b = be32_to_cpu(cqe->ft_metadata);
326 if (reg_b >> (MLX5E_TC_TABLE_CHAIN_TAG_BITS + ESW_ZONE_ID_BITS))
329 chain = reg_b & MLX5E_TC_TABLE_CHAIN_TAG_MASK;
337 bool mlx5e_tc_update_skb(struct mlx5_cqe64 *cqe, struct sk_buff *skb);
338 #else /* CONFIG_MLX5_CLS_ACT */
339 static inline bool mlx5e_cqe_regb_chain(struct mlx5_cqe64 *cqe)
342 mlx5e_tc_update_skb(struct mlx5_cqe64 *cqe, struct sk_buff *skb)
346 #endif /* __MLX5_EN_TC_H__ */