1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2016 BayLibre, SAS
4 * Author: Neil Armstrong <narmstrong@baylibre.com>
5 * Copyright (C) 2014 Endless Mobile
8 * Jasper St. Pierre <jstpierre@mecheye.net>
11 #include <linux/component.h>
12 #include <linux/module.h>
13 #include <linux/of_graph.h>
14 #include <linux/sys_soc.h>
15 #include <linux/platform_device.h>
16 #include <linux/soc/amlogic/meson-canvas.h>
18 #include <drm/drm_aperture.h>
19 #include <drm/drm_atomic_helper.h>
20 #include <drm/drm_drv.h>
21 #include <drm/drm_fb_helper.h>
22 #include <drm/drm_gem_cma_helper.h>
23 #include <drm/drm_gem_framebuffer_helper.h>
24 #include <drm/drm_modeset_helper_vtables.h>
25 #include <drm/drm_probe_helper.h>
26 #include <drm/drm_vblank.h>
28 #include "meson_crtc.h"
29 #include "meson_drv.h"
30 #include "meson_overlay.h"
31 #include "meson_plane.h"
32 #include "meson_osd_afbcd.h"
33 #include "meson_registers.h"
34 #include "meson_venc_cvbs.h"
35 #include "meson_viu.h"
36 #include "meson_vpp.h"
37 #include "meson_rdma.h"
39 #define DRIVER_NAME "meson"
40 #define DRIVER_DESC "Amlogic Meson DRM driver"
43 * DOC: Video Processing Unit
45 * VPU Handles the Global Video Processing, it includes management of the
46 * clocks gates, blocks reset lines and power domains.
50 * - Full reset of entire video processing HW blocks
51 * - Scaling and setup of the VPU clock
53 * - Powering up video processing HW blocks
54 * - Powering Up HDMI controller and PHY
57 static const struct drm_mode_config_funcs meson_mode_config_funcs = {
58 .atomic_check = drm_atomic_helper_check,
59 .atomic_commit = drm_atomic_helper_commit,
60 .fb_create = drm_gem_fb_create,
63 static const struct drm_mode_config_helper_funcs meson_mode_config_helpers = {
64 .atomic_commit_tail = drm_atomic_helper_commit_tail_rpm,
67 static irqreturn_t meson_irq(int irq, void *arg)
69 struct drm_device *dev = arg;
70 struct meson_drm *priv = dev->dev_private;
72 (void)readl_relaxed(priv->io_base + _REG(VENC_INTFLAG));
79 static int meson_dumb_create(struct drm_file *file, struct drm_device *dev,
80 struct drm_mode_create_dumb *args)
83 * We need 64bytes aligned stride, and PAGE aligned size
85 args->pitch = ALIGN(DIV_ROUND_UP(args->width * args->bpp, 8), SZ_64);
86 args->size = PAGE_ALIGN(args->pitch * args->height);
88 return drm_gem_cma_dumb_create_internal(file, dev, args);
91 DEFINE_DRM_GEM_CMA_FOPS(fops);
93 static const struct drm_driver meson_driver = {
94 .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
97 DRM_GEM_CMA_DRIVER_OPS_WITH_DUMB_CREATE(meson_dumb_create),
108 static bool meson_vpu_has_available_connectors(struct device *dev)
110 struct device_node *ep, *remote;
112 /* Parses each endpoint and check if remote exists */
113 for_each_endpoint_of_node(dev->of_node, ep) {
114 /* If the endpoint node exists, consider it enabled */
115 remote = of_graph_get_remote_port(ep);
123 static struct regmap_config meson_regmap_config = {
127 .max_register = 0x1000,
130 static void meson_vpu_init(struct meson_drm *priv)
135 * Slave dc0 and dc5 connected to master port 1.
136 * By default other slaves are connected to master port 0.
138 value = VPU_RDARB_SLAVE_TO_MASTER_PORT(0, 1) |
139 VPU_RDARB_SLAVE_TO_MASTER_PORT(5, 1);
140 writel_relaxed(value, priv->io_base + _REG(VPU_RDARB_MODE_L1C1));
142 /* Slave dc0 connected to master port 1 */
143 value = VPU_RDARB_SLAVE_TO_MASTER_PORT(0, 1);
144 writel_relaxed(value, priv->io_base + _REG(VPU_RDARB_MODE_L1C2));
146 /* Slave dc4 and dc7 connected to master port 1 */
147 value = VPU_RDARB_SLAVE_TO_MASTER_PORT(4, 1) |
148 VPU_RDARB_SLAVE_TO_MASTER_PORT(7, 1);
149 writel_relaxed(value, priv->io_base + _REG(VPU_RDARB_MODE_L2C1));
151 /* Slave dc1 connected to master port 1 */
152 value = VPU_RDARB_SLAVE_TO_MASTER_PORT(1, 1);
153 writel_relaxed(value, priv->io_base + _REG(VPU_WRARB_MODE_L2C1));
156 struct meson_drm_soc_attr {
157 struct meson_drm_soc_limits limits;
158 const struct soc_device_attribute *attrs;
161 static const struct meson_drm_soc_attr meson_drm_soc_attrs[] = {
162 /* S805X/S805Y HDMI PLL won't lock for HDMI PHY freq > 1,65GHz */
165 .max_hdmi_phy_freq = 1650000,
167 .attrs = (const struct soc_device_attribute []) {
168 { .soc_id = "GXL (S805*)", },
174 static int meson_drv_bind_master(struct device *dev, bool has_components)
176 struct platform_device *pdev = to_platform_device(dev);
177 const struct meson_drm_match_data *match;
178 struct meson_drm *priv;
179 struct drm_device *drm;
180 struct resource *res;
184 /* Checks if an output connector is available */
185 if (!meson_vpu_has_available_connectors(dev)) {
186 dev_err(dev, "No output connector available\n");
190 match = of_device_get_match_data(dev);
194 drm = drm_dev_alloc(&meson_driver, dev);
198 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
203 drm->dev_private = priv;
206 priv->compat = match->compat;
207 priv->afbcd.ops = match->afbcd_ops;
209 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "vpu");
210 regs = devm_ioremap_resource(dev, res);
216 priv->io_base = regs;
218 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hhi");
223 /* Simply ioremap since it may be a shared register zone */
224 regs = devm_ioremap(dev, res->start, resource_size(res));
226 ret = -EADDRNOTAVAIL;
230 priv->hhi = devm_regmap_init_mmio(dev, regs,
231 &meson_regmap_config);
232 if (IS_ERR(priv->hhi)) {
233 dev_err(&pdev->dev, "Couldn't create the HHI regmap\n");
234 ret = PTR_ERR(priv->hhi);
238 priv->canvas = meson_canvas_get(dev);
239 if (IS_ERR(priv->canvas)) {
240 ret = PTR_ERR(priv->canvas);
244 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_osd1);
247 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_0);
249 meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
252 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_1);
254 meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
255 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
258 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_2);
260 meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
261 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
262 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1);
266 priv->vsync_irq = platform_get_irq(pdev, 0);
268 ret = drm_vblank_init(drm, 1);
272 /* Assign limits per soc revision/package */
273 for (i = 0 ; i < ARRAY_SIZE(meson_drm_soc_attrs) ; ++i) {
274 if (soc_device_match(meson_drm_soc_attrs[i].attrs)) {
275 priv->limits = &meson_drm_soc_attrs[i].limits;
281 * Remove early framebuffers (ie. simplefb). The framebuffer can be
282 * located anywhere in RAM
284 ret = drm_aperture_remove_framebuffers(false, &meson_driver);
288 ret = drmm_mode_config_init(drm);
291 drm->mode_config.max_width = 3840;
292 drm->mode_config.max_height = 2160;
293 drm->mode_config.funcs = &meson_mode_config_funcs;
294 drm->mode_config.helper_private = &meson_mode_config_helpers;
296 /* Hardware Initialization */
298 meson_vpu_init(priv);
299 meson_venc_init(priv);
300 meson_vpp_init(priv);
301 meson_viu_init(priv);
302 if (priv->afbcd.ops) {
303 ret = priv->afbcd.ops->init(priv);
308 /* Encoder Initialization */
310 ret = meson_venc_cvbs_create(priv);
314 if (has_components) {
315 ret = component_bind_all(drm->dev, drm);
317 dev_err(drm->dev, "Couldn't bind all components\n");
322 ret = meson_plane_create(priv);
326 ret = meson_overlay_create(priv);
330 ret = meson_crtc_create(priv);
334 ret = request_irq(priv->vsync_irq, meson_irq, 0, drm->driver->name, drm);
338 drm_mode_config_reset(drm);
340 drm_kms_helper_poll_init(drm);
342 platform_set_drvdata(pdev, priv);
344 ret = drm_dev_register(drm, 0);
348 drm_fbdev_generic_setup(drm, 32);
353 free_irq(priv->vsync_irq, drm);
360 static int meson_drv_bind(struct device *dev)
362 return meson_drv_bind_master(dev, true);
365 static void meson_drv_unbind(struct device *dev)
367 struct meson_drm *priv = dev_get_drvdata(dev);
368 struct drm_device *drm = priv->drm;
371 meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
372 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
373 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1);
374 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_2);
377 drm_dev_unregister(drm);
378 drm_kms_helper_poll_fini(drm);
379 drm_atomic_helper_shutdown(drm);
380 component_unbind_all(dev, drm);
381 free_irq(priv->vsync_irq, drm);
384 if (priv->afbcd.ops) {
385 priv->afbcd.ops->reset(priv);
386 meson_rdma_free(priv);
390 static const struct component_master_ops meson_drv_master_ops = {
391 .bind = meson_drv_bind,
392 .unbind = meson_drv_unbind,
395 static int __maybe_unused meson_drv_pm_suspend(struct device *dev)
397 struct meson_drm *priv = dev_get_drvdata(dev);
402 return drm_mode_config_helper_suspend(priv->drm);
405 static int __maybe_unused meson_drv_pm_resume(struct device *dev)
407 struct meson_drm *priv = dev_get_drvdata(dev);
412 meson_vpu_init(priv);
413 meson_venc_init(priv);
414 meson_vpp_init(priv);
415 meson_viu_init(priv);
417 priv->afbcd.ops->init(priv);
419 return drm_mode_config_helper_resume(priv->drm);
422 static int compare_of(struct device *dev, void *data)
424 DRM_DEBUG_DRIVER("Comparing of node %pOF with %pOF\n",
427 return dev->of_node == data;
430 /* Possible connectors nodes to ignore */
431 static const struct of_device_id connectors_match[] = {
432 { .compatible = "composite-video-connector" },
433 { .compatible = "svideo-connector" },
434 { .compatible = "hdmi-connector" },
435 { .compatible = "dvi-connector" },
439 static int meson_probe_remote(struct platform_device *pdev,
440 struct component_match **match,
441 struct device_node *parent,
442 struct device_node *remote)
444 struct device_node *ep, *remote_node;
447 /* If node is a connector, return and do not add to match table */
448 if (of_match_node(connectors_match, remote))
451 component_match_add(&pdev->dev, match, compare_of, remote);
453 for_each_endpoint_of_node(remote, ep) {
454 remote_node = of_graph_get_remote_port_parent(ep);
456 remote_node == parent || /* Ignore parent endpoint */
457 !of_device_is_available(remote_node)) {
458 of_node_put(remote_node);
462 count += meson_probe_remote(pdev, match, remote, remote_node);
464 of_node_put(remote_node);
470 static void meson_drv_shutdown(struct platform_device *pdev)
472 struct meson_drm *priv = dev_get_drvdata(&pdev->dev);
477 drm_kms_helper_poll_fini(priv->drm);
478 drm_atomic_helper_shutdown(priv->drm);
481 static int meson_drv_probe(struct platform_device *pdev)
483 struct component_match *match = NULL;
484 struct device_node *np = pdev->dev.of_node;
485 struct device_node *ep, *remote;
488 for_each_endpoint_of_node(np, ep) {
489 remote = of_graph_get_remote_port_parent(ep);
490 if (!remote || !of_device_is_available(remote)) {
495 count += meson_probe_remote(pdev, &match, np, remote);
500 return meson_drv_bind_master(&pdev->dev, false);
502 /* If some endpoints were found, initialize the nodes */
504 dev_info(&pdev->dev, "Queued %d outputs on vpu\n", count);
506 return component_master_add_with_match(&pdev->dev,
507 &meson_drv_master_ops,
511 /* If no output endpoints were available, simply bail out */
515 static struct meson_drm_match_data meson_drm_gxbb_data = {
516 .compat = VPU_COMPATIBLE_GXBB,
519 static struct meson_drm_match_data meson_drm_gxl_data = {
520 .compat = VPU_COMPATIBLE_GXL,
523 static struct meson_drm_match_data meson_drm_gxm_data = {
524 .compat = VPU_COMPATIBLE_GXM,
525 .afbcd_ops = &meson_afbcd_gxm_ops,
528 static struct meson_drm_match_data meson_drm_g12a_data = {
529 .compat = VPU_COMPATIBLE_G12A,
530 .afbcd_ops = &meson_afbcd_g12a_ops,
533 static const struct of_device_id dt_match[] = {
534 { .compatible = "amlogic,meson-gxbb-vpu",
535 .data = (void *)&meson_drm_gxbb_data },
536 { .compatible = "amlogic,meson-gxl-vpu",
537 .data = (void *)&meson_drm_gxl_data },
538 { .compatible = "amlogic,meson-gxm-vpu",
539 .data = (void *)&meson_drm_gxm_data },
540 { .compatible = "amlogic,meson-g12a-vpu",
541 .data = (void *)&meson_drm_g12a_data },
544 MODULE_DEVICE_TABLE(of, dt_match);
546 static const struct dev_pm_ops meson_drv_pm_ops = {
547 SET_SYSTEM_SLEEP_PM_OPS(meson_drv_pm_suspend, meson_drv_pm_resume)
550 static struct platform_driver meson_drm_platform_driver = {
551 .probe = meson_drv_probe,
552 .shutdown = meson_drv_shutdown,
555 .of_match_table = dt_match,
556 .pm = &meson_drv_pm_ops,
560 module_platform_driver(meson_drm_platform_driver);
562 MODULE_AUTHOR("Jasper St. Pierre <jstpierre@mecheye.net>");
563 MODULE_AUTHOR("Neil Armstrong <narmstrong@baylibre.com>");
564 MODULE_DESCRIPTION(DRIVER_DESC);
565 MODULE_LICENSE("GPL");