drivers/gpu/drm/amd/display/modules/power/power_helpers.c

   1 /* Copyright 2018 Advanced Micro Devices, Inc.
   2  *
   3  * Permission is hereby granted, free of charge, to any person obtaining a
   4  * copy of this software and associated documentation files (the "Software"),
   5  * to deal in the Software without restriction, including without limitation
   6  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   7  * and/or sell copies of the Software, and to permit persons to whom the
   8  * Software is furnished to do so, subject to the following conditions:
   9  *
  10  * The above copyright notice and this permission notice shall be included in
  11  * all copies or substantial portions of the Software.
  12  *
  13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  14  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  15  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  16  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  17  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  18  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  19  * OTHER DEALINGS IN THE SOFTWARE.
  20  *
  21  * Authors: AMD
  22  *
  23  */
  24
  25 #include "power_helpers.h"
  26 #include "dc/inc/hw/dmcu.h"
  27 #include "dc/inc/hw/abm.h"
  28 #include "dc.h"
  29 #include "core_types.h"
  30 #include "dmub_cmd.h"
  31
  32 #define DIV_ROUNDUP(a, b) (((a)+((b)/2))/(b))
  33 #define bswap16_based_on_endian(big_endian, value) \
  34         (big_endian) ? cpu_to_be16(value) : cpu_to_le16(value)
  35
  36 /* Possible Min Reduction config from least aggressive to most aggressive
  37  *  0    1     2     3     4     5     6     7     8     9     10    11   12
  38  * 100  98.0 94.1  94.1  85.1  80.3  75.3  69.4  60.0  57.6  50.2  49.8  40.0 %
  39  */
  40 static const unsigned char min_reduction_table[13] = {
  41 0xff, 0xfa, 0xf0, 0xf0, 0xd9, 0xcd, 0xc0, 0xb1, 0x99, 0x93, 0x80, 0x82, 0x66};
  42
  43 /* Possible Max Reduction configs from least aggressive to most aggressive
  44  *  0    1     2     3     4     5     6     7     8     9     10    11   12
  45  * 96.1 89.8 85.1  80.3  69.4  64.7  64.7  50.2  39.6  30.2  30.2  30.2  19.6 %
  46  */
  47 static const unsigned char max_reduction_table[13] = {
  48 0xf5, 0xe5, 0xd9, 0xcd, 0xb1, 0xa5, 0xa5, 0x80, 0x65, 0x4d, 0x4d, 0x4d, 0x32};
  49
  50 /* Possible ABM 2.2 Min Reduction configs from least aggressive to most aggressive
  51  *  0    1     2     3     4     5     6     7     8     9     10    11   12
  52  * 100  100   100   100   100   100   100   100  100  92.2  83.1  75.3  75.3 %
  53  */
  54 static const unsigned char min_reduction_table_v_2_2[13] = {
  55 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xeb, 0xd4, 0xc0, 0xc0};
  56
  57 /* Possible ABM 2.2 Max Reduction configs from least aggressive to most aggressive
  58  *  0    1     2     3     4     5     6     7     8     9     10    11   12
  59  * 96.1 89.8 74.9  69.4  64.7  52.2  48.6  39.6  30.2  25.1  19.6  12.5  12.5 %
  60  */
  61 static const unsigned char max_reduction_table_v_2_2[13] = {
  62 0xf5, 0xe5, 0xbf, 0xb1, 0xa5, 0x85, 0x7c, 0x65, 0x4d, 0x40, 0x32, 0x20, 0x20};
  63
  64 /* Predefined ABM configuration sets. We may have different configuration sets
  65  * in order to satisfy different power/quality requirements.
  66  */
  67 static const unsigned char abm_config[abm_defines_max_config][abm_defines_max_level] = {
  68 /*  ABM Level 1,    ABM Level 2,    ABM Level 3,    ABM Level 4 */
  69 {       2,              5,              7,              8       },      /* Default - Medium aggressiveness */
  70 {       2,              5,              8,              11      },      /* Alt #1  - Increased aggressiveness */
  71 {       0,              2,              4,              8       },      /* Alt #2  - Minimal aggressiveness */
  72 {       3,              6,              10,             12      },      /* Alt #3  - Super aggressiveness */
  73 };
  74
  75 struct abm_parameters {
  76         unsigned char min_reduction;
  77         unsigned char max_reduction;
  78         unsigned char bright_pos_gain;
  79         unsigned char dark_pos_gain;
  80         unsigned char brightness_gain;
  81         unsigned char contrast_factor;
  82         unsigned char deviation_gain;
  83         unsigned char min_knee;
  84         unsigned char max_knee;
  85 };
  86
  87 static const struct abm_parameters abm_settings_config0[abm_defines_max_level] = {
  88 //  min_red  max_red  bright_pos  dark_pos  brightness_gain  contrast  deviation  min_knee  max_knee
  89         {0xff,   0xbf,    0x20,       0x00,     0xff,            0x99,     0xb3,      0x40,     0xe0},
  90         {0xde,   0x85,    0x20,       0x00,     0xff,            0x90,     0xa8,      0x40,     0xdf},
  91         {0xb0,   0x50,    0x20,       0x00,     0xc0,            0x88,     0x78,      0x70,     0xa0},
  92         {0x82,   0x40,    0x20,       0x00,     0x00,            0xff,     0xb3,      0x70,     0x70},
  93 };
  94
  95 static const struct abm_parameters abm_settings_config1[abm_defines_max_level] = {
  96 //  min_red  max_red  bright_pos  dark_pos  brightness_gain  contrast  deviation  min_knee  max_knee
  97         {0xf0,   0xd9,    0x20,       0x00,     0x00,            0xff,     0xb3,      0x70,     0x70},
  98         {0xcd,   0xa5,    0x20,       0x00,     0x00,            0xff,     0xb3,      0x70,     0x70},
  99         {0x99,   0x65,    0x20,       0x00,     0x00,            0xff,     0xb3,      0x70,     0x70},
 100         {0x82,   0x4d,    0x20,       0x00,     0x00,            0xff,     0xb3,      0x70,     0x70},
 101 };
 102
 103 static const struct abm_parameters * const abm_settings[] = {
 104         abm_settings_config0,
 105         abm_settings_config1,
 106 };
 107
 108 #define NUM_AMBI_LEVEL    5
 109 #define NUM_AGGR_LEVEL    4
 110 #define NUM_POWER_FN_SEGS 8
 111 #define NUM_BL_CURVE_SEGS 16
 112 #define IRAM_SIZE 256
 113
 114 #define IRAM_RESERVE_AREA_START_V2 0xF0  // reserve 0xF0~0xF6 are write by DMCU only
 115 #define IRAM_RESERVE_AREA_END_V2 0xF6  // reserve 0xF0~0xF6 are write by DMCU only
 116
 117 #define IRAM_RESERVE_AREA_START_V2_2 0xF0  // reserve 0xF0~0xFF are write by DMCU only
 118 #define IRAM_RESERVE_AREA_END_V2_2 0xFF  // reserve 0xF0~0xFF are write by DMCU only
 119
 120 #pragma pack(push, 1)
 121 /* NOTE: iRAM is 256B in size */
 122 struct iram_table_v_2 {
 123         /* flags                      */
 124         uint16_t min_abm_backlight;                                     /* 0x00 U16  */
 125
 126         /* parameters for ABM2.0 algorithm */
 127         uint8_t min_reduction[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL];          /* 0x02 U0.8 */
 128         uint8_t max_reduction[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL];          /* 0x16 U0.8 */
 129         uint8_t bright_pos_gain[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL];        /* 0x2a U2.6 */
 130         uint8_t bright_neg_gain[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL];        /* 0x3e U2.6 */
 131         uint8_t dark_pos_gain[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL];          /* 0x52 U2.6 */
 132         uint8_t dark_neg_gain[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL];          /* 0x66 U2.6 */
 133         uint8_t iir_curve[NUM_AMBI_LEVEL];                              /* 0x7a U0.8 */
 134         uint8_t deviation_gain;                                         /* 0x7f U0.8 */
 135
 136         /* parameters for crgb conversion */
 137         uint16_t crgb_thresh[NUM_POWER_FN_SEGS];                        /* 0x80 U3.13 */
 138         uint16_t crgb_offset[NUM_POWER_FN_SEGS];                        /* 0x90 U1.15 */
 139         uint16_t crgb_slope[NUM_POWER_FN_SEGS];                         /* 0xa0 U4.12 */
 140
 141         /* parameters for custom curve */
 142         /* thresholds for brightness --> backlight */
 143         uint16_t backlight_thresholds[NUM_BL_CURVE_SEGS];               /* 0xb0 U16.0 */
 144         /* offsets for brightness --> backlight */
 145         uint16_t backlight_offsets[NUM_BL_CURVE_SEGS];                  /* 0xd0 U16.0 */
 146
 147         /* For reading PSR State directly from IRAM */
 148         uint8_t psr_state;                                              /* 0xf0       */
 149         uint8_t dmcu_mcp_interface_version;                             /* 0xf1       */
 150         uint8_t dmcu_abm_feature_version;                               /* 0xf2       */
 151         uint8_t dmcu_psr_feature_version;                               /* 0xf3       */
 152         uint16_t dmcu_version;                                          /* 0xf4       */
 153         uint8_t dmcu_state;                                             /* 0xf6       */
 154
 155         uint16_t blRampReduction;                                       /* 0xf7       */
 156         uint16_t blRampStart;                                           /* 0xf9       */
 157         uint8_t dummy5;                                                 /* 0xfb       */
 158         uint8_t dummy6;                                                 /* 0xfc       */
 159         uint8_t dummy7;                                                 /* 0xfd       */
 160         uint8_t dummy8;                                                 /* 0xfe       */
 161         uint8_t dummy9;                                                 /* 0xff       */
 162 };
 163
 164 struct iram_table_v_2_2 {
 165         /* flags                      */
 166         uint16_t flags;                                                 /* 0x00 U16  */
 167
 168         /* parameters for ABM2.2 algorithm */
 169         uint8_t min_reduction[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL];          /* 0x02 U0.8 */
 170         uint8_t max_reduction[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL];          /* 0x16 U0.8 */
 171         uint8_t bright_pos_gain[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL];        /* 0x2a U2.6 */
 172         uint8_t dark_pos_gain[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL];          /* 0x3e U2.6 */
 173         uint8_t hybrid_factor[NUM_AGGR_LEVEL];                          /* 0x52 U0.8 */
 174         uint8_t contrast_factor[NUM_AGGR_LEVEL];                        /* 0x56 U0.8 */
 175         uint8_t deviation_gain[NUM_AGGR_LEVEL];                         /* 0x5a U0.8 */
 176         uint8_t iir_curve[NUM_AMBI_LEVEL];                              /* 0x5e U0.8 */
 177         uint8_t min_knee[NUM_AGGR_LEVEL];                               /* 0x63 U0.8 */
 178         uint8_t max_knee[NUM_AGGR_LEVEL];                               /* 0x67 U0.8 */
 179         uint16_t min_abm_backlight;                                     /* 0x6b U16  */
 180         uint8_t pad[19];                                                /* 0x6d U0.8 */
 181
 182         /* parameters for crgb conversion */
 183         uint16_t crgb_thresh[NUM_POWER_FN_SEGS];                        /* 0x80 U3.13 */
 184         uint16_t crgb_offset[NUM_POWER_FN_SEGS];                        /* 0x90 U1.15 */
 185         uint16_t crgb_slope[NUM_POWER_FN_SEGS];                         /* 0xa0 U4.12 */
 186
 187         /* parameters for custom curve */
 188         /* thresholds for brightness --> backlight */
 189         uint16_t backlight_thresholds[NUM_BL_CURVE_SEGS];               /* 0xb0 U16.0 */
 190         /* offsets for brightness --> backlight */
 191         uint16_t backlight_offsets[NUM_BL_CURVE_SEGS];                  /* 0xd0 U16.0 */
 192
 193         /* For reading PSR State directly from IRAM */
 194         uint8_t psr_state;                                              /* 0xf0       */
 195         uint8_t dmcu_mcp_interface_version;                             /* 0xf1       */
 196         uint8_t dmcu_abm_feature_version;                               /* 0xf2       */
 197         uint8_t dmcu_psr_feature_version;                               /* 0xf3       */
 198         uint16_t dmcu_version;                                          /* 0xf4       */
 199         uint8_t dmcu_state;                                             /* 0xf6       */
 200
 201         uint8_t dummy1;                                                 /* 0xf7       */
 202         uint8_t dummy2;                                                 /* 0xf8       */
 203         uint8_t dummy3;                                                 /* 0xf9       */
 204         uint8_t dummy4;                                                 /* 0xfa       */
 205         uint8_t dummy5;                                                 /* 0xfb       */
 206         uint8_t dummy6;                                                 /* 0xfc       */
 207         uint8_t dummy7;                                                 /* 0xfd       */
 208         uint8_t dummy8;                                                 /* 0xfe       */
 209         uint8_t dummy9;                                                 /* 0xff       */
 210 };
 211 #pragma pack(pop)
 212
 213 static void fill_backlight_transform_table(struct dmcu_iram_parameters params,
 214                 struct iram_table_v_2 *table)
 215 {
 216         unsigned int i;
 217         unsigned int num_entries = NUM_BL_CURVE_SEGS;
 218         unsigned int lut_index;
 219
 220         table->backlight_thresholds[0] = 0;
 221         table->backlight_offsets[0] = params.backlight_lut_array[0];
 222         table->backlight_thresholds[num_entries-1] = 0xFFFF;
 223         table->backlight_offsets[num_entries-1] =
 224                 params.backlight_lut_array[params.backlight_lut_array_size - 1];
 225
 226         /* Setup all brightness levels between 0% and 100% exclusive
 227          * Fills brightness-to-backlight transform table. Backlight custom curve
 228          * describes transform from brightness to backlight. It will be defined
 229          * as set of thresholds and set of offsets, together, implying
 230          * extrapolation of custom curve into 16 uniformly spanned linear
 231          * segments.  Each threshold/offset represented by 16 bit entry in
 232          * format U4.10.
 233          */
 234         for (i = 1; i+1 < num_entries; i++) {
 235                 lut_index = (params.backlight_lut_array_size - 1) * i / (num_entries - 1);
 236                 ASSERT(lut_index < params.backlight_lut_array_size);
 237
 238                 table->backlight_thresholds[i] =
 239                         cpu_to_be16(DIV_ROUNDUP((i * 65536), num_entries));
 240                 table->backlight_offsets[i] =
 241                         cpu_to_be16(params.backlight_lut_array[lut_index]);
 242         }
 243 }
 244
 245 static void fill_backlight_transform_table_v_2_2(struct dmcu_iram_parameters params,
 246                 struct iram_table_v_2_2 *table, bool big_endian)
 247 {
 248         unsigned int i;
 249         unsigned int num_entries = NUM_BL_CURVE_SEGS;
 250         unsigned int lut_index;
 251
 252         table->backlight_thresholds[0] = 0;
 253         table->backlight_offsets[0] = params.backlight_lut_array[0];
 254         table->backlight_thresholds[num_entries-1] = 0xFFFF;
 255         table->backlight_offsets[num_entries-1] =
 256                 params.backlight_lut_array[params.backlight_lut_array_size - 1];
 257
 258         /* Setup all brightness levels between 0% and 100% exclusive
 259          * Fills brightness-to-backlight transform table. Backlight custom curve
 260          * describes transform from brightness to backlight. It will be defined
 261          * as set of thresholds and set of offsets, together, implying
 262          * extrapolation of custom curve into 16 uniformly spanned linear
 263          * segments.  Each threshold/offset represented by 16 bit entry in
 264          * format U4.10.
 265          */
 266         for (i = 1; i+1 < num_entries; i++) {
 267                 lut_index = (params.backlight_lut_array_size - 1) * i / (num_entries - 1);
 268                 ASSERT(lut_index < params.backlight_lut_array_size);
 269
 270                 table->backlight_thresholds[i] = (big_endian) ?
 271                         cpu_to_be16(DIV_ROUNDUP((i * 65536), num_entries)) :
 272                         cpu_to_le16(DIV_ROUNDUP((i * 65536), num_entries));
 273                 table->backlight_offsets[i] = (big_endian) ?
 274                         cpu_to_be16(params.backlight_lut_array[lut_index]) :
 275                         cpu_to_le16(params.backlight_lut_array[lut_index]);
 276         }
 277 }
 278
 279 void fill_iram_v_2(struct iram_table_v_2 *ram_table, struct dmcu_iram_parameters params)
 280 {
 281         unsigned int set = params.set;
 282
 283         ram_table->min_abm_backlight =
 284                         cpu_to_be16(params.min_abm_backlight);
 285         ram_table->deviation_gain = 0xb3;
 286
 287         ram_table->blRampReduction =
 288                 cpu_to_be16(params.backlight_ramping_reduction);
 289         ram_table->blRampStart =
 290                 cpu_to_be16(params.backlight_ramping_start);
 291
 292         ram_table->min_reduction[0][0] = min_reduction_table[abm_config[set][0]];
 293         ram_table->min_reduction[1][0] = min_reduction_table[abm_config[set][0]];
 294         ram_table->min_reduction[2][0] = min_reduction_table[abm_config[set][0]];
 295         ram_table->min_reduction[3][0] = min_reduction_table[abm_config[set][0]];
 296         ram_table->min_reduction[4][0] = min_reduction_table[abm_config[set][0]];
 297         ram_table->max_reduction[0][0] = max_reduction_table[abm_config[set][0]];
 298         ram_table->max_reduction[1][0] = max_reduction_table[abm_config[set][0]];
 299         ram_table->max_reduction[2][0] = max_reduction_table[abm_config[set][0]];
 300         ram_table->max_reduction[3][0] = max_reduction_table[abm_config[set][0]];
 301         ram_table->max_reduction[4][0] = max_reduction_table[abm_config[set][0]];
 302
 303         ram_table->min_reduction[0][1] = min_reduction_table[abm_config[set][1]];
 304         ram_table->min_reduction[1][1] = min_reduction_table[abm_config[set][1]];
 305         ram_table->min_reduction[2][1] = min_reduction_table[abm_config[set][1]];
 306         ram_table->min_reduction[3][1] = min_reduction_table[abm_config[set][1]];
 307         ram_table->min_reduction[4][1] = min_reduction_table[abm_config[set][1]];
 308         ram_table->max_reduction[0][1] = max_reduction_table[abm_config[set][1]];
 309         ram_table->max_reduction[1][1] = max_reduction_table[abm_config[set][1]];
 310         ram_table->max_reduction[2][1] = max_reduction_table[abm_config[set][1]];
 311         ram_table->max_reduction[3][1] = max_reduction_table[abm_config[set][1]];
 312         ram_table->max_reduction[4][1] = max_reduction_table[abm_config[set][1]];
 313
 314         ram_table->min_reduction[0][2] = min_reduction_table[abm_config[set][2]];
 315         ram_table->min_reduction[1][2] = min_reduction_table[abm_config[set][2]];
 316         ram_table->min_reduction[2][2] = min_reduction_table[abm_config[set][2]];
 317         ram_table->min_reduction[3][2] = min_reduction_table[abm_config[set][2]];
 318         ram_table->min_reduction[4][2] = min_reduction_table[abm_config[set][2]];
 319         ram_table->max_reduction[0][2] = max_reduction_table[abm_config[set][2]];
 320         ram_table->max_reduction[1][2] = max_reduction_table[abm_config[set][2]];
 321         ram_table->max_reduction[2][2] = max_reduction_table[abm_config[set][2]];
 322         ram_table->max_reduction[3][2] = max_reduction_table[abm_config[set][2]];
 323         ram_table->max_reduction[4][2] = max_reduction_table[abm_config[set][2]];
 324
 325         ram_table->min_reduction[0][3] = min_reduction_table[abm_config[set][3]];
 326         ram_table->min_reduction[1][3] = min_reduction_table[abm_config[set][3]];
 327         ram_table->min_reduction[2][3] = min_reduction_table[abm_config[set][3]];
 328         ram_table->min_reduction[3][3] = min_reduction_table[abm_config[set][3]];
 329         ram_table->min_reduction[4][3] = min_reduction_table[abm_config[set][3]];
 330         ram_table->max_reduction[0][3] = max_reduction_table[abm_config[set][3]];
 331         ram_table->max_reduction[1][3] = max_reduction_table[abm_config[set][3]];
 332         ram_table->max_reduction[2][3] = max_reduction_table[abm_config[set][3]];
 333         ram_table->max_reduction[3][3] = max_reduction_table[abm_config[set][3]];
 334         ram_table->max_reduction[4][3] = max_reduction_table[abm_config[set][3]];
 335
 336         ram_table->bright_pos_gain[0][0] = 0x20;
 337         ram_table->bright_pos_gain[0][1] = 0x20;
 338         ram_table->bright_pos_gain[0][2] = 0x20;
 339         ram_table->bright_pos_gain[0][3] = 0x20;
 340         ram_table->bright_pos_gain[1][0] = 0x20;
 341         ram_table->bright_pos_gain[1][1] = 0x20;
 342         ram_table->bright_pos_gain[1][2] = 0x20;
 343         ram_table->bright_pos_gain[1][3] = 0x20;
 344         ram_table->bright_pos_gain[2][0] = 0x20;
 345         ram_table->bright_pos_gain[2][1] = 0x20;
 346         ram_table->bright_pos_gain[2][2] = 0x20;
 347         ram_table->bright_pos_gain[2][3] = 0x20;
 348         ram_table->bright_pos_gain[3][0] = 0x20;
 349         ram_table->bright_pos_gain[3][1] = 0x20;
 350         ram_table->bright_pos_gain[3][2] = 0x20;
 351         ram_table->bright_pos_gain[3][3] = 0x20;
 352         ram_table->bright_pos_gain[4][0] = 0x20;
 353         ram_table->bright_pos_gain[4][1] = 0x20;
 354         ram_table->bright_pos_gain[4][2] = 0x20;
 355         ram_table->bright_pos_gain[4][3] = 0x20;
 356         ram_table->bright_neg_gain[0][0] = 0x00;
 357         ram_table->bright_neg_gain[0][1] = 0x00;
 358         ram_table->bright_neg_gain[0][2] = 0x00;
 359         ram_table->bright_neg_gain[0][3] = 0x00;
 360         ram_table->bright_neg_gain[1][0] = 0x00;
 361         ram_table->bright_neg_gain[1][1] = 0x00;
 362         ram_table->bright_neg_gain[1][2] = 0x00;
 363         ram_table->bright_neg_gain[1][3] = 0x00;
 364         ram_table->bright_neg_gain[2][0] = 0x00;
 365         ram_table->bright_neg_gain[2][1] = 0x00;
 366         ram_table->bright_neg_gain[2][2] = 0x00;
 367         ram_table->bright_neg_gain[2][3] = 0x00;
 368         ram_table->bright_neg_gain[3][0] = 0x00;
 369         ram_table->bright_neg_gain[3][1] = 0x00;
 370         ram_table->bright_neg_gain[3][2] = 0x00;
 371         ram_table->bright_neg_gain[3][3] = 0x00;
 372         ram_table->bright_neg_gain[4][0] = 0x00;
 373         ram_table->bright_neg_gain[4][1] = 0x00;
 374         ram_table->bright_neg_gain[4][2] = 0x00;
 375         ram_table->bright_neg_gain[4][3] = 0x00;
 376         ram_table->dark_pos_gain[0][0] = 0x00;
 377         ram_table->dark_pos_gain[0][1] = 0x00;
 378         ram_table->dark_pos_gain[0][2] = 0x00;
 379         ram_table->dark_pos_gain[0][3] = 0x00;
 380         ram_table->dark_pos_gain[1][0] = 0x00;
 381         ram_table->dark_pos_gain[1][1] = 0x00;
 382         ram_table->dark_pos_gain[1][2] = 0x00;
 383         ram_table->dark_pos_gain[1][3] = 0x00;
 384         ram_table->dark_pos_gain[2][0] = 0x00;
 385         ram_table->dark_pos_gain[2][1] = 0x00;
 386         ram_table->dark_pos_gain[2][2] = 0x00;
 387         ram_table->dark_pos_gain[2][3] = 0x00;
 388         ram_table->dark_pos_gain[3][0] = 0x00;
 389         ram_table->dark_pos_gain[3][1] = 0x00;
 390         ram_table->dark_pos_gain[3][2] = 0x00;
 391         ram_table->dark_pos_gain[3][3] = 0x00;
 392         ram_table->dark_pos_gain[4][0] = 0x00;
 393         ram_table->dark_pos_gain[4][1] = 0x00;
 394         ram_table->dark_pos_gain[4][2] = 0x00;
 395         ram_table->dark_pos_gain[4][3] = 0x00;
 396         ram_table->dark_neg_gain[0][0] = 0x00;
 397         ram_table->dark_neg_gain[0][1] = 0x00;
 398         ram_table->dark_neg_gain[0][2] = 0x00;
 399         ram_table->dark_neg_gain[0][3] = 0x00;
 400         ram_table->dark_neg_gain[1][0] = 0x00;
 401         ram_table->dark_neg_gain[1][1] = 0x00;
 402         ram_table->dark_neg_gain[1][2] = 0x00;
 403         ram_table->dark_neg_gain[1][3] = 0x00;
 404         ram_table->dark_neg_gain[2][0] = 0x00;
 405         ram_table->dark_neg_gain[2][1] = 0x00;
 406         ram_table->dark_neg_gain[2][2] = 0x00;
 407         ram_table->dark_neg_gain[2][3] = 0x00;
 408         ram_table->dark_neg_gain[3][0] = 0x00;
 409         ram_table->dark_neg_gain[3][1] = 0x00;
 410         ram_table->dark_neg_gain[3][2] = 0x00;
 411         ram_table->dark_neg_gain[3][3] = 0x00;
 412         ram_table->dark_neg_gain[4][0] = 0x00;
 413         ram_table->dark_neg_gain[4][1] = 0x00;
 414         ram_table->dark_neg_gain[4][2] = 0x00;
 415         ram_table->dark_neg_gain[4][3] = 0x00;
 416
 417         ram_table->iir_curve[0] = 0x65;
 418         ram_table->iir_curve[1] = 0x65;
 419         ram_table->iir_curve[2] = 0x65;
 420         ram_table->iir_curve[3] = 0x65;
 421         ram_table->iir_curve[4] = 0x65;
 422
 423         //Gamma 2.4
 424         ram_table->crgb_thresh[0] = cpu_to_be16(0x13b6);
 425         ram_table->crgb_thresh[1] = cpu_to_be16(0x1648);
 426         ram_table->crgb_thresh[2] = cpu_to_be16(0x18e3);
 427         ram_table->crgb_thresh[3] = cpu_to_be16(0x1b41);
 428         ram_table->crgb_thresh[4] = cpu_to_be16(0x1d46);
 429         ram_table->crgb_thresh[5] = cpu_to_be16(0x1f21);
 430         ram_table->crgb_thresh[6] = cpu_to_be16(0x2167);
 431         ram_table->crgb_thresh[7] = cpu_to_be16(0x2384);
 432         ram_table->crgb_offset[0] = cpu_to_be16(0x2999);
 433         ram_table->crgb_offset[1] = cpu_to_be16(0x3999);
 434         ram_table->crgb_offset[2] = cpu_to_be16(0x4666);
 435         ram_table->crgb_offset[3] = cpu_to_be16(0x5999);
 436         ram_table->crgb_offset[4] = cpu_to_be16(0x6333);
 437         ram_table->crgb_offset[5] = cpu_to_be16(0x7800);
 438         ram_table->crgb_offset[6] = cpu_to_be16(0x8c00);
 439         ram_table->crgb_offset[7] = cpu_to_be16(0xa000);
 440         ram_table->crgb_slope[0]  = cpu_to_be16(0x3147);
 441         ram_table->crgb_slope[1]  = cpu_to_be16(0x2978);
 442         ram_table->crgb_slope[2]  = cpu_to_be16(0x23a2);
 443         ram_table->crgb_slope[3]  = cpu_to_be16(0x1f55);
 444         ram_table->crgb_slope[4]  = cpu_to_be16(0x1c63);
 445         ram_table->crgb_slope[5]  = cpu_to_be16(0x1a0f);
 446         ram_table->crgb_slope[6]  = cpu_to_be16(0x178d);
 447         ram_table->crgb_slope[7]  = cpu_to_be16(0x15ab);
 448
 449         fill_backlight_transform_table(
 450                         params, ram_table);
 451 }
 452
 453 void fill_iram_v_2_2(struct iram_table_v_2_2 *ram_table, struct dmcu_iram_parameters params)
 454 {
 455         unsigned int set = params.set;
 456
 457         ram_table->flags = 0x0;
 458
 459         ram_table->min_abm_backlight =
 460                         cpu_to_be16(params.min_abm_backlight);
 461
 462         ram_table->deviation_gain[0] = 0xb3;
 463         ram_table->deviation_gain[1] = 0xa8;
 464         ram_table->deviation_gain[2] = 0x98;
 465         ram_table->deviation_gain[3] = 0x68;
 466
 467         ram_table->min_reduction[0][0] = min_reduction_table_v_2_2[abm_config[set][0]];
 468         ram_table->min_reduction[1][0] = min_reduction_table_v_2_2[abm_config[set][0]];
 469         ram_table->min_reduction[2][0] = min_reduction_table_v_2_2[abm_config[set][0]];
 470         ram_table->min_reduction[3][0] = min_reduction_table_v_2_2[abm_config[set][0]];
 471         ram_table->min_reduction[4][0] = min_reduction_table_v_2_2[abm_config[set][0]];
 472         ram_table->max_reduction[0][0] = max_reduction_table_v_2_2[abm_config[set][0]];
 473         ram_table->max_reduction[1][0] = max_reduction_table_v_2_2[abm_config[set][0]];
 474         ram_table->max_reduction[2][0] = max_reduction_table_v_2_2[abm_config[set][0]];
 475         ram_table->max_reduction[3][0] = max_reduction_table_v_2_2[abm_config[set][0]];
 476         ram_table->max_reduction[4][0] = max_reduction_table_v_2_2[abm_config[set][0]];
 477
 478         ram_table->min_reduction[0][1] = min_reduction_table_v_2_2[abm_config[set][1]];
 479         ram_table->min_reduction[1][1] = min_reduction_table_v_2_2[abm_config[set][1]];
 480         ram_table->min_reduction[2][1] = min_reduction_table_v_2_2[abm_config[set][1]];
 481         ram_table->min_reduction[3][1] = min_reduction_table_v_2_2[abm_config[set][1]];
 482         ram_table->min_reduction[4][1] = min_reduction_table_v_2_2[abm_config[set][1]];
 483         ram_table->max_reduction[0][1] = max_reduction_table_v_2_2[abm_config[set][1]];
 484         ram_table->max_reduction[1][1] = max_reduction_table_v_2_2[abm_config[set][1]];
 485         ram_table->max_reduction[2][1] = max_reduction_table_v_2_2[abm_config[set][1]];
 486         ram_table->max_reduction[3][1] = max_reduction_table_v_2_2[abm_config[set][1]];
 487         ram_table->max_reduction[4][1] = max_reduction_table_v_2_2[abm_config[set][1]];
 488
 489         ram_table->min_reduction[0][2] = min_reduction_table_v_2_2[abm_config[set][2]];
 490         ram_table->min_reduction[1][2] = min_reduction_table_v_2_2[abm_config[set][2]];
 491         ram_table->min_reduction[2][2] = min_reduction_table_v_2_2[abm_config[set][2]];
 492         ram_table->min_reduction[3][2] = min_reduction_table_v_2_2[abm_config[set][2]];
 493         ram_table->min_reduction[4][2] = min_reduction_table_v_2_2[abm_config[set][2]];
 494         ram_table->max_reduction[0][2] = max_reduction_table_v_2_2[abm_config[set][2]];
 495         ram_table->max_reduction[1][2] = max_reduction_table_v_2_2[abm_config[set][2]];
 496         ram_table->max_reduction[2][2] = max_reduction_table_v_2_2[abm_config[set][2]];
 497         ram_table->max_reduction[3][2] = max_reduction_table_v_2_2[abm_config[set][2]];
 498         ram_table->max_reduction[4][2] = max_reduction_table_v_2_2[abm_config[set][2]];
 499
 500         ram_table->min_reduction[0][3] = min_reduction_table_v_2_2[abm_config[set][3]];
 501         ram_table->min_reduction[1][3] = min_reduction_table_v_2_2[abm_config[set][3]];
 502         ram_table->min_reduction[2][3] = min_reduction_table_v_2_2[abm_config[set][3]];
 503         ram_table->min_reduction[3][3] = min_reduction_table_v_2_2[abm_config[set][3]];
 504         ram_table->min_reduction[4][3] = min_reduction_table_v_2_2[abm_config[set][3]];
 505         ram_table->max_reduction[0][3] = max_reduction_table_v_2_2[abm_config[set][3]];
 506         ram_table->max_reduction[1][3] = max_reduction_table_v_2_2[abm_config[set][3]];
 507         ram_table->max_reduction[2][3] = max_reduction_table_v_2_2[abm_config[set][3]];
 508         ram_table->max_reduction[3][3] = max_reduction_table_v_2_2[abm_config[set][3]];
 509         ram_table->max_reduction[4][3] = max_reduction_table_v_2_2[abm_config[set][3]];
 510
 511         ram_table->bright_pos_gain[0][0] = 0x20;
 512         ram_table->bright_pos_gain[0][1] = 0x20;
 513         ram_table->bright_pos_gain[0][2] = 0x20;
 514         ram_table->bright_pos_gain[0][3] = 0x20;
 515         ram_table->bright_pos_gain[1][0] = 0x20;
 516         ram_table->bright_pos_gain[1][1] = 0x20;
 517         ram_table->bright_pos_gain[1][2] = 0x20;
 518         ram_table->bright_pos_gain[1][3] = 0x20;
 519         ram_table->bright_pos_gain[2][0] = 0x20;
 520         ram_table->bright_pos_gain[2][1] = 0x20;
 521         ram_table->bright_pos_gain[2][2] = 0x20;
 522         ram_table->bright_pos_gain[2][3] = 0x20;
 523         ram_table->bright_pos_gain[3][0] = 0x20;
 524         ram_table->bright_pos_gain[3][1] = 0x20;
 525         ram_table->bright_pos_gain[3][2] = 0x20;
 526         ram_table->bright_pos_gain[3][3] = 0x20;
 527         ram_table->bright_pos_gain[4][0] = 0x20;
 528         ram_table->bright_pos_gain[4][1] = 0x20;
 529         ram_table->bright_pos_gain[4][2] = 0x20;
 530         ram_table->bright_pos_gain[4][3] = 0x20;
 531
 532         ram_table->dark_pos_gain[0][0] = 0x00;
 533         ram_table->dark_pos_gain[0][1] = 0x00;
 534         ram_table->dark_pos_gain[0][2] = 0x00;
 535         ram_table->dark_pos_gain[0][3] = 0x00;
 536         ram_table->dark_pos_gain[1][0] = 0x00;
 537         ram_table->dark_pos_gain[1][1] = 0x00;
 538         ram_table->dark_pos_gain[1][2] = 0x00;
 539         ram_table->dark_pos_gain[1][3] = 0x00;
 540         ram_table->dark_pos_gain[2][0] = 0x00;
 541         ram_table->dark_pos_gain[2][1] = 0x00;
 542         ram_table->dark_pos_gain[2][2] = 0x00;
 543         ram_table->dark_pos_gain[2][3] = 0x00;
 544         ram_table->dark_pos_gain[3][0] = 0x00;
 545         ram_table->dark_pos_gain[3][1] = 0x00;
 546         ram_table->dark_pos_gain[3][2] = 0x00;
 547         ram_table->dark_pos_gain[3][3] = 0x00;
 548         ram_table->dark_pos_gain[4][0] = 0x00;
 549         ram_table->dark_pos_gain[4][1] = 0x00;
 550         ram_table->dark_pos_gain[4][2] = 0x00;
 551         ram_table->dark_pos_gain[4][3] = 0x00;
 552
 553         ram_table->hybrid_factor[0] = 0xff;
 554         ram_table->hybrid_factor[1] = 0xff;
 555         ram_table->hybrid_factor[2] = 0xff;
 556         ram_table->hybrid_factor[3] = 0xc0;
 557
 558         ram_table->contrast_factor[0] = 0x99;
 559         ram_table->contrast_factor[1] = 0x99;
 560         ram_table->contrast_factor[2] = 0x90;
 561         ram_table->contrast_factor[3] = 0x80;
 562
 563         ram_table->iir_curve[0] = 0x65;
 564         ram_table->iir_curve[1] = 0x65;
 565         ram_table->iir_curve[2] = 0x65;
 566         ram_table->iir_curve[3] = 0x65;
 567         ram_table->iir_curve[4] = 0x65;
 568
 569         //Gamma 2.2
 570         ram_table->crgb_thresh[0] = cpu_to_be16(0x127c);
 571         ram_table->crgb_thresh[1] = cpu_to_be16(0x151b);
 572         ram_table->crgb_thresh[2] = cpu_to_be16(0x17d5);
 573         ram_table->crgb_thresh[3] = cpu_to_be16(0x1a56);
 574         ram_table->crgb_thresh[4] = cpu_to_be16(0x1c83);
 575         ram_table->crgb_thresh[5] = cpu_to_be16(0x1e72);
 576         ram_table->crgb_thresh[6] = cpu_to_be16(0x20f0);
 577         ram_table->crgb_thresh[7] = cpu_to_be16(0x232b);
 578         ram_table->crgb_offset[0] = cpu_to_be16(0x2999);
 579         ram_table->crgb_offset[1] = cpu_to_be16(0x3999);
 580         ram_table->crgb_offset[2] = cpu_to_be16(0x4666);
 581         ram_table->crgb_offset[3] = cpu_to_be16(0x5999);
 582         ram_table->crgb_offset[4] = cpu_to_be16(0x6333);
 583         ram_table->crgb_offset[5] = cpu_to_be16(0x7800);
 584         ram_table->crgb_offset[6] = cpu_to_be16(0x8c00);
 585         ram_table->crgb_offset[7] = cpu_to_be16(0xa000);
 586         ram_table->crgb_slope[0]  = cpu_to_be16(0x3609);
 587         ram_table->crgb_slope[1]  = cpu_to_be16(0x2dfa);
 588         ram_table->crgb_slope[2]  = cpu_to_be16(0x27ea);
 589         ram_table->crgb_slope[3]  = cpu_to_be16(0x235d);
 590         ram_table->crgb_slope[4]  = cpu_to_be16(0x2042);
 591         ram_table->crgb_slope[5]  = cpu_to_be16(0x1dc3);
 592         ram_table->crgb_slope[6]  = cpu_to_be16(0x1b1a);
 593         ram_table->crgb_slope[7]  = cpu_to_be16(0x1910);
 594
 595         fill_backlight_transform_table_v_2_2(
 596                         params, ram_table, true);
 597 }
 598
 599 void fill_iram_v_2_3(struct iram_table_v_2_2 *ram_table, struct dmcu_iram_parameters params, bool big_endian)
 600 {
 601         unsigned int i, j;
 602         unsigned int set = params.set;
 603
 604         ram_table->flags = 0x0;
 605         ram_table->min_abm_backlight = (big_endian) ?
 606                 cpu_to_be16(params.min_abm_backlight) :
 607                 cpu_to_le16(params.min_abm_backlight);
 608
 609         for (i = 0; i < NUM_AGGR_LEVEL; i++) {
 610                 ram_table->hybrid_factor[i] = abm_settings[set][i].brightness_gain;
 611                 ram_table->contrast_factor[i] = abm_settings[set][i].contrast_factor;
 612                 ram_table->deviation_gain[i] = abm_settings[set][i].deviation_gain;
 613                 ram_table->min_knee[i] = abm_settings[set][i].min_knee;
 614                 ram_table->max_knee[i] = abm_settings[set][i].max_knee;
 615
 616                 for (j = 0; j < NUM_AMBI_LEVEL; j++) {
 617                         ram_table->min_reduction[j][i] = abm_settings[set][i].min_reduction;
 618                         ram_table->max_reduction[j][i] = abm_settings[set][i].max_reduction;
 619                         ram_table->bright_pos_gain[j][i] = abm_settings[set][i].bright_pos_gain;
 620                         ram_table->dark_pos_gain[j][i] = abm_settings[set][i].dark_pos_gain;
 621                 }
 622         }
 623
 624         ram_table->iir_curve[0] = 0x65;
 625         ram_table->iir_curve[1] = 0x65;
 626         ram_table->iir_curve[2] = 0x65;
 627         ram_table->iir_curve[3] = 0x65;
 628         ram_table->iir_curve[4] = 0x65;
 629
 630         //Gamma 2.2
 631         ram_table->crgb_thresh[0] = bswap16_based_on_endian(big_endian, 0x127c);
 632         ram_table->crgb_thresh[1] = bswap16_based_on_endian(big_endian, 0x151b);
 633         ram_table->crgb_thresh[2] = bswap16_based_on_endian(big_endian, 0x17d5);
 634         ram_table->crgb_thresh[3] = bswap16_based_on_endian(big_endian, 0x1a56);
 635         ram_table->crgb_thresh[4] = bswap16_based_on_endian(big_endian, 0x1c83);
 636         ram_table->crgb_thresh[5] = bswap16_based_on_endian(big_endian, 0x1e72);
 637         ram_table->crgb_thresh[6] = bswap16_based_on_endian(big_endian, 0x20f0);
 638         ram_table->crgb_thresh[7] = bswap16_based_on_endian(big_endian, 0x232b);
 639         ram_table->crgb_offset[0] = bswap16_based_on_endian(big_endian, 0x2999);
 640         ram_table->crgb_offset[1] = bswap16_based_on_endian(big_endian, 0x3999);
 641         ram_table->crgb_offset[2] = bswap16_based_on_endian(big_endian, 0x4666);
 642         ram_table->crgb_offset[3] = bswap16_based_on_endian(big_endian, 0x5999);
 643         ram_table->crgb_offset[4] = bswap16_based_on_endian(big_endian, 0x6333);
 644         ram_table->crgb_offset[5] = bswap16_based_on_endian(big_endian, 0x7800);
 645         ram_table->crgb_offset[6] = bswap16_based_on_endian(big_endian, 0x8c00);
 646         ram_table->crgb_offset[7] = bswap16_based_on_endian(big_endian, 0xa000);
 647         ram_table->crgb_slope[0]  = bswap16_based_on_endian(big_endian, 0x3609);
 648         ram_table->crgb_slope[1]  = bswap16_based_on_endian(big_endian, 0x2dfa);
 649         ram_table->crgb_slope[2]  = bswap16_based_on_endian(big_endian, 0x27ea);
 650         ram_table->crgb_slope[3]  = bswap16_based_on_endian(big_endian, 0x235d);
 651         ram_table->crgb_slope[4]  = bswap16_based_on_endian(big_endian, 0x2042);
 652         ram_table->crgb_slope[5]  = bswap16_based_on_endian(big_endian, 0x1dc3);
 653         ram_table->crgb_slope[6]  = bswap16_based_on_endian(big_endian, 0x1b1a);
 654         ram_table->crgb_slope[7]  = bswap16_based_on_endian(big_endian, 0x1910);
 655
 656         fill_backlight_transform_table_v_2_2(
 657                         params, ram_table, big_endian);
 658 }
 659
 660 bool dmub_init_abm_config(struct resource_pool *res_pool,
 661         struct dmcu_iram_parameters params)
 662 {
 663         struct iram_table_v_2_2 ram_table;
 664         struct abm_config_table config;
 665         bool result = false;
 666         uint32_t i, j = 0;
 667
 668 #if defined(CONFIG_DRM_AMD_DC_DCN)
 669         if (res_pool->abm == NULL && res_pool->multiple_abms[0] == NULL)
 670                 return false;
 671 #else
 672         if (res_pool->abm == NULL)
 673                 return false;
 674 #endif
 675
 676         memset(&ram_table, 0, sizeof(ram_table));
 677         memset(&config, 0, sizeof(config));
 678
 679         fill_iram_v_2_3(&ram_table, params, false);
 680
 681         // We must copy to structure that is aligned to 32-bit
 682         for (i = 0; i < NUM_POWER_FN_SEGS; i++) {
 683                 config.crgb_thresh[i] = ram_table.crgb_thresh[i];
 684                 config.crgb_offset[i] = ram_table.crgb_offset[i];
 685                 config.crgb_slope[i] = ram_table.crgb_slope[i];
 686         }
 687
 688         for (i = 0; i < NUM_BL_CURVE_SEGS; i++) {
 689                 config.backlight_thresholds[i] = ram_table.backlight_thresholds[i];
 690                 config.backlight_offsets[i] = ram_table.backlight_offsets[i];
 691         }
 692
 693         for (i = 0; i < NUM_AMBI_LEVEL; i++)
 694                 config.iir_curve[i] = ram_table.iir_curve[i];
 695
 696         for (i = 0; i < NUM_AMBI_LEVEL; i++) {
 697                 for (j = 0; j < NUM_AGGR_LEVEL; j++) {
 698                         config.min_reduction[i][j] = ram_table.min_reduction[i][j];
 699                         config.max_reduction[i][j] = ram_table.max_reduction[i][j];
 700                         config.bright_pos_gain[i][j] = ram_table.bright_pos_gain[i][j];
 701                         config.dark_pos_gain[i][j] = ram_table.dark_pos_gain[i][j];
 702                 }
 703         }
 704
 705         for (i = 0; i < NUM_AGGR_LEVEL; i++) {
 706                 config.hybrid_factor[i] = ram_table.hybrid_factor[i];
 707                 config.contrast_factor[i] = ram_table.contrast_factor[i];
 708                 config.deviation_gain[i] = ram_table.deviation_gain[i];
 709                 config.min_knee[i] = ram_table.min_knee[i];
 710                 config.max_knee[i] = ram_table.max_knee[i];
 711         }
 712
 713         config.min_abm_backlight = ram_table.min_abm_backlight;
 714
 715 #if defined(CONFIG_DRM_AMD_DC_DCN)
 716         if (res_pool->multiple_abms[0])
 717                 result = res_pool->multiple_abms[0]->funcs->init_abm_config(
 718                         res_pool->multiple_abms[0], (char *)(&config), sizeof(struct abm_config_table));
 719         else
 720 #endif
 721                 result = res_pool->abm->funcs->init_abm_config(
 722                         res_pool->abm, (char *)(&config), sizeof(struct abm_config_table));
 723
 724         return result;
 725 }
 726
 727 bool dmcu_load_iram(struct dmcu *dmcu,
 728         struct dmcu_iram_parameters params)
 729 {
 730         unsigned char ram_table[IRAM_SIZE];
 731         bool result = false;
 732
 733         if (dmcu == NULL)
 734                 return false;
 735
 736         if (dmcu && !dmcu->funcs->is_dmcu_initialized(dmcu))
 737                 return true;
 738
 739         memset(&ram_table, 0, sizeof(ram_table));
 740
 741         if (dmcu->dmcu_version.abm_version == 0x24) {
 742                 fill_iram_v_2_3((struct iram_table_v_2_2 *)ram_table, params, true);
 743                         result = dmcu->funcs->load_iram(
 744                                         dmcu, 0, (char *)(&ram_table), IRAM_RESERVE_AREA_START_V2_2);
 745         } else if (dmcu->dmcu_version.abm_version == 0x23) {
 746                 fill_iram_v_2_3((struct iram_table_v_2_2 *)ram_table, params, true);
 747
 748                 result = dmcu->funcs->load_iram(
 749                                 dmcu, 0, (char *)(&ram_table), IRAM_RESERVE_AREA_START_V2_2);
 750         } else if (dmcu->dmcu_version.abm_version == 0x22) {
 751                 fill_iram_v_2_2((struct iram_table_v_2_2 *)ram_table, params);
 752
 753                 result = dmcu->funcs->load_iram(
 754                                 dmcu, 0, (char *)(&ram_table), IRAM_RESERVE_AREA_START_V2_2);
 755         } else {
 756                 fill_iram_v_2((struct iram_table_v_2 *)ram_table, params);
 757
 758                 result = dmcu->funcs->load_iram(
 759                                 dmcu, 0, (char *)(&ram_table), IRAM_RESERVE_AREA_START_V2);
 760
 761                 if (result)
 762                         result = dmcu->funcs->load_iram(
 763                                         dmcu, IRAM_RESERVE_AREA_END_V2 + 1,
 764                                         (char *)(&ram_table) + IRAM_RESERVE_AREA_END_V2 + 1,
 765                                         sizeof(ram_table) - IRAM_RESERVE_AREA_END_V2 - 1);
 766         }
 767
 768         return result;
 769 }
 770