drivers/gpu/drm/amd/display/modules/power/power_helpers.c

   1 /* Copyright 2018 Advanced Micro Devices, Inc.
   2  *
   3  * Permission is hereby granted, free of charge, to any person obtaining a
   4  * copy of this software and associated documentation files (the "Software"),
   5  * to deal in the Software without restriction, including without limitation
   6  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   7  * and/or sell copies of the Software, and to permit persons to whom the
   8  * Software is furnished to do so, subject to the following conditions:
   9  *
  10  * The above copyright notice and this permission notice shall be included in
  11  * all copies or substantial portions of the Software.
  12  *
  13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  14  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  15  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  16  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  17  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  18  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  19  * OTHER DEALINGS IN THE SOFTWARE.
  20  *
  21  * Authors: AMD
  22  *
  23  */
  24
  25 #include "power_helpers.h"
  26 #include "dc/inc/hw/dmcu.h"
  27 #include "dc/inc/hw/abm.h"
  28 #include "dc.h"
  29 #include "core_types.h"
  30 #include "dmub_cmd.h"
  31
  32 #define DIV_ROUNDUP(a, b) (((a)+((b)/2))/(b))
  33 #define bswap16_based_on_endian(big_endian, value) \
  34         (big_endian) ? cpu_to_be16(value) : cpu_to_le16(value)
  35
  36 /* Possible Min Reduction config from least aggressive to most aggressive
  37  *  0    1     2     3     4     5     6     7     8     9     10    11   12
  38  * 100  98.0 94.1  94.1  85.1  80.3  75.3  69.4  60.0  57.6  50.2  49.8  40.0 %
  39  */
  40 static const unsigned char min_reduction_table[13] = {
  41 0xff, 0xfa, 0xf0, 0xf0, 0xd9, 0xcd, 0xc0, 0xb1, 0x99, 0x93, 0x80, 0x82, 0x66};
  42
  43 /* Possible Max Reduction configs from least aggressive to most aggressive
  44  *  0    1     2     3     4     5     6     7     8     9     10    11   12
  45  * 96.1 89.8 85.1  80.3  69.4  64.7  64.7  50.2  39.6  30.2  30.2  30.2  19.6 %
  46  */
  47 static const unsigned char max_reduction_table[13] = {
  48 0xf5, 0xe5, 0xd9, 0xcd, 0xb1, 0xa5, 0xa5, 0x80, 0x65, 0x4d, 0x4d, 0x4d, 0x32};
  49
  50 /* Possible ABM 2.2 Min Reduction configs from least aggressive to most aggressive
  51  *  0    1     2     3     4     5     6     7     8     9     10    11   12
  52  * 100  100   100   100   100   100   100   100  100  92.2  83.1  75.3  75.3 %
  53  */
  54 static const unsigned char min_reduction_table_v_2_2[13] = {
  55 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xeb, 0xd4, 0xc0, 0xc0};
  56
  57 /* Possible ABM 2.2 Max Reduction configs from least aggressive to most aggressive
  58  *  0    1     2     3     4     5     6     7     8     9     10    11   12
  59  * 96.1 89.8 74.9  69.4  64.7  52.2  48.6  39.6  30.2  25.1  19.6  12.5  12.5 %
  60  */
  61 static const unsigned char max_reduction_table_v_2_2[13] = {
  62 0xf5, 0xe5, 0xbf, 0xb1, 0xa5, 0x85, 0x7c, 0x65, 0x4d, 0x40, 0x32, 0x20, 0x20};
  63
  64 /* Predefined ABM configuration sets. We may have different configuration sets
  65  * in order to satisfy different power/quality requirements.
  66  */
  67 static const unsigned char abm_config[abm_defines_max_config][abm_defines_max_level] = {
  68 /*  ABM Level 1,    ABM Level 2,    ABM Level 3,    ABM Level 4 */
  69 {       2,              5,              7,              8       },      /* Default - Medium aggressiveness */
  70 {       2,              5,              8,              11      },      /* Alt #1  - Increased aggressiveness */
  71 {       0,              2,              4,              8       },      /* Alt #2  - Minimal aggressiveness */
  72 {       3,              6,              10,             12      },      /* Alt #3  - Super aggressiveness */
  73 };
  74
  75 struct abm_parameters {
  76         unsigned char min_reduction;
  77         unsigned char max_reduction;
  78         unsigned char bright_pos_gain;
  79         unsigned char dark_pos_gain;
  80         unsigned char brightness_gain;
  81         unsigned char contrast_factor;
  82         unsigned char deviation_gain;
  83         unsigned char min_knee;
  84         unsigned char max_knee;
  85         unsigned short blRampReduction;
  86         unsigned short blRampStart;
  87 };
  88
  89 static const struct abm_parameters abm_settings_config0[abm_defines_max_level] = {
  90 //  min_red  max_red  bright_pos  dark_pos  bright_gain  contrast  dev   min_knee  max_knee  blStart  blRed
  91         {0xff,   0xbf,    0x20,   0x00,     0xff,        0x99,     0xb3, 0x40,     0xe0,     0xCCCC,  0xCCCC},
  92         {0xde,   0x85,    0x20,   0x00,     0xff,        0x90,     0xa8, 0x40,     0xdf,     0xCCCC,  0xCCCC},
  93         {0xb0,   0x50,    0x20,   0x00,     0xc0,        0x88,     0x78, 0x70,     0xa0,     0xCCCC,  0xCCCC},
  94         {0x82,   0x40,    0x20,   0x00,     0x00,        0xff,     0xb3, 0x70,     0x70,     0xCCCC,  0xCCCC},
  95 };
  96
  97 static const struct abm_parameters abm_settings_config1[abm_defines_max_level] = {
  98 //  min_red  max_red  bright_pos  dark_pos  bright_gain  contrast  dev   min_knee  max_knee  blStart  blRed
  99         {0xf0,   0xd9,    0x20,   0x00,     0x00,        0xff,     0xb3, 0x70,     0x70,     0xCCCC,  0xCCCC},
 100         {0xcd,   0xa5,    0x20,   0x00,     0x00,        0xff,     0xb3, 0x70,     0x70,     0xCCCC,  0xCCCC},
 101         {0x99,   0x65,    0x20,   0x00,     0x00,        0xff,     0xb3, 0x70,     0x70,     0xCCCC,  0xCCCC},
 102         {0x82,   0x4d,    0x20,   0x00,     0x00,        0xff,     0xb3, 0x70,     0x70,     0xCCCC,  0xCCCC},
 103 };
 104
 105 static const struct abm_parameters * const abm_settings[] = {
 106         abm_settings_config0,
 107         abm_settings_config1,
 108 };
 109
 110 #define NUM_AMBI_LEVEL    5
 111 #define NUM_AGGR_LEVEL    4
 112 #define NUM_POWER_FN_SEGS 8
 113 #define NUM_BL_CURVE_SEGS 16
 114 #define IRAM_SIZE 256
 115
 116 #define IRAM_RESERVE_AREA_START_V2 0xF0  // reserve 0xF0~0xF6 are write by DMCU only
 117 #define IRAM_RESERVE_AREA_END_V2 0xF6  // reserve 0xF0~0xF6 are write by DMCU only
 118
 119 #define IRAM_RESERVE_AREA_START_V2_2 0xF0  // reserve 0xF0~0xFF are write by DMCU only
 120 #define IRAM_RESERVE_AREA_END_V2_2 0xFF  // reserve 0xF0~0xFF are write by DMCU only
 121
 122 #pragma pack(push, 1)
 123 /* NOTE: iRAM is 256B in size */
 124 struct iram_table_v_2 {
 125         /* flags                      */
 126         uint16_t min_abm_backlight;                                     /* 0x00 U16  */
 127
 128         /* parameters for ABM2.0 algorithm */
 129         uint8_t min_reduction[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL];          /* 0x02 U0.8 */
 130         uint8_t max_reduction[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL];          /* 0x16 U0.8 */
 131         uint8_t bright_pos_gain[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL];        /* 0x2a U2.6 */
 132         uint8_t bright_neg_gain[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL];        /* 0x3e U2.6 */
 133         uint8_t dark_pos_gain[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL];          /* 0x52 U2.6 */
 134         uint8_t dark_neg_gain[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL];          /* 0x66 U2.6 */
 135         uint8_t iir_curve[NUM_AMBI_LEVEL];                              /* 0x7a U0.8 */
 136         uint8_t deviation_gain;                                         /* 0x7f U0.8 */
 137
 138         /* parameters for crgb conversion */
 139         uint16_t crgb_thresh[NUM_POWER_FN_SEGS];                        /* 0x80 U3.13 */
 140         uint16_t crgb_offset[NUM_POWER_FN_SEGS];                        /* 0x90 U1.15 */
 141         uint16_t crgb_slope[NUM_POWER_FN_SEGS];                         /* 0xa0 U4.12 */
 142
 143         /* parameters for custom curve */
 144         /* thresholds for brightness --> backlight */
 145         uint16_t backlight_thresholds[NUM_BL_CURVE_SEGS];               /* 0xb0 U16.0 */
 146         /* offsets for brightness --> backlight */
 147         uint16_t backlight_offsets[NUM_BL_CURVE_SEGS];                  /* 0xd0 U16.0 */
 148
 149         /* For reading PSR State directly from IRAM */
 150         uint8_t psr_state;                                              /* 0xf0       */
 151         uint8_t dmcu_mcp_interface_version;                             /* 0xf1       */
 152         uint8_t dmcu_abm_feature_version;                               /* 0xf2       */
 153         uint8_t dmcu_psr_feature_version;                               /* 0xf3       */
 154         uint16_t dmcu_version;                                          /* 0xf4       */
 155         uint8_t dmcu_state;                                             /* 0xf6       */
 156
 157         uint16_t blRampReduction;                                       /* 0xf7       */
 158         uint16_t blRampStart;                                           /* 0xf9       */
 159         uint8_t dummy5;                                                 /* 0xfb       */
 160         uint8_t dummy6;                                                 /* 0xfc       */
 161         uint8_t dummy7;                                                 /* 0xfd       */
 162         uint8_t dummy8;                                                 /* 0xfe       */
 163         uint8_t dummy9;                                                 /* 0xff       */
 164 };
 165
 166 struct iram_table_v_2_2 {
 167         /* flags                      */
 168         uint16_t flags;                                                 /* 0x00 U16  */
 169
 170         /* parameters for ABM2.2 algorithm */
 171         uint8_t min_reduction[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL];          /* 0x02 U0.8 */
 172         uint8_t max_reduction[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL];          /* 0x16 U0.8 */
 173         uint8_t bright_pos_gain[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL];        /* 0x2a U2.6 */
 174         uint8_t dark_pos_gain[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL];          /* 0x3e U2.6 */
 175         uint8_t hybrid_factor[NUM_AGGR_LEVEL];                          /* 0x52 U0.8 */
 176         uint8_t contrast_factor[NUM_AGGR_LEVEL];                        /* 0x56 U0.8 */
 177         uint8_t deviation_gain[NUM_AGGR_LEVEL];                         /* 0x5a U0.8 */
 178         uint8_t iir_curve[NUM_AMBI_LEVEL];                              /* 0x5e U0.8 */
 179         uint8_t min_knee[NUM_AGGR_LEVEL];                               /* 0x63 U0.8 */
 180         uint8_t max_knee[NUM_AGGR_LEVEL];                               /* 0x67 U0.8 */
 181         uint16_t min_abm_backlight;                                     /* 0x6b U16  */
 182         uint8_t pad[19];                                                /* 0x6d U0.8 */
 183
 184         /* parameters for crgb conversion */
 185         uint16_t crgb_thresh[NUM_POWER_FN_SEGS];                        /* 0x80 U3.13 */
 186         uint16_t crgb_offset[NUM_POWER_FN_SEGS];                        /* 0x90 U1.15 */
 187         uint16_t crgb_slope[NUM_POWER_FN_SEGS];                         /* 0xa0 U4.12 */
 188
 189         /* parameters for custom curve */
 190         /* thresholds for brightness --> backlight */
 191         uint16_t backlight_thresholds[NUM_BL_CURVE_SEGS];               /* 0xb0 U16.0 */
 192         /* offsets for brightness --> backlight */
 193         uint16_t backlight_offsets[NUM_BL_CURVE_SEGS];                  /* 0xd0 U16.0 */
 194
 195         /* For reading PSR State directly from IRAM */
 196         uint8_t psr_state;                                              /* 0xf0       */
 197         uint8_t dmcu_mcp_interface_version;                             /* 0xf1       */
 198         uint8_t dmcu_abm_feature_version;                               /* 0xf2       */
 199         uint8_t dmcu_psr_feature_version;                               /* 0xf3       */
 200         uint16_t dmcu_version;                                          /* 0xf4       */
 201         uint8_t dmcu_state;                                             /* 0xf6       */
 202
 203         uint8_t dummy1;                                                 /* 0xf7       */
 204         uint8_t dummy2;                                                 /* 0xf8       */
 205         uint8_t dummy3;                                                 /* 0xf9       */
 206         uint8_t dummy4;                                                 /* 0xfa       */
 207         uint8_t dummy5;                                                 /* 0xfb       */
 208         uint8_t dummy6;                                                 /* 0xfc       */
 209         uint8_t dummy7;                                                 /* 0xfd       */
 210         uint8_t dummy8;                                                 /* 0xfe       */
 211         uint8_t dummy9;                                                 /* 0xff       */
 212 };
 213 #pragma pack(pop)
 214
 215 static void fill_backlight_transform_table(struct dmcu_iram_parameters params,
 216                 struct iram_table_v_2 *table)
 217 {
 218         unsigned int i;
 219         unsigned int num_entries = NUM_BL_CURVE_SEGS;
 220         unsigned int lut_index;
 221
 222         table->backlight_thresholds[0] = 0;
 223         table->backlight_offsets[0] = params.backlight_lut_array[0];
 224         table->backlight_thresholds[num_entries-1] = 0xFFFF;
 225         table->backlight_offsets[num_entries-1] =
 226                 params.backlight_lut_array[params.backlight_lut_array_size - 1];
 227
 228         /* Setup all brightness levels between 0% and 100% exclusive
 229          * Fills brightness-to-backlight transform table. Backlight custom curve
 230          * describes transform from brightness to backlight. It will be defined
 231          * as set of thresholds and set of offsets, together, implying
 232          * extrapolation of custom curve into 16 uniformly spanned linear
 233          * segments.  Each threshold/offset represented by 16 bit entry in
 234          * format U4.10.
 235          */
 236         for (i = 1; i+1 < num_entries; i++) {
 237                 lut_index = (params.backlight_lut_array_size - 1) * i / (num_entries - 1);
 238                 ASSERT(lut_index < params.backlight_lut_array_size);
 239
 240                 table->backlight_thresholds[i] =
 241                         cpu_to_be16(DIV_ROUNDUP((i * 65536), num_entries));
 242                 table->backlight_offsets[i] =
 243                         cpu_to_be16(params.backlight_lut_array[lut_index]);
 244         }
 245 }
 246
 247 static void fill_backlight_transform_table_v_2_2(struct dmcu_iram_parameters params,
 248                 struct iram_table_v_2_2 *table, bool big_endian)
 249 {
 250         unsigned int i;
 251         unsigned int num_entries = NUM_BL_CURVE_SEGS;
 252         unsigned int lut_index;
 253
 254         table->backlight_thresholds[0] = 0;
 255         table->backlight_offsets[0] = params.backlight_lut_array[0];
 256         table->backlight_thresholds[num_entries-1] = 0xFFFF;
 257         table->backlight_offsets[num_entries-1] =
 258                 params.backlight_lut_array[params.backlight_lut_array_size - 1];
 259
 260         /* Setup all brightness levels between 0% and 100% exclusive
 261          * Fills brightness-to-backlight transform table. Backlight custom curve
 262          * describes transform from brightness to backlight. It will be defined
 263          * as set of thresholds and set of offsets, together, implying
 264          * extrapolation of custom curve into 16 uniformly spanned linear
 265          * segments.  Each threshold/offset represented by 16 bit entry in
 266          * format U4.10.
 267          */
 268         for (i = 1; i+1 < num_entries; i++) {
 269                 lut_index = (params.backlight_lut_array_size - 1) * i / (num_entries - 1);
 270                 ASSERT(lut_index < params.backlight_lut_array_size);
 271
 272                 table->backlight_thresholds[i] = (big_endian) ?
 273                         cpu_to_be16(DIV_ROUNDUP((i * 65536), num_entries)) :
 274                         cpu_to_le16(DIV_ROUNDUP((i * 65536), num_entries));
 275                 table->backlight_offsets[i] = (big_endian) ?
 276                         cpu_to_be16(params.backlight_lut_array[lut_index]) :
 277                         cpu_to_le16(params.backlight_lut_array[lut_index]);
 278         }
 279 }
 280
 281 void fill_iram_v_2(struct iram_table_v_2 *ram_table, struct dmcu_iram_parameters params)
 282 {
 283         unsigned int set = params.set;
 284
 285         ram_table->min_abm_backlight =
 286                         cpu_to_be16(params.min_abm_backlight);
 287         ram_table->deviation_gain = 0xb3;
 288
 289         ram_table->blRampReduction =
 290                 cpu_to_be16(params.backlight_ramping_reduction);
 291         ram_table->blRampStart =
 292                 cpu_to_be16(params.backlight_ramping_start);
 293
 294         ram_table->min_reduction[0][0] = min_reduction_table[abm_config[set][0]];
 295         ram_table->min_reduction[1][0] = min_reduction_table[abm_config[set][0]];
 296         ram_table->min_reduction[2][0] = min_reduction_table[abm_config[set][0]];
 297         ram_table->min_reduction[3][0] = min_reduction_table[abm_config[set][0]];
 298         ram_table->min_reduction[4][0] = min_reduction_table[abm_config[set][0]];
 299         ram_table->max_reduction[0][0] = max_reduction_table[abm_config[set][0]];
 300         ram_table->max_reduction[1][0] = max_reduction_table[abm_config[set][0]];
 301         ram_table->max_reduction[2][0] = max_reduction_table[abm_config[set][0]];
 302         ram_table->max_reduction[3][0] = max_reduction_table[abm_config[set][0]];
 303         ram_table->max_reduction[4][0] = max_reduction_table[abm_config[set][0]];
 304
 305         ram_table->min_reduction[0][1] = min_reduction_table[abm_config[set][1]];
 306         ram_table->min_reduction[1][1] = min_reduction_table[abm_config[set][1]];
 307         ram_table->min_reduction[2][1] = min_reduction_table[abm_config[set][1]];
 308         ram_table->min_reduction[3][1] = min_reduction_table[abm_config[set][1]];
 309         ram_table->min_reduction[4][1] = min_reduction_table[abm_config[set][1]];
 310         ram_table->max_reduction[0][1] = max_reduction_table[abm_config[set][1]];
 311         ram_table->max_reduction[1][1] = max_reduction_table[abm_config[set][1]];
 312         ram_table->max_reduction[2][1] = max_reduction_table[abm_config[set][1]];
 313         ram_table->max_reduction[3][1] = max_reduction_table[abm_config[set][1]];
 314         ram_table->max_reduction[4][1] = max_reduction_table[abm_config[set][1]];
 315
 316         ram_table->min_reduction[0][2] = min_reduction_table[abm_config[set][2]];
 317         ram_table->min_reduction[1][2] = min_reduction_table[abm_config[set][2]];
 318         ram_table->min_reduction[2][2] = min_reduction_table[abm_config[set][2]];
 319         ram_table->min_reduction[3][2] = min_reduction_table[abm_config[set][2]];
 320         ram_table->min_reduction[4][2] = min_reduction_table[abm_config[set][2]];
 321         ram_table->max_reduction[0][2] = max_reduction_table[abm_config[set][2]];
 322         ram_table->max_reduction[1][2] = max_reduction_table[abm_config[set][2]];
 323         ram_table->max_reduction[2][2] = max_reduction_table[abm_config[set][2]];
 324         ram_table->max_reduction[3][2] = max_reduction_table[abm_config[set][2]];
 325         ram_table->max_reduction[4][2] = max_reduction_table[abm_config[set][2]];
 326
 327         ram_table->min_reduction[0][3] = min_reduction_table[abm_config[set][3]];
 328         ram_table->min_reduction[1][3] = min_reduction_table[abm_config[set][3]];
 329         ram_table->min_reduction[2][3] = min_reduction_table[abm_config[set][3]];
 330         ram_table->min_reduction[3][3] = min_reduction_table[abm_config[set][3]];
 331         ram_table->min_reduction[4][3] = min_reduction_table[abm_config[set][3]];
 332         ram_table->max_reduction[0][3] = max_reduction_table[abm_config[set][3]];
 333         ram_table->max_reduction[1][3] = max_reduction_table[abm_config[set][3]];
 334         ram_table->max_reduction[2][3] = max_reduction_table[abm_config[set][3]];
 335         ram_table->max_reduction[3][3] = max_reduction_table[abm_config[set][3]];
 336         ram_table->max_reduction[4][3] = max_reduction_table[abm_config[set][3]];
 337
 338         ram_table->bright_pos_gain[0][0] = 0x20;
 339         ram_table->bright_pos_gain[0][1] = 0x20;
 340         ram_table->bright_pos_gain[0][2] = 0x20;
 341         ram_table->bright_pos_gain[0][3] = 0x20;
 342         ram_table->bright_pos_gain[1][0] = 0x20;
 343         ram_table->bright_pos_gain[1][1] = 0x20;
 344         ram_table->bright_pos_gain[1][2] = 0x20;
 345         ram_table->bright_pos_gain[1][3] = 0x20;
 346         ram_table->bright_pos_gain[2][0] = 0x20;
 347         ram_table->bright_pos_gain[2][1] = 0x20;
 348         ram_table->bright_pos_gain[2][2] = 0x20;
 349         ram_table->bright_pos_gain[2][3] = 0x20;
 350         ram_table->bright_pos_gain[3][0] = 0x20;
 351         ram_table->bright_pos_gain[3][1] = 0x20;
 352         ram_table->bright_pos_gain[3][2] = 0x20;
 353         ram_table->bright_pos_gain[3][3] = 0x20;
 354         ram_table->bright_pos_gain[4][0] = 0x20;
 355         ram_table->bright_pos_gain[4][1] = 0x20;
 356         ram_table->bright_pos_gain[4][2] = 0x20;
 357         ram_table->bright_pos_gain[4][3] = 0x20;
 358         ram_table->bright_neg_gain[0][0] = 0x00;
 359         ram_table->bright_neg_gain[0][1] = 0x00;
 360         ram_table->bright_neg_gain[0][2] = 0x00;
 361         ram_table->bright_neg_gain[0][3] = 0x00;
 362         ram_table->bright_neg_gain[1][0] = 0x00;
 363         ram_table->bright_neg_gain[1][1] = 0x00;
 364         ram_table->bright_neg_gain[1][2] = 0x00;
 365         ram_table->bright_neg_gain[1][3] = 0x00;
 366         ram_table->bright_neg_gain[2][0] = 0x00;
 367         ram_table->bright_neg_gain[2][1] = 0x00;
 368         ram_table->bright_neg_gain[2][2] = 0x00;
 369         ram_table->bright_neg_gain[2][3] = 0x00;
 370         ram_table->bright_neg_gain[3][0] = 0x00;
 371         ram_table->bright_neg_gain[3][1] = 0x00;
 372         ram_table->bright_neg_gain[3][2] = 0x00;
 373         ram_table->bright_neg_gain[3][3] = 0x00;
 374         ram_table->bright_neg_gain[4][0] = 0x00;
 375         ram_table->bright_neg_gain[4][1] = 0x00;
 376         ram_table->bright_neg_gain[4][2] = 0x00;
 377         ram_table->bright_neg_gain[4][3] = 0x00;
 378         ram_table->dark_pos_gain[0][0] = 0x00;
 379         ram_table->dark_pos_gain[0][1] = 0x00;
 380         ram_table->dark_pos_gain[0][2] = 0x00;
 381         ram_table->dark_pos_gain[0][3] = 0x00;
 382         ram_table->dark_pos_gain[1][0] = 0x00;
 383         ram_table->dark_pos_gain[1][1] = 0x00;
 384         ram_table->dark_pos_gain[1][2] = 0x00;
 385         ram_table->dark_pos_gain[1][3] = 0x00;
 386         ram_table->dark_pos_gain[2][0] = 0x00;
 387         ram_table->dark_pos_gain[2][1] = 0x00;
 388         ram_table->dark_pos_gain[2][2] = 0x00;
 389         ram_table->dark_pos_gain[2][3] = 0x00;
 390         ram_table->dark_pos_gain[3][0] = 0x00;
 391         ram_table->dark_pos_gain[3][1] = 0x00;
 392         ram_table->dark_pos_gain[3][2] = 0x00;
 393         ram_table->dark_pos_gain[3][3] = 0x00;
 394         ram_table->dark_pos_gain[4][0] = 0x00;
 395         ram_table->dark_pos_gain[4][1] = 0x00;
 396         ram_table->dark_pos_gain[4][2] = 0x00;
 397         ram_table->dark_pos_gain[4][3] = 0x00;
 398         ram_table->dark_neg_gain[0][0] = 0x00;
 399         ram_table->dark_neg_gain[0][1] = 0x00;
 400         ram_table->dark_neg_gain[0][2] = 0x00;
 401         ram_table->dark_neg_gain[0][3] = 0x00;
 402         ram_table->dark_neg_gain[1][0] = 0x00;
 403         ram_table->dark_neg_gain[1][1] = 0x00;
 404         ram_table->dark_neg_gain[1][2] = 0x00;
 405         ram_table->dark_neg_gain[1][3] = 0x00;
 406         ram_table->dark_neg_gain[2][0] = 0x00;
 407         ram_table->dark_neg_gain[2][1] = 0x00;
 408         ram_table->dark_neg_gain[2][2] = 0x00;
 409         ram_table->dark_neg_gain[2][3] = 0x00;
 410         ram_table->dark_neg_gain[3][0] = 0x00;
 411         ram_table->dark_neg_gain[3][1] = 0x00;
 412         ram_table->dark_neg_gain[3][2] = 0x00;
 413         ram_table->dark_neg_gain[3][3] = 0x00;
 414         ram_table->dark_neg_gain[4][0] = 0x00;
 415         ram_table->dark_neg_gain[4][1] = 0x00;
 416         ram_table->dark_neg_gain[4][2] = 0x00;
 417         ram_table->dark_neg_gain[4][3] = 0x00;
 418
 419         ram_table->iir_curve[0] = 0x65;
 420         ram_table->iir_curve[1] = 0x65;
 421         ram_table->iir_curve[2] = 0x65;
 422         ram_table->iir_curve[3] = 0x65;
 423         ram_table->iir_curve[4] = 0x65;
 424
 425         //Gamma 2.4
 426         ram_table->crgb_thresh[0] = cpu_to_be16(0x13b6);
 427         ram_table->crgb_thresh[1] = cpu_to_be16(0x1648);
 428         ram_table->crgb_thresh[2] = cpu_to_be16(0x18e3);
 429         ram_table->crgb_thresh[3] = cpu_to_be16(0x1b41);
 430         ram_table->crgb_thresh[4] = cpu_to_be16(0x1d46);
 431         ram_table->crgb_thresh[5] = cpu_to_be16(0x1f21);
 432         ram_table->crgb_thresh[6] = cpu_to_be16(0x2167);
 433         ram_table->crgb_thresh[7] = cpu_to_be16(0x2384);
 434         ram_table->crgb_offset[0] = cpu_to_be16(0x2999);
 435         ram_table->crgb_offset[1] = cpu_to_be16(0x3999);
 436         ram_table->crgb_offset[2] = cpu_to_be16(0x4666);
 437         ram_table->crgb_offset[3] = cpu_to_be16(0x5999);
 438         ram_table->crgb_offset[4] = cpu_to_be16(0x6333);
 439         ram_table->crgb_offset[5] = cpu_to_be16(0x7800);
 440         ram_table->crgb_offset[6] = cpu_to_be16(0x8c00);
 441         ram_table->crgb_offset[7] = cpu_to_be16(0xa000);
 442         ram_table->crgb_slope[0]  = cpu_to_be16(0x3147);
 443         ram_table->crgb_slope[1]  = cpu_to_be16(0x2978);
 444         ram_table->crgb_slope[2]  = cpu_to_be16(0x23a2);
 445         ram_table->crgb_slope[3]  = cpu_to_be16(0x1f55);
 446         ram_table->crgb_slope[4]  = cpu_to_be16(0x1c63);
 447         ram_table->crgb_slope[5]  = cpu_to_be16(0x1a0f);
 448         ram_table->crgb_slope[6]  = cpu_to_be16(0x178d);
 449         ram_table->crgb_slope[7]  = cpu_to_be16(0x15ab);
 450
 451         fill_backlight_transform_table(
 452                         params, ram_table);
 453 }
 454
 455 void fill_iram_v_2_2(struct iram_table_v_2_2 *ram_table, struct dmcu_iram_parameters params)
 456 {
 457         unsigned int set = params.set;
 458
 459         ram_table->flags = 0x0;
 460
 461         ram_table->min_abm_backlight =
 462                         cpu_to_be16(params.min_abm_backlight);
 463
 464         ram_table->deviation_gain[0] = 0xb3;
 465         ram_table->deviation_gain[1] = 0xa8;
 466         ram_table->deviation_gain[2] = 0x98;
 467         ram_table->deviation_gain[3] = 0x68;
 468
 469         ram_table->min_reduction[0][0] = min_reduction_table_v_2_2[abm_config[set][0]];
 470         ram_table->min_reduction[1][0] = min_reduction_table_v_2_2[abm_config[set][0]];
 471         ram_table->min_reduction[2][0] = min_reduction_table_v_2_2[abm_config[set][0]];
 472         ram_table->min_reduction[3][0] = min_reduction_table_v_2_2[abm_config[set][0]];
 473         ram_table->min_reduction[4][0] = min_reduction_table_v_2_2[abm_config[set][0]];
 474         ram_table->max_reduction[0][0] = max_reduction_table_v_2_2[abm_config[set][0]];
 475         ram_table->max_reduction[1][0] = max_reduction_table_v_2_2[abm_config[set][0]];
 476         ram_table->max_reduction[2][0] = max_reduction_table_v_2_2[abm_config[set][0]];
 477         ram_table->max_reduction[3][0] = max_reduction_table_v_2_2[abm_config[set][0]];
 478         ram_table->max_reduction[4][0] = max_reduction_table_v_2_2[abm_config[set][0]];
 479
 480         ram_table->min_reduction[0][1] = min_reduction_table_v_2_2[abm_config[set][1]];
 481         ram_table->min_reduction[1][1] = min_reduction_table_v_2_2[abm_config[set][1]];
 482         ram_table->min_reduction[2][1] = min_reduction_table_v_2_2[abm_config[set][1]];
 483         ram_table->min_reduction[3][1] = min_reduction_table_v_2_2[abm_config[set][1]];
 484         ram_table->min_reduction[4][1] = min_reduction_table_v_2_2[abm_config[set][1]];
 485         ram_table->max_reduction[0][1] = max_reduction_table_v_2_2[abm_config[set][1]];
 486         ram_table->max_reduction[1][1] = max_reduction_table_v_2_2[abm_config[set][1]];
 487         ram_table->max_reduction[2][1] = max_reduction_table_v_2_2[abm_config[set][1]];
 488         ram_table->max_reduction[3][1] = max_reduction_table_v_2_2[abm_config[set][1]];
 489         ram_table->max_reduction[4][1] = max_reduction_table_v_2_2[abm_config[set][1]];
 490
 491         ram_table->min_reduction[0][2] = min_reduction_table_v_2_2[abm_config[set][2]];
 492         ram_table->min_reduction[1][2] = min_reduction_table_v_2_2[abm_config[set][2]];
 493         ram_table->min_reduction[2][2] = min_reduction_table_v_2_2[abm_config[set][2]];
 494         ram_table->min_reduction[3][2] = min_reduction_table_v_2_2[abm_config[set][2]];
 495         ram_table->min_reduction[4][2] = min_reduction_table_v_2_2[abm_config[set][2]];
 496         ram_table->max_reduction[0][2] = max_reduction_table_v_2_2[abm_config[set][2]];
 497         ram_table->max_reduction[1][2] = max_reduction_table_v_2_2[abm_config[set][2]];
 498         ram_table->max_reduction[2][2] = max_reduction_table_v_2_2[abm_config[set][2]];
 499         ram_table->max_reduction[3][2] = max_reduction_table_v_2_2[abm_config[set][2]];
 500         ram_table->max_reduction[4][2] = max_reduction_table_v_2_2[abm_config[set][2]];
 501
 502         ram_table->min_reduction[0][3] = min_reduction_table_v_2_2[abm_config[set][3]];
 503         ram_table->min_reduction[1][3] = min_reduction_table_v_2_2[abm_config[set][3]];
 504         ram_table->min_reduction[2][3] = min_reduction_table_v_2_2[abm_config[set][3]];
 505         ram_table->min_reduction[3][3] = min_reduction_table_v_2_2[abm_config[set][3]];
 506         ram_table->min_reduction[4][3] = min_reduction_table_v_2_2[abm_config[set][3]];
 507         ram_table->max_reduction[0][3] = max_reduction_table_v_2_2[abm_config[set][3]];
 508         ram_table->max_reduction[1][3] = max_reduction_table_v_2_2[abm_config[set][3]];
 509         ram_table->max_reduction[2][3] = max_reduction_table_v_2_2[abm_config[set][3]];
 510         ram_table->max_reduction[3][3] = max_reduction_table_v_2_2[abm_config[set][3]];
 511         ram_table->max_reduction[4][3] = max_reduction_table_v_2_2[abm_config[set][3]];
 512
 513         ram_table->bright_pos_gain[0][0] = 0x20;
 514         ram_table->bright_pos_gain[0][1] = 0x20;
 515         ram_table->bright_pos_gain[0][2] = 0x20;
 516         ram_table->bright_pos_gain[0][3] = 0x20;
 517         ram_table->bright_pos_gain[1][0] = 0x20;
 518         ram_table->bright_pos_gain[1][1] = 0x20;
 519         ram_table->bright_pos_gain[1][2] = 0x20;
 520         ram_table->bright_pos_gain[1][3] = 0x20;
 521         ram_table->bright_pos_gain[2][0] = 0x20;
 522         ram_table->bright_pos_gain[2][1] = 0x20;
 523         ram_table->bright_pos_gain[2][2] = 0x20;
 524         ram_table->bright_pos_gain[2][3] = 0x20;
 525         ram_table->bright_pos_gain[3][0] = 0x20;
 526         ram_table->bright_pos_gain[3][1] = 0x20;
 527         ram_table->bright_pos_gain[3][2] = 0x20;
 528         ram_table->bright_pos_gain[3][3] = 0x20;
 529         ram_table->bright_pos_gain[4][0] = 0x20;
 530         ram_table->bright_pos_gain[4][1] = 0x20;
 531         ram_table->bright_pos_gain[4][2] = 0x20;
 532         ram_table->bright_pos_gain[4][3] = 0x20;
 533
 534         ram_table->dark_pos_gain[0][0] = 0x00;
 535         ram_table->dark_pos_gain[0][1] = 0x00;
 536         ram_table->dark_pos_gain[0][2] = 0x00;
 537         ram_table->dark_pos_gain[0][3] = 0x00;
 538         ram_table->dark_pos_gain[1][0] = 0x00;
 539         ram_table->dark_pos_gain[1][1] = 0x00;
 540         ram_table->dark_pos_gain[1][2] = 0x00;
 541         ram_table->dark_pos_gain[1][3] = 0x00;
 542         ram_table->dark_pos_gain[2][0] = 0x00;
 543         ram_table->dark_pos_gain[2][1] = 0x00;
 544         ram_table->dark_pos_gain[2][2] = 0x00;
 545         ram_table->dark_pos_gain[2][3] = 0x00;
 546         ram_table->dark_pos_gain[3][0] = 0x00;
 547         ram_table->dark_pos_gain[3][1] = 0x00;
 548         ram_table->dark_pos_gain[3][2] = 0x00;
 549         ram_table->dark_pos_gain[3][3] = 0x00;
 550         ram_table->dark_pos_gain[4][0] = 0x00;
 551         ram_table->dark_pos_gain[4][1] = 0x00;
 552         ram_table->dark_pos_gain[4][2] = 0x00;
 553         ram_table->dark_pos_gain[4][3] = 0x00;
 554
 555         ram_table->hybrid_factor[0] = 0xff;
 556         ram_table->hybrid_factor[1] = 0xff;
 557         ram_table->hybrid_factor[2] = 0xff;
 558         ram_table->hybrid_factor[3] = 0xc0;
 559
 560         ram_table->contrast_factor[0] = 0x99;
 561         ram_table->contrast_factor[1] = 0x99;
 562         ram_table->contrast_factor[2] = 0x90;
 563         ram_table->contrast_factor[3] = 0x80;
 564
 565         ram_table->iir_curve[0] = 0x65;
 566         ram_table->iir_curve[1] = 0x65;
 567         ram_table->iir_curve[2] = 0x65;
 568         ram_table->iir_curve[3] = 0x65;
 569         ram_table->iir_curve[4] = 0x65;
 570
 571         //Gamma 2.2
 572         ram_table->crgb_thresh[0] = cpu_to_be16(0x127c);
 573         ram_table->crgb_thresh[1] = cpu_to_be16(0x151b);
 574         ram_table->crgb_thresh[2] = cpu_to_be16(0x17d5);
 575         ram_table->crgb_thresh[3] = cpu_to_be16(0x1a56);
 576         ram_table->crgb_thresh[4] = cpu_to_be16(0x1c83);
 577         ram_table->crgb_thresh[5] = cpu_to_be16(0x1e72);
 578         ram_table->crgb_thresh[6] = cpu_to_be16(0x20f0);
 579         ram_table->crgb_thresh[7] = cpu_to_be16(0x232b);
 580         ram_table->crgb_offset[0] = cpu_to_be16(0x2999);
 581         ram_table->crgb_offset[1] = cpu_to_be16(0x3999);
 582         ram_table->crgb_offset[2] = cpu_to_be16(0x4666);
 583         ram_table->crgb_offset[3] = cpu_to_be16(0x5999);
 584         ram_table->crgb_offset[4] = cpu_to_be16(0x6333);
 585         ram_table->crgb_offset[5] = cpu_to_be16(0x7800);
 586         ram_table->crgb_offset[6] = cpu_to_be16(0x8c00);
 587         ram_table->crgb_offset[7] = cpu_to_be16(0xa000);
 588         ram_table->crgb_slope[0]  = cpu_to_be16(0x3609);
 589         ram_table->crgb_slope[1]  = cpu_to_be16(0x2dfa);
 590         ram_table->crgb_slope[2]  = cpu_to_be16(0x27ea);
 591         ram_table->crgb_slope[3]  = cpu_to_be16(0x235d);
 592         ram_table->crgb_slope[4]  = cpu_to_be16(0x2042);
 593         ram_table->crgb_slope[5]  = cpu_to_be16(0x1dc3);
 594         ram_table->crgb_slope[6]  = cpu_to_be16(0x1b1a);
 595         ram_table->crgb_slope[7]  = cpu_to_be16(0x1910);
 596
 597         fill_backlight_transform_table_v_2_2(
 598                         params, ram_table, true);
 599 }
 600
 601 void fill_iram_v_2_3(struct iram_table_v_2_2 *ram_table, struct dmcu_iram_parameters params, bool big_endian)
 602 {
 603         unsigned int i, j;
 604         unsigned int set = params.set;
 605
 606         ram_table->flags = 0x0;
 607         ram_table->min_abm_backlight = (big_endian) ?
 608                 cpu_to_be16(params.min_abm_backlight) :
 609                 cpu_to_le16(params.min_abm_backlight);
 610
 611         for (i = 0; i < NUM_AGGR_LEVEL; i++) {
 612                 ram_table->hybrid_factor[i] = abm_settings[set][i].brightness_gain;
 613                 ram_table->contrast_factor[i] = abm_settings[set][i].contrast_factor;
 614                 ram_table->deviation_gain[i] = abm_settings[set][i].deviation_gain;
 615                 ram_table->min_knee[i] = abm_settings[set][i].min_knee;
 616                 ram_table->max_knee[i] = abm_settings[set][i].max_knee;
 617
 618                 for (j = 0; j < NUM_AMBI_LEVEL; j++) {
 619                         ram_table->min_reduction[j][i] = abm_settings[set][i].min_reduction;
 620                         ram_table->max_reduction[j][i] = abm_settings[set][i].max_reduction;
 621                         ram_table->bright_pos_gain[j][i] = abm_settings[set][i].bright_pos_gain;
 622                         ram_table->dark_pos_gain[j][i] = abm_settings[set][i].dark_pos_gain;
 623                 }
 624         }
 625
 626         ram_table->iir_curve[0] = 0x65;
 627         ram_table->iir_curve[1] = 0x65;
 628         ram_table->iir_curve[2] = 0x65;
 629         ram_table->iir_curve[3] = 0x65;
 630         ram_table->iir_curve[4] = 0x65;
 631
 632         //Gamma 2.2
 633         ram_table->crgb_thresh[0] = bswap16_based_on_endian(big_endian, 0x127c);
 634         ram_table->crgb_thresh[1] = bswap16_based_on_endian(big_endian, 0x151b);
 635         ram_table->crgb_thresh[2] = bswap16_based_on_endian(big_endian, 0x17d5);
 636         ram_table->crgb_thresh[3] = bswap16_based_on_endian(big_endian, 0x1a56);
 637         ram_table->crgb_thresh[4] = bswap16_based_on_endian(big_endian, 0x1c83);
 638         ram_table->crgb_thresh[5] = bswap16_based_on_endian(big_endian, 0x1e72);
 639         ram_table->crgb_thresh[6] = bswap16_based_on_endian(big_endian, 0x20f0);
 640         ram_table->crgb_thresh[7] = bswap16_based_on_endian(big_endian, 0x232b);
 641         ram_table->crgb_offset[0] = bswap16_based_on_endian(big_endian, 0x2999);
 642         ram_table->crgb_offset[1] = bswap16_based_on_endian(big_endian, 0x3999);
 643         ram_table->crgb_offset[2] = bswap16_based_on_endian(big_endian, 0x4666);
 644         ram_table->crgb_offset[3] = bswap16_based_on_endian(big_endian, 0x5999);
 645         ram_table->crgb_offset[4] = bswap16_based_on_endian(big_endian, 0x6333);
 646         ram_table->crgb_offset[5] = bswap16_based_on_endian(big_endian, 0x7800);
 647         ram_table->crgb_offset[6] = bswap16_based_on_endian(big_endian, 0x8c00);
 648         ram_table->crgb_offset[7] = bswap16_based_on_endian(big_endian, 0xa000);
 649         ram_table->crgb_slope[0]  = bswap16_based_on_endian(big_endian, 0x3609);
 650         ram_table->crgb_slope[1]  = bswap16_based_on_endian(big_endian, 0x2dfa);
 651         ram_table->crgb_slope[2]  = bswap16_based_on_endian(big_endian, 0x27ea);
 652         ram_table->crgb_slope[3]  = bswap16_based_on_endian(big_endian, 0x235d);
 653         ram_table->crgb_slope[4]  = bswap16_based_on_endian(big_endian, 0x2042);
 654         ram_table->crgb_slope[5]  = bswap16_based_on_endian(big_endian, 0x1dc3);
 655         ram_table->crgb_slope[6]  = bswap16_based_on_endian(big_endian, 0x1b1a);
 656         ram_table->crgb_slope[7]  = bswap16_based_on_endian(big_endian, 0x1910);
 657
 658         fill_backlight_transform_table_v_2_2(
 659                         params, ram_table, big_endian);
 660 }
 661
 662 bool dmub_init_abm_config(struct resource_pool *res_pool,
 663         struct dmcu_iram_parameters params)
 664 {
 665         struct iram_table_v_2_2 ram_table;
 666         struct abm_config_table config;
 667         unsigned int set = params.set;
 668         bool result = false;
 669         uint32_t i, j = 0;
 670
 671 #if defined(CONFIG_DRM_AMD_DC_DCN)
 672         if (res_pool->abm == NULL && res_pool->multiple_abms[0] == NULL)
 673                 return false;
 674 #else
 675         if (res_pool->abm == NULL)
 676                 return false;
 677 #endif
 678
 679         memset(&ram_table, 0, sizeof(ram_table));
 680         memset(&config, 0, sizeof(config));
 681
 682         fill_iram_v_2_3(&ram_table, params, false);
 683
 684         // We must copy to structure that is aligned to 32-bit
 685         for (i = 0; i < NUM_POWER_FN_SEGS; i++) {
 686                 config.crgb_thresh[i] = ram_table.crgb_thresh[i];
 687                 config.crgb_offset[i] = ram_table.crgb_offset[i];
 688                 config.crgb_slope[i] = ram_table.crgb_slope[i];
 689         }
 690
 691         for (i = 0; i < NUM_BL_CURVE_SEGS; i++) {
 692                 config.backlight_thresholds[i] = ram_table.backlight_thresholds[i];
 693                 config.backlight_offsets[i] = ram_table.backlight_offsets[i];
 694         }
 695
 696         for (i = 0; i < NUM_AMBI_LEVEL; i++)
 697                 config.iir_curve[i] = ram_table.iir_curve[i];
 698
 699         for (i = 0; i < NUM_AMBI_LEVEL; i++) {
 700                 for (j = 0; j < NUM_AGGR_LEVEL; j++) {
 701                         config.min_reduction[i][j] = ram_table.min_reduction[i][j];
 702                         config.max_reduction[i][j] = ram_table.max_reduction[i][j];
 703                         config.bright_pos_gain[i][j] = ram_table.bright_pos_gain[i][j];
 704                         config.dark_pos_gain[i][j] = ram_table.dark_pos_gain[i][j];
 705                 }
 706         }
 707
 708         for (i = 0; i < NUM_AGGR_LEVEL; i++) {
 709                 config.hybrid_factor[i] = ram_table.hybrid_factor[i];
 710                 config.contrast_factor[i] = ram_table.contrast_factor[i];
 711                 config.deviation_gain[i] = ram_table.deviation_gain[i];
 712                 config.min_knee[i] = ram_table.min_knee[i];
 713                 config.max_knee[i] = ram_table.max_knee[i];
 714         }
 715
 716         if (params.backlight_ramping_override) {
 717                 for (i = 0; i < NUM_AGGR_LEVEL; i++) {
 718                         config.blRampReduction[i] = params.backlight_ramping_reduction;
 719                         config.blRampStart[i] = params.backlight_ramping_start;
 720                         }
 721                 } else {
 722                         for (i = 0; i < NUM_AGGR_LEVEL; i++) {
 723                                 config.blRampReduction[i] = abm_settings[set][i].blRampReduction;
 724                                 config.blRampStart[i] = abm_settings[set][i].blRampStart;
 725                                 }
 726                         }
 727
 728         config.min_abm_backlight = ram_table.min_abm_backlight;
 729
 730 #if defined(CONFIG_DRM_AMD_DC_DCN)
 731         if (res_pool->multiple_abms[0])
 732                 result = res_pool->multiple_abms[0]->funcs->init_abm_config(
 733                         res_pool->multiple_abms[0], (char *)(&config), sizeof(struct abm_config_table));
 734         else
 735 #endif
 736                 result = res_pool->abm->funcs->init_abm_config(
 737                         res_pool->abm, (char *)(&config), sizeof(struct abm_config_table));
 738
 739         return result;
 740 }
 741
 742 bool dmcu_load_iram(struct dmcu *dmcu,
 743         struct dmcu_iram_parameters params)
 744 {
 745         unsigned char ram_table[IRAM_SIZE];
 746         bool result = false;
 747
 748         if (dmcu == NULL)
 749                 return false;
 750
 751         if (dmcu && !dmcu->funcs->is_dmcu_initialized(dmcu))
 752                 return true;
 753
 754         memset(&ram_table, 0, sizeof(ram_table));
 755
 756         if (dmcu->dmcu_version.abm_version == 0x24) {
 757                 fill_iram_v_2_3((struct iram_table_v_2_2 *)ram_table, params, true);
 758                         result = dmcu->funcs->load_iram(
 759                                         dmcu, 0, (char *)(&ram_table), IRAM_RESERVE_AREA_START_V2_2);
 760         } else if (dmcu->dmcu_version.abm_version == 0x23) {
 761                 fill_iram_v_2_3((struct iram_table_v_2_2 *)ram_table, params, true);
 762
 763                 result = dmcu->funcs->load_iram(
 764                                 dmcu, 0, (char *)(&ram_table), IRAM_RESERVE_AREA_START_V2_2);
 765         } else if (dmcu->dmcu_version.abm_version == 0x22) {
 766                 fill_iram_v_2_2((struct iram_table_v_2_2 *)ram_table, params);
 767
 768                 result = dmcu->funcs->load_iram(
 769                                 dmcu, 0, (char *)(&ram_table), IRAM_RESERVE_AREA_START_V2_2);
 770         } else {
 771                 fill_iram_v_2((struct iram_table_v_2 *)ram_table, params);
 772
 773                 result = dmcu->funcs->load_iram(
 774                                 dmcu, 0, (char *)(&ram_table), IRAM_RESERVE_AREA_START_V2);
 775
 776                 if (result)
 777                         result = dmcu->funcs->load_iram(
 778                                         dmcu, IRAM_RESERVE_AREA_END_V2 + 1,
 779                                         (char *)(&ram_table) + IRAM_RESERVE_AREA_END_V2 + 1,
 780                                         sizeof(ram_table) - IRAM_RESERVE_AREA_END_V2 - 1);
 781         }
 782
 783         return result;
 784 }
 785