drivers/char/pcmcia/synclink_cs.c

   1 /*
   2  * linux/drivers/char/pcmcia/synclink_cs.c
   3  *
   4  * $Id: synclink_cs.c,v 4.34 2005/09/08 13:20:54 paulkf Exp $
   5  *
   6  * Device driver for Microgate SyncLink PC Card
   7  * multiprotocol serial adapter.
   8  *
   9  * written by Paul Fulghum for Microgate Corporation
  10  * paulkf@microgate.com
  11  *
  12  * Microgate and SyncLink are trademarks of Microgate Corporation
  13  *
  14  * This code is released under the GNU General Public License (GPL)
  15  *
  16  * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  17  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  19  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
  20  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  21  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  22  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  24  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  25  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
  26  * OF THE POSSIBILITY OF SUCH DAMAGE.
  27  */
  28
  29 #define VERSION(ver,rel,seq) (((ver)<<16) | ((rel)<<8) | (seq))
  30 #if defined(__i386__)
  31 #  define BREAKPOINT() asm("   int $3");
  32 #else
  33 #  define BREAKPOINT() { }
  34 #endif
  35
  36 #define MAX_DEVICE_COUNT 4
  37
  38 #include <linux/module.h>
  39 #include <linux/errno.h>
  40 #include <linux/signal.h>
  41 #include <linux/sched.h>
  42 #include <linux/timer.h>
  43 #include <linux/time.h>
  44 #include <linux/interrupt.h>
  45 #include <linux/tty.h>
  46 #include <linux/tty_flip.h>
  47 #include <linux/serial.h>
  48 #include <linux/major.h>
  49 #include <linux/string.h>
  50 #include <linux/fcntl.h>
  51 #include <linux/ptrace.h>
  52 #include <linux/ioport.h>
  53 #include <linux/mm.h>
  54 #include <linux/seq_file.h>
  55 #include <linux/slab.h>
  56 #include <linux/netdevice.h>
  57 #include <linux/vmalloc.h>
  58 #include <linux/init.h>
  59 #include <linux/delay.h>
  60 #include <linux/ioctl.h>
  61 #include <linux/synclink.h>
  62
  63 #include <asm/io.h>
  64 #include <asm/irq.h>
  65 #include <asm/dma.h>
  66 #include <linux/bitops.h>
  67 #include <asm/types.h>
  68 #include <linux/termios.h>
  69 #include <linux/workqueue.h>
  70 #include <linux/hdlc.h>
  71
  72 #include <pcmcia/cistpl.h>
  73 #include <pcmcia/cisreg.h>
  74 #include <pcmcia/ds.h>
  75
  76 #if defined(CONFIG_HDLC) || (defined(CONFIG_HDLC_MODULE) && defined(CONFIG_SYNCLINK_CS_MODULE))
  77 #define SYNCLINK_GENERIC_HDLC 1
  78 #else
  79 #define SYNCLINK_GENERIC_HDLC 0
  80 #endif
  81
  82 #define GET_USER(error,value,addr) error = get_user(value,addr)
  83 #define COPY_FROM_USER(error,dest,src,size) error = copy_from_user(dest,src,size) ? -EFAULT : 0
  84 #define PUT_USER(error,value,addr) error = put_user(value,addr)
  85 #define COPY_TO_USER(error,dest,src,size) error = copy_to_user(dest,src,size) ? -EFAULT : 0
  86
  87 #include <linux/uaccess.h>
  88
  89 static MGSL_PARAMS default_params = {
  90         MGSL_MODE_HDLC,                 /* unsigned long mode */
  91         0,                              /* unsigned char loopback; */
  92         HDLC_FLAG_UNDERRUN_ABORT15,     /* unsigned short flags; */
  93         HDLC_ENCODING_NRZI_SPACE,       /* unsigned char encoding; */
  94         0,                              /* unsigned long clock_speed; */
  95         0xff,                           /* unsigned char addr_filter; */
  96         HDLC_CRC_16_CCITT,              /* unsigned short crc_type; */
  97         HDLC_PREAMBLE_LENGTH_8BITS,     /* unsigned char preamble_length; */
  98         HDLC_PREAMBLE_PATTERN_NONE,     /* unsigned char preamble; */
  99         9600,                           /* unsigned long data_rate; */
 100         8,                              /* unsigned char data_bits; */
 101         1,                              /* unsigned char stop_bits; */
 102         ASYNC_PARITY_NONE               /* unsigned char parity; */
 103 };
 104
 105 typedef struct {
 106         int count;
 107         unsigned char status;
 108         char data[1];
 109 } RXBUF;
 110
 111 /* The queue of BH actions to be performed */
 112
 113 #define BH_RECEIVE  1
 114 #define BH_TRANSMIT 2
 115 #define BH_STATUS   4
 116
 117 #define IO_PIN_SHUTDOWN_LIMIT 100
 118
 119 #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
 120
 121 struct _input_signal_events {
 122         int     ri_up;
 123         int     ri_down;
 124         int     dsr_up;
 125         int     dsr_down;
 126         int     dcd_up;
 127         int     dcd_down;
 128         int     cts_up;
 129         int     cts_down;
 130 };
 131
 132
 133 /*
 134  * Device instance data structure
 135  */
 136
 137 typedef struct _mgslpc_info {
 138         struct tty_port         port;
 139         void *if_ptr;   /* General purpose pointer (used by SPPP) */
 140         int                     magic;
 141         int                     line;
 142
 143         struct mgsl_icount      icount;
 144
 145         int                     timeout;
 146         int                     x_char;         /* xon/xoff character */
 147         unsigned char           read_status_mask;
 148         unsigned char           ignore_status_mask;
 149
 150         unsigned char *tx_buf;
 151         int            tx_put;
 152         int            tx_get;
 153         int            tx_count;
 154
 155         /* circular list of fixed length rx buffers */
 156
 157         unsigned char  *rx_buf;        /* memory allocated for all rx buffers */
 158         int            rx_buf_total_size; /* size of memory allocated for rx buffers */
 159         int            rx_put;         /* index of next empty rx buffer */
 160         int            rx_get;         /* index of next full rx buffer */
 161         int            rx_buf_size;    /* size in bytes of single rx buffer */
 162         int            rx_buf_count;   /* total number of rx buffers */
 163         int            rx_frame_count; /* number of full rx buffers */
 164
 165         wait_queue_head_t       status_event_wait_q;
 166         wait_queue_head_t       event_wait_q;
 167         struct timer_list       tx_timer;       /* HDLC transmit timeout timer */
 168         struct _mgslpc_info     *next_device;   /* device list link */
 169
 170         unsigned short imra_value;
 171         unsigned short imrb_value;
 172         unsigned char  pim_value;
 173
 174         spinlock_t lock;
 175         struct work_struct task;                /* task structure for scheduling bh */
 176
 177         u32 max_frame_size;
 178
 179         u32 pending_bh;
 180
 181         bool bh_running;
 182         bool bh_requested;
 183
 184         int dcd_chkcount; /* check counts to prevent */
 185         int cts_chkcount; /* too many IRQs if a signal */
 186         int dsr_chkcount; /* is floating */
 187         int ri_chkcount;
 188
 189         bool rx_enabled;
 190         bool rx_overflow;
 191
 192         bool tx_enabled;
 193         bool tx_active;
 194         bool tx_aborting;
 195         u32 idle_mode;
 196
 197         int if_mode; /* serial interface selection (RS-232, v.35 etc) */
 198
 199         char device_name[25];           /* device instance name */
 200
 201         unsigned int io_base;   /* base I/O address of adapter */
 202         unsigned int irq_level;
 203
 204         MGSL_PARAMS params;             /* communications parameters */
 205
 206         unsigned char serial_signals;   /* current serial signal states */
 207
 208         bool irq_occurred;              /* for diagnostics use */
 209         char testing_irq;
 210         unsigned int init_error;        /* startup error (DIAGS)        */
 211
 212         char *flag_buf;
 213         bool drop_rts_on_tx_done;
 214
 215         struct  _input_signal_events    input_signal_events;
 216
 217         /* PCMCIA support */
 218         struct pcmcia_device    *p_dev;
 219         int                   stop;
 220
 221         /* SPPP/Cisco HDLC device parts */
 222         int netcount;
 223         spinlock_t netlock;
 224
 225 #if SYNCLINK_GENERIC_HDLC
 226         struct net_device *netdev;
 227 #endif
 228
 229 } MGSLPC_INFO;
 230
 231 #define MGSLPC_MAGIC 0x5402
 232
 233 /*
 234  * The size of the serial xmit buffer is 1 page, or 4096 bytes
 235  */
 236 #define TXBUFSIZE 4096
 237
 238
 239 #define CHA     0x00   /* channel A offset */
 240 #define CHB     0x40   /* channel B offset */
 241
 242 /*
 243  *  FIXME: PPC has PVR defined in asm/reg.h.  For now we just undef it.
 244  */
 245 #undef PVR
 246
 247 #define RXFIFO  0
 248 #define TXFIFO  0
 249 #define STAR    0x20
 250 #define CMDR    0x20
 251 #define RSTA    0x21
 252 #define PRE     0x21
 253 #define MODE    0x22
 254 #define TIMR    0x23
 255 #define XAD1    0x24
 256 #define XAD2    0x25
 257 #define RAH1    0x26
 258 #define RAH2    0x27
 259 #define DAFO    0x27
 260 #define RAL1    0x28
 261 #define RFC     0x28
 262 #define RHCR    0x29
 263 #define RAL2    0x29
 264 #define RBCL    0x2a
 265 #define XBCL    0x2a
 266 #define RBCH    0x2b
 267 #define XBCH    0x2b
 268 #define CCR0    0x2c
 269 #define CCR1    0x2d
 270 #define CCR2    0x2e
 271 #define CCR3    0x2f
 272 #define VSTR    0x34
 273 #define BGR     0x34
 274 #define RLCR    0x35
 275 #define AML     0x36
 276 #define AMH     0x37
 277 #define GIS     0x38
 278 #define IVA     0x38
 279 #define IPC     0x39
 280 #define ISR     0x3a
 281 #define IMR     0x3a
 282 #define PVR     0x3c
 283 #define PIS     0x3d
 284 #define PIM     0x3d
 285 #define PCR     0x3e
 286 #define CCR4    0x3f
 287
 288 // IMR/ISR
 289
 290 #define IRQ_BREAK_ON    BIT15   // rx break detected
 291 #define IRQ_DATAOVERRUN BIT14   // receive data overflow
 292 #define IRQ_ALLSENT     BIT13   // all sent
 293 #define IRQ_UNDERRUN    BIT12   // transmit data underrun
 294 #define IRQ_TIMER       BIT11   // timer interrupt
 295 #define IRQ_CTS         BIT10   // CTS status change
 296 #define IRQ_TXREPEAT    BIT9    // tx message repeat
 297 #define IRQ_TXFIFO      BIT8    // transmit pool ready
 298 #define IRQ_RXEOM       BIT7    // receive message end
 299 #define IRQ_EXITHUNT    BIT6    // receive frame start
 300 #define IRQ_RXTIME      BIT6    // rx char timeout
 301 #define IRQ_DCD         BIT2    // carrier detect status change
 302 #define IRQ_OVERRUN     BIT1    // receive frame overflow
 303 #define IRQ_RXFIFO      BIT0    // receive pool full
 304
 305 // STAR
 306
 307 #define XFW   BIT6              // transmit FIFO write enable
 308 #define CEC   BIT2              // command executing
 309 #define CTS   BIT1              // CTS state
 310
 311 #define PVR_DTR      BIT0
 312 #define PVR_DSR      BIT1
 313 #define PVR_RI       BIT2
 314 #define PVR_AUTOCTS  BIT3
 315 #define PVR_RS232    0x20   /* 0010b */
 316 #define PVR_V35      0xe0   /* 1110b */
 317 #define PVR_RS422    0x40   /* 0100b */
 318
 319 /* Register access functions */
 320
 321 #define write_reg(info, reg, val) outb((val),(info)->io_base + (reg))
 322 #define read_reg(info, reg) inb((info)->io_base + (reg))
 323
 324 #define read_reg16(info, reg) inw((info)->io_base + (reg))
 325 #define write_reg16(info, reg, val) outw((val), (info)->io_base + (reg))
 326
 327 #define set_reg_bits(info, reg, mask) \
 328         write_reg(info, (reg), \
 329                  (unsigned char) (read_reg(info, (reg)) | (mask)))
 330 #define clear_reg_bits(info, reg, mask) \
 331         write_reg(info, (reg), \
 332                  (unsigned char) (read_reg(info, (reg)) & ~(mask)))
 333 /*
 334  * interrupt enable/disable routines
 335  */
 336 static void irq_disable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
 337 {
 338         if (channel == CHA) {
 339                 info->imra_value |= mask;
 340                 write_reg16(info, CHA + IMR, info->imra_value);
 341         } else {
 342                 info->imrb_value |= mask;
 343                 write_reg16(info, CHB + IMR, info->imrb_value);
 344         }
 345 }
 346 static void irq_enable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
 347 {
 348         if (channel == CHA) {
 349                 info->imra_value &= ~mask;
 350                 write_reg16(info, CHA + IMR, info->imra_value);
 351         } else {
 352                 info->imrb_value &= ~mask;
 353                 write_reg16(info, CHB + IMR, info->imrb_value);
 354         }
 355 }
 356
 357 #define port_irq_disable(info, mask) \
 358         { info->pim_value |= (mask); write_reg(info, PIM, info->pim_value); }
 359
 360 #define port_irq_enable(info, mask) \
 361         { info->pim_value &= ~(mask); write_reg(info, PIM, info->pim_value); }
 362
 363 static void rx_start(MGSLPC_INFO *info);
 364 static void rx_stop(MGSLPC_INFO *info);
 365
 366 static void tx_start(MGSLPC_INFO *info, struct tty_struct *tty);
 367 static void tx_stop(MGSLPC_INFO *info);
 368 static void tx_set_idle(MGSLPC_INFO *info);
 369
 370 static void get_signals(MGSLPC_INFO *info);
 371 static void set_signals(MGSLPC_INFO *info);
 372
 373 static void reset_device(MGSLPC_INFO *info);
 374
 375 static void hdlc_mode(MGSLPC_INFO *info);
 376 static void async_mode(MGSLPC_INFO *info);
 377
 378 static void tx_timeout(struct timer_list *t);
 379
 380 static int carrier_raised(struct tty_port *port);
 381 static void dtr_rts(struct tty_port *port, int onoff);
 382
 383 #if SYNCLINK_GENERIC_HDLC
 384 #define dev_to_port(D) (dev_to_hdlc(D)->priv)
 385 static void hdlcdev_tx_done(MGSLPC_INFO *info);
 386 static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size);
 387 static int  hdlcdev_init(MGSLPC_INFO *info);
 388 static void hdlcdev_exit(MGSLPC_INFO *info);
 389 #endif
 390
 391 static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit);
 392
 393 static bool register_test(MGSLPC_INFO *info);
 394 static bool irq_test(MGSLPC_INFO *info);
 395 static int adapter_test(MGSLPC_INFO *info);
 396
 397 static int claim_resources(MGSLPC_INFO *info);
 398 static void release_resources(MGSLPC_INFO *info);
 399 static int mgslpc_add_device(MGSLPC_INFO *info);
 400 static void mgslpc_remove_device(MGSLPC_INFO *info);
 401
 402 static bool rx_get_frame(MGSLPC_INFO *info, struct tty_struct *tty);
 403 static void rx_reset_buffers(MGSLPC_INFO *info);
 404 static int  rx_alloc_buffers(MGSLPC_INFO *info);
 405 static void rx_free_buffers(MGSLPC_INFO *info);
 406
 407 static irqreturn_t mgslpc_isr(int irq, void *dev_id);
 408
 409 /*
 410  * Bottom half interrupt handlers
 411  */
 412 static void bh_handler(struct work_struct *work);
 413 static void bh_transmit(MGSLPC_INFO *info, struct tty_struct *tty);
 414 static void bh_status(MGSLPC_INFO *info);
 415
 416 /*
 417  * ioctl handlers
 418  */
 419 static int tiocmget(struct tty_struct *tty);
 420 static int tiocmset(struct tty_struct *tty,
 421                                         unsigned int set, unsigned int clear);
 422 static int get_stats(MGSLPC_INFO *info, struct mgsl_icount __user *user_icount);
 423 static int get_params(MGSLPC_INFO *info, MGSL_PARAMS __user *user_params);
 424 static int set_params(MGSLPC_INFO *info, MGSL_PARAMS __user *new_params, struct tty_struct *tty);
 425 static int get_txidle(MGSLPC_INFO *info, int __user *idle_mode);
 426 static int set_txidle(MGSLPC_INFO *info, int idle_mode);
 427 static int set_txenable(MGSLPC_INFO *info, int enable, struct tty_struct *tty);
 428 static int tx_abort(MGSLPC_INFO *info);
 429 static int set_rxenable(MGSLPC_INFO *info, int enable);
 430 static int wait_events(MGSLPC_INFO *info, int __user *mask);
 431
 432 static MGSLPC_INFO *mgslpc_device_list = NULL;
 433 static int mgslpc_device_count = 0;
 434
 435 /*
 436  * Set this param to non-zero to load eax with the
 437  * .text section address and breakpoint on module load.
 438  * This is useful for use with gdb and add-symbol-file command.
 439  */
 440 static bool break_on_load;
 441
 442 /*
 443  * Driver major number, defaults to zero to get auto
 444  * assigned major number. May be forced as module parameter.
 445  */
 446 static int ttymajor=0;
 447
 448 static int debug_level = 0;
 449 static int maxframe[MAX_DEVICE_COUNT] = {0,};
 450
 451 module_param(break_on_load, bool, 0);
 452 module_param(ttymajor, int, 0);
 453 module_param(debug_level, int, 0);
 454 module_param_array(maxframe, int, NULL, 0);
 455
 456 MODULE_LICENSE("GPL");
 457
 458 static char *driver_name = "SyncLink PC Card driver";
 459 static char *driver_version = "$Revision: 4.34 $";
 460
 461 static struct tty_driver *serial_driver;
 462
 463 /* number of characters left in xmit buffer before we ask for more */
 464 #define WAKEUP_CHARS 256
 465
 466 static void mgslpc_change_params(MGSLPC_INFO *info, struct tty_struct *tty);
 467 static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout);
 468
 469 /* PCMCIA prototypes */
 470
 471 static int mgslpc_config(struct pcmcia_device *link);
 472 static void mgslpc_release(u_long arg);
 473 static void mgslpc_detach(struct pcmcia_device *p_dev);
 474
 475 /*
 476  * 1st function defined in .text section. Calling this function in
 477  * init_module() followed by a breakpoint allows a remote debugger
 478  * (gdb) to get the .text address for the add-symbol-file command.
 479  * This allows remote debugging of dynamically loadable modules.
 480  */
 481 static void* mgslpc_get_text_ptr(void)
 482 {
 483         return mgslpc_get_text_ptr;
 484 }
 485
 486 /**
 487  * line discipline callback wrappers
 488  *
 489  * The wrappers maintain line discipline references
 490  * while calling into the line discipline.
 491  *
 492  * ldisc_receive_buf  - pass receive data to line discipline
 493  */
 494
 495 static void ldisc_receive_buf(struct tty_struct *tty,
 496                               const __u8 *data, char *flags, int count)
 497 {
 498         struct tty_ldisc *ld;
 499         if (!tty)
 500                 return;
 501         ld = tty_ldisc_ref(tty);
 502         if (ld) {
 503                 if (ld->ops->receive_buf)
 504                         ld->ops->receive_buf(tty, data, flags, count);
 505                 tty_ldisc_deref(ld);
 506         }
 507 }
 508
 509 static const struct tty_port_operations mgslpc_port_ops = {
 510         .carrier_raised = carrier_raised,
 511         .dtr_rts = dtr_rts
 512 };
 513
 514 static int mgslpc_probe(struct pcmcia_device *link)
 515 {
 516         MGSLPC_INFO *info;
 517         int ret;
 518
 519         if (debug_level >= DEBUG_LEVEL_INFO)
 520                 printk("mgslpc_attach\n");
 521
 522         info = kzalloc(sizeof(MGSLPC_INFO), GFP_KERNEL);
 523         if (!info) {
 524                 printk("Error can't allocate device instance data\n");
 525                 return -ENOMEM;
 526         }
 527
 528         info->magic = MGSLPC_MAGIC;
 529         tty_port_init(&info->port);
 530         info->port.ops = &mgslpc_port_ops;
 531         INIT_WORK(&info->task, bh_handler);
 532         info->max_frame_size = 4096;
 533         init_waitqueue_head(&info->status_event_wait_q);
 534         init_waitqueue_head(&info->event_wait_q);
 535         spin_lock_init(&info->lock);
 536         spin_lock_init(&info->netlock);
 537         memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS));
 538         info->idle_mode = HDLC_TXIDLE_FLAGS;
 539         info->imra_value = 0xffff;
 540         info->imrb_value = 0xffff;
 541         info->pim_value = 0xff;
 542
 543         info->p_dev = link;
 544         link->priv = info;
 545
 546         /* Initialize the struct pcmcia_device structure */
 547
 548         ret = mgslpc_config(link);
 549         if (ret != 0)
 550                 goto failed;
 551
 552         ret = mgslpc_add_device(info);
 553         if (ret != 0)
 554                 goto failed_release;
 555
 556         return 0;
 557
 558 failed_release:
 559         mgslpc_release((u_long)link);
 560 failed:
 561         tty_port_destroy(&info->port);
 562         kfree(info);
 563         return ret;
 564 }
 565
 566 /* Card has been inserted.
 567  */
 568
 569 static int mgslpc_ioprobe(struct pcmcia_device *p_dev, void *priv_data)
 570 {
 571         return pcmcia_request_io(p_dev);
 572 }
 573
 574 static int mgslpc_config(struct pcmcia_device *link)
 575 {
 576         MGSLPC_INFO *info = link->priv;
 577         int ret;
 578
 579         if (debug_level >= DEBUG_LEVEL_INFO)
 580                 printk("mgslpc_config(0x%p)\n", link);
 581
 582         link->config_flags |= CONF_ENABLE_IRQ | CONF_AUTO_SET_IO;
 583
 584         ret = pcmcia_loop_config(link, mgslpc_ioprobe, NULL);
 585         if (ret != 0)
 586                 goto failed;
 587
 588         link->config_index = 8;
 589         link->config_regs = PRESENT_OPTION;
 590
 591         ret = pcmcia_request_irq(link, mgslpc_isr);
 592         if (ret)
 593                 goto failed;
 594         ret = pcmcia_enable_device(link);
 595         if (ret)
 596                 goto failed;
 597
 598         info->io_base = link->resource[0]->start;
 599         info->irq_level = link->irq;
 600         return 0;
 601
 602 failed:
 603         mgslpc_release((u_long)link);
 604         return -ENODEV;
 605 }
 606
 607 /* Card has been removed.
 608  * Unregister device and release PCMCIA configuration.
 609  * If device is open, postpone until it is closed.
 610  */
 611 static void mgslpc_release(u_long arg)
 612 {
 613         struct pcmcia_device *link = (struct pcmcia_device *)arg;
 614
 615         if (debug_level >= DEBUG_LEVEL_INFO)
 616                 printk("mgslpc_release(0x%p)\n", link);
 617
 618         pcmcia_disable_device(link);
 619 }
 620
 621 static void mgslpc_detach(struct pcmcia_device *link)
 622 {
 623         if (debug_level >= DEBUG_LEVEL_INFO)
 624                 printk("mgslpc_detach(0x%p)\n", link);
 625
 626         ((MGSLPC_INFO *)link->priv)->stop = 1;
 627         mgslpc_release((u_long)link);
 628
 629         mgslpc_remove_device((MGSLPC_INFO *)link->priv);
 630 }
 631
 632 static int mgslpc_suspend(struct pcmcia_device *link)
 633 {
 634         MGSLPC_INFO *info = link->priv;
 635
 636         info->stop = 1;
 637
 638         return 0;
 639 }
 640
 641 static int mgslpc_resume(struct pcmcia_device *link)
 642 {
 643         MGSLPC_INFO *info = link->priv;
 644
 645         info->stop = 0;
 646
 647         return 0;
 648 }
 649
 650
 651 static inline bool mgslpc_paranoia_check(MGSLPC_INFO *info,
 652                                         char *name, const char *routine)
 653 {
 654 #ifdef MGSLPC_PARANOIA_CHECK
 655         static const char *badmagic =
 656                 "Warning: bad magic number for mgsl struct (%s) in %s\n";
 657         static const char *badinfo =
 658                 "Warning: null mgslpc_info for (%s) in %s\n";
 659
 660         if (!info) {
 661                 printk(badinfo, name, routine);
 662                 return true;
 663         }
 664         if (info->magic != MGSLPC_MAGIC) {
 665                 printk(badmagic, name, routine);
 666                 return true;
 667         }
 668 #else
 669         if (!info)
 670                 return true;
 671 #endif
 672         return false;
 673 }
 674
 675
 676 #define CMD_RXFIFO      BIT7    // release current rx FIFO
 677 #define CMD_RXRESET     BIT6    // receiver reset
 678 #define CMD_RXFIFO_READ BIT5
 679 #define CMD_START_TIMER BIT4
 680 #define CMD_TXFIFO      BIT3    // release current tx FIFO
 681 #define CMD_TXEOM       BIT1    // transmit end message
 682 #define CMD_TXRESET     BIT0    // transmit reset
 683
 684 static bool wait_command_complete(MGSLPC_INFO *info, unsigned char channel)
 685 {
 686         int i = 0;
 687         /* wait for command completion */
 688         while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) {
 689                 udelay(1);
 690                 if (i++ == 1000)
 691                         return false;
 692         }
 693         return true;
 694 }
 695
 696 static void issue_command(MGSLPC_INFO *info, unsigned char channel, unsigned char cmd)
 697 {
 698         wait_command_complete(info, channel);
 699         write_reg(info, (unsigned char) (channel + CMDR), cmd);
 700 }
 701
 702 static void tx_pause(struct tty_struct *tty)
 703 {
 704         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
 705         unsigned long flags;
 706
 707         if (mgslpc_paranoia_check(info, tty->name, "tx_pause"))
 708                 return;
 709         if (debug_level >= DEBUG_LEVEL_INFO)
 710                 printk("tx_pause(%s)\n", info->device_name);
 711
 712         spin_lock_irqsave(&info->lock, flags);
 713         if (info->tx_enabled)
 714                 tx_stop(info);
 715         spin_unlock_irqrestore(&info->lock, flags);
 716 }
 717
 718 static void tx_release(struct tty_struct *tty)
 719 {
 720         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
 721         unsigned long flags;
 722
 723         if (mgslpc_paranoia_check(info, tty->name, "tx_release"))
 724                 return;
 725         if (debug_level >= DEBUG_LEVEL_INFO)
 726                 printk("tx_release(%s)\n", info->device_name);
 727
 728         spin_lock_irqsave(&info->lock, flags);
 729         if (!info->tx_enabled)
 730                 tx_start(info, tty);
 731         spin_unlock_irqrestore(&info->lock, flags);
 732 }
 733
 734 /* Return next bottom half action to perform.
 735  * or 0 if nothing to do.
 736  */
 737 static int bh_action(MGSLPC_INFO *info)
 738 {
 739         unsigned long flags;
 740         int rc = 0;
 741
 742         spin_lock_irqsave(&info->lock, flags);
 743
 744         if (info->pending_bh & BH_RECEIVE) {
 745                 info->pending_bh &= ~BH_RECEIVE;
 746                 rc = BH_RECEIVE;
 747         } else if (info->pending_bh & BH_TRANSMIT) {
 748                 info->pending_bh &= ~BH_TRANSMIT;
 749                 rc = BH_TRANSMIT;
 750         } else if (info->pending_bh & BH_STATUS) {
 751                 info->pending_bh &= ~BH_STATUS;
 752                 rc = BH_STATUS;
 753         }
 754
 755         if (!rc) {
 756                 /* Mark BH routine as complete */
 757                 info->bh_running = false;
 758                 info->bh_requested = false;
 759         }
 760
 761         spin_unlock_irqrestore(&info->lock, flags);
 762
 763         return rc;
 764 }
 765
 766 static void bh_handler(struct work_struct *work)
 767 {
 768         MGSLPC_INFO *info = container_of(work, MGSLPC_INFO, task);
 769         struct tty_struct *tty;
 770         int action;
 771
 772         if (debug_level >= DEBUG_LEVEL_BH)
 773                 printk("%s(%d):bh_handler(%s) entry\n",
 774                         __FILE__,__LINE__,info->device_name);
 775
 776         info->bh_running = true;
 777         tty = tty_port_tty_get(&info->port);
 778
 779         while((action = bh_action(info)) != 0) {
 780
 781                 /* Process work item */
 782                 if (debug_level >= DEBUG_LEVEL_BH)
 783                         printk("%s(%d):bh_handler() work item action=%d\n",
 784                                 __FILE__,__LINE__,action);
 785
 786                 switch (action) {
 787
 788                 case BH_RECEIVE:
 789                         while(rx_get_frame(info, tty));
 790                         break;
 791                 case BH_TRANSMIT:
 792                         bh_transmit(info, tty);
 793                         break;
 794                 case BH_STATUS:
 795                         bh_status(info);
 796                         break;
 797                 default:
 798                         /* unknown work item ID */
 799                         printk("Unknown work item ID=%08X!\n", action);
 800                         break;
 801                 }
 802         }
 803
 804         tty_kref_put(tty);
 805         if (debug_level >= DEBUG_LEVEL_BH)
 806                 printk("%s(%d):bh_handler(%s) exit\n",
 807                         __FILE__,__LINE__,info->device_name);
 808 }
 809
 810 static void bh_transmit(MGSLPC_INFO *info, struct tty_struct *tty)
 811 {
 812         if (debug_level >= DEBUG_LEVEL_BH)
 813                 printk("bh_transmit() entry on %s\n", info->device_name);
 814
 815         if (tty)
 816                 tty_wakeup(tty);
 817 }
 818
 819 static void bh_status(MGSLPC_INFO *info)
 820 {
 821         info->ri_chkcount = 0;
 822         info->dsr_chkcount = 0;
 823         info->dcd_chkcount = 0;
 824         info->cts_chkcount = 0;
 825 }
 826
 827 /* eom: non-zero = end of frame */
 828 static void rx_ready_hdlc(MGSLPC_INFO *info, int eom)
 829 {
 830         unsigned char data[2];
 831         unsigned char fifo_count, read_count, i;
 832         RXBUF *buf = (RXBUF*)(info->rx_buf + (info->rx_put * info->rx_buf_size));
 833
 834         if (debug_level >= DEBUG_LEVEL_ISR)
 835                 printk("%s(%d):rx_ready_hdlc(eom=%d)\n", __FILE__, __LINE__, eom);
 836
 837         if (!info->rx_enabled)
 838                 return;
 839
 840         if (info->rx_frame_count >= info->rx_buf_count) {
 841                 /* no more free buffers */
 842                 issue_command(info, CHA, CMD_RXRESET);
 843                 info->pending_bh |= BH_RECEIVE;
 844                 info->rx_overflow = true;
 845                 info->icount.buf_overrun++;
 846                 return;
 847         }
 848
 849         if (eom) {
 850                 /* end of frame, get FIFO count from RBCL register */
 851                 fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
 852                 if (fifo_count == 0)
 853                         fifo_count = 32;
 854         } else
 855                 fifo_count = 32;
 856
 857         do {
 858                 if (fifo_count == 1) {
 859                         read_count = 1;
 860                         data[0] = read_reg(info, CHA + RXFIFO);
 861                 } else {
 862                         read_count = 2;
 863                         *((unsigned short *) data) = read_reg16(info, CHA + RXFIFO);
 864                 }
 865                 fifo_count -= read_count;
 866                 if (!fifo_count && eom)
 867                         buf->status = data[--read_count];
 868
 869                 for (i = 0; i < read_count; i++) {
 870                         if (buf->count >= info->max_frame_size) {
 871                                 /* frame too large, reset receiver and reset current buffer */
 872                                 issue_command(info, CHA, CMD_RXRESET);
 873                                 buf->count = 0;
 874                                 return;
 875                         }
 876                         *(buf->data + buf->count) = data[i];
 877                         buf->count++;
 878                 }
 879         } while (fifo_count);
 880
 881         if (eom) {
 882                 info->pending_bh |= BH_RECEIVE;
 883                 info->rx_frame_count++;
 884                 info->rx_put++;
 885                 if (info->rx_put >= info->rx_buf_count)
 886                         info->rx_put = 0;
 887         }
 888         issue_command(info, CHA, CMD_RXFIFO);
 889 }
 890
 891 static void rx_ready_async(MGSLPC_INFO *info, int tcd)
 892 {
 893         struct tty_port *port = &info->port;
 894         unsigned char data, status, flag;
 895         int fifo_count;
 896         int work = 0;
 897         struct mgsl_icount *icount = &info->icount;
 898
 899         if (tcd) {
 900                 /* early termination, get FIFO count from RBCL register */
 901                 fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
 902
 903                 /* Zero fifo count could mean 0 or 32 bytes available.
 904                  * If BIT5 of STAR is set then at least 1 byte is available.
 905                  */
 906                 if (!fifo_count && (read_reg(info,CHA+STAR) & BIT5))
 907                         fifo_count = 32;
 908         } else
 909                 fifo_count = 32;
 910
 911         tty_buffer_request_room(port, fifo_count);
 912         /* Flush received async data to receive data buffer. */
 913         while (fifo_count) {
 914                 data   = read_reg(info, CHA + RXFIFO);
 915                 status = read_reg(info, CHA + RXFIFO);
 916                 fifo_count -= 2;
 917
 918                 icount->rx++;
 919                 flag = TTY_NORMAL;
 920
 921                 // if no frameing/crc error then save data
 922                 // BIT7:parity error
 923                 // BIT6:framing error
 924
 925                 if (status & (BIT7 + BIT6)) {
 926                         if (status & BIT7)
 927                                 icount->parity++;
 928                         else
 929                                 icount->frame++;
 930
 931                         /* discard char if tty control flags say so */
 932                         if (status & info->ignore_status_mask)
 933                                 continue;
 934
 935                         status &= info->read_status_mask;
 936
 937                         if (status & BIT7)
 938                                 flag = TTY_PARITY;
 939                         else if (status & BIT6)
 940                                 flag = TTY_FRAME;
 941                 }
 942                 work += tty_insert_flip_char(port, data, flag);
 943         }
 944         issue_command(info, CHA, CMD_RXFIFO);
 945
 946         if (debug_level >= DEBUG_LEVEL_ISR) {
 947                 printk("%s(%d):rx_ready_async",
 948                         __FILE__,__LINE__);
 949                 printk("%s(%d):rx=%d brk=%d parity=%d frame=%d overrun=%d\n",
 950                         __FILE__,__LINE__,icount->rx,icount->brk,
 951                         icount->parity,icount->frame,icount->overrun);
 952         }
 953
 954         if (work)
 955                 tty_flip_buffer_push(port);
 956 }
 957
 958
 959 static void tx_done(MGSLPC_INFO *info, struct tty_struct *tty)
 960 {
 961         if (!info->tx_active)
 962                 return;
 963
 964         info->tx_active = false;
 965         info->tx_aborting = false;
 966
 967         if (info->params.mode == MGSL_MODE_ASYNC)
 968                 return;
 969
 970         info->tx_count = info->tx_put = info->tx_get = 0;
 971         del_timer(&info->tx_timer);
 972
 973         if (info->drop_rts_on_tx_done) {
 974                 get_signals(info);
 975                 if (info->serial_signals & SerialSignal_RTS) {
 976                         info->serial_signals &= ~SerialSignal_RTS;
 977                         set_signals(info);
 978                 }
 979                 info->drop_rts_on_tx_done = false;
 980         }
 981
 982 #if SYNCLINK_GENERIC_HDLC
 983         if (info->netcount)
 984                 hdlcdev_tx_done(info);
 985         else
 986 #endif
 987         {
 988                 if (tty && (tty->flow.stopped || tty->hw_stopped)) {
 989                         tx_stop(info);
 990                         return;
 991                 }
 992                 info->pending_bh |= BH_TRANSMIT;
 993         }
 994 }
 995
 996 static void tx_ready(MGSLPC_INFO *info, struct tty_struct *tty)
 997 {
 998         unsigned char fifo_count = 32;
 999         int c;
1000
1001         if (debug_level >= DEBUG_LEVEL_ISR)
1002                 printk("%s(%d):tx_ready(%s)\n", __FILE__, __LINE__, info->device_name);
1003
1004         if (info->params.mode == MGSL_MODE_HDLC) {
1005                 if (!info->tx_active)
1006                         return;
1007         } else {
1008                 if (tty && (tty->flow.stopped || tty->hw_stopped)) {
1009                         tx_stop(info);
1010                         return;
1011                 }
1012                 if (!info->tx_count)
1013                         info->tx_active = false;
1014         }
1015
1016         if (!info->tx_count)
1017                 return;
1018
1019         while (info->tx_count && fifo_count) {
1020                 c = min(2, min_t(int, fifo_count, min(info->tx_count, TXBUFSIZE - info->tx_get)));
1021
1022                 if (c == 1) {
1023                         write_reg(info, CHA + TXFIFO, *(info->tx_buf + info->tx_get));
1024                 } else {
1025                         write_reg16(info, CHA + TXFIFO,
1026                                           *((unsigned short*)(info->tx_buf + info->tx_get)));
1027                 }
1028                 info->tx_count -= c;
1029                 info->tx_get = (info->tx_get + c) & (TXBUFSIZE - 1);
1030                 fifo_count -= c;
1031         }
1032
1033         if (info->params.mode == MGSL_MODE_ASYNC) {
1034                 if (info->tx_count < WAKEUP_CHARS)
1035                         info->pending_bh |= BH_TRANSMIT;
1036                 issue_command(info, CHA, CMD_TXFIFO);
1037         } else {
1038                 if (info->tx_count)
1039                         issue_command(info, CHA, CMD_TXFIFO);
1040                 else
1041                         issue_command(info, CHA, CMD_TXFIFO + CMD_TXEOM);
1042         }
1043 }
1044
1045 static void cts_change(MGSLPC_INFO *info, struct tty_struct *tty)
1046 {
1047         get_signals(info);
1048         if ((info->cts_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1049                 irq_disable(info, CHB, IRQ_CTS);
1050         info->icount.cts++;
1051         if (info->serial_signals & SerialSignal_CTS)
1052                 info->input_signal_events.cts_up++;
1053         else
1054                 info->input_signal_events.cts_down++;
1055         wake_up_interruptible(&info->status_event_wait_q);
1056         wake_up_interruptible(&info->event_wait_q);
1057
1058         if (tty && tty_port_cts_enabled(&info->port)) {
1059                 if (tty->hw_stopped) {
1060                         if (info->serial_signals & SerialSignal_CTS) {
1061                                 if (debug_level >= DEBUG_LEVEL_ISR)
1062                                         printk("CTS tx start...");
1063                                 tty->hw_stopped = 0;
1064                                 tx_start(info, tty);
1065                                 info->pending_bh |= BH_TRANSMIT;
1066                                 return;
1067                         }
1068                 } else {
1069                         if (!(info->serial_signals & SerialSignal_CTS)) {
1070                                 if (debug_level >= DEBUG_LEVEL_ISR)
1071                                         printk("CTS tx stop...");
1072                                 tty->hw_stopped = 1;
1073                                 tx_stop(info);
1074                         }
1075                 }
1076         }
1077         info->pending_bh |= BH_STATUS;
1078 }
1079
1080 static void dcd_change(MGSLPC_INFO *info, struct tty_struct *tty)
1081 {
1082         get_signals(info);
1083         if ((info->dcd_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1084                 irq_disable(info, CHB, IRQ_DCD);
1085         info->icount.dcd++;
1086         if (info->serial_signals & SerialSignal_DCD) {
1087                 info->input_signal_events.dcd_up++;
1088         }
1089         else
1090                 info->input_signal_events.dcd_down++;
1091 #if SYNCLINK_GENERIC_HDLC
1092         if (info->netcount) {
1093                 if (info->serial_signals & SerialSignal_DCD)
1094                         netif_carrier_on(info->netdev);
1095                 else
1096                         netif_carrier_off(info->netdev);
1097         }
1098 #endif
1099         wake_up_interruptible(&info->status_event_wait_q);
1100         wake_up_interruptible(&info->event_wait_q);
1101
1102         if (tty_port_check_carrier(&info->port)) {
1103                 if (debug_level >= DEBUG_LEVEL_ISR)
1104                         printk("%s CD now %s...", info->device_name,
1105                                (info->serial_signals & SerialSignal_DCD) ? "on" : "off");
1106                 if (info->serial_signals & SerialSignal_DCD)
1107                         wake_up_interruptible(&info->port.open_wait);
1108                 else {
1109                         if (debug_level >= DEBUG_LEVEL_ISR)
1110                                 printk("doing serial hangup...");
1111                         if (tty)
1112                                 tty_hangup(tty);
1113                 }
1114         }
1115         info->pending_bh |= BH_STATUS;
1116 }
1117
1118 static void dsr_change(MGSLPC_INFO *info)
1119 {
1120         get_signals(info);
1121         if ((info->dsr_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1122                 port_irq_disable(info, PVR_DSR);
1123         info->icount.dsr++;
1124         if (info->serial_signals & SerialSignal_DSR)
1125                 info->input_signal_events.dsr_up++;
1126         else
1127                 info->input_signal_events.dsr_down++;
1128         wake_up_interruptible(&info->status_event_wait_q);
1129         wake_up_interruptible(&info->event_wait_q);
1130         info->pending_bh |= BH_STATUS;
1131 }
1132
1133 static void ri_change(MGSLPC_INFO *info)
1134 {
1135         get_signals(info);
1136         if ((info->ri_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1137                 port_irq_disable(info, PVR_RI);
1138         info->icount.rng++;
1139         if (info->serial_signals & SerialSignal_RI)
1140                 info->input_signal_events.ri_up++;
1141         else
1142                 info->input_signal_events.ri_down++;
1143         wake_up_interruptible(&info->status_event_wait_q);
1144         wake_up_interruptible(&info->event_wait_q);
1145         info->pending_bh |= BH_STATUS;
1146 }
1147
1148 /* Interrupt service routine entry point.
1149  *
1150  * Arguments:
1151  *
1152  * irq     interrupt number that caused interrupt
1153  * dev_id  device ID supplied during interrupt registration
1154  */
1155 static irqreturn_t mgslpc_isr(int dummy, void *dev_id)
1156 {
1157         MGSLPC_INFO *info = dev_id;
1158         struct tty_struct *tty;
1159         unsigned short isr;
1160         unsigned char gis, pis;
1161         int count=0;
1162
1163         if (debug_level >= DEBUG_LEVEL_ISR)
1164                 printk("mgslpc_isr(%d) entry.\n", info->irq_level);
1165
1166         if (!(info->p_dev->_locked))
1167                 return IRQ_HANDLED;
1168
1169         tty = tty_port_tty_get(&info->port);
1170
1171         spin_lock(&info->lock);
1172
1173         while ((gis = read_reg(info, CHA + GIS))) {
1174                 if (debug_level >= DEBUG_LEVEL_ISR)
1175                         printk("mgslpc_isr %s gis=%04X\n", info->device_name,gis);
1176
1177                 if ((gis & 0x70) || count > 1000) {
1178                         printk("synclink_cs:hardware failed or ejected\n");
1179                         break;
1180                 }
1181                 count++;
1182
1183                 if (gis & (BIT1 | BIT0)) {
1184                         isr = read_reg16(info, CHB + ISR);
1185                         if (isr & IRQ_DCD)
1186                                 dcd_change(info, tty);
1187                         if (isr & IRQ_CTS)
1188                                 cts_change(info, tty);
1189                 }
1190                 if (gis & (BIT3 | BIT2))
1191                 {
1192                         isr = read_reg16(info, CHA + ISR);
1193                         if (isr & IRQ_TIMER) {
1194                                 info->irq_occurred = true;
1195                                 irq_disable(info, CHA, IRQ_TIMER);
1196                         }
1197
1198                         /* receive IRQs */
1199                         if (isr & IRQ_EXITHUNT) {
1200                                 info->icount.exithunt++;
1201                                 wake_up_interruptible(&info->event_wait_q);
1202                         }
1203                         if (isr & IRQ_BREAK_ON) {
1204                                 info->icount.brk++;
1205                                 if (info->port.flags & ASYNC_SAK)
1206                                         do_SAK(tty);
1207                         }
1208                         if (isr & IRQ_RXTIME) {
1209                                 issue_command(info, CHA, CMD_RXFIFO_READ);
1210                         }
1211                         if (isr & (IRQ_RXEOM | IRQ_RXFIFO)) {
1212                                 if (info->params.mode == MGSL_MODE_HDLC)
1213                                         rx_ready_hdlc(info, isr & IRQ_RXEOM);
1214                                 else
1215                                         rx_ready_async(info, isr & IRQ_RXEOM);
1216                         }
1217
1218                         /* transmit IRQs */
1219                         if (isr & IRQ_UNDERRUN) {
1220                                 if (info->tx_aborting)
1221                                         info->icount.txabort++;
1222                                 else
1223                                         info->icount.txunder++;
1224                                 tx_done(info, tty);
1225                         }
1226                         else if (isr & IRQ_ALLSENT) {
1227                                 info->icount.txok++;
1228                                 tx_done(info, tty);
1229                         }
1230                         else if (isr & IRQ_TXFIFO)
1231                                 tx_ready(info, tty);
1232                 }
1233                 if (gis & BIT7) {
1234                         pis = read_reg(info, CHA + PIS);
1235                         if (pis & BIT1)
1236                                 dsr_change(info);
1237                         if (pis & BIT2)
1238                                 ri_change(info);
1239                 }
1240         }
1241
1242         /* Request bottom half processing if there's something
1243          * for it to do and the bh is not already running
1244          */
1245
1246         if (info->pending_bh && !info->bh_running && !info->bh_requested) {
1247                 if (debug_level >= DEBUG_LEVEL_ISR)
1248                         printk("%s(%d):%s queueing bh task.\n",
1249                                 __FILE__,__LINE__,info->device_name);
1250                 schedule_work(&info->task);
1251                 info->bh_requested = true;
1252         }
1253
1254         spin_unlock(&info->lock);
1255         tty_kref_put(tty);
1256
1257         if (debug_level >= DEBUG_LEVEL_ISR)
1258                 printk("%s(%d):mgslpc_isr(%d)exit.\n",
1259                        __FILE__, __LINE__, info->irq_level);
1260
1261         return IRQ_HANDLED;
1262 }
1263
1264 /* Initialize and start device.
1265  */
1266 static int startup(MGSLPC_INFO * info, struct tty_struct *tty)
1267 {
1268         int retval = 0;
1269
1270         if (debug_level >= DEBUG_LEVEL_INFO)
1271                 printk("%s(%d):startup(%s)\n", __FILE__, __LINE__, info->device_name);
1272
1273         if (tty_port_initialized(&info->port))
1274                 return 0;
1275
1276         if (!info->tx_buf) {
1277                 /* allocate a page of memory for a transmit buffer */
1278                 info->tx_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL);
1279                 if (!info->tx_buf) {
1280                         printk(KERN_ERR"%s(%d):%s can't allocate transmit buffer\n",
1281                                 __FILE__, __LINE__, info->device_name);
1282                         return -ENOMEM;
1283                 }
1284         }
1285
1286         info->pending_bh = 0;
1287
1288         memset(&info->icount, 0, sizeof(info->icount));
1289
1290         timer_setup(&info->tx_timer, tx_timeout, 0);
1291
1292         /* Allocate and claim adapter resources */
1293         retval = claim_resources(info);
1294
1295         /* perform existence check and diagnostics */
1296         if (!retval)
1297                 retval = adapter_test(info);
1298
1299         if (retval) {
1300                 if (capable(CAP_SYS_ADMIN) && tty)
1301                         set_bit(TTY_IO_ERROR, &tty->flags);
1302                 release_resources(info);
1303                 return retval;
1304         }
1305
1306         /* program hardware for current parameters */
1307         mgslpc_change_params(info, tty);
1308
1309         if (tty)
1310                 clear_bit(TTY_IO_ERROR, &tty->flags);
1311
1312         tty_port_set_initialized(&info->port, 1);
1313
1314         return 0;
1315 }
1316
1317 /* Called by mgslpc_close() and mgslpc_hangup() to shutdown hardware
1318  */
1319 static void shutdown(MGSLPC_INFO * info, struct tty_struct *tty)
1320 {
1321         unsigned long flags;
1322
1323         if (!tty_port_initialized(&info->port))
1324                 return;
1325
1326         if (debug_level >= DEBUG_LEVEL_INFO)
1327                 printk("%s(%d):mgslpc_shutdown(%s)\n",
1328                          __FILE__, __LINE__, info->device_name);
1329
1330         /* clear status wait queue because status changes */
1331         /* can't happen after shutting down the hardware */
1332         wake_up_interruptible(&info->status_event_wait_q);
1333         wake_up_interruptible(&info->event_wait_q);
1334
1335         del_timer_sync(&info->tx_timer);
1336
1337         if (info->tx_buf) {
1338                 free_page((unsigned long) info->tx_buf);
1339                 info->tx_buf = NULL;
1340         }
1341
1342         spin_lock_irqsave(&info->lock, flags);
1343
1344         rx_stop(info);
1345         tx_stop(info);
1346
1347         /* TODO:disable interrupts instead of reset to preserve signal states */
1348         reset_device(info);
1349
1350         if (!tty || C_HUPCL(tty)) {
1351                 info->serial_signals &= ~(SerialSignal_RTS | SerialSignal_DTR);
1352                 set_signals(info);
1353         }
1354
1355         spin_unlock_irqrestore(&info->lock, flags);
1356
1357         release_resources(info);
1358
1359         if (tty)
1360                 set_bit(TTY_IO_ERROR, &tty->flags);
1361
1362         tty_port_set_initialized(&info->port, 0);
1363 }
1364
1365 static void mgslpc_program_hw(MGSLPC_INFO *info, struct tty_struct *tty)
1366 {
1367         unsigned long flags;
1368
1369         spin_lock_irqsave(&info->lock, flags);
1370
1371         rx_stop(info);
1372         tx_stop(info);
1373         info->tx_count = info->tx_put = info->tx_get = 0;
1374
1375         if (info->params.mode == MGSL_MODE_HDLC || info->netcount)
1376                 hdlc_mode(info);
1377         else
1378                 async_mode(info);
1379
1380         set_signals(info);
1381
1382         info->dcd_chkcount = 0;
1383         info->cts_chkcount = 0;
1384         info->ri_chkcount = 0;
1385         info->dsr_chkcount = 0;
1386
1387         irq_enable(info, CHB, IRQ_DCD | IRQ_CTS);
1388         port_irq_enable(info, (unsigned char) PVR_DSR | PVR_RI);
1389         get_signals(info);
1390
1391         if (info->netcount || (tty && C_CREAD(tty)))
1392                 rx_start(info);
1393
1394         spin_unlock_irqrestore(&info->lock, flags);
1395 }
1396
1397 /* Reconfigure adapter based on new parameters
1398  */
1399 static void mgslpc_change_params(MGSLPC_INFO *info, struct tty_struct *tty)
1400 {
1401         unsigned cflag;
1402         int bits_per_char;
1403
1404         if (!tty)
1405                 return;
1406
1407         if (debug_level >= DEBUG_LEVEL_INFO)
1408                 printk("%s(%d):mgslpc_change_params(%s)\n",
1409                          __FILE__, __LINE__, info->device_name);
1410
1411         cflag = tty->termios.c_cflag;
1412
1413         /* if B0 rate (hangup) specified then negate RTS and DTR */
1414         /* otherwise assert RTS and DTR */
1415         if (cflag & CBAUD)
1416                 info->serial_signals |= SerialSignal_RTS | SerialSignal_DTR;
1417         else
1418                 info->serial_signals &= ~(SerialSignal_RTS | SerialSignal_DTR);
1419
1420         /* byte size and parity */
1421
1422         info->params.data_bits = tty_get_char_size(cflag);
1423
1424         if (cflag & CSTOPB)
1425                 info->params.stop_bits = 2;
1426         else
1427                 info->params.stop_bits = 1;
1428
1429         info->params.parity = ASYNC_PARITY_NONE;
1430         if (cflag & PARENB) {
1431                 if (cflag & PARODD)
1432                         info->params.parity = ASYNC_PARITY_ODD;
1433                 else
1434                         info->params.parity = ASYNC_PARITY_EVEN;
1435 #ifdef CMSPAR
1436                 if (cflag & CMSPAR)
1437                         info->params.parity = ASYNC_PARITY_SPACE;
1438 #endif
1439         }
1440
1441         /* calculate number of jiffies to transmit a full
1442          * FIFO (32 bytes) at specified data rate
1443          */
1444         bits_per_char = info->params.data_bits +
1445                         info->params.stop_bits + 1;
1446
1447         /* if port data rate is set to 460800 or less then
1448          * allow tty settings to override, otherwise keep the
1449          * current data rate.
1450          */
1451         if (info->params.data_rate <= 460800) {
1452                 info->params.data_rate = tty_get_baud_rate(tty);
1453         }
1454
1455         if (info->params.data_rate) {
1456                 info->timeout = (32*HZ*bits_per_char) /
1457                                 info->params.data_rate;
1458         }
1459         info->timeout += HZ/50;         /* Add .02 seconds of slop */
1460
1461         tty_port_set_cts_flow(&info->port, cflag & CRTSCTS);
1462         tty_port_set_check_carrier(&info->port, ~cflag & CLOCAL);
1463
1464         /* process tty input control flags */
1465
1466         info->read_status_mask = 0;
1467         if (I_INPCK(tty))
1468                 info->read_status_mask |= BIT7 | BIT6;
1469         if (I_IGNPAR(tty))
1470                 info->ignore_status_mask |= BIT7 | BIT6;
1471
1472         mgslpc_program_hw(info, tty);
1473 }
1474
1475 /* Add a character to the transmit buffer
1476  */
1477 static int mgslpc_put_char(struct tty_struct *tty, unsigned char ch)
1478 {
1479         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1480         unsigned long flags;
1481
1482         if (debug_level >= DEBUG_LEVEL_INFO) {
1483                 printk("%s(%d):mgslpc_put_char(%d) on %s\n",
1484                         __FILE__, __LINE__, ch, info->device_name);
1485         }
1486
1487         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_put_char"))
1488                 return 0;
1489
1490         if (!info->tx_buf)
1491                 return 0;
1492
1493         spin_lock_irqsave(&info->lock, flags);
1494
1495         if (info->params.mode == MGSL_MODE_ASYNC || !info->tx_active) {
1496                 if (info->tx_count < TXBUFSIZE - 1) {
1497                         info->tx_buf[info->tx_put++] = ch;
1498                         info->tx_put &= TXBUFSIZE-1;
1499                         info->tx_count++;
1500                 }
1501         }
1502
1503         spin_unlock_irqrestore(&info->lock, flags);
1504         return 1;
1505 }
1506
1507 /* Enable transmitter so remaining characters in the
1508  * transmit buffer are sent.
1509  */
1510 static void mgslpc_flush_chars(struct tty_struct *tty)
1511 {
1512         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1513         unsigned long flags;
1514
1515         if (debug_level >= DEBUG_LEVEL_INFO)
1516                 printk("%s(%d):mgslpc_flush_chars() entry on %s tx_count=%d\n",
1517                         __FILE__, __LINE__, info->device_name, info->tx_count);
1518
1519         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_chars"))
1520                 return;
1521
1522         if (info->tx_count <= 0 || tty->flow.stopped ||
1523             tty->hw_stopped || !info->tx_buf)
1524                 return;
1525
1526         if (debug_level >= DEBUG_LEVEL_INFO)
1527                 printk("%s(%d):mgslpc_flush_chars() entry on %s starting transmitter\n",
1528                         __FILE__, __LINE__, info->device_name);
1529
1530         spin_lock_irqsave(&info->lock, flags);
1531         if (!info->tx_active)
1532                 tx_start(info, tty);
1533         spin_unlock_irqrestore(&info->lock, flags);
1534 }
1535
1536 /* Send a block of data
1537  *
1538  * Arguments:
1539  *
1540  * tty        pointer to tty information structure
1541  * buf        pointer to buffer containing send data
1542  * count      size of send data in bytes
1543  *
1544  * Returns: number of characters written
1545  */
1546 static int mgslpc_write(struct tty_struct * tty,
1547                         const unsigned char *buf, int count)
1548 {
1549         int c, ret = 0;
1550         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1551         unsigned long flags;
1552
1553         if (debug_level >= DEBUG_LEVEL_INFO)
1554                 printk("%s(%d):mgslpc_write(%s) count=%d\n",
1555                         __FILE__, __LINE__, info->device_name, count);
1556
1557         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write") ||
1558                 !info->tx_buf)
1559                 goto cleanup;
1560
1561         if (info->params.mode == MGSL_MODE_HDLC) {
1562                 if (count > TXBUFSIZE) {
1563                         ret = -EIO;
1564                         goto cleanup;
1565                 }
1566                 if (info->tx_active)
1567                         goto cleanup;
1568                 else if (info->tx_count)
1569                         goto start;
1570         }
1571
1572         for (;;) {
1573                 c = min(count,
1574                         min(TXBUFSIZE - info->tx_count - 1,
1575                             TXBUFSIZE - info->tx_put));
1576                 if (c <= 0)
1577                         break;
1578
1579                 memcpy(info->tx_buf + info->tx_put, buf, c);
1580
1581                 spin_lock_irqsave(&info->lock, flags);
1582                 info->tx_put = (info->tx_put + c) & (TXBUFSIZE-1);
1583                 info->tx_count += c;
1584                 spin_unlock_irqrestore(&info->lock, flags);
1585
1586                 buf += c;
1587                 count -= c;
1588                 ret += c;
1589         }
1590 start:
1591         if (info->tx_count && !tty->flow.stopped && !tty->hw_stopped) {
1592                 spin_lock_irqsave(&info->lock, flags);
1593                 if (!info->tx_active)
1594                         tx_start(info, tty);
1595                 spin_unlock_irqrestore(&info->lock, flags);
1596         }
1597 cleanup:
1598         if (debug_level >= DEBUG_LEVEL_INFO)
1599                 printk("%s(%d):mgslpc_write(%s) returning=%d\n",
1600                         __FILE__, __LINE__, info->device_name, ret);
1601         return ret;
1602 }
1603
1604 /* Return the count of free bytes in transmit buffer
1605  */
1606 static unsigned int mgslpc_write_room(struct tty_struct *tty)
1607 {
1608         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1609         int ret;
1610
1611         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write_room"))
1612                 return 0;
1613
1614         if (info->params.mode == MGSL_MODE_HDLC) {
1615                 /* HDLC (frame oriented) mode */
1616                 if (info->tx_active)
1617                         return 0;
1618                 else
1619                         return HDLC_MAX_FRAME_SIZE;
1620         } else {
1621                 ret = TXBUFSIZE - info->tx_count - 1;
1622                 if (ret < 0)
1623                         ret = 0;
1624         }
1625
1626         if (debug_level >= DEBUG_LEVEL_INFO)
1627                 printk("%s(%d):mgslpc_write_room(%s)=%d\n",
1628                          __FILE__, __LINE__, info->device_name, ret);
1629         return ret;
1630 }
1631
1632 /* Return the count of bytes in transmit buffer
1633  */
1634 static unsigned int mgslpc_chars_in_buffer(struct tty_struct *tty)
1635 {
1636         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1637         unsigned int rc;
1638
1639         if (debug_level >= DEBUG_LEVEL_INFO)
1640                 printk("%s(%d):mgslpc_chars_in_buffer(%s)\n",
1641                          __FILE__, __LINE__, info->device_name);
1642
1643         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_chars_in_buffer"))
1644                 return 0;
1645
1646         if (info->params.mode == MGSL_MODE_HDLC)
1647                 rc = info->tx_active ? info->max_frame_size : 0;
1648         else
1649                 rc = info->tx_count;
1650
1651         if (debug_level >= DEBUG_LEVEL_INFO)
1652                 printk("%s(%d):mgslpc_chars_in_buffer(%s)=%u\n",
1653                          __FILE__, __LINE__, info->device_name, rc);
1654
1655         return rc;
1656 }
1657
1658 /* Discard all data in the send buffer
1659  */
1660 static void mgslpc_flush_buffer(struct tty_struct *tty)
1661 {
1662         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1663         unsigned long flags;
1664
1665         if (debug_level >= DEBUG_LEVEL_INFO)
1666                 printk("%s(%d):mgslpc_flush_buffer(%s) entry\n",
1667                          __FILE__, __LINE__, info->device_name);
1668
1669         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_buffer"))
1670                 return;
1671
1672         spin_lock_irqsave(&info->lock, flags);
1673         info->tx_count = info->tx_put = info->tx_get = 0;
1674         del_timer(&info->tx_timer);
1675         spin_unlock_irqrestore(&info->lock, flags);
1676
1677         wake_up_interruptible(&tty->write_wait);
1678         tty_wakeup(tty);
1679 }
1680
1681 /* Send a high-priority XON/XOFF character
1682  */
1683 static void mgslpc_send_xchar(struct tty_struct *tty, char ch)
1684 {
1685         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1686         unsigned long flags;
1687
1688         if (debug_level >= DEBUG_LEVEL_INFO)
1689                 printk("%s(%d):mgslpc_send_xchar(%s,%d)\n",
1690                          __FILE__, __LINE__, info->device_name, ch);
1691
1692         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_send_xchar"))
1693                 return;
1694
1695         info->x_char = ch;
1696         if (ch) {
1697                 spin_lock_irqsave(&info->lock, flags);
1698                 if (!info->tx_enabled)
1699                         tx_start(info, tty);
1700                 spin_unlock_irqrestore(&info->lock, flags);
1701         }
1702 }
1703
1704 /* Signal remote device to throttle send data (our receive data)
1705  */
1706 static void mgslpc_throttle(struct tty_struct * tty)
1707 {
1708         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1709         unsigned long flags;
1710
1711         if (debug_level >= DEBUG_LEVEL_INFO)
1712                 printk("%s(%d):mgslpc_throttle(%s) entry\n",
1713                          __FILE__, __LINE__, info->device_name);
1714
1715         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_throttle"))
1716                 return;
1717
1718         if (I_IXOFF(tty))
1719                 mgslpc_send_xchar(tty, STOP_CHAR(tty));
1720
1721         if (C_CRTSCTS(tty)) {
1722                 spin_lock_irqsave(&info->lock, flags);
1723                 info->serial_signals &= ~SerialSignal_RTS;
1724                 set_signals(info);
1725                 spin_unlock_irqrestore(&info->lock, flags);
1726         }
1727 }
1728
1729 /* Signal remote device to stop throttling send data (our receive data)
1730  */
1731 static void mgslpc_unthrottle(struct tty_struct * tty)
1732 {
1733         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1734         unsigned long flags;
1735
1736         if (debug_level >= DEBUG_LEVEL_INFO)
1737                 printk("%s(%d):mgslpc_unthrottle(%s) entry\n",
1738                          __FILE__, __LINE__, info->device_name);
1739
1740         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_unthrottle"))
1741                 return;
1742
1743         if (I_IXOFF(tty)) {
1744                 if (info->x_char)
1745                         info->x_char = 0;
1746                 else
1747                         mgslpc_send_xchar(tty, START_CHAR(tty));
1748         }
1749
1750         if (C_CRTSCTS(tty)) {
1751                 spin_lock_irqsave(&info->lock, flags);
1752                 info->serial_signals |= SerialSignal_RTS;
1753                 set_signals(info);
1754                 spin_unlock_irqrestore(&info->lock, flags);
1755         }
1756 }
1757
1758 /* get the current serial statistics
1759  */
1760 static int get_stats(MGSLPC_INFO * info, struct mgsl_icount __user *user_icount)
1761 {
1762         int err;
1763         if (debug_level >= DEBUG_LEVEL_INFO)
1764                 printk("get_params(%s)\n", info->device_name);
1765         if (!user_icount) {
1766                 memset(&info->icount, 0, sizeof(info->icount));
1767         } else {
1768                 COPY_TO_USER(err, user_icount, &info->icount, sizeof(struct mgsl_icount));
1769                 if (err)
1770                         return -EFAULT;
1771         }
1772         return 0;
1773 }
1774
1775 /* get the current serial parameters
1776  */
1777 static int get_params(MGSLPC_INFO * info, MGSL_PARAMS __user *user_params)
1778 {
1779         int err;
1780         if (debug_level >= DEBUG_LEVEL_INFO)
1781                 printk("get_params(%s)\n", info->device_name);
1782         COPY_TO_USER(err,user_params, &info->params, sizeof(MGSL_PARAMS));
1783         if (err)
1784                 return -EFAULT;
1785         return 0;
1786 }
1787
1788 /* set the serial parameters
1789  *
1790  * Arguments:
1791  *
1792  *      info            pointer to device instance data
1793  *      new_params      user buffer containing new serial params
1794  *
1795  * Returns:     0 if success, otherwise error code
1796  */
1797 static int set_params(MGSLPC_INFO * info, MGSL_PARAMS __user *new_params, struct tty_struct *tty)
1798 {
1799         unsigned long flags;
1800         MGSL_PARAMS tmp_params;
1801         int err;
1802
1803         if (debug_level >= DEBUG_LEVEL_INFO)
1804                 printk("%s(%d):set_params %s\n", __FILE__,__LINE__,
1805                         info->device_name);
1806         COPY_FROM_USER(err,&tmp_params, new_params, sizeof(MGSL_PARAMS));
1807         if (err) {
1808                 if (debug_level >= DEBUG_LEVEL_INFO)
1809                         printk("%s(%d):set_params(%s) user buffer copy failed\n",
1810                                 __FILE__, __LINE__, info->device_name);
1811                 return -EFAULT;
1812         }
1813
1814         spin_lock_irqsave(&info->lock, flags);
1815         memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS));
1816         spin_unlock_irqrestore(&info->lock, flags);
1817
1818         mgslpc_change_params(info, tty);
1819
1820         return 0;
1821 }
1822
1823 static int get_txidle(MGSLPC_INFO * info, int __user *idle_mode)
1824 {
1825         int err;
1826         if (debug_level >= DEBUG_LEVEL_INFO)
1827                 printk("get_txidle(%s)=%d\n", info->device_name, info->idle_mode);
1828         COPY_TO_USER(err,idle_mode, &info->idle_mode, sizeof(int));
1829         if (err)
1830                 return -EFAULT;
1831         return 0;
1832 }
1833
1834 static int set_txidle(MGSLPC_INFO * info, int idle_mode)
1835 {
1836         unsigned long flags;
1837         if (debug_level >= DEBUG_LEVEL_INFO)
1838                 printk("set_txidle(%s,%d)\n", info->device_name, idle_mode);
1839         spin_lock_irqsave(&info->lock, flags);
1840         info->idle_mode = idle_mode;
1841         tx_set_idle(info);
1842         spin_unlock_irqrestore(&info->lock, flags);
1843         return 0;
1844 }
1845
1846 static int get_interface(MGSLPC_INFO * info, int __user *if_mode)
1847 {
1848         int err;
1849         if (debug_level >= DEBUG_LEVEL_INFO)
1850                 printk("get_interface(%s)=%d\n", info->device_name, info->if_mode);
1851         COPY_TO_USER(err,if_mode, &info->if_mode, sizeof(int));
1852         if (err)
1853                 return -EFAULT;
1854         return 0;
1855 }
1856
1857 static int set_interface(MGSLPC_INFO * info, int if_mode)
1858 {
1859         unsigned long flags;
1860         unsigned char val;
1861         if (debug_level >= DEBUG_LEVEL_INFO)
1862                 printk("set_interface(%s,%d)\n", info->device_name, if_mode);
1863         spin_lock_irqsave(&info->lock, flags);
1864         info->if_mode = if_mode;
1865
1866         val = read_reg(info, PVR) & 0x0f;
1867         switch (info->if_mode)
1868         {
1869         case MGSL_INTERFACE_RS232: val |= PVR_RS232; break;
1870         case MGSL_INTERFACE_V35:   val |= PVR_V35;   break;
1871         case MGSL_INTERFACE_RS422: val |= PVR_RS422; break;
1872         }
1873         write_reg(info, PVR, val);
1874
1875         spin_unlock_irqrestore(&info->lock, flags);
1876         return 0;
1877 }
1878
1879 static int set_txenable(MGSLPC_INFO * info, int enable, struct tty_struct *tty)
1880 {
1881         unsigned long flags;
1882
1883         if (debug_level >= DEBUG_LEVEL_INFO)
1884                 printk("set_txenable(%s,%d)\n", info->device_name, enable);
1885
1886         spin_lock_irqsave(&info->lock, flags);
1887         if (enable) {
1888                 if (!info->tx_enabled)
1889                         tx_start(info, tty);
1890         } else {
1891                 if (info->tx_enabled)
1892                         tx_stop(info);
1893         }
1894         spin_unlock_irqrestore(&info->lock, flags);
1895         return 0;
1896 }
1897
1898 static int tx_abort(MGSLPC_INFO * info)
1899 {
1900         unsigned long flags;
1901
1902         if (debug_level >= DEBUG_LEVEL_INFO)
1903                 printk("tx_abort(%s)\n", info->device_name);
1904
1905         spin_lock_irqsave(&info->lock, flags);
1906         if (info->tx_active && info->tx_count &&
1907             info->params.mode == MGSL_MODE_HDLC) {
1908                 /* clear data count so FIFO is not filled on next IRQ.
1909                  * This results in underrun and abort transmission.
1910                  */
1911                 info->tx_count = info->tx_put = info->tx_get = 0;
1912                 info->tx_aborting = true;
1913         }
1914         spin_unlock_irqrestore(&info->lock, flags);
1915         return 0;
1916 }
1917
1918 static int set_rxenable(MGSLPC_INFO * info, int enable)
1919 {
1920         unsigned long flags;
1921
1922         if (debug_level >= DEBUG_LEVEL_INFO)
1923                 printk("set_rxenable(%s,%d)\n", info->device_name, enable);
1924
1925         spin_lock_irqsave(&info->lock, flags);
1926         if (enable) {
1927                 if (!info->rx_enabled)
1928                         rx_start(info);
1929         } else {
1930                 if (info->rx_enabled)
1931                         rx_stop(info);
1932         }
1933         spin_unlock_irqrestore(&info->lock, flags);
1934         return 0;
1935 }
1936
1937 /* wait for specified event to occur
1938  *
1939  * Arguments:           info    pointer to device instance data
1940  *                      mask    pointer to bitmask of events to wait for
1941  * Return Value:        0       if successful and bit mask updated with
1942  *                              of events triggerred,
1943  *                      otherwise error code
1944  */
1945 static int wait_events(MGSLPC_INFO * info, int __user *mask_ptr)
1946 {
1947         unsigned long flags;
1948         int s;
1949         int rc=0;
1950         struct mgsl_icount cprev, cnow;
1951         int events;
1952         int mask;
1953         struct  _input_signal_events oldsigs, newsigs;
1954         DECLARE_WAITQUEUE(wait, current);
1955
1956         COPY_FROM_USER(rc,&mask, mask_ptr, sizeof(int));
1957         if (rc)
1958                 return  -EFAULT;
1959
1960         if (debug_level >= DEBUG_LEVEL_INFO)
1961                 printk("wait_events(%s,%d)\n", info->device_name, mask);
1962
1963         spin_lock_irqsave(&info->lock, flags);
1964
1965         /* return immediately if state matches requested events */
1966         get_signals(info);
1967         s = info->serial_signals;
1968         events = mask &
1969                 ( ((s & SerialSignal_DSR) ? MgslEvent_DsrActive:MgslEvent_DsrInactive) +
1970                   ((s & SerialSignal_DCD) ? MgslEvent_DcdActive:MgslEvent_DcdInactive) +
1971                   ((s & SerialSignal_CTS) ? MgslEvent_CtsActive:MgslEvent_CtsInactive) +
1972                   ((s & SerialSignal_RI)  ? MgslEvent_RiActive :MgslEvent_RiInactive) );
1973         if (events) {
1974                 spin_unlock_irqrestore(&info->lock, flags);
1975                 goto exit;
1976         }
1977
1978         /* save current irq counts */
1979         cprev = info->icount;
1980         oldsigs = info->input_signal_events;
1981
1982         if ((info->params.mode == MGSL_MODE_HDLC) &&
1983             (mask & MgslEvent_ExitHuntMode))
1984                 irq_enable(info, CHA, IRQ_EXITHUNT);
1985
1986         set_current_state(TASK_INTERRUPTIBLE);
1987         add_wait_queue(&info->event_wait_q, &wait);
1988
1989         spin_unlock_irqrestore(&info->lock, flags);
1990
1991
1992         for(;;) {
1993                 schedule();
1994                 if (signal_pending(current)) {
1995                         rc = -ERESTARTSYS;
1996                         break;
1997                 }
1998
1999                 /* get current irq counts */
2000                 spin_lock_irqsave(&info->lock, flags);
2001                 cnow = info->icount;
2002                 newsigs = info->input_signal_events;
2003                 set_current_state(TASK_INTERRUPTIBLE);
2004                 spin_unlock_irqrestore(&info->lock, flags);
2005
2006                 /* if no change, wait aborted for some reason */
2007                 if (newsigs.dsr_up   == oldsigs.dsr_up   &&
2008                     newsigs.dsr_down == oldsigs.dsr_down &&
2009                     newsigs.dcd_up   == oldsigs.dcd_up   &&
2010                     newsigs.dcd_down == oldsigs.dcd_down &&
2011                     newsigs.cts_up   == oldsigs.cts_up   &&
2012                     newsigs.cts_down == oldsigs.cts_down &&
2013                     newsigs.ri_up    == oldsigs.ri_up    &&
2014                     newsigs.ri_down  == oldsigs.ri_down  &&
2015                     cnow.exithunt    == cprev.exithunt   &&
2016                     cnow.rxidle      == cprev.rxidle) {
2017                         rc = -EIO;
2018                         break;
2019                 }
2020
2021                 events = mask &
2022                         ( (newsigs.dsr_up   != oldsigs.dsr_up   ? MgslEvent_DsrActive:0)   +
2023                           (newsigs.dsr_down != oldsigs.dsr_down ? MgslEvent_DsrInactive:0) +
2024                           (newsigs.dcd_up   != oldsigs.dcd_up   ? MgslEvent_DcdActive:0)   +
2025                           (newsigs.dcd_down != oldsigs.dcd_down ? MgslEvent_DcdInactive:0) +
2026                           (newsigs.cts_up   != oldsigs.cts_up   ? MgslEvent_CtsActive:0)   +
2027                           (newsigs.cts_down != oldsigs.cts_down ? MgslEvent_CtsInactive:0) +
2028                           (newsigs.ri_up    != oldsigs.ri_up    ? MgslEvent_RiActive:0)    +
2029                           (newsigs.ri_down  != oldsigs.ri_down  ? MgslEvent_RiInactive:0)  +
2030                           (cnow.exithunt    != cprev.exithunt   ? MgslEvent_ExitHuntMode:0) +
2031                           (cnow.rxidle      != cprev.rxidle     ? MgslEvent_IdleReceived:0) );
2032                 if (events)
2033                         break;
2034
2035                 cprev = cnow;
2036                 oldsigs = newsigs;
2037         }
2038
2039         remove_wait_queue(&info->event_wait_q, &wait);
2040         set_current_state(TASK_RUNNING);
2041
2042         if (mask & MgslEvent_ExitHuntMode) {
2043                 spin_lock_irqsave(&info->lock, flags);
2044                 if (!waitqueue_active(&info->event_wait_q))
2045                         irq_disable(info, CHA, IRQ_EXITHUNT);
2046                 spin_unlock_irqrestore(&info->lock, flags);
2047         }
2048 exit:
2049         if (rc == 0)
2050                 PUT_USER(rc, events, mask_ptr);
2051         return rc;
2052 }
2053
2054 static int modem_input_wait(MGSLPC_INFO *info,int arg)
2055 {
2056         unsigned long flags;
2057         int rc;
2058         struct mgsl_icount cprev, cnow;
2059         DECLARE_WAITQUEUE(wait, current);
2060
2061         /* save current irq counts */
2062         spin_lock_irqsave(&info->lock, flags);
2063         cprev = info->icount;
2064         add_wait_queue(&info->status_event_wait_q, &wait);
2065         set_current_state(TASK_INTERRUPTIBLE);
2066         spin_unlock_irqrestore(&info->lock, flags);
2067
2068         for(;;) {
2069                 schedule();
2070                 if (signal_pending(current)) {
2071                         rc = -ERESTARTSYS;
2072                         break;
2073                 }
2074
2075                 /* get new irq counts */
2076                 spin_lock_irqsave(&info->lock, flags);
2077                 cnow = info->icount;
2078                 set_current_state(TASK_INTERRUPTIBLE);
2079                 spin_unlock_irqrestore(&info->lock, flags);
2080
2081                 /* if no change, wait aborted for some reason */
2082                 if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
2083                     cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) {
2084                         rc = -EIO;
2085                         break;
2086                 }
2087
2088                 /* check for change in caller specified modem input */
2089                 if ((arg & TIOCM_RNG && cnow.rng != cprev.rng) ||
2090                     (arg & TIOCM_DSR && cnow.dsr != cprev.dsr) ||
2091                     (arg & TIOCM_CD  && cnow.dcd != cprev.dcd) ||
2092                     (arg & TIOCM_CTS && cnow.cts != cprev.cts)) {
2093                         rc = 0;
2094                         break;
2095                 }
2096
2097                 cprev = cnow;
2098         }
2099         remove_wait_queue(&info->status_event_wait_q, &wait);
2100         set_current_state(TASK_RUNNING);
2101         return rc;
2102 }
2103
2104 /* return the state of the serial control and status signals
2105  */
2106 static int tiocmget(struct tty_struct *tty)
2107 {
2108         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2109         unsigned int result;
2110         unsigned long flags;
2111
2112         spin_lock_irqsave(&info->lock, flags);
2113         get_signals(info);
2114         spin_unlock_irqrestore(&info->lock, flags);
2115
2116         result = ((info->serial_signals & SerialSignal_RTS) ? TIOCM_RTS:0) +
2117                 ((info->serial_signals & SerialSignal_DTR) ? TIOCM_DTR:0) +
2118                 ((info->serial_signals & SerialSignal_DCD) ? TIOCM_CAR:0) +
2119                 ((info->serial_signals & SerialSignal_RI)  ? TIOCM_RNG:0) +
2120                 ((info->serial_signals & SerialSignal_DSR) ? TIOCM_DSR:0) +
2121                 ((info->serial_signals & SerialSignal_CTS) ? TIOCM_CTS:0);
2122
2123         if (debug_level >= DEBUG_LEVEL_INFO)
2124                 printk("%s(%d):%s tiocmget() value=%08X\n",
2125                          __FILE__, __LINE__, info->device_name, result);
2126         return result;
2127 }
2128
2129 /* set modem control signals (DTR/RTS)
2130  */
2131 static int tiocmset(struct tty_struct *tty,
2132                     unsigned int set, unsigned int clear)
2133 {
2134         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2135         unsigned long flags;
2136
2137         if (debug_level >= DEBUG_LEVEL_INFO)
2138                 printk("%s(%d):%s tiocmset(%x,%x)\n",
2139                         __FILE__, __LINE__, info->device_name, set, clear);
2140
2141         if (set & TIOCM_RTS)
2142                 info->serial_signals |= SerialSignal_RTS;
2143         if (set & TIOCM_DTR)
2144                 info->serial_signals |= SerialSignal_DTR;
2145         if (clear & TIOCM_RTS)
2146                 info->serial_signals &= ~SerialSignal_RTS;
2147         if (clear & TIOCM_DTR)
2148                 info->serial_signals &= ~SerialSignal_DTR;
2149
2150         spin_lock_irqsave(&info->lock, flags);
2151         set_signals(info);
2152         spin_unlock_irqrestore(&info->lock, flags);
2153
2154         return 0;
2155 }
2156
2157 /* Set or clear transmit break condition
2158  *
2159  * Arguments:           tty             pointer to tty instance data
2160  *                      break_state     -1=set break condition, 0=clear
2161  */
2162 static int mgslpc_break(struct tty_struct *tty, int break_state)
2163 {
2164         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2165         unsigned long flags;
2166
2167         if (debug_level >= DEBUG_LEVEL_INFO)
2168                 printk("%s(%d):mgslpc_break(%s,%d)\n",
2169                          __FILE__, __LINE__, info->device_name, break_state);
2170
2171         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_break"))
2172                 return -EINVAL;
2173
2174         spin_lock_irqsave(&info->lock, flags);
2175         if (break_state == -1)
2176                 set_reg_bits(info, CHA+DAFO, BIT6);
2177         else
2178                 clear_reg_bits(info, CHA+DAFO, BIT6);
2179         spin_unlock_irqrestore(&info->lock, flags);
2180         return 0;
2181 }
2182
2183 static int mgslpc_get_icount(struct tty_struct *tty,
2184                                 struct serial_icounter_struct *icount)
2185 {
2186         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2187         struct mgsl_icount cnow;        /* kernel counter temps */
2188         unsigned long flags;
2189
2190         spin_lock_irqsave(&info->lock, flags);
2191         cnow = info->icount;
2192         spin_unlock_irqrestore(&info->lock, flags);
2193
2194         icount->cts = cnow.cts;
2195         icount->dsr = cnow.dsr;
2196         icount->rng = cnow.rng;
2197         icount->dcd = cnow.dcd;
2198         icount->rx = cnow.rx;
2199         icount->tx = cnow.tx;
2200         icount->frame = cnow.frame;
2201         icount->overrun = cnow.overrun;
2202         icount->parity = cnow.parity;
2203         icount->brk = cnow.brk;
2204         icount->buf_overrun = cnow.buf_overrun;
2205
2206         return 0;
2207 }
2208
2209 /* Service an IOCTL request
2210  *
2211  * Arguments:
2212  *
2213  *      tty     pointer to tty instance data
2214  *      cmd     IOCTL command code
2215  *      arg     command argument/context
2216  *
2217  * Return Value:        0 if success, otherwise error code
2218  */
2219 static int mgslpc_ioctl(struct tty_struct *tty,
2220                         unsigned int cmd, unsigned long arg)
2221 {
2222         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2223         void __user *argp = (void __user *)arg;
2224
2225         if (debug_level >= DEBUG_LEVEL_INFO)
2226                 printk("%s(%d):mgslpc_ioctl %s cmd=%08X\n", __FILE__, __LINE__,
2227                         info->device_name, cmd);
2228
2229         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_ioctl"))
2230                 return -ENODEV;
2231
2232         if (cmd != TIOCMIWAIT) {
2233                 if (tty_io_error(tty))
2234                     return -EIO;
2235         }
2236
2237         switch (cmd) {
2238         case MGSL_IOCGPARAMS:
2239                 return get_params(info, argp);
2240         case MGSL_IOCSPARAMS:
2241                 return set_params(info, argp, tty);
2242         case MGSL_IOCGTXIDLE:
2243                 return get_txidle(info, argp);
2244         case MGSL_IOCSTXIDLE:
2245                 return set_txidle(info, (int)arg);
2246         case MGSL_IOCGIF:
2247                 return get_interface(info, argp);
2248         case MGSL_IOCSIF:
2249                 return set_interface(info,(int)arg);
2250         case MGSL_IOCTXENABLE:
2251                 return set_txenable(info,(int)arg, tty);
2252         case MGSL_IOCRXENABLE:
2253                 return set_rxenable(info,(int)arg);
2254         case MGSL_IOCTXABORT:
2255                 return tx_abort(info);
2256         case MGSL_IOCGSTATS:
2257                 return get_stats(info, argp);
2258         case MGSL_IOCWAITEVENT:
2259                 return wait_events(info, argp);
2260         case TIOCMIWAIT:
2261                 return modem_input_wait(info,(int)arg);
2262         default:
2263                 return -ENOIOCTLCMD;
2264         }
2265         return 0;
2266 }
2267
2268 /* Set new termios settings
2269  *
2270  * Arguments:
2271  *
2272  *      tty             pointer to tty structure
2273  *      termios         pointer to buffer to hold returned old termios
2274  */
2275 static void mgslpc_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
2276 {
2277         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2278         unsigned long flags;
2279
2280         if (debug_level >= DEBUG_LEVEL_INFO)
2281                 printk("%s(%d):mgslpc_set_termios %s\n", __FILE__, __LINE__,
2282                         tty->driver->name);
2283
2284         /* just return if nothing has changed */
2285         if ((tty->termios.c_cflag == old_termios->c_cflag)
2286             && (RELEVANT_IFLAG(tty->termios.c_iflag)
2287                 == RELEVANT_IFLAG(old_termios->c_iflag)))
2288           return;
2289
2290         mgslpc_change_params(info, tty);
2291
2292         /* Handle transition to B0 status */
2293         if ((old_termios->c_cflag & CBAUD) && !C_BAUD(tty)) {
2294                 info->serial_signals &= ~(SerialSignal_RTS | SerialSignal_DTR);
2295                 spin_lock_irqsave(&info->lock, flags);
2296                 set_signals(info);
2297                 spin_unlock_irqrestore(&info->lock, flags);
2298         }
2299
2300         /* Handle transition away from B0 status */
2301         if (!(old_termios->c_cflag & CBAUD) && C_BAUD(tty)) {
2302                 info->serial_signals |= SerialSignal_DTR;
2303                 if (!C_CRTSCTS(tty) || !tty_throttled(tty))
2304                         info->serial_signals |= SerialSignal_RTS;
2305                 spin_lock_irqsave(&info->lock, flags);
2306                 set_signals(info);
2307                 spin_unlock_irqrestore(&info->lock, flags);
2308         }
2309
2310         /* Handle turning off CRTSCTS */
2311         if (old_termios->c_cflag & CRTSCTS && !C_CRTSCTS(tty)) {
2312                 tty->hw_stopped = 0;
2313                 tx_release(tty);
2314         }
2315 }
2316
2317 static void mgslpc_close(struct tty_struct *tty, struct file * filp)
2318 {
2319         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2320         struct tty_port *port = &info->port;
2321
2322         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_close"))
2323                 return;
2324
2325         if (debug_level >= DEBUG_LEVEL_INFO)
2326                 printk("%s(%d):mgslpc_close(%s) entry, count=%d\n",
2327                          __FILE__, __LINE__, info->device_name, port->count);
2328
2329         if (tty_port_close_start(port, tty, filp) == 0)
2330                 goto cleanup;
2331
2332         if (tty_port_initialized(port))
2333                 mgslpc_wait_until_sent(tty, info->timeout);
2334
2335         mgslpc_flush_buffer(tty);
2336
2337         tty_ldisc_flush(tty);
2338         shutdown(info, tty);
2339
2340         tty_port_close_end(port, tty);
2341         tty_port_tty_set(port, NULL);
2342 cleanup:
2343         if (debug_level >= DEBUG_LEVEL_INFO)
2344                 printk("%s(%d):mgslpc_close(%s) exit, count=%d\n", __FILE__, __LINE__,
2345                         tty->driver->name, port->count);
2346 }
2347
2348 /* Wait until the transmitter is empty.
2349  */
2350 static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout)
2351 {
2352         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2353         unsigned long orig_jiffies, char_time;
2354
2355         if (!info)
2356                 return;
2357
2358         if (debug_level >= DEBUG_LEVEL_INFO)
2359                 printk("%s(%d):mgslpc_wait_until_sent(%s) entry\n",
2360                          __FILE__, __LINE__, info->device_name);
2361
2362         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_wait_until_sent"))
2363                 return;
2364
2365         if (!tty_port_initialized(&info->port))
2366                 goto exit;
2367
2368         orig_jiffies = jiffies;
2369
2370         /* Set check interval to 1/5 of estimated time to
2371          * send a character, and make it at least 1. The check
2372          * interval should also be less than the timeout.
2373          * Note: use tight timings here to satisfy the NIST-PCTS.
2374          */
2375
2376         if (info->params.data_rate) {
2377                 char_time = info->timeout/(32 * 5);
2378                 if (!char_time)
2379                         char_time++;
2380         } else
2381                 char_time = 1;
2382
2383         if (timeout)
2384                 char_time = min_t(unsigned long, char_time, timeout);
2385
2386         if (info->params.mode == MGSL_MODE_HDLC) {
2387                 while (info->tx_active) {
2388                         msleep_interruptible(jiffies_to_msecs(char_time));
2389                         if (signal_pending(current))
2390                                 break;
2391                         if (timeout && time_after(jiffies, orig_jiffies + timeout))
2392                                 break;
2393                 }
2394         } else {
2395                 while ((info->tx_count || info->tx_active) &&
2396                         info->tx_enabled) {
2397                         msleep_interruptible(jiffies_to_msecs(char_time));
2398                         if (signal_pending(current))
2399                                 break;
2400                         if (timeout && time_after(jiffies, orig_jiffies + timeout))
2401                                 break;
2402                 }
2403         }
2404
2405 exit:
2406         if (debug_level >= DEBUG_LEVEL_INFO)
2407                 printk("%s(%d):mgslpc_wait_until_sent(%s) exit\n",
2408                          __FILE__, __LINE__, info->device_name);
2409 }
2410
2411 /* Called by tty_hangup() when a hangup is signaled.
2412  * This is the same as closing all open files for the port.
2413  */
2414 static void mgslpc_hangup(struct tty_struct *tty)
2415 {
2416         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2417
2418         if (debug_level >= DEBUG_LEVEL_INFO)
2419                 printk("%s(%d):mgslpc_hangup(%s)\n",
2420                          __FILE__, __LINE__, info->device_name);
2421
2422         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_hangup"))
2423                 return;
2424
2425         mgslpc_flush_buffer(tty);
2426         shutdown(info, tty);
2427         tty_port_hangup(&info->port);
2428 }
2429
2430 static int carrier_raised(struct tty_port *port)
2431 {
2432         MGSLPC_INFO *info = container_of(port, MGSLPC_INFO, port);
2433         unsigned long flags;
2434
2435         spin_lock_irqsave(&info->lock, flags);
2436         get_signals(info);
2437         spin_unlock_irqrestore(&info->lock, flags);
2438
2439         if (info->serial_signals & SerialSignal_DCD)
2440                 return 1;
2441         return 0;
2442 }
2443
2444 static void dtr_rts(struct tty_port *port, int onoff)
2445 {
2446         MGSLPC_INFO *info = container_of(port, MGSLPC_INFO, port);
2447         unsigned long flags;
2448
2449         spin_lock_irqsave(&info->lock, flags);
2450         if (onoff)
2451                 info->serial_signals |= SerialSignal_RTS | SerialSignal_DTR;
2452         else
2453                 info->serial_signals &= ~(SerialSignal_RTS | SerialSignal_DTR);
2454         set_signals(info);
2455         spin_unlock_irqrestore(&info->lock, flags);
2456 }
2457
2458
2459 static int mgslpc_open(struct tty_struct *tty, struct file * filp)
2460 {
2461         MGSLPC_INFO     *info;
2462         struct tty_port *port;
2463         int             retval, line;
2464         unsigned long   flags;
2465
2466         /* verify range of specified line number */
2467         line = tty->index;
2468         if (line >= mgslpc_device_count) {
2469                 printk("%s(%d):mgslpc_open with invalid line #%d.\n",
2470                         __FILE__, __LINE__, line);
2471                 return -ENODEV;
2472         }
2473
2474         /* find the info structure for the specified line */
2475         info = mgslpc_device_list;
2476         while(info && info->line != line)
2477                 info = info->next_device;
2478         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_open"))
2479                 return -ENODEV;
2480
2481         port = &info->port;
2482         tty->driver_data = info;
2483         tty_port_tty_set(port, tty);
2484
2485         if (debug_level >= DEBUG_LEVEL_INFO)
2486                 printk("%s(%d):mgslpc_open(%s), old ref count = %d\n",
2487                          __FILE__, __LINE__, tty->driver->name, port->count);
2488
2489         spin_lock_irqsave(&info->netlock, flags);
2490         if (info->netcount) {
2491                 retval = -EBUSY;
2492                 spin_unlock_irqrestore(&info->netlock, flags);
2493                 goto cleanup;
2494         }
2495         spin_lock(&port->lock);
2496         port->count++;
2497         spin_unlock(&port->lock);
2498         spin_unlock_irqrestore(&info->netlock, flags);
2499
2500         if (port->count == 1) {
2501                 /* 1st open on this device, init hardware */
2502                 retval = startup(info, tty);
2503                 if (retval < 0)
2504                         goto cleanup;
2505         }
2506
2507         retval = tty_port_block_til_ready(&info->port, tty, filp);
2508         if (retval) {
2509                 if (debug_level >= DEBUG_LEVEL_INFO)
2510                         printk("%s(%d):block_til_ready(%s) returned %d\n",
2511                                  __FILE__, __LINE__, info->device_name, retval);
2512                 goto cleanup;
2513         }
2514
2515         if (debug_level >= DEBUG_LEVEL_INFO)
2516                 printk("%s(%d):mgslpc_open(%s) success\n",
2517                          __FILE__, __LINE__, info->device_name);
2518         retval = 0;
2519
2520 cleanup:
2521         return retval;
2522 }
2523
2524 /*
2525  * /proc fs routines....
2526  */
2527
2528 static inline void line_info(struct seq_file *m, MGSLPC_INFO *info)
2529 {
2530         char    stat_buf[30];
2531         unsigned long flags;
2532
2533         seq_printf(m, "%s:io:%04X irq:%d",
2534                       info->device_name, info->io_base, info->irq_level);
2535
2536         /* output current serial signal states */
2537         spin_lock_irqsave(&info->lock, flags);
2538         get_signals(info);
2539         spin_unlock_irqrestore(&info->lock, flags);
2540
2541         stat_buf[0] = 0;
2542         stat_buf[1] = 0;
2543         if (info->serial_signals & SerialSignal_RTS)
2544                 strcat(stat_buf, "|RTS");
2545         if (info->serial_signals & SerialSignal_CTS)
2546                 strcat(stat_buf, "|CTS");
2547         if (info->serial_signals & SerialSignal_DTR)
2548                 strcat(stat_buf, "|DTR");
2549         if (info->serial_signals & SerialSignal_DSR)
2550                 strcat(stat_buf, "|DSR");
2551         if (info->serial_signals & SerialSignal_DCD)
2552                 strcat(stat_buf, "|CD");
2553         if (info->serial_signals & SerialSignal_RI)
2554                 strcat(stat_buf, "|RI");
2555
2556         if (info->params.mode == MGSL_MODE_HDLC) {
2557                 seq_printf(m, " HDLC txok:%d rxok:%d",
2558                               info->icount.txok, info->icount.rxok);
2559                 if (info->icount.txunder)
2560                         seq_printf(m, " txunder:%d", info->icount.txunder);
2561                 if (info->icount.txabort)
2562                         seq_printf(m, " txabort:%d", info->icount.txabort);
2563                 if (info->icount.rxshort)
2564                         seq_printf(m, " rxshort:%d", info->icount.rxshort);
2565                 if (info->icount.rxlong)
2566                         seq_printf(m, " rxlong:%d", info->icount.rxlong);
2567                 if (info->icount.rxover)
2568                         seq_printf(m, " rxover:%d", info->icount.rxover);
2569                 if (info->icount.rxcrc)
2570                         seq_printf(m, " rxcrc:%d", info->icount.rxcrc);
2571         } else {
2572                 seq_printf(m, " ASYNC tx:%d rx:%d",
2573                               info->icount.tx, info->icount.rx);
2574                 if (info->icount.frame)
2575                         seq_printf(m, " fe:%d", info->icount.frame);
2576                 if (info->icount.parity)
2577                         seq_printf(m, " pe:%d", info->icount.parity);
2578                 if (info->icount.brk)
2579                         seq_printf(m, " brk:%d", info->icount.brk);
2580                 if (info->icount.overrun)
2581                         seq_printf(m, " oe:%d", info->icount.overrun);
2582         }
2583
2584         /* Append serial signal status to end */
2585         seq_printf(m, " %s\n", stat_buf+1);
2586
2587         seq_printf(m, "txactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
2588                        info->tx_active,info->bh_requested,info->bh_running,
2589                        info->pending_bh);
2590 }
2591
2592 /* Called to print information about devices
2593  */
2594 static int mgslpc_proc_show(struct seq_file *m, void *v)
2595 {
2596         MGSLPC_INFO *info;
2597
2598         seq_printf(m, "synclink driver:%s\n", driver_version);
2599
2600         info = mgslpc_device_list;
2601         while (info) {
2602                 line_info(m, info);
2603                 info = info->next_device;
2604         }
2605         return 0;
2606 }
2607
2608 static int rx_alloc_buffers(MGSLPC_INFO *info)
2609 {
2610         /* each buffer has header and data */
2611         info->rx_buf_size = sizeof(RXBUF) + info->max_frame_size;
2612
2613         /* calculate total allocation size for 8 buffers */
2614         info->rx_buf_total_size = info->rx_buf_size * 8;
2615
2616         /* limit total allocated memory */
2617         if (info->rx_buf_total_size > 0x10000)
2618                 info->rx_buf_total_size = 0x10000;
2619
2620         /* calculate number of buffers */
2621         info->rx_buf_count = info->rx_buf_total_size / info->rx_buf_size;
2622
2623         info->rx_buf = kmalloc(info->rx_buf_total_size, GFP_KERNEL);
2624         if (info->rx_buf == NULL)
2625                 return -ENOMEM;
2626
2627         /* unused flag buffer to satisfy receive_buf calling interface */
2628         info->flag_buf = kzalloc(info->max_frame_size, GFP_KERNEL);
2629         if (!info->flag_buf) {
2630                 kfree(info->rx_buf);
2631                 info->rx_buf = NULL;
2632                 return -ENOMEM;
2633         }
2634
2635         rx_reset_buffers(info);
2636         return 0;
2637 }
2638
2639 static void rx_free_buffers(MGSLPC_INFO *info)
2640 {
2641         kfree(info->rx_buf);
2642         info->rx_buf = NULL;
2643         kfree(info->flag_buf);
2644         info->flag_buf = NULL;
2645 }
2646
2647 static int claim_resources(MGSLPC_INFO *info)
2648 {
2649         if (rx_alloc_buffers(info) < 0) {
2650                 printk("Can't allocate rx buffer %s\n", info->device_name);
2651                 release_resources(info);
2652                 return -ENODEV;
2653         }
2654         return 0;
2655 }
2656
2657 static void release_resources(MGSLPC_INFO *info)
2658 {
2659         if (debug_level >= DEBUG_LEVEL_INFO)
2660                 printk("release_resources(%s)\n", info->device_name);
2661         rx_free_buffers(info);
2662 }
2663
2664 /* Add the specified device instance data structure to the
2665  * global linked list of devices and increment the device count.
2666  *
2667  * Arguments:           info    pointer to device instance data
2668  */
2669 static int mgslpc_add_device(MGSLPC_INFO *info)
2670 {
2671         MGSLPC_INFO *current_dev = NULL;
2672         struct device *tty_dev;
2673         int ret;
2674
2675         info->next_device = NULL;
2676         info->line = mgslpc_device_count;
2677         sprintf(info->device_name,"ttySLP%d",info->line);
2678
2679         if (info->line < MAX_DEVICE_COUNT) {
2680                 if (maxframe[info->line])
2681                         info->max_frame_size = maxframe[info->line];
2682         }
2683
2684         mgslpc_device_count++;
2685
2686         if (!mgslpc_device_list)
2687                 mgslpc_device_list = info;
2688         else {
2689                 current_dev = mgslpc_device_list;
2690                 while (current_dev->next_device)
2691                         current_dev = current_dev->next_device;
2692                 current_dev->next_device = info;
2693         }
2694
2695         if (info->max_frame_size < 4096)
2696                 info->max_frame_size = 4096;
2697         else if (info->max_frame_size > 65535)
2698                 info->max_frame_size = 65535;
2699
2700         printk("SyncLink PC Card %s:IO=%04X IRQ=%d\n",
2701                 info->device_name, info->io_base, info->irq_level);
2702
2703 #if SYNCLINK_GENERIC_HDLC
2704         ret = hdlcdev_init(info);
2705         if (ret != 0)
2706                 goto failed;
2707 #endif
2708
2709         tty_dev = tty_port_register_device(&info->port, serial_driver, info->line,
2710                         &info->p_dev->dev);
2711         if (IS_ERR(tty_dev)) {
2712                 ret = PTR_ERR(tty_dev);
2713 #if SYNCLINK_GENERIC_HDLC
2714                 hdlcdev_exit(info);
2715 #endif
2716                 goto failed;
2717         }
2718
2719         return 0;
2720
2721 failed:
2722         if (current_dev)
2723                 current_dev->next_device = NULL;
2724         else
2725                 mgslpc_device_list = NULL;
2726         mgslpc_device_count--;
2727         return ret;
2728 }
2729
2730 static void mgslpc_remove_device(MGSLPC_INFO *remove_info)
2731 {
2732         MGSLPC_INFO *info = mgslpc_device_list;
2733         MGSLPC_INFO *last = NULL;
2734
2735         while(info) {
2736                 if (info == remove_info) {
2737                         if (last)
2738                                 last->next_device = info->next_device;
2739                         else
2740                                 mgslpc_device_list = info->next_device;
2741                         tty_unregister_device(serial_driver, info->line);
2742 #if SYNCLINK_GENERIC_HDLC
2743                         hdlcdev_exit(info);
2744 #endif
2745                         release_resources(info);
2746                         tty_port_destroy(&info->port);
2747                         kfree(info);
2748                         mgslpc_device_count--;
2749                         return;
2750                 }
2751                 last = info;
2752                 info = info->next_device;
2753         }
2754 }
2755
2756 static const struct pcmcia_device_id mgslpc_ids[] = {
2757         PCMCIA_DEVICE_MANF_CARD(0x02c5, 0x0050),
2758         PCMCIA_DEVICE_NULL
2759 };
2760 MODULE_DEVICE_TABLE(pcmcia, mgslpc_ids);
2761
2762 static struct pcmcia_driver mgslpc_driver = {
2763         .owner          = THIS_MODULE,
2764         .name           = "synclink_cs",
2765         .probe          = mgslpc_probe,
2766         .remove         = mgslpc_detach,
2767         .id_table       = mgslpc_ids,
2768         .suspend        = mgslpc_suspend,
2769         .resume         = mgslpc_resume,
2770 };
2771
2772 static const struct tty_operations mgslpc_ops = {
2773         .open = mgslpc_open,
2774         .close = mgslpc_close,
2775         .write = mgslpc_write,
2776         .put_char = mgslpc_put_char,
2777         .flush_chars = mgslpc_flush_chars,
2778         .write_room = mgslpc_write_room,
2779         .chars_in_buffer = mgslpc_chars_in_buffer,
2780         .flush_buffer = mgslpc_flush_buffer,
2781         .ioctl = mgslpc_ioctl,
2782         .throttle = mgslpc_throttle,
2783         .unthrottle = mgslpc_unthrottle,
2784         .send_xchar = mgslpc_send_xchar,
2785         .break_ctl = mgslpc_break,
2786         .wait_until_sent = mgslpc_wait_until_sent,
2787         .set_termios = mgslpc_set_termios,
2788         .stop = tx_pause,
2789         .start = tx_release,
2790         .hangup = mgslpc_hangup,
2791         .tiocmget = tiocmget,
2792         .tiocmset = tiocmset,
2793         .get_icount = mgslpc_get_icount,
2794         .proc_show = mgslpc_proc_show,
2795 };
2796
2797 static int __init synclink_cs_init(void)
2798 {
2799         int rc;
2800
2801         if (break_on_load) {
2802                 mgslpc_get_text_ptr();
2803                 BREAKPOINT();
2804         }
2805
2806         serial_driver = tty_alloc_driver(MAX_DEVICE_COUNT,
2807                         TTY_DRIVER_REAL_RAW |
2808                         TTY_DRIVER_DYNAMIC_DEV);
2809         if (IS_ERR(serial_driver)) {
2810                 rc = PTR_ERR(serial_driver);
2811                 goto err;
2812         }
2813
2814         /* Initialize the tty_driver structure */
2815         serial_driver->driver_name = "synclink_cs";
2816         serial_driver->name = "ttySLP";
2817         serial_driver->major = ttymajor;
2818         serial_driver->minor_start = 64;
2819         serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
2820         serial_driver->subtype = SERIAL_TYPE_NORMAL;
2821         serial_driver->init_termios = tty_std_termios;
2822         serial_driver->init_termios.c_cflag =
2823         B9600 | CS8 | CREAD | HUPCL | CLOCAL;
2824         tty_set_operations(serial_driver, &mgslpc_ops);
2825
2826         rc = tty_register_driver(serial_driver);
2827         if (rc < 0) {
2828                 printk(KERN_ERR "%s(%d):Couldn't register serial driver\n",
2829                                 __FILE__, __LINE__);
2830                 goto err_put_tty;
2831         }
2832
2833         rc = pcmcia_register_driver(&mgslpc_driver);
2834         if (rc < 0)
2835                 goto err_unreg_tty;
2836
2837         printk(KERN_INFO "%s %s, tty major#%d\n", driver_name, driver_version,
2838                         serial_driver->major);
2839
2840         return 0;
2841 err_unreg_tty:
2842         tty_unregister_driver(serial_driver);
2843 err_put_tty:
2844         tty_driver_kref_put(serial_driver);
2845 err:
2846         return rc;
2847 }
2848
2849 static void __exit synclink_cs_exit(void)
2850 {
2851         pcmcia_unregister_driver(&mgslpc_driver);
2852         tty_unregister_driver(serial_driver);
2853         tty_driver_kref_put(serial_driver);
2854 }
2855
2856 module_init(synclink_cs_init);
2857 module_exit(synclink_cs_exit);
2858
2859 static void mgslpc_set_rate(MGSLPC_INFO *info, unsigned char channel, unsigned int rate)
2860 {
2861         unsigned int M, N;
2862         unsigned char val;
2863
2864         /* note:standard BRG mode is broken in V3.2 chip
2865          * so enhanced mode is always used
2866          */
2867
2868         if (rate) {
2869                 N = 3686400 / rate;
2870                 if (!N)
2871                         N = 1;
2872                 N >>= 1;
2873                 for (M = 1; N > 64 && M < 16; M++)
2874                         N >>= 1;
2875                 N--;
2876
2877                 /* BGR[5..0] = N
2878                  * BGR[9..6] = M
2879                  * BGR[7..0] contained in BGR register
2880                  * BGR[9..8] contained in CCR2[7..6]
2881                  * divisor = (N+1)*2^M
2882                  *
2883                  * Note: M *must* not be zero (causes asymetric duty cycle)
2884                  */
2885                 write_reg(info, (unsigned char) (channel + BGR),
2886                                   (unsigned char) ((M << 6) + N));
2887                 val = read_reg(info, (unsigned char) (channel + CCR2)) & 0x3f;
2888                 val |= ((M << 4) & 0xc0);
2889                 write_reg(info, (unsigned char) (channel + CCR2), val);
2890         }
2891 }
2892
2893 /* Enabled the AUX clock output at the specified frequency.
2894  */
2895 static void enable_auxclk(MGSLPC_INFO *info)
2896 {
2897         unsigned char val;
2898
2899         /* MODE
2900          *
2901          * 07..06  MDS[1..0] 10 = transparent HDLC mode
2902          * 05      ADM Address Mode, 0 = no addr recognition
2903          * 04      TMD Timer Mode, 0 = external
2904          * 03      RAC Receiver Active, 0 = inactive
2905          * 02      RTS 0=RTS active during xmit, 1=RTS always active
2906          * 01      TRS Timer Resolution, 1=512
2907          * 00      TLP Test Loop, 0 = no loop
2908          *
2909          * 1000 0010
2910          */
2911         val = 0x82;
2912
2913         /* channel B RTS is used to enable AUXCLK driver on SP505 */
2914         if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
2915                 val |= BIT2;
2916         write_reg(info, CHB + MODE, val);
2917
2918         /* CCR0
2919          *
2920          * 07      PU Power Up, 1=active, 0=power down
2921          * 06      MCE Master Clock Enable, 1=enabled
2922          * 05      Reserved, 0
2923          * 04..02  SC[2..0] Encoding
2924          * 01..00  SM[1..0] Serial Mode, 00=HDLC
2925          *
2926          * 11000000
2927          */
2928         write_reg(info, CHB + CCR0, 0xc0);
2929
2930         /* CCR1
2931          *
2932          * 07      SFLG Shared Flag, 0 = disable shared flags
2933          * 06      GALP Go Active On Loop, 0 = not used
2934          * 05      GLP Go On Loop, 0 = not used
2935          * 04      ODS Output Driver Select, 1=TxD is push-pull output
2936          * 03      ITF Interframe Time Fill, 0=mark, 1=flag
2937          * 02..00  CM[2..0] Clock Mode
2938          *
2939          * 0001 0111
2940          */
2941         write_reg(info, CHB + CCR1, 0x17);
2942
2943         /* CCR2 (Channel B)
2944          *
2945          * 07..06  BGR[9..8] Baud rate bits 9..8
2946          * 05      BDF Baud rate divisor factor, 0=1, 1=BGR value
2947          * 04      SSEL Clock source select, 1=submode b
2948          * 03      TOE 0=TxCLK is input, 1=TxCLK is output
2949          * 02      RWX Read/Write Exchange 0=disabled
2950          * 01      C32, CRC select, 0=CRC-16, 1=CRC-32
2951          * 00      DIV, data inversion 0=disabled, 1=enabled
2952          *
2953          * 0011 1000
2954          */
2955         if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
2956                 write_reg(info, CHB + CCR2, 0x38);
2957         else
2958                 write_reg(info, CHB + CCR2, 0x30);
2959
2960         /* CCR4
2961          *
2962          * 07      MCK4 Master Clock Divide by 4, 1=enabled
2963          * 06      EBRG Enhanced Baud Rate Generator Mode, 1=enabled
2964          * 05      TST1 Test Pin, 0=normal operation
2965          * 04      ICD Ivert Carrier Detect, 1=enabled (active low)
2966          * 03..02  Reserved, must be 0
2967          * 01..00  RFT[1..0] RxFIFO Threshold 00=32 bytes
2968          *
2969          * 0101 0000
2970          */
2971         write_reg(info, CHB + CCR4, 0x50);
2972
2973         /* if auxclk not enabled, set internal BRG so
2974          * CTS transitions can be detected (requires TxC)
2975          */
2976         if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
2977                 mgslpc_set_rate(info, CHB, info->params.clock_speed);
2978         else
2979                 mgslpc_set_rate(info, CHB, 921600);
2980 }
2981
2982 static void loopback_enable(MGSLPC_INFO *info)
2983 {
2984         unsigned char val;
2985
2986         /* CCR1:02..00  CM[2..0] Clock Mode = 111 (clock mode 7) */
2987         val = read_reg(info, CHA + CCR1) | (BIT2 | BIT1 | BIT0);
2988         write_reg(info, CHA + CCR1, val);
2989
2990         /* CCR2:04 SSEL Clock source select, 1=submode b */
2991         val = read_reg(info, CHA + CCR2) | (BIT4 | BIT5);
2992         write_reg(info, CHA + CCR2, val);
2993
2994         /* set LinkSpeed if available, otherwise default to 2Mbps */
2995         if (info->params.clock_speed)
2996                 mgslpc_set_rate(info, CHA, info->params.clock_speed);
2997         else
2998                 mgslpc_set_rate(info, CHA, 1843200);
2999
3000         /* MODE:00 TLP Test Loop, 1=loopback enabled */
3001         val = read_reg(info, CHA + MODE) | BIT0;
3002         write_reg(info, CHA + MODE, val);
3003 }
3004
3005 static void hdlc_mode(MGSLPC_INFO *info)
3006 {
3007         unsigned char val;
3008         unsigned char clkmode, clksubmode;
3009
3010         /* disable all interrupts */
3011         irq_disable(info, CHA, 0xffff);
3012         irq_disable(info, CHB, 0xffff);
3013         port_irq_disable(info, 0xff);
3014
3015         /* assume clock mode 0a, rcv=RxC xmt=TxC */
3016         clkmode = clksubmode = 0;
3017         if (info->params.flags & HDLC_FLAG_RXC_DPLL
3018             && info->params.flags & HDLC_FLAG_TXC_DPLL) {
3019                 /* clock mode 7a, rcv = DPLL, xmt = DPLL */
3020                 clkmode = 7;
3021         } else if (info->params.flags & HDLC_FLAG_RXC_BRG
3022                  && info->params.flags & HDLC_FLAG_TXC_BRG) {
3023                 /* clock mode 7b, rcv = BRG, xmt = BRG */
3024                 clkmode = 7;
3025                 clksubmode = 1;
3026         } else if (info->params.flags & HDLC_FLAG_RXC_DPLL) {
3027                 if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3028                         /* clock mode 6b, rcv = DPLL, xmt = BRG/16 */
3029                         clkmode = 6;
3030                         clksubmode = 1;
3031                 } else {
3032                         /* clock mode 6a, rcv = DPLL, xmt = TxC */
3033                         clkmode = 6;
3034                 }
3035         } else if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3036                 /* clock mode 0b, rcv = RxC, xmt = BRG */
3037                 clksubmode = 1;
3038         }
3039
3040         /* MODE
3041          *
3042          * 07..06  MDS[1..0] 10 = transparent HDLC mode
3043          * 05      ADM Address Mode, 0 = no addr recognition
3044          * 04      TMD Timer Mode, 0 = external
3045          * 03      RAC Receiver Active, 0 = inactive
3046          * 02      RTS 0=RTS active during xmit, 1=RTS always active
3047          * 01      TRS Timer Resolution, 1=512
3048          * 00      TLP Test Loop, 0 = no loop
3049          *
3050          * 1000 0010
3051          */
3052         val = 0x82;
3053         if (info->params.loopback)
3054                 val |= BIT0;
3055
3056         /* preserve RTS state */
3057         if (info->serial_signals & SerialSignal_RTS)
3058                 val |= BIT2;
3059         write_reg(info, CHA + MODE, val);
3060
3061         /* CCR0
3062          *
3063          * 07      PU Power Up, 1=active, 0=power down
3064          * 06      MCE Master Clock Enable, 1=enabled
3065          * 05      Reserved, 0
3066          * 04..02  SC[2..0] Encoding
3067          * 01..00  SM[1..0] Serial Mode, 00=HDLC
3068          *
3069          * 11000000
3070          */
3071         val = 0xc0;
3072         switch (info->params.encoding)
3073         {
3074         case HDLC_ENCODING_NRZI:
3075                 val |= BIT3;
3076                 break;
3077         case HDLC_ENCODING_BIPHASE_SPACE:
3078                 val |= BIT4;
3079                 break;          // FM0
3080         case HDLC_ENCODING_BIPHASE_MARK:
3081                 val |= BIT4 | BIT2;
3082                 break;          // FM1
3083         case HDLC_ENCODING_BIPHASE_LEVEL:
3084                 val |= BIT4 | BIT3;
3085                 break;          // Manchester
3086         }
3087         write_reg(info, CHA + CCR0, val);
3088
3089         /* CCR1
3090          *
3091          * 07      SFLG Shared Flag, 0 = disable shared flags
3092          * 06      GALP Go Active On Loop, 0 = not used
3093          * 05      GLP Go On Loop, 0 = not used
3094          * 04      ODS Output Driver Select, 1=TxD is push-pull output
3095          * 03      ITF Interframe Time Fill, 0=mark, 1=flag
3096          * 02..00  CM[2..0] Clock Mode
3097          *
3098          * 0001 0000
3099          */
3100         val = 0x10 + clkmode;
3101         write_reg(info, CHA + CCR1, val);
3102
3103         /* CCR2
3104          *
3105          * 07..06  BGR[9..8] Baud rate bits 9..8
3106          * 05      BDF Baud rate divisor factor, 0=1, 1=BGR value
3107          * 04      SSEL Clock source select, 1=submode b
3108          * 03      TOE 0=TxCLK is input, 0=TxCLK is input
3109          * 02      RWX Read/Write Exchange 0=disabled
3110          * 01      C32, CRC select, 0=CRC-16, 1=CRC-32
3111          * 00      DIV, data inversion 0=disabled, 1=enabled
3112          *
3113          * 0000 0000
3114          */
3115         val = 0x00;
3116         if (clkmode == 2 || clkmode == 3 || clkmode == 6
3117             || clkmode == 7 || (clkmode == 0 && clksubmode == 1))
3118                 val |= BIT5;
3119         if (clksubmode)
3120                 val |= BIT4;
3121         if (info->params.crc_type == HDLC_CRC_32_CCITT)
3122                 val |= BIT1;
3123         if (info->params.encoding == HDLC_ENCODING_NRZB)
3124                 val |= BIT0;
3125         write_reg(info, CHA + CCR2, val);
3126
3127         /* CCR3
3128          *
3129          * 07..06  PRE[1..0] Preamble count 00=1, 01=2, 10=4, 11=8
3130          * 05      EPT Enable preamble transmission, 1=enabled
3131          * 04      RADD Receive address pushed to FIFO, 0=disabled
3132          * 03      CRL CRC Reset Level, 0=FFFF
3133          * 02      RCRC Rx CRC 0=On 1=Off
3134          * 01      TCRC Tx CRC 0=On 1=Off
3135          * 00      PSD DPLL Phase Shift Disable
3136          *
3137          * 0000 0000
3138          */
3139         val = 0x00;
3140         if (info->params.crc_type == HDLC_CRC_NONE)
3141                 val |= BIT2 | BIT1;
3142         if (info->params.preamble != HDLC_PREAMBLE_PATTERN_NONE)
3143                 val |= BIT5;
3144         switch (info->params.preamble_length)
3145         {
3146         case HDLC_PREAMBLE_LENGTH_16BITS:
3147                 val |= BIT6;
3148                 break;
3149         case HDLC_PREAMBLE_LENGTH_32BITS:
3150                 val |= BIT6;
3151                 break;
3152         case HDLC_PREAMBLE_LENGTH_64BITS:
3153                 val |= BIT7 | BIT6;
3154                 break;
3155         }
3156         write_reg(info, CHA + CCR3, val);
3157
3158         /* PRE - Preamble pattern */
3159         val = 0;
3160         switch (info->params.preamble)
3161         {
3162         case HDLC_PREAMBLE_PATTERN_FLAGS: val = 0x7e; break;
3163         case HDLC_PREAMBLE_PATTERN_10:    val = 0xaa; break;
3164         case HDLC_PREAMBLE_PATTERN_01:    val = 0x55; break;
3165         case HDLC_PREAMBLE_PATTERN_ONES:  val = 0xff; break;
3166         }
3167         write_reg(info, CHA + PRE, val);
3168
3169         /* CCR4
3170          *
3171          * 07      MCK4 Master Clock Divide by 4, 1=enabled
3172          * 06      EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3173          * 05      TST1 Test Pin, 0=normal operation
3174          * 04      ICD Ivert Carrier Detect, 1=enabled (active low)
3175          * 03..02  Reserved, must be 0
3176          * 01..00  RFT[1..0] RxFIFO Threshold 00=32 bytes
3177          *
3178          * 0101 0000
3179          */
3180         val = 0x50;
3181         write_reg(info, CHA + CCR4, val);
3182         if (info->params.flags & HDLC_FLAG_RXC_DPLL)
3183                 mgslpc_set_rate(info, CHA, info->params.clock_speed * 16);
3184         else
3185                 mgslpc_set_rate(info, CHA, info->params.clock_speed);
3186
3187         /* RLCR Receive length check register
3188          *
3189          * 7     1=enable receive length check
3190          * 6..0  Max frame length = (RL + 1) * 32
3191          */
3192         write_reg(info, CHA + RLCR, 0);
3193
3194         /* XBCH Transmit Byte Count High
3195          *
3196          * 07      DMA mode, 0 = interrupt driven
3197          * 06      NRM, 0=ABM (ignored)
3198          * 05      CAS Carrier Auto Start
3199          * 04      XC Transmit Continuously (ignored)
3200          * 03..00  XBC[10..8] Transmit byte count bits 10..8
3201          *
3202          * 0000 0000
3203          */
3204         val = 0x00;
3205         if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3206                 val |= BIT5;
3207         write_reg(info, CHA + XBCH, val);
3208         enable_auxclk(info);
3209         if (info->params.loopback || info->testing_irq)
3210                 loopback_enable(info);
3211         if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3212         {
3213                 irq_enable(info, CHB, IRQ_CTS);
3214                 /* PVR[3] 1=AUTO CTS active */
3215                 set_reg_bits(info, CHA + PVR, BIT3);
3216         } else
3217                 clear_reg_bits(info, CHA + PVR, BIT3);
3218
3219         irq_enable(info, CHA,
3220                          IRQ_RXEOM | IRQ_RXFIFO | IRQ_ALLSENT |
3221                          IRQ_UNDERRUN | IRQ_TXFIFO);
3222         issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3223         wait_command_complete(info, CHA);
3224         read_reg16(info, CHA + ISR);    /* clear pending IRQs */
3225
3226         /* Master clock mode enabled above to allow reset commands
3227          * to complete even if no data clocks are present.
3228          *
3229          * Disable master clock mode for normal communications because
3230          * V3.2 of the ESCC2 has a bug that prevents the transmit all sent
3231          * IRQ when in master clock mode.
3232          *
3233          * Leave master clock mode enabled for IRQ test because the
3234          * timer IRQ used by the test can only happen in master clock mode.
3235          */
3236         if (!info->testing_irq)
3237                 clear_reg_bits(info, CHA + CCR0, BIT6);
3238
3239         tx_set_idle(info);
3240
3241         tx_stop(info);
3242         rx_stop(info);
3243 }
3244
3245 static void rx_stop(MGSLPC_INFO *info)
3246 {
3247         if (debug_level >= DEBUG_LEVEL_ISR)
3248                 printk("%s(%d):rx_stop(%s)\n",
3249                          __FILE__, __LINE__, info->device_name);
3250
3251         /* MODE:03 RAC Receiver Active, 0=inactive */
3252         clear_reg_bits(info, CHA + MODE, BIT3);
3253
3254         info->rx_enabled = false;
3255         info->rx_overflow = false;
3256 }
3257
3258 static void rx_start(MGSLPC_INFO *info)
3259 {
3260         if (debug_level >= DEBUG_LEVEL_ISR)
3261                 printk("%s(%d):rx_start(%s)\n",
3262                          __FILE__, __LINE__, info->device_name);
3263
3264         rx_reset_buffers(info);
3265         info->rx_enabled = false;
3266         info->rx_overflow = false;
3267
3268         /* MODE:03 RAC Receiver Active, 1=active */
3269         set_reg_bits(info, CHA + MODE, BIT3);
3270
3271         info->rx_enabled = true;
3272 }
3273
3274 static void tx_start(MGSLPC_INFO *info, struct tty_struct *tty)
3275 {
3276         if (debug_level >= DEBUG_LEVEL_ISR)
3277                 printk("%s(%d):tx_start(%s)\n",
3278                          __FILE__, __LINE__, info->device_name);
3279
3280         if (info->tx_count) {
3281                 /* If auto RTS enabled and RTS is inactive, then assert */
3282                 /* RTS and set a flag indicating that the driver should */
3283                 /* negate RTS when the transmission completes. */
3284                 info->drop_rts_on_tx_done = false;
3285
3286                 if (info->params.flags & HDLC_FLAG_AUTO_RTS) {
3287                         get_signals(info);
3288                         if (!(info->serial_signals & SerialSignal_RTS)) {
3289                                 info->serial_signals |= SerialSignal_RTS;
3290                                 set_signals(info);
3291                                 info->drop_rts_on_tx_done = true;
3292                         }
3293                 }
3294
3295                 if (info->params.mode == MGSL_MODE_ASYNC) {
3296                         if (!info->tx_active) {
3297                                 info->tx_active = true;
3298                                 tx_ready(info, tty);
3299                         }
3300                 } else {
3301                         info->tx_active = true;
3302                         tx_ready(info, tty);
3303                         mod_timer(&info->tx_timer, jiffies +
3304                                         msecs_to_jiffies(5000));
3305                 }
3306         }
3307
3308         if (!info->tx_enabled)
3309                 info->tx_enabled = true;
3310 }
3311
3312 static void tx_stop(MGSLPC_INFO *info)
3313 {
3314         if (debug_level >= DEBUG_LEVEL_ISR)
3315                 printk("%s(%d):tx_stop(%s)\n",
3316                          __FILE__, __LINE__, info->device_name);
3317
3318         del_timer(&info->tx_timer);
3319
3320         info->tx_enabled = false;
3321         info->tx_active = false;
3322 }
3323
3324 /* Reset the adapter to a known state and prepare it for further use.
3325  */
3326 static void reset_device(MGSLPC_INFO *info)
3327 {
3328         /* power up both channels (set BIT7) */
3329         write_reg(info, CHA + CCR0, 0x80);
3330         write_reg(info, CHB + CCR0, 0x80);
3331         write_reg(info, CHA + MODE, 0);
3332         write_reg(info, CHB + MODE, 0);
3333
3334         /* disable all interrupts */
3335         irq_disable(info, CHA, 0xffff);
3336         irq_disable(info, CHB, 0xffff);
3337         port_irq_disable(info, 0xff);
3338
3339         /* PCR Port Configuration Register
3340          *
3341          * 07..04  DEC[3..0] Serial I/F select outputs
3342          * 03      output, 1=AUTO CTS control enabled
3343          * 02      RI Ring Indicator input 0=active
3344          * 01      DSR input 0=active
3345          * 00      DTR output 0=active
3346          *
3347          * 0000 0110
3348          */
3349         write_reg(info, PCR, 0x06);
3350
3351         /* PVR Port Value Register
3352          *
3353          * 07..04  DEC[3..0] Serial I/F select (0000=disabled)
3354          * 03      AUTO CTS output 1=enabled
3355          * 02      RI Ring Indicator input
3356          * 01      DSR input
3357          * 00      DTR output (1=inactive)
3358          *
3359          * 0000 0001
3360          */
3361 //      write_reg(info, PVR, PVR_DTR);
3362
3363         /* IPC Interrupt Port Configuration
3364          *
3365          * 07      VIS 1=Masked interrupts visible
3366          * 06..05  Reserved, 0
3367          * 04..03  SLA Slave address, 00 ignored
3368          * 02      CASM Cascading Mode, 1=daisy chain
3369          * 01..00  IC[1..0] Interrupt Config, 01=push-pull output, active low
3370          *
3371          * 0000 0101
3372          */
3373         write_reg(info, IPC, 0x05);
3374 }
3375
3376 static void async_mode(MGSLPC_INFO *info)
3377 {
3378         unsigned char val;
3379
3380         /* disable all interrupts */
3381         irq_disable(info, CHA, 0xffff);
3382         irq_disable(info, CHB, 0xffff);
3383         port_irq_disable(info, 0xff);
3384
3385         /* MODE
3386          *
3387          * 07      Reserved, 0
3388          * 06      FRTS RTS State, 0=active
3389          * 05      FCTS Flow Control on CTS
3390          * 04      FLON Flow Control Enable
3391          * 03      RAC Receiver Active, 0 = inactive
3392          * 02      RTS 0=Auto RTS, 1=manual RTS
3393          * 01      TRS Timer Resolution, 1=512
3394          * 00      TLP Test Loop, 0 = no loop
3395          *
3396          * 0000 0110
3397          */
3398         val = 0x06;
3399         if (info->params.loopback)
3400                 val |= BIT0;
3401
3402         /* preserve RTS state */
3403         if (!(info->serial_signals & SerialSignal_RTS))
3404                 val |= BIT6;
3405         write_reg(info, CHA + MODE, val);
3406
3407         /* CCR0
3408          *
3409          * 07      PU Power Up, 1=active, 0=power down
3410          * 06      MCE Master Clock Enable, 1=enabled
3411          * 05      Reserved, 0
3412          * 04..02  SC[2..0] Encoding, 000=NRZ
3413          * 01..00  SM[1..0] Serial Mode, 11=Async
3414          *
3415          * 1000 0011
3416          */
3417         write_reg(info, CHA + CCR0, 0x83);
3418
3419         /* CCR1
3420          *
3421          * 07..05  Reserved, 0
3422          * 04      ODS Output Driver Select, 1=TxD is push-pull output
3423          * 03      BCR Bit Clock Rate, 1=16x
3424          * 02..00  CM[2..0] Clock Mode, 111=BRG
3425          *
3426          * 0001 1111
3427          */
3428         write_reg(info, CHA + CCR1, 0x1f);
3429
3430         /* CCR2 (channel A)
3431          *
3432          * 07..06  BGR[9..8] Baud rate bits 9..8
3433          * 05      BDF Baud rate divisor factor, 0=1, 1=BGR value
3434          * 04      SSEL Clock source select, 1=submode b
3435          * 03      TOE 0=TxCLK is input, 0=TxCLK is input
3436          * 02      RWX Read/Write Exchange 0=disabled
3437          * 01      Reserved, 0
3438          * 00      DIV, data inversion 0=disabled, 1=enabled
3439          *
3440          * 0001 0000
3441          */
3442         write_reg(info, CHA + CCR2, 0x10);
3443
3444         /* CCR3
3445          *
3446          * 07..01  Reserved, 0
3447          * 00      PSD DPLL Phase Shift Disable
3448          *
3449          * 0000 0000
3450          */
3451         write_reg(info, CHA + CCR3, 0);
3452
3453         /* CCR4
3454          *
3455          * 07      MCK4 Master Clock Divide by 4, 1=enabled
3456          * 06      EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3457          * 05      TST1 Test Pin, 0=normal operation
3458          * 04      ICD Ivert Carrier Detect, 1=enabled (active low)
3459          * 03..00  Reserved, must be 0
3460          *
3461          * 0101 0000
3462          */
3463         write_reg(info, CHA + CCR4, 0x50);
3464         mgslpc_set_rate(info, CHA, info->params.data_rate * 16);
3465
3466         /* DAFO Data Format
3467          *
3468          * 07      Reserved, 0
3469          * 06      XBRK transmit break, 0=normal operation
3470          * 05      Stop bits (0=1, 1=2)
3471          * 04..03  PAR[1..0] Parity (01=odd, 10=even)
3472          * 02      PAREN Parity Enable
3473          * 01..00  CHL[1..0] Character Length (00=8, 01=7)
3474          *
3475          */
3476         val = 0x00;
3477         if (info->params.data_bits != 8)
3478                 val |= BIT0;    /* 7 bits */
3479         if (info->params.stop_bits != 1)
3480                 val |= BIT5;
3481         if (info->params.parity != ASYNC_PARITY_NONE)
3482         {
3483                 val |= BIT2;    /* Parity enable */
3484                 if (info->params.parity == ASYNC_PARITY_ODD)
3485                         val |= BIT3;
3486                 else
3487                         val |= BIT4;
3488         }
3489         write_reg(info, CHA + DAFO, val);
3490
3491         /* RFC Rx FIFO Control
3492          *
3493          * 07      Reserved, 0
3494          * 06      DPS, 1=parity bit not stored in data byte
3495          * 05      DXS, 0=all data stored in FIFO (including XON/XOFF)
3496          * 04      RFDF Rx FIFO Data Format, 1=status byte stored in FIFO
3497          * 03..02  RFTH[1..0], rx threshold, 11=16 status + 16 data byte
3498          * 01      Reserved, 0
3499          * 00      TCDE Terminate Char Detect Enable, 0=disabled
3500          *
3501          * 0101 1100
3502          */
3503         write_reg(info, CHA + RFC, 0x5c);
3504
3505         /* RLCR Receive length check register
3506          *
3507          * Max frame length = (RL + 1) * 32
3508          */
3509         write_reg(info, CHA + RLCR, 0);
3510
3511         /* XBCH Transmit Byte Count High
3512          *
3513          * 07      DMA mode, 0 = interrupt driven
3514          * 06      NRM, 0=ABM (ignored)
3515          * 05      CAS Carrier Auto Start
3516          * 04      XC Transmit Continuously (ignored)
3517          * 03..00  XBC[10..8] Transmit byte count bits 10..8
3518          *
3519          * 0000 0000
3520          */
3521         val = 0x00;
3522         if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3523                 val |= BIT5;
3524         write_reg(info, CHA + XBCH, val);
3525         if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3526                 irq_enable(info, CHA, IRQ_CTS);
3527
3528         /* MODE:03 RAC Receiver Active, 1=active */
3529         set_reg_bits(info, CHA + MODE, BIT3);
3530         enable_auxclk(info);
3531         if (info->params.flags & HDLC_FLAG_AUTO_CTS) {
3532                 irq_enable(info, CHB, IRQ_CTS);
3533                 /* PVR[3] 1=AUTO CTS active */
3534                 set_reg_bits(info, CHA + PVR, BIT3);
3535         } else
3536                 clear_reg_bits(info, CHA + PVR, BIT3);
3537         irq_enable(info, CHA,
3538                           IRQ_RXEOM | IRQ_RXFIFO | IRQ_BREAK_ON | IRQ_RXTIME |
3539                           IRQ_ALLSENT | IRQ_TXFIFO);
3540         issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3541         wait_command_complete(info, CHA);
3542         read_reg16(info, CHA + ISR);    /* clear pending IRQs */
3543 }
3544
3545 /* Set the HDLC idle mode for the transmitter.
3546  */
3547 static void tx_set_idle(MGSLPC_INFO *info)
3548 {
3549         /* Note: ESCC2 only supports flags and one idle modes */
3550         if (info->idle_mode == HDLC_TXIDLE_FLAGS)
3551                 set_reg_bits(info, CHA + CCR1, BIT3);
3552         else
3553                 clear_reg_bits(info, CHA + CCR1, BIT3);
3554 }
3555
3556 /* get state of the V24 status (input) signals.
3557  */
3558 static void get_signals(MGSLPC_INFO *info)
3559 {
3560         unsigned char status = 0;
3561
3562         /* preserve RTS and DTR */
3563         info->serial_signals &= SerialSignal_RTS | SerialSignal_DTR;
3564
3565         if (read_reg(info, CHB + VSTR) & BIT7)
3566                 info->serial_signals |= SerialSignal_DCD;
3567         if (read_reg(info, CHB + STAR) & BIT1)
3568                 info->serial_signals |= SerialSignal_CTS;
3569
3570         status = read_reg(info, CHA + PVR);
3571         if (!(status & PVR_RI))
3572                 info->serial_signals |= SerialSignal_RI;
3573         if (!(status & PVR_DSR))
3574                 info->serial_signals |= SerialSignal_DSR;
3575 }
3576
3577 /* Set the state of RTS and DTR based on contents of
3578  * serial_signals member of device extension.
3579  */
3580 static void set_signals(MGSLPC_INFO *info)
3581 {
3582         unsigned char val;
3583
3584         val = read_reg(info, CHA + MODE);
3585         if (info->params.mode == MGSL_MODE_ASYNC) {
3586                 if (info->serial_signals & SerialSignal_RTS)
3587                         val &= ~BIT6;
3588                 else
3589                         val |= BIT6;
3590         } else {
3591                 if (info->serial_signals & SerialSignal_RTS)
3592                         val |= BIT2;
3593                 else
3594                         val &= ~BIT2;
3595         }
3596         write_reg(info, CHA + MODE, val);
3597
3598         if (info->serial_signals & SerialSignal_DTR)
3599                 clear_reg_bits(info, CHA + PVR, PVR_DTR);
3600         else
3601                 set_reg_bits(info, CHA + PVR, PVR_DTR);
3602 }
3603
3604 static void rx_reset_buffers(MGSLPC_INFO *info)
3605 {
3606         RXBUF *buf;
3607         int i;
3608
3609         info->rx_put = 0;
3610         info->rx_get = 0;
3611         info->rx_frame_count = 0;
3612         for (i=0 ; i < info->rx_buf_count ; i++) {
3613                 buf = (RXBUF*)(info->rx_buf + (i * info->rx_buf_size));
3614                 buf->status = buf->count = 0;
3615         }
3616 }
3617
3618 /* Attempt to return a received HDLC frame
3619  * Only frames received without errors are returned.
3620  *
3621  * Returns true if frame returned, otherwise false
3622  */
3623 static bool rx_get_frame(MGSLPC_INFO *info, struct tty_struct *tty)
3624 {
3625         unsigned short status;
3626         RXBUF *buf;
3627         unsigned int framesize = 0;
3628         unsigned long flags;
3629         bool return_frame = false;
3630
3631         if (info->rx_frame_count == 0)
3632                 return false;
3633
3634         buf = (RXBUF*)(info->rx_buf + (info->rx_get * info->rx_buf_size));
3635
3636         status = buf->status;
3637
3638         /* 07  VFR  1=valid frame
3639          * 06  RDO  1=data overrun
3640          * 05  CRC  1=OK, 0=error
3641          * 04  RAB  1=frame aborted
3642          */
3643         if ((status & 0xf0) != 0xA0) {
3644                 if (!(status & BIT7) || (status & BIT4))
3645                         info->icount.rxabort++;
3646                 else if (status & BIT6)
3647                         info->icount.rxover++;
3648                 else if (!(status & BIT5)) {
3649                         info->icount.rxcrc++;
3650                         if (info->params.crc_type & HDLC_CRC_RETURN_EX)
3651                                 return_frame = true;
3652                 }
3653                 framesize = 0;
3654 #if SYNCLINK_GENERIC_HDLC
3655                 {
3656                         info->netdev->stats.rx_errors++;
3657                         info->netdev->stats.rx_frame_errors++;
3658                 }
3659 #endif
3660         } else
3661                 return_frame = true;
3662
3663         if (return_frame)
3664                 framesize = buf->count;
3665
3666         if (debug_level >= DEBUG_LEVEL_BH)
3667                 printk("%s(%d):rx_get_frame(%s) status=%04X size=%d\n",
3668                         __FILE__, __LINE__, info->device_name, status, framesize);
3669
3670         if (debug_level >= DEBUG_LEVEL_DATA)
3671                 trace_block(info, buf->data, framesize, 0);
3672
3673         if (framesize) {
3674                 if ((info->params.crc_type & HDLC_CRC_RETURN_EX &&
3675                       framesize+1 > info->max_frame_size) ||
3676                     framesize > info->max_frame_size)
3677                         info->icount.rxlong++;
3678                 else {
3679                         if (status & BIT5)
3680                                 info->icount.rxok++;
3681
3682                         if (info->params.crc_type & HDLC_CRC_RETURN_EX) {
3683                                 *(buf->data + framesize) = status & BIT5 ? RX_OK:RX_CRC_ERROR;
3684                                 ++framesize;
3685                         }
3686
3687 #if SYNCLINK_GENERIC_HDLC
3688                         if (info->netcount)
3689                                 hdlcdev_rx(info, buf->data, framesize);
3690                         else
3691 #endif
3692                                 ldisc_receive_buf(tty, buf->data, info->flag_buf, framesize);
3693                 }
3694         }
3695
3696         spin_lock_irqsave(&info->lock, flags);
3697         buf->status = buf->count = 0;
3698         info->rx_frame_count--;
3699         info->rx_get++;
3700         if (info->rx_get >= info->rx_buf_count)
3701                 info->rx_get = 0;
3702         spin_unlock_irqrestore(&info->lock, flags);
3703
3704         return true;
3705 }
3706
3707 static bool register_test(MGSLPC_INFO *info)
3708 {
3709         static unsigned char patterns[] =
3710             { 0x00, 0xff, 0xaa, 0x55, 0x69, 0x96, 0x0f };
3711         static unsigned int count = ARRAY_SIZE(patterns);
3712         unsigned int i;
3713         bool rc = true;
3714         unsigned long flags;
3715
3716         spin_lock_irqsave(&info->lock, flags);
3717         reset_device(info);
3718
3719         for (i = 0; i < count; i++) {
3720                 write_reg(info, XAD1, patterns[i]);
3721                 write_reg(info, XAD2, patterns[(i + 1) % count]);
3722                 if ((read_reg(info, XAD1) != patterns[i]) ||
3723                     (read_reg(info, XAD2) != patterns[(i + 1) % count])) {
3724                         rc = false;
3725                         break;
3726                 }
3727         }
3728
3729         spin_unlock_irqrestore(&info->lock, flags);
3730         return rc;
3731 }
3732
3733 static bool irq_test(MGSLPC_INFO *info)
3734 {
3735         unsigned long end_time;
3736         unsigned long flags;
3737
3738         spin_lock_irqsave(&info->lock, flags);
3739         reset_device(info);
3740
3741         info->testing_irq = true;
3742         hdlc_mode(info);
3743
3744         info->irq_occurred = false;
3745
3746         /* init hdlc mode */
3747
3748         irq_enable(info, CHA, IRQ_TIMER);
3749         write_reg(info, CHA + TIMR, 0); /* 512 cycles */
3750         issue_command(info, CHA, CMD_START_TIMER);
3751
3752         spin_unlock_irqrestore(&info->lock, flags);
3753
3754         end_time=100;
3755         while(end_time-- && !info->irq_occurred) {
3756                 msleep_interruptible(10);
3757         }
3758
3759         info->testing_irq = false;
3760
3761         spin_lock_irqsave(&info->lock, flags);
3762         reset_device(info);
3763         spin_unlock_irqrestore(&info->lock, flags);
3764
3765         return info->irq_occurred;
3766 }
3767
3768 static int adapter_test(MGSLPC_INFO *info)
3769 {
3770         if (!register_test(info)) {
3771                 info->init_error = DiagStatus_AddressFailure;
3772                 printk("%s(%d):Register test failure for device %s Addr=%04X\n",
3773                         __FILE__, __LINE__, info->device_name, (unsigned short)(info->io_base));
3774                 return -ENODEV;
3775         }
3776
3777         if (!irq_test(info)) {
3778                 info->init_error = DiagStatus_IrqFailure;
3779                 printk("%s(%d):Interrupt test failure for device %s IRQ=%d\n",
3780                         __FILE__, __LINE__, info->device_name, (unsigned short)(info->irq_level));
3781                 return -ENODEV;
3782         }
3783
3784         if (debug_level >= DEBUG_LEVEL_INFO)
3785                 printk("%s(%d):device %s passed diagnostics\n",
3786                         __FILE__, __LINE__, info->device_name);
3787         return 0;
3788 }
3789
3790 static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit)
3791 {
3792         int i;
3793         int linecount;
3794         if (xmit)
3795                 printk("%s tx data:\n", info->device_name);
3796         else
3797                 printk("%s rx data:\n", info->device_name);
3798
3799         while(count) {
3800                 if (count > 16)
3801                         linecount = 16;
3802                 else
3803                         linecount = count;
3804
3805                 for(i=0;i<linecount;i++)
3806                         printk("%02X ", (unsigned char)data[i]);
3807                 for(;i<17;i++)
3808                         printk("   ");
3809                 for(i=0;i<linecount;i++) {
3810                         if (data[i]>=040 && data[i]<=0176)
3811                                 printk("%c", data[i]);
3812                         else
3813                                 printk(".");
3814                 }
3815                 printk("\n");
3816
3817                 data  += linecount;
3818                 count -= linecount;
3819         }
3820 }
3821
3822 /* HDLC frame time out
3823  * update stats and do tx completion processing
3824  */
3825 static void tx_timeout(struct timer_list *t)
3826 {
3827         MGSLPC_INFO *info = from_timer(info, t, tx_timer);
3828         unsigned long flags;
3829
3830         if (debug_level >= DEBUG_LEVEL_INFO)
3831                 printk("%s(%d):tx_timeout(%s)\n",
3832                         __FILE__, __LINE__, info->device_name);
3833         if (info->tx_active &&
3834             info->params.mode == MGSL_MODE_HDLC) {
3835                 info->icount.txtimeout++;
3836         }
3837         spin_lock_irqsave(&info->lock, flags);
3838         info->tx_active = false;
3839         info->tx_count = info->tx_put = info->tx_get = 0;
3840
3841         spin_unlock_irqrestore(&info->lock, flags);
3842
3843 #if SYNCLINK_GENERIC_HDLC
3844         if (info->netcount)
3845                 hdlcdev_tx_done(info);
3846         else
3847 #endif
3848         {
3849                 struct tty_struct *tty = tty_port_tty_get(&info->port);
3850                 bh_transmit(info, tty);
3851                 tty_kref_put(tty);
3852         }
3853 }
3854
3855 #if SYNCLINK_GENERIC_HDLC
3856
3857 /**
3858  * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
3859  * set encoding and frame check sequence (FCS) options
3860  *
3861  * dev       pointer to network device structure
3862  * encoding  serial encoding setting
3863  * parity    FCS setting
3864  *
3865  * returns 0 if success, otherwise error code
3866  */
3867 static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
3868                           unsigned short parity)
3869 {
3870         MGSLPC_INFO *info = dev_to_port(dev);
3871         struct tty_struct *tty;
3872         unsigned char  new_encoding;
3873         unsigned short new_crctype;
3874
3875         /* return error if TTY interface open */
3876         if (info->port.count)
3877                 return -EBUSY;
3878
3879         switch (encoding)
3880         {
3881         case ENCODING_NRZ:        new_encoding = HDLC_ENCODING_NRZ; break;
3882         case ENCODING_NRZI:       new_encoding = HDLC_ENCODING_NRZI_SPACE; break;
3883         case ENCODING_FM_MARK:    new_encoding = HDLC_ENCODING_BIPHASE_MARK; break;
3884         case ENCODING_FM_SPACE:   new_encoding = HDLC_ENCODING_BIPHASE_SPACE; break;
3885         case ENCODING_MANCHESTER: new_encoding = HDLC_ENCODING_BIPHASE_LEVEL; break;
3886         default: return -EINVAL;
3887         }
3888
3889         switch (parity)
3890         {
3891         case PARITY_NONE:            new_crctype = HDLC_CRC_NONE; break;
3892         case PARITY_CRC16_PR1_CCITT: new_crctype = HDLC_CRC_16_CCITT; break;
3893         case PARITY_CRC32_PR1_CCITT: new_crctype = HDLC_CRC_32_CCITT; break;
3894         default: return -EINVAL;
3895         }
3896
3897         info->params.encoding = new_encoding;
3898         info->params.crc_type = new_crctype;
3899
3900         /* if network interface up, reprogram hardware */
3901         if (info->netcount) {
3902                 tty = tty_port_tty_get(&info->port);
3903                 mgslpc_program_hw(info, tty);
3904                 tty_kref_put(tty);
3905         }
3906
3907         return 0;
3908 }
3909
3910 /**
3911  * called by generic HDLC layer to send frame
3912  *
3913  * skb  socket buffer containing HDLC frame
3914  * dev  pointer to network device structure
3915  */
3916 static netdev_tx_t hdlcdev_xmit(struct sk_buff *skb,
3917                                       struct net_device *dev)
3918 {
3919         MGSLPC_INFO *info = dev_to_port(dev);
3920         unsigned long flags;
3921
3922         if (debug_level >= DEBUG_LEVEL_INFO)
3923                 printk(KERN_INFO "%s:hdlc_xmit(%s)\n", __FILE__, dev->name);
3924
3925         /* stop sending until this frame completes */
3926         netif_stop_queue(dev);
3927
3928         /* copy data to device buffers */
3929         skb_copy_from_linear_data(skb, info->tx_buf, skb->len);
3930         info->tx_get = 0;
3931         info->tx_put = info->tx_count = skb->len;
3932
3933         /* update network statistics */
3934         dev->stats.tx_packets++;
3935         dev->stats.tx_bytes += skb->len;
3936
3937         /* done with socket buffer, so free it */
3938         dev_kfree_skb(skb);
3939
3940         /* save start time for transmit timeout detection */
3941         netif_trans_update(dev);
3942
3943         /* start hardware transmitter if necessary */
3944         spin_lock_irqsave(&info->lock, flags);
3945         if (!info->tx_active) {
3946                 struct tty_struct *tty = tty_port_tty_get(&info->port);
3947                 tx_start(info, tty);
3948                 tty_kref_put(tty);
3949         }
3950         spin_unlock_irqrestore(&info->lock, flags);
3951
3952         return NETDEV_TX_OK;
3953 }
3954
3955 /**
3956  * called by network layer when interface enabled
3957  * claim resources and initialize hardware
3958  *
3959  * dev  pointer to network device structure
3960  *
3961  * returns 0 if success, otherwise error code
3962  */
3963 static int hdlcdev_open(struct net_device *dev)
3964 {
3965         MGSLPC_INFO *info = dev_to_port(dev);
3966         struct tty_struct *tty;
3967         int rc;
3968         unsigned long flags;
3969
3970         if (debug_level >= DEBUG_LEVEL_INFO)
3971                 printk("%s:hdlcdev_open(%s)\n", __FILE__, dev->name);
3972
3973         /* generic HDLC layer open processing */
3974         rc = hdlc_open(dev);
3975         if (rc != 0)
3976                 return rc;
3977
3978         /* arbitrate between network and tty opens */
3979         spin_lock_irqsave(&info->netlock, flags);
3980         if (info->port.count != 0 || info->netcount != 0) {
3981                 printk(KERN_WARNING "%s: hdlc_open returning busy\n", dev->name);
3982                 spin_unlock_irqrestore(&info->netlock, flags);
3983                 return -EBUSY;
3984         }
3985         info->netcount=1;
3986         spin_unlock_irqrestore(&info->netlock, flags);
3987
3988         tty = tty_port_tty_get(&info->port);
3989         /* claim resources and init adapter */
3990         rc = startup(info, tty);
3991         if (rc != 0) {
3992                 tty_kref_put(tty);
3993                 spin_lock_irqsave(&info->netlock, flags);
3994                 info->netcount=0;
3995                 spin_unlock_irqrestore(&info->netlock, flags);
3996                 return rc;
3997         }
3998         /* assert RTS and DTR, apply hardware settings */
3999         info->serial_signals |= SerialSignal_RTS | SerialSignal_DTR;
4000         mgslpc_program_hw(info, tty);
4001         tty_kref_put(tty);
4002
4003         /* enable network layer transmit */
4004         netif_trans_update(dev);
4005         netif_start_queue(dev);
4006
4007         /* inform generic HDLC layer of current DCD status */
4008         spin_lock_irqsave(&info->lock, flags);
4009         get_signals(info);
4010         spin_unlock_irqrestore(&info->lock, flags);
4011         if (info->serial_signals & SerialSignal_DCD)
4012                 netif_carrier_on(dev);
4013         else
4014                 netif_carrier_off(dev);
4015         return 0;
4016 }
4017
4018 /**
4019  * called by network layer when interface is disabled
4020  * shutdown hardware and release resources
4021  *
4022  * dev  pointer to network device structure
4023  *
4024  * returns 0 if success, otherwise error code
4025  */
4026 static int hdlcdev_close(struct net_device *dev)
4027 {
4028         MGSLPC_INFO *info = dev_to_port(dev);
4029         struct tty_struct *tty = tty_port_tty_get(&info->port);
4030         unsigned long flags;
4031
4032         if (debug_level >= DEBUG_LEVEL_INFO)
4033                 printk("%s:hdlcdev_close(%s)\n", __FILE__, dev->name);
4034
4035         netif_stop_queue(dev);
4036
4037         /* shutdown adapter and release resources */
4038         shutdown(info, tty);
4039         tty_kref_put(tty);
4040         hdlc_close(dev);
4041
4042         spin_lock_irqsave(&info->netlock, flags);
4043         info->netcount=0;
4044         spin_unlock_irqrestore(&info->netlock, flags);
4045
4046         return 0;
4047 }
4048
4049 /**
4050  * called by network layer to process IOCTL call to network device
4051  *
4052  * dev  pointer to network device structure
4053  * ifs  pointer to network interface settings structure
4054  *
4055  * returns 0 if success, otherwise error code
4056  */
4057 static int hdlcdev_wan_ioctl(struct net_device *dev, struct if_settings *ifs)
4058 {
4059         const size_t size = sizeof(sync_serial_settings);
4060         sync_serial_settings new_line;
4061         sync_serial_settings __user *line = ifs->ifs_ifsu.sync;
4062         MGSLPC_INFO *info = dev_to_port(dev);
4063         unsigned int flags;
4064
4065         if (debug_level >= DEBUG_LEVEL_INFO)
4066                 printk("%s:hdlcdev_ioctl(%s)\n", __FILE__, dev->name);
4067
4068         /* return error if TTY interface open */
4069         if (info->port.count)
4070                 return -EBUSY;
4071
4072         memset(&new_line, 0, size);
4073
4074         switch (ifs->type) {
4075         case IF_GET_IFACE: /* return current sync_serial_settings */
4076
4077                 ifs->type = IF_IFACE_SYNC_SERIAL;
4078                 if (ifs->size < size) {
4079                         ifs->size = size; /* data size wanted */
4080                         return -ENOBUFS;
4081                 }
4082
4083                 flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4084                                               HDLC_FLAG_RXC_BRG    | HDLC_FLAG_RXC_TXCPIN |
4085                                               HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4086                                               HDLC_FLAG_TXC_BRG    | HDLC_FLAG_TXC_RXCPIN);
4087
4088                 switch (flags){
4089                 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break;
4090                 case (HDLC_FLAG_RXC_BRG    | HDLC_FLAG_TXC_BRG):    new_line.clock_type = CLOCK_INT; break;
4091                 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG):    new_line.clock_type = CLOCK_TXINT; break;
4092                 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break;
4093                 default: new_line.clock_type = CLOCK_DEFAULT;
4094                 }
4095
4096                 new_line.clock_rate = info->params.clock_speed;
4097                 new_line.loopback   = info->params.loopback ? 1:0;
4098
4099                 if (copy_to_user(line, &new_line, size))
4100                         return -EFAULT;
4101                 return 0;
4102
4103         case IF_IFACE_SYNC_SERIAL: /* set sync_serial_settings */
4104
4105                 if(!capable(CAP_NET_ADMIN))
4106                         return -EPERM;
4107                 if (copy_from_user(&new_line, line, size))
4108                         return -EFAULT;
4109
4110                 switch (new_line.clock_type)
4111                 {
4112                 case CLOCK_EXT:      flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN; break;
4113                 case CLOCK_TXFROMRX: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN; break;
4114                 case CLOCK_INT:      flags = HDLC_FLAG_RXC_BRG    | HDLC_FLAG_TXC_BRG;    break;
4115                 case CLOCK_TXINT:    flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG;    break;
4116                 case CLOCK_DEFAULT:  flags = info->params.flags &
4117                                              (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4118                                               HDLC_FLAG_RXC_BRG    | HDLC_FLAG_RXC_TXCPIN |
4119                                               HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4120                                               HDLC_FLAG_TXC_BRG    | HDLC_FLAG_TXC_RXCPIN); break;
4121                 default: return -EINVAL;
4122                 }
4123
4124                 if (new_line.loopback != 0 && new_line.loopback != 1)
4125                         return -EINVAL;
4126
4127                 info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4128                                         HDLC_FLAG_RXC_BRG    | HDLC_FLAG_RXC_TXCPIN |
4129                                         HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4130                                         HDLC_FLAG_TXC_BRG    | HDLC_FLAG_TXC_RXCPIN);
4131                 info->params.flags |= flags;
4132
4133                 info->params.loopback = new_line.loopback;
4134
4135                 if (flags & (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG))
4136                         info->params.clock_speed = new_line.clock_rate;
4137                 else
4138                         info->params.clock_speed = 0;
4139
4140                 /* if network interface up, reprogram hardware */
4141                 if (info->netcount) {
4142                         struct tty_struct *tty = tty_port_tty_get(&info->port);
4143                         mgslpc_program_hw(info, tty);
4144                         tty_kref_put(tty);
4145                 }
4146                 return 0;
4147         default:
4148                 return hdlc_ioctl(dev, ifs);
4149         }
4150 }
4151
4152 /**
4153  * called by network layer when transmit timeout is detected
4154  *
4155  * dev  pointer to network device structure
4156  */
4157 static void hdlcdev_tx_timeout(struct net_device *dev, unsigned int txqueue)
4158 {
4159         MGSLPC_INFO *info = dev_to_port(dev);
4160         unsigned long flags;
4161
4162         if (debug_level >= DEBUG_LEVEL_INFO)
4163                 printk("hdlcdev_tx_timeout(%s)\n", dev->name);
4164
4165         dev->stats.tx_errors++;
4166         dev->stats.tx_aborted_errors++;
4167
4168         spin_lock_irqsave(&info->lock, flags);
4169         tx_stop(info);
4170         spin_unlock_irqrestore(&info->lock, flags);
4171
4172         netif_wake_queue(dev);
4173 }
4174
4175 /**
4176  * called by device driver when transmit completes
4177  * reenable network layer transmit if stopped
4178  *
4179  * info  pointer to device instance information
4180  */
4181 static void hdlcdev_tx_done(MGSLPC_INFO *info)
4182 {
4183         if (netif_queue_stopped(info->netdev))
4184                 netif_wake_queue(info->netdev);
4185 }
4186
4187 /**
4188  * called by device driver when frame received
4189  * pass frame to network layer
4190  *
4191  * info  pointer to device instance information
4192  * buf   pointer to buffer contianing frame data
4193  * size  count of data bytes in buf
4194  */
4195 static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size)
4196 {
4197         struct sk_buff *skb = dev_alloc_skb(size);
4198         struct net_device *dev = info->netdev;
4199
4200         if (debug_level >= DEBUG_LEVEL_INFO)
4201                 printk("hdlcdev_rx(%s)\n", dev->name);
4202
4203         if (skb == NULL) {
4204                 printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n", dev->name);
4205                 dev->stats.rx_dropped++;
4206                 return;
4207         }
4208
4209         skb_put_data(skb, buf, size);
4210
4211         skb->protocol = hdlc_type_trans(skb, dev);
4212
4213         dev->stats.rx_packets++;
4214         dev->stats.rx_bytes += size;
4215
4216         netif_rx(skb);
4217 }
4218
4219 static const struct net_device_ops hdlcdev_ops = {
4220         .ndo_open       = hdlcdev_open,
4221         .ndo_stop       = hdlcdev_close,
4222         .ndo_start_xmit = hdlc_start_xmit,
4223         .ndo_siocwandev = hdlcdev_wan_ioctl,
4224         .ndo_tx_timeout = hdlcdev_tx_timeout,
4225 };
4226
4227 /**
4228  * called by device driver when adding device instance
4229  * do generic HDLC initialization
4230  *
4231  * info  pointer to device instance information
4232  *
4233  * returns 0 if success, otherwise error code
4234  */
4235 static int hdlcdev_init(MGSLPC_INFO *info)
4236 {
4237         int rc;
4238         struct net_device *dev;
4239         hdlc_device *hdlc;
4240
4241         /* allocate and initialize network and HDLC layer objects */
4242
4243         dev = alloc_hdlcdev(info);
4244         if (dev == NULL) {
4245                 printk(KERN_ERR "%s:hdlc device allocation failure\n", __FILE__);
4246                 return -ENOMEM;
4247         }
4248
4249         /* for network layer reporting purposes only */
4250         dev->base_addr = info->io_base;
4251         dev->irq       = info->irq_level;
4252
4253         /* network layer callbacks and settings */
4254         dev->netdev_ops     = &hdlcdev_ops;
4255         dev->watchdog_timeo = 10 * HZ;
4256         dev->tx_queue_len   = 50;
4257
4258         /* generic HDLC layer callbacks and settings */
4259         hdlc         = dev_to_hdlc(dev);
4260         hdlc->attach = hdlcdev_attach;
4261         hdlc->xmit   = hdlcdev_xmit;
4262
4263         /* register objects with HDLC layer */
4264         rc = register_hdlc_device(dev);
4265         if (rc) {
4266                 printk(KERN_WARNING "%s:unable to register hdlc device\n", __FILE__);
4267                 free_netdev(dev);
4268                 return rc;
4269         }
4270
4271         info->netdev = dev;
4272         return 0;
4273 }
4274
4275 /**
4276  * called by device driver when removing device instance
4277  * do generic HDLC cleanup
4278  *
4279  * info  pointer to device instance information
4280  */
4281 static void hdlcdev_exit(MGSLPC_INFO *info)
4282 {
4283         unregister_hdlc_device(info->netdev);
4284         free_netdev(info->netdev);
4285         info->netdev = NULL;
4286 }
4287
4288 #endif /* CONFIG_HDLC */
4289