drivers/bus/sunxi-rsb.c

   1 /*
   2  * RSB (Reduced Serial Bus) driver.
   3  *
   4  * Author: Chen-Yu Tsai <wens@csie.org>
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  *
  10  * The RSB controller looks like an SMBus controller which only supports
  11  * byte and word data transfers. But, it differs from standard SMBus
  12  * protocol on several aspects:
  13  * - it uses addresses set at runtime to address slaves. Runtime addresses
  14  *   are sent to slaves using their 12bit hardware addresses. Up to 15
  15  *   runtime addresses are available.
  16  * - it adds a parity bit every 8bits of data and address for read and
  17  *   write accesses; this replaces the ack bit
  18  * - only one read access is required to read a byte (instead of a write
  19  *   followed by a read access in standard SMBus protocol)
  20  * - there's no Ack bit after each read access
  21  *
  22  * This means this bus cannot be used to interface with standard SMBus
  23  * devices. Devices known to support this interface include the AXP223,
  24  * AXP809, and AXP806 PMICs, and the AC100 audio codec, all from X-Powers.
  25  *
  26  * A description of the operation and wire protocol can be found in the
  27  * RSB section of Allwinner's A80 user manual, which can be found at
  28  *
  29  *     https://github.com/allwinner-zh/documents/tree/master/A80
  30  *
  31  * This document is officially released by Allwinner.
  32  *
  33  * This driver is based on i2c-sun6i-p2wi.c, the P2WI bus driver.
  34  *
  35  */
  36
  37 #include <linux/clk.h>
  38 #include <linux/clk/clk-conf.h>
  39 #include <linux/device.h>
  40 #include <linux/interrupt.h>
  41 #include <linux/io.h>
  42 #include <linux/iopoll.h>
  43 #include <linux/module.h>
  44 #include <linux/of.h>
  45 #include <linux/of_irq.h>
  46 #include <linux/of_platform.h>
  47 #include <linux/platform_device.h>
  48 #include <linux/pm.h>
  49 #include <linux/pm_runtime.h>
  50 #include <linux/regmap.h>
  51 #include <linux/reset.h>
  52 #include <linux/slab.h>
  53 #include <linux/sunxi-rsb.h>
  54 #include <linux/types.h>
  55
  56 /* RSB registers */
  57 #define RSB_CTRL        0x0     /* Global control */
  58 #define RSB_CCR         0x4     /* Clock control */
  59 #define RSB_INTE        0x8     /* Interrupt controls */
  60 #define RSB_INTS        0xc     /* Interrupt status */
  61 #define RSB_ADDR        0x10    /* Address to send with read/write command */
  62 #define RSB_DATA        0x1c    /* Data to read/write */
  63 #define RSB_LCR         0x24    /* Line control */
  64 #define RSB_DMCR        0x28    /* Device mode (init) control */
  65 #define RSB_CMD         0x2c    /* RSB Command */
  66 #define RSB_DAR         0x30    /* Device address / runtime address */
  67
  68 /* CTRL fields */
  69 #define RSB_CTRL_START_TRANS            BIT(7)
  70 #define RSB_CTRL_ABORT_TRANS            BIT(6)
  71 #define RSB_CTRL_GLOBAL_INT_ENB         BIT(1)
  72 #define RSB_CTRL_SOFT_RST               BIT(0)
  73
  74 /* CLK CTRL fields */
  75 #define RSB_CCR_SDA_OUT_DELAY(v)        (((v) & 0x7) << 8)
  76 #define RSB_CCR_MAX_CLK_DIV             0xff
  77 #define RSB_CCR_CLK_DIV(v)              ((v) & RSB_CCR_MAX_CLK_DIV)
  78
  79 /* STATUS fields */
  80 #define RSB_INTS_TRANS_ERR_ACK          BIT(16)
  81 #define RSB_INTS_TRANS_ERR_DATA_BIT(v)  (((v) >> 8) & 0xf)
  82 #define RSB_INTS_TRANS_ERR_DATA         GENMASK(11, 8)
  83 #define RSB_INTS_LOAD_BSY               BIT(2)
  84 #define RSB_INTS_TRANS_ERR              BIT(1)
  85 #define RSB_INTS_TRANS_OVER             BIT(0)
  86
  87 /* LINE CTRL fields*/
  88 #define RSB_LCR_SCL_STATE               BIT(5)
  89 #define RSB_LCR_SDA_STATE               BIT(4)
  90 #define RSB_LCR_SCL_CTL                 BIT(3)
  91 #define RSB_LCR_SCL_CTL_EN              BIT(2)
  92 #define RSB_LCR_SDA_CTL                 BIT(1)
  93 #define RSB_LCR_SDA_CTL_EN              BIT(0)
  94
  95 /* DEVICE MODE CTRL field values */
  96 #define RSB_DMCR_DEVICE_START           BIT(31)
  97 #define RSB_DMCR_MODE_DATA              (0x7c << 16)
  98 #define RSB_DMCR_MODE_REG               (0x3e << 8)
  99 #define RSB_DMCR_DEV_ADDR               0x00
 100
 101 /* CMD values */
 102 #define RSB_CMD_RD8                     0x8b
 103 #define RSB_CMD_RD16                    0x9c
 104 #define RSB_CMD_RD32                    0xa6
 105 #define RSB_CMD_WR8                     0x4e
 106 #define RSB_CMD_WR16                    0x59
 107 #define RSB_CMD_WR32                    0x63
 108 #define RSB_CMD_STRA                    0xe8
 109
 110 /* DAR fields */
 111 #define RSB_DAR_RTA(v)                  (((v) & 0xff) << 16)
 112 #define RSB_DAR_DA(v)                   ((v) & 0xffff)
 113
 114 #define RSB_MAX_FREQ                    20000000
 115
 116 #define RSB_CTRL_NAME                   "sunxi-rsb"
 117
 118 struct sunxi_rsb_addr_map {
 119         u16 hwaddr;
 120         u8 rtaddr;
 121 };
 122
 123 struct sunxi_rsb {
 124         struct device *dev;
 125         void __iomem *regs;
 126         struct clk *clk;
 127         struct reset_control *rstc;
 128         struct completion complete;
 129         struct mutex lock;
 130         unsigned int status;
 131         u32 clk_freq;
 132 };
 133
 134 /* bus / slave device related functions */
 135 static struct bus_type sunxi_rsb_bus;
 136
 137 static int sunxi_rsb_device_match(struct device *dev, struct device_driver *drv)
 138 {
 139         return of_driver_match_device(dev, drv);
 140 }
 141
 142 static int sunxi_rsb_device_probe(struct device *dev)
 143 {
 144         const struct sunxi_rsb_driver *drv = to_sunxi_rsb_driver(dev->driver);
 145         struct sunxi_rsb_device *rdev = to_sunxi_rsb_device(dev);
 146         int ret;
 147
 148         if (!drv->probe)
 149                 return -ENODEV;
 150
 151         if (!rdev->irq) {
 152                 int irq = -ENOENT;
 153
 154                 if (dev->of_node)
 155                         irq = of_irq_get(dev->of_node, 0);
 156
 157                 if (irq == -EPROBE_DEFER)
 158                         return irq;
 159                 if (irq < 0)
 160                         irq = 0;
 161
 162                 rdev->irq = irq;
 163         }
 164
 165         ret = of_clk_set_defaults(dev->of_node, false);
 166         if (ret < 0)
 167                 return ret;
 168
 169         return drv->probe(rdev);
 170 }
 171
 172 static void sunxi_rsb_device_remove(struct device *dev)
 173 {
 174         const struct sunxi_rsb_driver *drv = to_sunxi_rsb_driver(dev->driver);
 175
 176         drv->remove(to_sunxi_rsb_device(dev));
 177 }
 178
 179 static struct bus_type sunxi_rsb_bus = {
 180         .name           = RSB_CTRL_NAME,
 181         .match          = sunxi_rsb_device_match,
 182         .probe          = sunxi_rsb_device_probe,
 183         .remove         = sunxi_rsb_device_remove,
 184         .uevent         = of_device_uevent_modalias,
 185 };
 186
 187 static void sunxi_rsb_dev_release(struct device *dev)
 188 {
 189         struct sunxi_rsb_device *rdev = to_sunxi_rsb_device(dev);
 190
 191         kfree(rdev);
 192 }
 193
 194 /**
 195  * sunxi_rsb_device_create() - allocate and add an RSB device
 196  * @rsb:        RSB controller
 197  * @node:       RSB slave device node
 198  * @hwaddr:     RSB slave hardware address
 199  * @rtaddr:     RSB slave runtime address
 200  */
 201 static struct sunxi_rsb_device *sunxi_rsb_device_create(struct sunxi_rsb *rsb,
 202                 struct device_node *node, u16 hwaddr, u8 rtaddr)
 203 {
 204         int err;
 205         struct sunxi_rsb_device *rdev;
 206
 207         rdev = kzalloc(sizeof(*rdev), GFP_KERNEL);
 208         if (!rdev)
 209                 return ERR_PTR(-ENOMEM);
 210
 211         rdev->rsb = rsb;
 212         rdev->hwaddr = hwaddr;
 213         rdev->rtaddr = rtaddr;
 214         rdev->dev.bus = &sunxi_rsb_bus;
 215         rdev->dev.parent = rsb->dev;
 216         rdev->dev.of_node = node;
 217         rdev->dev.release = sunxi_rsb_dev_release;
 218
 219         dev_set_name(&rdev->dev, "%s-%x", RSB_CTRL_NAME, hwaddr);
 220
 221         err = device_register(&rdev->dev);
 222         if (err < 0) {
 223                 dev_err(&rdev->dev, "Can't add %s, status %d\n",
 224                         dev_name(&rdev->dev), err);
 225                 goto err_device_add;
 226         }
 227
 228         dev_dbg(&rdev->dev, "device %s registered\n", dev_name(&rdev->dev));
 229
 230 err_device_add:
 231         put_device(&rdev->dev);
 232
 233         return ERR_PTR(err);
 234 }
 235
 236 /**
 237  * sunxi_rsb_device_unregister(): unregister an RSB device
 238  * @rdev:       rsb_device to be removed
 239  */
 240 static void sunxi_rsb_device_unregister(struct sunxi_rsb_device *rdev)
 241 {
 242         device_unregister(&rdev->dev);
 243 }
 244
 245 static int sunxi_rsb_remove_devices(struct device *dev, void *data)
 246 {
 247         struct sunxi_rsb_device *rdev = to_sunxi_rsb_device(dev);
 248
 249         if (dev->bus == &sunxi_rsb_bus)
 250                 sunxi_rsb_device_unregister(rdev);
 251
 252         return 0;
 253 }
 254
 255 /**
 256  * sunxi_rsb_driver_register() - Register device driver with RSB core
 257  * @rdrv:       device driver to be associated with slave-device.
 258  *
 259  * This API will register the client driver with the RSB framework.
 260  * It is typically called from the driver's module-init function.
 261  */
 262 int sunxi_rsb_driver_register(struct sunxi_rsb_driver *rdrv)
 263 {
 264         rdrv->driver.bus = &sunxi_rsb_bus;
 265         return driver_register(&rdrv->driver);
 266 }
 267 EXPORT_SYMBOL_GPL(sunxi_rsb_driver_register);
 268
 269 /* common code that starts a transfer */
 270 static int _sunxi_rsb_run_xfer(struct sunxi_rsb *rsb)
 271 {
 272         if (readl(rsb->regs + RSB_CTRL) & RSB_CTRL_START_TRANS) {
 273                 dev_dbg(rsb->dev, "RSB transfer still in progress\n");
 274                 return -EBUSY;
 275         }
 276
 277         reinit_completion(&rsb->complete);
 278
 279         writel(RSB_INTS_LOAD_BSY | RSB_INTS_TRANS_ERR | RSB_INTS_TRANS_OVER,
 280                rsb->regs + RSB_INTE);
 281         writel(RSB_CTRL_START_TRANS | RSB_CTRL_GLOBAL_INT_ENB,
 282                rsb->regs + RSB_CTRL);
 283
 284         if (!wait_for_completion_io_timeout(&rsb->complete,
 285                                             msecs_to_jiffies(100))) {
 286                 dev_dbg(rsb->dev, "RSB timeout\n");
 287
 288                 /* abort the transfer */
 289                 writel(RSB_CTRL_ABORT_TRANS, rsb->regs + RSB_CTRL);
 290
 291                 /* clear any interrupt flags */
 292                 writel(readl(rsb->regs + RSB_INTS), rsb->regs + RSB_INTS);
 293
 294                 return -ETIMEDOUT;
 295         }
 296
 297         if (rsb->status & RSB_INTS_LOAD_BSY) {
 298                 dev_dbg(rsb->dev, "RSB busy\n");
 299                 return -EBUSY;
 300         }
 301
 302         if (rsb->status & RSB_INTS_TRANS_ERR) {
 303                 if (rsb->status & RSB_INTS_TRANS_ERR_ACK) {
 304                         dev_dbg(rsb->dev, "RSB slave nack\n");
 305                         return -EINVAL;
 306                 }
 307
 308                 if (rsb->status & RSB_INTS_TRANS_ERR_DATA) {
 309                         dev_dbg(rsb->dev, "RSB transfer data error\n");
 310                         return -EIO;
 311                 }
 312         }
 313
 314         return 0;
 315 }
 316
 317 static int sunxi_rsb_read(struct sunxi_rsb *rsb, u8 rtaddr, u8 addr,
 318                           u32 *buf, size_t len)
 319 {
 320         u32 cmd;
 321         int ret;
 322
 323         if (!buf)
 324                 return -EINVAL;
 325
 326         switch (len) {
 327         case 1:
 328                 cmd = RSB_CMD_RD8;
 329                 break;
 330         case 2:
 331                 cmd = RSB_CMD_RD16;
 332                 break;
 333         case 4:
 334                 cmd = RSB_CMD_RD32;
 335                 break;
 336         default:
 337                 dev_err(rsb->dev, "Invalid access width: %zd\n", len);
 338                 return -EINVAL;
 339         }
 340
 341         ret = pm_runtime_resume_and_get(rsb->dev);
 342         if (ret)
 343                 return ret;
 344
 345         mutex_lock(&rsb->lock);
 346
 347         writel(addr, rsb->regs + RSB_ADDR);
 348         writel(RSB_DAR_RTA(rtaddr), rsb->regs + RSB_DAR);
 349         writel(cmd, rsb->regs + RSB_CMD);
 350
 351         ret = _sunxi_rsb_run_xfer(rsb);
 352         if (ret)
 353                 goto unlock;
 354
 355         *buf = readl(rsb->regs + RSB_DATA) & GENMASK(len * 8 - 1, 0);
 356
 357 unlock:
 358         mutex_unlock(&rsb->lock);
 359
 360         pm_runtime_mark_last_busy(rsb->dev);
 361         pm_runtime_put_autosuspend(rsb->dev);
 362
 363         return ret;
 364 }
 365
 366 static int sunxi_rsb_write(struct sunxi_rsb *rsb, u8 rtaddr, u8 addr,
 367                            const u32 *buf, size_t len)
 368 {
 369         u32 cmd;
 370         int ret;
 371
 372         if (!buf)
 373                 return -EINVAL;
 374
 375         switch (len) {
 376         case 1:
 377                 cmd = RSB_CMD_WR8;
 378                 break;
 379         case 2:
 380                 cmd = RSB_CMD_WR16;
 381                 break;
 382         case 4:
 383                 cmd = RSB_CMD_WR32;
 384                 break;
 385         default:
 386                 dev_err(rsb->dev, "Invalid access width: %zd\n", len);
 387                 return -EINVAL;
 388         }
 389
 390         ret = pm_runtime_resume_and_get(rsb->dev);
 391         if (ret)
 392                 return ret;
 393
 394         mutex_lock(&rsb->lock);
 395
 396         writel(addr, rsb->regs + RSB_ADDR);
 397         writel(RSB_DAR_RTA(rtaddr), rsb->regs + RSB_DAR);
 398         writel(*buf, rsb->regs + RSB_DATA);
 399         writel(cmd, rsb->regs + RSB_CMD);
 400         ret = _sunxi_rsb_run_xfer(rsb);
 401
 402         mutex_unlock(&rsb->lock);
 403
 404         pm_runtime_mark_last_busy(rsb->dev);
 405         pm_runtime_put_autosuspend(rsb->dev);
 406
 407         return ret;
 408 }
 409
 410 /* RSB regmap functions */
 411 struct sunxi_rsb_ctx {
 412         struct sunxi_rsb_device *rdev;
 413         int size;
 414 };
 415
 416 static int regmap_sunxi_rsb_reg_read(void *context, unsigned int reg,
 417                                      unsigned int *val)
 418 {
 419         struct sunxi_rsb_ctx *ctx = context;
 420         struct sunxi_rsb_device *rdev = ctx->rdev;
 421
 422         if (reg > 0xff)
 423                 return -EINVAL;
 424
 425         return sunxi_rsb_read(rdev->rsb, rdev->rtaddr, reg, val, ctx->size);
 426 }
 427
 428 static int regmap_sunxi_rsb_reg_write(void *context, unsigned int reg,
 429                                       unsigned int val)
 430 {
 431         struct sunxi_rsb_ctx *ctx = context;
 432         struct sunxi_rsb_device *rdev = ctx->rdev;
 433
 434         return sunxi_rsb_write(rdev->rsb, rdev->rtaddr, reg, &val, ctx->size);
 435 }
 436
 437 static void regmap_sunxi_rsb_free_ctx(void *context)
 438 {
 439         struct sunxi_rsb_ctx *ctx = context;
 440
 441         kfree(ctx);
 442 }
 443
 444 static struct regmap_bus regmap_sunxi_rsb = {
 445         .reg_write = regmap_sunxi_rsb_reg_write,
 446         .reg_read = regmap_sunxi_rsb_reg_read,
 447         .free_context = regmap_sunxi_rsb_free_ctx,
 448         .reg_format_endian_default = REGMAP_ENDIAN_NATIVE,
 449         .val_format_endian_default = REGMAP_ENDIAN_NATIVE,
 450 };
 451
 452 static struct sunxi_rsb_ctx *regmap_sunxi_rsb_init_ctx(struct sunxi_rsb_device *rdev,
 453                 const struct regmap_config *config)
 454 {
 455         struct sunxi_rsb_ctx *ctx;
 456
 457         switch (config->val_bits) {
 458         case 8:
 459         case 16:
 460         case 32:
 461                 break;
 462         default:
 463                 return ERR_PTR(-EINVAL);
 464         }
 465
 466         ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
 467         if (!ctx)
 468                 return ERR_PTR(-ENOMEM);
 469
 470         ctx->rdev = rdev;
 471         ctx->size = config->val_bits / 8;
 472
 473         return ctx;
 474 }
 475
 476 struct regmap *__devm_regmap_init_sunxi_rsb(struct sunxi_rsb_device *rdev,
 477                                             const struct regmap_config *config,
 478                                             struct lock_class_key *lock_key,
 479                                             const char *lock_name)
 480 {
 481         struct sunxi_rsb_ctx *ctx = regmap_sunxi_rsb_init_ctx(rdev, config);
 482
 483         if (IS_ERR(ctx))
 484                 return ERR_CAST(ctx);
 485
 486         return __devm_regmap_init(&rdev->dev, &regmap_sunxi_rsb, ctx, config,
 487                                   lock_key, lock_name);
 488 }
 489 EXPORT_SYMBOL_GPL(__devm_regmap_init_sunxi_rsb);
 490
 491 /* RSB controller driver functions */
 492 static irqreturn_t sunxi_rsb_irq(int irq, void *dev_id)
 493 {
 494         struct sunxi_rsb *rsb = dev_id;
 495         u32 status;
 496
 497         status = readl(rsb->regs + RSB_INTS);
 498         rsb->status = status;
 499
 500         /* Clear interrupts */
 501         status &= (RSB_INTS_LOAD_BSY | RSB_INTS_TRANS_ERR |
 502                    RSB_INTS_TRANS_OVER);
 503         writel(status, rsb->regs + RSB_INTS);
 504
 505         complete(&rsb->complete);
 506
 507         return IRQ_HANDLED;
 508 }
 509
 510 static int sunxi_rsb_init_device_mode(struct sunxi_rsb *rsb)
 511 {
 512         int ret = 0;
 513         u32 reg;
 514
 515         /* send init sequence */
 516         writel(RSB_DMCR_DEVICE_START | RSB_DMCR_MODE_DATA |
 517                RSB_DMCR_MODE_REG | RSB_DMCR_DEV_ADDR, rsb->regs + RSB_DMCR);
 518
 519         readl_poll_timeout(rsb->regs + RSB_DMCR, reg,
 520                            !(reg & RSB_DMCR_DEVICE_START), 100, 250000);
 521         if (reg & RSB_DMCR_DEVICE_START)
 522                 ret = -ETIMEDOUT;
 523
 524         /* clear interrupt status bits */
 525         writel(readl(rsb->regs + RSB_INTS), rsb->regs + RSB_INTS);
 526
 527         return ret;
 528 }
 529
 530 /*
 531  * There are 15 valid runtime addresses, though Allwinner typically
 532  * skips the first, for unknown reasons, and uses the following three.
 533  *
 534  * 0x17, 0x2d, 0x3a, 0x4e, 0x59, 0x63, 0x74, 0x8b,
 535  * 0x9c, 0xa6, 0xb1, 0xc5, 0xd2, 0xe8, 0xff
 536  *
 537  * No designs with 2 RSB slave devices sharing identical hardware
 538  * addresses on the same bus have been seen in the wild. All designs
 539  * use 0x2d for the primary PMIC, 0x3a for the secondary PMIC if
 540  * there is one, and 0x45 for peripheral ICs.
 541  *
 542  * The hardware does not seem to support re-setting runtime addresses.
 543  * Attempts to do so result in the slave devices returning a NACK.
 544  * Hence we just hardcode the mapping here, like Allwinner does.
 545  */
 546
 547 static const struct sunxi_rsb_addr_map sunxi_rsb_addr_maps[] = {
 548         { 0x3a3, 0x2d }, /* Primary PMIC: AXP223, AXP809, AXP81X, ... */
 549         { 0x745, 0x3a }, /* Secondary PMIC: AXP806, ... */
 550         { 0xe89, 0x4e }, /* Peripheral IC: AC100, ... */
 551 };
 552
 553 static u8 sunxi_rsb_get_rtaddr(u16 hwaddr)
 554 {
 555         int i;
 556
 557         for (i = 0; i < ARRAY_SIZE(sunxi_rsb_addr_maps); i++)
 558                 if (hwaddr == sunxi_rsb_addr_maps[i].hwaddr)
 559                         return sunxi_rsb_addr_maps[i].rtaddr;
 560
 561         return 0; /* 0 is an invalid runtime address */
 562 }
 563
 564 static int of_rsb_register_devices(struct sunxi_rsb *rsb)
 565 {
 566         struct device *dev = rsb->dev;
 567         struct device_node *child, *np = dev->of_node;
 568         u32 hwaddr;
 569         u8 rtaddr;
 570         int ret;
 571
 572         if (!np)
 573                 return -EINVAL;
 574
 575         /* Runtime addresses for all slaves should be set first */
 576         for_each_available_child_of_node(np, child) {
 577                 dev_dbg(dev, "setting child %pOF runtime address\n",
 578                         child);
 579
 580                 ret = of_property_read_u32(child, "reg", &hwaddr);
 581                 if (ret) {
 582                         dev_err(dev, "%pOF: invalid 'reg' property: %d\n",
 583                                 child, ret);
 584                         continue;
 585                 }
 586
 587                 rtaddr = sunxi_rsb_get_rtaddr(hwaddr);
 588                 if (!rtaddr) {
 589                         dev_err(dev, "%pOF: unknown hardware device address\n",
 590                                 child);
 591                         continue;
 592                 }
 593
 594                 /*
 595                  * Since no devices have been registered yet, we are the
 596                  * only ones using the bus, we can skip locking the bus.
 597                  */
 598
 599                 /* setup command parameters */
 600                 writel(RSB_CMD_STRA, rsb->regs + RSB_CMD);
 601                 writel(RSB_DAR_RTA(rtaddr) | RSB_DAR_DA(hwaddr),
 602                        rsb->regs + RSB_DAR);
 603
 604                 /* send command */
 605                 ret = _sunxi_rsb_run_xfer(rsb);
 606                 if (ret)
 607                         dev_warn(dev, "%pOF: set runtime address failed: %d\n",
 608                                  child, ret);
 609         }
 610
 611         /* Then we start adding devices and probing them */
 612         for_each_available_child_of_node(np, child) {
 613                 struct sunxi_rsb_device *rdev;
 614
 615                 dev_dbg(dev, "adding child %pOF\n", child);
 616
 617                 ret = of_property_read_u32(child, "reg", &hwaddr);
 618                 if (ret)
 619                         continue;
 620
 621                 rtaddr = sunxi_rsb_get_rtaddr(hwaddr);
 622                 if (!rtaddr)
 623                         continue;
 624
 625                 rdev = sunxi_rsb_device_create(rsb, child, hwaddr, rtaddr);
 626                 if (IS_ERR(rdev))
 627                         dev_err(dev, "failed to add child device %pOF: %ld\n",
 628                                 child, PTR_ERR(rdev));
 629         }
 630
 631         return 0;
 632 }
 633
 634 static int sunxi_rsb_hw_init(struct sunxi_rsb *rsb)
 635 {
 636         struct device *dev = rsb->dev;
 637         unsigned long p_clk_freq;
 638         u32 clk_delay, reg;
 639         int clk_div, ret;
 640
 641         ret = clk_prepare_enable(rsb->clk);
 642         if (ret) {
 643                 dev_err(dev, "failed to enable clk: %d\n", ret);
 644                 return ret;
 645         }
 646
 647         ret = reset_control_deassert(rsb->rstc);
 648         if (ret) {
 649                 dev_err(dev, "failed to deassert reset line: %d\n", ret);
 650                 goto err_clk_disable;
 651         }
 652
 653         /* reset the controller */
 654         writel(RSB_CTRL_SOFT_RST, rsb->regs + RSB_CTRL);
 655         readl_poll_timeout(rsb->regs + RSB_CTRL, reg,
 656                            !(reg & RSB_CTRL_SOFT_RST), 1000, 100000);
 657
 658         /*
 659          * Clock frequency and delay calculation code is from
 660          * Allwinner U-boot sources.
 661          *
 662          * From A83 user manual:
 663          * bus clock frequency = parent clock frequency / (2 * (divider + 1))
 664          */
 665         p_clk_freq = clk_get_rate(rsb->clk);
 666         clk_div = p_clk_freq / rsb->clk_freq / 2;
 667         if (!clk_div)
 668                 clk_div = 1;
 669         else if (clk_div > RSB_CCR_MAX_CLK_DIV + 1)
 670                 clk_div = RSB_CCR_MAX_CLK_DIV + 1;
 671
 672         clk_delay = clk_div >> 1;
 673         if (!clk_delay)
 674                 clk_delay = 1;
 675
 676         dev_info(dev, "RSB running at %lu Hz\n", p_clk_freq / clk_div / 2);
 677         writel(RSB_CCR_SDA_OUT_DELAY(clk_delay) | RSB_CCR_CLK_DIV(clk_div - 1),
 678                rsb->regs + RSB_CCR);
 679
 680         return 0;
 681
 682 err_clk_disable:
 683         clk_disable_unprepare(rsb->clk);
 684
 685         return ret;
 686 }
 687
 688 static void sunxi_rsb_hw_exit(struct sunxi_rsb *rsb)
 689 {
 690         /* Keep the clock and PM reference counts consistent. */
 691         if (pm_runtime_status_suspended(rsb->dev))
 692                 pm_runtime_resume(rsb->dev);
 693         reset_control_assert(rsb->rstc);
 694         clk_disable_unprepare(rsb->clk);
 695 }
 696
 697 static int __maybe_unused sunxi_rsb_runtime_suspend(struct device *dev)
 698 {
 699         struct sunxi_rsb *rsb = dev_get_drvdata(dev);
 700
 701         clk_disable_unprepare(rsb->clk);
 702
 703         return 0;
 704 }
 705
 706 static int __maybe_unused sunxi_rsb_runtime_resume(struct device *dev)
 707 {
 708         struct sunxi_rsb *rsb = dev_get_drvdata(dev);
 709
 710         return clk_prepare_enable(rsb->clk);
 711 }
 712
 713 static int __maybe_unused sunxi_rsb_suspend(struct device *dev)
 714 {
 715         struct sunxi_rsb *rsb = dev_get_drvdata(dev);
 716
 717         sunxi_rsb_hw_exit(rsb);
 718
 719         return 0;
 720 }
 721
 722 static int __maybe_unused sunxi_rsb_resume(struct device *dev)
 723 {
 724         struct sunxi_rsb *rsb = dev_get_drvdata(dev);
 725
 726         return sunxi_rsb_hw_init(rsb);
 727 }
 728
 729 static int sunxi_rsb_probe(struct platform_device *pdev)
 730 {
 731         struct device *dev = &pdev->dev;
 732         struct device_node *np = dev->of_node;
 733         struct resource *r;
 734         struct sunxi_rsb *rsb;
 735         u32 clk_freq = 3000000;
 736         int irq, ret;
 737
 738         of_property_read_u32(np, "clock-frequency", &clk_freq);
 739         if (clk_freq > RSB_MAX_FREQ) {
 740                 dev_err(dev,
 741                         "clock-frequency (%u Hz) is too high (max = 20MHz)\n",
 742                         clk_freq);
 743                 return -EINVAL;
 744         }
 745
 746         rsb = devm_kzalloc(dev, sizeof(*rsb), GFP_KERNEL);
 747         if (!rsb)
 748                 return -ENOMEM;
 749
 750         rsb->dev = dev;
 751         rsb->clk_freq = clk_freq;
 752         platform_set_drvdata(pdev, rsb);
 753         r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 754         rsb->regs = devm_ioremap_resource(dev, r);
 755         if (IS_ERR(rsb->regs))
 756                 return PTR_ERR(rsb->regs);
 757
 758         irq = platform_get_irq(pdev, 0);
 759         if (irq < 0)
 760                 return irq;
 761
 762         rsb->clk = devm_clk_get(dev, NULL);
 763         if (IS_ERR(rsb->clk)) {
 764                 ret = PTR_ERR(rsb->clk);
 765                 dev_err(dev, "failed to retrieve clk: %d\n", ret);
 766                 return ret;
 767         }
 768
 769         rsb->rstc = devm_reset_control_get(dev, NULL);
 770         if (IS_ERR(rsb->rstc)) {
 771                 ret = PTR_ERR(rsb->rstc);
 772                 dev_err(dev, "failed to retrieve reset controller: %d\n", ret);
 773                 return ret;
 774         }
 775
 776         init_completion(&rsb->complete);
 777         mutex_init(&rsb->lock);
 778
 779         ret = devm_request_irq(dev, irq, sunxi_rsb_irq, 0, RSB_CTRL_NAME, rsb);
 780         if (ret) {
 781                 dev_err(dev, "can't register interrupt handler irq %d: %d\n",
 782                         irq, ret);
 783                 return ret;
 784         }
 785
 786         ret = sunxi_rsb_hw_init(rsb);
 787         if (ret)
 788                 return ret;
 789
 790         /* initialize all devices on the bus into RSB mode */
 791         ret = sunxi_rsb_init_device_mode(rsb);
 792         if (ret)
 793                 dev_warn(dev, "Initialize device mode failed: %d\n", ret);
 794
 795         pm_suspend_ignore_children(dev, true);
 796         pm_runtime_set_active(dev);
 797         pm_runtime_set_autosuspend_delay(dev, MSEC_PER_SEC);
 798         pm_runtime_use_autosuspend(dev);
 799         pm_runtime_enable(dev);
 800
 801         of_rsb_register_devices(rsb);
 802
 803         return 0;
 804 }
 805
 806 static int sunxi_rsb_remove(struct platform_device *pdev)
 807 {
 808         struct sunxi_rsb *rsb = platform_get_drvdata(pdev);
 809
 810         device_for_each_child(rsb->dev, NULL, sunxi_rsb_remove_devices);
 811         pm_runtime_disable(&pdev->dev);
 812         sunxi_rsb_hw_exit(rsb);
 813
 814         return 0;
 815 }
 816
 817 static void sunxi_rsb_shutdown(struct platform_device *pdev)
 818 {
 819         struct sunxi_rsb *rsb = platform_get_drvdata(pdev);
 820
 821         pm_runtime_disable(&pdev->dev);
 822         sunxi_rsb_hw_exit(rsb);
 823 }
 824
 825 static const struct dev_pm_ops sunxi_rsb_dev_pm_ops = {
 826         SET_RUNTIME_PM_OPS(sunxi_rsb_runtime_suspend,
 827                            sunxi_rsb_runtime_resume, NULL)
 828         SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(sunxi_rsb_suspend, sunxi_rsb_resume)
 829 };
 830
 831 static const struct of_device_id sunxi_rsb_of_match_table[] = {
 832         { .compatible = "allwinner,sun8i-a23-rsb" },
 833         {}
 834 };
 835 MODULE_DEVICE_TABLE(of, sunxi_rsb_of_match_table);
 836
 837 static struct platform_driver sunxi_rsb_driver = {
 838         .probe = sunxi_rsb_probe,
 839         .remove = sunxi_rsb_remove,
 840         .shutdown = sunxi_rsb_shutdown,
 841         .driver = {
 842                 .name = RSB_CTRL_NAME,
 843                 .of_match_table = sunxi_rsb_of_match_table,
 844                 .pm = &sunxi_rsb_dev_pm_ops,
 845         },
 846 };
 847
 848 static int __init sunxi_rsb_init(void)
 849 {
 850         int ret;
 851
 852         ret = bus_register(&sunxi_rsb_bus);
 853         if (ret) {
 854                 pr_err("failed to register sunxi sunxi_rsb bus: %d\n", ret);
 855                 return ret;
 856         }
 857
 858         return platform_driver_register(&sunxi_rsb_driver);
 859 }
 860 module_init(sunxi_rsb_init);
 861
 862 static void __exit sunxi_rsb_exit(void)
 863 {
 864         platform_driver_unregister(&sunxi_rsb_driver);
 865         bus_unregister(&sunxi_rsb_bus);
 866 }
 867 module_exit(sunxi_rsb_exit);
 868
 869 MODULE_AUTHOR("Chen-Yu Tsai <wens@csie.org>");
 870 MODULE_DESCRIPTION("Allwinner sunXi Reduced Serial Bus controller driver");
 871 MODULE_LICENSE("GPL v2");