arch/x86/kvm/x86.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * derived from drivers/kvm/kvm_main.c
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  * Copyright (C) 2008 Qumranet, Inc.
   9  * Copyright IBM Corporation, 2008
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *   Yaniv Kamay  <yaniv@qumranet.com>
  15  *   Amit Shah    <amit.shah@qumranet.com>
  16  *   Ben-Ami Yassour <benami@il.ibm.com>
  17  */
  18
  19 #include <linux/kvm_host.h>
  20 #include "irq.h"
  21 #include "ioapic.h"
  22 #include "mmu.h"
  23 #include "i8254.h"
  24 #include "tss.h"
  25 #include "kvm_cache_regs.h"
  26 #include "kvm_emulate.h"
  27 #include "x86.h"
  28 #include "cpuid.h"
  29 #include "pmu.h"
  30 #include "hyperv.h"
  31 #include "lapic.h"
  32
  33 #include <linux/clocksource.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/kvm.h>
  36 #include <linux/fs.h>
  37 #include <linux/vmalloc.h>
  38 #include <linux/export.h>
  39 #include <linux/moduleparam.h>
  40 #include <linux/mman.h>
  41 #include <linux/highmem.h>
  42 #include <linux/iommu.h>
  43 #include <linux/intel-iommu.h>
  44 #include <linux/cpufreq.h>
  45 #include <linux/user-return-notifier.h>
  46 #include <linux/srcu.h>
  47 #include <linux/slab.h>
  48 #include <linux/perf_event.h>
  49 #include <linux/uaccess.h>
  50 #include <linux/hash.h>
  51 #include <linux/pci.h>
  52 #include <linux/timekeeper_internal.h>
  53 #include <linux/pvclock_gtod.h>
  54 #include <linux/kvm_irqfd.h>
  55 #include <linux/irqbypass.h>
  56 #include <linux/sched/stat.h>
  57 #include <linux/sched/isolation.h>
  58 #include <linux/mem_encrypt.h>
  59 #include <linux/entry-kvm.h>
  60
  61 #include <trace/events/kvm.h>
  62
  63 #include <asm/debugreg.h>
  64 #include <asm/msr.h>
  65 #include <asm/desc.h>
  66 #include <asm/mce.h>
  67 #include <linux/kernel_stat.h>
  68 #include <asm/fpu/internal.h> /* Ugh! */
  69 #include <asm/pvclock.h>
  70 #include <asm/div64.h>
  71 #include <asm/irq_remapping.h>
  72 #include <asm/mshyperv.h>
  73 #include <asm/hypervisor.h>
  74 #include <asm/tlbflush.h>
  75 #include <asm/intel_pt.h>
  76 #include <asm/emulate_prefix.h>
  77 #include <clocksource/hyperv_timer.h>
  78
  79 #define CREATE_TRACE_POINTS
  80 #include "trace.h"
  81
  82 #define MAX_IO_MSRS 256
  83 #define KVM_MAX_MCE_BANKS 32
  84 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  85 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  86
  87 #define emul_to_vcpu(ctxt) \
  88         ((struct kvm_vcpu *)(ctxt)->vcpu)
  89
  90 /* EFER defaults:
  91  * - enable syscall per default because its emulated by KVM
  92  * - enable LME and LMA per default on 64 bit KVM
  93  */
  94 #ifdef CONFIG_X86_64
  95 static
  96 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  97 #else
  98 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  99 #endif
 100
 101 static u64 __read_mostly cr4_reserved_bits = CR4_RESERVED_BITS;
 102
 103 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
 104                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 105
 106 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 107 static void process_nmi(struct kvm_vcpu *vcpu);
 108 static void enter_smm(struct kvm_vcpu *vcpu);
 109 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 110 static void store_regs(struct kvm_vcpu *vcpu);
 111 static int sync_regs(struct kvm_vcpu *vcpu);
 112
 113 struct kvm_x86_ops kvm_x86_ops __read_mostly;
 114 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 115
 116 static bool __read_mostly ignore_msrs = 0;
 117 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 118
 119 static bool __read_mostly report_ignored_msrs = true;
 120 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 121
 122 unsigned int min_timer_period_us = 200;
 123 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 124
 125 static bool __read_mostly kvmclock_periodic_sync = true;
 126 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 127
 128 bool __read_mostly kvm_has_tsc_control;
 129 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 130 u32  __read_mostly kvm_max_guest_tsc_khz;
 131 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 132 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 133 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 134 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 135 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 136 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 137 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 138
 139 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 140 static u32 __read_mostly tsc_tolerance_ppm = 250;
 141 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 142
 143 /*
 144  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 145  * adaptive tuning starting from default advancment of 1000ns.  '0' disables
 146  * advancement entirely.  Any other value is used as-is and disables adaptive
 147  * tuning, i.e. allows priveleged userspace to set an exact advancement time.
 148  */
 149 static int __read_mostly lapic_timer_advance_ns = -1;
 150 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 151
 152 static bool __read_mostly vector_hashing = true;
 153 module_param(vector_hashing, bool, S_IRUGO);
 154
 155 bool __read_mostly enable_vmware_backdoor = false;
 156 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 157 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 158
 159 static bool __read_mostly force_emulation_prefix = false;
 160 module_param(force_emulation_prefix, bool, S_IRUGO);
 161
 162 int __read_mostly pi_inject_timer = -1;
 163 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
 164
 165 /*
 166  * Restoring the host value for MSRs that are only consumed when running in
 167  * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
 168  * returns to userspace, i.e. the kernel can run with the guest's value.
 169  */
 170 #define KVM_MAX_NR_USER_RETURN_MSRS 16
 171
 172 struct kvm_user_return_msrs_global {
 173         int nr;
 174         u32 msrs[KVM_MAX_NR_USER_RETURN_MSRS];
 175 };
 176
 177 struct kvm_user_return_msrs {
 178         struct user_return_notifier urn;
 179         bool registered;
 180         struct kvm_user_return_msr_values {
 181                 u64 host;
 182                 u64 curr;
 183         } values[KVM_MAX_NR_USER_RETURN_MSRS];
 184 };
 185
 186 static struct kvm_user_return_msrs_global __read_mostly user_return_msrs_global;
 187 static struct kvm_user_return_msrs __percpu *user_return_msrs;
 188
 189 #define KVM_SUPPORTED_XCR0     (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
 190                                 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
 191                                 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
 192                                 | XFEATURE_MASK_PKRU)
 193
 194 u64 __read_mostly host_efer;
 195 EXPORT_SYMBOL_GPL(host_efer);
 196
 197 bool __read_mostly allow_smaller_maxphyaddr = 0;
 198 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr);
 199
 200 static u64 __read_mostly host_xss;
 201 u64 __read_mostly supported_xss;
 202 EXPORT_SYMBOL_GPL(supported_xss);
 203
 204 struct kvm_stats_debugfs_item debugfs_entries[] = {
 205         VCPU_STAT("pf_fixed", pf_fixed),
 206         VCPU_STAT("pf_guest", pf_guest),
 207         VCPU_STAT("tlb_flush", tlb_flush),
 208         VCPU_STAT("invlpg", invlpg),
 209         VCPU_STAT("exits", exits),
 210         VCPU_STAT("io_exits", io_exits),
 211         VCPU_STAT("mmio_exits", mmio_exits),
 212         VCPU_STAT("signal_exits", signal_exits),
 213         VCPU_STAT("irq_window", irq_window_exits),
 214         VCPU_STAT("nmi_window", nmi_window_exits),
 215         VCPU_STAT("halt_exits", halt_exits),
 216         VCPU_STAT("halt_successful_poll", halt_successful_poll),
 217         VCPU_STAT("halt_attempted_poll", halt_attempted_poll),
 218         VCPU_STAT("halt_poll_invalid", halt_poll_invalid),
 219         VCPU_STAT("halt_wakeup", halt_wakeup),
 220         VCPU_STAT("hypercalls", hypercalls),
 221         VCPU_STAT("request_irq", request_irq_exits),
 222         VCPU_STAT("irq_exits", irq_exits),
 223         VCPU_STAT("host_state_reload", host_state_reload),
 224         VCPU_STAT("fpu_reload", fpu_reload),
 225         VCPU_STAT("insn_emulation", insn_emulation),
 226         VCPU_STAT("insn_emulation_fail", insn_emulation_fail),
 227         VCPU_STAT("irq_injections", irq_injections),
 228         VCPU_STAT("nmi_injections", nmi_injections),
 229         VCPU_STAT("req_event", req_event),
 230         VCPU_STAT("l1d_flush", l1d_flush),
 231         VCPU_STAT("halt_poll_success_ns", halt_poll_success_ns),
 232         VCPU_STAT("halt_poll_fail_ns", halt_poll_fail_ns),
 233         VM_STAT("mmu_shadow_zapped", mmu_shadow_zapped),
 234         VM_STAT("mmu_pte_write", mmu_pte_write),
 235         VM_STAT("mmu_pte_updated", mmu_pte_updated),
 236         VM_STAT("mmu_pde_zapped", mmu_pde_zapped),
 237         VM_STAT("mmu_flooded", mmu_flooded),
 238         VM_STAT("mmu_recycled", mmu_recycled),
 239         VM_STAT("mmu_cache_miss", mmu_cache_miss),
 240         VM_STAT("mmu_unsync", mmu_unsync),
 241         VM_STAT("remote_tlb_flush", remote_tlb_flush),
 242         VM_STAT("largepages", lpages, .mode = 0444),
 243         VM_STAT("nx_largepages_splitted", nx_lpage_splits, .mode = 0444),
 244         VM_STAT("max_mmu_page_hash_collisions", max_mmu_page_hash_collisions),
 245         { NULL }
 246 };
 247
 248 u64 __read_mostly host_xcr0;
 249 u64 __read_mostly supported_xcr0;
 250 EXPORT_SYMBOL_GPL(supported_xcr0);
 251
 252 static struct kmem_cache *x86_fpu_cache;
 253
 254 static struct kmem_cache *x86_emulator_cache;
 255
 256 /*
 257  * When called, it means the previous get/set msr reached an invalid msr.
 258  * Return true if we want to ignore/silent this failed msr access.
 259  */
 260 static bool kvm_msr_ignored_check(struct kvm_vcpu *vcpu, u32 msr,
 261                                   u64 data, bool write)
 262 {
 263         const char *op = write ? "wrmsr" : "rdmsr";
 264
 265         if (ignore_msrs) {
 266                 if (report_ignored_msrs)
 267                         kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
 268                                       op, msr, data);
 269                 /* Mask the error */
 270                 return true;
 271         } else {
 272                 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
 273                                       op, msr, data);
 274                 return false;
 275         }
 276 }
 277
 278 static struct kmem_cache *kvm_alloc_emulator_cache(void)
 279 {
 280         unsigned int useroffset = offsetof(struct x86_emulate_ctxt, src);
 281         unsigned int size = sizeof(struct x86_emulate_ctxt);
 282
 283         return kmem_cache_create_usercopy("x86_emulator", size,
 284                                           __alignof__(struct x86_emulate_ctxt),
 285                                           SLAB_ACCOUNT, useroffset,
 286                                           size - useroffset, NULL);
 287 }
 288
 289 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 290
 291 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 292 {
 293         int i;
 294         for (i = 0; i < ASYNC_PF_PER_VCPU; i++)
 295                 vcpu->arch.apf.gfns[i] = ~0;
 296 }
 297
 298 static void kvm_on_user_return(struct user_return_notifier *urn)
 299 {
 300         unsigned slot;
 301         struct kvm_user_return_msrs *msrs
 302                 = container_of(urn, struct kvm_user_return_msrs, urn);
 303         struct kvm_user_return_msr_values *values;
 304         unsigned long flags;
 305
 306         /*
 307          * Disabling irqs at this point since the following code could be
 308          * interrupted and executed through kvm_arch_hardware_disable()
 309          */
 310         local_irq_save(flags);
 311         if (msrs->registered) {
 312                 msrs->registered = false;
 313                 user_return_notifier_unregister(urn);
 314         }
 315         local_irq_restore(flags);
 316         for (slot = 0; slot < user_return_msrs_global.nr; ++slot) {
 317                 values = &msrs->values[slot];
 318                 if (values->host != values->curr) {
 319                         wrmsrl(user_return_msrs_global.msrs[slot], values->host);
 320                         values->curr = values->host;
 321                 }
 322         }
 323 }
 324
 325 void kvm_define_user_return_msr(unsigned slot, u32 msr)
 326 {
 327         BUG_ON(slot >= KVM_MAX_NR_USER_RETURN_MSRS);
 328         user_return_msrs_global.msrs[slot] = msr;
 329         if (slot >= user_return_msrs_global.nr)
 330                 user_return_msrs_global.nr = slot + 1;
 331 }
 332 EXPORT_SYMBOL_GPL(kvm_define_user_return_msr);
 333
 334 static void kvm_user_return_msr_cpu_online(void)
 335 {
 336         unsigned int cpu = smp_processor_id();
 337         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 338         u64 value;
 339         int i;
 340
 341         for (i = 0; i < user_return_msrs_global.nr; ++i) {
 342                 rdmsrl_safe(user_return_msrs_global.msrs[i], &value);
 343                 msrs->values[i].host = value;
 344                 msrs->values[i].curr = value;
 345         }
 346 }
 347
 348 int kvm_set_user_return_msr(unsigned slot, u64 value, u64 mask)
 349 {
 350         unsigned int cpu = smp_processor_id();
 351         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 352         int err;
 353
 354         value = (value & mask) | (msrs->values[slot].host & ~mask);
 355         if (value == msrs->values[slot].curr)
 356                 return 0;
 357         err = wrmsrl_safe(user_return_msrs_global.msrs[slot], value);
 358         if (err)
 359                 return 1;
 360
 361         msrs->values[slot].curr = value;
 362         if (!msrs->registered) {
 363                 msrs->urn.on_user_return = kvm_on_user_return;
 364                 user_return_notifier_register(&msrs->urn);
 365                 msrs->registered = true;
 366         }
 367         return 0;
 368 }
 369 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr);
 370
 371 static void drop_user_return_notifiers(void)
 372 {
 373         unsigned int cpu = smp_processor_id();
 374         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 375
 376         if (msrs->registered)
 377                 kvm_on_user_return(&msrs->urn);
 378 }
 379
 380 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 381 {
 382         return vcpu->arch.apic_base;
 383 }
 384 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 385
 386 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 387 {
 388         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 389 }
 390 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 391
 392 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 393 {
 394         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 395         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 396         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) | 0x2ff |
 397                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 398
 399         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 400                 return 1;
 401         if (!msr_info->host_initiated) {
 402                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 403                         return 1;
 404                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 405                         return 1;
 406         }
 407
 408         kvm_lapic_set_base(vcpu, msr_info->data);
 409         kvm_recalculate_apic_map(vcpu->kvm);
 410         return 0;
 411 }
 412 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 413
 414 asmlinkage __visible noinstr void kvm_spurious_fault(void)
 415 {
 416         /* Fault while not rebooting.  We want the trace. */
 417         BUG_ON(!kvm_rebooting);
 418 }
 419 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 420
 421 #define EXCPT_BENIGN            0
 422 #define EXCPT_CONTRIBUTORY      1
 423 #define EXCPT_PF                2
 424
 425 static int exception_class(int vector)
 426 {
 427         switch (vector) {
 428         case PF_VECTOR:
 429                 return EXCPT_PF;
 430         case DE_VECTOR:
 431         case TS_VECTOR:
 432         case NP_VECTOR:
 433         case SS_VECTOR:
 434         case GP_VECTOR:
 435                 return EXCPT_CONTRIBUTORY;
 436         default:
 437                 break;
 438         }
 439         return EXCPT_BENIGN;
 440 }
 441
 442 #define EXCPT_FAULT             0
 443 #define EXCPT_TRAP              1
 444 #define EXCPT_ABORT             2
 445 #define EXCPT_INTERRUPT         3
 446
 447 static int exception_type(int vector)
 448 {
 449         unsigned int mask;
 450
 451         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 452                 return EXCPT_INTERRUPT;
 453
 454         mask = 1 << vector;
 455
 456         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 457         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 458                 return EXCPT_TRAP;
 459
 460         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 461                 return EXCPT_ABORT;
 462
 463         /* Reserved exceptions will result in fault */
 464         return EXCPT_FAULT;
 465 }
 466
 467 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 468 {
 469         unsigned nr = vcpu->arch.exception.nr;
 470         bool has_payload = vcpu->arch.exception.has_payload;
 471         unsigned long payload = vcpu->arch.exception.payload;
 472
 473         if (!has_payload)
 474                 return;
 475
 476         switch (nr) {
 477         case DB_VECTOR:
 478                 /*
 479                  * "Certain debug exceptions may clear bit 0-3.  The
 480                  * remaining contents of the DR6 register are never
 481                  * cleared by the processor".
 482                  */
 483                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 484                 /*
 485                  * DR6.RTM is set by all #DB exceptions that don't clear it.
 486                  */
 487                 vcpu->arch.dr6 |= DR6_RTM;
 488                 vcpu->arch.dr6 |= payload;
 489                 /*
 490                  * Bit 16 should be set in the payload whenever the #DB
 491                  * exception should clear DR6.RTM. This makes the payload
 492                  * compatible with the pending debug exceptions under VMX.
 493                  * Though not currently documented in the SDM, this also
 494                  * makes the payload compatible with the exit qualification
 495                  * for #DB exceptions under VMX.
 496                  */
 497                 vcpu->arch.dr6 ^= payload & DR6_RTM;
 498
 499                 /*
 500                  * The #DB payload is defined as compatible with the 'pending
 501                  * debug exceptions' field under VMX, not DR6. While bit 12 is
 502                  * defined in the 'pending debug exceptions' field (enabled
 503                  * breakpoint), it is reserved and must be zero in DR6.
 504                  */
 505                 vcpu->arch.dr6 &= ~BIT(12);
 506                 break;
 507         case PF_VECTOR:
 508                 vcpu->arch.cr2 = payload;
 509                 break;
 510         }
 511
 512         vcpu->arch.exception.has_payload = false;
 513         vcpu->arch.exception.payload = 0;
 514 }
 515 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 516
 517 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 518                 unsigned nr, bool has_error, u32 error_code,
 519                 bool has_payload, unsigned long payload, bool reinject)
 520 {
 521         u32 prev_nr;
 522         int class1, class2;
 523
 524         kvm_make_request(KVM_REQ_EVENT, vcpu);
 525
 526         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 527         queue:
 528                 if (has_error && !is_protmode(vcpu))
 529                         has_error = false;
 530                 if (reinject) {
 531                         /*
 532                          * On vmentry, vcpu->arch.exception.pending is only
 533                          * true if an event injection was blocked by
 534                          * nested_run_pending.  In that case, however,
 535                          * vcpu_enter_guest requests an immediate exit,
 536                          * and the guest shouldn't proceed far enough to
 537                          * need reinjection.
 538                          */
 539                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 540                         vcpu->arch.exception.injected = true;
 541                         if (WARN_ON_ONCE(has_payload)) {
 542                                 /*
 543                                  * A reinjected event has already
 544                                  * delivered its payload.
 545                                  */
 546                                 has_payload = false;
 547                                 payload = 0;
 548                         }
 549                 } else {
 550                         vcpu->arch.exception.pending = true;
 551                         vcpu->arch.exception.injected = false;
 552                 }
 553                 vcpu->arch.exception.has_error_code = has_error;
 554                 vcpu->arch.exception.nr = nr;
 555                 vcpu->arch.exception.error_code = error_code;
 556                 vcpu->arch.exception.has_payload = has_payload;
 557                 vcpu->arch.exception.payload = payload;
 558                 if (!is_guest_mode(vcpu))
 559                         kvm_deliver_exception_payload(vcpu);
 560                 return;
 561         }
 562
 563         /* to check exception */
 564         prev_nr = vcpu->arch.exception.nr;
 565         if (prev_nr == DF_VECTOR) {
 566                 /* triple fault -> shutdown */
 567                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 568                 return;
 569         }
 570         class1 = exception_class(prev_nr);
 571         class2 = exception_class(nr);
 572         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 573                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 574                 /*
 575                  * Generate double fault per SDM Table 5-5.  Set
 576                  * exception.pending = true so that the double fault
 577                  * can trigger a nested vmexit.
 578                  */
 579                 vcpu->arch.exception.pending = true;
 580                 vcpu->arch.exception.injected = false;
 581                 vcpu->arch.exception.has_error_code = true;
 582                 vcpu->arch.exception.nr = DF_VECTOR;
 583                 vcpu->arch.exception.error_code = 0;
 584                 vcpu->arch.exception.has_payload = false;
 585                 vcpu->arch.exception.payload = 0;
 586         } else
 587                 /* replace previous exception with a new one in a hope
 588                    that instruction re-execution will regenerate lost
 589                    exception */
 590                 goto queue;
 591 }
 592
 593 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 594 {
 595         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 596 }
 597 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 598
 599 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 600 {
 601         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 602 }
 603 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 604
 605 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 606                            unsigned long payload)
 607 {
 608         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 609 }
 610 EXPORT_SYMBOL_GPL(kvm_queue_exception_p);
 611
 612 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 613                                     u32 error_code, unsigned long payload)
 614 {
 615         kvm_multiple_exception(vcpu, nr, true, error_code,
 616                                true, payload, false);
 617 }
 618
 619 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 620 {
 621         if (err)
 622                 kvm_inject_gp(vcpu, 0);
 623         else
 624                 return kvm_skip_emulated_instruction(vcpu);
 625
 626         return 1;
 627 }
 628 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 629
 630 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 631 {
 632         ++vcpu->stat.pf_guest;
 633         vcpu->arch.exception.nested_apf =
 634                 is_guest_mode(vcpu) && fault->async_page_fault;
 635         if (vcpu->arch.exception.nested_apf) {
 636                 vcpu->arch.apf.nested_apf_token = fault->address;
 637                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 638         } else {
 639                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 640                                         fault->address);
 641         }
 642 }
 643 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 644
 645 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
 646                                     struct x86_exception *fault)
 647 {
 648         struct kvm_mmu *fault_mmu;
 649         WARN_ON_ONCE(fault->vector != PF_VECTOR);
 650
 651         fault_mmu = fault->nested_page_fault ? vcpu->arch.mmu :
 652                                                vcpu->arch.walk_mmu;
 653
 654         /*
 655          * Invalidate the TLB entry for the faulting address, if it exists,
 656          * else the access will fault indefinitely (and to emulate hardware).
 657          */
 658         if ((fault->error_code & PFERR_PRESENT_MASK) &&
 659             !(fault->error_code & PFERR_RSVD_MASK))
 660                 kvm_mmu_invalidate_gva(vcpu, fault_mmu, fault->address,
 661                                        fault_mmu->root_hpa);
 662
 663         fault_mmu->inject_page_fault(vcpu, fault);
 664         return fault->nested_page_fault;
 665 }
 666 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault);
 667
 668 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 669 {
 670         atomic_inc(&vcpu->arch.nmi_queued);
 671         kvm_make_request(KVM_REQ_NMI, vcpu);
 672 }
 673 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 674
 675 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 676 {
 677         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 678 }
 679 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 680
 681 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 682 {
 683         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 684 }
 685 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 686
 687 /*
 688  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 689  * a #GP and return false.
 690  */
 691 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 692 {
 693         if (kvm_x86_ops.get_cpl(vcpu) <= required_cpl)
 694                 return true;
 695         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 696         return false;
 697 }
 698 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 699
 700 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 701 {
 702         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 703                 return true;
 704
 705         kvm_queue_exception(vcpu, UD_VECTOR);
 706         return false;
 707 }
 708 EXPORT_SYMBOL_GPL(kvm_require_dr);
 709
 710 /*
 711  * This function will be used to read from the physical memory of the currently
 712  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 713  * can read from guest physical or from the guest's guest physical memory.
 714  */
 715 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 716                             gfn_t ngfn, void *data, int offset, int len,
 717                             u32 access)
 718 {
 719         struct x86_exception exception;
 720         gfn_t real_gfn;
 721         gpa_t ngpa;
 722
 723         ngpa     = gfn_to_gpa(ngfn);
 724         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 725         if (real_gfn == UNMAPPED_GVA)
 726                 return -EFAULT;
 727
 728         real_gfn = gpa_to_gfn(real_gfn);
 729
 730         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 731 }
 732 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 733
 734 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 735                                void *data, int offset, int len, u32 access)
 736 {
 737         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 738                                        data, offset, len, access);
 739 }
 740
 741 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
 742 {
 743         return rsvd_bits(cpuid_maxphyaddr(vcpu), 63) | rsvd_bits(5, 8) |
 744                rsvd_bits(1, 2);
 745 }
 746
 747 /*
 748  * Load the pae pdptrs.  Return 1 if they are all valid, 0 otherwise.
 749  */
 750 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 751 {
 752         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 753         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 754         int i;
 755         int ret;
 756         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 757
 758         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 759                                       offset * sizeof(u64), sizeof(pdpte),
 760                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 761         if (ret < 0) {
 762                 ret = 0;
 763                 goto out;
 764         }
 765         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 766                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 767                     (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
 768                         ret = 0;
 769                         goto out;
 770                 }
 771         }
 772         ret = 1;
 773
 774         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 775         kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
 776
 777 out:
 778
 779         return ret;
 780 }
 781 EXPORT_SYMBOL_GPL(load_pdptrs);
 782
 783 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 784 {
 785         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 786         int offset;
 787         gfn_t gfn;
 788         int r;
 789
 790         if (!is_pae_paging(vcpu))
 791                 return false;
 792
 793         if (!kvm_register_is_available(vcpu, VCPU_EXREG_PDPTR))
 794                 return true;
 795
 796         gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
 797         offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
 798         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 799                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 800         if (r < 0)
 801                 return true;
 802
 803         return memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 804 }
 805 EXPORT_SYMBOL_GPL(pdptrs_changed);
 806
 807 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 808 {
 809         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 810         unsigned long pdptr_bits = X86_CR0_CD | X86_CR0_NW | X86_CR0_PG;
 811         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 812
 813         cr0 |= X86_CR0_ET;
 814
 815 #ifdef CONFIG_X86_64
 816         if (cr0 & 0xffffffff00000000UL)
 817                 return 1;
 818 #endif
 819
 820         cr0 &= ~CR0_RESERVED_BITS;
 821
 822         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 823                 return 1;
 824
 825         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 826                 return 1;
 827
 828 #ifdef CONFIG_X86_64
 829         if ((vcpu->arch.efer & EFER_LME) && !is_paging(vcpu) &&
 830             (cr0 & X86_CR0_PG)) {
 831                 int cs_db, cs_l;
 832
 833                 if (!is_pae(vcpu))
 834                         return 1;
 835                 kvm_x86_ops.get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 836                 if (cs_l)
 837                         return 1;
 838         }
 839 #endif
 840         if (!(vcpu->arch.efer & EFER_LME) && (cr0 & X86_CR0_PG) &&
 841             is_pae(vcpu) && ((cr0 ^ old_cr0) & pdptr_bits) &&
 842             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu)))
 843                 return 1;
 844
 845         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 846                 return 1;
 847
 848         kvm_x86_ops.set_cr0(vcpu, cr0);
 849
 850         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 851                 kvm_clear_async_pf_completion_queue(vcpu);
 852                 kvm_async_pf_hash_reset(vcpu);
 853         }
 854
 855         if ((cr0 ^ old_cr0) & update_bits)
 856                 kvm_mmu_reset_context(vcpu);
 857
 858         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 859             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 860             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 861                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 862
 863         return 0;
 864 }
 865 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 866
 867 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 868 {
 869         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 870 }
 871 EXPORT_SYMBOL_GPL(kvm_lmsw);
 872
 873 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu)
 874 {
 875         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 876
 877                 if (vcpu->arch.xcr0 != host_xcr0)
 878                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 879
 880                 if (vcpu->arch.xsaves_enabled &&
 881                     vcpu->arch.ia32_xss != host_xss)
 882                         wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss);
 883         }
 884
 885         if (static_cpu_has(X86_FEATURE_PKU) &&
 886             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 887              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU)) &&
 888             vcpu->arch.pkru != vcpu->arch.host_pkru)
 889                 __write_pkru(vcpu->arch.pkru);
 890 }
 891 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);
 892
 893 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)
 894 {
 895         if (static_cpu_has(X86_FEATURE_PKU) &&
 896             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 897              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU))) {
 898                 vcpu->arch.pkru = rdpkru();
 899                 if (vcpu->arch.pkru != vcpu->arch.host_pkru)
 900                         __write_pkru(vcpu->arch.host_pkru);
 901         }
 902
 903         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 904
 905                 if (vcpu->arch.xcr0 != host_xcr0)
 906                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 907
 908                 if (vcpu->arch.xsaves_enabled &&
 909                     vcpu->arch.ia32_xss != host_xss)
 910                         wrmsrl(MSR_IA32_XSS, host_xss);
 911         }
 912
 913 }
 914 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state);
 915
 916 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 917 {
 918         u64 xcr0 = xcr;
 919         u64 old_xcr0 = vcpu->arch.xcr0;
 920         u64 valid_bits;
 921
 922         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 923         if (index != XCR_XFEATURE_ENABLED_MASK)
 924                 return 1;
 925         if (!(xcr0 & XFEATURE_MASK_FP))
 926                 return 1;
 927         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 928                 return 1;
 929
 930         /*
 931          * Do not allow the guest to set bits that we do not support
 932          * saving.  However, xcr0 bit 0 is always set, even if the
 933          * emulated CPU does not support XSAVE (see fx_init).
 934          */
 935         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 936         if (xcr0 & ~valid_bits)
 937                 return 1;
 938
 939         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 940             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 941                 return 1;
 942
 943         if (xcr0 & XFEATURE_MASK_AVX512) {
 944                 if (!(xcr0 & XFEATURE_MASK_YMM))
 945                         return 1;
 946                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 947                         return 1;
 948         }
 949         vcpu->arch.xcr0 = xcr0;
 950
 951         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 952                 kvm_update_cpuid_runtime(vcpu);
 953         return 0;
 954 }
 955
 956 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 957 {
 958         if (kvm_x86_ops.get_cpl(vcpu) != 0 ||
 959             __kvm_set_xcr(vcpu, index, xcr)) {
 960                 kvm_inject_gp(vcpu, 0);
 961                 return 1;
 962         }
 963         return 0;
 964 }
 965 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 966
 967 bool kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 968 {
 969         if (cr4 & cr4_reserved_bits)
 970                 return false;
 971
 972         if (cr4 & vcpu->arch.cr4_guest_rsvd_bits)
 973                 return false;
 974
 975         return kvm_x86_ops.is_valid_cr4(vcpu, cr4);
 976 }
 977 EXPORT_SYMBOL_GPL(kvm_is_valid_cr4);
 978
 979 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 980 {
 981         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 982         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 983                                    X86_CR4_SMEP;
 984         unsigned long mmu_role_bits = pdptr_bits | X86_CR4_SMAP | X86_CR4_PKE;
 985
 986         if (!kvm_is_valid_cr4(vcpu, cr4))
 987                 return 1;
 988
 989         if (is_long_mode(vcpu)) {
 990                 if (!(cr4 & X86_CR4_PAE))
 991                         return 1;
 992                 if ((cr4 ^ old_cr4) & X86_CR4_LA57)
 993                         return 1;
 994         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 995                    && ((cr4 ^ old_cr4) & pdptr_bits)
 996                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 997                                    kvm_read_cr3(vcpu)))
 998                 return 1;
 999
1000         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
1001                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
1002                         return 1;
1003
1004                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1005                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
1006                         return 1;
1007         }
1008
1009         kvm_x86_ops.set_cr4(vcpu, cr4);
1010
1011         if (((cr4 ^ old_cr4) & mmu_role_bits) ||
1012             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
1013                 kvm_mmu_reset_context(vcpu);
1014
1015         if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
1016                 kvm_update_cpuid_runtime(vcpu);
1017
1018         return 0;
1019 }
1020 EXPORT_SYMBOL_GPL(kvm_set_cr4);
1021
1022 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1023 {
1024         bool skip_tlb_flush = false;
1025 #ifdef CONFIG_X86_64
1026         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
1027
1028         if (pcid_enabled) {
1029                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
1030                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
1031         }
1032 #endif
1033
1034         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
1035                 if (!skip_tlb_flush) {
1036                         kvm_mmu_sync_roots(vcpu);
1037                         kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1038                 }
1039                 return 0;
1040         }
1041
1042         if (is_long_mode(vcpu) &&
1043             (cr3 & vcpu->arch.cr3_lm_rsvd_bits))
1044                 return 1;
1045         else if (is_pae_paging(vcpu) &&
1046                  !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
1047                 return 1;
1048
1049         kvm_mmu_new_pgd(vcpu, cr3, skip_tlb_flush, skip_tlb_flush);
1050         vcpu->arch.cr3 = cr3;
1051         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
1052
1053         return 0;
1054 }
1055 EXPORT_SYMBOL_GPL(kvm_set_cr3);
1056
1057 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
1058 {
1059         if (cr8 & CR8_RESERVED_BITS)
1060                 return 1;
1061         if (lapic_in_kernel(vcpu))
1062                 kvm_lapic_set_tpr(vcpu, cr8);
1063         else
1064                 vcpu->arch.cr8 = cr8;
1065         return 0;
1066 }
1067 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1068
1069 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1070 {
1071         if (lapic_in_kernel(vcpu))
1072                 return kvm_lapic_get_cr8(vcpu);
1073         else
1074                 return vcpu->arch.cr8;
1075 }
1076 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1077
1078 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1079 {
1080         int i;
1081
1082         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1083                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1084                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1085                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
1086         }
1087 }
1088
1089 void kvm_update_dr7(struct kvm_vcpu *vcpu)
1090 {
1091         unsigned long dr7;
1092
1093         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1094                 dr7 = vcpu->arch.guest_debug_dr7;
1095         else
1096                 dr7 = vcpu->arch.dr7;
1097         kvm_x86_ops.set_dr7(vcpu, dr7);
1098         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1099         if (dr7 & DR7_BP_EN_MASK)
1100                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1101 }
1102 EXPORT_SYMBOL_GPL(kvm_update_dr7);
1103
1104 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1105 {
1106         u64 fixed = DR6_FIXED_1;
1107
1108         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1109                 fixed |= DR6_RTM;
1110         return fixed;
1111 }
1112
1113 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1114 {
1115         size_t size = ARRAY_SIZE(vcpu->arch.db);
1116
1117         switch (dr) {
1118         case 0 ... 3:
1119                 vcpu->arch.db[array_index_nospec(dr, size)] = val;
1120                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1121                         vcpu->arch.eff_db[dr] = val;
1122                 break;
1123         case 4:
1124         case 6:
1125                 if (!kvm_dr6_valid(val))
1126                         return -1; /* #GP */
1127                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1128                 break;
1129         case 5:
1130         default: /* 7 */
1131                 if (!kvm_dr7_valid(val))
1132                         return -1; /* #GP */
1133                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1134                 kvm_update_dr7(vcpu);
1135                 break;
1136         }
1137
1138         return 0;
1139 }
1140
1141 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1142 {
1143         if (__kvm_set_dr(vcpu, dr, val)) {
1144                 kvm_inject_gp(vcpu, 0);
1145                 return 1;
1146         }
1147         return 0;
1148 }
1149 EXPORT_SYMBOL_GPL(kvm_set_dr);
1150
1151 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1152 {
1153         size_t size = ARRAY_SIZE(vcpu->arch.db);
1154
1155         switch (dr) {
1156         case 0 ... 3:
1157                 *val = vcpu->arch.db[array_index_nospec(dr, size)];
1158                 break;
1159         case 4:
1160         case 6:
1161                 *val = vcpu->arch.dr6;
1162                 break;
1163         case 5:
1164         default: /* 7 */
1165                 *val = vcpu->arch.dr7;
1166                 break;
1167         }
1168         return 0;
1169 }
1170 EXPORT_SYMBOL_GPL(kvm_get_dr);
1171
1172 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
1173 {
1174         u32 ecx = kvm_rcx_read(vcpu);
1175         u64 data;
1176         int err;
1177
1178         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
1179         if (err)
1180                 return err;
1181         kvm_rax_write(vcpu, (u32)data);
1182         kvm_rdx_write(vcpu, data >> 32);
1183         return err;
1184 }
1185 EXPORT_SYMBOL_GPL(kvm_rdpmc);
1186
1187 /*
1188  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1189  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1190  *
1191  * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1192  * extract the supported MSRs from the related const lists.
1193  * msrs_to_save is selected from the msrs_to_save_all to reflect the
1194  * capabilities of the host cpu. This capabilities test skips MSRs that are
1195  * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1196  * may depend on host virtualization features rather than host cpu features.
1197  */
1198
1199 static const u32 msrs_to_save_all[] = {
1200         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1201         MSR_STAR,
1202 #ifdef CONFIG_X86_64
1203         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1204 #endif
1205         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1206         MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1207         MSR_IA32_SPEC_CTRL,
1208         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1209         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1210         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1211         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1212         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1213         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1214         MSR_IA32_UMWAIT_CONTROL,
1215
1216         MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1217         MSR_ARCH_PERFMON_FIXED_CTR0 + 2, MSR_ARCH_PERFMON_FIXED_CTR0 + 3,
1218         MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1219         MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1220         MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1221         MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1222         MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1223         MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1224         MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1225         MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1226         MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1227         MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1228         MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1229         MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1230         MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1231         MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1232         MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1233         MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1234         MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1235         MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1236         MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1237         MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1238 };
1239
1240 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
1241 static unsigned num_msrs_to_save;
1242
1243 static const u32 emulated_msrs_all[] = {
1244         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1245         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1246         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1247         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1248         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1249         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1250         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1251         HV_X64_MSR_RESET,
1252         HV_X64_MSR_VP_INDEX,
1253         HV_X64_MSR_VP_RUNTIME,
1254         HV_X64_MSR_SCONTROL,
1255         HV_X64_MSR_STIMER0_CONFIG,
1256         HV_X64_MSR_VP_ASSIST_PAGE,
1257         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1258         HV_X64_MSR_TSC_EMULATION_STATUS,
1259         HV_X64_MSR_SYNDBG_OPTIONS,
1260         HV_X64_MSR_SYNDBG_CONTROL, HV_X64_MSR_SYNDBG_STATUS,
1261         HV_X64_MSR_SYNDBG_SEND_BUFFER, HV_X64_MSR_SYNDBG_RECV_BUFFER,
1262         HV_X64_MSR_SYNDBG_PENDING_BUFFER,
1263
1264         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1265         MSR_KVM_PV_EOI_EN, MSR_KVM_ASYNC_PF_INT, MSR_KVM_ASYNC_PF_ACK,
1266
1267         MSR_IA32_TSC_ADJUST,
1268         MSR_IA32_TSCDEADLINE,
1269         MSR_IA32_ARCH_CAPABILITIES,
1270         MSR_IA32_PERF_CAPABILITIES,
1271         MSR_IA32_MISC_ENABLE,
1272         MSR_IA32_MCG_STATUS,
1273         MSR_IA32_MCG_CTL,
1274         MSR_IA32_MCG_EXT_CTL,
1275         MSR_IA32_SMBASE,
1276         MSR_SMI_COUNT,
1277         MSR_PLATFORM_INFO,
1278         MSR_MISC_FEATURES_ENABLES,
1279         MSR_AMD64_VIRT_SPEC_CTRL,
1280         MSR_IA32_POWER_CTL,
1281         MSR_IA32_UCODE_REV,
1282
1283         /*
1284          * The following list leaves out MSRs whose values are determined
1285          * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1286          * We always support the "true" VMX control MSRs, even if the host
1287          * processor does not, so I am putting these registers here rather
1288          * than in msrs_to_save_all.
1289          */
1290         MSR_IA32_VMX_BASIC,
1291         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1292         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1293         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1294         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1295         MSR_IA32_VMX_MISC,
1296         MSR_IA32_VMX_CR0_FIXED0,
1297         MSR_IA32_VMX_CR4_FIXED0,
1298         MSR_IA32_VMX_VMCS_ENUM,
1299         MSR_IA32_VMX_PROCBASED_CTLS2,
1300         MSR_IA32_VMX_EPT_VPID_CAP,
1301         MSR_IA32_VMX_VMFUNC,
1302
1303         MSR_K7_HWCR,
1304         MSR_KVM_POLL_CONTROL,
1305 };
1306
1307 static u32 emulated_msrs[ARRAY_SIZE(emulated_msrs_all)];
1308 static unsigned num_emulated_msrs;
1309
1310 /*
1311  * List of msr numbers which are used to expose MSR-based features that
1312  * can be used by a hypervisor to validate requested CPU features.
1313  */
1314 static const u32 msr_based_features_all[] = {
1315         MSR_IA32_VMX_BASIC,
1316         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1317         MSR_IA32_VMX_PINBASED_CTLS,
1318         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1319         MSR_IA32_VMX_PROCBASED_CTLS,
1320         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1321         MSR_IA32_VMX_EXIT_CTLS,
1322         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1323         MSR_IA32_VMX_ENTRY_CTLS,
1324         MSR_IA32_VMX_MISC,
1325         MSR_IA32_VMX_CR0_FIXED0,
1326         MSR_IA32_VMX_CR0_FIXED1,
1327         MSR_IA32_VMX_CR4_FIXED0,
1328         MSR_IA32_VMX_CR4_FIXED1,
1329         MSR_IA32_VMX_VMCS_ENUM,
1330         MSR_IA32_VMX_PROCBASED_CTLS2,
1331         MSR_IA32_VMX_EPT_VPID_CAP,
1332         MSR_IA32_VMX_VMFUNC,
1333
1334         MSR_F10H_DECFG,
1335         MSR_IA32_UCODE_REV,
1336         MSR_IA32_ARCH_CAPABILITIES,
1337         MSR_IA32_PERF_CAPABILITIES,
1338 };
1339
1340 static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all)];
1341 static unsigned int num_msr_based_features;
1342
1343 static u64 kvm_get_arch_capabilities(void)
1344 {
1345         u64 data = 0;
1346
1347         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1348                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1349
1350         /*
1351          * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1352          * the nested hypervisor runs with NX huge pages.  If it is not,
1353          * L1 is anyway vulnerable to ITLB_MULTIHIT explots from other
1354          * L1 guests, so it need not worry about its own (L2) guests.
1355          */
1356         data |= ARCH_CAP_PSCHANGE_MC_NO;
1357
1358         /*
1359          * If we're doing cache flushes (either "always" or "cond")
1360          * we will do one whenever the guest does a vmlaunch/vmresume.
1361          * If an outer hypervisor is doing the cache flush for us
1362          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1363          * capability to the guest too, and if EPT is disabled we're not
1364          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1365          * require a nested hypervisor to do a flush of its own.
1366          */
1367         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1368                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1369
1370         if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1371                 data |= ARCH_CAP_RDCL_NO;
1372         if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1373                 data |= ARCH_CAP_SSB_NO;
1374         if (!boot_cpu_has_bug(X86_BUG_MDS))
1375                 data |= ARCH_CAP_MDS_NO;
1376
1377         /*
1378          * On TAA affected systems:
1379          *      - nothing to do if TSX is disabled on the host.
1380          *      - we emulate TSX_CTRL if present on the host.
1381          *        This lets the guest use VERW to clear CPU buffers.
1382          */
1383         if (!boot_cpu_has(X86_FEATURE_RTM))
1384                 data &= ~(ARCH_CAP_TAA_NO | ARCH_CAP_TSX_CTRL_MSR);
1385         else if (!boot_cpu_has_bug(X86_BUG_TAA))
1386                 data |= ARCH_CAP_TAA_NO;
1387
1388         return data;
1389 }
1390
1391 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1392 {
1393         switch (msr->index) {
1394         case MSR_IA32_ARCH_CAPABILITIES:
1395                 msr->data = kvm_get_arch_capabilities();
1396                 break;
1397         case MSR_IA32_UCODE_REV:
1398                 rdmsrl_safe(msr->index, &msr->data);
1399                 break;
1400         default:
1401                 return kvm_x86_ops.get_msr_feature(msr);
1402         }
1403         return 0;
1404 }
1405
1406 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1407 {
1408         struct kvm_msr_entry msr;
1409         int r;
1410
1411         msr.index = index;
1412         r = kvm_get_msr_feature(&msr);
1413
1414         if (r == KVM_MSR_RET_INVALID) {
1415                 /* Unconditionally clear the output for simplicity */
1416                 *data = 0;
1417                 if (kvm_msr_ignored_check(vcpu, index, 0, false))
1418                         r = 0;
1419         }
1420
1421         if (r)
1422                 return r;
1423
1424         *data = msr.data;
1425
1426         return 0;
1427 }
1428
1429 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1430 {
1431         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1432                 return false;
1433
1434         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1435                 return false;
1436
1437         if (efer & (EFER_LME | EFER_LMA) &&
1438             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1439                 return false;
1440
1441         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1442                 return false;
1443
1444         return true;
1445
1446 }
1447 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1448 {
1449         if (efer & efer_reserved_bits)
1450                 return false;
1451
1452         return __kvm_valid_efer(vcpu, efer);
1453 }
1454 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1455
1456 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1457 {
1458         u64 old_efer = vcpu->arch.efer;
1459         u64 efer = msr_info->data;
1460         int r;
1461
1462         if (efer & efer_reserved_bits)
1463                 return 1;
1464
1465         if (!msr_info->host_initiated) {
1466                 if (!__kvm_valid_efer(vcpu, efer))
1467                         return 1;
1468
1469                 if (is_paging(vcpu) &&
1470                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1471                         return 1;
1472         }
1473
1474         efer &= ~EFER_LMA;
1475         efer |= vcpu->arch.efer & EFER_LMA;
1476
1477         r = kvm_x86_ops.set_efer(vcpu, efer);
1478         if (r) {
1479                 WARN_ON(r > 0);
1480                 return r;
1481         }
1482
1483         /* Update reserved bits */
1484         if ((efer ^ old_efer) & EFER_NX)
1485                 kvm_mmu_reset_context(vcpu);
1486
1487         return 0;
1488 }
1489
1490 void kvm_enable_efer_bits(u64 mask)
1491 {
1492        efer_reserved_bits &= ~mask;
1493 }
1494 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1495
1496 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type)
1497 {
1498         struct kvm *kvm = vcpu->kvm;
1499         struct msr_bitmap_range *ranges = kvm->arch.msr_filter.ranges;
1500         u32 count = kvm->arch.msr_filter.count;
1501         u32 i;
1502         bool r = kvm->arch.msr_filter.default_allow;
1503         int idx;
1504
1505         /* MSR filtering not set up or x2APIC enabled, allow everything */
1506         if (!count || (index >= 0x800 && index <= 0x8ff))
1507                 return true;
1508
1509         /* Prevent collision with set_msr_filter */
1510         idx = srcu_read_lock(&kvm->srcu);
1511
1512         for (i = 0; i < count; i++) {
1513                 u32 start = ranges[i].base;
1514                 u32 end = start + ranges[i].nmsrs;
1515                 u32 flags = ranges[i].flags;
1516                 unsigned long *bitmap = ranges[i].bitmap;
1517
1518                 if ((index >= start) && (index < end) && (flags & type)) {
1519                         r = !!test_bit(index - start, bitmap);
1520                         break;
1521                 }
1522         }
1523
1524         srcu_read_unlock(&kvm->srcu, idx);
1525
1526         return r;
1527 }
1528 EXPORT_SYMBOL_GPL(kvm_msr_allowed);
1529
1530 /*
1531  * Write @data into the MSR specified by @index.  Select MSR specific fault
1532  * checks are bypassed if @host_initiated is %true.
1533  * Returns 0 on success, non-0 otherwise.
1534  * Assumes vcpu_load() was already called.
1535  */
1536 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1537                          bool host_initiated)
1538 {
1539         struct msr_data msr;
1540
1541         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_WRITE))
1542                 return KVM_MSR_RET_FILTERED;
1543
1544         switch (index) {
1545         case MSR_FS_BASE:
1546         case MSR_GS_BASE:
1547         case MSR_KERNEL_GS_BASE:
1548         case MSR_CSTAR:
1549         case MSR_LSTAR:
1550                 if (is_noncanonical_address(data, vcpu))
1551                         return 1;
1552                 break;
1553         case MSR_IA32_SYSENTER_EIP:
1554         case MSR_IA32_SYSENTER_ESP:
1555                 /*
1556                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1557                  * non-canonical address is written on Intel but not on
1558                  * AMD (which ignores the top 32-bits, because it does
1559                  * not implement 64-bit SYSENTER).
1560                  *
1561                  * 64-bit code should hence be able to write a non-canonical
1562                  * value on AMD.  Making the address canonical ensures that
1563                  * vmentry does not fail on Intel after writing a non-canonical
1564                  * value, and that something deterministic happens if the guest
1565                  * invokes 64-bit SYSENTER.
1566                  */
1567                 data = get_canonical(data, vcpu_virt_addr_bits(vcpu));
1568         }
1569
1570         msr.data = data;
1571         msr.index = index;
1572         msr.host_initiated = host_initiated;
1573
1574         return kvm_x86_ops.set_msr(vcpu, &msr);
1575 }
1576
1577 static int kvm_set_msr_ignored_check(struct kvm_vcpu *vcpu,
1578                                      u32 index, u64 data, bool host_initiated)
1579 {
1580         int ret = __kvm_set_msr(vcpu, index, data, host_initiated);
1581
1582         if (ret == KVM_MSR_RET_INVALID)
1583                 if (kvm_msr_ignored_check(vcpu, index, data, true))
1584                         ret = 0;
1585
1586         return ret;
1587 }
1588
1589 /*
1590  * Read the MSR specified by @index into @data.  Select MSR specific fault
1591  * checks are bypassed if @host_initiated is %true.
1592  * Returns 0 on success, non-0 otherwise.
1593  * Assumes vcpu_load() was already called.
1594  */
1595 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1596                   bool host_initiated)
1597 {
1598         struct msr_data msr;
1599         int ret;
1600
1601         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_READ))
1602                 return KVM_MSR_RET_FILTERED;
1603
1604         msr.index = index;
1605         msr.host_initiated = host_initiated;
1606
1607         ret = kvm_x86_ops.get_msr(vcpu, &msr);
1608         if (!ret)
1609                 *data = msr.data;
1610         return ret;
1611 }
1612
1613 static int kvm_get_msr_ignored_check(struct kvm_vcpu *vcpu,
1614                                      u32 index, u64 *data, bool host_initiated)
1615 {
1616         int ret = __kvm_get_msr(vcpu, index, data, host_initiated);
1617
1618         if (ret == KVM_MSR_RET_INVALID) {
1619                 /* Unconditionally clear *data for simplicity */
1620                 *data = 0;
1621                 if (kvm_msr_ignored_check(vcpu, index, 0, false))
1622                         ret = 0;
1623         }
1624
1625         return ret;
1626 }
1627
1628 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1629 {
1630         return kvm_get_msr_ignored_check(vcpu, index, data, false);
1631 }
1632 EXPORT_SYMBOL_GPL(kvm_get_msr);
1633
1634 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1635 {
1636         return kvm_set_msr_ignored_check(vcpu, index, data, false);
1637 }
1638 EXPORT_SYMBOL_GPL(kvm_set_msr);
1639
1640 static int complete_emulated_msr(struct kvm_vcpu *vcpu, bool is_read)
1641 {
1642         if (vcpu->run->msr.error) {
1643                 kvm_inject_gp(vcpu, 0);
1644                 return 1;
1645         } else if (is_read) {
1646                 kvm_rax_write(vcpu, (u32)vcpu->run->msr.data);
1647                 kvm_rdx_write(vcpu, vcpu->run->msr.data >> 32);
1648         }
1649
1650         return kvm_skip_emulated_instruction(vcpu);
1651 }
1652
1653 static int complete_emulated_rdmsr(struct kvm_vcpu *vcpu)
1654 {
1655         return complete_emulated_msr(vcpu, true);
1656 }
1657
1658 static int complete_emulated_wrmsr(struct kvm_vcpu *vcpu)
1659 {
1660         return complete_emulated_msr(vcpu, false);
1661 }
1662
1663 static u64 kvm_msr_reason(int r)
1664 {
1665         switch (r) {
1666         case KVM_MSR_RET_INVALID:
1667                 return KVM_MSR_EXIT_REASON_UNKNOWN;
1668         case KVM_MSR_RET_FILTERED:
1669                 return KVM_MSR_EXIT_REASON_FILTER;
1670         default:
1671                 return KVM_MSR_EXIT_REASON_INVAL;
1672         }
1673 }
1674
1675 static int kvm_msr_user_space(struct kvm_vcpu *vcpu, u32 index,
1676                               u32 exit_reason, u64 data,
1677                               int (*completion)(struct kvm_vcpu *vcpu),
1678                               int r)
1679 {
1680         u64 msr_reason = kvm_msr_reason(r);
1681
1682         /* Check if the user wanted to know about this MSR fault */
1683         if (!(vcpu->kvm->arch.user_space_msr_mask & msr_reason))
1684                 return 0;
1685
1686         vcpu->run->exit_reason = exit_reason;
1687         vcpu->run->msr.error = 0;
1688         memset(vcpu->run->msr.pad, 0, sizeof(vcpu->run->msr.pad));
1689         vcpu->run->msr.reason = msr_reason;
1690         vcpu->run->msr.index = index;
1691         vcpu->run->msr.data = data;
1692         vcpu->arch.complete_userspace_io = completion;
1693
1694         return 1;
1695 }
1696
1697 static int kvm_get_msr_user_space(struct kvm_vcpu *vcpu, u32 index, int r)
1698 {
1699         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_RDMSR, 0,
1700                                    complete_emulated_rdmsr, r);
1701 }
1702
1703 static int kvm_set_msr_user_space(struct kvm_vcpu *vcpu, u32 index, u64 data, int r)
1704 {
1705         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_WRMSR, data,
1706                                    complete_emulated_wrmsr, r);
1707 }
1708
1709 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1710 {
1711         u32 ecx = kvm_rcx_read(vcpu);
1712         u64 data;
1713         int r;
1714
1715         r = kvm_get_msr(vcpu, ecx, &data);
1716
1717         /* MSR read failed? See if we should ask user space */
1718         if (r && kvm_get_msr_user_space(vcpu, ecx, r)) {
1719                 /* Bounce to user space */
1720                 return 0;
1721         }
1722
1723         /* MSR read failed? Inject a #GP */
1724         if (r) {
1725                 trace_kvm_msr_read_ex(ecx);
1726                 kvm_inject_gp(vcpu, 0);
1727                 return 1;
1728         }
1729
1730         trace_kvm_msr_read(ecx, data);
1731
1732         kvm_rax_write(vcpu, data & -1u);
1733         kvm_rdx_write(vcpu, (data >> 32) & -1u);
1734         return kvm_skip_emulated_instruction(vcpu);
1735 }
1736 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
1737
1738 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
1739 {
1740         u32 ecx = kvm_rcx_read(vcpu);
1741         u64 data = kvm_read_edx_eax(vcpu);
1742         int r;
1743
1744         r = kvm_set_msr(vcpu, ecx, data);
1745
1746         /* MSR write failed? See if we should ask user space */
1747         if (r && kvm_set_msr_user_space(vcpu, ecx, data, r))
1748                 /* Bounce to user space */
1749                 return 0;
1750
1751         /* Signal all other negative errors to userspace */
1752         if (r < 0)
1753                 return r;
1754
1755         /* MSR write failed? Inject a #GP */
1756         if (r > 0) {
1757                 trace_kvm_msr_write_ex(ecx, data);
1758                 kvm_inject_gp(vcpu, 0);
1759                 return 1;
1760         }
1761
1762         trace_kvm_msr_write(ecx, data);
1763         return kvm_skip_emulated_instruction(vcpu);
1764 }
1765 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
1766
1767 bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu)
1768 {
1769         return vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu) ||
1770                 xfer_to_guest_mode_work_pending();
1771 }
1772 EXPORT_SYMBOL_GPL(kvm_vcpu_exit_request);
1773
1774 /*
1775  * The fast path for frequent and performance sensitive wrmsr emulation,
1776  * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
1777  * the latency of virtual IPI by avoiding the expensive bits of transitioning
1778  * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
1779  * other cases which must be called after interrupts are enabled on the host.
1780  */
1781 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data)
1782 {
1783         if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(vcpu->arch.apic))
1784                 return 1;
1785
1786         if (((data & APIC_SHORT_MASK) == APIC_DEST_NOSHORT) &&
1787                 ((data & APIC_DEST_MASK) == APIC_DEST_PHYSICAL) &&
1788                 ((data & APIC_MODE_MASK) == APIC_DM_FIXED) &&
1789                 ((u32)(data >> 32) != X2APIC_BROADCAST)) {
1790
1791                 data &= ~(1 << 12);
1792                 kvm_apic_send_ipi(vcpu->arch.apic, (u32)data, (u32)(data >> 32));
1793                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR2, (u32)(data >> 32));
1794                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR, (u32)data);
1795                 trace_kvm_apic_write(APIC_ICR, (u32)data);
1796                 return 0;
1797         }
1798
1799         return 1;
1800 }
1801
1802 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu *vcpu, u64 data)
1803 {
1804         if (!kvm_can_use_hv_timer(vcpu))
1805                 return 1;
1806
1807         kvm_set_lapic_tscdeadline_msr(vcpu, data);
1808         return 0;
1809 }
1810
1811 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
1812 {
1813         u32 msr = kvm_rcx_read(vcpu);
1814         u64 data;
1815         fastpath_t ret = EXIT_FASTPATH_NONE;
1816
1817         switch (msr) {
1818         case APIC_BASE_MSR + (APIC_ICR >> 4):
1819                 data = kvm_read_edx_eax(vcpu);
1820                 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu, data)) {
1821                         kvm_skip_emulated_instruction(vcpu);
1822                         ret = EXIT_FASTPATH_EXIT_HANDLED;
1823                 }
1824                 break;
1825         case MSR_IA32_TSCDEADLINE:
1826                 data = kvm_read_edx_eax(vcpu);
1827                 if (!handle_fastpath_set_tscdeadline(vcpu, data)) {
1828                         kvm_skip_emulated_instruction(vcpu);
1829                         ret = EXIT_FASTPATH_REENTER_GUEST;
1830                 }
1831                 break;
1832         default:
1833                 break;
1834         }
1835
1836         if (ret != EXIT_FASTPATH_NONE)
1837                 trace_kvm_msr_write(msr, data);
1838
1839         return ret;
1840 }
1841 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff);
1842
1843 /*
1844  * Adapt set_msr() to msr_io()'s calling convention
1845  */
1846 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1847 {
1848         return kvm_get_msr_ignored_check(vcpu, index, data, true);
1849 }
1850
1851 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1852 {
1853         return kvm_set_msr_ignored_check(vcpu, index, *data, true);
1854 }
1855
1856 #ifdef CONFIG_X86_64
1857 struct pvclock_clock {
1858         int vclock_mode;
1859         u64 cycle_last;
1860         u64 mask;
1861         u32 mult;
1862         u32 shift;
1863         u64 base_cycles;
1864         u64 offset;
1865 };
1866
1867 struct pvclock_gtod_data {
1868         seqcount_t      seq;
1869
1870         struct pvclock_clock clock; /* extract of a clocksource struct */
1871         struct pvclock_clock raw_clock; /* extract of a clocksource struct */
1872
1873         ktime_t         offs_boot;
1874         u64             wall_time_sec;
1875 };
1876
1877 static struct pvclock_gtod_data pvclock_gtod_data;
1878
1879 static void update_pvclock_gtod(struct timekeeper *tk)
1880 {
1881         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1882
1883         write_seqcount_begin(&vdata->seq);
1884
1885         /* copy pvclock gtod data */
1886         vdata->clock.vclock_mode        = tk->tkr_mono.clock->vdso_clock_mode;
1887         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1888         vdata->clock.mask               = tk->tkr_mono.mask;
1889         vdata->clock.mult               = tk->tkr_mono.mult;
1890         vdata->clock.shift              = tk->tkr_mono.shift;
1891         vdata->clock.base_cycles        = tk->tkr_mono.xtime_nsec;
1892         vdata->clock.offset             = tk->tkr_mono.base;
1893
1894         vdata->raw_clock.vclock_mode    = tk->tkr_raw.clock->vdso_clock_mode;
1895         vdata->raw_clock.cycle_last     = tk->tkr_raw.cycle_last;
1896         vdata->raw_clock.mask           = tk->tkr_raw.mask;
1897         vdata->raw_clock.mult           = tk->tkr_raw.mult;
1898         vdata->raw_clock.shift          = tk->tkr_raw.shift;
1899         vdata->raw_clock.base_cycles    = tk->tkr_raw.xtime_nsec;
1900         vdata->raw_clock.offset         = tk->tkr_raw.base;
1901
1902         vdata->wall_time_sec            = tk->xtime_sec;
1903
1904         vdata->offs_boot                = tk->offs_boot;
1905
1906         write_seqcount_end(&vdata->seq);
1907 }
1908
1909 static s64 get_kvmclock_base_ns(void)
1910 {
1911         /* Count up from boot time, but with the frequency of the raw clock.  */
1912         return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data.offs_boot));
1913 }
1914 #else
1915 static s64 get_kvmclock_base_ns(void)
1916 {
1917         /* Master clock not used, so we can just use CLOCK_BOOTTIME.  */
1918         return ktime_get_boottime_ns();
1919 }
1920 #endif
1921
1922 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1923 {
1924         int version;
1925         int r;
1926         struct pvclock_wall_clock wc;
1927         u64 wall_nsec;
1928
1929         kvm->arch.wall_clock = wall_clock;
1930
1931         if (!wall_clock)
1932                 return;
1933
1934         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1935         if (r)
1936                 return;
1937
1938         if (version & 1)
1939                 ++version;  /* first time write, random junk */
1940
1941         ++version;
1942
1943         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1944                 return;
1945
1946         /*
1947          * The guest calculates current wall clock time by adding
1948          * system time (updated by kvm_guest_time_update below) to the
1949          * wall clock specified here.  We do the reverse here.
1950          */
1951         wall_nsec = ktime_get_real_ns() - get_kvmclock_ns(kvm);
1952
1953         wc.nsec = do_div(wall_nsec, 1000000000);
1954         wc.sec = (u32)wall_nsec; /* overflow in 2106 guest time */
1955         wc.version = version;
1956
1957         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1958
1959         version++;
1960         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1961 }
1962
1963 static void kvm_write_system_time(struct kvm_vcpu *vcpu, gpa_t system_time,
1964                                   bool old_msr, bool host_initiated)
1965 {
1966         struct kvm_arch *ka = &vcpu->kvm->arch;
1967
1968         if (vcpu->vcpu_id == 0 && !host_initiated) {
1969                 if (ka->boot_vcpu_runs_old_kvmclock != old_msr)
1970                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1971
1972                 ka->boot_vcpu_runs_old_kvmclock = old_msr;
1973         }
1974
1975         vcpu->arch.time = system_time;
1976         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
1977
1978         /* we verify if the enable bit is set... */
1979         vcpu->arch.pv_time_enabled = false;
1980         if (!(system_time & 1))
1981                 return;
1982
1983         if (!kvm_gfn_to_hva_cache_init(vcpu->kvm,
1984                                        &vcpu->arch.pv_time, system_time & ~1ULL,
1985                                        sizeof(struct pvclock_vcpu_time_info)))
1986                 vcpu->arch.pv_time_enabled = true;
1987
1988         return;
1989 }
1990
1991 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1992 {
1993         do_shl32_div32(dividend, divisor);
1994         return dividend;
1995 }
1996
1997 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1998                                s8 *pshift, u32 *pmultiplier)
1999 {
2000         uint64_t scaled64;
2001         int32_t  shift = 0;
2002         uint64_t tps64;
2003         uint32_t tps32;
2004
2005         tps64 = base_hz;
2006         scaled64 = scaled_hz;
2007         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
2008                 tps64 >>= 1;
2009                 shift--;
2010         }
2011
2012         tps32 = (uint32_t)tps64;
2013         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
2014                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
2015                         scaled64 >>= 1;
2016                 else
2017                         tps32 <<= 1;
2018                 shift++;
2019         }
2020
2021         *pshift = shift;
2022         *pmultiplier = div_frac(scaled64, tps32);
2023 }
2024
2025 #ifdef CONFIG_X86_64
2026 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
2027 #endif
2028
2029 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
2030 static unsigned long max_tsc_khz;
2031
2032 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
2033 {
2034         u64 v = (u64)khz * (1000000 + ppm);
2035         do_div(v, 1000000);
2036         return v;
2037 }
2038
2039 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
2040 {
2041         u64 ratio;
2042
2043         /* Guest TSC same frequency as host TSC? */
2044         if (!scale) {
2045                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
2046                 return 0;
2047         }
2048
2049         /* TSC scaling supported? */
2050         if (!kvm_has_tsc_control) {
2051                 if (user_tsc_khz > tsc_khz) {
2052                         vcpu->arch.tsc_catchup = 1;
2053                         vcpu->arch.tsc_always_catchup = 1;
2054                         return 0;
2055                 } else {
2056                         pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2057                         return -1;
2058                 }
2059         }
2060
2061         /* TSC scaling required  - calculate ratio */
2062         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
2063                                 user_tsc_khz, tsc_khz);
2064
2065         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
2066                 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2067                                     user_tsc_khz);
2068                 return -1;
2069         }
2070
2071         vcpu->arch.tsc_scaling_ratio = ratio;
2072         return 0;
2073 }
2074
2075 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
2076 {
2077         u32 thresh_lo, thresh_hi;
2078         int use_scaling = 0;
2079
2080         /* tsc_khz can be zero if TSC calibration fails */
2081         if (user_tsc_khz == 0) {
2082                 /* set tsc_scaling_ratio to a safe value */
2083                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
2084                 return -1;
2085         }
2086
2087         /* Compute a scale to convert nanoseconds in TSC cycles */
2088         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
2089                            &vcpu->arch.virtual_tsc_shift,
2090                            &vcpu->arch.virtual_tsc_mult);
2091         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
2092
2093         /*
2094          * Compute the variation in TSC rate which is acceptable
2095          * within the range of tolerance and decide if the
2096          * rate being applied is within that bounds of the hardware
2097          * rate.  If so, no scaling or compensation need be done.
2098          */
2099         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
2100         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
2101         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
2102                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
2103                 use_scaling = 1;
2104         }
2105         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
2106 }
2107
2108 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
2109 {
2110         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
2111                                       vcpu->arch.virtual_tsc_mult,
2112                                       vcpu->arch.virtual_tsc_shift);
2113         tsc += vcpu->arch.this_tsc_write;
2114         return tsc;
2115 }
2116
2117 static inline int gtod_is_based_on_tsc(int mode)
2118 {
2119         return mode == VDSO_CLOCKMODE_TSC || mode == VDSO_CLOCKMODE_HVCLOCK;
2120 }
2121
2122 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
2123 {
2124 #ifdef CONFIG_X86_64
2125         bool vcpus_matched;
2126         struct kvm_arch *ka = &vcpu->kvm->arch;
2127         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2128
2129         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2130                          atomic_read(&vcpu->kvm->online_vcpus));
2131
2132         /*
2133          * Once the masterclock is enabled, always perform request in
2134          * order to update it.
2135          *
2136          * In order to enable masterclock, the host clocksource must be TSC
2137          * and the vcpus need to have matched TSCs.  When that happens,
2138          * perform request to enable masterclock.
2139          */
2140         if (ka->use_master_clock ||
2141             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
2142                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2143
2144         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
2145                             atomic_read(&vcpu->kvm->online_vcpus),
2146                             ka->use_master_clock, gtod->clock.vclock_mode);
2147 #endif
2148 }
2149
2150 /*
2151  * Multiply tsc by a fixed point number represented by ratio.
2152  *
2153  * The most significant 64-N bits (mult) of ratio represent the
2154  * integral part of the fixed point number; the remaining N bits
2155  * (frac) represent the fractional part, ie. ratio represents a fixed
2156  * point number (mult + frac * 2^(-N)).
2157  *
2158  * N equals to kvm_tsc_scaling_ratio_frac_bits.
2159  */
2160 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
2161 {
2162         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
2163 }
2164
2165 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
2166 {
2167         u64 _tsc = tsc;
2168         u64 ratio = vcpu->arch.tsc_scaling_ratio;
2169
2170         if (ratio != kvm_default_tsc_scaling_ratio)
2171                 _tsc = __scale_tsc(ratio, tsc);
2172
2173         return _tsc;
2174 }
2175 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
2176
2177 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
2178 {
2179         u64 tsc;
2180
2181         tsc = kvm_scale_tsc(vcpu, rdtsc());
2182
2183         return target_tsc - tsc;
2184 }
2185
2186 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
2187 {
2188         return vcpu->arch.l1_tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
2189 }
2190 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
2191
2192 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
2193 {
2194         vcpu->arch.l1_tsc_offset = offset;
2195         vcpu->arch.tsc_offset = kvm_x86_ops.write_l1_tsc_offset(vcpu, offset);
2196 }
2197
2198 static inline bool kvm_check_tsc_unstable(void)
2199 {
2200 #ifdef CONFIG_X86_64
2201         /*
2202          * TSC is marked unstable when we're running on Hyper-V,
2203          * 'TSC page' clocksource is good.
2204          */
2205         if (pvclock_gtod_data.clock.vclock_mode == VDSO_CLOCKMODE_HVCLOCK)
2206                 return false;
2207 #endif
2208         return check_tsc_unstable();
2209 }
2210
2211 static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 data)
2212 {
2213         struct kvm *kvm = vcpu->kvm;
2214         u64 offset, ns, elapsed;
2215         unsigned long flags;
2216         bool matched;
2217         bool already_matched;
2218         bool synchronizing = false;
2219
2220         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
2221         offset = kvm_compute_tsc_offset(vcpu, data);
2222         ns = get_kvmclock_base_ns();
2223         elapsed = ns - kvm->arch.last_tsc_nsec;
2224
2225         if (vcpu->arch.virtual_tsc_khz) {
2226                 if (data == 0) {
2227                         /*
2228                          * detection of vcpu initialization -- need to sync
2229                          * with other vCPUs. This particularly helps to keep
2230                          * kvm_clock stable after CPU hotplug
2231                          */
2232                         synchronizing = true;
2233                 } else {
2234                         u64 tsc_exp = kvm->arch.last_tsc_write +
2235                                                 nsec_to_cycles(vcpu, elapsed);
2236                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
2237                         /*
2238                          * Special case: TSC write with a small delta (1 second)
2239                          * of virtual cycle time against real time is
2240                          * interpreted as an attempt to synchronize the CPU.
2241                          */
2242                         synchronizing = data < tsc_exp + tsc_hz &&
2243                                         data + tsc_hz > tsc_exp;
2244                 }
2245         }
2246
2247         /*
2248          * For a reliable TSC, we can match TSC offsets, and for an unstable
2249          * TSC, we add elapsed time in this computation.  We could let the
2250          * compensation code attempt to catch up if we fall behind, but
2251          * it's better to try to match offsets from the beginning.
2252          */
2253         if (synchronizing &&
2254             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
2255                 if (!kvm_check_tsc_unstable()) {
2256                         offset = kvm->arch.cur_tsc_offset;
2257                 } else {
2258                         u64 delta = nsec_to_cycles(vcpu, elapsed);
2259                         data += delta;
2260                         offset = kvm_compute_tsc_offset(vcpu, data);
2261                 }
2262                 matched = true;
2263                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
2264         } else {
2265                 /*
2266                  * We split periods of matched TSC writes into generations.
2267                  * For each generation, we track the original measured
2268                  * nanosecond time, offset, and write, so if TSCs are in
2269                  * sync, we can match exact offset, and if not, we can match
2270                  * exact software computation in compute_guest_tsc()
2271                  *
2272                  * These values are tracked in kvm->arch.cur_xxx variables.
2273                  */
2274                 kvm->arch.cur_tsc_generation++;
2275                 kvm->arch.cur_tsc_nsec = ns;
2276                 kvm->arch.cur_tsc_write = data;
2277                 kvm->arch.cur_tsc_offset = offset;
2278                 matched = false;
2279         }
2280
2281         /*
2282          * We also track th most recent recorded KHZ, write and time to
2283          * allow the matching interval to be extended at each write.
2284          */
2285         kvm->arch.last_tsc_nsec = ns;
2286         kvm->arch.last_tsc_write = data;
2287         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
2288
2289         vcpu->arch.last_guest_tsc = data;
2290
2291         /* Keep track of which generation this VCPU has synchronized to */
2292         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
2293         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
2294         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
2295
2296         kvm_vcpu_write_tsc_offset(vcpu, offset);
2297         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
2298
2299         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
2300         if (!matched) {
2301                 kvm->arch.nr_vcpus_matched_tsc = 0;
2302         } else if (!already_matched) {
2303                 kvm->arch.nr_vcpus_matched_tsc++;
2304         }
2305
2306         kvm_track_tsc_matching(vcpu);
2307         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
2308 }
2309
2310 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
2311                                            s64 adjustment)
2312 {
2313         u64 tsc_offset = vcpu->arch.l1_tsc_offset;
2314         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
2315 }
2316
2317 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
2318 {
2319         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
2320                 WARN_ON(adjustment < 0);
2321         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
2322         adjust_tsc_offset_guest(vcpu, adjustment);
2323 }
2324
2325 #ifdef CONFIG_X86_64
2326
2327 static u64 read_tsc(void)
2328 {
2329         u64 ret = (u64)rdtsc_ordered();
2330         u64 last = pvclock_gtod_data.clock.cycle_last;
2331
2332         if (likely(ret >= last))
2333                 return ret;
2334
2335         /*
2336          * GCC likes to generate cmov here, but this branch is extremely
2337          * predictable (it's just a function of time and the likely is
2338          * very likely) and there's a data dependence, so force GCC
2339          * to generate a branch instead.  I don't barrier() because
2340          * we don't actually need a barrier, and if this function
2341          * ever gets inlined it will generate worse code.
2342          */
2343         asm volatile ("");
2344         return last;
2345 }
2346
2347 static inline u64 vgettsc(struct pvclock_clock *clock, u64 *tsc_timestamp,
2348                           int *mode)
2349 {
2350         long v;
2351         u64 tsc_pg_val;
2352
2353         switch (clock->vclock_mode) {
2354         case VDSO_CLOCKMODE_HVCLOCK:
2355                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2356                                                   tsc_timestamp);
2357                 if (tsc_pg_val != U64_MAX) {
2358                         /* TSC page valid */
2359                         *mode = VDSO_CLOCKMODE_HVCLOCK;
2360                         v = (tsc_pg_val - clock->cycle_last) &
2361                                 clock->mask;
2362                 } else {
2363                         /* TSC page invalid */
2364                         *mode = VDSO_CLOCKMODE_NONE;
2365                 }
2366                 break;
2367         case VDSO_CLOCKMODE_TSC:
2368                 *mode = VDSO_CLOCKMODE_TSC;
2369                 *tsc_timestamp = read_tsc();
2370                 v = (*tsc_timestamp - clock->cycle_last) &
2371                         clock->mask;
2372                 break;
2373         default:
2374                 *mode = VDSO_CLOCKMODE_NONE;
2375         }
2376
2377         if (*mode == VDSO_CLOCKMODE_NONE)
2378                 *tsc_timestamp = v = 0;
2379
2380         return v * clock->mult;
2381 }
2382
2383 static int do_monotonic_raw(s64 *t, u64 *tsc_timestamp)
2384 {
2385         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2386         unsigned long seq;
2387         int mode;
2388         u64 ns;
2389
2390         do {
2391                 seq = read_seqcount_begin(&gtod->seq);
2392                 ns = gtod->raw_clock.base_cycles;
2393                 ns += vgettsc(&gtod->raw_clock, tsc_timestamp, &mode);
2394                 ns >>= gtod->raw_clock.shift;
2395                 ns += ktime_to_ns(ktime_add(gtod->raw_clock.offset, gtod->offs_boot));
2396         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2397         *t = ns;
2398
2399         return mode;
2400 }
2401
2402 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2403 {
2404         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2405         unsigned long seq;
2406         int mode;
2407         u64 ns;
2408
2409         do {
2410                 seq = read_seqcount_begin(&gtod->seq);
2411                 ts->tv_sec = gtod->wall_time_sec;
2412                 ns = gtod->clock.base_cycles;
2413                 ns += vgettsc(&gtod->clock, tsc_timestamp, &mode);
2414                 ns >>= gtod->clock.shift;
2415         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2416
2417         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2418         ts->tv_nsec = ns;
2419
2420         return mode;
2421 }
2422
2423 /* returns true if host is using TSC based clocksource */
2424 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2425 {
2426         /* checked again under seqlock below */
2427         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2428                 return false;
2429
2430         return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns,
2431                                                       tsc_timestamp));
2432 }
2433
2434 /* returns true if host is using TSC based clocksource */
2435 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2436                                            u64 *tsc_timestamp)
2437 {
2438         /* checked again under seqlock below */
2439         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2440                 return false;
2441
2442         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2443 }
2444 #endif
2445
2446 /*
2447  *
2448  * Assuming a stable TSC across physical CPUS, and a stable TSC
2449  * across virtual CPUs, the following condition is possible.
2450  * Each numbered line represents an event visible to both
2451  * CPUs at the next numbered event.
2452  *
2453  * "timespecX" represents host monotonic time. "tscX" represents
2454  * RDTSC value.
2455  *
2456  *              VCPU0 on CPU0           |       VCPU1 on CPU1
2457  *
2458  * 1.  read timespec0,tsc0
2459  * 2.                                   | timespec1 = timespec0 + N
2460  *                                      | tsc1 = tsc0 + M
2461  * 3. transition to guest               | transition to guest
2462  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2463  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
2464  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2465  *
2466  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2467  *
2468  *      - ret0 < ret1
2469  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2470  *              ...
2471  *      - 0 < N - M => M < N
2472  *
2473  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2474  * always the case (the difference between two distinct xtime instances
2475  * might be smaller then the difference between corresponding TSC reads,
2476  * when updating guest vcpus pvclock areas).
2477  *
2478  * To avoid that problem, do not allow visibility of distinct
2479  * system_timestamp/tsc_timestamp values simultaneously: use a master
2480  * copy of host monotonic time values. Update that master copy
2481  * in lockstep.
2482  *
2483  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2484  *
2485  */
2486
2487 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2488 {
2489 #ifdef CONFIG_X86_64
2490         struct kvm_arch *ka = &kvm->arch;
2491         int vclock_mode;
2492         bool host_tsc_clocksource, vcpus_matched;
2493
2494         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2495                         atomic_read(&kvm->online_vcpus));
2496
2497         /*
2498          * If the host uses TSC clock, then passthrough TSC as stable
2499          * to the guest.
2500          */
2501         host_tsc_clocksource = kvm_get_time_and_clockread(
2502                                         &ka->master_kernel_ns,
2503                                         &ka->master_cycle_now);
2504
2505         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2506                                 && !ka->backwards_tsc_observed
2507                                 && !ka->boot_vcpu_runs_old_kvmclock;
2508
2509         if (ka->use_master_clock)
2510                 atomic_set(&kvm_guest_has_master_clock, 1);
2511
2512         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2513         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2514                                         vcpus_matched);
2515 #endif
2516 }
2517
2518 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2519 {
2520         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2521 }
2522
2523 static void kvm_gen_update_masterclock(struct kvm *kvm)
2524 {
2525 #ifdef CONFIG_X86_64
2526         int i;
2527         struct kvm_vcpu *vcpu;
2528         struct kvm_arch *ka = &kvm->arch;
2529
2530         spin_lock(&ka->pvclock_gtod_sync_lock);
2531         kvm_make_mclock_inprogress_request(kvm);
2532         /* no guest entries from this point */
2533         pvclock_update_vm_gtod_copy(kvm);
2534
2535         kvm_for_each_vcpu(i, vcpu, kvm)
2536                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2537
2538         /* guest entries allowed */
2539         kvm_for_each_vcpu(i, vcpu, kvm)
2540                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2541
2542         spin_unlock(&ka->pvclock_gtod_sync_lock);
2543 #endif
2544 }
2545
2546 u64 get_kvmclock_ns(struct kvm *kvm)
2547 {
2548         struct kvm_arch *ka = &kvm->arch;
2549         struct pvclock_vcpu_time_info hv_clock;
2550         u64 ret;
2551
2552         spin_lock(&ka->pvclock_gtod_sync_lock);
2553         if (!ka->use_master_clock) {
2554                 spin_unlock(&ka->pvclock_gtod_sync_lock);
2555                 return get_kvmclock_base_ns() + ka->kvmclock_offset;
2556         }
2557
2558         hv_clock.tsc_timestamp = ka->master_cycle_now;
2559         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2560         spin_unlock(&ka->pvclock_gtod_sync_lock);
2561
2562         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2563         get_cpu();
2564
2565         if (__this_cpu_read(cpu_tsc_khz)) {
2566                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2567                                    &hv_clock.tsc_shift,
2568                                    &hv_clock.tsc_to_system_mul);
2569                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2570         } else
2571                 ret = get_kvmclock_base_ns() + ka->kvmclock_offset;
2572
2573         put_cpu();
2574
2575         return ret;
2576 }
2577
2578 static void kvm_setup_pvclock_page(struct kvm_vcpu *v)
2579 {
2580         struct kvm_vcpu_arch *vcpu = &v->arch;
2581         struct pvclock_vcpu_time_info guest_hv_clock;
2582
2583         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
2584                 &guest_hv_clock, sizeof(guest_hv_clock))))
2585                 return;
2586
2587         /* This VCPU is paused, but it's legal for a guest to read another
2588          * VCPU's kvmclock, so we really have to follow the specification where
2589          * it says that version is odd if data is being modified, and even after
2590          * it is consistent.
2591          *
2592          * Version field updates must be kept separate.  This is because
2593          * kvm_write_guest_cached might use a "rep movs" instruction, and
2594          * writes within a string instruction are weakly ordered.  So there
2595          * are three writes overall.
2596          *
2597          * As a small optimization, only write the version field in the first
2598          * and third write.  The vcpu->pv_time cache is still valid, because the
2599          * version field is the first in the struct.
2600          */
2601         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2602
2603         if (guest_hv_clock.version & 1)
2604                 ++guest_hv_clock.version;  /* first time write, random junk */
2605
2606         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2607         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2608                                 &vcpu->hv_clock,
2609                                 sizeof(vcpu->hv_clock.version));
2610
2611         smp_wmb();
2612
2613         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2614         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2615
2616         if (vcpu->pvclock_set_guest_stopped_request) {
2617                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2618                 vcpu->pvclock_set_guest_stopped_request = false;
2619         }
2620
2621         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2622
2623         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2624                                 &vcpu->hv_clock,
2625                                 sizeof(vcpu->hv_clock));
2626
2627         smp_wmb();
2628
2629         vcpu->hv_clock.version++;
2630         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2631                                 &vcpu->hv_clock,
2632                                 sizeof(vcpu->hv_clock.version));
2633 }
2634
2635 static int kvm_guest_time_update(struct kvm_vcpu *v)
2636 {
2637         unsigned long flags, tgt_tsc_khz;
2638         struct kvm_vcpu_arch *vcpu = &v->arch;
2639         struct kvm_arch *ka = &v->kvm->arch;
2640         s64 kernel_ns;
2641         u64 tsc_timestamp, host_tsc;
2642         u8 pvclock_flags;
2643         bool use_master_clock;
2644
2645         kernel_ns = 0;
2646         host_tsc = 0;
2647
2648         /*
2649          * If the host uses TSC clock, then passthrough TSC as stable
2650          * to the guest.
2651          */
2652         spin_lock(&ka->pvclock_gtod_sync_lock);
2653         use_master_clock = ka->use_master_clock;
2654         if (use_master_clock) {
2655                 host_tsc = ka->master_cycle_now;
2656                 kernel_ns = ka->master_kernel_ns;
2657         }
2658         spin_unlock(&ka->pvclock_gtod_sync_lock);
2659
2660         /* Keep irq disabled to prevent changes to the clock */
2661         local_irq_save(flags);
2662         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2663         if (unlikely(tgt_tsc_khz == 0)) {
2664                 local_irq_restore(flags);
2665                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2666                 return 1;
2667         }
2668         if (!use_master_clock) {
2669                 host_tsc = rdtsc();
2670                 kernel_ns = get_kvmclock_base_ns();
2671         }
2672
2673         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2674
2675         /*
2676          * We may have to catch up the TSC to match elapsed wall clock
2677          * time for two reasons, even if kvmclock is used.
2678          *   1) CPU could have been running below the maximum TSC rate
2679          *   2) Broken TSC compensation resets the base at each VCPU
2680          *      entry to avoid unknown leaps of TSC even when running
2681          *      again on the same CPU.  This may cause apparent elapsed
2682          *      time to disappear, and the guest to stand still or run
2683          *      very slowly.
2684          */
2685         if (vcpu->tsc_catchup) {
2686                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2687                 if (tsc > tsc_timestamp) {
2688                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2689                         tsc_timestamp = tsc;
2690                 }
2691         }
2692
2693         local_irq_restore(flags);
2694
2695         /* With all the info we got, fill in the values */
2696
2697         if (kvm_has_tsc_control)
2698                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
2699
2700         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2701                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2702                                    &vcpu->hv_clock.tsc_shift,
2703                                    &vcpu->hv_clock.tsc_to_system_mul);
2704                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2705         }
2706
2707         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2708         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2709         vcpu->last_guest_tsc = tsc_timestamp;
2710
2711         /* If the host uses TSC clocksource, then it is stable */
2712         pvclock_flags = 0;
2713         if (use_master_clock)
2714                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2715
2716         vcpu->hv_clock.flags = pvclock_flags;
2717
2718         if (vcpu->pv_time_enabled)
2719                 kvm_setup_pvclock_page(v);
2720         if (v == kvm_get_vcpu(v->kvm, 0))
2721                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2722         return 0;
2723 }
2724
2725 /*
2726  * kvmclock updates which are isolated to a given vcpu, such as
2727  * vcpu->cpu migration, should not allow system_timestamp from
2728  * the rest of the vcpus to remain static. Otherwise ntp frequency
2729  * correction applies to one vcpu's system_timestamp but not
2730  * the others.
2731  *
2732  * So in those cases, request a kvmclock update for all vcpus.
2733  * We need to rate-limit these requests though, as they can
2734  * considerably slow guests that have a large number of vcpus.
2735  * The time for a remote vcpu to update its kvmclock is bound
2736  * by the delay we use to rate-limit the updates.
2737  */
2738
2739 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2740
2741 static void kvmclock_update_fn(struct work_struct *work)
2742 {
2743         int i;
2744         struct delayed_work *dwork = to_delayed_work(work);
2745         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2746                                            kvmclock_update_work);
2747         struct kvm *kvm = container_of(ka, struct kvm, arch);
2748         struct kvm_vcpu *vcpu;
2749
2750         kvm_for_each_vcpu(i, vcpu, kvm) {
2751                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2752                 kvm_vcpu_kick(vcpu);
2753         }
2754 }
2755
2756 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2757 {
2758         struct kvm *kvm = v->kvm;
2759
2760         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2761         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2762                                         KVMCLOCK_UPDATE_DELAY);
2763 }
2764
2765 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2766
2767 static void kvmclock_sync_fn(struct work_struct *work)
2768 {
2769         struct delayed_work *dwork = to_delayed_work(work);
2770         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2771                                            kvmclock_sync_work);
2772         struct kvm *kvm = container_of(ka, struct kvm, arch);
2773
2774         if (!kvmclock_periodic_sync)
2775                 return;
2776
2777         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2778         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2779                                         KVMCLOCK_SYNC_PERIOD);
2780 }
2781
2782 /*
2783  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
2784  */
2785 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
2786 {
2787         /* McStatusWrEn enabled? */
2788         if (guest_cpuid_is_amd_or_hygon(vcpu))
2789                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
2790
2791         return false;
2792 }
2793
2794 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2795 {
2796         u64 mcg_cap = vcpu->arch.mcg_cap;
2797         unsigned bank_num = mcg_cap & 0xff;
2798         u32 msr = msr_info->index;
2799         u64 data = msr_info->data;
2800
2801         switch (msr) {
2802         case MSR_IA32_MCG_STATUS:
2803                 vcpu->arch.mcg_status = data;
2804                 break;
2805         case MSR_IA32_MCG_CTL:
2806                 if (!(mcg_cap & MCG_CTL_P) &&
2807                     (data || !msr_info->host_initiated))
2808                         return 1;
2809                 if (data != 0 && data != ~(u64)0)
2810                         return 1;
2811                 vcpu->arch.mcg_ctl = data;
2812                 break;
2813         default:
2814                 if (msr >= MSR_IA32_MC0_CTL &&
2815                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2816                         u32 offset = array_index_nospec(
2817                                 msr - MSR_IA32_MC0_CTL,
2818                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
2819
2820                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2821                          * some Linux kernels though clear bit 10 in bank 4 to
2822                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2823                          * this to avoid an uncatched #GP in the guest
2824                          */
2825                         if ((offset & 0x3) == 0 &&
2826                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2827                                 return -1;
2828
2829                         /* MCi_STATUS */
2830                         if (!msr_info->host_initiated &&
2831                             (offset & 0x3) == 1 && data != 0) {
2832                                 if (!can_set_mci_status(vcpu))
2833                                         return -1;
2834                         }
2835
2836                         vcpu->arch.mce_banks[offset] = data;
2837                         break;
2838                 }
2839                 return 1;
2840         }
2841         return 0;
2842 }
2843
2844 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
2845 {
2846         struct kvm *kvm = vcpu->kvm;
2847         int lm = is_long_mode(vcpu);
2848         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
2849                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
2850         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
2851                 : kvm->arch.xen_hvm_config.blob_size_32;
2852         u32 page_num = data & ~PAGE_MASK;
2853         u64 page_addr = data & PAGE_MASK;
2854         u8 *page;
2855
2856         if (page_num >= blob_size)
2857                 return 1;
2858
2859         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
2860         if (IS_ERR(page))
2861                 return PTR_ERR(page);
2862
2863         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE)) {
2864                 kfree(page);
2865                 return 1;
2866         }
2867         return 0;
2868 }
2869
2870 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu *vcpu)
2871 {
2872         u64 mask = KVM_ASYNC_PF_ENABLED | KVM_ASYNC_PF_DELIVERY_AS_INT;
2873
2874         return (vcpu->arch.apf.msr_en_val & mask) == mask;
2875 }
2876
2877 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2878 {
2879         gpa_t gpa = data & ~0x3f;
2880
2881         /* Bits 4:5 are reserved, Should be zero */
2882         if (data & 0x30)
2883                 return 1;
2884
2885         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_VMEXIT) &&
2886             (data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT))
2887                 return 1;
2888
2889         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT) &&
2890             (data & KVM_ASYNC_PF_DELIVERY_AS_INT))
2891                 return 1;
2892
2893         if (!lapic_in_kernel(vcpu))
2894                 return data ? 1 : 0;
2895
2896         vcpu->arch.apf.msr_en_val = data;
2897
2898         if (!kvm_pv_async_pf_enabled(vcpu)) {
2899                 kvm_clear_async_pf_completion_queue(vcpu);
2900                 kvm_async_pf_hash_reset(vcpu);
2901                 return 0;
2902         }
2903
2904         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2905                                         sizeof(u64)))
2906                 return 1;
2907
2908         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2909         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
2910
2911         kvm_async_pf_wakeup_all(vcpu);
2912
2913         return 0;
2914 }
2915
2916 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu *vcpu, u64 data)
2917 {
2918         /* Bits 8-63 are reserved */
2919         if (data >> 8)
2920                 return 1;
2921
2922         if (!lapic_in_kernel(vcpu))
2923                 return 1;
2924
2925         vcpu->arch.apf.msr_int_val = data;
2926
2927         vcpu->arch.apf.vec = data & KVM_ASYNC_PF_VEC_MASK;
2928
2929         return 0;
2930 }
2931
2932 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2933 {
2934         vcpu->arch.pv_time_enabled = false;
2935         vcpu->arch.time = 0;
2936 }
2937
2938 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu *vcpu)
2939 {
2940         ++vcpu->stat.tlb_flush;
2941         kvm_x86_ops.tlb_flush_all(vcpu);
2942 }
2943
2944 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu *vcpu)
2945 {
2946         ++vcpu->stat.tlb_flush;
2947         kvm_x86_ops.tlb_flush_guest(vcpu);
2948 }
2949
2950 static void record_steal_time(struct kvm_vcpu *vcpu)
2951 {
2952         struct kvm_host_map map;
2953         struct kvm_steal_time *st;
2954
2955         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2956                 return;
2957
2958         /* -EAGAIN is returned in atomic context so we can just return. */
2959         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT,
2960                         &map, &vcpu->arch.st.cache, false))
2961                 return;
2962
2963         st = map.hva +
2964                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
2965
2966         /*
2967          * Doing a TLB flush here, on the guest's behalf, can avoid
2968          * expensive IPIs.
2969          */
2970         if (guest_pv_has(vcpu, KVM_FEATURE_PV_TLB_FLUSH)) {
2971                 trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
2972                                        st->preempted & KVM_VCPU_FLUSH_TLB);
2973                 if (xchg(&st->preempted, 0) & KVM_VCPU_FLUSH_TLB)
2974                         kvm_vcpu_flush_tlb_guest(vcpu);
2975         }
2976
2977         vcpu->arch.st.preempted = 0;
2978
2979         if (st->version & 1)
2980                 st->version += 1;  /* first time write, random junk */
2981
2982         st->version += 1;
2983
2984         smp_wmb();
2985
2986         st->steal += current->sched_info.run_delay -
2987                 vcpu->arch.st.last_steal;
2988         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2989
2990         smp_wmb();
2991
2992         st->version += 1;
2993
2994         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, false);
2995 }
2996
2997 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2998 {
2999         bool pr = false;
3000         u32 msr = msr_info->index;
3001         u64 data = msr_info->data;
3002
3003         switch (msr) {
3004         case MSR_AMD64_NB_CFG:
3005         case MSR_IA32_UCODE_WRITE:
3006         case MSR_VM_HSAVE_PA:
3007         case MSR_AMD64_PATCH_LOADER:
3008         case MSR_AMD64_BU_CFG2:
3009         case MSR_AMD64_DC_CFG:
3010         case MSR_F15H_EX_CFG:
3011                 break;
3012
3013         case MSR_IA32_UCODE_REV:
3014                 if (msr_info->host_initiated)
3015                         vcpu->arch.microcode_version = data;
3016                 break;
3017         case MSR_IA32_ARCH_CAPABILITIES:
3018                 if (!msr_info->host_initiated)
3019                         return 1;
3020                 vcpu->arch.arch_capabilities = data;
3021                 break;
3022         case MSR_IA32_PERF_CAPABILITIES: {
3023                 struct kvm_msr_entry msr_ent = {.index = msr, .data = 0};
3024
3025                 if (!msr_info->host_initiated)
3026                         return 1;
3027                 if (guest_cpuid_has(vcpu, X86_FEATURE_PDCM) && kvm_get_msr_feature(&msr_ent))
3028                         return 1;
3029                 if (data & ~msr_ent.data)
3030                         return 1;
3031
3032                 vcpu->arch.perf_capabilities = data;
3033
3034                 return 0;
3035                 }
3036         case MSR_EFER:
3037                 return set_efer(vcpu, msr_info);
3038         case MSR_K7_HWCR:
3039                 data &= ~(u64)0x40;     /* ignore flush filter disable */
3040                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
3041                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
3042
3043                 /* Handle McStatusWrEn */
3044                 if (data == BIT_ULL(18)) {
3045                         vcpu->arch.msr_hwcr = data;
3046                 } else if (data != 0) {
3047                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
3048                                     data);
3049                         return 1;
3050                 }
3051                 break;
3052         case MSR_FAM10H_MMIO_CONF_BASE:
3053                 if (data != 0) {
3054                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
3055                                     "0x%llx\n", data);
3056                         return 1;
3057                 }
3058                 break;
3059         case MSR_IA32_DEBUGCTLMSR:
3060                 if (!data) {
3061                         /* We support the non-activated case already */
3062                         break;
3063                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
3064                         /* Values other than LBR and BTF are vendor-specific,
3065                            thus reserved and should throw a #GP */
3066                         return 1;
3067                 } else if (report_ignored_msrs)
3068                         vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
3069                                     __func__, data);
3070                 break;
3071         case 0x200 ... 0x2ff:
3072                 return kvm_mtrr_set_msr(vcpu, msr, data);
3073         case MSR_IA32_APICBASE:
3074                 return kvm_set_apic_base(vcpu, msr_info);
3075         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3076                 return kvm_x2apic_msr_write(vcpu, msr, data);
3077         case MSR_IA32_TSCDEADLINE:
3078                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
3079                 break;
3080         case MSR_IA32_TSC_ADJUST:
3081                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
3082                         if (!msr_info->host_initiated) {
3083                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
3084                                 adjust_tsc_offset_guest(vcpu, adj);
3085                         }
3086                         vcpu->arch.ia32_tsc_adjust_msr = data;
3087                 }
3088                 break;
3089         case MSR_IA32_MISC_ENABLE:
3090                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
3091                     ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
3092                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
3093                                 return 1;
3094                         vcpu->arch.ia32_misc_enable_msr = data;
3095                         kvm_update_cpuid_runtime(vcpu);
3096                 } else {
3097                         vcpu->arch.ia32_misc_enable_msr = data;
3098                 }
3099                 break;
3100         case MSR_IA32_SMBASE:
3101                 if (!msr_info->host_initiated)
3102                         return 1;
3103                 vcpu->arch.smbase = data;
3104                 break;
3105         case MSR_IA32_POWER_CTL:
3106                 vcpu->arch.msr_ia32_power_ctl = data;
3107                 break;
3108         case MSR_IA32_TSC:
3109                 if (msr_info->host_initiated) {
3110                         kvm_synchronize_tsc(vcpu, data);
3111                 } else {
3112                         u64 adj = kvm_compute_tsc_offset(vcpu, data) - vcpu->arch.l1_tsc_offset;
3113                         adjust_tsc_offset_guest(vcpu, adj);
3114                         vcpu->arch.ia32_tsc_adjust_msr += adj;
3115                 }
3116                 break;
3117         case MSR_IA32_XSS:
3118                 if (!msr_info->host_initiated &&
3119                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3120                         return 1;
3121                 /*
3122                  * KVM supports exposing PT to the guest, but does not support
3123                  * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3124                  * XSAVES/XRSTORS to save/restore PT MSRs.
3125                  */
3126                 if (data & ~supported_xss)
3127                         return 1;
3128                 vcpu->arch.ia32_xss = data;
3129                 break;
3130         case MSR_SMI_COUNT:
3131                 if (!msr_info->host_initiated)
3132                         return 1;
3133                 vcpu->arch.smi_count = data;
3134                 break;
3135         case MSR_KVM_WALL_CLOCK_NEW:
3136                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3137                         return 1;
3138
3139                 kvm_write_wall_clock(vcpu->kvm, data);
3140                 break;
3141         case MSR_KVM_WALL_CLOCK:
3142                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3143                         return 1;
3144
3145                 kvm_write_wall_clock(vcpu->kvm, data);
3146                 break;
3147         case MSR_KVM_SYSTEM_TIME_NEW:
3148                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3149                         return 1;
3150
3151                 kvm_write_system_time(vcpu, data, false, msr_info->host_initiated);
3152                 break;
3153         case MSR_KVM_SYSTEM_TIME:
3154                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3155                         return 1;
3156
3157                 kvm_write_system_time(vcpu, data, true,  msr_info->host_initiated);
3158                 break;
3159         case MSR_KVM_ASYNC_PF_EN:
3160                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3161                         return 1;
3162
3163                 if (kvm_pv_enable_async_pf(vcpu, data))
3164                         return 1;
3165                 break;
3166         case MSR_KVM_ASYNC_PF_INT:
3167                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3168                         return 1;
3169
3170                 if (kvm_pv_enable_async_pf_int(vcpu, data))
3171                         return 1;
3172                 break;
3173         case MSR_KVM_ASYNC_PF_ACK:
3174                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3175                         return 1;
3176                 if (data & 0x1) {
3177                         vcpu->arch.apf.pageready_pending = false;
3178                         kvm_check_async_pf_completion(vcpu);
3179                 }
3180                 break;
3181         case MSR_KVM_STEAL_TIME:
3182                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3183                         return 1;
3184
3185                 if (unlikely(!sched_info_on()))
3186                         return 1;
3187
3188                 if (data & KVM_STEAL_RESERVED_MASK)
3189                         return 1;
3190
3191                 vcpu->arch.st.msr_val = data;
3192
3193                 if (!(data & KVM_MSR_ENABLED))
3194                         break;
3195
3196                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3197
3198                 break;
3199         case MSR_KVM_PV_EOI_EN:
3200                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3201                         return 1;
3202
3203                 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
3204                         return 1;
3205                 break;
3206
3207         case MSR_KVM_POLL_CONTROL:
3208                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3209                         return 1;
3210
3211                 /* only enable bit supported */
3212                 if (data & (-1ULL << 1))
3213                         return 1;
3214
3215                 vcpu->arch.msr_kvm_poll_control = data;
3216                 break;
3217
3218         case MSR_IA32_MCG_CTL:
3219         case MSR_IA32_MCG_STATUS:
3220         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3221                 return set_msr_mce(vcpu, msr_info);
3222
3223         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3224         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3225                 pr = true;
3226                 fallthrough;
3227         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3228         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3229                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3230                         return kvm_pmu_set_msr(vcpu, msr_info);
3231
3232                 if (pr || data != 0)
3233                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
3234                                     "0x%x data 0x%llx\n", msr, data);
3235                 break;
3236         case MSR_K7_CLK_CTL:
3237                 /*
3238                  * Ignore all writes to this no longer documented MSR.
3239                  * Writes are only relevant for old K7 processors,
3240                  * all pre-dating SVM, but a recommended workaround from
3241                  * AMD for these chips. It is possible to specify the
3242                  * affected processor models on the command line, hence
3243                  * the need to ignore the workaround.
3244                  */
3245                 break;
3246         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3247         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3248         case HV_X64_MSR_SYNDBG_OPTIONS:
3249         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3250         case HV_X64_MSR_CRASH_CTL:
3251         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3252         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3253         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3254         case HV_X64_MSR_TSC_EMULATION_STATUS:
3255                 return kvm_hv_set_msr_common(vcpu, msr, data,
3256                                              msr_info->host_initiated);
3257         case MSR_IA32_BBL_CR_CTL3:
3258                 /* Drop writes to this legacy MSR -- see rdmsr
3259                  * counterpart for further detail.
3260                  */
3261                 if (report_ignored_msrs)
3262                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
3263                                 msr, data);
3264                 break;
3265         case MSR_AMD64_OSVW_ID_LENGTH:
3266                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3267                         return 1;
3268                 vcpu->arch.osvw.length = data;
3269                 break;
3270         case MSR_AMD64_OSVW_STATUS:
3271                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3272                         return 1;
3273                 vcpu->arch.osvw.status = data;
3274                 break;
3275         case MSR_PLATFORM_INFO:
3276                 if (!msr_info->host_initiated ||
3277                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
3278                      cpuid_fault_enabled(vcpu)))
3279                         return 1;
3280                 vcpu->arch.msr_platform_info = data;
3281                 break;
3282         case MSR_MISC_FEATURES_ENABLES:
3283                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
3284                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
3285                      !supports_cpuid_fault(vcpu)))
3286                         return 1;
3287                 vcpu->arch.msr_misc_features_enables = data;
3288                 break;
3289         default:
3290                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
3291                         return xen_hvm_config(vcpu, data);
3292                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3293                         return kvm_pmu_set_msr(vcpu, msr_info);
3294                 return KVM_MSR_RET_INVALID;
3295         }
3296         return 0;
3297 }
3298 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
3299
3300 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
3301 {
3302         u64 data;
3303         u64 mcg_cap = vcpu->arch.mcg_cap;
3304         unsigned bank_num = mcg_cap & 0xff;
3305
3306         switch (msr) {
3307         case MSR_IA32_P5_MC_ADDR:
3308         case MSR_IA32_P5_MC_TYPE:
3309                 data = 0;
3310                 break;
3311         case MSR_IA32_MCG_CAP:
3312                 data = vcpu->arch.mcg_cap;
3313                 break;
3314         case MSR_IA32_MCG_CTL:
3315                 if (!(mcg_cap & MCG_CTL_P) && !host)
3316                         return 1;
3317                 data = vcpu->arch.mcg_ctl;
3318                 break;
3319         case MSR_IA32_MCG_STATUS:
3320                 data = vcpu->arch.mcg_status;
3321                 break;
3322         default:
3323                 if (msr >= MSR_IA32_MC0_CTL &&
3324                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3325                         u32 offset = array_index_nospec(
3326                                 msr - MSR_IA32_MC0_CTL,
3327                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3328
3329                         data = vcpu->arch.mce_banks[offset];
3330                         break;
3331                 }
3332                 return 1;
3333         }
3334         *pdata = data;
3335         return 0;
3336 }
3337
3338 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3339 {
3340         switch (msr_info->index) {
3341         case MSR_IA32_PLATFORM_ID:
3342         case MSR_IA32_EBL_CR_POWERON:
3343         case MSR_IA32_DEBUGCTLMSR:
3344         case MSR_IA32_LASTBRANCHFROMIP:
3345         case MSR_IA32_LASTBRANCHTOIP:
3346         case MSR_IA32_LASTINTFROMIP:
3347         case MSR_IA32_LASTINTTOIP:
3348         case MSR_K8_SYSCFG:
3349         case MSR_K8_TSEG_ADDR:
3350         case MSR_K8_TSEG_MASK:
3351         case MSR_VM_HSAVE_PA:
3352         case MSR_K8_INT_PENDING_MSG:
3353         case MSR_AMD64_NB_CFG:
3354         case MSR_FAM10H_MMIO_CONF_BASE:
3355         case MSR_AMD64_BU_CFG2:
3356         case MSR_IA32_PERF_CTL:
3357         case MSR_AMD64_DC_CFG:
3358         case MSR_F15H_EX_CFG:
3359         /*
3360          * Intel Sandy Bridge CPUs must support the RAPL (running average power
3361          * limit) MSRs. Just return 0, as we do not want to expose the host
3362          * data here. Do not conditionalize this on CPUID, as KVM does not do
3363          * so for existing CPU-specific MSRs.
3364          */
3365         case MSR_RAPL_POWER_UNIT:
3366         case MSR_PP0_ENERGY_STATUS:     /* Power plane 0 (core) */
3367         case MSR_PP1_ENERGY_STATUS:     /* Power plane 1 (graphics uncore) */
3368         case MSR_PKG_ENERGY_STATUS:     /* Total package */
3369         case MSR_DRAM_ENERGY_STATUS:    /* DRAM controller */
3370                 msr_info->data = 0;
3371                 break;
3372         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
3373         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3374         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3375         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3376         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3377                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3378                         return kvm_pmu_get_msr(vcpu, msr_info);
3379                 msr_info->data = 0;
3380                 break;
3381         case MSR_IA32_UCODE_REV:
3382                 msr_info->data = vcpu->arch.microcode_version;
3383                 break;
3384         case MSR_IA32_ARCH_CAPABILITIES:
3385                 if (!msr_info->host_initiated &&
3386                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
3387                         return 1;
3388                 msr_info->data = vcpu->arch.arch_capabilities;
3389                 break;
3390         case MSR_IA32_PERF_CAPABILITIES:
3391                 if (!msr_info->host_initiated &&
3392                     !guest_cpuid_has(vcpu, X86_FEATURE_PDCM))
3393                         return 1;
3394                 msr_info->data = vcpu->arch.perf_capabilities;
3395                 break;
3396         case MSR_IA32_POWER_CTL:
3397                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
3398                 break;
3399         case MSR_IA32_TSC: {
3400                 /*
3401                  * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3402                  * even when not intercepted. AMD manual doesn't explicitly
3403                  * state this but appears to behave the same.
3404                  *
3405                  * On userspace reads and writes, however, we unconditionally
3406                  * return L1's TSC value to ensure backwards-compatible
3407                  * behavior for migration.
3408                  */
3409                 u64 tsc_offset = msr_info->host_initiated ? vcpu->arch.l1_tsc_offset :
3410                                                             vcpu->arch.tsc_offset;
3411
3412                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc()) + tsc_offset;
3413                 break;
3414         }
3415         case MSR_MTRRcap:
3416         case 0x200 ... 0x2ff:
3417                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
3418         case 0xcd: /* fsb frequency */
3419                 msr_info->data = 3;
3420                 break;
3421                 /*
3422                  * MSR_EBC_FREQUENCY_ID
3423                  * Conservative value valid for even the basic CPU models.
3424                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3425                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3426                  * and 266MHz for model 3, or 4. Set Core Clock
3427                  * Frequency to System Bus Frequency Ratio to 1 (bits
3428                  * 31:24) even though these are only valid for CPU
3429                  * models > 2, however guests may end up dividing or
3430                  * multiplying by zero otherwise.
3431                  */
3432         case MSR_EBC_FREQUENCY_ID:
3433                 msr_info->data = 1 << 24;
3434                 break;
3435         case MSR_IA32_APICBASE:
3436                 msr_info->data = kvm_get_apic_base(vcpu);
3437                 break;
3438         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3439                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
3440         case MSR_IA32_TSCDEADLINE:
3441                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
3442                 break;
3443         case MSR_IA32_TSC_ADJUST:
3444                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
3445                 break;
3446         case MSR_IA32_MISC_ENABLE:
3447                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
3448                 break;
3449         case MSR_IA32_SMBASE:
3450                 if (!msr_info->host_initiated)
3451                         return 1;
3452                 msr_info->data = vcpu->arch.smbase;
3453                 break;
3454         case MSR_SMI_COUNT:
3455                 msr_info->data = vcpu->arch.smi_count;
3456                 break;
3457         case MSR_IA32_PERF_STATUS:
3458                 /* TSC increment by tick */
3459                 msr_info->data = 1000ULL;
3460                 /* CPU multiplier */
3461                 msr_info->data |= (((uint64_t)4ULL) << 40);
3462                 break;
3463         case MSR_EFER:
3464                 msr_info->data = vcpu->arch.efer;
3465                 break;
3466         case MSR_KVM_WALL_CLOCK:
3467                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3468                         return 1;
3469
3470                 msr_info->data = vcpu->kvm->arch.wall_clock;
3471                 break;
3472         case MSR_KVM_WALL_CLOCK_NEW:
3473                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3474                         return 1;
3475
3476                 msr_info->data = vcpu->kvm->arch.wall_clock;
3477                 break;
3478         case MSR_KVM_SYSTEM_TIME:
3479                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3480                         return 1;
3481
3482                 msr_info->data = vcpu->arch.time;
3483                 break;
3484         case MSR_KVM_SYSTEM_TIME_NEW:
3485                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3486                         return 1;
3487
3488                 msr_info->data = vcpu->arch.time;
3489                 break;
3490         case MSR_KVM_ASYNC_PF_EN:
3491                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3492                         return 1;
3493
3494                 msr_info->data = vcpu->arch.apf.msr_en_val;
3495                 break;
3496         case MSR_KVM_ASYNC_PF_INT:
3497                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3498                         return 1;
3499
3500                 msr_info->data = vcpu->arch.apf.msr_int_val;
3501                 break;
3502         case MSR_KVM_ASYNC_PF_ACK:
3503                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3504                         return 1;
3505
3506                 msr_info->data = 0;
3507                 break;
3508         case MSR_KVM_STEAL_TIME:
3509                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3510                         return 1;
3511
3512                 msr_info->data = vcpu->arch.st.msr_val;
3513                 break;
3514         case MSR_KVM_PV_EOI_EN:
3515                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3516                         return 1;
3517
3518                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
3519                 break;
3520         case MSR_KVM_POLL_CONTROL:
3521                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3522                         return 1;
3523
3524                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
3525                 break;
3526         case MSR_IA32_P5_MC_ADDR:
3527         case MSR_IA32_P5_MC_TYPE:
3528         case MSR_IA32_MCG_CAP:
3529         case MSR_IA32_MCG_CTL:
3530         case MSR_IA32_MCG_STATUS:
3531         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3532                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
3533                                    msr_info->host_initiated);
3534         case MSR_IA32_XSS:
3535                 if (!msr_info->host_initiated &&
3536                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3537                         return 1;
3538                 msr_info->data = vcpu->arch.ia32_xss;
3539                 break;
3540         case MSR_K7_CLK_CTL:
3541                 /*
3542                  * Provide expected ramp-up count for K7. All other
3543                  * are set to zero, indicating minimum divisors for
3544                  * every field.
3545                  *
3546                  * This prevents guest kernels on AMD host with CPU
3547                  * type 6, model 8 and higher from exploding due to
3548                  * the rdmsr failing.
3549                  */
3550                 msr_info->data = 0x20000000;
3551                 break;
3552         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3553         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3554         case HV_X64_MSR_SYNDBG_OPTIONS:
3555         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3556         case HV_X64_MSR_CRASH_CTL:
3557         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3558         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3559         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3560         case HV_X64_MSR_TSC_EMULATION_STATUS:
3561                 return kvm_hv_get_msr_common(vcpu,
3562                                              msr_info->index, &msr_info->data,
3563                                              msr_info->host_initiated);
3564         case MSR_IA32_BBL_CR_CTL3:
3565                 /* This legacy MSR exists but isn't fully documented in current
3566                  * silicon.  It is however accessed by winxp in very narrow
3567                  * scenarios where it sets bit #19, itself documented as
3568                  * a "reserved" bit.  Best effort attempt to source coherent
3569                  * read data here should the balance of the register be
3570                  * interpreted by the guest:
3571                  *
3572                  * L2 cache control register 3: 64GB range, 256KB size,
3573                  * enabled, latency 0x1, configured
3574                  */
3575                 msr_info->data = 0xbe702111;
3576                 break;
3577         case MSR_AMD64_OSVW_ID_LENGTH:
3578                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3579                         return 1;
3580                 msr_info->data = vcpu->arch.osvw.length;
3581                 break;
3582         case MSR_AMD64_OSVW_STATUS:
3583                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3584                         return 1;
3585                 msr_info->data = vcpu->arch.osvw.status;
3586                 break;
3587         case MSR_PLATFORM_INFO:
3588                 if (!msr_info->host_initiated &&
3589                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
3590                         return 1;
3591                 msr_info->data = vcpu->arch.msr_platform_info;
3592                 break;
3593         case MSR_MISC_FEATURES_ENABLES:
3594                 msr_info->data = vcpu->arch.msr_misc_features_enables;
3595                 break;
3596         case MSR_K7_HWCR:
3597                 msr_info->data = vcpu->arch.msr_hwcr;
3598                 break;
3599         default:
3600                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3601                         return kvm_pmu_get_msr(vcpu, msr_info);
3602                 return KVM_MSR_RET_INVALID;
3603         }
3604         return 0;
3605 }
3606 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
3607
3608 /*
3609  * Read or write a bunch of msrs. All parameters are kernel addresses.
3610  *
3611  * @return number of msrs set successfully.
3612  */
3613 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
3614                     struct kvm_msr_entry *entries,
3615                     int (*do_msr)(struct kvm_vcpu *vcpu,
3616                                   unsigned index, u64 *data))
3617 {
3618         int i;
3619
3620         for (i = 0; i < msrs->nmsrs; ++i)
3621                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
3622                         break;
3623
3624         return i;
3625 }
3626
3627 /*
3628  * Read or write a bunch of msrs. Parameters are user addresses.
3629  *
3630  * @return number of msrs set successfully.
3631  */
3632 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
3633                   int (*do_msr)(struct kvm_vcpu *vcpu,
3634                                 unsigned index, u64 *data),
3635                   int writeback)
3636 {
3637         struct kvm_msrs msrs;
3638         struct kvm_msr_entry *entries;
3639         int r, n;
3640         unsigned size;
3641
3642         r = -EFAULT;
3643         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
3644                 goto out;
3645
3646         r = -E2BIG;
3647         if (msrs.nmsrs >= MAX_IO_MSRS)
3648                 goto out;
3649
3650         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
3651         entries = memdup_user(user_msrs->entries, size);
3652         if (IS_ERR(entries)) {
3653                 r = PTR_ERR(entries);
3654                 goto out;
3655         }
3656
3657         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
3658         if (r < 0)
3659                 goto out_free;
3660
3661         r = -EFAULT;
3662         if (writeback && copy_to_user(user_msrs->entries, entries, size))
3663                 goto out_free;
3664
3665         r = n;
3666
3667 out_free:
3668         kfree(entries);
3669 out:
3670         return r;
3671 }
3672
3673 static inline bool kvm_can_mwait_in_guest(void)
3674 {
3675         return boot_cpu_has(X86_FEATURE_MWAIT) &&
3676                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
3677                 boot_cpu_has(X86_FEATURE_ARAT);
3678 }
3679
3680 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu *vcpu,
3681                                             struct kvm_cpuid2 __user *cpuid_arg)
3682 {
3683         struct kvm_cpuid2 cpuid;
3684         int r;
3685
3686         r = -EFAULT;
3687         if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3688                 return r;
3689
3690         r = kvm_get_hv_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3691         if (r)
3692                 return r;
3693
3694         r = -EFAULT;
3695         if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3696                 return r;
3697
3698         return 0;
3699 }
3700
3701 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
3702 {
3703         int r = 0;
3704
3705         switch (ext) {
3706         case KVM_CAP_IRQCHIP:
3707         case KVM_CAP_HLT:
3708         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
3709         case KVM_CAP_SET_TSS_ADDR:
3710         case KVM_CAP_EXT_CPUID:
3711         case KVM_CAP_EXT_EMUL_CPUID:
3712         case KVM_CAP_CLOCKSOURCE:
3713         case KVM_CAP_PIT:
3714         case KVM_CAP_NOP_IO_DELAY:
3715         case KVM_CAP_MP_STATE:
3716         case KVM_CAP_SYNC_MMU:
3717         case KVM_CAP_USER_NMI:
3718         case KVM_CAP_REINJECT_CONTROL:
3719         case KVM_CAP_IRQ_INJECT_STATUS:
3720         case KVM_CAP_IOEVENTFD:
3721         case KVM_CAP_IOEVENTFD_NO_LENGTH:
3722         case KVM_CAP_PIT2:
3723         case KVM_CAP_PIT_STATE2:
3724         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
3725         case KVM_CAP_XEN_HVM:
3726         case KVM_CAP_VCPU_EVENTS:
3727         case KVM_CAP_HYPERV:
3728         case KVM_CAP_HYPERV_VAPIC:
3729         case KVM_CAP_HYPERV_SPIN:
3730         case KVM_CAP_HYPERV_SYNIC:
3731         case KVM_CAP_HYPERV_SYNIC2:
3732         case KVM_CAP_HYPERV_VP_INDEX:
3733         case KVM_CAP_HYPERV_EVENTFD:
3734         case KVM_CAP_HYPERV_TLBFLUSH:
3735         case KVM_CAP_HYPERV_SEND_IPI:
3736         case KVM_CAP_HYPERV_CPUID:
3737         case KVM_CAP_SYS_HYPERV_CPUID:
3738         case KVM_CAP_PCI_SEGMENT:
3739         case KVM_CAP_DEBUGREGS:
3740         case KVM_CAP_X86_ROBUST_SINGLESTEP:
3741         case KVM_CAP_XSAVE:
3742         case KVM_CAP_ASYNC_PF:
3743         case KVM_CAP_ASYNC_PF_INT:
3744         case KVM_CAP_GET_TSC_KHZ:
3745         case KVM_CAP_KVMCLOCK_CTRL:
3746         case KVM_CAP_READONLY_MEM:
3747         case KVM_CAP_HYPERV_TIME:
3748         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
3749         case KVM_CAP_TSC_DEADLINE_TIMER:
3750         case KVM_CAP_DISABLE_QUIRKS:
3751         case KVM_CAP_SET_BOOT_CPU_ID:
3752         case KVM_CAP_SPLIT_IRQCHIP:
3753         case KVM_CAP_IMMEDIATE_EXIT:
3754         case KVM_CAP_PMU_EVENT_FILTER:
3755         case KVM_CAP_GET_MSR_FEATURES:
3756         case KVM_CAP_MSR_PLATFORM_INFO:
3757         case KVM_CAP_EXCEPTION_PAYLOAD:
3758         case KVM_CAP_SET_GUEST_DEBUG:
3759         case KVM_CAP_LAST_CPU:
3760         case KVM_CAP_X86_USER_SPACE_MSR:
3761         case KVM_CAP_X86_MSR_FILTER:
3762         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
3763                 r = 1;
3764                 break;
3765         case KVM_CAP_SYNC_REGS:
3766                 r = KVM_SYNC_X86_VALID_FIELDS;
3767                 break;
3768         case KVM_CAP_ADJUST_CLOCK:
3769                 r = KVM_CLOCK_TSC_STABLE;
3770                 break;
3771         case KVM_CAP_X86_DISABLE_EXITS:
3772                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
3773                       KVM_X86_DISABLE_EXITS_CSTATE;
3774                 if(kvm_can_mwait_in_guest())
3775                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
3776                 break;
3777         case KVM_CAP_X86_SMM:
3778                 /* SMBASE is usually relocated above 1M on modern chipsets,
3779                  * and SMM handlers might indeed rely on 4G segment limits,
3780                  * so do not report SMM to be available if real mode is
3781                  * emulated via vm86 mode.  Still, do not go to great lengths
3782                  * to avoid userspace's usage of the feature, because it is a
3783                  * fringe case that is not enabled except via specific settings
3784                  * of the module parameters.
3785                  */
3786                 r = kvm_x86_ops.has_emulated_msr(MSR_IA32_SMBASE);
3787                 break;
3788         case KVM_CAP_VAPIC:
3789                 r = !kvm_x86_ops.cpu_has_accelerated_tpr();
3790                 break;
3791         case KVM_CAP_NR_VCPUS:
3792                 r = KVM_SOFT_MAX_VCPUS;
3793                 break;
3794         case KVM_CAP_MAX_VCPUS:
3795                 r = KVM_MAX_VCPUS;
3796                 break;
3797         case KVM_CAP_MAX_VCPU_ID:
3798                 r = KVM_MAX_VCPU_ID;
3799                 break;
3800         case KVM_CAP_PV_MMU:    /* obsolete */
3801                 r = 0;
3802                 break;
3803         case KVM_CAP_MCE:
3804                 r = KVM_MAX_MCE_BANKS;
3805                 break;
3806         case KVM_CAP_XCRS:
3807                 r = boot_cpu_has(X86_FEATURE_XSAVE);
3808                 break;
3809         case KVM_CAP_TSC_CONTROL:
3810                 r = kvm_has_tsc_control;
3811                 break;
3812         case KVM_CAP_X2APIC_API:
3813                 r = KVM_X2APIC_API_VALID_FLAGS;
3814                 break;
3815         case KVM_CAP_NESTED_STATE:
3816                 r = kvm_x86_ops.nested_ops->get_state ?
3817                         kvm_x86_ops.nested_ops->get_state(NULL, NULL, 0) : 0;
3818                 break;
3819         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
3820                 r = kvm_x86_ops.enable_direct_tlbflush != NULL;
3821                 break;
3822         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
3823                 r = kvm_x86_ops.nested_ops->enable_evmcs != NULL;
3824                 break;
3825         case KVM_CAP_SMALLER_MAXPHYADDR:
3826                 r = (int) allow_smaller_maxphyaddr;
3827                 break;
3828         case KVM_CAP_STEAL_TIME:
3829                 r = sched_info_on();
3830                 break;
3831         default:
3832                 break;
3833         }
3834         return r;
3835
3836 }
3837
3838 long kvm_arch_dev_ioctl(struct file *filp,
3839                         unsigned int ioctl, unsigned long arg)
3840 {
3841         void __user *argp = (void __user *)arg;
3842         long r;
3843
3844         switch (ioctl) {
3845         case KVM_GET_MSR_INDEX_LIST: {
3846                 struct kvm_msr_list __user *user_msr_list = argp;
3847                 struct kvm_msr_list msr_list;
3848                 unsigned n;
3849
3850                 r = -EFAULT;
3851                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3852                         goto out;
3853                 n = msr_list.nmsrs;
3854                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
3855                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3856                         goto out;
3857                 r = -E2BIG;
3858                 if (n < msr_list.nmsrs)
3859                         goto out;
3860                 r = -EFAULT;
3861                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
3862                                  num_msrs_to_save * sizeof(u32)))
3863                         goto out;
3864                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
3865                                  &emulated_msrs,
3866                                  num_emulated_msrs * sizeof(u32)))
3867                         goto out;
3868                 r = 0;
3869                 break;
3870         }
3871         case KVM_GET_SUPPORTED_CPUID:
3872         case KVM_GET_EMULATED_CPUID: {
3873                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3874                 struct kvm_cpuid2 cpuid;
3875
3876                 r = -EFAULT;
3877                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3878                         goto out;
3879
3880                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
3881                                             ioctl);
3882                 if (r)
3883                         goto out;
3884
3885                 r = -EFAULT;
3886                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3887                         goto out;
3888                 r = 0;
3889                 break;
3890         }
3891         case KVM_X86_GET_MCE_CAP_SUPPORTED:
3892                 r = -EFAULT;
3893                 if (copy_to_user(argp, &kvm_mce_cap_supported,
3894                                  sizeof(kvm_mce_cap_supported)))
3895                         goto out;
3896                 r = 0;
3897                 break;
3898         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
3899                 struct kvm_msr_list __user *user_msr_list = argp;
3900                 struct kvm_msr_list msr_list;
3901                 unsigned int n;
3902
3903                 r = -EFAULT;
3904                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3905                         goto out;
3906                 n = msr_list.nmsrs;
3907                 msr_list.nmsrs = num_msr_based_features;
3908                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3909                         goto out;
3910                 r = -E2BIG;
3911                 if (n < msr_list.nmsrs)
3912                         goto out;
3913                 r = -EFAULT;
3914                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
3915                                  num_msr_based_features * sizeof(u32)))
3916                         goto out;
3917                 r = 0;
3918                 break;
3919         }
3920         case KVM_GET_MSRS:
3921                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
3922                 break;
3923         case KVM_GET_SUPPORTED_HV_CPUID:
3924                 r = kvm_ioctl_get_supported_hv_cpuid(NULL, argp);
3925                 break;
3926         default:
3927                 r = -EINVAL;
3928                 break;
3929         }
3930 out:
3931         return r;
3932 }
3933
3934 static void wbinvd_ipi(void *garbage)
3935 {
3936         wbinvd();
3937 }
3938
3939 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
3940 {
3941         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
3942 }
3943
3944 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
3945 {
3946         /* Address WBINVD may be executed by guest */
3947         if (need_emulate_wbinvd(vcpu)) {
3948                 if (kvm_x86_ops.has_wbinvd_exit())
3949                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
3950                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
3951                         smp_call_function_single(vcpu->cpu,
3952                                         wbinvd_ipi, NULL, 1);
3953         }
3954
3955         kvm_x86_ops.vcpu_load(vcpu, cpu);
3956
3957         /* Save host pkru register if supported */
3958         vcpu->arch.host_pkru = read_pkru();
3959
3960         /* Apply any externally detected TSC adjustments (due to suspend) */
3961         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
3962                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
3963                 vcpu->arch.tsc_offset_adjustment = 0;
3964                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3965         }
3966
3967         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
3968                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
3969                                 rdtsc() - vcpu->arch.last_host_tsc;
3970                 if (tsc_delta < 0)
3971                         mark_tsc_unstable("KVM discovered backwards TSC");
3972
3973                 if (kvm_check_tsc_unstable()) {
3974                         u64 offset = kvm_compute_tsc_offset(vcpu,
3975                                                 vcpu->arch.last_guest_tsc);
3976                         kvm_vcpu_write_tsc_offset(vcpu, offset);
3977                         vcpu->arch.tsc_catchup = 1;
3978                 }
3979
3980                 if (kvm_lapic_hv_timer_in_use(vcpu))
3981                         kvm_lapic_restart_hv_timer(vcpu);
3982
3983                 /*
3984                  * On a host with synchronized TSC, there is no need to update
3985                  * kvmclock on vcpu->cpu migration
3986                  */
3987                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
3988                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
3989                 if (vcpu->cpu != cpu)
3990                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
3991                 vcpu->cpu = cpu;
3992         }
3993
3994         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3995 }
3996
3997 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
3998 {
3999         struct kvm_host_map map;
4000         struct kvm_steal_time *st;
4001
4002         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
4003                 return;
4004
4005         if (vcpu->arch.st.preempted)
4006                 return;
4007
4008         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT, &map,
4009                         &vcpu->arch.st.cache, true))
4010                 return;
4011
4012         st = map.hva +
4013                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
4014
4015         st->preempted = vcpu->arch.st.preempted = KVM_VCPU_PREEMPTED;
4016
4017         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, true);
4018 }
4019
4020 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
4021 {
4022         int idx;
4023
4024         if (vcpu->preempted)
4025                 vcpu->arch.preempted_in_kernel = !kvm_x86_ops.get_cpl(vcpu);
4026
4027         /*
4028          * Disable page faults because we're in atomic context here.
4029          * kvm_write_guest_offset_cached() would call might_fault()
4030          * that relies on pagefault_disable() to tell if there's a
4031          * bug. NOTE: the write to guest memory may not go through if
4032          * during postcopy live migration or if there's heavy guest
4033          * paging.
4034          */
4035         pagefault_disable();
4036         /*
4037          * kvm_memslots() will be called by
4038          * kvm_write_guest_offset_cached() so take the srcu lock.
4039          */
4040         idx = srcu_read_lock(&vcpu->kvm->srcu);
4041         kvm_steal_time_set_preempted(vcpu);
4042         srcu_read_unlock(&vcpu->kvm->srcu, idx);
4043         pagefault_enable();
4044         kvm_x86_ops.vcpu_put(vcpu);
4045         vcpu->arch.last_host_tsc = rdtsc();
4046         /*
4047          * If userspace has set any breakpoints or watchpoints, dr6 is restored
4048          * on every vmexit, but if not, we might have a stale dr6 from the
4049          * guest. do_debug expects dr6 to be cleared after it runs, do the same.
4050          */
4051         set_debugreg(0, 6);
4052 }
4053
4054 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
4055                                     struct kvm_lapic_state *s)
4056 {
4057         if (vcpu->arch.apicv_active)
4058                 kvm_x86_ops.sync_pir_to_irr(vcpu);
4059
4060         return kvm_apic_get_state(vcpu, s);
4061 }
4062
4063 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
4064                                     struct kvm_lapic_state *s)
4065 {
4066         int r;
4067
4068         r = kvm_apic_set_state(vcpu, s);
4069         if (r)
4070                 return r;
4071         update_cr8_intercept(vcpu);
4072
4073         return 0;
4074 }
4075
4076 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
4077 {
4078         return (!lapic_in_kernel(vcpu) ||
4079                 kvm_apic_accept_pic_intr(vcpu));
4080 }
4081
4082 /*
4083  * if userspace requested an interrupt window, check that the
4084  * interrupt window is open.
4085  *
4086  * No need to exit to userspace if we already have an interrupt queued.
4087  */
4088 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
4089 {
4090         return kvm_arch_interrupt_allowed(vcpu) &&
4091                 !kvm_cpu_has_interrupt(vcpu) &&
4092                 !kvm_event_needs_reinjection(vcpu) &&
4093                 kvm_cpu_accept_dm_intr(vcpu);
4094 }
4095
4096 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
4097                                     struct kvm_interrupt *irq)
4098 {
4099         if (irq->irq >= KVM_NR_INTERRUPTS)
4100                 return -EINVAL;
4101
4102         if (!irqchip_in_kernel(vcpu->kvm)) {
4103                 kvm_queue_interrupt(vcpu, irq->irq, false);
4104                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4105                 return 0;
4106         }
4107
4108         /*
4109          * With in-kernel LAPIC, we only use this to inject EXTINT, so
4110          * fail for in-kernel 8259.
4111          */
4112         if (pic_in_kernel(vcpu->kvm))
4113                 return -ENXIO;
4114
4115         if (vcpu->arch.pending_external_vector != -1)
4116                 return -EEXIST;
4117
4118         vcpu->arch.pending_external_vector = irq->irq;
4119         kvm_make_request(KVM_REQ_EVENT, vcpu);
4120         return 0;
4121 }
4122
4123 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
4124 {
4125         kvm_inject_nmi(vcpu);
4126
4127         return 0;
4128 }
4129
4130 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
4131 {
4132         kvm_make_request(KVM_REQ_SMI, vcpu);
4133
4134         return 0;
4135 }
4136
4137 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
4138                                            struct kvm_tpr_access_ctl *tac)
4139 {
4140         if (tac->flags)
4141                 return -EINVAL;
4142         vcpu->arch.tpr_access_reporting = !!tac->enabled;
4143         return 0;
4144 }
4145
4146 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
4147                                         u64 mcg_cap)
4148 {
4149         int r;
4150         unsigned bank_num = mcg_cap & 0xff, bank;
4151
4152         r = -EINVAL;
4153         if (!bank_num || bank_num > KVM_MAX_MCE_BANKS)
4154                 goto out;
4155         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
4156                 goto out;
4157         r = 0;
4158         vcpu->arch.mcg_cap = mcg_cap;
4159         /* Init IA32_MCG_CTL to all 1s */
4160         if (mcg_cap & MCG_CTL_P)
4161                 vcpu->arch.mcg_ctl = ~(u64)0;
4162         /* Init IA32_MCi_CTL to all 1s */
4163         for (bank = 0; bank < bank_num; bank++)
4164                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
4165
4166         kvm_x86_ops.setup_mce(vcpu);
4167 out:
4168         return r;
4169 }
4170
4171 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
4172                                       struct kvm_x86_mce *mce)
4173 {
4174         u64 mcg_cap = vcpu->arch.mcg_cap;
4175         unsigned bank_num = mcg_cap & 0xff;
4176         u64 *banks = vcpu->arch.mce_banks;
4177
4178         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
4179                 return -EINVAL;
4180         /*
4181          * if IA32_MCG_CTL is not all 1s, the uncorrected error
4182          * reporting is disabled
4183          */
4184         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
4185             vcpu->arch.mcg_ctl != ~(u64)0)
4186                 return 0;
4187         banks += 4 * mce->bank;
4188         /*
4189          * if IA32_MCi_CTL is not all 1s, the uncorrected error
4190          * reporting is disabled for the bank
4191          */
4192         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
4193                 return 0;
4194         if (mce->status & MCI_STATUS_UC) {
4195                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
4196                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
4197                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
4198                         return 0;
4199                 }
4200                 if (banks[1] & MCI_STATUS_VAL)
4201                         mce->status |= MCI_STATUS_OVER;
4202                 banks[2] = mce->addr;
4203                 banks[3] = mce->misc;
4204                 vcpu->arch.mcg_status = mce->mcg_status;
4205                 banks[1] = mce->status;
4206                 kvm_queue_exception(vcpu, MC_VECTOR);
4207         } else if (!(banks[1] & MCI_STATUS_VAL)
4208                    || !(banks[1] & MCI_STATUS_UC)) {
4209                 if (banks[1] & MCI_STATUS_VAL)
4210                         mce->status |= MCI_STATUS_OVER;
4211                 banks[2] = mce->addr;
4212                 banks[3] = mce->misc;
4213                 banks[1] = mce->status;
4214         } else
4215                 banks[1] |= MCI_STATUS_OVER;
4216         return 0;
4217 }
4218
4219 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
4220                                                struct kvm_vcpu_events *events)
4221 {
4222         process_nmi(vcpu);
4223
4224         /*
4225          * In guest mode, payload delivery should be deferred,
4226          * so that the L1 hypervisor can intercept #PF before
4227          * CR2 is modified (or intercept #DB before DR6 is
4228          * modified under nVMX). Unless the per-VM capability,
4229          * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4230          * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4231          * opportunistically defer the exception payload, deliver it if the
4232          * capability hasn't been requested before processing a
4233          * KVM_GET_VCPU_EVENTS.
4234          */
4235         if (!vcpu->kvm->arch.exception_payload_enabled &&
4236             vcpu->arch.exception.pending && vcpu->arch.exception.has_payload)
4237                 kvm_deliver_exception_payload(vcpu);
4238
4239         /*
4240          * The API doesn't provide the instruction length for software
4241          * exceptions, so don't report them. As long as the guest RIP
4242          * isn't advanced, we should expect to encounter the exception
4243          * again.
4244          */
4245         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
4246                 events->exception.injected = 0;
4247                 events->exception.pending = 0;
4248         } else {
4249                 events->exception.injected = vcpu->arch.exception.injected;
4250                 events->exception.pending = vcpu->arch.exception.pending;
4251                 /*
4252                  * For ABI compatibility, deliberately conflate
4253                  * pending and injected exceptions when
4254                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4255                  */
4256                 if (!vcpu->kvm->arch.exception_payload_enabled)
4257                         events->exception.injected |=
4258                                 vcpu->arch.exception.pending;
4259         }
4260         events->exception.nr = vcpu->arch.exception.nr;
4261         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
4262         events->exception.error_code = vcpu->arch.exception.error_code;
4263         events->exception_has_payload = vcpu->arch.exception.has_payload;
4264         events->exception_payload = vcpu->arch.exception.payload;
4265
4266         events->interrupt.injected =
4267                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
4268         events->interrupt.nr = vcpu->arch.interrupt.nr;
4269         events->interrupt.soft = 0;
4270         events->interrupt.shadow = kvm_x86_ops.get_interrupt_shadow(vcpu);
4271
4272         events->nmi.injected = vcpu->arch.nmi_injected;
4273         events->nmi.pending = vcpu->arch.nmi_pending != 0;
4274         events->nmi.masked = kvm_x86_ops.get_nmi_mask(vcpu);
4275         events->nmi.pad = 0;
4276
4277         events->sipi_vector = 0; /* never valid when reporting to user space */
4278
4279         events->smi.smm = is_smm(vcpu);
4280         events->smi.pending = vcpu->arch.smi_pending;
4281         events->smi.smm_inside_nmi =
4282                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
4283         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
4284
4285         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
4286                          | KVM_VCPUEVENT_VALID_SHADOW
4287                          | KVM_VCPUEVENT_VALID_SMM);
4288         if (vcpu->kvm->arch.exception_payload_enabled)
4289                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
4290
4291         memset(&events->reserved, 0, sizeof(events->reserved));
4292 }
4293
4294 static void kvm_smm_changed(struct kvm_vcpu *vcpu);
4295
4296 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
4297                                               struct kvm_vcpu_events *events)
4298 {
4299         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4300                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4301                               | KVM_VCPUEVENT_VALID_SHADOW
4302                               | KVM_VCPUEVENT_VALID_SMM
4303                               | KVM_VCPUEVENT_VALID_PAYLOAD))
4304                 return -EINVAL;
4305
4306         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
4307                 if (!vcpu->kvm->arch.exception_payload_enabled)
4308                         return -EINVAL;
4309                 if (events->exception.pending)
4310                         events->exception.injected = 0;
4311                 else
4312                         events->exception_has_payload = 0;
4313         } else {
4314                 events->exception.pending = 0;
4315                 events->exception_has_payload = 0;
4316         }
4317
4318         if ((events->exception.injected || events->exception.pending) &&
4319             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
4320                 return -EINVAL;
4321
4322         /* INITs are latched while in SMM */
4323         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
4324             (events->smi.smm || events->smi.pending) &&
4325             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
4326                 return -EINVAL;
4327
4328         process_nmi(vcpu);
4329         vcpu->arch.exception.injected = events->exception.injected;
4330         vcpu->arch.exception.pending = events->exception.pending;
4331         vcpu->arch.exception.nr = events->exception.nr;
4332         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
4333         vcpu->arch.exception.error_code = events->exception.error_code;
4334         vcpu->arch.exception.has_payload = events->exception_has_payload;
4335         vcpu->arch.exception.payload = events->exception_payload;
4336
4337         vcpu->arch.interrupt.injected = events->interrupt.injected;
4338         vcpu->arch.interrupt.nr = events->interrupt.nr;
4339         vcpu->arch.interrupt.soft = events->interrupt.soft;
4340         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
4341                 kvm_x86_ops.set_interrupt_shadow(vcpu,
4342                                                   events->interrupt.shadow);
4343
4344         vcpu->arch.nmi_injected = events->nmi.injected;
4345         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
4346                 vcpu->arch.nmi_pending = events->nmi.pending;
4347         kvm_x86_ops.set_nmi_mask(vcpu, events->nmi.masked);
4348
4349         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
4350             lapic_in_kernel(vcpu))
4351                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
4352
4353         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
4354                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
4355                         if (events->smi.smm)
4356                                 vcpu->arch.hflags |= HF_SMM_MASK;
4357                         else
4358                                 vcpu->arch.hflags &= ~HF_SMM_MASK;
4359                         kvm_smm_changed(vcpu);
4360                 }
4361
4362                 vcpu->arch.smi_pending = events->smi.pending;
4363
4364                 if (events->smi.smm) {
4365                         if (events->smi.smm_inside_nmi)
4366                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
4367                         else
4368                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
4369                 }
4370
4371                 if (lapic_in_kernel(vcpu)) {
4372                         if (events->smi.latched_init)
4373                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4374                         else
4375                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4376                 }
4377         }
4378
4379         kvm_make_request(KVM_REQ_EVENT, vcpu);
4380
4381         return 0;
4382 }
4383
4384 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
4385                                              struct kvm_debugregs *dbgregs)
4386 {
4387         unsigned long val;
4388
4389         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
4390         kvm_get_dr(vcpu, 6, &val);
4391         dbgregs->dr6 = val;
4392         dbgregs->dr7 = vcpu->arch.dr7;
4393         dbgregs->flags = 0;
4394         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
4395 }
4396
4397 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
4398                                             struct kvm_debugregs *dbgregs)
4399 {
4400         if (dbgregs->flags)
4401                 return -EINVAL;
4402
4403         if (dbgregs->dr6 & ~0xffffffffull)
4404                 return -EINVAL;
4405         if (dbgregs->dr7 & ~0xffffffffull)
4406                 return -EINVAL;
4407
4408         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
4409         kvm_update_dr0123(vcpu);
4410         vcpu->arch.dr6 = dbgregs->dr6;
4411         vcpu->arch.dr7 = dbgregs->dr7;
4412         kvm_update_dr7(vcpu);
4413
4414         return 0;
4415 }
4416
4417 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
4418
4419 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
4420 {
4421         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4422         u64 xstate_bv = xsave->header.xfeatures;
4423         u64 valid;
4424
4425         /*
4426          * Copy legacy XSAVE area, to avoid complications with CPUID
4427          * leaves 0 and 1 in the loop below.
4428          */
4429         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
4430
4431         /* Set XSTATE_BV */
4432         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
4433         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
4434
4435         /*
4436          * Copy each region from the possibly compacted offset to the
4437          * non-compacted offset.
4438          */
4439         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4440         while (valid) {
4441                 u64 xfeature_mask = valid & -valid;
4442                 int xfeature_nr = fls64(xfeature_mask) - 1;
4443                 void *src = get_xsave_addr(xsave, xfeature_nr);
4444
4445                 if (src) {
4446                         u32 size, offset, ecx, edx;
4447                         cpuid_count(XSTATE_CPUID, xfeature_nr,
4448                                     &size, &offset, &ecx, &edx);
4449                         if (xfeature_nr == XFEATURE_PKRU)
4450                                 memcpy(dest + offset, &vcpu->arch.pkru,
4451                                        sizeof(vcpu->arch.pkru));
4452                         else
4453                                 memcpy(dest + offset, src, size);
4454
4455                 }
4456
4457                 valid -= xfeature_mask;
4458         }
4459 }
4460
4461 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
4462 {
4463         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4464         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
4465         u64 valid;
4466
4467         /*
4468          * Copy legacy XSAVE area, to avoid complications with CPUID
4469          * leaves 0 and 1 in the loop below.
4470          */
4471         memcpy(xsave, src, XSAVE_HDR_OFFSET);
4472
4473         /* Set XSTATE_BV and possibly XCOMP_BV.  */
4474         xsave->header.xfeatures = xstate_bv;
4475         if (boot_cpu_has(X86_FEATURE_XSAVES))
4476                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
4477
4478         /*
4479          * Copy each region from the non-compacted offset to the
4480          * possibly compacted offset.
4481          */
4482         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4483         while (valid) {
4484                 u64 xfeature_mask = valid & -valid;
4485                 int xfeature_nr = fls64(xfeature_mask) - 1;
4486                 void *dest = get_xsave_addr(xsave, xfeature_nr);
4487
4488                 if (dest) {
4489                         u32 size, offset, ecx, edx;
4490                         cpuid_count(XSTATE_CPUID, xfeature_nr,
4491                                     &size, &offset, &ecx, &edx);
4492                         if (xfeature_nr == XFEATURE_PKRU)
4493                                 memcpy(&vcpu->arch.pkru, src + offset,
4494                                        sizeof(vcpu->arch.pkru));
4495                         else
4496                                 memcpy(dest, src + offset, size);
4497                 }
4498
4499                 valid -= xfeature_mask;
4500         }
4501 }
4502
4503 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
4504                                          struct kvm_xsave *guest_xsave)
4505 {
4506         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4507                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
4508                 fill_xsave((u8 *) guest_xsave->region, vcpu);
4509         } else {
4510                 memcpy(guest_xsave->region,
4511                         &vcpu->arch.guest_fpu->state.fxsave,
4512                         sizeof(struct fxregs_state));
4513                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
4514                         XFEATURE_MASK_FPSSE;
4515         }
4516 }
4517
4518 #define XSAVE_MXCSR_OFFSET 24
4519
4520 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
4521                                         struct kvm_xsave *guest_xsave)
4522 {
4523         u64 xstate_bv =
4524                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
4525         u32 mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
4526
4527         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4528                 /*
4529                  * Here we allow setting states that are not present in
4530                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
4531                  * with old userspace.
4532                  */
4533                 if (xstate_bv & ~supported_xcr0 || mxcsr & ~mxcsr_feature_mask)
4534                         return -EINVAL;
4535                 load_xsave(vcpu, (u8 *)guest_xsave->region);
4536         } else {
4537                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
4538                         mxcsr & ~mxcsr_feature_mask)
4539                         return -EINVAL;
4540                 memcpy(&vcpu->arch.guest_fpu->state.fxsave,
4541                         guest_xsave->region, sizeof(struct fxregs_state));
4542         }
4543         return 0;
4544 }
4545
4546 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
4547                                         struct kvm_xcrs *guest_xcrs)
4548 {
4549         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
4550                 guest_xcrs->nr_xcrs = 0;
4551                 return;
4552         }
4553
4554         guest_xcrs->nr_xcrs = 1;
4555         guest_xcrs->flags = 0;
4556         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
4557         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
4558 }
4559
4560 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
4561                                        struct kvm_xcrs *guest_xcrs)
4562 {
4563         int i, r = 0;
4564
4565         if (!boot_cpu_has(X86_FEATURE_XSAVE))
4566                 return -EINVAL;
4567
4568         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
4569                 return -EINVAL;
4570
4571         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
4572                 /* Only support XCR0 currently */
4573                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
4574                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
4575                                 guest_xcrs->xcrs[i].value);
4576                         break;
4577                 }
4578         if (r)
4579                 r = -EINVAL;
4580         return r;
4581 }
4582
4583 /*
4584  * kvm_set_guest_paused() indicates to the guest kernel that it has been
4585  * stopped by the hypervisor.  This function will be called from the host only.
4586  * EINVAL is returned when the host attempts to set the flag for a guest that
4587  * does not support pv clocks.
4588  */
4589 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
4590 {
4591         if (!vcpu->arch.pv_time_enabled)
4592                 return -EINVAL;
4593         vcpu->arch.pvclock_set_guest_stopped_request = true;
4594         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4595         return 0;
4596 }
4597
4598 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
4599                                      struct kvm_enable_cap *cap)
4600 {
4601         int r;
4602         uint16_t vmcs_version;
4603         void __user *user_ptr;
4604
4605         if (cap->flags)
4606                 return -EINVAL;
4607
4608         switch (cap->cap) {
4609         case KVM_CAP_HYPERV_SYNIC2:
4610                 if (cap->args[0])
4611                         return -EINVAL;
4612                 fallthrough;
4613
4614         case KVM_CAP_HYPERV_SYNIC:
4615                 if (!irqchip_in_kernel(vcpu->kvm))
4616                         return -EINVAL;
4617                 return kvm_hv_activate_synic(vcpu, cap->cap ==
4618                                              KVM_CAP_HYPERV_SYNIC2);
4619         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4620                 if (!kvm_x86_ops.nested_ops->enable_evmcs)
4621                         return -ENOTTY;
4622                 r = kvm_x86_ops.nested_ops->enable_evmcs(vcpu, &vmcs_version);
4623                 if (!r) {
4624                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
4625                         if (copy_to_user(user_ptr, &vmcs_version,
4626                                          sizeof(vmcs_version)))
4627                                 r = -EFAULT;
4628                 }
4629                 return r;
4630         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4631                 if (!kvm_x86_ops.enable_direct_tlbflush)
4632                         return -ENOTTY;
4633
4634                 return kvm_x86_ops.enable_direct_tlbflush(vcpu);
4635
4636         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4637                 vcpu->arch.pv_cpuid.enforce = cap->args[0];
4638                 if (vcpu->arch.pv_cpuid.enforce)
4639                         kvm_update_pv_runtime(vcpu);
4640
4641                 return 0;
4642
4643         default:
4644                 return -EINVAL;
4645         }
4646 }
4647
4648 long kvm_arch_vcpu_ioctl(struct file *filp,
4649                          unsigned int ioctl, unsigned long arg)
4650 {
4651         struct kvm_vcpu *vcpu = filp->private_data;
4652         void __user *argp = (void __user *)arg;
4653         int r;
4654         union {
4655                 struct kvm_lapic_state *lapic;
4656                 struct kvm_xsave *xsave;
4657                 struct kvm_xcrs *xcrs;
4658                 void *buffer;
4659         } u;
4660
4661         vcpu_load(vcpu);
4662
4663         u.buffer = NULL;
4664         switch (ioctl) {
4665         case KVM_GET_LAPIC: {
4666                 r = -EINVAL;
4667                 if (!lapic_in_kernel(vcpu))
4668                         goto out;
4669                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
4670                                 GFP_KERNEL_ACCOUNT);
4671
4672                 r = -ENOMEM;
4673                 if (!u.lapic)
4674                         goto out;
4675                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
4676                 if (r)
4677                         goto out;
4678                 r = -EFAULT;
4679                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
4680                         goto out;
4681                 r = 0;
4682                 break;
4683         }
4684         case KVM_SET_LAPIC: {
4685                 r = -EINVAL;
4686                 if (!lapic_in_kernel(vcpu))
4687                         goto out;
4688                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
4689                 if (IS_ERR(u.lapic)) {
4690                         r = PTR_ERR(u.lapic);
4691                         goto out_nofree;
4692                 }
4693
4694                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
4695                 break;
4696         }
4697         case KVM_INTERRUPT: {
4698                 struct kvm_interrupt irq;
4699
4700                 r = -EFAULT;
4701                 if (copy_from_user(&irq, argp, sizeof(irq)))
4702                         goto out;
4703                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
4704                 break;
4705         }
4706         case KVM_NMI: {
4707                 r = kvm_vcpu_ioctl_nmi(vcpu);
4708                 break;
4709         }
4710         case KVM_SMI: {
4711                 r = kvm_vcpu_ioctl_smi(vcpu);
4712                 break;
4713         }
4714         case KVM_SET_CPUID: {
4715                 struct kvm_cpuid __user *cpuid_arg = argp;
4716                 struct kvm_cpuid cpuid;
4717
4718                 r = -EFAULT;
4719                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4720                         goto out;
4721                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4722                 break;
4723         }
4724         case KVM_SET_CPUID2: {
4725                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4726                 struct kvm_cpuid2 cpuid;
4727
4728                 r = -EFAULT;
4729                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4730                         goto out;
4731                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
4732                                               cpuid_arg->entries);
4733                 break;
4734         }
4735         case KVM_GET_CPUID2: {
4736                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4737                 struct kvm_cpuid2 cpuid;
4738
4739                 r = -EFAULT;
4740                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4741                         goto out;
4742                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
4743                                               cpuid_arg->entries);
4744                 if (r)
4745                         goto out;
4746                 r = -EFAULT;
4747                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4748                         goto out;
4749                 r = 0;
4750                 break;
4751         }
4752         case KVM_GET_MSRS: {
4753                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4754                 r = msr_io(vcpu, argp, do_get_msr, 1);
4755                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4756                 break;
4757         }
4758         case KVM_SET_MSRS: {
4759                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4760                 r = msr_io(vcpu, argp, do_set_msr, 0);
4761                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4762                 break;
4763         }
4764         case KVM_TPR_ACCESS_REPORTING: {
4765                 struct kvm_tpr_access_ctl tac;
4766
4767                 r = -EFAULT;
4768                 if (copy_from_user(&tac, argp, sizeof(tac)))
4769                         goto out;
4770                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
4771                 if (r)
4772                         goto out;
4773                 r = -EFAULT;
4774                 if (copy_to_user(argp, &tac, sizeof(tac)))
4775                         goto out;
4776                 r = 0;
4777                 break;
4778         };
4779         case KVM_SET_VAPIC_ADDR: {
4780                 struct kvm_vapic_addr va;
4781                 int idx;
4782
4783                 r = -EINVAL;
4784                 if (!lapic_in_kernel(vcpu))
4785                         goto out;
4786                 r = -EFAULT;
4787                 if (copy_from_user(&va, argp, sizeof(va)))
4788                         goto out;
4789                 idx = srcu_read_lock(&vcpu->kvm->srcu);
4790                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
4791                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4792                 break;
4793         }
4794         case KVM_X86_SETUP_MCE: {
4795                 u64 mcg_cap;
4796
4797                 r = -EFAULT;
4798                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
4799                         goto out;
4800                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
4801                 break;
4802         }
4803         case KVM_X86_SET_MCE: {
4804                 struct kvm_x86_mce mce;
4805
4806                 r = -EFAULT;
4807                 if (copy_from_user(&mce, argp, sizeof(mce)))
4808                         goto out;
4809                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
4810                 break;
4811         }
4812         case KVM_GET_VCPU_EVENTS: {
4813                 struct kvm_vcpu_events events;
4814
4815                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
4816
4817                 r = -EFAULT;
4818                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
4819                         break;
4820                 r = 0;
4821                 break;
4822         }
4823         case KVM_SET_VCPU_EVENTS: {
4824                 struct kvm_vcpu_events events;
4825
4826                 r = -EFAULT;
4827                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
4828                         break;
4829
4830                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
4831                 break;
4832         }
4833         case KVM_GET_DEBUGREGS: {
4834                 struct kvm_debugregs dbgregs;
4835
4836                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
4837
4838                 r = -EFAULT;
4839                 if (copy_to_user(argp, &dbgregs,
4840                                  sizeof(struct kvm_debugregs)))
4841                         break;
4842                 r = 0;
4843                 break;
4844         }
4845         case KVM_SET_DEBUGREGS: {
4846                 struct kvm_debugregs dbgregs;
4847
4848                 r = -EFAULT;
4849                 if (copy_from_user(&dbgregs, argp,
4850                                    sizeof(struct kvm_debugregs)))
4851                         break;
4852
4853                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
4854                 break;
4855         }
4856         case KVM_GET_XSAVE: {
4857                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
4858                 r = -ENOMEM;
4859                 if (!u.xsave)
4860                         break;
4861
4862                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
4863
4864                 r = -EFAULT;
4865                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
4866                         break;
4867                 r = 0;
4868                 break;
4869         }
4870         case KVM_SET_XSAVE: {
4871                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
4872                 if (IS_ERR(u.xsave)) {
4873                         r = PTR_ERR(u.xsave);
4874                         goto out_nofree;
4875                 }
4876
4877                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
4878                 break;
4879         }
4880         case KVM_GET_XCRS: {
4881                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
4882                 r = -ENOMEM;
4883                 if (!u.xcrs)
4884                         break;
4885
4886                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
4887
4888                 r = -EFAULT;
4889                 if (copy_to_user(argp, u.xcrs,
4890                                  sizeof(struct kvm_xcrs)))
4891                         break;
4892                 r = 0;
4893                 break;
4894         }
4895         case KVM_SET_XCRS: {
4896                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
4897                 if (IS_ERR(u.xcrs)) {
4898                         r = PTR_ERR(u.xcrs);
4899                         goto out_nofree;
4900                 }
4901
4902                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
4903                 break;
4904         }
4905         case KVM_SET_TSC_KHZ: {
4906                 u32 user_tsc_khz;
4907
4908                 r = -EINVAL;
4909                 user_tsc_khz = (u32)arg;
4910
4911                 if (kvm_has_tsc_control &&
4912                     user_tsc_khz >= kvm_max_guest_tsc_khz)
4913                         goto out;
4914
4915                 if (user_tsc_khz == 0)
4916                         user_tsc_khz = tsc_khz;
4917
4918                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
4919                         r = 0;
4920
4921                 goto out;
4922         }
4923         case KVM_GET_TSC_KHZ: {
4924                 r = vcpu->arch.virtual_tsc_khz;
4925                 goto out;
4926         }
4927         case KVM_KVMCLOCK_CTRL: {
4928                 r = kvm_set_guest_paused(vcpu);
4929                 goto out;
4930         }
4931         case KVM_ENABLE_CAP: {
4932                 struct kvm_enable_cap cap;
4933
4934                 r = -EFAULT;
4935                 if (copy_from_user(&cap, argp, sizeof(cap)))
4936                         goto out;
4937                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
4938                 break;
4939         }
4940         case KVM_GET_NESTED_STATE: {
4941                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4942                 u32 user_data_size;
4943
4944                 r = -EINVAL;
4945                 if (!kvm_x86_ops.nested_ops->get_state)
4946                         break;
4947
4948                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
4949                 r = -EFAULT;
4950                 if (get_user(user_data_size, &user_kvm_nested_state->size))
4951                         break;
4952
4953                 r = kvm_x86_ops.nested_ops->get_state(vcpu, user_kvm_nested_state,
4954                                                      user_data_size);
4955                 if (r < 0)
4956                         break;
4957
4958                 if (r > user_data_size) {
4959                         if (put_user(r, &user_kvm_nested_state->size))
4960                                 r = -EFAULT;
4961                         else
4962                                 r = -E2BIG;
4963                         break;
4964                 }
4965
4966                 r = 0;
4967                 break;
4968         }
4969         case KVM_SET_NESTED_STATE: {
4970                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4971                 struct kvm_nested_state kvm_state;
4972                 int idx;
4973
4974                 r = -EINVAL;
4975                 if (!kvm_x86_ops.nested_ops->set_state)
4976                         break;
4977
4978                 r = -EFAULT;
4979                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
4980                         break;
4981
4982                 r = -EINVAL;
4983                 if (kvm_state.size < sizeof(kvm_state))
4984                         break;
4985
4986                 if (kvm_state.flags &
4987                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
4988                       | KVM_STATE_NESTED_EVMCS | KVM_STATE_NESTED_MTF_PENDING
4989                       | KVM_STATE_NESTED_GIF_SET))
4990                         break;
4991
4992                 /* nested_run_pending implies guest_mode.  */
4993                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
4994                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
4995                         break;
4996
4997                 idx = srcu_read_lock(&vcpu->kvm->srcu);
4998                 r = kvm_x86_ops.nested_ops->set_state(vcpu, user_kvm_nested_state, &kvm_state);
4999                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5000                 break;
5001         }
5002         case KVM_GET_SUPPORTED_HV_CPUID:
5003                 r = kvm_ioctl_get_supported_hv_cpuid(vcpu, argp);
5004                 break;
5005         default:
5006                 r = -EINVAL;
5007         }
5008 out:
5009         kfree(u.buffer);
5010 out_nofree:
5011         vcpu_put(vcpu);
5012         return r;
5013 }
5014
5015 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
5016 {
5017         return VM_FAULT_SIGBUS;
5018 }
5019
5020 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
5021 {
5022         int ret;
5023
5024         if (addr > (unsigned int)(-3 * PAGE_SIZE))
5025                 return -EINVAL;
5026         ret = kvm_x86_ops.set_tss_addr(kvm, addr);
5027         return ret;
5028 }
5029
5030 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
5031                                               u64 ident_addr)
5032 {
5033         return kvm_x86_ops.set_identity_map_addr(kvm, ident_addr);
5034 }
5035
5036 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
5037                                          unsigned long kvm_nr_mmu_pages)
5038 {
5039         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
5040                 return -EINVAL;
5041
5042         mutex_lock(&kvm->slots_lock);
5043
5044         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
5045         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
5046
5047         mutex_unlock(&kvm->slots_lock);
5048         return 0;
5049 }
5050
5051 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
5052 {
5053         return kvm->arch.n_max_mmu_pages;
5054 }
5055
5056 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5057 {
5058         struct kvm_pic *pic = kvm->arch.vpic;
5059         int r;
5060
5061         r = 0;
5062         switch (chip->chip_id) {
5063         case KVM_IRQCHIP_PIC_MASTER:
5064                 memcpy(&chip->chip.pic, &pic->pics[0],
5065                         sizeof(struct kvm_pic_state));
5066                 break;
5067         case KVM_IRQCHIP_PIC_SLAVE:
5068                 memcpy(&chip->chip.pic, &pic->pics[1],
5069                         sizeof(struct kvm_pic_state));
5070                 break;
5071         case KVM_IRQCHIP_IOAPIC:
5072                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
5073                 break;
5074         default:
5075                 r = -EINVAL;
5076                 break;
5077         }
5078         return r;
5079 }
5080
5081 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5082 {
5083         struct kvm_pic *pic = kvm->arch.vpic;
5084         int r;
5085
5086         r = 0;
5087         switch (chip->chip_id) {
5088         case KVM_IRQCHIP_PIC_MASTER:
5089                 spin_lock(&pic->lock);
5090                 memcpy(&pic->pics[0], &chip->chip.pic,
5091                         sizeof(struct kvm_pic_state));
5092                 spin_unlock(&pic->lock);
5093                 break;
5094         case KVM_IRQCHIP_PIC_SLAVE:
5095                 spin_lock(&pic->lock);
5096                 memcpy(&pic->pics[1], &chip->chip.pic,
5097                         sizeof(struct kvm_pic_state));
5098                 spin_unlock(&pic->lock);
5099                 break;
5100         case KVM_IRQCHIP_IOAPIC:
5101                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
5102                 break;
5103         default:
5104                 r = -EINVAL;
5105                 break;
5106         }
5107         kvm_pic_update_irq(pic);
5108         return r;
5109 }
5110
5111 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5112 {
5113         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
5114
5115         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
5116
5117         mutex_lock(&kps->lock);
5118         memcpy(ps, &kps->channels, sizeof(*ps));
5119         mutex_unlock(&kps->lock);
5120         return 0;
5121 }
5122
5123 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5124 {
5125         int i;
5126         struct kvm_pit *pit = kvm->arch.vpit;
5127
5128         mutex_lock(&pit->pit_state.lock);
5129         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
5130         for (i = 0; i < 3; i++)
5131                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
5132         mutex_unlock(&pit->pit_state.lock);
5133         return 0;
5134 }
5135
5136 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5137 {
5138         mutex_lock(&kvm->arch.vpit->pit_state.lock);
5139         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
5140                 sizeof(ps->channels));
5141         ps->flags = kvm->arch.vpit->pit_state.flags;
5142         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
5143         memset(&ps->reserved, 0, sizeof(ps->reserved));
5144         return 0;
5145 }
5146
5147 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5148 {
5149         int start = 0;
5150         int i;
5151         u32 prev_legacy, cur_legacy;
5152         struct kvm_pit *pit = kvm->arch.vpit;
5153
5154         mutex_lock(&pit->pit_state.lock);
5155         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
5156         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
5157         if (!prev_legacy && cur_legacy)
5158                 start = 1;
5159         memcpy(&pit->pit_state.channels, &ps->channels,
5160                sizeof(pit->pit_state.channels));
5161         pit->pit_state.flags = ps->flags;
5162         for (i = 0; i < 3; i++)
5163                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
5164                                    start && i == 0);
5165         mutex_unlock(&pit->pit_state.lock);
5166         return 0;
5167 }
5168
5169 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
5170                                  struct kvm_reinject_control *control)
5171 {
5172         struct kvm_pit *pit = kvm->arch.vpit;
5173
5174         /* pit->pit_state.lock was overloaded to prevent userspace from getting
5175          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5176          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
5177          */
5178         mutex_lock(&pit->pit_state.lock);
5179         kvm_pit_set_reinject(pit, control->pit_reinject);
5180         mutex_unlock(&pit->pit_state.lock);
5181
5182         return 0;
5183 }
5184
5185 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
5186 {
5187         /*
5188          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
5189          */
5190         if (kvm_x86_ops.flush_log_dirty)
5191                 kvm_x86_ops.flush_log_dirty(kvm);
5192 }
5193
5194 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
5195                         bool line_status)
5196 {
5197         if (!irqchip_in_kernel(kvm))
5198                 return -ENXIO;
5199
5200         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
5201                                         irq_event->irq, irq_event->level,
5202                                         line_status);
5203         return 0;
5204 }
5205
5206 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
5207                             struct kvm_enable_cap *cap)
5208 {
5209         int r;
5210
5211         if (cap->flags)
5212                 return -EINVAL;
5213
5214         switch (cap->cap) {
5215         case KVM_CAP_DISABLE_QUIRKS:
5216                 kvm->arch.disabled_quirks = cap->args[0];
5217                 r = 0;
5218                 break;
5219         case KVM_CAP_SPLIT_IRQCHIP: {
5220                 mutex_lock(&kvm->lock);
5221                 r = -EINVAL;
5222                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
5223                         goto split_irqchip_unlock;
5224                 r = -EEXIST;
5225                 if (irqchip_in_kernel(kvm))
5226                         goto split_irqchip_unlock;
5227                 if (kvm->created_vcpus)
5228                         goto split_irqchip_unlock;
5229                 r = kvm_setup_empty_irq_routing(kvm);
5230                 if (r)
5231                         goto split_irqchip_unlock;
5232                 /* Pairs with irqchip_in_kernel. */
5233                 smp_wmb();
5234                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
5235                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
5236                 r = 0;
5237 split_irqchip_unlock:
5238                 mutex_unlock(&kvm->lock);
5239                 break;
5240         }
5241         case KVM_CAP_X2APIC_API:
5242                 r = -EINVAL;
5243                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
5244                         break;
5245
5246                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
5247                         kvm->arch.x2apic_format = true;
5248                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
5249                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
5250
5251                 r = 0;
5252                 break;
5253         case KVM_CAP_X86_DISABLE_EXITS:
5254                 r = -EINVAL;
5255                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
5256                         break;
5257
5258                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
5259                         kvm_can_mwait_in_guest())
5260                         kvm->arch.mwait_in_guest = true;
5261                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
5262                         kvm->arch.hlt_in_guest = true;
5263                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
5264                         kvm->arch.pause_in_guest = true;
5265                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
5266                         kvm->arch.cstate_in_guest = true;
5267                 r = 0;
5268                 break;
5269         case KVM_CAP_MSR_PLATFORM_INFO:
5270                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
5271                 r = 0;
5272                 break;
5273         case KVM_CAP_EXCEPTION_PAYLOAD:
5274                 kvm->arch.exception_payload_enabled = cap->args[0];
5275                 r = 0;
5276                 break;
5277         case KVM_CAP_X86_USER_SPACE_MSR:
5278                 kvm->arch.user_space_msr_mask = cap->args[0];
5279                 r = 0;
5280                 break;
5281         default:
5282                 r = -EINVAL;
5283                 break;
5284         }
5285         return r;
5286 }
5287
5288 static void kvm_clear_msr_filter(struct kvm *kvm)
5289 {
5290         u32 i;
5291         u32 count = kvm->arch.msr_filter.count;
5292         struct msr_bitmap_range ranges[16];
5293
5294         mutex_lock(&kvm->lock);
5295         kvm->arch.msr_filter.count = 0;
5296         memcpy(ranges, kvm->arch.msr_filter.ranges, count * sizeof(ranges[0]));
5297         mutex_unlock(&kvm->lock);
5298         synchronize_srcu(&kvm->srcu);
5299
5300         for (i = 0; i < count; i++)
5301                 kfree(ranges[i].bitmap);
5302 }
5303
5304 static int kvm_add_msr_filter(struct kvm *kvm, struct kvm_msr_filter_range *user_range)
5305 {
5306         struct msr_bitmap_range *ranges = kvm->arch.msr_filter.ranges;
5307         struct msr_bitmap_range range;
5308         unsigned long *bitmap = NULL;
5309         size_t bitmap_size;
5310         int r;
5311
5312         if (!user_range->nmsrs)
5313                 return 0;
5314
5315         bitmap_size = BITS_TO_LONGS(user_range->nmsrs) * sizeof(long);
5316         if (!bitmap_size || bitmap_size > KVM_MSR_FILTER_MAX_BITMAP_SIZE)
5317                 return -EINVAL;
5318
5319         bitmap = memdup_user((__user u8*)user_range->bitmap, bitmap_size);
5320         if (IS_ERR(bitmap))
5321                 return PTR_ERR(bitmap);
5322
5323         range = (struct msr_bitmap_range) {
5324                 .flags = user_range->flags,
5325                 .base = user_range->base,
5326                 .nmsrs = user_range->nmsrs,
5327                 .bitmap = bitmap,
5328         };
5329
5330         if (range.flags & ~(KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE)) {
5331                 r = -EINVAL;
5332                 goto err;
5333         }
5334
5335         if (!range.flags) {
5336                 r = -EINVAL;
5337                 goto err;
5338         }
5339
5340         /* Everything ok, add this range identifier to our global pool */
5341         ranges[kvm->arch.msr_filter.count] = range;
5342         /* Make sure we filled the array before we tell anyone to walk it */
5343         smp_wmb();
5344         kvm->arch.msr_filter.count++;
5345
5346         return 0;
5347 err:
5348         kfree(bitmap);
5349         return r;
5350 }
5351
5352 static int kvm_vm_ioctl_set_msr_filter(struct kvm *kvm, void __user *argp)
5353 {
5354         struct kvm_msr_filter __user *user_msr_filter = argp;
5355         struct kvm_msr_filter filter;
5356         bool default_allow;
5357         int r = 0;
5358         bool empty = true;
5359         u32 i;
5360
5361         if (copy_from_user(&filter, user_msr_filter, sizeof(filter)))
5362                 return -EFAULT;
5363
5364         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++)
5365                 empty &= !filter.ranges[i].nmsrs;
5366
5367         default_allow = !(filter.flags & KVM_MSR_FILTER_DEFAULT_DENY);
5368         if (empty && !default_allow)
5369                 return -EINVAL;
5370
5371         kvm_clear_msr_filter(kvm);
5372
5373         kvm->arch.msr_filter.default_allow = default_allow;
5374
5375         /*
5376          * Protect from concurrent calls to this function that could trigger
5377          * a TOCTOU violation on kvm->arch.msr_filter.count.
5378          */
5379         mutex_lock(&kvm->lock);
5380         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++) {
5381                 r = kvm_add_msr_filter(kvm, &filter.ranges[i]);
5382                 if (r)
5383                         break;
5384         }
5385
5386         kvm_make_all_cpus_request(kvm, KVM_REQ_MSR_FILTER_CHANGED);
5387         mutex_unlock(&kvm->lock);
5388
5389         return r;
5390 }
5391
5392 long kvm_arch_vm_ioctl(struct file *filp,
5393                        unsigned int ioctl, unsigned long arg)
5394 {
5395         struct kvm *kvm = filp->private_data;
5396         void __user *argp = (void __user *)arg;
5397         int r = -ENOTTY;
5398         /*
5399          * This union makes it completely explicit to gcc-3.x
5400          * that these two variables' stack usage should be
5401          * combined, not added together.
5402          */
5403         union {
5404                 struct kvm_pit_state ps;
5405                 struct kvm_pit_state2 ps2;
5406                 struct kvm_pit_config pit_config;
5407         } u;
5408
5409         switch (ioctl) {
5410         case KVM_SET_TSS_ADDR:
5411                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
5412                 break;
5413         case KVM_SET_IDENTITY_MAP_ADDR: {
5414                 u64 ident_addr;
5415
5416                 mutex_lock(&kvm->lock);
5417                 r = -EINVAL;
5418                 if (kvm->created_vcpus)
5419                         goto set_identity_unlock;
5420                 r = -EFAULT;
5421                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
5422                         goto set_identity_unlock;
5423                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
5424 set_identity_unlock:
5425                 mutex_unlock(&kvm->lock);
5426                 break;
5427         }
5428         case KVM_SET_NR_MMU_PAGES:
5429                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
5430                 break;
5431         case KVM_GET_NR_MMU_PAGES:
5432                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
5433                 break;
5434         case KVM_CREATE_IRQCHIP: {
5435                 mutex_lock(&kvm->lock);
5436
5437                 r = -EEXIST;
5438                 if (irqchip_in_kernel(kvm))
5439                         goto create_irqchip_unlock;
5440
5441                 r = -EINVAL;
5442                 if (kvm->created_vcpus)
5443                         goto create_irqchip_unlock;
5444
5445                 r = kvm_pic_init(kvm);
5446                 if (r)
5447                         goto create_irqchip_unlock;
5448
5449                 r = kvm_ioapic_init(kvm);
5450                 if (r) {
5451                         kvm_pic_destroy(kvm);
5452                         goto create_irqchip_unlock;
5453                 }
5454
5455                 r = kvm_setup_default_irq_routing(kvm);
5456                 if (r) {
5457                         kvm_ioapic_destroy(kvm);
5458                         kvm_pic_destroy(kvm);
5459                         goto create_irqchip_unlock;
5460                 }
5461                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
5462                 smp_wmb();
5463                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
5464         create_irqchip_unlock:
5465                 mutex_unlock(&kvm->lock);
5466                 break;
5467         }
5468         case KVM_CREATE_PIT:
5469                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
5470                 goto create_pit;
5471         case KVM_CREATE_PIT2:
5472                 r = -EFAULT;
5473                 if (copy_from_user(&u.pit_config, argp,
5474                                    sizeof(struct kvm_pit_config)))
5475                         goto out;
5476         create_pit:
5477                 mutex_lock(&kvm->lock);
5478                 r = -EEXIST;
5479                 if (kvm->arch.vpit)
5480                         goto create_pit_unlock;
5481                 r = -ENOMEM;
5482                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
5483                 if (kvm->arch.vpit)
5484                         r = 0;
5485         create_pit_unlock:
5486                 mutex_unlock(&kvm->lock);
5487                 break;
5488         case KVM_GET_IRQCHIP: {
5489                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5490                 struct kvm_irqchip *chip;
5491
5492                 chip = memdup_user(argp, sizeof(*chip));
5493                 if (IS_ERR(chip)) {
5494                         r = PTR_ERR(chip);
5495                         goto out;
5496                 }
5497
5498                 r = -ENXIO;
5499                 if (!irqchip_kernel(kvm))
5500                         goto get_irqchip_out;
5501                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
5502                 if (r)
5503                         goto get_irqchip_out;
5504                 r = -EFAULT;
5505                 if (copy_to_user(argp, chip, sizeof(*chip)))
5506                         goto get_irqchip_out;
5507                 r = 0;
5508         get_irqchip_out:
5509                 kfree(chip);
5510                 break;
5511         }
5512         case KVM_SET_IRQCHIP: {
5513                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5514                 struct kvm_irqchip *chip;
5515
5516                 chip = memdup_user(argp, sizeof(*chip));
5517                 if (IS_ERR(chip)) {
5518                         r = PTR_ERR(chip);
5519                         goto out;
5520                 }
5521
5522                 r = -ENXIO;
5523                 if (!irqchip_kernel(kvm))
5524                         goto set_irqchip_out;
5525                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
5526         set_irqchip_out:
5527                 kfree(chip);
5528                 break;
5529         }
5530         case KVM_GET_PIT: {
5531                 r = -EFAULT;
5532                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
5533                         goto out;
5534                 r = -ENXIO;
5535                 if (!kvm->arch.vpit)
5536                         goto out;
5537                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
5538                 if (r)
5539                         goto out;
5540                 r = -EFAULT;
5541                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
5542                         goto out;
5543                 r = 0;
5544                 break;
5545         }
5546         case KVM_SET_PIT: {
5547                 r = -EFAULT;
5548                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
5549                         goto out;
5550                 mutex_lock(&kvm->lock);
5551                 r = -ENXIO;
5552                 if (!kvm->arch.vpit)
5553                         goto set_pit_out;
5554                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
5555 set_pit_out:
5556                 mutex_unlock(&kvm->lock);
5557                 break;
5558         }
5559         case KVM_GET_PIT2: {
5560                 r = -ENXIO;
5561                 if (!kvm->arch.vpit)
5562                         goto out;
5563                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
5564                 if (r)
5565                         goto out;
5566                 r = -EFAULT;
5567                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
5568                         goto out;
5569                 r = 0;
5570                 break;
5571         }
5572         case KVM_SET_PIT2: {
5573                 r = -EFAULT;
5574                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
5575                         goto out;
5576                 mutex_lock(&kvm->lock);
5577                 r = -ENXIO;
5578                 if (!kvm->arch.vpit)
5579                         goto set_pit2_out;
5580                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
5581 set_pit2_out:
5582                 mutex_unlock(&kvm->lock);
5583                 break;
5584         }
5585         case KVM_REINJECT_CONTROL: {
5586                 struct kvm_reinject_control control;
5587                 r =  -EFAULT;
5588                 if (copy_from_user(&control, argp, sizeof(control)))
5589                         goto out;
5590                 r = -ENXIO;
5591                 if (!kvm->arch.vpit)
5592                         goto out;
5593                 r = kvm_vm_ioctl_reinject(kvm, &control);
5594                 break;
5595         }
5596         case KVM_SET_BOOT_CPU_ID:
5597                 r = 0;
5598                 mutex_lock(&kvm->lock);
5599                 if (kvm->created_vcpus)
5600                         r = -EBUSY;
5601                 else
5602                         kvm->arch.bsp_vcpu_id = arg;
5603                 mutex_unlock(&kvm->lock);
5604                 break;
5605         case KVM_XEN_HVM_CONFIG: {
5606                 struct kvm_xen_hvm_config xhc;
5607                 r = -EFAULT;
5608                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
5609                         goto out;
5610                 r = -EINVAL;
5611                 if (xhc.flags)
5612                         goto out;
5613                 memcpy(&kvm->arch.xen_hvm_config, &xhc, sizeof(xhc));
5614                 r = 0;
5615                 break;
5616         }
5617         case KVM_SET_CLOCK: {
5618                 struct kvm_clock_data user_ns;
5619                 u64 now_ns;
5620
5621                 r = -EFAULT;
5622                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
5623                         goto out;
5624
5625                 r = -EINVAL;
5626                 if (user_ns.flags)
5627                         goto out;
5628
5629                 r = 0;
5630                 /*
5631                  * TODO: userspace has to take care of races with VCPU_RUN, so
5632                  * kvm_gen_update_masterclock() can be cut down to locked
5633                  * pvclock_update_vm_gtod_copy().
5634                  */
5635                 kvm_gen_update_masterclock(kvm);
5636                 now_ns = get_kvmclock_ns(kvm);
5637                 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
5638                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
5639                 break;
5640         }
5641         case KVM_GET_CLOCK: {
5642                 struct kvm_clock_data user_ns;
5643                 u64 now_ns;
5644
5645                 now_ns = get_kvmclock_ns(kvm);
5646                 user_ns.clock = now_ns;
5647                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
5648                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
5649
5650                 r = -EFAULT;
5651                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
5652                         goto out;
5653                 r = 0;
5654                 break;
5655         }
5656         case KVM_MEMORY_ENCRYPT_OP: {
5657                 r = -ENOTTY;
5658                 if (kvm_x86_ops.mem_enc_op)
5659                         r = kvm_x86_ops.mem_enc_op(kvm, argp);
5660                 break;
5661         }
5662         case KVM_MEMORY_ENCRYPT_REG_REGION: {
5663                 struct kvm_enc_region region;
5664
5665                 r = -EFAULT;
5666                 if (copy_from_user(&region, argp, sizeof(region)))
5667                         goto out;
5668
5669                 r = -ENOTTY;
5670                 if (kvm_x86_ops.mem_enc_reg_region)
5671                         r = kvm_x86_ops.mem_enc_reg_region(kvm, &region);
5672                 break;
5673         }
5674         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
5675                 struct kvm_enc_region region;
5676
5677                 r = -EFAULT;
5678                 if (copy_from_user(&region, argp, sizeof(region)))
5679                         goto out;
5680
5681                 r = -ENOTTY;
5682                 if (kvm_x86_ops.mem_enc_unreg_region)
5683                         r = kvm_x86_ops.mem_enc_unreg_region(kvm, &region);
5684                 break;
5685         }
5686         case KVM_HYPERV_EVENTFD: {
5687                 struct kvm_hyperv_eventfd hvevfd;
5688
5689                 r = -EFAULT;
5690                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
5691                         goto out;
5692                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
5693                 break;
5694         }
5695         case KVM_SET_PMU_EVENT_FILTER:
5696                 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
5697                 break;
5698         case KVM_X86_SET_MSR_FILTER:
5699                 r = kvm_vm_ioctl_set_msr_filter(kvm, argp);
5700                 break;
5701         default:
5702                 r = -ENOTTY;
5703         }
5704 out:
5705         return r;
5706 }
5707
5708 static void kvm_init_msr_list(void)
5709 {
5710         struct x86_pmu_capability x86_pmu;
5711         u32 dummy[2];
5712         unsigned i;
5713
5714         BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
5715                          "Please update the fixed PMCs in msrs_to_saved_all[]");
5716
5717         perf_get_x86_pmu_capability(&x86_pmu);
5718
5719         num_msrs_to_save = 0;
5720         num_emulated_msrs = 0;
5721         num_msr_based_features = 0;
5722
5723         for (i = 0; i < ARRAY_SIZE(msrs_to_save_all); i++) {
5724                 if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
5725                         continue;
5726
5727                 /*
5728                  * Even MSRs that are valid in the host may not be exposed
5729                  * to the guests in some cases.
5730                  */
5731                 switch (msrs_to_save_all[i]) {
5732                 case MSR_IA32_BNDCFGS:
5733                         if (!kvm_mpx_supported())
5734                                 continue;
5735                         break;
5736                 case MSR_TSC_AUX:
5737                         if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP))
5738                                 continue;
5739                         break;
5740                 case MSR_IA32_UMWAIT_CONTROL:
5741                         if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG))
5742                                 continue;
5743                         break;
5744                 case MSR_IA32_RTIT_CTL:
5745                 case MSR_IA32_RTIT_STATUS:
5746                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT))
5747                                 continue;
5748                         break;
5749                 case MSR_IA32_RTIT_CR3_MATCH:
5750                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
5751                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
5752                                 continue;
5753                         break;
5754                 case MSR_IA32_RTIT_OUTPUT_BASE:
5755                 case MSR_IA32_RTIT_OUTPUT_MASK:
5756                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
5757                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
5758                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
5759                                 continue;
5760                         break;
5761                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
5762                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
5763                                 msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=
5764                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
5765                                 continue;
5766                         break;
5767                 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
5768                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
5769                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
5770                                 continue;
5771                         break;
5772                 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
5773                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
5774                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
5775                                 continue;
5776                         break;
5777                 default:
5778                         break;
5779                 }
5780
5781                 msrs_to_save[num_msrs_to_save++] = msrs_to_save_all[i];
5782         }
5783
5784         for (i = 0; i < ARRAY_SIZE(emulated_msrs_all); i++) {
5785                 if (!kvm_x86_ops.has_emulated_msr(emulated_msrs_all[i]))
5786                         continue;
5787
5788                 emulated_msrs[num_emulated_msrs++] = emulated_msrs_all[i];
5789         }
5790
5791         for (i = 0; i < ARRAY_SIZE(msr_based_features_all); i++) {
5792                 struct kvm_msr_entry msr;
5793
5794                 msr.index = msr_based_features_all[i];
5795                 if (kvm_get_msr_feature(&msr))
5796                         continue;
5797
5798                 msr_based_features[num_msr_based_features++] = msr_based_features_all[i];
5799         }
5800 }
5801
5802 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
5803                            const void *v)
5804 {
5805         int handled = 0;
5806         int n;
5807
5808         do {
5809                 n = min(len, 8);
5810                 if (!(lapic_in_kernel(vcpu) &&
5811                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
5812                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
5813                         break;
5814                 handled += n;
5815                 addr += n;
5816                 len -= n;
5817                 v += n;
5818         } while (len);
5819
5820         return handled;
5821 }
5822
5823 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
5824 {
5825         int handled = 0;
5826         int n;
5827
5828         do {
5829                 n = min(len, 8);
5830                 if (!(lapic_in_kernel(vcpu) &&
5831                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
5832                                          addr, n, v))
5833                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
5834                         break;
5835                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
5836                 handled += n;
5837                 addr += n;
5838                 len -= n;
5839                 v += n;
5840         } while (len);
5841
5842         return handled;
5843 }
5844
5845 static void kvm_set_segment(struct kvm_vcpu *vcpu,
5846                         struct kvm_segment *var, int seg)
5847 {
5848         kvm_x86_ops.set_segment(vcpu, var, seg);
5849 }
5850
5851 void kvm_get_segment(struct kvm_vcpu *vcpu,
5852                      struct kvm_segment *var, int seg)
5853 {
5854         kvm_x86_ops.get_segment(vcpu, var, seg);
5855 }
5856
5857 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
5858                            struct x86_exception *exception)
5859 {
5860         gpa_t t_gpa;
5861
5862         BUG_ON(!mmu_is_nested(vcpu));
5863
5864         /* NPT walks are always user-walks */
5865         access |= PFERR_USER_MASK;
5866         t_gpa  = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
5867
5868         return t_gpa;
5869 }
5870
5871 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
5872                               struct x86_exception *exception)
5873 {
5874         u32 access = (kvm_x86_ops.get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5875         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5876 }
5877
5878  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
5879                                 struct x86_exception *exception)
5880 {
5881         u32 access = (kvm_x86_ops.get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5882         access |= PFERR_FETCH_MASK;
5883         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5884 }
5885
5886 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
5887                                struct x86_exception *exception)
5888 {
5889         u32 access = (kvm_x86_ops.get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5890         access |= PFERR_WRITE_MASK;
5891         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5892 }
5893
5894 /* uses this to access any guest's mapped memory without checking CPL */
5895 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
5896                                 struct x86_exception *exception)
5897 {
5898         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
5899 }
5900
5901 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
5902                                       struct kvm_vcpu *vcpu, u32 access,
5903                                       struct x86_exception *exception)
5904 {
5905         void *data = val;
5906         int r = X86EMUL_CONTINUE;
5907
5908         while (bytes) {
5909                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
5910                                                             exception);
5911                 unsigned offset = addr & (PAGE_SIZE-1);
5912                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
5913                 int ret;
5914
5915                 if (gpa == UNMAPPED_GVA)
5916                         return X86EMUL_PROPAGATE_FAULT;
5917                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
5918                                                offset, toread);
5919                 if (ret < 0) {
5920                         r = X86EMUL_IO_NEEDED;
5921                         goto out;
5922                 }
5923
5924                 bytes -= toread;
5925                 data += toread;
5926                 addr += toread;
5927         }
5928 out:
5929         return r;
5930 }
5931
5932 /* used for instruction fetching */
5933 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
5934                                 gva_t addr, void *val, unsigned int bytes,
5935                                 struct x86_exception *exception)
5936 {
5937         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5938         u32 access = (kvm_x86_ops.get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5939         unsigned offset;
5940         int ret;
5941
5942         /* Inline kvm_read_guest_virt_helper for speed.  */
5943         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
5944                                                     exception);
5945         if (unlikely(gpa == UNMAPPED_GVA))
5946                 return X86EMUL_PROPAGATE_FAULT;
5947
5948         offset = addr & (PAGE_SIZE-1);
5949         if (WARN_ON(offset + bytes > PAGE_SIZE))
5950                 bytes = (unsigned)PAGE_SIZE - offset;
5951         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
5952                                        offset, bytes);
5953         if (unlikely(ret < 0))
5954                 return X86EMUL_IO_NEEDED;
5955
5956         return X86EMUL_CONTINUE;
5957 }
5958
5959 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
5960                                gva_t addr, void *val, unsigned int bytes,
5961                                struct x86_exception *exception)
5962 {
5963         u32 access = (kvm_x86_ops.get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5964
5965         /*
5966          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
5967          * is returned, but our callers are not ready for that and they blindly
5968          * call kvm_inject_page_fault.  Ensure that they at least do not leak
5969          * uninitialized kernel stack memory into cr2 and error code.
5970          */
5971         memset(exception, 0, sizeof(*exception));
5972         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
5973                                           exception);
5974 }
5975 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
5976
5977 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
5978                              gva_t addr, void *val, unsigned int bytes,
5979                              struct x86_exception *exception, bool system)
5980 {
5981         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5982         u32 access = 0;
5983
5984         if (!system && kvm_x86_ops.get_cpl(vcpu) == 3)
5985                 access |= PFERR_USER_MASK;
5986
5987         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
5988 }
5989
5990 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
5991                 unsigned long addr, void *val, unsigned int bytes)
5992 {
5993         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5994         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
5995
5996         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
5997 }
5998
5999 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6000                                       struct kvm_vcpu *vcpu, u32 access,
6001                                       struct x86_exception *exception)
6002 {
6003         void *data = val;
6004         int r = X86EMUL_CONTINUE;
6005
6006         while (bytes) {
6007                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
6008                                                              access,
6009                                                              exception);
6010                 unsigned offset = addr & (PAGE_SIZE-1);
6011                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
6012                 int ret;
6013
6014                 if (gpa == UNMAPPED_GVA)
6015                         return X86EMUL_PROPAGATE_FAULT;
6016                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
6017                 if (ret < 0) {
6018                         r = X86EMUL_IO_NEEDED;
6019                         goto out;
6020                 }
6021
6022                 bytes -= towrite;
6023                 data += towrite;
6024                 addr += towrite;
6025         }
6026 out:
6027         return r;
6028 }
6029
6030 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
6031                               unsigned int bytes, struct x86_exception *exception,
6032                               bool system)
6033 {
6034         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6035         u32 access = PFERR_WRITE_MASK;
6036
6037         if (!system && kvm_x86_ops.get_cpl(vcpu) == 3)
6038                 access |= PFERR_USER_MASK;
6039
6040         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6041                                            access, exception);
6042 }
6043
6044 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
6045                                 unsigned int bytes, struct x86_exception *exception)
6046 {
6047         /* kvm_write_guest_virt_system can pull in tons of pages. */
6048         vcpu->arch.l1tf_flush_l1d = true;
6049
6050         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6051                                            PFERR_WRITE_MASK, exception);
6052 }
6053 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
6054
6055 int handle_ud(struct kvm_vcpu *vcpu)
6056 {
6057         static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
6058         int emul_type = EMULTYPE_TRAP_UD;
6059         char sig[5]; /* ud2; .ascii "kvm" */
6060         struct x86_exception e;
6061
6062         if (unlikely(!kvm_x86_ops.can_emulate_instruction(vcpu, NULL, 0)))
6063                 return 1;
6064
6065         if (force_emulation_prefix &&
6066             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
6067                                 sig, sizeof(sig), &e) == 0 &&
6068             memcmp(sig, kvm_emulate_prefix, sizeof(sig)) == 0) {
6069                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
6070                 emul_type = EMULTYPE_TRAP_UD_FORCED;
6071         }
6072
6073         return kvm_emulate_instruction(vcpu, emul_type);
6074 }
6075 EXPORT_SYMBOL_GPL(handle_ud);
6076
6077 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6078                             gpa_t gpa, bool write)
6079 {
6080         /* For APIC access vmexit */
6081         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6082                 return 1;
6083
6084         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
6085                 trace_vcpu_match_mmio(gva, gpa, write, true);
6086                 return 1;
6087         }
6088
6089         return 0;
6090 }
6091
6092 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6093                                 gpa_t *gpa, struct x86_exception *exception,
6094                                 bool write)
6095 {
6096         u32 access = ((kvm_x86_ops.get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
6097                 | (write ? PFERR_WRITE_MASK : 0);
6098
6099         /*
6100          * currently PKRU is only applied to ept enabled guest so
6101          * there is no pkey in EPT page table for L1 guest or EPT
6102          * shadow page table for L2 guest.
6103          */
6104         if (vcpu_match_mmio_gva(vcpu, gva)
6105             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
6106                                  vcpu->arch.mmio_access, 0, access)) {
6107                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
6108                                         (gva & (PAGE_SIZE - 1));
6109                 trace_vcpu_match_mmio(gva, *gpa, write, false);
6110                 return 1;
6111         }
6112
6113         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6114
6115         if (*gpa == UNMAPPED_GVA)
6116                 return -1;
6117
6118         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
6119 }
6120
6121 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
6122                         const void *val, int bytes)
6123 {
6124         int ret;
6125
6126         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
6127         if (ret < 0)
6128                 return 0;
6129         kvm_page_track_write(vcpu, gpa, val, bytes);
6130         return 1;
6131 }
6132
6133 struct read_write_emulator_ops {
6134         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
6135                                   int bytes);
6136         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
6137                                   void *val, int bytes);
6138         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6139                                int bytes, void *val);
6140         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6141                                     void *val, int bytes);
6142         bool write;
6143 };
6144
6145 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
6146 {
6147         if (vcpu->mmio_read_completed) {
6148                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
6149                                vcpu->mmio_fragments[0].gpa, val);
6150                 vcpu->mmio_read_completed = 0;
6151                 return 1;
6152         }
6153
6154         return 0;
6155 }
6156
6157 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6158                         void *val, int bytes)
6159 {
6160         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
6161 }
6162
6163 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6164                          void *val, int bytes)
6165 {
6166         return emulator_write_phys(vcpu, gpa, val, bytes);
6167 }
6168
6169 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
6170 {
6171         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
6172         return vcpu_mmio_write(vcpu, gpa, bytes, val);
6173 }
6174
6175 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6176                           void *val, int bytes)
6177 {
6178         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
6179         return X86EMUL_IO_NEEDED;
6180 }
6181
6182 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6183                            void *val, int bytes)
6184 {
6185         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
6186
6187         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
6188         return X86EMUL_CONTINUE;
6189 }
6190
6191 static const struct read_write_emulator_ops read_emultor = {
6192         .read_write_prepare = read_prepare,
6193         .read_write_emulate = read_emulate,
6194         .read_write_mmio = vcpu_mmio_read,
6195         .read_write_exit_mmio = read_exit_mmio,
6196 };
6197
6198 static const struct read_write_emulator_ops write_emultor = {
6199         .read_write_emulate = write_emulate,
6200         .read_write_mmio = write_mmio,
6201         .read_write_exit_mmio = write_exit_mmio,
6202         .write = true,
6203 };
6204
6205 static int emulator_read_write_onepage(unsigned long addr, void *val,
6206                                        unsigned int bytes,
6207                                        struct x86_exception *exception,
6208                                        struct kvm_vcpu *vcpu,
6209                                        const struct read_write_emulator_ops *ops)
6210 {
6211         gpa_t gpa;
6212         int handled, ret;
6213         bool write = ops->write;
6214         struct kvm_mmio_fragment *frag;
6215         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6216
6217         /*
6218          * If the exit was due to a NPF we may already have a GPA.
6219          * If the GPA is present, use it to avoid the GVA to GPA table walk.
6220          * Note, this cannot be used on string operations since string
6221          * operation using rep will only have the initial GPA from the NPF
6222          * occurred.
6223          */
6224         if (ctxt->gpa_available && emulator_can_use_gpa(ctxt) &&
6225             (addr & ~PAGE_MASK) == (ctxt->gpa_val & ~PAGE_MASK)) {
6226                 gpa = ctxt->gpa_val;
6227                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
6228         } else {
6229                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
6230                 if (ret < 0)
6231                         return X86EMUL_PROPAGATE_FAULT;
6232         }
6233
6234         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
6235                 return X86EMUL_CONTINUE;
6236
6237         /*
6238          * Is this MMIO handled locally?
6239          */
6240         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
6241         if (handled == bytes)
6242                 return X86EMUL_CONTINUE;
6243
6244         gpa += handled;
6245         bytes -= handled;
6246         val += handled;
6247
6248         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
6249         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
6250         frag->gpa = gpa;
6251         frag->data = val;
6252         frag->len = bytes;
6253         return X86EMUL_CONTINUE;
6254 }
6255
6256 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
6257                         unsigned long addr,
6258                         void *val, unsigned int bytes,
6259                         struct x86_exception *exception,
6260                         const struct read_write_emulator_ops *ops)
6261 {
6262         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6263         gpa_t gpa;
6264         int rc;
6265
6266         if (ops->read_write_prepare &&
6267                   ops->read_write_prepare(vcpu, val, bytes))
6268                 return X86EMUL_CONTINUE;
6269
6270         vcpu->mmio_nr_fragments = 0;
6271
6272         /* Crossing a page boundary? */
6273         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
6274                 int now;
6275
6276                 now = -addr & ~PAGE_MASK;
6277                 rc = emulator_read_write_onepage(addr, val, now, exception,
6278                                                  vcpu, ops);
6279
6280                 if (rc != X86EMUL_CONTINUE)
6281                         return rc;
6282                 addr += now;
6283                 if (ctxt->mode != X86EMUL_MODE_PROT64)
6284                         addr = (u32)addr;
6285                 val += now;
6286                 bytes -= now;
6287         }
6288
6289         rc = emulator_read_write_onepage(addr, val, bytes, exception,
6290                                          vcpu, ops);
6291         if (rc != X86EMUL_CONTINUE)
6292                 return rc;
6293
6294         if (!vcpu->mmio_nr_fragments)
6295                 return rc;
6296
6297         gpa = vcpu->mmio_fragments[0].gpa;
6298
6299         vcpu->mmio_needed = 1;
6300         vcpu->mmio_cur_fragment = 0;
6301
6302         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
6303         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
6304         vcpu->run->exit_reason = KVM_EXIT_MMIO;
6305         vcpu->run->mmio.phys_addr = gpa;
6306
6307         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
6308 }
6309
6310 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
6311                                   unsigned long addr,
6312                                   void *val,
6313                                   unsigned int bytes,
6314                                   struct x86_exception *exception)
6315 {
6316         return emulator_read_write(ctxt, addr, val, bytes,
6317                                    exception, &read_emultor);
6318 }
6319
6320 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
6321                             unsigned long addr,
6322                             const void *val,
6323                             unsigned int bytes,
6324                             struct x86_exception *exception)
6325 {
6326         return emulator_read_write(ctxt, addr, (void *)val, bytes,
6327                                    exception, &write_emultor);
6328 }
6329
6330 #define CMPXCHG_TYPE(t, ptr, old, new) \
6331         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
6332
6333 #ifdef CONFIG_X86_64
6334 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
6335 #else
6336 #  define CMPXCHG64(ptr, old, new) \
6337         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
6338 #endif
6339
6340 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
6341                                      unsigned long addr,
6342                                      const void *old,
6343                                      const void *new,
6344                                      unsigned int bytes,
6345                                      struct x86_exception *exception)
6346 {
6347         struct kvm_host_map map;
6348         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6349         u64 page_line_mask;
6350         gpa_t gpa;
6351         char *kaddr;
6352         bool exchanged;
6353
6354         /* guests cmpxchg8b have to be emulated atomically */
6355         if (bytes > 8 || (bytes & (bytes - 1)))
6356                 goto emul_write;
6357
6358         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
6359
6360         if (gpa == UNMAPPED_GVA ||
6361             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6362                 goto emul_write;
6363
6364         /*
6365          * Emulate the atomic as a straight write to avoid #AC if SLD is
6366          * enabled in the host and the access splits a cache line.
6367          */
6368         if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT))
6369                 page_line_mask = ~(cache_line_size() - 1);
6370         else
6371                 page_line_mask = PAGE_MASK;
6372
6373         if (((gpa + bytes - 1) & page_line_mask) != (gpa & page_line_mask))
6374                 goto emul_write;
6375
6376         if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
6377                 goto emul_write;
6378
6379         kaddr = map.hva + offset_in_page(gpa);
6380
6381         switch (bytes) {
6382         case 1:
6383                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
6384                 break;
6385         case 2:
6386                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
6387                 break;
6388         case 4:
6389                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
6390                 break;
6391         case 8:
6392                 exchanged = CMPXCHG64(kaddr, old, new);
6393                 break;
6394         default:
6395                 BUG();
6396         }
6397
6398         kvm_vcpu_unmap(vcpu, &map, true);
6399
6400         if (!exchanged)
6401                 return X86EMUL_CMPXCHG_FAILED;
6402
6403         kvm_page_track_write(vcpu, gpa, new, bytes);
6404
6405         return X86EMUL_CONTINUE;
6406
6407 emul_write:
6408         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
6409
6410         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
6411 }
6412
6413 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
6414 {
6415         int r = 0, i;
6416
6417         for (i = 0; i < vcpu->arch.pio.count; i++) {
6418                 if (vcpu->arch.pio.in)
6419                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
6420                                             vcpu->arch.pio.size, pd);
6421                 else
6422                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
6423                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
6424                                              pd);
6425                 if (r)
6426                         break;
6427                 pd += vcpu->arch.pio.size;
6428         }
6429         return r;
6430 }
6431
6432 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
6433                                unsigned short port, void *val,
6434                                unsigned int count, bool in)
6435 {
6436         vcpu->arch.pio.port = port;
6437         vcpu->arch.pio.in = in;
6438         vcpu->arch.pio.count  = count;
6439         vcpu->arch.pio.size = size;
6440
6441         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
6442                 vcpu->arch.pio.count = 0;
6443                 return 1;
6444         }
6445
6446         vcpu->run->exit_reason = KVM_EXIT_IO;
6447         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
6448         vcpu->run->io.size = size;
6449         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
6450         vcpu->run->io.count = count;
6451         vcpu->run->io.port = port;
6452
6453         return 0;
6454 }
6455
6456 static int emulator_pio_in(struct kvm_vcpu *vcpu, int size,
6457                            unsigned short port, void *val, unsigned int count)
6458 {
6459         int ret;
6460
6461         if (vcpu->arch.pio.count)
6462                 goto data_avail;
6463
6464         memset(vcpu->arch.pio_data, 0, size * count);
6465
6466         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
6467         if (ret) {
6468 data_avail:
6469                 memcpy(val, vcpu->arch.pio_data, size * count);
6470                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
6471                 vcpu->arch.pio.count = 0;
6472                 return 1;
6473         }
6474
6475         return 0;
6476 }
6477
6478 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
6479                                     int size, unsigned short port, void *val,
6480                                     unsigned int count)
6481 {
6482         return emulator_pio_in(emul_to_vcpu(ctxt), size, port, val, count);
6483
6484 }
6485
6486 static int emulator_pio_out(struct kvm_vcpu *vcpu, int size,
6487                             unsigned short port, const void *val,
6488                             unsigned int count)
6489 {
6490         memcpy(vcpu->arch.pio_data, val, size * count);
6491         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
6492         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
6493 }
6494
6495 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
6496                                      int size, unsigned short port,
6497                                      const void *val, unsigned int count)
6498 {
6499         return emulator_pio_out(emul_to_vcpu(ctxt), size, port, val, count);
6500 }
6501
6502 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
6503 {
6504         return kvm_x86_ops.get_segment_base(vcpu, seg);
6505 }
6506
6507 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
6508 {
6509         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
6510 }
6511
6512 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
6513 {
6514         if (!need_emulate_wbinvd(vcpu))
6515                 return X86EMUL_CONTINUE;
6516
6517         if (kvm_x86_ops.has_wbinvd_exit()) {
6518                 int cpu = get_cpu();
6519
6520                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
6521                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
6522                                 wbinvd_ipi, NULL, 1);
6523                 put_cpu();
6524                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
6525         } else
6526                 wbinvd();
6527         return X86EMUL_CONTINUE;
6528 }
6529
6530 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
6531 {
6532         kvm_emulate_wbinvd_noskip(vcpu);
6533         return kvm_skip_emulated_instruction(vcpu);
6534 }
6535 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
6536
6537
6538
6539 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
6540 {
6541         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
6542 }
6543
6544 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
6545                            unsigned long *dest)
6546 {
6547         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
6548 }
6549
6550 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
6551                            unsigned long value)
6552 {
6553
6554         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
6555 }
6556
6557 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
6558 {
6559         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
6560 }
6561
6562 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
6563 {
6564         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6565         unsigned long value;
6566
6567         switch (cr) {
6568         case 0:
6569                 value = kvm_read_cr0(vcpu);
6570                 break;
6571         case 2:
6572                 value = vcpu->arch.cr2;
6573                 break;
6574         case 3:
6575                 value = kvm_read_cr3(vcpu);
6576                 break;
6577         case 4:
6578                 value = kvm_read_cr4(vcpu);
6579                 break;
6580         case 8:
6581                 value = kvm_get_cr8(vcpu);
6582                 break;
6583         default:
6584                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
6585                 return 0;
6586         }
6587
6588         return value;
6589 }
6590
6591 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
6592 {
6593         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6594         int res = 0;
6595
6596         switch (cr) {
6597         case 0:
6598                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
6599                 break;
6600         case 2:
6601                 vcpu->arch.cr2 = val;
6602                 break;
6603         case 3:
6604                 res = kvm_set_cr3(vcpu, val);
6605                 break;
6606         case 4:
6607                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
6608                 break;
6609         case 8:
6610                 res = kvm_set_cr8(vcpu, val);
6611                 break;
6612         default:
6613                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
6614                 res = -1;
6615         }
6616
6617         return res;
6618 }
6619
6620 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
6621 {
6622         return kvm_x86_ops.get_cpl(emul_to_vcpu(ctxt));
6623 }
6624
6625 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6626 {
6627         kvm_x86_ops.get_gdt(emul_to_vcpu(ctxt), dt);
6628 }
6629
6630 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6631 {
6632         kvm_x86_ops.get_idt(emul_to_vcpu(ctxt), dt);
6633 }
6634
6635 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6636 {
6637         kvm_x86_ops.set_gdt(emul_to_vcpu(ctxt), dt);
6638 }
6639
6640 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6641 {
6642         kvm_x86_ops.set_idt(emul_to_vcpu(ctxt), dt);
6643 }
6644
6645 static unsigned long emulator_get_cached_segment_base(
6646         struct x86_emulate_ctxt *ctxt, int seg)
6647 {
6648         return get_segment_base(emul_to_vcpu(ctxt), seg);
6649 }
6650
6651 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
6652                                  struct desc_struct *desc, u32 *base3,
6653                                  int seg)
6654 {
6655         struct kvm_segment var;
6656
6657         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
6658         *selector = var.selector;
6659
6660         if (var.unusable) {
6661                 memset(desc, 0, sizeof(*desc));
6662                 if (base3)
6663                         *base3 = 0;
6664                 return false;
6665         }
6666
6667         if (var.g)
6668                 var.limit >>= 12;
6669         set_desc_limit(desc, var.limit);
6670         set_desc_base(desc, (unsigned long)var.base);
6671 #ifdef CONFIG_X86_64
6672         if (base3)
6673                 *base3 = var.base >> 32;
6674 #endif
6675         desc->type = var.type;
6676         desc->s = var.s;
6677         desc->dpl = var.dpl;
6678         desc->p = var.present;
6679         desc->avl = var.avl;
6680         desc->l = var.l;
6681         desc->d = var.db;
6682         desc->g = var.g;
6683
6684         return true;
6685 }
6686
6687 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
6688                                  struct desc_struct *desc, u32 base3,
6689                                  int seg)
6690 {
6691         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6692         struct kvm_segment var;
6693
6694         var.selector = selector;
6695         var.base = get_desc_base(desc);
6696 #ifdef CONFIG_X86_64
6697         var.base |= ((u64)base3) << 32;
6698 #endif
6699         var.limit = get_desc_limit(desc);
6700         if (desc->g)
6701                 var.limit = (var.limit << 12) | 0xfff;
6702         var.type = desc->type;
6703         var.dpl = desc->dpl;
6704         var.db = desc->d;
6705         var.s = desc->s;
6706         var.l = desc->l;
6707         var.g = desc->g;
6708         var.avl = desc->avl;
6709         var.present = desc->p;
6710         var.unusable = !var.present;
6711         var.padding = 0;
6712
6713         kvm_set_segment(vcpu, &var, seg);
6714         return;
6715 }
6716
6717 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
6718                             u32 msr_index, u64 *pdata)
6719 {
6720         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6721         int r;
6722
6723         r = kvm_get_msr(vcpu, msr_index, pdata);
6724
6725         if (r && kvm_get_msr_user_space(vcpu, msr_index, r)) {
6726                 /* Bounce to user space */
6727                 return X86EMUL_IO_NEEDED;
6728         }
6729
6730         return r;
6731 }
6732
6733 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
6734                             u32 msr_index, u64 data)
6735 {
6736         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6737         int r;
6738
6739         r = kvm_set_msr(vcpu, msr_index, data);
6740
6741         if (r && kvm_set_msr_user_space(vcpu, msr_index, data, r)) {
6742                 /* Bounce to user space */
6743                 return X86EMUL_IO_NEEDED;
6744         }
6745
6746         return r;
6747 }
6748
6749 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
6750 {
6751         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6752
6753         return vcpu->arch.smbase;
6754 }
6755
6756 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
6757 {
6758         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6759
6760         vcpu->arch.smbase = smbase;
6761 }
6762
6763 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
6764                               u32 pmc)
6765 {
6766         return kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt), pmc);
6767 }
6768
6769 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
6770                              u32 pmc, u64 *pdata)
6771 {
6772         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
6773 }
6774
6775 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
6776 {
6777         emul_to_vcpu(ctxt)->arch.halt_request = 1;
6778 }
6779
6780 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
6781                               struct x86_instruction_info *info,
6782                               enum x86_intercept_stage stage)
6783 {
6784         return kvm_x86_ops.check_intercept(emul_to_vcpu(ctxt), info, stage,
6785                                             &ctxt->exception);
6786 }
6787
6788 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
6789                               u32 *eax, u32 *ebx, u32 *ecx, u32 *edx,
6790                               bool exact_only)
6791 {
6792         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, exact_only);
6793 }
6794
6795 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt *ctxt)
6796 {
6797         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_LM);
6798 }
6799
6800 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt *ctxt)
6801 {
6802         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_MOVBE);
6803 }
6804
6805 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)
6806 {
6807         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_FXSR);
6808 }
6809
6810 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
6811 {
6812         return kvm_register_read(emul_to_vcpu(ctxt), reg);
6813 }
6814
6815 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
6816 {
6817         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
6818 }
6819
6820 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
6821 {
6822         kvm_x86_ops.set_nmi_mask(emul_to_vcpu(ctxt), masked);
6823 }
6824
6825 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
6826 {
6827         return emul_to_vcpu(ctxt)->arch.hflags;
6828 }
6829
6830 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
6831 {
6832         emul_to_vcpu(ctxt)->arch.hflags = emul_flags;
6833 }
6834
6835 static int emulator_pre_leave_smm(struct x86_emulate_ctxt *ctxt,
6836                                   const char *smstate)
6837 {
6838         return kvm_x86_ops.pre_leave_smm(emul_to_vcpu(ctxt), smstate);
6839 }
6840
6841 static void emulator_post_leave_smm(struct x86_emulate_ctxt *ctxt)
6842 {
6843         kvm_smm_changed(emul_to_vcpu(ctxt));
6844 }
6845
6846 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
6847 {
6848         return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
6849 }
6850
6851 static const struct x86_emulate_ops emulate_ops = {
6852         .read_gpr            = emulator_read_gpr,
6853         .write_gpr           = emulator_write_gpr,
6854         .read_std            = emulator_read_std,
6855         .write_std           = emulator_write_std,
6856         .read_phys           = kvm_read_guest_phys_system,
6857         .fetch               = kvm_fetch_guest_virt,
6858         .read_emulated       = emulator_read_emulated,
6859         .write_emulated      = emulator_write_emulated,
6860         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
6861         .invlpg              = emulator_invlpg,
6862         .pio_in_emulated     = emulator_pio_in_emulated,
6863         .pio_out_emulated    = emulator_pio_out_emulated,
6864         .get_segment         = emulator_get_segment,
6865         .set_segment         = emulator_set_segment,
6866         .get_cached_segment_base = emulator_get_cached_segment_base,
6867         .get_gdt             = emulator_get_gdt,
6868         .get_idt             = emulator_get_idt,
6869         .set_gdt             = emulator_set_gdt,
6870         .set_idt             = emulator_set_idt,
6871         .get_cr              = emulator_get_cr,
6872         .set_cr              = emulator_set_cr,
6873         .cpl                 = emulator_get_cpl,
6874         .get_dr              = emulator_get_dr,
6875         .set_dr              = emulator_set_dr,
6876         .get_smbase          = emulator_get_smbase,
6877         .set_smbase          = emulator_set_smbase,
6878         .set_msr             = emulator_set_msr,
6879         .get_msr             = emulator_get_msr,
6880         .check_pmc           = emulator_check_pmc,
6881         .read_pmc            = emulator_read_pmc,
6882         .halt                = emulator_halt,
6883         .wbinvd              = emulator_wbinvd,
6884         .fix_hypercall       = emulator_fix_hypercall,
6885         .intercept           = emulator_intercept,
6886         .get_cpuid           = emulator_get_cpuid,
6887         .guest_has_long_mode = emulator_guest_has_long_mode,
6888         .guest_has_movbe     = emulator_guest_has_movbe,
6889         .guest_has_fxsr      = emulator_guest_has_fxsr,
6890         .set_nmi_mask        = emulator_set_nmi_mask,
6891         .get_hflags          = emulator_get_hflags,
6892         .set_hflags          = emulator_set_hflags,
6893         .pre_leave_smm       = emulator_pre_leave_smm,
6894         .post_leave_smm      = emulator_post_leave_smm,
6895         .set_xcr             = emulator_set_xcr,
6896 };
6897
6898 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
6899 {
6900         u32 int_shadow = kvm_x86_ops.get_interrupt_shadow(vcpu);
6901         /*
6902          * an sti; sti; sequence only disable interrupts for the first
6903          * instruction. So, if the last instruction, be it emulated or
6904          * not, left the system with the INT_STI flag enabled, it
6905          * means that the last instruction is an sti. We should not
6906          * leave the flag on in this case. The same goes for mov ss
6907          */
6908         if (int_shadow & mask)
6909                 mask = 0;
6910         if (unlikely(int_shadow || mask)) {
6911                 kvm_x86_ops.set_interrupt_shadow(vcpu, mask);
6912                 if (!mask)
6913                         kvm_make_request(KVM_REQ_EVENT, vcpu);
6914         }
6915 }
6916
6917 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
6918 {
6919         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6920         if (ctxt->exception.vector == PF_VECTOR)
6921                 return kvm_inject_emulated_page_fault(vcpu, &ctxt->exception);
6922
6923         if (ctxt->exception.error_code_valid)
6924                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
6925                                       ctxt->exception.error_code);
6926         else
6927                 kvm_queue_exception(vcpu, ctxt->exception.vector);
6928         return false;
6929 }
6930
6931 static struct x86_emulate_ctxt *alloc_emulate_ctxt(struct kvm_vcpu *vcpu)
6932 {
6933         struct x86_emulate_ctxt *ctxt;
6934
6935         ctxt = kmem_cache_zalloc(x86_emulator_cache, GFP_KERNEL_ACCOUNT);
6936         if (!ctxt) {
6937                 pr_err("kvm: failed to allocate vcpu's emulator\n");
6938                 return NULL;
6939         }
6940
6941         ctxt->vcpu = vcpu;
6942         ctxt->ops = &emulate_ops;
6943         vcpu->arch.emulate_ctxt = ctxt;
6944
6945         return ctxt;
6946 }
6947
6948 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
6949 {
6950         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6951         int cs_db, cs_l;
6952
6953         kvm_x86_ops.get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
6954
6955         ctxt->gpa_available = false;
6956         ctxt->eflags = kvm_get_rflags(vcpu);
6957         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
6958
6959         ctxt->eip = kvm_rip_read(vcpu);
6960         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
6961                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
6962                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
6963                      cs_db                              ? X86EMUL_MODE_PROT32 :
6964                                                           X86EMUL_MODE_PROT16;
6965         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
6966         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
6967         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
6968
6969         init_decode_cache(ctxt);
6970         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
6971 }
6972
6973 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
6974 {
6975         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6976         int ret;
6977
6978         init_emulate_ctxt(vcpu);
6979
6980         ctxt->op_bytes = 2;
6981         ctxt->ad_bytes = 2;
6982         ctxt->_eip = ctxt->eip + inc_eip;
6983         ret = emulate_int_real(ctxt, irq);
6984
6985         if (ret != X86EMUL_CONTINUE) {
6986                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
6987         } else {
6988                 ctxt->eip = ctxt->_eip;
6989                 kvm_rip_write(vcpu, ctxt->eip);
6990                 kvm_set_rflags(vcpu, ctxt->eflags);
6991         }
6992 }
6993 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
6994
6995 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
6996 {
6997         ++vcpu->stat.insn_emulation_fail;
6998         trace_kvm_emulate_insn_failed(vcpu);
6999
7000         if (emulation_type & EMULTYPE_VMWARE_GP) {
7001                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7002                 return 1;
7003         }
7004
7005         if (emulation_type & EMULTYPE_SKIP) {
7006                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7007                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
7008                 vcpu->run->internal.ndata = 0;
7009                 return 0;
7010         }
7011
7012         kvm_queue_exception(vcpu, UD_VECTOR);
7013
7014         if (!is_guest_mode(vcpu) && kvm_x86_ops.get_cpl(vcpu) == 0) {
7015                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7016                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
7017                 vcpu->run->internal.ndata = 0;
7018                 return 0;
7019         }
7020
7021         return 1;
7022 }
7023
7024 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7025                                   bool write_fault_to_shadow_pgtable,
7026                                   int emulation_type)
7027 {
7028         gpa_t gpa = cr2_or_gpa;
7029         kvm_pfn_t pfn;
7030
7031         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7032                 return false;
7033
7034         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7035             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7036                 return false;
7037
7038         if (!vcpu->arch.mmu->direct_map) {
7039                 /*
7040                  * Write permission should be allowed since only
7041                  * write access need to be emulated.
7042                  */
7043                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7044
7045                 /*
7046                  * If the mapping is invalid in guest, let cpu retry
7047                  * it to generate fault.
7048                  */
7049                 if (gpa == UNMAPPED_GVA)
7050                         return true;
7051         }
7052
7053         /*
7054          * Do not retry the unhandleable instruction if it faults on the
7055          * readonly host memory, otherwise it will goto a infinite loop:
7056          * retry instruction -> write #PF -> emulation fail -> retry
7057          * instruction -> ...
7058          */
7059         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
7060
7061         /*
7062          * If the instruction failed on the error pfn, it can not be fixed,
7063          * report the error to userspace.
7064          */
7065         if (is_error_noslot_pfn(pfn))
7066                 return false;
7067
7068         kvm_release_pfn_clean(pfn);
7069
7070         /* The instructions are well-emulated on direct mmu. */
7071         if (vcpu->arch.mmu->direct_map) {
7072                 unsigned int indirect_shadow_pages;
7073
7074                 spin_lock(&vcpu->kvm->mmu_lock);
7075                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
7076                 spin_unlock(&vcpu->kvm->mmu_lock);
7077
7078                 if (indirect_shadow_pages)
7079                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7080
7081                 return true;
7082         }
7083
7084         /*
7085          * if emulation was due to access to shadowed page table
7086          * and it failed try to unshadow page and re-enter the
7087          * guest to let CPU execute the instruction.
7088          */
7089         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7090
7091         /*
7092          * If the access faults on its page table, it can not
7093          * be fixed by unprotecting shadow page and it should
7094          * be reported to userspace.
7095          */
7096         return !write_fault_to_shadow_pgtable;
7097 }
7098
7099 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
7100                               gpa_t cr2_or_gpa,  int emulation_type)
7101 {
7102         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7103         unsigned long last_retry_eip, last_retry_addr, gpa = cr2_or_gpa;
7104
7105         last_retry_eip = vcpu->arch.last_retry_eip;
7106         last_retry_addr = vcpu->arch.last_retry_addr;
7107
7108         /*
7109          * If the emulation is caused by #PF and it is non-page_table
7110          * writing instruction, it means the VM-EXIT is caused by shadow
7111          * page protected, we can zap the shadow page and retry this
7112          * instruction directly.
7113          *
7114          * Note: if the guest uses a non-page-table modifying instruction
7115          * on the PDE that points to the instruction, then we will unmap
7116          * the instruction and go to an infinite loop. So, we cache the
7117          * last retried eip and the last fault address, if we meet the eip
7118          * and the address again, we can break out of the potential infinite
7119          * loop.
7120          */
7121         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
7122
7123         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7124                 return false;
7125
7126         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7127             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7128                 return false;
7129
7130         if (x86_page_table_writing_insn(ctxt))
7131                 return false;
7132
7133         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2_or_gpa)
7134                 return false;
7135
7136         vcpu->arch.last_retry_eip = ctxt->eip;
7137         vcpu->arch.last_retry_addr = cr2_or_gpa;
7138
7139         if (!vcpu->arch.mmu->direct_map)
7140                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7141
7142         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7143
7144         return true;
7145 }
7146
7147 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
7148 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
7149
7150 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
7151 {
7152         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
7153                 /* This is a good place to trace that we are exiting SMM.  */
7154                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
7155
7156                 /* Process a latched INIT or SMI, if any.  */
7157                 kvm_make_request(KVM_REQ_EVENT, vcpu);
7158         }
7159
7160         kvm_mmu_reset_context(vcpu);
7161 }
7162
7163 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
7164                                 unsigned long *db)
7165 {
7166         u32 dr6 = 0;
7167         int i;
7168         u32 enable, rwlen;
7169
7170         enable = dr7;
7171         rwlen = dr7 >> 16;
7172         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
7173                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
7174                         dr6 |= (1 << i);
7175         return dr6;
7176 }
7177
7178 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
7179 {
7180         struct kvm_run *kvm_run = vcpu->run;
7181
7182         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
7183                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 | DR6_RTM;
7184                 kvm_run->debug.arch.pc = kvm_get_linear_rip(vcpu);
7185                 kvm_run->debug.arch.exception = DB_VECTOR;
7186                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
7187                 return 0;
7188         }
7189         kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
7190         return 1;
7191 }
7192
7193 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
7194 {
7195         unsigned long rflags = kvm_x86_ops.get_rflags(vcpu);
7196         int r;
7197
7198         r = kvm_x86_ops.skip_emulated_instruction(vcpu);
7199         if (unlikely(!r))
7200                 return 0;
7201
7202         /*
7203          * rflags is the old, "raw" value of the flags.  The new value has
7204          * not been saved yet.
7205          *
7206          * This is correct even for TF set by the guest, because "the
7207          * processor will not generate this exception after the instruction
7208          * that sets the TF flag".
7209          */
7210         if (unlikely(rflags & X86_EFLAGS_TF))
7211                 r = kvm_vcpu_do_singlestep(vcpu);
7212         return r;
7213 }
7214 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
7215
7216 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
7217 {
7218         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
7219             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
7220                 struct kvm_run *kvm_run = vcpu->run;
7221                 unsigned long eip = kvm_get_linear_rip(vcpu);
7222                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7223                                            vcpu->arch.guest_debug_dr7,
7224                                            vcpu->arch.eff_db);
7225
7226                 if (dr6 != 0) {
7227                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
7228                         kvm_run->debug.arch.pc = eip;
7229                         kvm_run->debug.arch.exception = DB_VECTOR;
7230                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
7231                         *r = 0;
7232                         return true;
7233                 }
7234         }
7235
7236         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
7237             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
7238                 unsigned long eip = kvm_get_linear_rip(vcpu);
7239                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7240                                            vcpu->arch.dr7,
7241                                            vcpu->arch.db);
7242
7243                 if (dr6 != 0) {
7244                         kvm_queue_exception_p(vcpu, DB_VECTOR, dr6);
7245                         *r = 1;
7246                         return true;
7247                 }
7248         }
7249
7250         return false;
7251 }
7252
7253 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
7254 {
7255         switch (ctxt->opcode_len) {
7256         case 1:
7257                 switch (ctxt->b) {
7258                 case 0xe4:      /* IN */
7259                 case 0xe5:
7260                 case 0xec:
7261                 case 0xed:
7262                 case 0xe6:      /* OUT */
7263                 case 0xe7:
7264                 case 0xee:
7265                 case 0xef:
7266                 case 0x6c:      /* INS */
7267                 case 0x6d:
7268                 case 0x6e:      /* OUTS */
7269                 case 0x6f:
7270                         return true;
7271                 }
7272                 break;
7273         case 2:
7274                 switch (ctxt->b) {
7275                 case 0x33:      /* RDPMC */
7276                         return true;
7277                 }
7278                 break;
7279         }
7280
7281         return false;
7282 }
7283
7284 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7285                             int emulation_type, void *insn, int insn_len)
7286 {
7287         int r;
7288         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7289         bool writeback = true;
7290         bool write_fault_to_spt;
7291
7292         if (unlikely(!kvm_x86_ops.can_emulate_instruction(vcpu, insn, insn_len)))
7293                 return 1;
7294
7295         vcpu->arch.l1tf_flush_l1d = true;
7296
7297         /*
7298          * Clear write_fault_to_shadow_pgtable here to ensure it is
7299          * never reused.
7300          */
7301         write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
7302         vcpu->arch.write_fault_to_shadow_pgtable = false;
7303         kvm_clear_exception_queue(vcpu);
7304
7305         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
7306                 init_emulate_ctxt(vcpu);
7307
7308                 /*
7309                  * We will reenter on the same instruction since
7310                  * we do not set complete_userspace_io.  This does not
7311                  * handle watchpoints yet, those would be handled in
7312                  * the emulate_ops.
7313                  */
7314                 if (!(emulation_type & EMULTYPE_SKIP) &&
7315                     kvm_vcpu_check_breakpoint(vcpu, &r))
7316                         return r;
7317
7318                 ctxt->interruptibility = 0;
7319                 ctxt->have_exception = false;
7320                 ctxt->exception.vector = -1;
7321                 ctxt->perm_ok = false;
7322
7323                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
7324
7325                 r = x86_decode_insn(ctxt, insn, insn_len);
7326
7327                 trace_kvm_emulate_insn_start(vcpu);
7328                 ++vcpu->stat.insn_emulation;
7329                 if (r != EMULATION_OK)  {
7330                         if ((emulation_type & EMULTYPE_TRAP_UD) ||
7331                             (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
7332                                 kvm_queue_exception(vcpu, UD_VECTOR);
7333                                 return 1;
7334                         }
7335                         if (reexecute_instruction(vcpu, cr2_or_gpa,
7336                                                   write_fault_to_spt,
7337                                                   emulation_type))
7338                                 return 1;
7339                         if (ctxt->have_exception) {
7340                                 /*
7341                                  * #UD should result in just EMULATION_FAILED, and trap-like
7342                                  * exception should not be encountered during decode.
7343                                  */
7344                                 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
7345                                              exception_type(ctxt->exception.vector) == EXCPT_TRAP);
7346                                 inject_emulated_exception(vcpu);
7347                                 return 1;
7348                         }
7349                         return handle_emulation_failure(vcpu, emulation_type);
7350                 }
7351         }
7352
7353         if ((emulation_type & EMULTYPE_VMWARE_GP) &&
7354             !is_vmware_backdoor_opcode(ctxt)) {
7355                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7356                 return 1;
7357         }
7358
7359         /*
7360          * Note, EMULTYPE_SKIP is intended for use *only* by vendor callbacks
7361          * for kvm_skip_emulated_instruction().  The caller is responsible for
7362          * updating interruptibility state and injecting single-step #DBs.
7363          */
7364         if (emulation_type & EMULTYPE_SKIP) {
7365                 kvm_rip_write(vcpu, ctxt->_eip);
7366                 if (ctxt->eflags & X86_EFLAGS_RF)
7367                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
7368                 return 1;
7369         }
7370
7371         if (retry_instruction(ctxt, cr2_or_gpa, emulation_type))
7372                 return 1;
7373
7374         /* this is needed for vmware backdoor interface to work since it
7375            changes registers values  during IO operation */
7376         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
7377                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7378                 emulator_invalidate_register_cache(ctxt);
7379         }
7380
7381 restart:
7382         if (emulation_type & EMULTYPE_PF) {
7383                 /* Save the faulting GPA (cr2) in the address field */
7384                 ctxt->exception.address = cr2_or_gpa;
7385
7386                 /* With shadow page tables, cr2 contains a GVA or nGPA. */
7387                 if (vcpu->arch.mmu->direct_map) {
7388                         ctxt->gpa_available = true;
7389                         ctxt->gpa_val = cr2_or_gpa;
7390                 }
7391         } else {
7392                 /* Sanitize the address out of an abundance of paranoia. */
7393                 ctxt->exception.address = 0;
7394         }
7395
7396         r = x86_emulate_insn(ctxt);
7397
7398         if (r == EMULATION_INTERCEPTED)
7399                 return 1;
7400
7401         if (r == EMULATION_FAILED) {
7402                 if (reexecute_instruction(vcpu, cr2_or_gpa, write_fault_to_spt,
7403                                         emulation_type))
7404                         return 1;
7405
7406                 return handle_emulation_failure(vcpu, emulation_type);
7407         }
7408
7409         if (ctxt->have_exception) {
7410                 r = 1;
7411                 if (inject_emulated_exception(vcpu))
7412                         return r;
7413         } else if (vcpu->arch.pio.count) {
7414                 if (!vcpu->arch.pio.in) {
7415                         /* FIXME: return into emulator if single-stepping.  */
7416                         vcpu->arch.pio.count = 0;
7417                 } else {
7418                         writeback = false;
7419                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
7420                 }
7421                 r = 0;
7422         } else if (vcpu->mmio_needed) {
7423                 ++vcpu->stat.mmio_exits;
7424
7425                 if (!vcpu->mmio_is_write)
7426                         writeback = false;
7427                 r = 0;
7428                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7429         } else if (r == EMULATION_RESTART)
7430                 goto restart;
7431         else
7432                 r = 1;
7433
7434         if (writeback) {
7435                 unsigned long rflags = kvm_x86_ops.get_rflags(vcpu);
7436                 toggle_interruptibility(vcpu, ctxt->interruptibility);
7437                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7438                 if (!ctxt->have_exception ||
7439                     exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
7440                         kvm_rip_write(vcpu, ctxt->eip);
7441                         if (r && (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
7442                                 r = kvm_vcpu_do_singlestep(vcpu);
7443                         if (kvm_x86_ops.update_emulated_instruction)
7444                                 kvm_x86_ops.update_emulated_instruction(vcpu);
7445                         __kvm_set_rflags(vcpu, ctxt->eflags);
7446                 }
7447
7448                 /*
7449                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
7450                  * do nothing, and it will be requested again as soon as
7451                  * the shadow expires.  But we still need to check here,
7452                  * because POPF has no interrupt shadow.
7453                  */
7454                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
7455                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7456         } else
7457                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
7458
7459         return r;
7460 }
7461
7462 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
7463 {
7464         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
7465 }
7466 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
7467
7468 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
7469                                         void *insn, int insn_len)
7470 {
7471         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
7472 }
7473 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
7474
7475 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
7476 {
7477         vcpu->arch.pio.count = 0;
7478         return 1;
7479 }
7480
7481 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
7482 {
7483         vcpu->arch.pio.count = 0;
7484
7485         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
7486                 return 1;
7487
7488         return kvm_skip_emulated_instruction(vcpu);
7489 }
7490
7491 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
7492                             unsigned short port)
7493 {
7494         unsigned long val = kvm_rax_read(vcpu);
7495         int ret = emulator_pio_out(vcpu, size, port, &val, 1);
7496
7497         if (ret)
7498                 return ret;
7499
7500         /*
7501          * Workaround userspace that relies on old KVM behavior of %rip being
7502          * incremented prior to exiting to userspace to handle "OUT 0x7e".
7503          */
7504         if (port == 0x7e &&
7505             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
7506                 vcpu->arch.complete_userspace_io =
7507                         complete_fast_pio_out_port_0x7e;
7508                 kvm_skip_emulated_instruction(vcpu);
7509         } else {
7510                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
7511                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
7512         }
7513         return 0;
7514 }
7515
7516 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
7517 {
7518         unsigned long val;
7519
7520         /* We should only ever be called with arch.pio.count equal to 1 */
7521         BUG_ON(vcpu->arch.pio.count != 1);
7522
7523         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
7524                 vcpu->arch.pio.count = 0;
7525                 return 1;
7526         }
7527
7528         /* For size less than 4 we merge, else we zero extend */
7529         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
7530
7531         /*
7532          * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
7533          * the copy and tracing
7534          */
7535         emulator_pio_in(vcpu, vcpu->arch.pio.size, vcpu->arch.pio.port, &val, 1);
7536         kvm_rax_write(vcpu, val);
7537
7538         return kvm_skip_emulated_instruction(vcpu);
7539 }
7540
7541 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
7542                            unsigned short port)
7543 {
7544         unsigned long val;
7545         int ret;
7546
7547         /* For size less than 4 we merge, else we zero extend */
7548         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
7549
7550         ret = emulator_pio_in(vcpu, size, port, &val, 1);
7551         if (ret) {
7552                 kvm_rax_write(vcpu, val);
7553                 return ret;
7554         }
7555
7556         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
7557         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
7558
7559         return 0;
7560 }
7561
7562 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
7563 {
7564         int ret;
7565
7566         if (in)
7567                 ret = kvm_fast_pio_in(vcpu, size, port);
7568         else
7569                 ret = kvm_fast_pio_out(vcpu, size, port);
7570         return ret && kvm_skip_emulated_instruction(vcpu);
7571 }
7572 EXPORT_SYMBOL_GPL(kvm_fast_pio);
7573
7574 static int kvmclock_cpu_down_prep(unsigned int cpu)
7575 {
7576         __this_cpu_write(cpu_tsc_khz, 0);
7577         return 0;
7578 }
7579
7580 static void tsc_khz_changed(void *data)
7581 {
7582         struct cpufreq_freqs *freq = data;
7583         unsigned long khz = 0;
7584
7585         if (data)
7586                 khz = freq->new;
7587         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
7588                 khz = cpufreq_quick_get(raw_smp_processor_id());
7589         if (!khz)
7590                 khz = tsc_khz;
7591         __this_cpu_write(cpu_tsc_khz, khz);
7592 }
7593
7594 #ifdef CONFIG_X86_64
7595 static void kvm_hyperv_tsc_notifier(void)
7596 {
7597         struct kvm *kvm;
7598         struct kvm_vcpu *vcpu;
7599         int cpu;
7600
7601         mutex_lock(&kvm_lock);
7602         list_for_each_entry(kvm, &vm_list, vm_list)
7603                 kvm_make_mclock_inprogress_request(kvm);
7604
7605         hyperv_stop_tsc_emulation();
7606
7607         /* TSC frequency always matches when on Hyper-V */
7608         for_each_present_cpu(cpu)
7609                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
7610         kvm_max_guest_tsc_khz = tsc_khz;
7611
7612         list_for_each_entry(kvm, &vm_list, vm_list) {
7613                 struct kvm_arch *ka = &kvm->arch;
7614
7615                 spin_lock(&ka->pvclock_gtod_sync_lock);
7616
7617                 pvclock_update_vm_gtod_copy(kvm);
7618
7619                 kvm_for_each_vcpu(cpu, vcpu, kvm)
7620                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7621
7622                 kvm_for_each_vcpu(cpu, vcpu, kvm)
7623                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
7624
7625                 spin_unlock(&ka->pvclock_gtod_sync_lock);
7626         }
7627         mutex_unlock(&kvm_lock);
7628 }
7629 #endif
7630
7631 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
7632 {
7633         struct kvm *kvm;
7634         struct kvm_vcpu *vcpu;
7635         int i, send_ipi = 0;
7636
7637         /*
7638          * We allow guests to temporarily run on slowing clocks,
7639          * provided we notify them after, or to run on accelerating
7640          * clocks, provided we notify them before.  Thus time never
7641          * goes backwards.
7642          *
7643          * However, we have a problem.  We can't atomically update
7644          * the frequency of a given CPU from this function; it is
7645          * merely a notifier, which can be called from any CPU.
7646          * Changing the TSC frequency at arbitrary points in time
7647          * requires a recomputation of local variables related to
7648          * the TSC for each VCPU.  We must flag these local variables
7649          * to be updated and be sure the update takes place with the
7650          * new frequency before any guests proceed.
7651          *
7652          * Unfortunately, the combination of hotplug CPU and frequency
7653          * change creates an intractable locking scenario; the order
7654          * of when these callouts happen is undefined with respect to
7655          * CPU hotplug, and they can race with each other.  As such,
7656          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
7657          * undefined; you can actually have a CPU frequency change take
7658          * place in between the computation of X and the setting of the
7659          * variable.  To protect against this problem, all updates of
7660          * the per_cpu tsc_khz variable are done in an interrupt
7661          * protected IPI, and all callers wishing to update the value
7662          * must wait for a synchronous IPI to complete (which is trivial
7663          * if the caller is on the CPU already).  This establishes the
7664          * necessary total order on variable updates.
7665          *
7666          * Note that because a guest time update may take place
7667          * anytime after the setting of the VCPU's request bit, the
7668          * correct TSC value must be set before the request.  However,
7669          * to ensure the update actually makes it to any guest which
7670          * starts running in hardware virtualization between the set
7671          * and the acquisition of the spinlock, we must also ping the
7672          * CPU after setting the request bit.
7673          *
7674          */
7675
7676         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
7677
7678         mutex_lock(&kvm_lock);
7679         list_for_each_entry(kvm, &vm_list, vm_list) {
7680                 kvm_for_each_vcpu(i, vcpu, kvm) {
7681                         if (vcpu->cpu != cpu)
7682                                 continue;
7683                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7684                         if (vcpu->cpu != raw_smp_processor_id())
7685                                 send_ipi = 1;
7686                 }
7687         }
7688         mutex_unlock(&kvm_lock);
7689
7690         if (freq->old < freq->new && send_ipi) {
7691                 /*
7692                  * We upscale the frequency.  Must make the guest
7693                  * doesn't see old kvmclock values while running with
7694                  * the new frequency, otherwise we risk the guest sees
7695                  * time go backwards.
7696                  *
7697                  * In case we update the frequency for another cpu
7698                  * (which might be in guest context) send an interrupt
7699                  * to kick the cpu out of guest context.  Next time
7700                  * guest context is entered kvmclock will be updated,
7701                  * so the guest will not see stale values.
7702                  */
7703                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
7704         }
7705 }
7706
7707 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
7708                                      void *data)
7709 {
7710         struct cpufreq_freqs *freq = data;
7711         int cpu;
7712
7713         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
7714                 return 0;
7715         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
7716                 return 0;
7717
7718         for_each_cpu(cpu, freq->policy->cpus)
7719                 __kvmclock_cpufreq_notifier(freq, cpu);
7720
7721         return 0;
7722 }
7723
7724 static struct notifier_block kvmclock_cpufreq_notifier_block = {
7725         .notifier_call  = kvmclock_cpufreq_notifier
7726 };
7727
7728 static int kvmclock_cpu_online(unsigned int cpu)
7729 {
7730         tsc_khz_changed(NULL);
7731         return 0;
7732 }
7733
7734 static void kvm_timer_init(void)
7735 {
7736         max_tsc_khz = tsc_khz;
7737
7738         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
7739 #ifdef CONFIG_CPU_FREQ
7740                 struct cpufreq_policy *policy;
7741                 int cpu;
7742
7743                 cpu = get_cpu();
7744                 policy = cpufreq_cpu_get(cpu);
7745                 if (policy) {
7746                         if (policy->cpuinfo.max_freq)
7747                                 max_tsc_khz = policy->cpuinfo.max_freq;
7748                         cpufreq_cpu_put(policy);
7749                 }
7750                 put_cpu();
7751 #endif
7752                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
7753                                           CPUFREQ_TRANSITION_NOTIFIER);
7754         }
7755
7756         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
7757                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
7758 }
7759
7760 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
7761 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
7762
7763 int kvm_is_in_guest(void)
7764 {
7765         return __this_cpu_read(current_vcpu) != NULL;
7766 }
7767
7768 static int kvm_is_user_mode(void)
7769 {
7770         int user_mode = 3;
7771
7772         if (__this_cpu_read(current_vcpu))
7773                 user_mode = kvm_x86_ops.get_cpl(__this_cpu_read(current_vcpu));
7774
7775         return user_mode != 0;
7776 }
7777
7778 static unsigned long kvm_get_guest_ip(void)
7779 {
7780         unsigned long ip = 0;
7781
7782         if (__this_cpu_read(current_vcpu))
7783                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
7784
7785         return ip;
7786 }
7787
7788 static void kvm_handle_intel_pt_intr(void)
7789 {
7790         struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
7791
7792         kvm_make_request(KVM_REQ_PMI, vcpu);
7793         __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
7794                         (unsigned long *)&vcpu->arch.pmu.global_status);
7795 }
7796
7797 static struct perf_guest_info_callbacks kvm_guest_cbs = {
7798         .is_in_guest            = kvm_is_in_guest,
7799         .is_user_mode           = kvm_is_user_mode,
7800         .get_guest_ip           = kvm_get_guest_ip,
7801         .handle_intel_pt_intr   = kvm_handle_intel_pt_intr,
7802 };
7803
7804 #ifdef CONFIG_X86_64
7805 static void pvclock_gtod_update_fn(struct work_struct *work)
7806 {
7807         struct kvm *kvm;
7808
7809         struct kvm_vcpu *vcpu;
7810         int i;
7811
7812         mutex_lock(&kvm_lock);
7813         list_for_each_entry(kvm, &vm_list, vm_list)
7814                 kvm_for_each_vcpu(i, vcpu, kvm)
7815                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7816         atomic_set(&kvm_guest_has_master_clock, 0);
7817         mutex_unlock(&kvm_lock);
7818 }
7819
7820 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
7821
7822 /*
7823  * Notification about pvclock gtod data update.
7824  */
7825 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
7826                                void *priv)
7827 {
7828         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
7829         struct timekeeper *tk = priv;
7830
7831         update_pvclock_gtod(tk);
7832
7833         /* disable master clock if host does not trust, or does not
7834          * use, TSC based clocksource.
7835          */
7836         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
7837             atomic_read(&kvm_guest_has_master_clock) != 0)
7838                 queue_work(system_long_wq, &pvclock_gtod_work);
7839
7840         return 0;
7841 }
7842
7843 static struct notifier_block pvclock_gtod_notifier = {
7844         .notifier_call = pvclock_gtod_notify,
7845 };
7846 #endif
7847
7848 int kvm_arch_init(void *opaque)
7849 {
7850         struct kvm_x86_init_ops *ops = opaque;
7851         int r;
7852
7853         if (kvm_x86_ops.hardware_enable) {
7854                 printk(KERN_ERR "kvm: already loaded the other module\n");
7855                 r = -EEXIST;
7856                 goto out;
7857         }
7858
7859         if (!ops->cpu_has_kvm_support()) {
7860                 pr_err_ratelimited("kvm: no hardware support\n");
7861                 r = -EOPNOTSUPP;
7862                 goto out;
7863         }
7864         if (ops->disabled_by_bios()) {
7865                 pr_err_ratelimited("kvm: disabled by bios\n");
7866                 r = -EOPNOTSUPP;
7867                 goto out;
7868         }
7869
7870         /*
7871          * KVM explicitly assumes that the guest has an FPU and
7872          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
7873          * vCPU's FPU state as a fxregs_state struct.
7874          */
7875         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
7876                 printk(KERN_ERR "kvm: inadequate fpu\n");
7877                 r = -EOPNOTSUPP;
7878                 goto out;
7879         }
7880
7881         r = -ENOMEM;
7882         x86_fpu_cache = kmem_cache_create("x86_fpu", sizeof(struct fpu),
7883                                           __alignof__(struct fpu), SLAB_ACCOUNT,
7884                                           NULL);
7885         if (!x86_fpu_cache) {
7886                 printk(KERN_ERR "kvm: failed to allocate cache for x86 fpu\n");
7887                 goto out;
7888         }
7889
7890         x86_emulator_cache = kvm_alloc_emulator_cache();
7891         if (!x86_emulator_cache) {
7892                 pr_err("kvm: failed to allocate cache for x86 emulator\n");
7893                 goto out_free_x86_fpu_cache;
7894         }
7895
7896         user_return_msrs = alloc_percpu(struct kvm_user_return_msrs);
7897         if (!user_return_msrs) {
7898                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_user_return_msrs\n");
7899                 goto out_free_x86_emulator_cache;
7900         }
7901
7902         r = kvm_mmu_module_init();
7903         if (r)
7904                 goto out_free_percpu;
7905
7906         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
7907                         PT_DIRTY_MASK, PT64_NX_MASK, 0,
7908                         PT_PRESENT_MASK, 0, sme_me_mask);
7909         kvm_timer_init();
7910
7911         perf_register_guest_info_callbacks(&kvm_guest_cbs);
7912
7913         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
7914                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
7915                 supported_xcr0 = host_xcr0 & KVM_SUPPORTED_XCR0;
7916         }
7917
7918         kvm_lapic_init();
7919         if (pi_inject_timer == -1)
7920                 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
7921 #ifdef CONFIG_X86_64
7922         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
7923
7924         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
7925                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
7926 #endif
7927
7928         return 0;
7929
7930 out_free_percpu:
7931         free_percpu(user_return_msrs);
7932 out_free_x86_emulator_cache:
7933         kmem_cache_destroy(x86_emulator_cache);
7934 out_free_x86_fpu_cache:
7935         kmem_cache_destroy(x86_fpu_cache);
7936 out:
7937         return r;
7938 }
7939
7940 void kvm_arch_exit(void)
7941 {
7942 #ifdef CONFIG_X86_64
7943         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
7944                 clear_hv_tscchange_cb();
7945 #endif
7946         kvm_lapic_exit();
7947         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
7948
7949         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
7950                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
7951                                             CPUFREQ_TRANSITION_NOTIFIER);
7952         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
7953 #ifdef CONFIG_X86_64
7954         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
7955 #endif
7956         kvm_x86_ops.hardware_enable = NULL;
7957         kvm_mmu_module_exit();
7958         free_percpu(user_return_msrs);
7959         kmem_cache_destroy(x86_fpu_cache);
7960 }
7961
7962 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
7963 {
7964         ++vcpu->stat.halt_exits;
7965         if (lapic_in_kernel(vcpu)) {
7966                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
7967                 return 1;
7968         } else {
7969                 vcpu->run->exit_reason = KVM_EXIT_HLT;
7970                 return 0;
7971         }
7972 }
7973 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
7974
7975 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
7976 {
7977         int ret = kvm_skip_emulated_instruction(vcpu);
7978         /*
7979          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
7980          * KVM_EXIT_DEBUG here.
7981          */
7982         return kvm_vcpu_halt(vcpu) && ret;
7983 }
7984 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
7985
7986 #ifdef CONFIG_X86_64
7987 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
7988                                 unsigned long clock_type)
7989 {
7990         struct kvm_clock_pairing clock_pairing;
7991         struct timespec64 ts;
7992         u64 cycle;
7993         int ret;
7994
7995         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
7996                 return -KVM_EOPNOTSUPP;
7997
7998         if (kvm_get_walltime_and_clockread(&ts, &cycle) == false)
7999                 return -KVM_EOPNOTSUPP;
8000
8001         clock_pairing.sec = ts.tv_sec;
8002         clock_pairing.nsec = ts.tv_nsec;
8003         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
8004         clock_pairing.flags = 0;
8005         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
8006
8007         ret = 0;
8008         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
8009                             sizeof(struct kvm_clock_pairing)))
8010                 ret = -KVM_EFAULT;
8011
8012         return ret;
8013 }
8014 #endif
8015
8016 /*
8017  * kvm_pv_kick_cpu_op:  Kick a vcpu.
8018  *
8019  * @apicid - apicid of vcpu to be kicked.
8020  */
8021 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
8022 {
8023         struct kvm_lapic_irq lapic_irq;
8024
8025         lapic_irq.shorthand = APIC_DEST_NOSHORT;
8026         lapic_irq.dest_mode = APIC_DEST_PHYSICAL;
8027         lapic_irq.level = 0;
8028         lapic_irq.dest_id = apicid;
8029         lapic_irq.msi_redir_hint = false;
8030
8031         lapic_irq.delivery_mode = APIC_DM_REMRD;
8032         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
8033 }
8034
8035 bool kvm_apicv_activated(struct kvm *kvm)
8036 {
8037         return (READ_ONCE(kvm->arch.apicv_inhibit_reasons) == 0);
8038 }
8039 EXPORT_SYMBOL_GPL(kvm_apicv_activated);
8040
8041 void kvm_apicv_init(struct kvm *kvm, bool enable)
8042 {
8043         if (enable)
8044                 clear_bit(APICV_INHIBIT_REASON_DISABLE,
8045                           &kvm->arch.apicv_inhibit_reasons);
8046         else
8047                 set_bit(APICV_INHIBIT_REASON_DISABLE,
8048                         &kvm->arch.apicv_inhibit_reasons);
8049 }
8050 EXPORT_SYMBOL_GPL(kvm_apicv_init);
8051
8052 static void kvm_sched_yield(struct kvm *kvm, unsigned long dest_id)
8053 {
8054         struct kvm_vcpu *target = NULL;
8055         struct kvm_apic_map *map;
8056
8057         rcu_read_lock();
8058         map = rcu_dereference(kvm->arch.apic_map);
8059
8060         if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
8061                 target = map->phys_map[dest_id]->vcpu;
8062
8063         rcu_read_unlock();
8064
8065         if (target && READ_ONCE(target->ready))
8066                 kvm_vcpu_yield_to(target);
8067 }
8068
8069 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
8070 {
8071         unsigned long nr, a0, a1, a2, a3, ret;
8072         int op_64_bit;
8073
8074         if (kvm_hv_hypercall_enabled(vcpu->kvm))
8075                 return kvm_hv_hypercall(vcpu);
8076
8077         nr = kvm_rax_read(vcpu);
8078         a0 = kvm_rbx_read(vcpu);
8079         a1 = kvm_rcx_read(vcpu);
8080         a2 = kvm_rdx_read(vcpu);
8081         a3 = kvm_rsi_read(vcpu);
8082
8083         trace_kvm_hypercall(nr, a0, a1, a2, a3);
8084
8085         op_64_bit = is_64_bit_mode(vcpu);
8086         if (!op_64_bit) {
8087                 nr &= 0xFFFFFFFF;
8088                 a0 &= 0xFFFFFFFF;
8089                 a1 &= 0xFFFFFFFF;
8090                 a2 &= 0xFFFFFFFF;
8091                 a3 &= 0xFFFFFFFF;
8092         }
8093
8094         if (kvm_x86_ops.get_cpl(vcpu) != 0) {
8095                 ret = -KVM_EPERM;
8096                 goto out;
8097         }
8098
8099         ret = -KVM_ENOSYS;
8100
8101         switch (nr) {
8102         case KVM_HC_VAPIC_POLL_IRQ:
8103                 ret = 0;
8104                 break;
8105         case KVM_HC_KICK_CPU:
8106                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_UNHALT))
8107                         break;
8108
8109                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
8110                 kvm_sched_yield(vcpu->kvm, a1);
8111                 ret = 0;
8112                 break;
8113 #ifdef CONFIG_X86_64
8114         case KVM_HC_CLOCK_PAIRING:
8115                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
8116                 break;
8117 #endif
8118         case KVM_HC_SEND_IPI:
8119                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SEND_IPI))
8120                         break;
8121
8122                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
8123                 break;
8124         case KVM_HC_SCHED_YIELD:
8125                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SCHED_YIELD))
8126                         break;
8127
8128                 kvm_sched_yield(vcpu->kvm, a0);
8129                 ret = 0;
8130                 break;
8131         default:
8132                 ret = -KVM_ENOSYS;
8133                 break;
8134         }
8135 out:
8136         if (!op_64_bit)
8137                 ret = (u32)ret;
8138         kvm_rax_write(vcpu, ret);
8139
8140         ++vcpu->stat.hypercalls;
8141         return kvm_skip_emulated_instruction(vcpu);
8142 }
8143 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
8144
8145 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
8146 {
8147         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
8148         char instruction[3];
8149         unsigned long rip = kvm_rip_read(vcpu);
8150
8151         kvm_x86_ops.patch_hypercall(vcpu, instruction);
8152
8153         return emulator_write_emulated(ctxt, rip, instruction, 3,
8154                 &ctxt->exception);
8155 }
8156
8157 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
8158 {
8159         return vcpu->run->request_interrupt_window &&
8160                 likely(!pic_in_kernel(vcpu->kvm));
8161 }
8162
8163 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
8164 {
8165         struct kvm_run *kvm_run = vcpu->run;
8166
8167         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
8168         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
8169         kvm_run->cr8 = kvm_get_cr8(vcpu);
8170         kvm_run->apic_base = kvm_get_apic_base(vcpu);
8171         kvm_run->ready_for_interrupt_injection =
8172                 pic_in_kernel(vcpu->kvm) ||
8173                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
8174 }
8175
8176 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
8177 {
8178         int max_irr, tpr;
8179
8180         if (!kvm_x86_ops.update_cr8_intercept)
8181                 return;
8182
8183         if (!lapic_in_kernel(vcpu))
8184                 return;
8185
8186         if (vcpu->arch.apicv_active)
8187                 return;
8188
8189         if (!vcpu->arch.apic->vapic_addr)
8190                 max_irr = kvm_lapic_find_highest_irr(vcpu);
8191         else
8192                 max_irr = -1;
8193
8194         if (max_irr != -1)
8195                 max_irr >>= 4;
8196
8197         tpr = kvm_lapic_get_cr8(vcpu);
8198
8199         kvm_x86_ops.update_cr8_intercept(vcpu, tpr, max_irr);
8200 }
8201
8202 static void inject_pending_event(struct kvm_vcpu *vcpu, bool *req_immediate_exit)
8203 {
8204         int r;
8205         bool can_inject = true;
8206
8207         /* try to reinject previous events if any */
8208
8209         if (vcpu->arch.exception.injected) {
8210                 kvm_x86_ops.queue_exception(vcpu);
8211                 can_inject = false;
8212         }
8213         /*
8214          * Do not inject an NMI or interrupt if there is a pending
8215          * exception.  Exceptions and interrupts are recognized at
8216          * instruction boundaries, i.e. the start of an instruction.
8217          * Trap-like exceptions, e.g. #DB, have higher priority than
8218          * NMIs and interrupts, i.e. traps are recognized before an
8219          * NMI/interrupt that's pending on the same instruction.
8220          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
8221          * priority, but are only generated (pended) during instruction
8222          * execution, i.e. a pending fault-like exception means the
8223          * fault occurred on the *previous* instruction and must be
8224          * serviced prior to recognizing any new events in order to
8225          * fully complete the previous instruction.
8226          */
8227         else if (!vcpu->arch.exception.pending) {
8228                 if (vcpu->arch.nmi_injected) {
8229                         kvm_x86_ops.set_nmi(vcpu);
8230                         can_inject = false;
8231                 } else if (vcpu->arch.interrupt.injected) {
8232                         kvm_x86_ops.set_irq(vcpu);
8233                         can_inject = false;
8234                 }
8235         }
8236
8237         WARN_ON_ONCE(vcpu->arch.exception.injected &&
8238                      vcpu->arch.exception.pending);
8239
8240         /*
8241          * Call check_nested_events() even if we reinjected a previous event
8242          * in order for caller to determine if it should require immediate-exit
8243          * from L2 to L1 due to pending L1 events which require exit
8244          * from L2 to L1.
8245          */
8246         if (is_guest_mode(vcpu)) {
8247                 r = kvm_x86_ops.nested_ops->check_events(vcpu);
8248                 if (r < 0)
8249                         goto busy;
8250         }
8251
8252         /* try to inject new event if pending */
8253         if (vcpu->arch.exception.pending) {
8254                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
8255                                         vcpu->arch.exception.has_error_code,
8256                                         vcpu->arch.exception.error_code);
8257
8258                 vcpu->arch.exception.pending = false;
8259                 vcpu->arch.exception.injected = true;
8260
8261                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
8262                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
8263                                              X86_EFLAGS_RF);
8264
8265                 if (vcpu->arch.exception.nr == DB_VECTOR) {
8266                         kvm_deliver_exception_payload(vcpu);
8267                         if (vcpu->arch.dr7 & DR7_GD) {
8268                                 vcpu->arch.dr7 &= ~DR7_GD;
8269                                 kvm_update_dr7(vcpu);
8270                         }
8271                 }
8272
8273                 kvm_x86_ops.queue_exception(vcpu);
8274                 can_inject = false;
8275         }
8276
8277         /*
8278          * Finally, inject interrupt events.  If an event cannot be injected
8279          * due to architectural conditions (e.g. IF=0) a window-open exit
8280          * will re-request KVM_REQ_EVENT.  Sometimes however an event is pending
8281          * and can architecturally be injected, but we cannot do it right now:
8282          * an interrupt could have arrived just now and we have to inject it
8283          * as a vmexit, or there could already an event in the queue, which is
8284          * indicated by can_inject.  In that case we request an immediate exit
8285          * in order to make progress and get back here for another iteration.
8286          * The kvm_x86_ops hooks communicate this by returning -EBUSY.
8287          */
8288         if (vcpu->arch.smi_pending) {
8289                 r = can_inject ? kvm_x86_ops.smi_allowed(vcpu, true) : -EBUSY;
8290                 if (r < 0)
8291                         goto busy;
8292                 if (r) {
8293                         vcpu->arch.smi_pending = false;
8294                         ++vcpu->arch.smi_count;
8295                         enter_smm(vcpu);
8296                         can_inject = false;
8297                 } else
8298                         kvm_x86_ops.enable_smi_window(vcpu);
8299         }
8300
8301         if (vcpu->arch.nmi_pending) {
8302                 r = can_inject ? kvm_x86_ops.nmi_allowed(vcpu, true) : -EBUSY;
8303                 if (r < 0)
8304                         goto busy;
8305                 if (r) {
8306                         --vcpu->arch.nmi_pending;
8307                         vcpu->arch.nmi_injected = true;
8308                         kvm_x86_ops.set_nmi(vcpu);
8309                         can_inject = false;
8310                         WARN_ON(kvm_x86_ops.nmi_allowed(vcpu, true) < 0);
8311                 }
8312                 if (vcpu->arch.nmi_pending)
8313                         kvm_x86_ops.enable_nmi_window(vcpu);
8314         }
8315
8316         if (kvm_cpu_has_injectable_intr(vcpu)) {
8317                 r = can_inject ? kvm_x86_ops.interrupt_allowed(vcpu, true) : -EBUSY;
8318                 if (r < 0)
8319                         goto busy;
8320                 if (r) {
8321                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu), false);
8322                         kvm_x86_ops.set_irq(vcpu);
8323                         WARN_ON(kvm_x86_ops.interrupt_allowed(vcpu, true) < 0);
8324                 }
8325                 if (kvm_cpu_has_injectable_intr(vcpu))
8326                         kvm_x86_ops.enable_irq_window(vcpu);
8327         }
8328
8329         if (is_guest_mode(vcpu) &&
8330             kvm_x86_ops.nested_ops->hv_timer_pending &&
8331             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
8332                 *req_immediate_exit = true;
8333
8334         WARN_ON(vcpu->arch.exception.pending);
8335         return;
8336
8337 busy:
8338         *req_immediate_exit = true;
8339         return;
8340 }
8341
8342 static void process_nmi(struct kvm_vcpu *vcpu)
8343 {
8344         unsigned limit = 2;
8345
8346         /*
8347          * x86 is limited to one NMI running, and one NMI pending after it.
8348          * If an NMI is already in progress, limit further NMIs to just one.
8349          * Otherwise, allow two (and we'll inject the first one immediately).
8350          */
8351         if (kvm_x86_ops.get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
8352                 limit = 1;
8353
8354         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
8355         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
8356         kvm_make_request(KVM_REQ_EVENT, vcpu);
8357 }
8358
8359 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
8360 {
8361         u32 flags = 0;
8362         flags |= seg->g       << 23;
8363         flags |= seg->db      << 22;
8364         flags |= seg->l       << 21;
8365         flags |= seg->avl     << 20;
8366         flags |= seg->present << 15;
8367         flags |= seg->dpl     << 13;
8368         flags |= seg->s       << 12;
8369         flags |= seg->type    << 8;
8370         return flags;
8371 }
8372
8373 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
8374 {
8375         struct kvm_segment seg;
8376         int offset;
8377
8378         kvm_get_segment(vcpu, &seg, n);
8379         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
8380
8381         if (n < 3)
8382                 offset = 0x7f84 + n * 12;
8383         else
8384                 offset = 0x7f2c + (n - 3) * 12;
8385
8386         put_smstate(u32, buf, offset + 8, seg.base);
8387         put_smstate(u32, buf, offset + 4, seg.limit);
8388         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
8389 }
8390
8391 #ifdef CONFIG_X86_64
8392 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
8393 {
8394         struct kvm_segment seg;
8395         int offset;
8396         u16 flags;
8397
8398         kvm_get_segment(vcpu, &seg, n);
8399         offset = 0x7e00 + n * 16;
8400
8401         flags = enter_smm_get_segment_flags(&seg) >> 8;
8402         put_smstate(u16, buf, offset, seg.selector);
8403         put_smstate(u16, buf, offset + 2, flags);
8404         put_smstate(u32, buf, offset + 4, seg.limit);
8405         put_smstate(u64, buf, offset + 8, seg.base);
8406 }
8407 #endif
8408
8409 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
8410 {
8411         struct desc_ptr dt;
8412         struct kvm_segment seg;
8413         unsigned long val;
8414         int i;
8415
8416         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
8417         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
8418         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
8419         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
8420
8421         for (i = 0; i < 8; i++)
8422                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
8423
8424         kvm_get_dr(vcpu, 6, &val);
8425         put_smstate(u32, buf, 0x7fcc, (u32)val);
8426         kvm_get_dr(vcpu, 7, &val);
8427         put_smstate(u32, buf, 0x7fc8, (u32)val);
8428
8429         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
8430         put_smstate(u32, buf, 0x7fc4, seg.selector);
8431         put_smstate(u32, buf, 0x7f64, seg.base);
8432         put_smstate(u32, buf, 0x7f60, seg.limit);
8433         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
8434
8435         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
8436         put_smstate(u32, buf, 0x7fc0, seg.selector);
8437         put_smstate(u32, buf, 0x7f80, seg.base);
8438         put_smstate(u32, buf, 0x7f7c, seg.limit);
8439         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
8440
8441         kvm_x86_ops.get_gdt(vcpu, &dt);
8442         put_smstate(u32, buf, 0x7f74, dt.address);
8443         put_smstate(u32, buf, 0x7f70, dt.size);
8444
8445         kvm_x86_ops.get_idt(vcpu, &dt);
8446         put_smstate(u32, buf, 0x7f58, dt.address);
8447         put_smstate(u32, buf, 0x7f54, dt.size);
8448
8449         for (i = 0; i < 6; i++)
8450                 enter_smm_save_seg_32(vcpu, buf, i);
8451
8452         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
8453
8454         /* revision id */
8455         put_smstate(u32, buf, 0x7efc, 0x00020000);
8456         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
8457 }
8458
8459 #ifdef CONFIG_X86_64
8460 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
8461 {
8462         struct desc_ptr dt;
8463         struct kvm_segment seg;
8464         unsigned long val;
8465         int i;
8466
8467         for (i = 0; i < 16; i++)
8468                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
8469
8470         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
8471         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
8472
8473         kvm_get_dr(vcpu, 6, &val);
8474         put_smstate(u64, buf, 0x7f68, val);
8475         kvm_get_dr(vcpu, 7, &val);
8476         put_smstate(u64, buf, 0x7f60, val);
8477
8478         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
8479         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
8480         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
8481
8482         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
8483
8484         /* revision id */
8485         put_smstate(u32, buf, 0x7efc, 0x00020064);
8486
8487         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
8488
8489         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
8490         put_smstate(u16, buf, 0x7e90, seg.selector);
8491         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
8492         put_smstate(u32, buf, 0x7e94, seg.limit);
8493         put_smstate(u64, buf, 0x7e98, seg.base);
8494
8495         kvm_x86_ops.get_idt(vcpu, &dt);
8496         put_smstate(u32, buf, 0x7e84, dt.size);
8497         put_smstate(u64, buf, 0x7e88, dt.address);
8498
8499         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
8500         put_smstate(u16, buf, 0x7e70, seg.selector);
8501         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
8502         put_smstate(u32, buf, 0x7e74, seg.limit);
8503         put_smstate(u64, buf, 0x7e78, seg.base);
8504
8505         kvm_x86_ops.get_gdt(vcpu, &dt);
8506         put_smstate(u32, buf, 0x7e64, dt.size);
8507         put_smstate(u64, buf, 0x7e68, dt.address);
8508
8509         for (i = 0; i < 6; i++)
8510                 enter_smm_save_seg_64(vcpu, buf, i);
8511 }
8512 #endif
8513
8514 static void enter_smm(struct kvm_vcpu *vcpu)
8515 {
8516         struct kvm_segment cs, ds;
8517         struct desc_ptr dt;
8518         char buf[512];
8519         u32 cr0;
8520
8521         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
8522         memset(buf, 0, 512);
8523 #ifdef CONFIG_X86_64
8524         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
8525                 enter_smm_save_state_64(vcpu, buf);
8526         else
8527 #endif
8528                 enter_smm_save_state_32(vcpu, buf);
8529
8530         /*
8531          * Give pre_enter_smm() a chance to make ISA-specific changes to the
8532          * vCPU state (e.g. leave guest mode) after we've saved the state into
8533          * the SMM state-save area.
8534          */
8535         kvm_x86_ops.pre_enter_smm(vcpu, buf);
8536
8537         vcpu->arch.hflags |= HF_SMM_MASK;
8538         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
8539
8540         if (kvm_x86_ops.get_nmi_mask(vcpu))
8541                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
8542         else
8543                 kvm_x86_ops.set_nmi_mask(vcpu, true);
8544
8545         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
8546         kvm_rip_write(vcpu, 0x8000);
8547
8548         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
8549         kvm_x86_ops.set_cr0(vcpu, cr0);
8550         vcpu->arch.cr0 = cr0;
8551
8552         kvm_x86_ops.set_cr4(vcpu, 0);
8553
8554         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
8555         dt.address = dt.size = 0;
8556         kvm_x86_ops.set_idt(vcpu, &dt);
8557
8558         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
8559
8560         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
8561         cs.base = vcpu->arch.smbase;
8562
8563         ds.selector = 0;
8564         ds.base = 0;
8565
8566         cs.limit    = ds.limit = 0xffffffff;
8567         cs.type     = ds.type = 0x3;
8568         cs.dpl      = ds.dpl = 0;
8569         cs.db       = ds.db = 0;
8570         cs.s        = ds.s = 1;
8571         cs.l        = ds.l = 0;
8572         cs.g        = ds.g = 1;
8573         cs.avl      = ds.avl = 0;
8574         cs.present  = ds.present = 1;
8575         cs.unusable = ds.unusable = 0;
8576         cs.padding  = ds.padding = 0;
8577
8578         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
8579         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
8580         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
8581         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
8582         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
8583         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
8584
8585 #ifdef CONFIG_X86_64
8586         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
8587                 kvm_x86_ops.set_efer(vcpu, 0);
8588 #endif
8589
8590         kvm_update_cpuid_runtime(vcpu);
8591         kvm_mmu_reset_context(vcpu);
8592 }
8593
8594 static void process_smi(struct kvm_vcpu *vcpu)
8595 {
8596         vcpu->arch.smi_pending = true;
8597         kvm_make_request(KVM_REQ_EVENT, vcpu);
8598 }
8599
8600 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
8601                                        unsigned long *vcpu_bitmap)
8602 {
8603         cpumask_var_t cpus;
8604
8605         zalloc_cpumask_var(&cpus, GFP_ATOMIC);
8606
8607         kvm_make_vcpus_request_mask(kvm, KVM_REQ_SCAN_IOAPIC,
8608                                     NULL, vcpu_bitmap, cpus);
8609
8610         free_cpumask_var(cpus);
8611 }
8612
8613 void kvm_make_scan_ioapic_request(struct kvm *kvm)
8614 {
8615         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
8616 }
8617
8618 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
8619 {
8620         if (!lapic_in_kernel(vcpu))
8621                 return;
8622
8623         vcpu->arch.apicv_active = kvm_apicv_activated(vcpu->kvm);
8624         kvm_apic_update_apicv(vcpu);
8625         kvm_x86_ops.refresh_apicv_exec_ctrl(vcpu);
8626 }
8627 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv);
8628
8629 /*
8630  * NOTE: Do not hold any lock prior to calling this.
8631  *
8632  * In particular, kvm_request_apicv_update() expects kvm->srcu not to be
8633  * locked, because it calls __x86_set_memory_region() which does
8634  * synchronize_srcu(&kvm->srcu).
8635  */
8636 void kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
8637 {
8638         struct kvm_vcpu *except;
8639         unsigned long old, new, expected;
8640
8641         if (!kvm_x86_ops.check_apicv_inhibit_reasons ||
8642             !kvm_x86_ops.check_apicv_inhibit_reasons(bit))
8643                 return;
8644
8645         old = READ_ONCE(kvm->arch.apicv_inhibit_reasons);
8646         do {
8647                 expected = new = old;
8648                 if (activate)
8649                         __clear_bit(bit, &new);
8650                 else
8651                         __set_bit(bit, &new);
8652                 if (new == old)
8653                         break;
8654                 old = cmpxchg(&kvm->arch.apicv_inhibit_reasons, expected, new);
8655         } while (old != expected);
8656
8657         if (!!old == !!new)
8658                 return;
8659
8660         trace_kvm_apicv_update_request(activate, bit);
8661         if (kvm_x86_ops.pre_update_apicv_exec_ctrl)
8662                 kvm_x86_ops.pre_update_apicv_exec_ctrl(kvm, activate);
8663
8664         /*
8665          * Sending request to update APICV for all other vcpus,
8666          * while update the calling vcpu immediately instead of
8667          * waiting for another #VMEXIT to handle the request.
8668          */
8669         except = kvm_get_running_vcpu();
8670         kvm_make_all_cpus_request_except(kvm, KVM_REQ_APICV_UPDATE,
8671                                          except);
8672         if (except)
8673                 kvm_vcpu_update_apicv(except);
8674 }
8675 EXPORT_SYMBOL_GPL(kvm_request_apicv_update);
8676
8677 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
8678 {
8679         if (!kvm_apic_present(vcpu))
8680                 return;
8681
8682         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
8683
8684         if (irqchip_split(vcpu->kvm))
8685                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
8686         else {
8687                 if (vcpu->arch.apicv_active)
8688                         kvm_x86_ops.sync_pir_to_irr(vcpu);
8689                 if (ioapic_in_kernel(vcpu->kvm))
8690                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
8691         }
8692
8693         if (is_guest_mode(vcpu))
8694                 vcpu->arch.load_eoi_exitmap_pending = true;
8695         else
8696                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
8697 }
8698
8699 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
8700 {
8701         u64 eoi_exit_bitmap[4];
8702
8703         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
8704                 return;
8705
8706         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
8707                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
8708         kvm_x86_ops.load_eoi_exitmap(vcpu, eoi_exit_bitmap);
8709 }
8710
8711 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
8712                                             unsigned long start, unsigned long end)
8713 {
8714         unsigned long apic_address;
8715
8716         /*
8717          * The physical address of apic access page is stored in the VMCS.
8718          * Update it when it becomes invalid.
8719          */
8720         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
8721         if (start <= apic_address && apic_address < end)
8722                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
8723 }
8724
8725 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
8726 {
8727         if (!lapic_in_kernel(vcpu))
8728                 return;
8729
8730         if (!kvm_x86_ops.set_apic_access_page_addr)
8731                 return;
8732
8733         kvm_x86_ops.set_apic_access_page_addr(vcpu);
8734 }
8735
8736 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
8737 {
8738         smp_send_reschedule(vcpu->cpu);
8739 }
8740 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
8741
8742 /*
8743  * Returns 1 to let vcpu_run() continue the guest execution loop without
8744  * exiting to the userspace.  Otherwise, the value will be returned to the
8745  * userspace.
8746  */
8747 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
8748 {
8749         int r;
8750         bool req_int_win =
8751                 dm_request_for_irq_injection(vcpu) &&
8752                 kvm_cpu_accept_dm_intr(vcpu);
8753         fastpath_t exit_fastpath;
8754
8755         bool req_immediate_exit = false;
8756
8757         if (kvm_request_pending(vcpu)) {
8758                 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu)) {
8759                         if (unlikely(!kvm_x86_ops.nested_ops->get_nested_state_pages(vcpu))) {
8760                                 r = 0;
8761                                 goto out;
8762                         }
8763                 }
8764                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
8765                         kvm_mmu_unload(vcpu);
8766                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
8767                         __kvm_migrate_timers(vcpu);
8768                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
8769                         kvm_gen_update_masterclock(vcpu->kvm);
8770                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
8771                         kvm_gen_kvmclock_update(vcpu);
8772                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
8773                         r = kvm_guest_time_update(vcpu);
8774                         if (unlikely(r))
8775                                 goto out;
8776                 }
8777                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
8778                         kvm_mmu_sync_roots(vcpu);
8779                 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD, vcpu))
8780                         kvm_mmu_load_pgd(vcpu);
8781                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) {
8782                         kvm_vcpu_flush_tlb_all(vcpu);
8783
8784                         /* Flushing all ASIDs flushes the current ASID... */
8785                         kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
8786                 }
8787                 if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu))
8788                         kvm_vcpu_flush_tlb_current(vcpu);
8789                 if (kvm_check_request(KVM_REQ_HV_TLB_FLUSH, vcpu))
8790                         kvm_vcpu_flush_tlb_guest(vcpu);
8791
8792                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
8793                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
8794                         r = 0;
8795                         goto out;
8796                 }
8797                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
8798                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
8799                         vcpu->mmio_needed = 0;
8800                         r = 0;
8801                         goto out;
8802                 }
8803                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
8804                         /* Page is swapped out. Do synthetic halt */
8805                         vcpu->arch.apf.halted = true;
8806                         r = 1;
8807                         goto out;
8808                 }
8809                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
8810                         record_steal_time(vcpu);
8811                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
8812                         process_smi(vcpu);
8813                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
8814                         process_nmi(vcpu);
8815                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
8816                         kvm_pmu_handle_event(vcpu);
8817                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
8818                         kvm_pmu_deliver_pmi(vcpu);
8819                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
8820                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
8821                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
8822                                      vcpu->arch.ioapic_handled_vectors)) {
8823                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
8824                                 vcpu->run->eoi.vector =
8825                                                 vcpu->arch.pending_ioapic_eoi;
8826                                 r = 0;
8827                                 goto out;
8828                         }
8829                 }
8830                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
8831                         vcpu_scan_ioapic(vcpu);
8832                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
8833                         vcpu_load_eoi_exitmap(vcpu);
8834                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
8835                         kvm_vcpu_reload_apic_access_page(vcpu);
8836                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
8837                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
8838                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
8839                         r = 0;
8840                         goto out;
8841                 }
8842                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
8843                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
8844                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
8845                         r = 0;
8846                         goto out;
8847                 }
8848                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
8849                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
8850                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
8851                         r = 0;
8852                         goto out;
8853                 }
8854
8855                 /*
8856                  * KVM_REQ_HV_STIMER has to be processed after
8857                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
8858                  * depend on the guest clock being up-to-date
8859                  */
8860                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
8861                         kvm_hv_process_stimers(vcpu);
8862                 if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu))
8863                         kvm_vcpu_update_apicv(vcpu);
8864                 if (kvm_check_request(KVM_REQ_APF_READY, vcpu))
8865                         kvm_check_async_pf_completion(vcpu);
8866                 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED, vcpu))
8867                         kvm_x86_ops.msr_filter_changed(vcpu);
8868         }
8869
8870         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
8871                 ++vcpu->stat.req_event;
8872                 kvm_apic_accept_events(vcpu);
8873                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
8874                         r = 1;
8875                         goto out;
8876                 }
8877
8878                 inject_pending_event(vcpu, &req_immediate_exit);
8879                 if (req_int_win)
8880                         kvm_x86_ops.enable_irq_window(vcpu);
8881
8882                 if (kvm_lapic_enabled(vcpu)) {
8883                         update_cr8_intercept(vcpu);
8884                         kvm_lapic_sync_to_vapic(vcpu);
8885                 }
8886         }
8887
8888         r = kvm_mmu_reload(vcpu);
8889         if (unlikely(r)) {
8890                 goto cancel_injection;
8891         }
8892
8893         preempt_disable();
8894
8895         kvm_x86_ops.prepare_guest_switch(vcpu);
8896
8897         /*
8898          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
8899          * IPI are then delayed after guest entry, which ensures that they
8900          * result in virtual interrupt delivery.
8901          */
8902         local_irq_disable();
8903         vcpu->mode = IN_GUEST_MODE;
8904
8905         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
8906
8907         /*
8908          * 1) We should set ->mode before checking ->requests.  Please see
8909          * the comment in kvm_vcpu_exiting_guest_mode().
8910          *
8911          * 2) For APICv, we should set ->mode before checking PID.ON. This
8912          * pairs with the memory barrier implicit in pi_test_and_set_on
8913          * (see vmx_deliver_posted_interrupt).
8914          *
8915          * 3) This also orders the write to mode from any reads to the page
8916          * tables done while the VCPU is running.  Please see the comment
8917          * in kvm_flush_remote_tlbs.
8918          */
8919         smp_mb__after_srcu_read_unlock();
8920
8921         /*
8922          * This handles the case where a posted interrupt was
8923          * notified with kvm_vcpu_kick.
8924          */
8925         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
8926                 kvm_x86_ops.sync_pir_to_irr(vcpu);
8927
8928         if (kvm_vcpu_exit_request(vcpu)) {
8929                 vcpu->mode = OUTSIDE_GUEST_MODE;
8930                 smp_wmb();
8931                 local_irq_enable();
8932                 preempt_enable();
8933                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8934                 r = 1;
8935                 goto cancel_injection;
8936         }
8937
8938         if (req_immediate_exit) {
8939                 kvm_make_request(KVM_REQ_EVENT, vcpu);
8940                 kvm_x86_ops.request_immediate_exit(vcpu);
8941         }
8942
8943         trace_kvm_entry(vcpu);
8944
8945         fpregs_assert_state_consistent();
8946         if (test_thread_flag(TIF_NEED_FPU_LOAD))
8947                 switch_fpu_return();
8948
8949         if (unlikely(vcpu->arch.switch_db_regs)) {
8950                 set_debugreg(0, 7);
8951                 set_debugreg(vcpu->arch.eff_db[0], 0);
8952                 set_debugreg(vcpu->arch.eff_db[1], 1);
8953                 set_debugreg(vcpu->arch.eff_db[2], 2);
8954                 set_debugreg(vcpu->arch.eff_db[3], 3);
8955                 set_debugreg(vcpu->arch.dr6, 6);
8956                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
8957         }
8958
8959         exit_fastpath = kvm_x86_ops.run(vcpu);
8960
8961         /*
8962          * Do this here before restoring debug registers on the host.  And
8963          * since we do this before handling the vmexit, a DR access vmexit
8964          * can (a) read the correct value of the debug registers, (b) set
8965          * KVM_DEBUGREG_WONT_EXIT again.
8966          */
8967         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
8968                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
8969                 kvm_x86_ops.sync_dirty_debug_regs(vcpu);
8970                 kvm_update_dr0123(vcpu);
8971                 kvm_update_dr7(vcpu);
8972                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
8973         }
8974
8975         /*
8976          * If the guest has used debug registers, at least dr7
8977          * will be disabled while returning to the host.
8978          * If we don't have active breakpoints in the host, we don't
8979          * care about the messed up debug address registers. But if
8980          * we have some of them active, restore the old state.
8981          */
8982         if (hw_breakpoint_active())
8983                 hw_breakpoint_restore();
8984
8985         vcpu->arch.last_vmentry_cpu = vcpu->cpu;
8986         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
8987
8988         vcpu->mode = OUTSIDE_GUEST_MODE;
8989         smp_wmb();
8990
8991         kvm_x86_ops.handle_exit_irqoff(vcpu);
8992
8993         /*
8994          * Consume any pending interrupts, including the possible source of
8995          * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
8996          * An instruction is required after local_irq_enable() to fully unblock
8997          * interrupts on processors that implement an interrupt shadow, the
8998          * stat.exits increment will do nicely.
8999          */
9000         kvm_before_interrupt(vcpu);
9001         local_irq_enable();
9002         ++vcpu->stat.exits;
9003         local_irq_disable();
9004         kvm_after_interrupt(vcpu);
9005
9006         if (lapic_in_kernel(vcpu)) {
9007                 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
9008                 if (delta != S64_MIN) {
9009                         trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
9010                         vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
9011                 }
9012         }
9013
9014         local_irq_enable();
9015         preempt_enable();
9016
9017         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9018
9019         /*
9020          * Profile KVM exit RIPs:
9021          */
9022         if (unlikely(prof_on == KVM_PROFILING)) {
9023                 unsigned long rip = kvm_rip_read(vcpu);
9024                 profile_hit(KVM_PROFILING, (void *)rip);
9025         }
9026
9027         if (unlikely(vcpu->arch.tsc_always_catchup))
9028                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
9029
9030         if (vcpu->arch.apic_attention)
9031                 kvm_lapic_sync_from_vapic(vcpu);
9032
9033         r = kvm_x86_ops.handle_exit(vcpu, exit_fastpath);
9034         return r;
9035
9036 cancel_injection:
9037         if (req_immediate_exit)
9038                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9039         kvm_x86_ops.cancel_injection(vcpu);
9040         if (unlikely(vcpu->arch.apic_attention))
9041                 kvm_lapic_sync_from_vapic(vcpu);
9042 out:
9043         return r;
9044 }
9045
9046 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
9047 {
9048         if (!kvm_arch_vcpu_runnable(vcpu) &&
9049             (!kvm_x86_ops.pre_block || kvm_x86_ops.pre_block(vcpu) == 0)) {
9050                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9051                 kvm_vcpu_block(vcpu);
9052                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9053
9054                 if (kvm_x86_ops.post_block)
9055                         kvm_x86_ops.post_block(vcpu);
9056
9057                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
9058                         return 1;
9059         }
9060
9061         kvm_apic_accept_events(vcpu);
9062         switch(vcpu->arch.mp_state) {
9063         case KVM_MP_STATE_HALTED:
9064                 vcpu->arch.pv.pv_unhalted = false;
9065                 vcpu->arch.mp_state =
9066                         KVM_MP_STATE_RUNNABLE;
9067                 fallthrough;
9068         case KVM_MP_STATE_RUNNABLE:
9069                 vcpu->arch.apf.halted = false;
9070                 break;
9071         case KVM_MP_STATE_INIT_RECEIVED:
9072                 break;
9073         default:
9074                 return -EINTR;
9075         }
9076         return 1;
9077 }
9078
9079 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
9080 {
9081         if (is_guest_mode(vcpu))
9082                 kvm_x86_ops.nested_ops->check_events(vcpu);
9083
9084         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
9085                 !vcpu->arch.apf.halted);
9086 }
9087
9088 static int vcpu_run(struct kvm_vcpu *vcpu)
9089 {
9090         int r;
9091         struct kvm *kvm = vcpu->kvm;
9092
9093         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9094         vcpu->arch.l1tf_flush_l1d = true;
9095
9096         for (;;) {
9097                 if (kvm_vcpu_running(vcpu)) {
9098                         r = vcpu_enter_guest(vcpu);
9099                 } else {
9100                         r = vcpu_block(kvm, vcpu);
9101                 }
9102
9103                 if (r <= 0)
9104                         break;
9105
9106                 kvm_clear_request(KVM_REQ_PENDING_TIMER, vcpu);
9107                 if (kvm_cpu_has_pending_timer(vcpu))
9108                         kvm_inject_pending_timer_irqs(vcpu);
9109
9110                 if (dm_request_for_irq_injection(vcpu) &&
9111                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
9112                         r = 0;
9113                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
9114                         ++vcpu->stat.request_irq_exits;
9115                         break;
9116                 }
9117
9118                 if (__xfer_to_guest_mode_work_pending()) {
9119                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9120                         r = xfer_to_guest_mode_handle_work(vcpu);
9121                         if (r)
9122                                 return r;
9123                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9124                 }
9125         }
9126
9127         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9128
9129         return r;
9130 }
9131
9132 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
9133 {
9134         int r;
9135
9136         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9137         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
9138         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9139         return r;
9140 }
9141
9142 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
9143 {
9144         BUG_ON(!vcpu->arch.pio.count);
9145
9146         return complete_emulated_io(vcpu);
9147 }
9148
9149 /*
9150  * Implements the following, as a state machine:
9151  *
9152  * read:
9153  *   for each fragment
9154  *     for each mmio piece in the fragment
9155  *       write gpa, len
9156  *       exit
9157  *       copy data
9158  *   execute insn
9159  *
9160  * write:
9161  *   for each fragment
9162  *     for each mmio piece in the fragment
9163  *       write gpa, len
9164  *       copy data
9165  *       exit
9166  */
9167 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
9168 {
9169         struct kvm_run *run = vcpu->run;
9170         struct kvm_mmio_fragment *frag;
9171         unsigned len;
9172
9173         BUG_ON(!vcpu->mmio_needed);
9174
9175         /* Complete previous fragment */
9176         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
9177         len = min(8u, frag->len);
9178         if (!vcpu->mmio_is_write)
9179                 memcpy(frag->data, run->mmio.data, len);
9180
9181         if (frag->len <= 8) {
9182                 /* Switch to the next fragment. */
9183                 frag++;
9184                 vcpu->mmio_cur_fragment++;
9185         } else {
9186                 /* Go forward to the next mmio piece. */
9187                 frag->data += len;
9188                 frag->gpa += len;
9189                 frag->len -= len;
9190         }
9191
9192         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
9193                 vcpu->mmio_needed = 0;
9194
9195                 /* FIXME: return into emulator if single-stepping.  */
9196                 if (vcpu->mmio_is_write)
9197                         return 1;
9198                 vcpu->mmio_read_completed = 1;
9199                 return complete_emulated_io(vcpu);
9200         }
9201
9202         run->exit_reason = KVM_EXIT_MMIO;
9203         run->mmio.phys_addr = frag->gpa;
9204         if (vcpu->mmio_is_write)
9205                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
9206         run->mmio.len = min(8u, frag->len);
9207         run->mmio.is_write = vcpu->mmio_is_write;
9208         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
9209         return 0;
9210 }
9211
9212 static void kvm_save_current_fpu(struct fpu *fpu)
9213 {
9214         /*
9215          * If the target FPU state is not resident in the CPU registers, just
9216          * memcpy() from current, else save CPU state directly to the target.
9217          */
9218         if (test_thread_flag(TIF_NEED_FPU_LOAD))
9219                 memcpy(&fpu->state, &current->thread.fpu.state,
9220                        fpu_kernel_xstate_size);
9221         else
9222                 copy_fpregs_to_fpstate(fpu);
9223 }
9224
9225 /* Swap (qemu) user FPU context for the guest FPU context. */
9226 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
9227 {
9228         fpregs_lock();
9229
9230         kvm_save_current_fpu(vcpu->arch.user_fpu);
9231
9232         /* PKRU is separately restored in kvm_x86_ops.run.  */
9233         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu->state,
9234                                 ~XFEATURE_MASK_PKRU);
9235
9236         fpregs_mark_activate();
9237         fpregs_unlock();
9238
9239         trace_kvm_fpu(1);
9240 }
9241
9242 /* When vcpu_run ends, restore user space FPU context. */
9243 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
9244 {
9245         fpregs_lock();
9246
9247         kvm_save_current_fpu(vcpu->arch.guest_fpu);
9248
9249         copy_kernel_to_fpregs(&vcpu->arch.user_fpu->state);
9250
9251         fpregs_mark_activate();
9252         fpregs_unlock();
9253
9254         ++vcpu->stat.fpu_reload;
9255         trace_kvm_fpu(0);
9256 }
9257
9258 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
9259 {
9260         struct kvm_run *kvm_run = vcpu->run;
9261         int r;
9262
9263         vcpu_load(vcpu);
9264         kvm_sigset_activate(vcpu);
9265         kvm_load_guest_fpu(vcpu);
9266
9267         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
9268                 if (kvm_run->immediate_exit) {
9269                         r = -EINTR;
9270                         goto out;
9271                 }
9272                 kvm_vcpu_block(vcpu);
9273                 kvm_apic_accept_events(vcpu);
9274                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
9275                 r = -EAGAIN;
9276                 if (signal_pending(current)) {
9277                         r = -EINTR;
9278                         kvm_run->exit_reason = KVM_EXIT_INTR;
9279                         ++vcpu->stat.signal_exits;
9280                 }
9281                 goto out;
9282         }
9283
9284         if (kvm_run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) {
9285                 r = -EINVAL;
9286                 goto out;
9287         }
9288
9289         if (kvm_run->kvm_dirty_regs) {
9290                 r = sync_regs(vcpu);
9291                 if (r != 0)
9292                         goto out;
9293         }
9294
9295         /* re-sync apic's tpr */
9296         if (!lapic_in_kernel(vcpu)) {
9297                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
9298                         r = -EINVAL;
9299                         goto out;
9300                 }
9301         }
9302
9303         if (unlikely(vcpu->arch.complete_userspace_io)) {
9304                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
9305                 vcpu->arch.complete_userspace_io = NULL;
9306                 r = cui(vcpu);
9307                 if (r <= 0)
9308                         goto out;
9309         } else
9310                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
9311
9312         if (kvm_run->immediate_exit)
9313                 r = -EINTR;
9314         else
9315                 r = vcpu_run(vcpu);
9316
9317 out:
9318         kvm_put_guest_fpu(vcpu);
9319         if (kvm_run->kvm_valid_regs)
9320                 store_regs(vcpu);
9321         post_kvm_run_save(vcpu);
9322         kvm_sigset_deactivate(vcpu);
9323
9324         vcpu_put(vcpu);
9325         return r;
9326 }
9327
9328 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9329 {
9330         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
9331                 /*
9332                  * We are here if userspace calls get_regs() in the middle of
9333                  * instruction emulation. Registers state needs to be copied
9334                  * back from emulation context to vcpu. Userspace shouldn't do
9335                  * that usually, but some bad designed PV devices (vmware
9336                  * backdoor interface) need this to work
9337                  */
9338                 emulator_writeback_register_cache(vcpu->arch.emulate_ctxt);
9339                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
9340         }
9341         regs->rax = kvm_rax_read(vcpu);
9342         regs->rbx = kvm_rbx_read(vcpu);
9343         regs->rcx = kvm_rcx_read(vcpu);
9344         regs->rdx = kvm_rdx_read(vcpu);
9345         regs->rsi = kvm_rsi_read(vcpu);
9346         regs->rdi = kvm_rdi_read(vcpu);
9347         regs->rsp = kvm_rsp_read(vcpu);
9348         regs->rbp = kvm_rbp_read(vcpu);
9349 #ifdef CONFIG_X86_64
9350         regs->r8 = kvm_r8_read(vcpu);
9351         regs->r9 = kvm_r9_read(vcpu);
9352         regs->r10 = kvm_r10_read(vcpu);
9353         regs->r11 = kvm_r11_read(vcpu);
9354         regs->r12 = kvm_r12_read(vcpu);
9355         regs->r13 = kvm_r13_read(vcpu);
9356         regs->r14 = kvm_r14_read(vcpu);
9357         regs->r15 = kvm_r15_read(vcpu);
9358 #endif
9359
9360         regs->rip = kvm_rip_read(vcpu);
9361         regs->rflags = kvm_get_rflags(vcpu);
9362 }
9363
9364 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9365 {
9366         vcpu_load(vcpu);
9367         __get_regs(vcpu, regs);
9368         vcpu_put(vcpu);
9369         return 0;
9370 }
9371
9372 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9373 {
9374         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
9375         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
9376
9377         kvm_rax_write(vcpu, regs->rax);
9378         kvm_rbx_write(vcpu, regs->rbx);
9379         kvm_rcx_write(vcpu, regs->rcx);
9380         kvm_rdx_write(vcpu, regs->rdx);
9381         kvm_rsi_write(vcpu, regs->rsi);
9382         kvm_rdi_write(vcpu, regs->rdi);
9383         kvm_rsp_write(vcpu, regs->rsp);
9384         kvm_rbp_write(vcpu, regs->rbp);
9385 #ifdef CONFIG_X86_64
9386         kvm_r8_write(vcpu, regs->r8);
9387         kvm_r9_write(vcpu, regs->r9);
9388         kvm_r10_write(vcpu, regs->r10);
9389         kvm_r11_write(vcpu, regs->r11);
9390         kvm_r12_write(vcpu, regs->r12);
9391         kvm_r13_write(vcpu, regs->r13);
9392         kvm_r14_write(vcpu, regs->r14);
9393         kvm_r15_write(vcpu, regs->r15);
9394 #endif
9395
9396         kvm_rip_write(vcpu, regs->rip);
9397         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
9398
9399         vcpu->arch.exception.pending = false;
9400
9401         kvm_make_request(KVM_REQ_EVENT, vcpu);
9402 }
9403
9404 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9405 {
9406         vcpu_load(vcpu);
9407         __set_regs(vcpu, regs);
9408         vcpu_put(vcpu);
9409         return 0;
9410 }
9411
9412 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
9413 {
9414         struct kvm_segment cs;
9415
9416         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
9417         *db = cs.db;
9418         *l = cs.l;
9419 }
9420 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
9421
9422 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9423 {
9424         struct desc_ptr dt;
9425
9426         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
9427         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
9428         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
9429         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
9430         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
9431         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
9432
9433         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
9434         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
9435
9436         kvm_x86_ops.get_idt(vcpu, &dt);
9437         sregs->idt.limit = dt.size;
9438         sregs->idt.base = dt.address;
9439         kvm_x86_ops.get_gdt(vcpu, &dt);
9440         sregs->gdt.limit = dt.size;
9441         sregs->gdt.base = dt.address;
9442
9443         sregs->cr0 = kvm_read_cr0(vcpu);
9444         sregs->cr2 = vcpu->arch.cr2;
9445         sregs->cr3 = kvm_read_cr3(vcpu);
9446         sregs->cr4 = kvm_read_cr4(vcpu);
9447         sregs->cr8 = kvm_get_cr8(vcpu);
9448         sregs->efer = vcpu->arch.efer;
9449         sregs->apic_base = kvm_get_apic_base(vcpu);
9450
9451         memset(sregs->interrupt_bitmap, 0, sizeof(sregs->interrupt_bitmap));
9452
9453         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
9454                 set_bit(vcpu->arch.interrupt.nr,
9455                         (unsigned long *)sregs->interrupt_bitmap);
9456 }
9457
9458 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
9459                                   struct kvm_sregs *sregs)
9460 {
9461         vcpu_load(vcpu);
9462         __get_sregs(vcpu, sregs);
9463         vcpu_put(vcpu);
9464         return 0;
9465 }
9466
9467 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
9468                                     struct kvm_mp_state *mp_state)
9469 {
9470         vcpu_load(vcpu);
9471         if (kvm_mpx_supported())
9472                 kvm_load_guest_fpu(vcpu);
9473
9474         kvm_apic_accept_events(vcpu);
9475         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
9476                                         vcpu->arch.pv.pv_unhalted)
9477                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
9478         else
9479                 mp_state->mp_state = vcpu->arch.mp_state;
9480
9481         if (kvm_mpx_supported())
9482                 kvm_put_guest_fpu(vcpu);
9483         vcpu_put(vcpu);
9484         return 0;
9485 }
9486
9487 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
9488                                     struct kvm_mp_state *mp_state)
9489 {
9490         int ret = -EINVAL;
9491
9492         vcpu_load(vcpu);
9493
9494         if (!lapic_in_kernel(vcpu) &&
9495             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
9496                 goto out;
9497
9498         /*
9499          * KVM_MP_STATE_INIT_RECEIVED means the processor is in
9500          * INIT state; latched init should be reported using
9501          * KVM_SET_VCPU_EVENTS, so reject it here.
9502          */
9503         if ((kvm_vcpu_latch_init(vcpu) || vcpu->arch.smi_pending) &&
9504             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
9505              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
9506                 goto out;
9507
9508         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
9509                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
9510                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
9511         } else
9512                 vcpu->arch.mp_state = mp_state->mp_state;
9513         kvm_make_request(KVM_REQ_EVENT, vcpu);
9514
9515         ret = 0;
9516 out:
9517         vcpu_put(vcpu);
9518         return ret;
9519 }
9520
9521 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
9522                     int reason, bool has_error_code, u32 error_code)
9523 {
9524         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
9525         int ret;
9526
9527         init_emulate_ctxt(vcpu);
9528
9529         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
9530                                    has_error_code, error_code);
9531         if (ret) {
9532                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
9533                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
9534                 vcpu->run->internal.ndata = 0;
9535                 return 0;
9536         }
9537
9538         kvm_rip_write(vcpu, ctxt->eip);
9539         kvm_set_rflags(vcpu, ctxt->eflags);
9540         return 1;
9541 }
9542 EXPORT_SYMBOL_GPL(kvm_task_switch);
9543
9544 static bool kvm_is_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9545 {
9546         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
9547                 /*
9548                  * When EFER.LME and CR0.PG are set, the processor is in
9549                  * 64-bit mode (though maybe in a 32-bit code segment).
9550                  * CR4.PAE and EFER.LMA must be set.
9551                  */
9552                 if (!(sregs->cr4 & X86_CR4_PAE) || !(sregs->efer & EFER_LMA))
9553                         return false;
9554         } else {
9555                 /*
9556                  * Not in 64-bit mode: EFER.LMA is clear and the code
9557                  * segment cannot be 64-bit.
9558                  */
9559                 if (sregs->efer & EFER_LMA || sregs->cs.l)
9560                         return false;
9561         }
9562
9563         return kvm_is_valid_cr4(vcpu, sregs->cr4);
9564 }
9565
9566 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9567 {
9568         struct msr_data apic_base_msr;
9569         int mmu_reset_needed = 0;
9570         int cpuid_update_needed = 0;
9571         int pending_vec, max_bits, idx;
9572         struct desc_ptr dt;
9573         int ret = -EINVAL;
9574
9575         if (!kvm_is_valid_sregs(vcpu, sregs))
9576                 goto out;
9577
9578         apic_base_msr.data = sregs->apic_base;
9579         apic_base_msr.host_initiated = true;
9580         if (kvm_set_apic_base(vcpu, &apic_base_msr))
9581                 goto out;
9582
9583         dt.size = sregs->idt.limit;
9584         dt.address = sregs->idt.base;
9585         kvm_x86_ops.set_idt(vcpu, &dt);
9586         dt.size = sregs->gdt.limit;
9587         dt.address = sregs->gdt.base;
9588         kvm_x86_ops.set_gdt(vcpu, &dt);
9589
9590         vcpu->arch.cr2 = sregs->cr2;
9591         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
9592         vcpu->arch.cr3 = sregs->cr3;
9593         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
9594
9595         kvm_set_cr8(vcpu, sregs->cr8);
9596
9597         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
9598         kvm_x86_ops.set_efer(vcpu, sregs->efer);
9599
9600         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
9601         kvm_x86_ops.set_cr0(vcpu, sregs->cr0);
9602         vcpu->arch.cr0 = sregs->cr0;
9603
9604         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
9605         cpuid_update_needed |= ((kvm_read_cr4(vcpu) ^ sregs->cr4) &
9606                                 (X86_CR4_OSXSAVE | X86_CR4_PKE));
9607         kvm_x86_ops.set_cr4(vcpu, sregs->cr4);
9608         if (cpuid_update_needed)
9609                 kvm_update_cpuid_runtime(vcpu);
9610
9611         idx = srcu_read_lock(&vcpu->kvm->srcu);
9612         if (is_pae_paging(vcpu)) {
9613                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
9614                 mmu_reset_needed = 1;
9615         }
9616         srcu_read_unlock(&vcpu->kvm->srcu, idx);
9617
9618         if (mmu_reset_needed)
9619                 kvm_mmu_reset_context(vcpu);
9620
9621         max_bits = KVM_NR_INTERRUPTS;
9622         pending_vec = find_first_bit(
9623                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
9624         if (pending_vec < max_bits) {
9625                 kvm_queue_interrupt(vcpu, pending_vec, false);
9626                 pr_debug("Set back pending irq %d\n", pending_vec);
9627         }
9628
9629         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
9630         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
9631         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
9632         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
9633         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
9634         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
9635
9636         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
9637         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
9638
9639         update_cr8_intercept(vcpu);
9640
9641         /* Older userspace won't unhalt the vcpu on reset. */
9642         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
9643             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
9644             !is_protmode(vcpu))
9645                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9646
9647         kvm_make_request(KVM_REQ_EVENT, vcpu);
9648
9649         ret = 0;
9650 out:
9651         return ret;
9652 }
9653
9654 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
9655                                   struct kvm_sregs *sregs)
9656 {
9657         int ret;
9658
9659         vcpu_load(vcpu);
9660         ret = __set_sregs(vcpu, sregs);
9661         vcpu_put(vcpu);
9662         return ret;
9663 }
9664
9665 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
9666                                         struct kvm_guest_debug *dbg)
9667 {
9668         unsigned long rflags;
9669         int i, r;
9670
9671         vcpu_load(vcpu);
9672
9673         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
9674                 r = -EBUSY;
9675                 if (vcpu->arch.exception.pending)
9676                         goto out;
9677                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
9678                         kvm_queue_exception(vcpu, DB_VECTOR);
9679                 else
9680                         kvm_queue_exception(vcpu, BP_VECTOR);
9681         }
9682
9683         /*
9684          * Read rflags as long as potentially injected trace flags are still
9685          * filtered out.
9686          */
9687         rflags = kvm_get_rflags(vcpu);
9688
9689         vcpu->guest_debug = dbg->control;
9690         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
9691                 vcpu->guest_debug = 0;
9692
9693         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
9694                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
9695                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
9696                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
9697         } else {
9698                 for (i = 0; i < KVM_NR_DB_REGS; i++)
9699                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
9700         }
9701         kvm_update_dr7(vcpu);
9702
9703         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
9704                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
9705                         get_segment_base(vcpu, VCPU_SREG_CS);
9706
9707         /*
9708          * Trigger an rflags update that will inject or remove the trace
9709          * flags.
9710          */
9711         kvm_set_rflags(vcpu, rflags);
9712
9713         kvm_x86_ops.update_exception_bitmap(vcpu);
9714
9715         r = 0;
9716
9717 out:
9718         vcpu_put(vcpu);
9719         return r;
9720 }
9721
9722 /*
9723  * Translate a guest virtual address to a guest physical address.
9724  */
9725 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
9726                                     struct kvm_translation *tr)
9727 {
9728         unsigned long vaddr = tr->linear_address;
9729         gpa_t gpa;
9730         int idx;
9731
9732         vcpu_load(vcpu);
9733
9734         idx = srcu_read_lock(&vcpu->kvm->srcu);
9735         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
9736         srcu_read_unlock(&vcpu->kvm->srcu, idx);
9737         tr->physical_address = gpa;
9738         tr->valid = gpa != UNMAPPED_GVA;
9739         tr->writeable = 1;
9740         tr->usermode = 0;
9741
9742         vcpu_put(vcpu);
9743         return 0;
9744 }
9745
9746 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
9747 {
9748         struct fxregs_state *fxsave;
9749
9750         vcpu_load(vcpu);
9751
9752         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
9753         memcpy(fpu->fpr, fxsave->st_space, 128);
9754         fpu->fcw = fxsave->cwd;
9755         fpu->fsw = fxsave->swd;
9756         fpu->ftwx = fxsave->twd;
9757         fpu->last_opcode = fxsave->fop;
9758         fpu->last_ip = fxsave->rip;
9759         fpu->last_dp = fxsave->rdp;
9760         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
9761
9762         vcpu_put(vcpu);
9763         return 0;
9764 }
9765
9766 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
9767 {
9768         struct fxregs_state *fxsave;
9769
9770         vcpu_load(vcpu);
9771
9772         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
9773
9774         memcpy(fxsave->st_space, fpu->fpr, 128);
9775         fxsave->cwd = fpu->fcw;
9776         fxsave->swd = fpu->fsw;
9777         fxsave->twd = fpu->ftwx;
9778         fxsave->fop = fpu->last_opcode;
9779         fxsave->rip = fpu->last_ip;
9780         fxsave->rdp = fpu->last_dp;
9781         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
9782
9783         vcpu_put(vcpu);
9784         return 0;
9785 }
9786
9787 static void store_regs(struct kvm_vcpu *vcpu)
9788 {
9789         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
9790
9791         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
9792                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
9793
9794         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
9795                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
9796
9797         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
9798                 kvm_vcpu_ioctl_x86_get_vcpu_events(
9799                                 vcpu, &vcpu->run->s.regs.events);
9800 }
9801
9802 static int sync_regs(struct kvm_vcpu *vcpu)
9803 {
9804         if (vcpu->run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)
9805                 return -EINVAL;
9806
9807         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
9808                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
9809                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
9810         }
9811         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
9812                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
9813                         return -EINVAL;
9814                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
9815         }
9816         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
9817                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
9818                                 vcpu, &vcpu->run->s.regs.events))
9819                         return -EINVAL;
9820                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
9821         }
9822
9823         return 0;
9824 }
9825
9826 static void fx_init(struct kvm_vcpu *vcpu)
9827 {
9828         fpstate_init(&vcpu->arch.guest_fpu->state);
9829         if (boot_cpu_has(X86_FEATURE_XSAVES))
9830                 vcpu->arch.guest_fpu->state.xsave.header.xcomp_bv =
9831                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
9832
9833         /*
9834          * Ensure guest xcr0 is valid for loading
9835          */
9836         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
9837
9838         vcpu->arch.cr0 |= X86_CR0_ET;
9839 }
9840
9841 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
9842 {
9843         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
9844                 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
9845                              "guest TSC will not be reliable\n");
9846
9847         return 0;
9848 }
9849
9850 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
9851 {
9852         struct page *page;
9853         int r;
9854
9855         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
9856                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9857         else
9858                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
9859
9860         kvm_set_tsc_khz(vcpu, max_tsc_khz);
9861
9862         r = kvm_mmu_create(vcpu);
9863         if (r < 0)
9864                 return r;
9865
9866         if (irqchip_in_kernel(vcpu->kvm)) {
9867                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
9868                 if (r < 0)
9869                         goto fail_mmu_destroy;
9870                 if (kvm_apicv_activated(vcpu->kvm))
9871                         vcpu->arch.apicv_active = true;
9872         } else
9873                 static_key_slow_inc(&kvm_no_apic_vcpu);
9874
9875         r = -ENOMEM;
9876
9877         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
9878         if (!page)
9879                 goto fail_free_lapic;
9880         vcpu->arch.pio_data = page_address(page);
9881
9882         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
9883                                        GFP_KERNEL_ACCOUNT);
9884         if (!vcpu->arch.mce_banks)
9885                 goto fail_free_pio_data;
9886         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
9887
9888         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
9889                                 GFP_KERNEL_ACCOUNT))
9890                 goto fail_free_mce_banks;
9891
9892         if (!alloc_emulate_ctxt(vcpu))
9893                 goto free_wbinvd_dirty_mask;
9894
9895         vcpu->arch.user_fpu = kmem_cache_zalloc(x86_fpu_cache,
9896                                                 GFP_KERNEL_ACCOUNT);
9897         if (!vcpu->arch.user_fpu) {
9898                 pr_err("kvm: failed to allocate userspace's fpu\n");
9899                 goto free_emulate_ctxt;
9900         }
9901
9902         vcpu->arch.guest_fpu = kmem_cache_zalloc(x86_fpu_cache,
9903                                                  GFP_KERNEL_ACCOUNT);
9904         if (!vcpu->arch.guest_fpu) {
9905                 pr_err("kvm: failed to allocate vcpu's fpu\n");
9906                 goto free_user_fpu;
9907         }
9908         fx_init(vcpu);
9909
9910         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
9911
9912         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
9913
9914         kvm_async_pf_hash_reset(vcpu);
9915         kvm_pmu_init(vcpu);
9916
9917         vcpu->arch.pending_external_vector = -1;
9918         vcpu->arch.preempted_in_kernel = false;
9919
9920         kvm_hv_vcpu_init(vcpu);
9921
9922         r = kvm_x86_ops.vcpu_create(vcpu);
9923         if (r)
9924                 goto free_guest_fpu;
9925
9926         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
9927         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
9928         kvm_vcpu_mtrr_init(vcpu);
9929         vcpu_load(vcpu);
9930         kvm_vcpu_reset(vcpu, false);
9931         kvm_init_mmu(vcpu, false);
9932         vcpu_put(vcpu);
9933         return 0;
9934
9935 free_guest_fpu:
9936         kmem_cache_free(x86_fpu_cache, vcpu->arch.guest_fpu);
9937 free_user_fpu:
9938         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
9939 free_emulate_ctxt:
9940         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
9941 free_wbinvd_dirty_mask:
9942         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
9943 fail_free_mce_banks:
9944         kfree(vcpu->arch.mce_banks);
9945 fail_free_pio_data:
9946         free_page((unsigned long)vcpu->arch.pio_data);
9947 fail_free_lapic:
9948         kvm_free_lapic(vcpu);
9949 fail_mmu_destroy:
9950         kvm_mmu_destroy(vcpu);
9951         return r;
9952 }
9953
9954 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
9955 {
9956         struct kvm *kvm = vcpu->kvm;
9957
9958         kvm_hv_vcpu_postcreate(vcpu);
9959
9960         if (mutex_lock_killable(&vcpu->mutex))
9961                 return;
9962         vcpu_load(vcpu);
9963         kvm_synchronize_tsc(vcpu, 0);
9964         vcpu_put(vcpu);
9965
9966         /* poll control enabled by default */
9967         vcpu->arch.msr_kvm_poll_control = 1;
9968
9969         mutex_unlock(&vcpu->mutex);
9970
9971         if (kvmclock_periodic_sync && vcpu->vcpu_idx == 0)
9972                 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
9973                                                 KVMCLOCK_SYNC_PERIOD);
9974 }
9975
9976 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
9977 {
9978         struct gfn_to_pfn_cache *cache = &vcpu->arch.st.cache;
9979         int idx;
9980
9981         kvm_release_pfn(cache->pfn, cache->dirty, cache);
9982
9983         kvmclock_reset(vcpu);
9984
9985         kvm_x86_ops.vcpu_free(vcpu);
9986
9987         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
9988         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
9989         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
9990         kmem_cache_free(x86_fpu_cache, vcpu->arch.guest_fpu);
9991
9992         kvm_hv_vcpu_uninit(vcpu);
9993         kvm_pmu_destroy(vcpu);
9994         kfree(vcpu->arch.mce_banks);
9995         kvm_free_lapic(vcpu);
9996         idx = srcu_read_lock(&vcpu->kvm->srcu);
9997         kvm_mmu_destroy(vcpu);
9998         srcu_read_unlock(&vcpu->kvm->srcu, idx);
9999         free_page((unsigned long)vcpu->arch.pio_data);
10000         kvfree(vcpu->arch.cpuid_entries);
10001         if (!lapic_in_kernel(vcpu))
10002                 static_key_slow_dec(&kvm_no_apic_vcpu);
10003 }
10004
10005 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
10006 {
10007         kvm_lapic_reset(vcpu, init_event);
10008
10009         vcpu->arch.hflags = 0;
10010
10011         vcpu->arch.smi_pending = 0;
10012         vcpu->arch.smi_count = 0;
10013         atomic_set(&vcpu->arch.nmi_queued, 0);
10014         vcpu->arch.nmi_pending = 0;
10015         vcpu->arch.nmi_injected = false;
10016         kvm_clear_interrupt_queue(vcpu);
10017         kvm_clear_exception_queue(vcpu);
10018
10019         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
10020         kvm_update_dr0123(vcpu);
10021         vcpu->arch.dr6 = DR6_INIT;
10022         vcpu->arch.dr7 = DR7_FIXED_1;
10023         kvm_update_dr7(vcpu);
10024
10025         vcpu->arch.cr2 = 0;
10026
10027         kvm_make_request(KVM_REQ_EVENT, vcpu);
10028         vcpu->arch.apf.msr_en_val = 0;
10029         vcpu->arch.apf.msr_int_val = 0;
10030         vcpu->arch.st.msr_val = 0;
10031
10032         kvmclock_reset(vcpu);
10033
10034         kvm_clear_async_pf_completion_queue(vcpu);
10035         kvm_async_pf_hash_reset(vcpu);
10036         vcpu->arch.apf.halted = false;
10037
10038         if (kvm_mpx_supported()) {
10039                 void *mpx_state_buffer;
10040
10041                 /*
10042                  * To avoid have the INIT path from kvm_apic_has_events() that be
10043                  * called with loaded FPU and does not let userspace fix the state.
10044                  */
10045                 if (init_event)
10046                         kvm_put_guest_fpu(vcpu);
10047                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10048                                         XFEATURE_BNDREGS);
10049                 if (mpx_state_buffer)
10050                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
10051                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10052                                         XFEATURE_BNDCSR);
10053                 if (mpx_state_buffer)
10054                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
10055                 if (init_event)
10056                         kvm_load_guest_fpu(vcpu);
10057         }
10058
10059         if (!init_event) {
10060                 kvm_pmu_reset(vcpu);
10061                 vcpu->arch.smbase = 0x30000;
10062
10063                 vcpu->arch.msr_misc_features_enables = 0;
10064
10065                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10066         }
10067
10068         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
10069         vcpu->arch.regs_avail = ~0;
10070         vcpu->arch.regs_dirty = ~0;
10071
10072         vcpu->arch.ia32_xss = 0;
10073
10074         kvm_x86_ops.vcpu_reset(vcpu, init_event);
10075 }
10076
10077 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
10078 {
10079         struct kvm_segment cs;
10080
10081         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
10082         cs.selector = vector << 8;
10083         cs.base = vector << 12;
10084         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
10085         kvm_rip_write(vcpu, 0);
10086 }
10087
10088 int kvm_arch_hardware_enable(void)
10089 {
10090         struct kvm *kvm;
10091         struct kvm_vcpu *vcpu;
10092         int i;
10093         int ret;
10094         u64 local_tsc;
10095         u64 max_tsc = 0;
10096         bool stable, backwards_tsc = false;
10097
10098         kvm_user_return_msr_cpu_online();
10099         ret = kvm_x86_ops.hardware_enable();
10100         if (ret != 0)
10101                 return ret;
10102
10103         local_tsc = rdtsc();
10104         stable = !kvm_check_tsc_unstable();
10105         list_for_each_entry(kvm, &vm_list, vm_list) {
10106                 kvm_for_each_vcpu(i, vcpu, kvm) {
10107                         if (!stable && vcpu->cpu == smp_processor_id())
10108                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
10109                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
10110                                 backwards_tsc = true;
10111                                 if (vcpu->arch.last_host_tsc > max_tsc)
10112                                         max_tsc = vcpu->arch.last_host_tsc;
10113                         }
10114                 }
10115         }
10116
10117         /*
10118          * Sometimes, even reliable TSCs go backwards.  This happens on
10119          * platforms that reset TSC during suspend or hibernate actions, but
10120          * maintain synchronization.  We must compensate.  Fortunately, we can
10121          * detect that condition here, which happens early in CPU bringup,
10122          * before any KVM threads can be running.  Unfortunately, we can't
10123          * bring the TSCs fully up to date with real time, as we aren't yet far
10124          * enough into CPU bringup that we know how much real time has actually
10125          * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
10126          * variables that haven't been updated yet.
10127          *
10128          * So we simply find the maximum observed TSC above, then record the
10129          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
10130          * the adjustment will be applied.  Note that we accumulate
10131          * adjustments, in case multiple suspend cycles happen before some VCPU
10132          * gets a chance to run again.  In the event that no KVM threads get a
10133          * chance to run, we will miss the entire elapsed period, as we'll have
10134          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
10135          * loose cycle time.  This isn't too big a deal, since the loss will be
10136          * uniform across all VCPUs (not to mention the scenario is extremely
10137          * unlikely). It is possible that a second hibernate recovery happens
10138          * much faster than a first, causing the observed TSC here to be
10139          * smaller; this would require additional padding adjustment, which is
10140          * why we set last_host_tsc to the local tsc observed here.
10141          *
10142          * N.B. - this code below runs only on platforms with reliable TSC,
10143          * as that is the only way backwards_tsc is set above.  Also note
10144          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
10145          * have the same delta_cyc adjustment applied if backwards_tsc
10146          * is detected.  Note further, this adjustment is only done once,
10147          * as we reset last_host_tsc on all VCPUs to stop this from being
10148          * called multiple times (one for each physical CPU bringup).
10149          *
10150          * Platforms with unreliable TSCs don't have to deal with this, they
10151          * will be compensated by the logic in vcpu_load, which sets the TSC to
10152          * catchup mode.  This will catchup all VCPUs to real time, but cannot
10153          * guarantee that they stay in perfect synchronization.
10154          */
10155         if (backwards_tsc) {
10156                 u64 delta_cyc = max_tsc - local_tsc;
10157                 list_for_each_entry(kvm, &vm_list, vm_list) {
10158                         kvm->arch.backwards_tsc_observed = true;
10159                         kvm_for_each_vcpu(i, vcpu, kvm) {
10160                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
10161                                 vcpu->arch.last_host_tsc = local_tsc;
10162                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
10163                         }
10164
10165                         /*
10166                          * We have to disable TSC offset matching.. if you were
10167                          * booting a VM while issuing an S4 host suspend....
10168                          * you may have some problem.  Solving this issue is
10169                          * left as an exercise to the reader.
10170                          */
10171                         kvm->arch.last_tsc_nsec = 0;
10172                         kvm->arch.last_tsc_write = 0;
10173                 }
10174
10175         }
10176         return 0;
10177 }
10178
10179 void kvm_arch_hardware_disable(void)
10180 {
10181         kvm_x86_ops.hardware_disable();
10182         drop_user_return_notifiers();
10183 }
10184
10185 int kvm_arch_hardware_setup(void *opaque)
10186 {
10187         struct kvm_x86_init_ops *ops = opaque;
10188         int r;
10189
10190         rdmsrl_safe(MSR_EFER, &host_efer);
10191
10192         if (boot_cpu_has(X86_FEATURE_XSAVES))
10193                 rdmsrl(MSR_IA32_XSS, host_xss);
10194
10195         r = ops->hardware_setup();
10196         if (r != 0)
10197                 return r;
10198
10199         memcpy(&kvm_x86_ops, ops->runtime_ops, sizeof(kvm_x86_ops));
10200
10201         if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))
10202                 supported_xss = 0;
10203
10204 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
10205         cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
10206 #undef __kvm_cpu_cap_has
10207
10208         if (kvm_has_tsc_control) {
10209                 /*
10210                  * Make sure the user can only configure tsc_khz values that
10211                  * fit into a signed integer.
10212                  * A min value is not calculated because it will always
10213                  * be 1 on all machines.
10214                  */
10215                 u64 max = min(0x7fffffffULL,
10216                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
10217                 kvm_max_guest_tsc_khz = max;
10218
10219                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
10220         }
10221
10222         kvm_init_msr_list();
10223         return 0;
10224 }
10225
10226 void kvm_arch_hardware_unsetup(void)
10227 {
10228         kvm_x86_ops.hardware_unsetup();
10229 }
10230
10231 int kvm_arch_check_processor_compat(void *opaque)
10232 {
10233         struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
10234         struct kvm_x86_init_ops *ops = opaque;
10235
10236         WARN_ON(!irqs_disabled());
10237
10238         if (__cr4_reserved_bits(cpu_has, c) !=
10239             __cr4_reserved_bits(cpu_has, &boot_cpu_data))
10240                 return -EIO;
10241
10242         return ops->check_processor_compatibility();
10243 }
10244
10245 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
10246 {
10247         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
10248 }
10249 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
10250
10251 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
10252 {
10253         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
10254 }
10255
10256 struct static_key kvm_no_apic_vcpu __read_mostly;
10257 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
10258
10259 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
10260 {
10261         struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
10262
10263         vcpu->arch.l1tf_flush_l1d = true;
10264         if (pmu->version && unlikely(pmu->event_count)) {
10265                 pmu->need_cleanup = true;
10266                 kvm_make_request(KVM_REQ_PMU, vcpu);
10267         }
10268         kvm_x86_ops.sched_in(vcpu, cpu);
10269 }
10270
10271 void kvm_arch_free_vm(struct kvm *kvm)
10272 {
10273         kfree(kvm->arch.hyperv.hv_pa_pg);
10274         vfree(kvm);
10275 }
10276
10277
10278 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
10279 {
10280         if (type)
10281                 return -EINVAL;
10282
10283         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
10284         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
10285         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
10286         INIT_LIST_HEAD(&kvm->arch.lpage_disallowed_mmu_pages);
10287         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
10288         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
10289
10290         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
10291         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
10292         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
10293         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
10294                 &kvm->arch.irq_sources_bitmap);
10295
10296         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
10297         mutex_init(&kvm->arch.apic_map_lock);
10298         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
10299
10300         kvm->arch.kvmclock_offset = -get_kvmclock_base_ns();
10301         pvclock_update_vm_gtod_copy(kvm);
10302
10303         kvm->arch.guest_can_read_msr_platform_info = true;
10304
10305         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
10306         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
10307
10308         kvm_hv_init_vm(kvm);
10309         kvm_page_track_init(kvm);
10310         kvm_mmu_init_vm(kvm);
10311
10312         return kvm_x86_ops.vm_init(kvm);
10313 }
10314
10315 int kvm_arch_post_init_vm(struct kvm *kvm)
10316 {
10317         return kvm_mmu_post_init_vm(kvm);
10318 }
10319
10320 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
10321 {
10322         vcpu_load(vcpu);
10323         kvm_mmu_unload(vcpu);
10324         vcpu_put(vcpu);
10325 }
10326
10327 static void kvm_free_vcpus(struct kvm *kvm)
10328 {
10329         unsigned int i;
10330         struct kvm_vcpu *vcpu;
10331
10332         /*
10333          * Unpin any mmu pages first.
10334          */
10335         kvm_for_each_vcpu(i, vcpu, kvm) {
10336                 kvm_clear_async_pf_completion_queue(vcpu);
10337                 kvm_unload_vcpu_mmu(vcpu);
10338         }
10339         kvm_for_each_vcpu(i, vcpu, kvm)
10340                 kvm_vcpu_destroy(vcpu);
10341
10342         mutex_lock(&kvm->lock);
10343         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
10344                 kvm->vcpus[i] = NULL;
10345
10346         atomic_set(&kvm->online_vcpus, 0);
10347         mutex_unlock(&kvm->lock);
10348 }
10349
10350 void kvm_arch_sync_events(struct kvm *kvm)
10351 {
10352         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
10353         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
10354         kvm_free_pit(kvm);
10355 }
10356
10357 #define  ERR_PTR_USR(e)  ((void __user *)ERR_PTR(e))
10358
10359 /**
10360  * __x86_set_memory_region: Setup KVM internal memory slot
10361  *
10362  * @kvm: the kvm pointer to the VM.
10363  * @id: the slot ID to setup.
10364  * @gpa: the GPA to install the slot (unused when @size == 0).
10365  * @size: the size of the slot. Set to zero to uninstall a slot.
10366  *
10367  * This function helps to setup a KVM internal memory slot.  Specify
10368  * @size > 0 to install a new slot, while @size == 0 to uninstall a
10369  * slot.  The return code can be one of the following:
10370  *
10371  *   HVA:           on success (uninstall will return a bogus HVA)
10372  *   -errno:        on error
10373  *
10374  * The caller should always use IS_ERR() to check the return value
10375  * before use.  Note, the KVM internal memory slots are guaranteed to
10376  * remain valid and unchanged until the VM is destroyed, i.e., the
10377  * GPA->HVA translation will not change.  However, the HVA is a user
10378  * address, i.e. its accessibility is not guaranteed, and must be
10379  * accessed via __copy_{to,from}_user().
10380  */
10381 void __user * __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa,
10382                                       u32 size)
10383 {
10384         int i, r;
10385         unsigned long hva, old_npages;
10386         struct kvm_memslots *slots = kvm_memslots(kvm);
10387         struct kvm_memory_slot *slot;
10388
10389         /* Called with kvm->slots_lock held.  */
10390         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
10391                 return ERR_PTR_USR(-EINVAL);
10392
10393         slot = id_to_memslot(slots, id);
10394         if (size) {
10395                 if (slot && slot->npages)
10396                         return ERR_PTR_USR(-EEXIST);
10397
10398                 /*
10399                  * MAP_SHARED to prevent internal slot pages from being moved
10400                  * by fork()/COW.
10401                  */
10402                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
10403                               MAP_SHARED | MAP_ANONYMOUS, 0);
10404                 if (IS_ERR((void *)hva))
10405                         return (void __user *)hva;
10406         } else {
10407                 if (!slot || !slot->npages)
10408                         return 0;
10409
10410                 old_npages = slot->npages;
10411                 hva = 0;
10412         }
10413
10414         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
10415                 struct kvm_userspace_memory_region m;
10416
10417                 m.slot = id | (i << 16);
10418                 m.flags = 0;
10419                 m.guest_phys_addr = gpa;
10420                 m.userspace_addr = hva;
10421                 m.memory_size = size;
10422                 r = __kvm_set_memory_region(kvm, &m);
10423                 if (r < 0)
10424                         return ERR_PTR_USR(r);
10425         }
10426
10427         if (!size)
10428                 vm_munmap(hva, old_npages * PAGE_SIZE);
10429
10430         return (void __user *)hva;
10431 }
10432 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
10433
10434 void kvm_arch_pre_destroy_vm(struct kvm *kvm)
10435 {
10436         kvm_mmu_pre_destroy_vm(kvm);
10437 }
10438
10439 void kvm_arch_destroy_vm(struct kvm *kvm)
10440 {
10441         u32 i;
10442
10443         if (current->mm == kvm->mm) {
10444                 /*
10445                  * Free memory regions allocated on behalf of userspace,
10446                  * unless the the memory map has changed due to process exit
10447                  * or fd copying.
10448                  */
10449                 mutex_lock(&kvm->slots_lock);
10450                 __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
10451                                         0, 0);
10452                 __x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT,
10453                                         0, 0);
10454                 __x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
10455                 mutex_unlock(&kvm->slots_lock);
10456         }
10457         if (kvm_x86_ops.vm_destroy)
10458                 kvm_x86_ops.vm_destroy(kvm);
10459         for (i = 0; i < kvm->arch.msr_filter.count; i++)
10460                 kfree(kvm->arch.msr_filter.ranges[i].bitmap);
10461         kvm_pic_destroy(kvm);
10462         kvm_ioapic_destroy(kvm);
10463         kvm_free_vcpus(kvm);
10464         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
10465         kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
10466         kvm_mmu_uninit_vm(kvm);
10467         kvm_page_track_cleanup(kvm);
10468         kvm_hv_destroy_vm(kvm);
10469 }
10470
10471 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
10472 {
10473         int i;
10474
10475         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10476                 kvfree(slot->arch.rmap[i]);
10477                 slot->arch.rmap[i] = NULL;
10478
10479                 if (i == 0)
10480                         continue;
10481
10482                 kvfree(slot->arch.lpage_info[i - 1]);
10483                 slot->arch.lpage_info[i - 1] = NULL;
10484         }
10485
10486         kvm_page_track_free_memslot(slot);
10487 }
10488
10489 static int kvm_alloc_memslot_metadata(struct kvm_memory_slot *slot,
10490                                       unsigned long npages)
10491 {
10492         int i;
10493
10494         /*
10495          * Clear out the previous array pointers for the KVM_MR_MOVE case.  The
10496          * old arrays will be freed by __kvm_set_memory_region() if installing
10497          * the new memslot is successful.
10498          */
10499         memset(&slot->arch, 0, sizeof(slot->arch));
10500
10501         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10502                 struct kvm_lpage_info *linfo;
10503                 unsigned long ugfn;
10504                 int lpages;
10505                 int level = i + 1;
10506
10507                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
10508                                       slot->base_gfn, level) + 1;
10509
10510                 slot->arch.rmap[i] =
10511                         kvcalloc(lpages, sizeof(*slot->arch.rmap[i]),
10512                                  GFP_KERNEL_ACCOUNT);
10513                 if (!slot->arch.rmap[i])
10514                         goto out_free;
10515                 if (i == 0)
10516                         continue;
10517
10518                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
10519                 if (!linfo)
10520                         goto out_free;
10521
10522                 slot->arch.lpage_info[i - 1] = linfo;
10523
10524                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
10525                         linfo[0].disallow_lpage = 1;
10526                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
10527                         linfo[lpages - 1].disallow_lpage = 1;
10528                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
10529                 /*
10530                  * If the gfn and userspace address are not aligned wrt each
10531                  * other, disable large page support for this slot.
10532                  */
10533                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1)) {
10534                         unsigned long j;
10535
10536                         for (j = 0; j < lpages; ++j)
10537                                 linfo[j].disallow_lpage = 1;
10538                 }
10539         }
10540
10541         if (kvm_page_track_create_memslot(slot, npages))
10542                 goto out_free;
10543
10544         return 0;
10545
10546 out_free:
10547         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10548                 kvfree(slot->arch.rmap[i]);
10549                 slot->arch.rmap[i] = NULL;
10550                 if (i == 0)
10551                         continue;
10552
10553                 kvfree(slot->arch.lpage_info[i - 1]);
10554                 slot->arch.lpage_info[i - 1] = NULL;
10555         }
10556         return -ENOMEM;
10557 }
10558
10559 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
10560 {
10561         struct kvm_vcpu *vcpu;
10562         int i;
10563
10564         /*
10565          * memslots->generation has been incremented.
10566          * mmio generation may have reached its maximum value.
10567          */
10568         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
10569
10570         /* Force re-initialization of steal_time cache */
10571         kvm_for_each_vcpu(i, vcpu, kvm)
10572                 kvm_vcpu_kick(vcpu);
10573 }
10574
10575 int kvm_arch_prepare_memory_region(struct kvm *kvm,
10576                                 struct kvm_memory_slot *memslot,
10577                                 const struct kvm_userspace_memory_region *mem,
10578                                 enum kvm_mr_change change)
10579 {
10580         if (change == KVM_MR_CREATE || change == KVM_MR_MOVE)
10581                 return kvm_alloc_memslot_metadata(memslot,
10582                                                   mem->memory_size >> PAGE_SHIFT);
10583         return 0;
10584 }
10585
10586 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
10587                                      struct kvm_memory_slot *old,
10588                                      struct kvm_memory_slot *new,
10589                                      enum kvm_mr_change change)
10590 {
10591         /*
10592          * Nothing to do for RO slots or CREATE/MOVE/DELETE of a slot.
10593          * See comments below.
10594          */
10595         if ((change != KVM_MR_FLAGS_ONLY) || (new->flags & KVM_MEM_READONLY))
10596                 return;
10597
10598         /*
10599          * Dirty logging tracks sptes in 4k granularity, meaning that large
10600          * sptes have to be split.  If live migration is successful, the guest
10601          * in the source machine will be destroyed and large sptes will be
10602          * created in the destination. However, if the guest continues to run
10603          * in the source machine (for example if live migration fails), small
10604          * sptes will remain around and cause bad performance.
10605          *
10606          * Scan sptes if dirty logging has been stopped, dropping those
10607          * which can be collapsed into a single large-page spte.  Later
10608          * page faults will create the large-page sptes.
10609          *
10610          * There is no need to do this in any of the following cases:
10611          * CREATE:      No dirty mappings will already exist.
10612          * MOVE/DELETE: The old mappings will already have been cleaned up by
10613          *              kvm_arch_flush_shadow_memslot()
10614          */
10615         if ((old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
10616             !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
10617                 kvm_mmu_zap_collapsible_sptes(kvm, new);
10618
10619         /*
10620          * Enable or disable dirty logging for the slot.
10621          *
10622          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of the old
10623          * slot have been zapped so no dirty logging updates are needed for
10624          * the old slot.
10625          * For KVM_MR_CREATE and KVM_MR_MOVE, once the new slot is visible
10626          * any mappings that might be created in it will consume the
10627          * properties of the new slot and do not need to be updated here.
10628          *
10629          * When PML is enabled, the kvm_x86_ops dirty logging hooks are
10630          * called to enable/disable dirty logging.
10631          *
10632          * When disabling dirty logging with PML enabled, the D-bit is set
10633          * for sptes in the slot in order to prevent unnecessary GPA
10634          * logging in the PML buffer (and potential PML buffer full VMEXIT).
10635          * This guarantees leaving PML enabled for the guest's lifetime
10636          * won't have any additional overhead from PML when the guest is
10637          * running with dirty logging disabled.
10638          *
10639          * When enabling dirty logging, large sptes are write-protected
10640          * so they can be split on first write.  New large sptes cannot
10641          * be created for this slot until the end of the logging.
10642          * See the comments in fast_page_fault().
10643          * For small sptes, nothing is done if the dirty log is in the
10644          * initial-all-set state.  Otherwise, depending on whether pml
10645          * is enabled the D-bit or the W-bit will be cleared.
10646          */
10647         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
10648                 if (kvm_x86_ops.slot_enable_log_dirty) {
10649                         kvm_x86_ops.slot_enable_log_dirty(kvm, new);
10650                 } else {
10651                         int level =
10652                                 kvm_dirty_log_manual_protect_and_init_set(kvm) ?
10653                                 PG_LEVEL_2M : PG_LEVEL_4K;
10654
10655                         /*
10656                          * If we're with initial-all-set, we don't need
10657                          * to write protect any small page because
10658                          * they're reported as dirty already.  However
10659                          * we still need to write-protect huge pages
10660                          * so that the page split can happen lazily on
10661                          * the first write to the huge page.
10662                          */
10663                         kvm_mmu_slot_remove_write_access(kvm, new, level);
10664                 }
10665         } else {
10666                 if (kvm_x86_ops.slot_disable_log_dirty)
10667                         kvm_x86_ops.slot_disable_log_dirty(kvm, new);
10668         }
10669 }
10670
10671 void kvm_arch_commit_memory_region(struct kvm *kvm,
10672                                 const struct kvm_userspace_memory_region *mem,
10673                                 struct kvm_memory_slot *old,
10674                                 const struct kvm_memory_slot *new,
10675                                 enum kvm_mr_change change)
10676 {
10677         if (!kvm->arch.n_requested_mmu_pages)
10678                 kvm_mmu_change_mmu_pages(kvm,
10679                                 kvm_mmu_calculate_default_mmu_pages(kvm));
10680
10681         /*
10682          * FIXME: const-ify all uses of struct kvm_memory_slot.
10683          */
10684         kvm_mmu_slot_apply_flags(kvm, old, (struct kvm_memory_slot *) new, change);
10685
10686         /* Free the arrays associated with the old memslot. */
10687         if (change == KVM_MR_MOVE)
10688                 kvm_arch_free_memslot(kvm, old);
10689 }
10690
10691 void kvm_arch_flush_shadow_all(struct kvm *kvm)
10692 {
10693         kvm_mmu_zap_all(kvm);
10694 }
10695
10696 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
10697                                    struct kvm_memory_slot *slot)
10698 {
10699         kvm_page_track_flush_slot(kvm, slot);
10700 }
10701
10702 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
10703 {
10704         return (is_guest_mode(vcpu) &&
10705                         kvm_x86_ops.guest_apic_has_interrupt &&
10706                         kvm_x86_ops.guest_apic_has_interrupt(vcpu));
10707 }
10708
10709 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
10710 {
10711         if (!list_empty_careful(&vcpu->async_pf.done))
10712                 return true;
10713
10714         if (kvm_apic_has_events(vcpu))
10715                 return true;
10716
10717         if (vcpu->arch.pv.pv_unhalted)
10718                 return true;
10719
10720         if (vcpu->arch.exception.pending)
10721                 return true;
10722
10723         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
10724             (vcpu->arch.nmi_pending &&
10725              kvm_x86_ops.nmi_allowed(vcpu, false)))
10726                 return true;
10727
10728         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
10729             (vcpu->arch.smi_pending &&
10730              kvm_x86_ops.smi_allowed(vcpu, false)))
10731                 return true;
10732
10733         if (kvm_arch_interrupt_allowed(vcpu) &&
10734             (kvm_cpu_has_interrupt(vcpu) ||
10735             kvm_guest_apic_has_interrupt(vcpu)))
10736                 return true;
10737
10738         if (kvm_hv_has_stimer_pending(vcpu))
10739                 return true;
10740
10741         if (is_guest_mode(vcpu) &&
10742             kvm_x86_ops.nested_ops->hv_timer_pending &&
10743             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
10744                 return true;
10745
10746         return false;
10747 }
10748
10749 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
10750 {
10751         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
10752 }
10753
10754 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
10755 {
10756         if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
10757                 return true;
10758
10759         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
10760                 kvm_test_request(KVM_REQ_SMI, vcpu) ||
10761                  kvm_test_request(KVM_REQ_EVENT, vcpu))
10762                 return true;
10763
10764         if (vcpu->arch.apicv_active && kvm_x86_ops.dy_apicv_has_pending_interrupt(vcpu))
10765                 return true;
10766
10767         return false;
10768 }
10769
10770 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
10771 {
10772         return vcpu->arch.preempted_in_kernel;
10773 }
10774
10775 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
10776 {
10777         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
10778 }
10779
10780 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
10781 {
10782         return kvm_x86_ops.interrupt_allowed(vcpu, false);
10783 }
10784
10785 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
10786 {
10787         if (is_64_bit_mode(vcpu))
10788                 return kvm_rip_read(vcpu);
10789         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
10790                      kvm_rip_read(vcpu));
10791 }
10792 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
10793
10794 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
10795 {
10796         return kvm_get_linear_rip(vcpu) == linear_rip;
10797 }
10798 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
10799
10800 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
10801 {
10802         unsigned long rflags;
10803
10804         rflags = kvm_x86_ops.get_rflags(vcpu);
10805         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
10806                 rflags &= ~X86_EFLAGS_TF;
10807         return rflags;
10808 }
10809 EXPORT_SYMBOL_GPL(kvm_get_rflags);
10810
10811 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
10812 {
10813         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
10814             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
10815                 rflags |= X86_EFLAGS_TF;
10816         kvm_x86_ops.set_rflags(vcpu, rflags);
10817 }
10818
10819 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
10820 {
10821         __kvm_set_rflags(vcpu, rflags);
10822         kvm_make_request(KVM_REQ_EVENT, vcpu);
10823 }
10824 EXPORT_SYMBOL_GPL(kvm_set_rflags);
10825
10826 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
10827 {
10828         int r;
10829
10830         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
10831               work->wakeup_all)
10832                 return;
10833
10834         r = kvm_mmu_reload(vcpu);
10835         if (unlikely(r))
10836                 return;
10837
10838         if (!vcpu->arch.mmu->direct_map &&
10839               work->arch.cr3 != vcpu->arch.mmu->get_guest_pgd(vcpu))
10840                 return;
10841
10842         kvm_mmu_do_page_fault(vcpu, work->cr2_or_gpa, 0, true);
10843 }
10844
10845 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
10846 {
10847         BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU));
10848
10849         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
10850 }
10851
10852 static inline u32 kvm_async_pf_next_probe(u32 key)
10853 {
10854         return (key + 1) & (ASYNC_PF_PER_VCPU - 1);
10855 }
10856
10857 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
10858 {
10859         u32 key = kvm_async_pf_hash_fn(gfn);
10860
10861         while (vcpu->arch.apf.gfns[key] != ~0)
10862                 key = kvm_async_pf_next_probe(key);
10863
10864         vcpu->arch.apf.gfns[key] = gfn;
10865 }
10866
10867 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
10868 {
10869         int i;
10870         u32 key = kvm_async_pf_hash_fn(gfn);
10871
10872         for (i = 0; i < ASYNC_PF_PER_VCPU &&
10873                      (vcpu->arch.apf.gfns[key] != gfn &&
10874                       vcpu->arch.apf.gfns[key] != ~0); i++)
10875                 key = kvm_async_pf_next_probe(key);
10876
10877         return key;
10878 }
10879
10880 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
10881 {
10882         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
10883 }
10884
10885 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
10886 {
10887         u32 i, j, k;
10888
10889         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
10890
10891         if (WARN_ON_ONCE(vcpu->arch.apf.gfns[i] != gfn))
10892                 return;
10893
10894         while (true) {
10895                 vcpu->arch.apf.gfns[i] = ~0;
10896                 do {
10897                         j = kvm_async_pf_next_probe(j);
10898                         if (vcpu->arch.apf.gfns[j] == ~0)
10899                                 return;
10900                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
10901                         /*
10902                          * k lies cyclically in ]i,j]
10903                          * |    i.k.j |
10904                          * |....j i.k.| or  |.k..j i...|
10905                          */
10906                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
10907                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
10908                 i = j;
10909         }
10910 }
10911
10912 static inline int apf_put_user_notpresent(struct kvm_vcpu *vcpu)
10913 {
10914         u32 reason = KVM_PV_REASON_PAGE_NOT_PRESENT;
10915
10916         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &reason,
10917                                       sizeof(reason));
10918 }
10919
10920 static inline int apf_put_user_ready(struct kvm_vcpu *vcpu, u32 token)
10921 {
10922         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
10923
10924         return kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
10925                                              &token, offset, sizeof(token));
10926 }
10927
10928 static inline bool apf_pageready_slot_free(struct kvm_vcpu *vcpu)
10929 {
10930         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
10931         u32 val;
10932
10933         if (kvm_read_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
10934                                          &val, offset, sizeof(val)))
10935                 return false;
10936
10937         return !val;
10938 }
10939
10940 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
10941 {
10942         if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
10943                 return false;
10944
10945         if (!kvm_pv_async_pf_enabled(vcpu) ||
10946             (vcpu->arch.apf.send_user_only && kvm_x86_ops.get_cpl(vcpu) == 0))
10947                 return false;
10948
10949         return true;
10950 }
10951
10952 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
10953 {
10954         if (unlikely(!lapic_in_kernel(vcpu) ||
10955                      kvm_event_needs_reinjection(vcpu) ||
10956                      vcpu->arch.exception.pending))
10957                 return false;
10958
10959         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
10960                 return false;
10961
10962         /*
10963          * If interrupts are off we cannot even use an artificial
10964          * halt state.
10965          */
10966         return kvm_arch_interrupt_allowed(vcpu);
10967 }
10968
10969 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
10970                                      struct kvm_async_pf *work)
10971 {
10972         struct x86_exception fault;
10973
10974         trace_kvm_async_pf_not_present(work->arch.token, work->cr2_or_gpa);
10975         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
10976
10977         if (kvm_can_deliver_async_pf(vcpu) &&
10978             !apf_put_user_notpresent(vcpu)) {
10979                 fault.vector = PF_VECTOR;
10980                 fault.error_code_valid = true;
10981                 fault.error_code = 0;
10982                 fault.nested_page_fault = false;
10983                 fault.address = work->arch.token;
10984                 fault.async_page_fault = true;
10985                 kvm_inject_page_fault(vcpu, &fault);
10986                 return true;
10987         } else {
10988                 /*
10989                  * It is not possible to deliver a paravirtualized asynchronous
10990                  * page fault, but putting the guest in an artificial halt state
10991                  * can be beneficial nevertheless: if an interrupt arrives, we
10992                  * can deliver it timely and perhaps the guest will schedule
10993                  * another process.  When the instruction that triggered a page
10994                  * fault is retried, hopefully the page will be ready in the host.
10995                  */
10996                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
10997                 return false;
10998         }
10999 }
11000
11001 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
11002                                  struct kvm_async_pf *work)
11003 {
11004         struct kvm_lapic_irq irq = {
11005                 .delivery_mode = APIC_DM_FIXED,
11006                 .vector = vcpu->arch.apf.vec
11007         };
11008
11009         if (work->wakeup_all)
11010                 work->arch.token = ~0; /* broadcast wakeup */
11011         else
11012                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
11013         trace_kvm_async_pf_ready(work->arch.token, work->cr2_or_gpa);
11014
11015         if ((work->wakeup_all || work->notpresent_injected) &&
11016             kvm_pv_async_pf_enabled(vcpu) &&
11017             !apf_put_user_ready(vcpu, work->arch.token)) {
11018                 vcpu->arch.apf.pageready_pending = true;
11019                 kvm_apic_set_irq(vcpu, &irq, NULL);
11020         }
11021
11022         vcpu->arch.apf.halted = false;
11023         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
11024 }
11025
11026 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu)
11027 {
11028         kvm_make_request(KVM_REQ_APF_READY, vcpu);
11029         if (!vcpu->arch.apf.pageready_pending)
11030                 kvm_vcpu_kick(vcpu);
11031 }
11032
11033 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu)
11034 {
11035         if (!kvm_pv_async_pf_enabled(vcpu))
11036                 return true;
11037         else
11038                 return apf_pageready_slot_free(vcpu);
11039 }
11040
11041 void kvm_arch_start_assignment(struct kvm *kvm)
11042 {
11043         atomic_inc(&kvm->arch.assigned_device_count);
11044 }
11045 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
11046
11047 void kvm_arch_end_assignment(struct kvm *kvm)
11048 {
11049         atomic_dec(&kvm->arch.assigned_device_count);
11050 }
11051 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
11052
11053 bool kvm_arch_has_assigned_device(struct kvm *kvm)
11054 {
11055         return atomic_read(&kvm->arch.assigned_device_count);
11056 }
11057 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
11058
11059 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
11060 {
11061         atomic_inc(&kvm->arch.noncoherent_dma_count);
11062 }
11063 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
11064
11065 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
11066 {
11067         atomic_dec(&kvm->arch.noncoherent_dma_count);
11068 }
11069 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
11070
11071 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
11072 {
11073         return atomic_read(&kvm->arch.noncoherent_dma_count);
11074 }
11075 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
11076
11077 bool kvm_arch_has_irq_bypass(void)
11078 {
11079         return true;
11080 }
11081
11082 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
11083                                       struct irq_bypass_producer *prod)
11084 {
11085         struct kvm_kernel_irqfd *irqfd =
11086                 container_of(cons, struct kvm_kernel_irqfd, consumer);
11087         int ret;
11088
11089         irqfd->producer = prod;
11090         kvm_arch_start_assignment(irqfd->kvm);
11091         ret = kvm_x86_ops.update_pi_irte(irqfd->kvm,
11092                                          prod->irq, irqfd->gsi, 1);
11093
11094         if (ret)
11095                 kvm_arch_end_assignment(irqfd->kvm);
11096
11097         return ret;
11098 }
11099
11100 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
11101                                       struct irq_bypass_producer *prod)
11102 {
11103         int ret;
11104         struct kvm_kernel_irqfd *irqfd =
11105                 container_of(cons, struct kvm_kernel_irqfd, consumer);
11106
11107         WARN_ON(irqfd->producer != prod);
11108         irqfd->producer = NULL;
11109
11110         /*
11111          * When producer of consumer is unregistered, we change back to
11112          * remapped mode, so we can re-use the current implementation
11113          * when the irq is masked/disabled or the consumer side (KVM
11114          * int this case doesn't want to receive the interrupts.
11115         */
11116         ret = kvm_x86_ops.update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
11117         if (ret)
11118                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
11119                        " fails: %d\n", irqfd->consumer.token, ret);
11120
11121         kvm_arch_end_assignment(irqfd->kvm);
11122 }
11123
11124 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
11125                                    uint32_t guest_irq, bool set)
11126 {
11127         return kvm_x86_ops.update_pi_irte(kvm, host_irq, guest_irq, set);
11128 }
11129
11130 bool kvm_vector_hashing_enabled(void)
11131 {
11132         return vector_hashing;
11133 }
11134
11135 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
11136 {
11137         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
11138 }
11139 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
11140
11141
11142 int kvm_spec_ctrl_test_value(u64 value)
11143 {
11144         /*
11145          * test that setting IA32_SPEC_CTRL to given value
11146          * is allowed by the host processor
11147          */
11148
11149         u64 saved_value;
11150         unsigned long flags;
11151         int ret = 0;
11152
11153         local_irq_save(flags);
11154
11155         if (rdmsrl_safe(MSR_IA32_SPEC_CTRL, &saved_value))
11156                 ret = 1;
11157         else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL, value))
11158                 ret = 1;
11159         else
11160                 wrmsrl(MSR_IA32_SPEC_CTRL, saved_value);
11161
11162         local_irq_restore(flags);
11163
11164         return ret;
11165 }
11166 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value);
11167
11168 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code)
11169 {
11170         struct x86_exception fault;
11171         u32 access = error_code &
11172                 (PFERR_WRITE_MASK | PFERR_FETCH_MASK | PFERR_USER_MASK);
11173
11174         if (!(error_code & PFERR_PRESENT_MASK) ||
11175             vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, &fault) != UNMAPPED_GVA) {
11176                 /*
11177                  * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
11178                  * tables probably do not match the TLB.  Just proceed
11179                  * with the error code that the processor gave.
11180                  */
11181                 fault.vector = PF_VECTOR;
11182                 fault.error_code_valid = true;
11183                 fault.error_code = error_code;
11184                 fault.nested_page_fault = false;
11185                 fault.address = gva;
11186         }
11187         vcpu->arch.walk_mmu->inject_page_fault(vcpu, &fault);
11188 }
11189 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error);
11190
11191 /*
11192  * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
11193  * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
11194  * indicates whether exit to userspace is needed.
11195  */
11196 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
11197                               struct x86_exception *e)
11198 {
11199         if (r == X86EMUL_PROPAGATE_FAULT) {
11200                 kvm_inject_emulated_page_fault(vcpu, e);
11201                 return 1;
11202         }
11203
11204         /*
11205          * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
11206          * while handling a VMX instruction KVM could've handled the request
11207          * correctly by exiting to userspace and performing I/O but there
11208          * doesn't seem to be a real use-case behind such requests, just return
11209          * KVM_EXIT_INTERNAL_ERROR for now.
11210          */
11211         vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
11212         vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
11213         vcpu->run->internal.ndata = 0;
11214
11215         return 0;
11216 }
11217 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure);
11218
11219 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva)
11220 {
11221         bool pcid_enabled;
11222         struct x86_exception e;
11223         unsigned i;
11224         unsigned long roots_to_free = 0;
11225         struct {
11226                 u64 pcid;
11227                 u64 gla;
11228         } operand;
11229         int r;
11230
11231         r = kvm_read_guest_virt(vcpu, gva, &operand, sizeof(operand), &e);
11232         if (r != X86EMUL_CONTINUE)
11233                 return kvm_handle_memory_failure(vcpu, r, &e);
11234
11235         if (operand.pcid >> 12 != 0) {
11236                 kvm_inject_gp(vcpu, 0);
11237                 return 1;
11238         }
11239
11240         pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
11241
11242         switch (type) {
11243         case INVPCID_TYPE_INDIV_ADDR:
11244                 if ((!pcid_enabled && (operand.pcid != 0)) ||
11245                     is_noncanonical_address(operand.gla, vcpu)) {
11246                         kvm_inject_gp(vcpu, 0);
11247                         return 1;
11248                 }
11249                 kvm_mmu_invpcid_gva(vcpu, operand.gla, operand.pcid);
11250                 return kvm_skip_emulated_instruction(vcpu);
11251
11252         case INVPCID_TYPE_SINGLE_CTXT:
11253                 if (!pcid_enabled && (operand.pcid != 0)) {
11254                         kvm_inject_gp(vcpu, 0);
11255                         return 1;
11256                 }
11257
11258                 if (kvm_get_active_pcid(vcpu) == operand.pcid) {
11259                         kvm_mmu_sync_roots(vcpu);
11260                         kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
11261                 }
11262
11263                 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
11264                         if (kvm_get_pcid(vcpu, vcpu->arch.mmu->prev_roots[i].pgd)
11265                             == operand.pcid)
11266                                 roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
11267
11268                 kvm_mmu_free_roots(vcpu, vcpu->arch.mmu, roots_to_free);
11269                 /*
11270                  * If neither the current cr3 nor any of the prev_roots use the
11271                  * given PCID, then nothing needs to be done here because a
11272                  * resync will happen anyway before switching to any other CR3.
11273                  */
11274
11275                 return kvm_skip_emulated_instruction(vcpu);
11276
11277         case INVPCID_TYPE_ALL_NON_GLOBAL:
11278                 /*
11279                  * Currently, KVM doesn't mark global entries in the shadow
11280                  * page tables, so a non-global flush just degenerates to a
11281                  * global flush. If needed, we could optimize this later by
11282                  * keeping track of global entries in shadow page tables.
11283                  */
11284
11285                 fallthrough;
11286         case INVPCID_TYPE_ALL_INCL_GLOBAL:
11287                 kvm_mmu_unload(vcpu);
11288                 return kvm_skip_emulated_instruction(vcpu);
11289
11290         default:
11291                 BUG(); /* We have already checked above that type <= 3 */
11292         }
11293 }
11294 EXPORT_SYMBOL_GPL(kvm_handle_invpcid);
11295
11296 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
11297 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
11298 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
11299 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
11300 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
11301 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
11302 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
11303 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
11304 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
11305 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
11306 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
11307 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
11308 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
11309 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
11310 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
11311 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
11312 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
11313 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
11314 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
11315 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);
11316 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log);
11317 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request);