arch/x86/kvm/x86.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * derived from drivers/kvm/kvm_main.c
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  * Copyright (C) 2008 Qumranet, Inc.
   9  * Copyright IBM Corporation, 2008
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *   Yaniv Kamay  <yaniv@qumranet.com>
  15  *   Amit Shah    <amit.shah@qumranet.com>
  16  *   Ben-Ami Yassour <benami@il.ibm.com>
  17  */
  18
  19 #include <linux/kvm_host.h>
  20 #include "irq.h"
  21 #include "ioapic.h"
  22 #include "mmu.h"
  23 #include "i8254.h"
  24 #include "tss.h"
  25 #include "kvm_cache_regs.h"
  26 #include "kvm_emulate.h"
  27 #include "x86.h"
  28 #include "cpuid.h"
  29 #include "pmu.h"
  30 #include "hyperv.h"
  31 #include "lapic.h"
  32
  33 #include <linux/clocksource.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/kvm.h>
  36 #include <linux/fs.h>
  37 #include <linux/vmalloc.h>
  38 #include <linux/export.h>
  39 #include <linux/moduleparam.h>
  40 #include <linux/mman.h>
  41 #include <linux/highmem.h>
  42 #include <linux/iommu.h>
  43 #include <linux/intel-iommu.h>
  44 #include <linux/cpufreq.h>
  45 #include <linux/user-return-notifier.h>
  46 #include <linux/srcu.h>
  47 #include <linux/slab.h>
  48 #include <linux/perf_event.h>
  49 #include <linux/uaccess.h>
  50 #include <linux/hash.h>
  51 #include <linux/pci.h>
  52 #include <linux/timekeeper_internal.h>
  53 #include <linux/pvclock_gtod.h>
  54 #include <linux/kvm_irqfd.h>
  55 #include <linux/irqbypass.h>
  56 #include <linux/sched/stat.h>
  57 #include <linux/sched/isolation.h>
  58 #include <linux/mem_encrypt.h>
  59 #include <linux/entry-kvm.h>
  60
  61 #include <trace/events/kvm.h>
  62
  63 #include <asm/debugreg.h>
  64 #include <asm/msr.h>
  65 #include <asm/desc.h>
  66 #include <asm/mce.h>
  67 #include <linux/kernel_stat.h>
  68 #include <asm/fpu/internal.h> /* Ugh! */
  69 #include <asm/pvclock.h>
  70 #include <asm/div64.h>
  71 #include <asm/irq_remapping.h>
  72 #include <asm/mshyperv.h>
  73 #include <asm/hypervisor.h>
  74 #include <asm/tlbflush.h>
  75 #include <asm/intel_pt.h>
  76 #include <asm/emulate_prefix.h>
  77 #include <clocksource/hyperv_timer.h>
  78
  79 #define CREATE_TRACE_POINTS
  80 #include "trace.h"
  81
  82 #define MAX_IO_MSRS 256
  83 #define KVM_MAX_MCE_BANKS 32
  84 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  85 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  86
  87 #define emul_to_vcpu(ctxt) \
  88         ((struct kvm_vcpu *)(ctxt)->vcpu)
  89
  90 /* EFER defaults:
  91  * - enable syscall per default because its emulated by KVM
  92  * - enable LME and LMA per default on 64 bit KVM
  93  */
  94 #ifdef CONFIG_X86_64
  95 static
  96 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  97 #else
  98 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  99 #endif
 100
 101 static u64 __read_mostly cr4_reserved_bits = CR4_RESERVED_BITS;
 102
 103 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
 104                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 105
 106 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 107 static void process_nmi(struct kvm_vcpu *vcpu);
 108 static void enter_smm(struct kvm_vcpu *vcpu);
 109 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 110 static void store_regs(struct kvm_vcpu *vcpu);
 111 static int sync_regs(struct kvm_vcpu *vcpu);
 112
 113 struct kvm_x86_ops kvm_x86_ops __read_mostly;
 114 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 115
 116 static bool __read_mostly ignore_msrs = 0;
 117 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 118
 119 static bool __read_mostly report_ignored_msrs = true;
 120 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 121
 122 unsigned int min_timer_period_us = 200;
 123 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 124
 125 static bool __read_mostly kvmclock_periodic_sync = true;
 126 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 127
 128 bool __read_mostly kvm_has_tsc_control;
 129 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 130 u32  __read_mostly kvm_max_guest_tsc_khz;
 131 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 132 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 133 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 134 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 135 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 136 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 137 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 138
 139 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 140 static u32 __read_mostly tsc_tolerance_ppm = 250;
 141 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 142
 143 /*
 144  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 145  * adaptive tuning starting from default advancment of 1000ns.  '0' disables
 146  * advancement entirely.  Any other value is used as-is and disables adaptive
 147  * tuning, i.e. allows priveleged userspace to set an exact advancement time.
 148  */
 149 static int __read_mostly lapic_timer_advance_ns = -1;
 150 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 151
 152 static bool __read_mostly vector_hashing = true;
 153 module_param(vector_hashing, bool, S_IRUGO);
 154
 155 bool __read_mostly enable_vmware_backdoor = false;
 156 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 157 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 158
 159 static bool __read_mostly force_emulation_prefix = false;
 160 module_param(force_emulation_prefix, bool, S_IRUGO);
 161
 162 int __read_mostly pi_inject_timer = -1;
 163 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
 164
 165 /*
 166  * Restoring the host value for MSRs that are only consumed when running in
 167  * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
 168  * returns to userspace, i.e. the kernel can run with the guest's value.
 169  */
 170 #define KVM_MAX_NR_USER_RETURN_MSRS 16
 171
 172 struct kvm_user_return_msrs_global {
 173         int nr;
 174         u32 msrs[KVM_MAX_NR_USER_RETURN_MSRS];
 175 };
 176
 177 struct kvm_user_return_msrs {
 178         struct user_return_notifier urn;
 179         bool registered;
 180         struct kvm_user_return_msr_values {
 181                 u64 host;
 182                 u64 curr;
 183         } values[KVM_MAX_NR_USER_RETURN_MSRS];
 184 };
 185
 186 static struct kvm_user_return_msrs_global __read_mostly user_return_msrs_global;
 187 static struct kvm_user_return_msrs __percpu *user_return_msrs;
 188
 189 #define KVM_SUPPORTED_XCR0     (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
 190                                 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
 191                                 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
 192                                 | XFEATURE_MASK_PKRU)
 193
 194 u64 __read_mostly host_efer;
 195 EXPORT_SYMBOL_GPL(host_efer);
 196
 197 bool __read_mostly allow_smaller_maxphyaddr = 0;
 198 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr);
 199
 200 static u64 __read_mostly host_xss;
 201 u64 __read_mostly supported_xss;
 202 EXPORT_SYMBOL_GPL(supported_xss);
 203
 204 struct kvm_stats_debugfs_item debugfs_entries[] = {
 205         VCPU_STAT("pf_fixed", pf_fixed),
 206         VCPU_STAT("pf_guest", pf_guest),
 207         VCPU_STAT("tlb_flush", tlb_flush),
 208         VCPU_STAT("invlpg", invlpg),
 209         VCPU_STAT("exits", exits),
 210         VCPU_STAT("io_exits", io_exits),
 211         VCPU_STAT("mmio_exits", mmio_exits),
 212         VCPU_STAT("signal_exits", signal_exits),
 213         VCPU_STAT("irq_window", irq_window_exits),
 214         VCPU_STAT("nmi_window", nmi_window_exits),
 215         VCPU_STAT("halt_exits", halt_exits),
 216         VCPU_STAT("halt_successful_poll", halt_successful_poll),
 217         VCPU_STAT("halt_attempted_poll", halt_attempted_poll),
 218         VCPU_STAT("halt_poll_invalid", halt_poll_invalid),
 219         VCPU_STAT("halt_wakeup", halt_wakeup),
 220         VCPU_STAT("hypercalls", hypercalls),
 221         VCPU_STAT("request_irq", request_irq_exits),
 222         VCPU_STAT("irq_exits", irq_exits),
 223         VCPU_STAT("host_state_reload", host_state_reload),
 224         VCPU_STAT("fpu_reload", fpu_reload),
 225         VCPU_STAT("insn_emulation", insn_emulation),
 226         VCPU_STAT("insn_emulation_fail", insn_emulation_fail),
 227         VCPU_STAT("irq_injections", irq_injections),
 228         VCPU_STAT("nmi_injections", nmi_injections),
 229         VCPU_STAT("req_event", req_event),
 230         VCPU_STAT("l1d_flush", l1d_flush),
 231         VCPU_STAT("halt_poll_success_ns", halt_poll_success_ns),
 232         VCPU_STAT("halt_poll_fail_ns", halt_poll_fail_ns),
 233         VM_STAT("mmu_shadow_zapped", mmu_shadow_zapped),
 234         VM_STAT("mmu_pte_write", mmu_pte_write),
 235         VM_STAT("mmu_pte_updated", mmu_pte_updated),
 236         VM_STAT("mmu_pde_zapped", mmu_pde_zapped),
 237         VM_STAT("mmu_flooded", mmu_flooded),
 238         VM_STAT("mmu_recycled", mmu_recycled),
 239         VM_STAT("mmu_cache_miss", mmu_cache_miss),
 240         VM_STAT("mmu_unsync", mmu_unsync),
 241         VM_STAT("remote_tlb_flush", remote_tlb_flush),
 242         VM_STAT("largepages", lpages, .mode = 0444),
 243         VM_STAT("nx_largepages_splitted", nx_lpage_splits, .mode = 0444),
 244         VM_STAT("max_mmu_page_hash_collisions", max_mmu_page_hash_collisions),
 245         { NULL }
 246 };
 247
 248 u64 __read_mostly host_xcr0;
 249 u64 __read_mostly supported_xcr0;
 250 EXPORT_SYMBOL_GPL(supported_xcr0);
 251
 252 static struct kmem_cache *x86_fpu_cache;
 253
 254 static struct kmem_cache *x86_emulator_cache;
 255
 256 /*
 257  * When called, it means the previous get/set msr reached an invalid msr.
 258  * Return true if we want to ignore/silent this failed msr access.
 259  */
 260 static bool kvm_msr_ignored_check(struct kvm_vcpu *vcpu, u32 msr,
 261                                   u64 data, bool write)
 262 {
 263         const char *op = write ? "wrmsr" : "rdmsr";
 264
 265         if (ignore_msrs) {
 266                 if (report_ignored_msrs)
 267                         kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
 268                                       op, msr, data);
 269                 /* Mask the error */
 270                 return true;
 271         } else {
 272                 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
 273                                       op, msr, data);
 274                 return false;
 275         }
 276 }
 277
 278 static struct kmem_cache *kvm_alloc_emulator_cache(void)
 279 {
 280         unsigned int useroffset = offsetof(struct x86_emulate_ctxt, src);
 281         unsigned int size = sizeof(struct x86_emulate_ctxt);
 282
 283         return kmem_cache_create_usercopy("x86_emulator", size,
 284                                           __alignof__(struct x86_emulate_ctxt),
 285                                           SLAB_ACCOUNT, useroffset,
 286                                           size - useroffset, NULL);
 287 }
 288
 289 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 290
 291 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 292 {
 293         int i;
 294         for (i = 0; i < ASYNC_PF_PER_VCPU; i++)
 295                 vcpu->arch.apf.gfns[i] = ~0;
 296 }
 297
 298 static void kvm_on_user_return(struct user_return_notifier *urn)
 299 {
 300         unsigned slot;
 301         struct kvm_user_return_msrs *msrs
 302                 = container_of(urn, struct kvm_user_return_msrs, urn);
 303         struct kvm_user_return_msr_values *values;
 304         unsigned long flags;
 305
 306         /*
 307          * Disabling irqs at this point since the following code could be
 308          * interrupted and executed through kvm_arch_hardware_disable()
 309          */
 310         local_irq_save(flags);
 311         if (msrs->registered) {
 312                 msrs->registered = false;
 313                 user_return_notifier_unregister(urn);
 314         }
 315         local_irq_restore(flags);
 316         for (slot = 0; slot < user_return_msrs_global.nr; ++slot) {
 317                 values = &msrs->values[slot];
 318                 if (values->host != values->curr) {
 319                         wrmsrl(user_return_msrs_global.msrs[slot], values->host);
 320                         values->curr = values->host;
 321                 }
 322         }
 323 }
 324
 325 void kvm_define_user_return_msr(unsigned slot, u32 msr)
 326 {
 327         BUG_ON(slot >= KVM_MAX_NR_USER_RETURN_MSRS);
 328         user_return_msrs_global.msrs[slot] = msr;
 329         if (slot >= user_return_msrs_global.nr)
 330                 user_return_msrs_global.nr = slot + 1;
 331 }
 332 EXPORT_SYMBOL_GPL(kvm_define_user_return_msr);
 333
 334 static void kvm_user_return_msr_cpu_online(void)
 335 {
 336         unsigned int cpu = smp_processor_id();
 337         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 338         u64 value;
 339         int i;
 340
 341         for (i = 0; i < user_return_msrs_global.nr; ++i) {
 342                 rdmsrl_safe(user_return_msrs_global.msrs[i], &value);
 343                 msrs->values[i].host = value;
 344                 msrs->values[i].curr = value;
 345         }
 346 }
 347
 348 int kvm_set_user_return_msr(unsigned slot, u64 value, u64 mask)
 349 {
 350         unsigned int cpu = smp_processor_id();
 351         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 352         int err;
 353
 354         value = (value & mask) | (msrs->values[slot].host & ~mask);
 355         if (value == msrs->values[slot].curr)
 356                 return 0;
 357         err = wrmsrl_safe(user_return_msrs_global.msrs[slot], value);
 358         if (err)
 359                 return 1;
 360
 361         msrs->values[slot].curr = value;
 362         if (!msrs->registered) {
 363                 msrs->urn.on_user_return = kvm_on_user_return;
 364                 user_return_notifier_register(&msrs->urn);
 365                 msrs->registered = true;
 366         }
 367         return 0;
 368 }
 369 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr);
 370
 371 static void drop_user_return_notifiers(void)
 372 {
 373         unsigned int cpu = smp_processor_id();
 374         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 375
 376         if (msrs->registered)
 377                 kvm_on_user_return(&msrs->urn);
 378 }
 379
 380 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 381 {
 382         return vcpu->arch.apic_base;
 383 }
 384 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 385
 386 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 387 {
 388         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 389 }
 390 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 391
 392 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 393 {
 394         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 395         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 396         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) | 0x2ff |
 397                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 398
 399         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 400                 return 1;
 401         if (!msr_info->host_initiated) {
 402                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 403                         return 1;
 404                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 405                         return 1;
 406         }
 407
 408         kvm_lapic_set_base(vcpu, msr_info->data);
 409         kvm_recalculate_apic_map(vcpu->kvm);
 410         return 0;
 411 }
 412 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 413
 414 asmlinkage __visible noinstr void kvm_spurious_fault(void)
 415 {
 416         /* Fault while not rebooting.  We want the trace. */
 417         BUG_ON(!kvm_rebooting);
 418 }
 419 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 420
 421 #define EXCPT_BENIGN            0
 422 #define EXCPT_CONTRIBUTORY      1
 423 #define EXCPT_PF                2
 424
 425 static int exception_class(int vector)
 426 {
 427         switch (vector) {
 428         case PF_VECTOR:
 429                 return EXCPT_PF;
 430         case DE_VECTOR:
 431         case TS_VECTOR:
 432         case NP_VECTOR:
 433         case SS_VECTOR:
 434         case GP_VECTOR:
 435                 return EXCPT_CONTRIBUTORY;
 436         default:
 437                 break;
 438         }
 439         return EXCPT_BENIGN;
 440 }
 441
 442 #define EXCPT_FAULT             0
 443 #define EXCPT_TRAP              1
 444 #define EXCPT_ABORT             2
 445 #define EXCPT_INTERRUPT         3
 446
 447 static int exception_type(int vector)
 448 {
 449         unsigned int mask;
 450
 451         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 452                 return EXCPT_INTERRUPT;
 453
 454         mask = 1 << vector;
 455
 456         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 457         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 458                 return EXCPT_TRAP;
 459
 460         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 461                 return EXCPT_ABORT;
 462
 463         /* Reserved exceptions will result in fault */
 464         return EXCPT_FAULT;
 465 }
 466
 467 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 468 {
 469         unsigned nr = vcpu->arch.exception.nr;
 470         bool has_payload = vcpu->arch.exception.has_payload;
 471         unsigned long payload = vcpu->arch.exception.payload;
 472
 473         if (!has_payload)
 474                 return;
 475
 476         switch (nr) {
 477         case DB_VECTOR:
 478                 /*
 479                  * "Certain debug exceptions may clear bit 0-3.  The
 480                  * remaining contents of the DR6 register are never
 481                  * cleared by the processor".
 482                  */
 483                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 484                 /*
 485                  * DR6.RTM is set by all #DB exceptions that don't clear it.
 486                  */
 487                 vcpu->arch.dr6 |= DR6_RTM;
 488                 vcpu->arch.dr6 |= payload;
 489                 /*
 490                  * Bit 16 should be set in the payload whenever the #DB
 491                  * exception should clear DR6.RTM. This makes the payload
 492                  * compatible with the pending debug exceptions under VMX.
 493                  * Though not currently documented in the SDM, this also
 494                  * makes the payload compatible with the exit qualification
 495                  * for #DB exceptions under VMX.
 496                  */
 497                 vcpu->arch.dr6 ^= payload & DR6_RTM;
 498
 499                 /*
 500                  * The #DB payload is defined as compatible with the 'pending
 501                  * debug exceptions' field under VMX, not DR6. While bit 12 is
 502                  * defined in the 'pending debug exceptions' field (enabled
 503                  * breakpoint), it is reserved and must be zero in DR6.
 504                  */
 505                 vcpu->arch.dr6 &= ~BIT(12);
 506                 break;
 507         case PF_VECTOR:
 508                 vcpu->arch.cr2 = payload;
 509                 break;
 510         }
 511
 512         vcpu->arch.exception.has_payload = false;
 513         vcpu->arch.exception.payload = 0;
 514 }
 515 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 516
 517 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 518                 unsigned nr, bool has_error, u32 error_code,
 519                 bool has_payload, unsigned long payload, bool reinject)
 520 {
 521         u32 prev_nr;
 522         int class1, class2;
 523
 524         kvm_make_request(KVM_REQ_EVENT, vcpu);
 525
 526         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 527         queue:
 528                 if (has_error && !is_protmode(vcpu))
 529                         has_error = false;
 530                 if (reinject) {
 531                         /*
 532                          * On vmentry, vcpu->arch.exception.pending is only
 533                          * true if an event injection was blocked by
 534                          * nested_run_pending.  In that case, however,
 535                          * vcpu_enter_guest requests an immediate exit,
 536                          * and the guest shouldn't proceed far enough to
 537                          * need reinjection.
 538                          */
 539                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 540                         vcpu->arch.exception.injected = true;
 541                         if (WARN_ON_ONCE(has_payload)) {
 542                                 /*
 543                                  * A reinjected event has already
 544                                  * delivered its payload.
 545                                  */
 546                                 has_payload = false;
 547                                 payload = 0;
 548                         }
 549                 } else {
 550                         vcpu->arch.exception.pending = true;
 551                         vcpu->arch.exception.injected = false;
 552                 }
 553                 vcpu->arch.exception.has_error_code = has_error;
 554                 vcpu->arch.exception.nr = nr;
 555                 vcpu->arch.exception.error_code = error_code;
 556                 vcpu->arch.exception.has_payload = has_payload;
 557                 vcpu->arch.exception.payload = payload;
 558                 if (!is_guest_mode(vcpu))
 559                         kvm_deliver_exception_payload(vcpu);
 560                 return;
 561         }
 562
 563         /* to check exception */
 564         prev_nr = vcpu->arch.exception.nr;
 565         if (prev_nr == DF_VECTOR) {
 566                 /* triple fault -> shutdown */
 567                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 568                 return;
 569         }
 570         class1 = exception_class(prev_nr);
 571         class2 = exception_class(nr);
 572         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 573                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 574                 /*
 575                  * Generate double fault per SDM Table 5-5.  Set
 576                  * exception.pending = true so that the double fault
 577                  * can trigger a nested vmexit.
 578                  */
 579                 vcpu->arch.exception.pending = true;
 580                 vcpu->arch.exception.injected = false;
 581                 vcpu->arch.exception.has_error_code = true;
 582                 vcpu->arch.exception.nr = DF_VECTOR;
 583                 vcpu->arch.exception.error_code = 0;
 584                 vcpu->arch.exception.has_payload = false;
 585                 vcpu->arch.exception.payload = 0;
 586         } else
 587                 /* replace previous exception with a new one in a hope
 588                    that instruction re-execution will regenerate lost
 589                    exception */
 590                 goto queue;
 591 }
 592
 593 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 594 {
 595         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 596 }
 597 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 598
 599 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 600 {
 601         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 602 }
 603 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 604
 605 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 606                            unsigned long payload)
 607 {
 608         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 609 }
 610 EXPORT_SYMBOL_GPL(kvm_queue_exception_p);
 611
 612 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 613                                     u32 error_code, unsigned long payload)
 614 {
 615         kvm_multiple_exception(vcpu, nr, true, error_code,
 616                                true, payload, false);
 617 }
 618
 619 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 620 {
 621         if (err)
 622                 kvm_inject_gp(vcpu, 0);
 623         else
 624                 return kvm_skip_emulated_instruction(vcpu);
 625
 626         return 1;
 627 }
 628 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 629
 630 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 631 {
 632         ++vcpu->stat.pf_guest;
 633         vcpu->arch.exception.nested_apf =
 634                 is_guest_mode(vcpu) && fault->async_page_fault;
 635         if (vcpu->arch.exception.nested_apf) {
 636                 vcpu->arch.apf.nested_apf_token = fault->address;
 637                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 638         } else {
 639                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 640                                         fault->address);
 641         }
 642 }
 643 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 644
 645 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
 646                                     struct x86_exception *fault)
 647 {
 648         struct kvm_mmu *fault_mmu;
 649         WARN_ON_ONCE(fault->vector != PF_VECTOR);
 650
 651         fault_mmu = fault->nested_page_fault ? vcpu->arch.mmu :
 652                                                vcpu->arch.walk_mmu;
 653
 654         /*
 655          * Invalidate the TLB entry for the faulting address, if it exists,
 656          * else the access will fault indefinitely (and to emulate hardware).
 657          */
 658         if ((fault->error_code & PFERR_PRESENT_MASK) &&
 659             !(fault->error_code & PFERR_RSVD_MASK))
 660                 kvm_mmu_invalidate_gva(vcpu, fault_mmu, fault->address,
 661                                        fault_mmu->root_hpa);
 662
 663         fault_mmu->inject_page_fault(vcpu, fault);
 664         return fault->nested_page_fault;
 665 }
 666 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault);
 667
 668 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 669 {
 670         atomic_inc(&vcpu->arch.nmi_queued);
 671         kvm_make_request(KVM_REQ_NMI, vcpu);
 672 }
 673 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 674
 675 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 676 {
 677         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 678 }
 679 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 680
 681 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 682 {
 683         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 684 }
 685 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 686
 687 /*
 688  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 689  * a #GP and return false.
 690  */
 691 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 692 {
 693         if (kvm_x86_ops.get_cpl(vcpu) <= required_cpl)
 694                 return true;
 695         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 696         return false;
 697 }
 698 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 699
 700 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 701 {
 702         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 703                 return true;
 704
 705         kvm_queue_exception(vcpu, UD_VECTOR);
 706         return false;
 707 }
 708 EXPORT_SYMBOL_GPL(kvm_require_dr);
 709
 710 /*
 711  * This function will be used to read from the physical memory of the currently
 712  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 713  * can read from guest physical or from the guest's guest physical memory.
 714  */
 715 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 716                             gfn_t ngfn, void *data, int offset, int len,
 717                             u32 access)
 718 {
 719         struct x86_exception exception;
 720         gfn_t real_gfn;
 721         gpa_t ngpa;
 722
 723         ngpa     = gfn_to_gpa(ngfn);
 724         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 725         if (real_gfn == UNMAPPED_GVA)
 726                 return -EFAULT;
 727
 728         real_gfn = gpa_to_gfn(real_gfn);
 729
 730         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 731 }
 732 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 733
 734 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 735                                void *data, int offset, int len, u32 access)
 736 {
 737         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 738                                        data, offset, len, access);
 739 }
 740
 741 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
 742 {
 743         return rsvd_bits(cpuid_maxphyaddr(vcpu), 63) | rsvd_bits(5, 8) |
 744                rsvd_bits(1, 2);
 745 }
 746
 747 /*
 748  * Load the pae pdptrs.  Return 1 if they are all valid, 0 otherwise.
 749  */
 750 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 751 {
 752         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 753         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 754         int i;
 755         int ret;
 756         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 757
 758         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 759                                       offset * sizeof(u64), sizeof(pdpte),
 760                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 761         if (ret < 0) {
 762                 ret = 0;
 763                 goto out;
 764         }
 765         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 766                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 767                     (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
 768                         ret = 0;
 769                         goto out;
 770                 }
 771         }
 772         ret = 1;
 773
 774         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 775         kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
 776
 777 out:
 778
 779         return ret;
 780 }
 781 EXPORT_SYMBOL_GPL(load_pdptrs);
 782
 783 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 784 {
 785         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 786         int offset;
 787         gfn_t gfn;
 788         int r;
 789
 790         if (!is_pae_paging(vcpu))
 791                 return false;
 792
 793         if (!kvm_register_is_available(vcpu, VCPU_EXREG_PDPTR))
 794                 return true;
 795
 796         gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
 797         offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
 798         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 799                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 800         if (r < 0)
 801                 return true;
 802
 803         return memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 804 }
 805 EXPORT_SYMBOL_GPL(pdptrs_changed);
 806
 807 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 808 {
 809         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 810         unsigned long pdptr_bits = X86_CR0_CD | X86_CR0_NW | X86_CR0_PG;
 811         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 812
 813         cr0 |= X86_CR0_ET;
 814
 815 #ifdef CONFIG_X86_64
 816         if (cr0 & 0xffffffff00000000UL)
 817                 return 1;
 818 #endif
 819
 820         cr0 &= ~CR0_RESERVED_BITS;
 821
 822         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 823                 return 1;
 824
 825         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 826                 return 1;
 827
 828 #ifdef CONFIG_X86_64
 829         if ((vcpu->arch.efer & EFER_LME) && !is_paging(vcpu) &&
 830             (cr0 & X86_CR0_PG)) {
 831                 int cs_db, cs_l;
 832
 833                 if (!is_pae(vcpu))
 834                         return 1;
 835                 kvm_x86_ops.get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 836                 if (cs_l)
 837                         return 1;
 838         }
 839 #endif
 840         if (!(vcpu->arch.efer & EFER_LME) && (cr0 & X86_CR0_PG) &&
 841             is_pae(vcpu) && ((cr0 ^ old_cr0) & pdptr_bits) &&
 842             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu)))
 843                 return 1;
 844
 845         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 846                 return 1;
 847
 848         kvm_x86_ops.set_cr0(vcpu, cr0);
 849
 850         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 851                 kvm_clear_async_pf_completion_queue(vcpu);
 852                 kvm_async_pf_hash_reset(vcpu);
 853         }
 854
 855         if ((cr0 ^ old_cr0) & update_bits)
 856                 kvm_mmu_reset_context(vcpu);
 857
 858         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 859             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 860             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 861                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 862
 863         return 0;
 864 }
 865 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 866
 867 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 868 {
 869         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 870 }
 871 EXPORT_SYMBOL_GPL(kvm_lmsw);
 872
 873 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu)
 874 {
 875         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 876
 877                 if (vcpu->arch.xcr0 != host_xcr0)
 878                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 879
 880                 if (vcpu->arch.xsaves_enabled &&
 881                     vcpu->arch.ia32_xss != host_xss)
 882                         wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss);
 883         }
 884
 885         if (static_cpu_has(X86_FEATURE_PKU) &&
 886             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 887              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU)) &&
 888             vcpu->arch.pkru != vcpu->arch.host_pkru)
 889                 __write_pkru(vcpu->arch.pkru);
 890 }
 891 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);
 892
 893 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)
 894 {
 895         if (static_cpu_has(X86_FEATURE_PKU) &&
 896             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 897              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU))) {
 898                 vcpu->arch.pkru = rdpkru();
 899                 if (vcpu->arch.pkru != vcpu->arch.host_pkru)
 900                         __write_pkru(vcpu->arch.host_pkru);
 901         }
 902
 903         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 904
 905                 if (vcpu->arch.xcr0 != host_xcr0)
 906                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 907
 908                 if (vcpu->arch.xsaves_enabled &&
 909                     vcpu->arch.ia32_xss != host_xss)
 910                         wrmsrl(MSR_IA32_XSS, host_xss);
 911         }
 912
 913 }
 914 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state);
 915
 916 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 917 {
 918         u64 xcr0 = xcr;
 919         u64 old_xcr0 = vcpu->arch.xcr0;
 920         u64 valid_bits;
 921
 922         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 923         if (index != XCR_XFEATURE_ENABLED_MASK)
 924                 return 1;
 925         if (!(xcr0 & XFEATURE_MASK_FP))
 926                 return 1;
 927         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 928                 return 1;
 929
 930         /*
 931          * Do not allow the guest to set bits that we do not support
 932          * saving.  However, xcr0 bit 0 is always set, even if the
 933          * emulated CPU does not support XSAVE (see fx_init).
 934          */
 935         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 936         if (xcr0 & ~valid_bits)
 937                 return 1;
 938
 939         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 940             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 941                 return 1;
 942
 943         if (xcr0 & XFEATURE_MASK_AVX512) {
 944                 if (!(xcr0 & XFEATURE_MASK_YMM))
 945                         return 1;
 946                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 947                         return 1;
 948         }
 949         vcpu->arch.xcr0 = xcr0;
 950
 951         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 952                 kvm_update_cpuid_runtime(vcpu);
 953         return 0;
 954 }
 955
 956 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 957 {
 958         if (kvm_x86_ops.get_cpl(vcpu) != 0 ||
 959             __kvm_set_xcr(vcpu, index, xcr)) {
 960                 kvm_inject_gp(vcpu, 0);
 961                 return 1;
 962         }
 963         return 0;
 964 }
 965 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 966
 967 bool kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 968 {
 969         if (cr4 & cr4_reserved_bits)
 970                 return false;
 971
 972         if (cr4 & vcpu->arch.cr4_guest_rsvd_bits)
 973                 return false;
 974
 975         return kvm_x86_ops.is_valid_cr4(vcpu, cr4);
 976 }
 977 EXPORT_SYMBOL_GPL(kvm_is_valid_cr4);
 978
 979 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 980 {
 981         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 982         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 983                                    X86_CR4_SMEP;
 984         unsigned long mmu_role_bits = pdptr_bits | X86_CR4_SMAP | X86_CR4_PKE;
 985
 986         if (!kvm_is_valid_cr4(vcpu, cr4))
 987                 return 1;
 988
 989         if (is_long_mode(vcpu)) {
 990                 if (!(cr4 & X86_CR4_PAE))
 991                         return 1;
 992                 if ((cr4 ^ old_cr4) & X86_CR4_LA57)
 993                         return 1;
 994         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 995                    && ((cr4 ^ old_cr4) & pdptr_bits)
 996                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 997                                    kvm_read_cr3(vcpu)))
 998                 return 1;
 999
1000         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
1001                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
1002                         return 1;
1003
1004                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1005                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
1006                         return 1;
1007         }
1008
1009         kvm_x86_ops.set_cr4(vcpu, cr4);
1010
1011         if (((cr4 ^ old_cr4) & mmu_role_bits) ||
1012             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
1013                 kvm_mmu_reset_context(vcpu);
1014
1015         if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
1016                 kvm_update_cpuid_runtime(vcpu);
1017
1018         return 0;
1019 }
1020 EXPORT_SYMBOL_GPL(kvm_set_cr4);
1021
1022 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1023 {
1024         bool skip_tlb_flush = false;
1025 #ifdef CONFIG_X86_64
1026         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
1027
1028         if (pcid_enabled) {
1029                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
1030                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
1031         }
1032 #endif
1033
1034         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
1035                 if (!skip_tlb_flush) {
1036                         kvm_mmu_sync_roots(vcpu);
1037                         kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1038                 }
1039                 return 0;
1040         }
1041
1042         if (is_long_mode(vcpu) &&
1043             (cr3 & vcpu->arch.cr3_lm_rsvd_bits))
1044                 return 1;
1045         else if (is_pae_paging(vcpu) &&
1046                  !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
1047                 return 1;
1048
1049         kvm_mmu_new_pgd(vcpu, cr3, skip_tlb_flush, skip_tlb_flush);
1050         vcpu->arch.cr3 = cr3;
1051         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
1052
1053         return 0;
1054 }
1055 EXPORT_SYMBOL_GPL(kvm_set_cr3);
1056
1057 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
1058 {
1059         if (cr8 & CR8_RESERVED_BITS)
1060                 return 1;
1061         if (lapic_in_kernel(vcpu))
1062                 kvm_lapic_set_tpr(vcpu, cr8);
1063         else
1064                 vcpu->arch.cr8 = cr8;
1065         return 0;
1066 }
1067 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1068
1069 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1070 {
1071         if (lapic_in_kernel(vcpu))
1072                 return kvm_lapic_get_cr8(vcpu);
1073         else
1074                 return vcpu->arch.cr8;
1075 }
1076 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1077
1078 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1079 {
1080         int i;
1081
1082         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1083                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1084                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1085                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
1086         }
1087 }
1088
1089 void kvm_update_dr7(struct kvm_vcpu *vcpu)
1090 {
1091         unsigned long dr7;
1092
1093         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1094                 dr7 = vcpu->arch.guest_debug_dr7;
1095         else
1096                 dr7 = vcpu->arch.dr7;
1097         kvm_x86_ops.set_dr7(vcpu, dr7);
1098         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1099         if (dr7 & DR7_BP_EN_MASK)
1100                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1101 }
1102 EXPORT_SYMBOL_GPL(kvm_update_dr7);
1103
1104 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1105 {
1106         u64 fixed = DR6_FIXED_1;
1107
1108         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1109                 fixed |= DR6_RTM;
1110         return fixed;
1111 }
1112
1113 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1114 {
1115         size_t size = ARRAY_SIZE(vcpu->arch.db);
1116
1117         switch (dr) {
1118         case 0 ... 3:
1119                 vcpu->arch.db[array_index_nospec(dr, size)] = val;
1120                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1121                         vcpu->arch.eff_db[dr] = val;
1122                 break;
1123         case 4:
1124         case 6:
1125                 if (!kvm_dr6_valid(val))
1126                         return -1; /* #GP */
1127                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1128                 break;
1129         case 5:
1130         default: /* 7 */
1131                 if (!kvm_dr7_valid(val))
1132                         return -1; /* #GP */
1133                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1134                 kvm_update_dr7(vcpu);
1135                 break;
1136         }
1137
1138         return 0;
1139 }
1140
1141 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1142 {
1143         if (__kvm_set_dr(vcpu, dr, val)) {
1144                 kvm_inject_gp(vcpu, 0);
1145                 return 1;
1146         }
1147         return 0;
1148 }
1149 EXPORT_SYMBOL_GPL(kvm_set_dr);
1150
1151 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1152 {
1153         size_t size = ARRAY_SIZE(vcpu->arch.db);
1154
1155         switch (dr) {
1156         case 0 ... 3:
1157                 *val = vcpu->arch.db[array_index_nospec(dr, size)];
1158                 break;
1159         case 4:
1160         case 6:
1161                 *val = vcpu->arch.dr6;
1162                 break;
1163         case 5:
1164         default: /* 7 */
1165                 *val = vcpu->arch.dr7;
1166                 break;
1167         }
1168         return 0;
1169 }
1170 EXPORT_SYMBOL_GPL(kvm_get_dr);
1171
1172 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
1173 {
1174         u32 ecx = kvm_rcx_read(vcpu);
1175         u64 data;
1176         int err;
1177
1178         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
1179         if (err)
1180                 return err;
1181         kvm_rax_write(vcpu, (u32)data);
1182         kvm_rdx_write(vcpu, data >> 32);
1183         return err;
1184 }
1185 EXPORT_SYMBOL_GPL(kvm_rdpmc);
1186
1187 /*
1188  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1189  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1190  *
1191  * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1192  * extract the supported MSRs from the related const lists.
1193  * msrs_to_save is selected from the msrs_to_save_all to reflect the
1194  * capabilities of the host cpu. This capabilities test skips MSRs that are
1195  * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1196  * may depend on host virtualization features rather than host cpu features.
1197  */
1198
1199 static const u32 msrs_to_save_all[] = {
1200         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1201         MSR_STAR,
1202 #ifdef CONFIG_X86_64
1203         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1204 #endif
1205         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1206         MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1207         MSR_IA32_SPEC_CTRL,
1208         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1209         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1210         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1211         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1212         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1213         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1214         MSR_IA32_UMWAIT_CONTROL,
1215
1216         MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1217         MSR_ARCH_PERFMON_FIXED_CTR0 + 2, MSR_ARCH_PERFMON_FIXED_CTR0 + 3,
1218         MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1219         MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1220         MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1221         MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1222         MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1223         MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1224         MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1225         MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1226         MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1227         MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1228         MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1229         MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1230         MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1231         MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1232         MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1233         MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1234         MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1235         MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1236         MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1237         MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1238 };
1239
1240 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
1241 static unsigned num_msrs_to_save;
1242
1243 static const u32 emulated_msrs_all[] = {
1244         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1245         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1246         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1247         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1248         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1249         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1250         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1251         HV_X64_MSR_RESET,
1252         HV_X64_MSR_VP_INDEX,
1253         HV_X64_MSR_VP_RUNTIME,
1254         HV_X64_MSR_SCONTROL,
1255         HV_X64_MSR_STIMER0_CONFIG,
1256         HV_X64_MSR_VP_ASSIST_PAGE,
1257         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1258         HV_X64_MSR_TSC_EMULATION_STATUS,
1259         HV_X64_MSR_SYNDBG_OPTIONS,
1260         HV_X64_MSR_SYNDBG_CONTROL, HV_X64_MSR_SYNDBG_STATUS,
1261         HV_X64_MSR_SYNDBG_SEND_BUFFER, HV_X64_MSR_SYNDBG_RECV_BUFFER,
1262         HV_X64_MSR_SYNDBG_PENDING_BUFFER,
1263
1264         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1265         MSR_KVM_PV_EOI_EN, MSR_KVM_ASYNC_PF_INT, MSR_KVM_ASYNC_PF_ACK,
1266
1267         MSR_IA32_TSC_ADJUST,
1268         MSR_IA32_TSCDEADLINE,
1269         MSR_IA32_ARCH_CAPABILITIES,
1270         MSR_IA32_PERF_CAPABILITIES,
1271         MSR_IA32_MISC_ENABLE,
1272         MSR_IA32_MCG_STATUS,
1273         MSR_IA32_MCG_CTL,
1274         MSR_IA32_MCG_EXT_CTL,
1275         MSR_IA32_SMBASE,
1276         MSR_SMI_COUNT,
1277         MSR_PLATFORM_INFO,
1278         MSR_MISC_FEATURES_ENABLES,
1279         MSR_AMD64_VIRT_SPEC_CTRL,
1280         MSR_IA32_POWER_CTL,
1281         MSR_IA32_UCODE_REV,
1282
1283         /*
1284          * The following list leaves out MSRs whose values are determined
1285          * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1286          * We always support the "true" VMX control MSRs, even if the host
1287          * processor does not, so I am putting these registers here rather
1288          * than in msrs_to_save_all.
1289          */
1290         MSR_IA32_VMX_BASIC,
1291         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1292         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1293         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1294         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1295         MSR_IA32_VMX_MISC,
1296         MSR_IA32_VMX_CR0_FIXED0,
1297         MSR_IA32_VMX_CR4_FIXED0,
1298         MSR_IA32_VMX_VMCS_ENUM,
1299         MSR_IA32_VMX_PROCBASED_CTLS2,
1300         MSR_IA32_VMX_EPT_VPID_CAP,
1301         MSR_IA32_VMX_VMFUNC,
1302
1303         MSR_K7_HWCR,
1304         MSR_KVM_POLL_CONTROL,
1305 };
1306
1307 static u32 emulated_msrs[ARRAY_SIZE(emulated_msrs_all)];
1308 static unsigned num_emulated_msrs;
1309
1310 /*
1311  * List of msr numbers which are used to expose MSR-based features that
1312  * can be used by a hypervisor to validate requested CPU features.
1313  */
1314 static const u32 msr_based_features_all[] = {
1315         MSR_IA32_VMX_BASIC,
1316         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1317         MSR_IA32_VMX_PINBASED_CTLS,
1318         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1319         MSR_IA32_VMX_PROCBASED_CTLS,
1320         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1321         MSR_IA32_VMX_EXIT_CTLS,
1322         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1323         MSR_IA32_VMX_ENTRY_CTLS,
1324         MSR_IA32_VMX_MISC,
1325         MSR_IA32_VMX_CR0_FIXED0,
1326         MSR_IA32_VMX_CR0_FIXED1,
1327         MSR_IA32_VMX_CR4_FIXED0,
1328         MSR_IA32_VMX_CR4_FIXED1,
1329         MSR_IA32_VMX_VMCS_ENUM,
1330         MSR_IA32_VMX_PROCBASED_CTLS2,
1331         MSR_IA32_VMX_EPT_VPID_CAP,
1332         MSR_IA32_VMX_VMFUNC,
1333
1334         MSR_F10H_DECFG,
1335         MSR_IA32_UCODE_REV,
1336         MSR_IA32_ARCH_CAPABILITIES,
1337         MSR_IA32_PERF_CAPABILITIES,
1338 };
1339
1340 static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all)];
1341 static unsigned int num_msr_based_features;
1342
1343 static u64 kvm_get_arch_capabilities(void)
1344 {
1345         u64 data = 0;
1346
1347         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1348                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1349
1350         /*
1351          * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1352          * the nested hypervisor runs with NX huge pages.  If it is not,
1353          * L1 is anyway vulnerable to ITLB_MULTIHIT explots from other
1354          * L1 guests, so it need not worry about its own (L2) guests.
1355          */
1356         data |= ARCH_CAP_PSCHANGE_MC_NO;
1357
1358         /*
1359          * If we're doing cache flushes (either "always" or "cond")
1360          * we will do one whenever the guest does a vmlaunch/vmresume.
1361          * If an outer hypervisor is doing the cache flush for us
1362          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1363          * capability to the guest too, and if EPT is disabled we're not
1364          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1365          * require a nested hypervisor to do a flush of its own.
1366          */
1367         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1368                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1369
1370         if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1371                 data |= ARCH_CAP_RDCL_NO;
1372         if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1373                 data |= ARCH_CAP_SSB_NO;
1374         if (!boot_cpu_has_bug(X86_BUG_MDS))
1375                 data |= ARCH_CAP_MDS_NO;
1376
1377         /*
1378          * On TAA affected systems:
1379          *      - nothing to do if TSX is disabled on the host.
1380          *      - we emulate TSX_CTRL if present on the host.
1381          *        This lets the guest use VERW to clear CPU buffers.
1382          */
1383         if (!boot_cpu_has(X86_FEATURE_RTM))
1384                 data &= ~(ARCH_CAP_TAA_NO | ARCH_CAP_TSX_CTRL_MSR);
1385         else if (!boot_cpu_has_bug(X86_BUG_TAA))
1386                 data |= ARCH_CAP_TAA_NO;
1387
1388         return data;
1389 }
1390
1391 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1392 {
1393         switch (msr->index) {
1394         case MSR_IA32_ARCH_CAPABILITIES:
1395                 msr->data = kvm_get_arch_capabilities();
1396                 break;
1397         case MSR_IA32_UCODE_REV:
1398                 rdmsrl_safe(msr->index, &msr->data);
1399                 break;
1400         default:
1401                 return kvm_x86_ops.get_msr_feature(msr);
1402         }
1403         return 0;
1404 }
1405
1406 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1407 {
1408         struct kvm_msr_entry msr;
1409         int r;
1410
1411         msr.index = index;
1412         r = kvm_get_msr_feature(&msr);
1413
1414         if (r == KVM_MSR_RET_INVALID) {
1415                 /* Unconditionally clear the output for simplicity */
1416                 *data = 0;
1417                 if (kvm_msr_ignored_check(vcpu, index, 0, false))
1418                         r = 0;
1419         }
1420
1421         if (r)
1422                 return r;
1423
1424         *data = msr.data;
1425
1426         return 0;
1427 }
1428
1429 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1430 {
1431         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1432                 return false;
1433
1434         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1435                 return false;
1436
1437         if (efer & (EFER_LME | EFER_LMA) &&
1438             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1439                 return false;
1440
1441         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1442                 return false;
1443
1444         return true;
1445
1446 }
1447 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1448 {
1449         if (efer & efer_reserved_bits)
1450                 return false;
1451
1452         return __kvm_valid_efer(vcpu, efer);
1453 }
1454 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1455
1456 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1457 {
1458         u64 old_efer = vcpu->arch.efer;
1459         u64 efer = msr_info->data;
1460         int r;
1461
1462         if (efer & efer_reserved_bits)
1463                 return 1;
1464
1465         if (!msr_info->host_initiated) {
1466                 if (!__kvm_valid_efer(vcpu, efer))
1467                         return 1;
1468
1469                 if (is_paging(vcpu) &&
1470                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1471                         return 1;
1472         }
1473
1474         efer &= ~EFER_LMA;
1475         efer |= vcpu->arch.efer & EFER_LMA;
1476
1477         r = kvm_x86_ops.set_efer(vcpu, efer);
1478         if (r) {
1479                 WARN_ON(r > 0);
1480                 return r;
1481         }
1482
1483         /* Update reserved bits */
1484         if ((efer ^ old_efer) & EFER_NX)
1485                 kvm_mmu_reset_context(vcpu);
1486
1487         return 0;
1488 }
1489
1490 void kvm_enable_efer_bits(u64 mask)
1491 {
1492        efer_reserved_bits &= ~mask;
1493 }
1494 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1495
1496 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type)
1497 {
1498         struct kvm *kvm = vcpu->kvm;
1499         struct msr_bitmap_range *ranges = kvm->arch.msr_filter.ranges;
1500         u32 count = kvm->arch.msr_filter.count;
1501         u32 i;
1502         bool r = kvm->arch.msr_filter.default_allow;
1503         int idx;
1504
1505         /* MSR filtering not set up or x2APIC enabled, allow everything */
1506         if (!count || (index >= 0x800 && index <= 0x8ff))
1507                 return true;
1508
1509         /* Prevent collision with set_msr_filter */
1510         idx = srcu_read_lock(&kvm->srcu);
1511
1512         for (i = 0; i < count; i++) {
1513                 u32 start = ranges[i].base;
1514                 u32 end = start + ranges[i].nmsrs;
1515                 u32 flags = ranges[i].flags;
1516                 unsigned long *bitmap = ranges[i].bitmap;
1517
1518                 if ((index >= start) && (index < end) && (flags & type)) {
1519                         r = !!test_bit(index - start, bitmap);
1520                         break;
1521                 }
1522         }
1523
1524         srcu_read_unlock(&kvm->srcu, idx);
1525
1526         return r;
1527 }
1528 EXPORT_SYMBOL_GPL(kvm_msr_allowed);
1529
1530 /*
1531  * Write @data into the MSR specified by @index.  Select MSR specific fault
1532  * checks are bypassed if @host_initiated is %true.
1533  * Returns 0 on success, non-0 otherwise.
1534  * Assumes vcpu_load() was already called.
1535  */
1536 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1537                          bool host_initiated)
1538 {
1539         struct msr_data msr;
1540
1541         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_WRITE))
1542                 return KVM_MSR_RET_FILTERED;
1543
1544         switch (index) {
1545         case MSR_FS_BASE:
1546         case MSR_GS_BASE:
1547         case MSR_KERNEL_GS_BASE:
1548         case MSR_CSTAR:
1549         case MSR_LSTAR:
1550                 if (is_noncanonical_address(data, vcpu))
1551                         return 1;
1552                 break;
1553         case MSR_IA32_SYSENTER_EIP:
1554         case MSR_IA32_SYSENTER_ESP:
1555                 /*
1556                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1557                  * non-canonical address is written on Intel but not on
1558                  * AMD (which ignores the top 32-bits, because it does
1559                  * not implement 64-bit SYSENTER).
1560                  *
1561                  * 64-bit code should hence be able to write a non-canonical
1562                  * value on AMD.  Making the address canonical ensures that
1563                  * vmentry does not fail on Intel after writing a non-canonical
1564                  * value, and that something deterministic happens if the guest
1565                  * invokes 64-bit SYSENTER.
1566                  */
1567                 data = get_canonical(data, vcpu_virt_addr_bits(vcpu));
1568         }
1569
1570         msr.data = data;
1571         msr.index = index;
1572         msr.host_initiated = host_initiated;
1573
1574         return kvm_x86_ops.set_msr(vcpu, &msr);
1575 }
1576
1577 static int kvm_set_msr_ignored_check(struct kvm_vcpu *vcpu,
1578                                      u32 index, u64 data, bool host_initiated)
1579 {
1580         int ret = __kvm_set_msr(vcpu, index, data, host_initiated);
1581
1582         if (ret == KVM_MSR_RET_INVALID)
1583                 if (kvm_msr_ignored_check(vcpu, index, data, true))
1584                         ret = 0;
1585
1586         return ret;
1587 }
1588
1589 /*
1590  * Read the MSR specified by @index into @data.  Select MSR specific fault
1591  * checks are bypassed if @host_initiated is %true.
1592  * Returns 0 on success, non-0 otherwise.
1593  * Assumes vcpu_load() was already called.
1594  */
1595 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1596                   bool host_initiated)
1597 {
1598         struct msr_data msr;
1599         int ret;
1600
1601         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_READ))
1602                 return KVM_MSR_RET_FILTERED;
1603
1604         msr.index = index;
1605         msr.host_initiated = host_initiated;
1606
1607         ret = kvm_x86_ops.get_msr(vcpu, &msr);
1608         if (!ret)
1609                 *data = msr.data;
1610         return ret;
1611 }
1612
1613 static int kvm_get_msr_ignored_check(struct kvm_vcpu *vcpu,
1614                                      u32 index, u64 *data, bool host_initiated)
1615 {
1616         int ret = __kvm_get_msr(vcpu, index, data, host_initiated);
1617
1618         if (ret == KVM_MSR_RET_INVALID) {
1619                 /* Unconditionally clear *data for simplicity */
1620                 *data = 0;
1621                 if (kvm_msr_ignored_check(vcpu, index, 0, false))
1622                         ret = 0;
1623         }
1624
1625         return ret;
1626 }
1627
1628 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1629 {
1630         return kvm_get_msr_ignored_check(vcpu, index, data, false);
1631 }
1632 EXPORT_SYMBOL_GPL(kvm_get_msr);
1633
1634 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1635 {
1636         return kvm_set_msr_ignored_check(vcpu, index, data, false);
1637 }
1638 EXPORT_SYMBOL_GPL(kvm_set_msr);
1639
1640 static int complete_emulated_msr(struct kvm_vcpu *vcpu, bool is_read)
1641 {
1642         if (vcpu->run->msr.error) {
1643                 kvm_inject_gp(vcpu, 0);
1644                 return 1;
1645         } else if (is_read) {
1646                 kvm_rax_write(vcpu, (u32)vcpu->run->msr.data);
1647                 kvm_rdx_write(vcpu, vcpu->run->msr.data >> 32);
1648         }
1649
1650         return kvm_skip_emulated_instruction(vcpu);
1651 }
1652
1653 static int complete_emulated_rdmsr(struct kvm_vcpu *vcpu)
1654 {
1655         return complete_emulated_msr(vcpu, true);
1656 }
1657
1658 static int complete_emulated_wrmsr(struct kvm_vcpu *vcpu)
1659 {
1660         return complete_emulated_msr(vcpu, false);
1661 }
1662
1663 static u64 kvm_msr_reason(int r)
1664 {
1665         switch (r) {
1666         case KVM_MSR_RET_INVALID:
1667                 return KVM_MSR_EXIT_REASON_UNKNOWN;
1668         case KVM_MSR_RET_FILTERED:
1669                 return KVM_MSR_EXIT_REASON_FILTER;
1670         default:
1671                 return KVM_MSR_EXIT_REASON_INVAL;
1672         }
1673 }
1674
1675 static int kvm_msr_user_space(struct kvm_vcpu *vcpu, u32 index,
1676                               u32 exit_reason, u64 data,
1677                               int (*completion)(struct kvm_vcpu *vcpu),
1678                               int r)
1679 {
1680         u64 msr_reason = kvm_msr_reason(r);
1681
1682         /* Check if the user wanted to know about this MSR fault */
1683         if (!(vcpu->kvm->arch.user_space_msr_mask & msr_reason))
1684                 return 0;
1685
1686         vcpu->run->exit_reason = exit_reason;
1687         vcpu->run->msr.error = 0;
1688         memset(vcpu->run->msr.pad, 0, sizeof(vcpu->run->msr.pad));
1689         vcpu->run->msr.reason = msr_reason;
1690         vcpu->run->msr.index = index;
1691         vcpu->run->msr.data = data;
1692         vcpu->arch.complete_userspace_io = completion;
1693
1694         return 1;
1695 }
1696
1697 static int kvm_get_msr_user_space(struct kvm_vcpu *vcpu, u32 index, int r)
1698 {
1699         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_RDMSR, 0,
1700                                    complete_emulated_rdmsr, r);
1701 }
1702
1703 static int kvm_set_msr_user_space(struct kvm_vcpu *vcpu, u32 index, u64 data, int r)
1704 {
1705         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_WRMSR, data,
1706                                    complete_emulated_wrmsr, r);
1707 }
1708
1709 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1710 {
1711         u32 ecx = kvm_rcx_read(vcpu);
1712         u64 data;
1713         int r;
1714
1715         r = kvm_get_msr(vcpu, ecx, &data);
1716
1717         /* MSR read failed? See if we should ask user space */
1718         if (r && kvm_get_msr_user_space(vcpu, ecx, r)) {
1719                 /* Bounce to user space */
1720                 return 0;
1721         }
1722
1723         /* MSR read failed? Inject a #GP */
1724         if (r) {
1725                 trace_kvm_msr_read_ex(ecx);
1726                 kvm_inject_gp(vcpu, 0);
1727                 return 1;
1728         }
1729
1730         trace_kvm_msr_read(ecx, data);
1731
1732         kvm_rax_write(vcpu, data & -1u);
1733         kvm_rdx_write(vcpu, (data >> 32) & -1u);
1734         return kvm_skip_emulated_instruction(vcpu);
1735 }
1736 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
1737
1738 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
1739 {
1740         u32 ecx = kvm_rcx_read(vcpu);
1741         u64 data = kvm_read_edx_eax(vcpu);
1742         int r;
1743
1744         r = kvm_set_msr(vcpu, ecx, data);
1745
1746         /* MSR write failed? See if we should ask user space */
1747         if (r && kvm_set_msr_user_space(vcpu, ecx, data, r))
1748                 /* Bounce to user space */
1749                 return 0;
1750
1751         /* Signal all other negative errors to userspace */
1752         if (r < 0)
1753                 return r;
1754
1755         /* MSR write failed? Inject a #GP */
1756         if (r > 0) {
1757                 trace_kvm_msr_write_ex(ecx, data);
1758                 kvm_inject_gp(vcpu, 0);
1759                 return 1;
1760         }
1761
1762         trace_kvm_msr_write(ecx, data);
1763         return kvm_skip_emulated_instruction(vcpu);
1764 }
1765 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
1766
1767 bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu)
1768 {
1769         return vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu) ||
1770                 xfer_to_guest_mode_work_pending();
1771 }
1772 EXPORT_SYMBOL_GPL(kvm_vcpu_exit_request);
1773
1774 /*
1775  * The fast path for frequent and performance sensitive wrmsr emulation,
1776  * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
1777  * the latency of virtual IPI by avoiding the expensive bits of transitioning
1778  * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
1779  * other cases which must be called after interrupts are enabled on the host.
1780  */
1781 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data)
1782 {
1783         if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(vcpu->arch.apic))
1784                 return 1;
1785
1786         if (((data & APIC_SHORT_MASK) == APIC_DEST_NOSHORT) &&
1787                 ((data & APIC_DEST_MASK) == APIC_DEST_PHYSICAL) &&
1788                 ((data & APIC_MODE_MASK) == APIC_DM_FIXED) &&
1789                 ((u32)(data >> 32) != X2APIC_BROADCAST)) {
1790
1791                 data &= ~(1 << 12);
1792                 kvm_apic_send_ipi(vcpu->arch.apic, (u32)data, (u32)(data >> 32));
1793                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR2, (u32)(data >> 32));
1794                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR, (u32)data);
1795                 trace_kvm_apic_write(APIC_ICR, (u32)data);
1796                 return 0;
1797         }
1798
1799         return 1;
1800 }
1801
1802 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu *vcpu, u64 data)
1803 {
1804         if (!kvm_can_use_hv_timer(vcpu))
1805                 return 1;
1806
1807         kvm_set_lapic_tscdeadline_msr(vcpu, data);
1808         return 0;
1809 }
1810
1811 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
1812 {
1813         u32 msr = kvm_rcx_read(vcpu);
1814         u64 data;
1815         fastpath_t ret = EXIT_FASTPATH_NONE;
1816
1817         switch (msr) {
1818         case APIC_BASE_MSR + (APIC_ICR >> 4):
1819                 data = kvm_read_edx_eax(vcpu);
1820                 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu, data)) {
1821                         kvm_skip_emulated_instruction(vcpu);
1822                         ret = EXIT_FASTPATH_EXIT_HANDLED;
1823                 }
1824                 break;
1825         case MSR_IA32_TSCDEADLINE:
1826                 data = kvm_read_edx_eax(vcpu);
1827                 if (!handle_fastpath_set_tscdeadline(vcpu, data)) {
1828                         kvm_skip_emulated_instruction(vcpu);
1829                         ret = EXIT_FASTPATH_REENTER_GUEST;
1830                 }
1831                 break;
1832         default:
1833                 break;
1834         }
1835
1836         if (ret != EXIT_FASTPATH_NONE)
1837                 trace_kvm_msr_write(msr, data);
1838
1839         return ret;
1840 }
1841 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff);
1842
1843 /*
1844  * Adapt set_msr() to msr_io()'s calling convention
1845  */
1846 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1847 {
1848         return kvm_get_msr_ignored_check(vcpu, index, data, true);
1849 }
1850
1851 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1852 {
1853         return kvm_set_msr_ignored_check(vcpu, index, *data, true);
1854 }
1855
1856 #ifdef CONFIG_X86_64
1857 struct pvclock_clock {
1858         int vclock_mode;
1859         u64 cycle_last;
1860         u64 mask;
1861         u32 mult;
1862         u32 shift;
1863         u64 base_cycles;
1864         u64 offset;
1865 };
1866
1867 struct pvclock_gtod_data {
1868         seqcount_t      seq;
1869
1870         struct pvclock_clock clock; /* extract of a clocksource struct */
1871         struct pvclock_clock raw_clock; /* extract of a clocksource struct */
1872
1873         ktime_t         offs_boot;
1874         u64             wall_time_sec;
1875 };
1876
1877 static struct pvclock_gtod_data pvclock_gtod_data;
1878
1879 static void update_pvclock_gtod(struct timekeeper *tk)
1880 {
1881         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1882
1883         write_seqcount_begin(&vdata->seq);
1884
1885         /* copy pvclock gtod data */
1886         vdata->clock.vclock_mode        = tk->tkr_mono.clock->vdso_clock_mode;
1887         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1888         vdata->clock.mask               = tk->tkr_mono.mask;
1889         vdata->clock.mult               = tk->tkr_mono.mult;
1890         vdata->clock.shift              = tk->tkr_mono.shift;
1891         vdata->clock.base_cycles        = tk->tkr_mono.xtime_nsec;
1892         vdata->clock.offset             = tk->tkr_mono.base;
1893
1894         vdata->raw_clock.vclock_mode    = tk->tkr_raw.clock->vdso_clock_mode;
1895         vdata->raw_clock.cycle_last     = tk->tkr_raw.cycle_last;
1896         vdata->raw_clock.mask           = tk->tkr_raw.mask;
1897         vdata->raw_clock.mult           = tk->tkr_raw.mult;
1898         vdata->raw_clock.shift          = tk->tkr_raw.shift;
1899         vdata->raw_clock.base_cycles    = tk->tkr_raw.xtime_nsec;
1900         vdata->raw_clock.offset         = tk->tkr_raw.base;
1901
1902         vdata->wall_time_sec            = tk->xtime_sec;
1903
1904         vdata->offs_boot                = tk->offs_boot;
1905
1906         write_seqcount_end(&vdata->seq);
1907 }
1908
1909 static s64 get_kvmclock_base_ns(void)
1910 {
1911         /* Count up from boot time, but with the frequency of the raw clock.  */
1912         return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data.offs_boot));
1913 }
1914 #else
1915 static s64 get_kvmclock_base_ns(void)
1916 {
1917         /* Master clock not used, so we can just use CLOCK_BOOTTIME.  */
1918         return ktime_get_boottime_ns();
1919 }
1920 #endif
1921
1922 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1923 {
1924         int version;
1925         int r;
1926         struct pvclock_wall_clock wc;
1927         u64 wall_nsec;
1928
1929         kvm->arch.wall_clock = wall_clock;
1930
1931         if (!wall_clock)
1932                 return;
1933
1934         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1935         if (r)
1936                 return;
1937
1938         if (version & 1)
1939                 ++version;  /* first time write, random junk */
1940
1941         ++version;
1942
1943         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1944                 return;
1945
1946         /*
1947          * The guest calculates current wall clock time by adding
1948          * system time (updated by kvm_guest_time_update below) to the
1949          * wall clock specified here.  We do the reverse here.
1950          */
1951         wall_nsec = ktime_get_real_ns() - get_kvmclock_ns(kvm);
1952
1953         wc.nsec = do_div(wall_nsec, 1000000000);
1954         wc.sec = (u32)wall_nsec; /* overflow in 2106 guest time */
1955         wc.version = version;
1956
1957         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1958
1959         version++;
1960         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1961 }
1962
1963 static void kvm_write_system_time(struct kvm_vcpu *vcpu, gpa_t system_time,
1964                                   bool old_msr, bool host_initiated)
1965 {
1966         struct kvm_arch *ka = &vcpu->kvm->arch;
1967
1968         if (vcpu->vcpu_id == 0 && !host_initiated) {
1969                 if (ka->boot_vcpu_runs_old_kvmclock != old_msr)
1970                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1971
1972                 ka->boot_vcpu_runs_old_kvmclock = old_msr;
1973         }
1974
1975         vcpu->arch.time = system_time;
1976         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
1977
1978         /* we verify if the enable bit is set... */
1979         vcpu->arch.pv_time_enabled = false;
1980         if (!(system_time & 1))
1981                 return;
1982
1983         if (!kvm_gfn_to_hva_cache_init(vcpu->kvm,
1984                                        &vcpu->arch.pv_time, system_time & ~1ULL,
1985                                        sizeof(struct pvclock_vcpu_time_info)))
1986                 vcpu->arch.pv_time_enabled = true;
1987
1988         return;
1989 }
1990
1991 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1992 {
1993         do_shl32_div32(dividend, divisor);
1994         return dividend;
1995 }
1996
1997 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1998                                s8 *pshift, u32 *pmultiplier)
1999 {
2000         uint64_t scaled64;
2001         int32_t  shift = 0;
2002         uint64_t tps64;
2003         uint32_t tps32;
2004
2005         tps64 = base_hz;
2006         scaled64 = scaled_hz;
2007         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
2008                 tps64 >>= 1;
2009                 shift--;
2010         }
2011
2012         tps32 = (uint32_t)tps64;
2013         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
2014                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
2015                         scaled64 >>= 1;
2016                 else
2017                         tps32 <<= 1;
2018                 shift++;
2019         }
2020
2021         *pshift = shift;
2022         *pmultiplier = div_frac(scaled64, tps32);
2023 }
2024
2025 #ifdef CONFIG_X86_64
2026 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
2027 #endif
2028
2029 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
2030 static unsigned long max_tsc_khz;
2031
2032 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
2033 {
2034         u64 v = (u64)khz * (1000000 + ppm);
2035         do_div(v, 1000000);
2036         return v;
2037 }
2038
2039 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
2040 {
2041         u64 ratio;
2042
2043         /* Guest TSC same frequency as host TSC? */
2044         if (!scale) {
2045                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
2046                 return 0;
2047         }
2048
2049         /* TSC scaling supported? */
2050         if (!kvm_has_tsc_control) {
2051                 if (user_tsc_khz > tsc_khz) {
2052                         vcpu->arch.tsc_catchup = 1;
2053                         vcpu->arch.tsc_always_catchup = 1;
2054                         return 0;
2055                 } else {
2056                         pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2057                         return -1;
2058                 }
2059         }
2060
2061         /* TSC scaling required  - calculate ratio */
2062         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
2063                                 user_tsc_khz, tsc_khz);
2064
2065         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
2066                 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2067                                     user_tsc_khz);
2068                 return -1;
2069         }
2070
2071         vcpu->arch.tsc_scaling_ratio = ratio;
2072         return 0;
2073 }
2074
2075 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
2076 {
2077         u32 thresh_lo, thresh_hi;
2078         int use_scaling = 0;
2079
2080         /* tsc_khz can be zero if TSC calibration fails */
2081         if (user_tsc_khz == 0) {
2082                 /* set tsc_scaling_ratio to a safe value */
2083                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
2084                 return -1;
2085         }
2086
2087         /* Compute a scale to convert nanoseconds in TSC cycles */
2088         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
2089                            &vcpu->arch.virtual_tsc_shift,
2090                            &vcpu->arch.virtual_tsc_mult);
2091         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
2092
2093         /*
2094          * Compute the variation in TSC rate which is acceptable
2095          * within the range of tolerance and decide if the
2096          * rate being applied is within that bounds of the hardware
2097          * rate.  If so, no scaling or compensation need be done.
2098          */
2099         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
2100         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
2101         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
2102                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
2103                 use_scaling = 1;
2104         }
2105         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
2106 }
2107
2108 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
2109 {
2110         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
2111                                       vcpu->arch.virtual_tsc_mult,
2112                                       vcpu->arch.virtual_tsc_shift);
2113         tsc += vcpu->arch.this_tsc_write;
2114         return tsc;
2115 }
2116
2117 static inline int gtod_is_based_on_tsc(int mode)
2118 {
2119         return mode == VDSO_CLOCKMODE_TSC || mode == VDSO_CLOCKMODE_HVCLOCK;
2120 }
2121
2122 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
2123 {
2124 #ifdef CONFIG_X86_64
2125         bool vcpus_matched;
2126         struct kvm_arch *ka = &vcpu->kvm->arch;
2127         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2128
2129         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2130                          atomic_read(&vcpu->kvm->online_vcpus));
2131
2132         /*
2133          * Once the masterclock is enabled, always perform request in
2134          * order to update it.
2135          *
2136          * In order to enable masterclock, the host clocksource must be TSC
2137          * and the vcpus need to have matched TSCs.  When that happens,
2138          * perform request to enable masterclock.
2139          */
2140         if (ka->use_master_clock ||
2141             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
2142                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2143
2144         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
2145                             atomic_read(&vcpu->kvm->online_vcpus),
2146                             ka->use_master_clock, gtod->clock.vclock_mode);
2147 #endif
2148 }
2149
2150 /*
2151  * Multiply tsc by a fixed point number represented by ratio.
2152  *
2153  * The most significant 64-N bits (mult) of ratio represent the
2154  * integral part of the fixed point number; the remaining N bits
2155  * (frac) represent the fractional part, ie. ratio represents a fixed
2156  * point number (mult + frac * 2^(-N)).
2157  *
2158  * N equals to kvm_tsc_scaling_ratio_frac_bits.
2159  */
2160 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
2161 {
2162         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
2163 }
2164
2165 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
2166 {
2167         u64 _tsc = tsc;
2168         u64 ratio = vcpu->arch.tsc_scaling_ratio;
2169
2170         if (ratio != kvm_default_tsc_scaling_ratio)
2171                 _tsc = __scale_tsc(ratio, tsc);
2172
2173         return _tsc;
2174 }
2175 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
2176
2177 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
2178 {
2179         u64 tsc;
2180
2181         tsc = kvm_scale_tsc(vcpu, rdtsc());
2182
2183         return target_tsc - tsc;
2184 }
2185
2186 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
2187 {
2188         return vcpu->arch.l1_tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
2189 }
2190 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
2191
2192 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
2193 {
2194         vcpu->arch.l1_tsc_offset = offset;
2195         vcpu->arch.tsc_offset = kvm_x86_ops.write_l1_tsc_offset(vcpu, offset);
2196 }
2197
2198 static inline bool kvm_check_tsc_unstable(void)
2199 {
2200 #ifdef CONFIG_X86_64
2201         /*
2202          * TSC is marked unstable when we're running on Hyper-V,
2203          * 'TSC page' clocksource is good.
2204          */
2205         if (pvclock_gtod_data.clock.vclock_mode == VDSO_CLOCKMODE_HVCLOCK)
2206                 return false;
2207 #endif
2208         return check_tsc_unstable();
2209 }
2210
2211 static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 data)
2212 {
2213         struct kvm *kvm = vcpu->kvm;
2214         u64 offset, ns, elapsed;
2215         unsigned long flags;
2216         bool matched;
2217         bool already_matched;
2218         bool synchronizing = false;
2219
2220         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
2221         offset = kvm_compute_tsc_offset(vcpu, data);
2222         ns = get_kvmclock_base_ns();
2223         elapsed = ns - kvm->arch.last_tsc_nsec;
2224
2225         if (vcpu->arch.virtual_tsc_khz) {
2226                 if (data == 0) {
2227                         /*
2228                          * detection of vcpu initialization -- need to sync
2229                          * with other vCPUs. This particularly helps to keep
2230                          * kvm_clock stable after CPU hotplug
2231                          */
2232                         synchronizing = true;
2233                 } else {
2234                         u64 tsc_exp = kvm->arch.last_tsc_write +
2235                                                 nsec_to_cycles(vcpu, elapsed);
2236                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
2237                         /*
2238                          * Special case: TSC write with a small delta (1 second)
2239                          * of virtual cycle time against real time is
2240                          * interpreted as an attempt to synchronize the CPU.
2241                          */
2242                         synchronizing = data < tsc_exp + tsc_hz &&
2243                                         data + tsc_hz > tsc_exp;
2244                 }
2245         }
2246
2247         /*
2248          * For a reliable TSC, we can match TSC offsets, and for an unstable
2249          * TSC, we add elapsed time in this computation.  We could let the
2250          * compensation code attempt to catch up if we fall behind, but
2251          * it's better to try to match offsets from the beginning.
2252          */
2253         if (synchronizing &&
2254             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
2255                 if (!kvm_check_tsc_unstable()) {
2256                         offset = kvm->arch.cur_tsc_offset;
2257                 } else {
2258                         u64 delta = nsec_to_cycles(vcpu, elapsed);
2259                         data += delta;
2260                         offset = kvm_compute_tsc_offset(vcpu, data);
2261                 }
2262                 matched = true;
2263                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
2264         } else {
2265                 /*
2266                  * We split periods of matched TSC writes into generations.
2267                  * For each generation, we track the original measured
2268                  * nanosecond time, offset, and write, so if TSCs are in
2269                  * sync, we can match exact offset, and if not, we can match
2270                  * exact software computation in compute_guest_tsc()
2271                  *
2272                  * These values are tracked in kvm->arch.cur_xxx variables.
2273                  */
2274                 kvm->arch.cur_tsc_generation++;
2275                 kvm->arch.cur_tsc_nsec = ns;
2276                 kvm->arch.cur_tsc_write = data;
2277                 kvm->arch.cur_tsc_offset = offset;
2278                 matched = false;
2279         }
2280
2281         /*
2282          * We also track th most recent recorded KHZ, write and time to
2283          * allow the matching interval to be extended at each write.
2284          */
2285         kvm->arch.last_tsc_nsec = ns;
2286         kvm->arch.last_tsc_write = data;
2287         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
2288
2289         vcpu->arch.last_guest_tsc = data;
2290
2291         /* Keep track of which generation this VCPU has synchronized to */
2292         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
2293         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
2294         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
2295
2296         kvm_vcpu_write_tsc_offset(vcpu, offset);
2297         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
2298
2299         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
2300         if (!matched) {
2301                 kvm->arch.nr_vcpus_matched_tsc = 0;
2302         } else if (!already_matched) {
2303                 kvm->arch.nr_vcpus_matched_tsc++;
2304         }
2305
2306         kvm_track_tsc_matching(vcpu);
2307         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
2308 }
2309
2310 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
2311                                            s64 adjustment)
2312 {
2313         u64 tsc_offset = vcpu->arch.l1_tsc_offset;
2314         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
2315 }
2316
2317 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
2318 {
2319         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
2320                 WARN_ON(adjustment < 0);
2321         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
2322         adjust_tsc_offset_guest(vcpu, adjustment);
2323 }
2324
2325 #ifdef CONFIG_X86_64
2326
2327 static u64 read_tsc(void)
2328 {
2329         u64 ret = (u64)rdtsc_ordered();
2330         u64 last = pvclock_gtod_data.clock.cycle_last;
2331
2332         if (likely(ret >= last))
2333                 return ret;
2334
2335         /*
2336          * GCC likes to generate cmov here, but this branch is extremely
2337          * predictable (it's just a function of time and the likely is
2338          * very likely) and there's a data dependence, so force GCC
2339          * to generate a branch instead.  I don't barrier() because
2340          * we don't actually need a barrier, and if this function
2341          * ever gets inlined it will generate worse code.
2342          */
2343         asm volatile ("");
2344         return last;
2345 }
2346
2347 static inline u64 vgettsc(struct pvclock_clock *clock, u64 *tsc_timestamp,
2348                           int *mode)
2349 {
2350         long v;
2351         u64 tsc_pg_val;
2352
2353         switch (clock->vclock_mode) {
2354         case VDSO_CLOCKMODE_HVCLOCK:
2355                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2356                                                   tsc_timestamp);
2357                 if (tsc_pg_val != U64_MAX) {
2358                         /* TSC page valid */
2359                         *mode = VDSO_CLOCKMODE_HVCLOCK;
2360                         v = (tsc_pg_val - clock->cycle_last) &
2361                                 clock->mask;
2362                 } else {
2363                         /* TSC page invalid */
2364                         *mode = VDSO_CLOCKMODE_NONE;
2365                 }
2366                 break;
2367         case VDSO_CLOCKMODE_TSC:
2368                 *mode = VDSO_CLOCKMODE_TSC;
2369                 *tsc_timestamp = read_tsc();
2370                 v = (*tsc_timestamp - clock->cycle_last) &
2371                         clock->mask;
2372                 break;
2373         default:
2374                 *mode = VDSO_CLOCKMODE_NONE;
2375         }
2376
2377         if (*mode == VDSO_CLOCKMODE_NONE)
2378                 *tsc_timestamp = v = 0;
2379
2380         return v * clock->mult;
2381 }
2382
2383 static int do_monotonic_raw(s64 *t, u64 *tsc_timestamp)
2384 {
2385         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2386         unsigned long seq;
2387         int mode;
2388         u64 ns;
2389
2390         do {
2391                 seq = read_seqcount_begin(&gtod->seq);
2392                 ns = gtod->raw_clock.base_cycles;
2393                 ns += vgettsc(&gtod->raw_clock, tsc_timestamp, &mode);
2394                 ns >>= gtod->raw_clock.shift;
2395                 ns += ktime_to_ns(ktime_add(gtod->raw_clock.offset, gtod->offs_boot));
2396         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2397         *t = ns;
2398
2399         return mode;
2400 }
2401
2402 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2403 {
2404         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2405         unsigned long seq;
2406         int mode;
2407         u64 ns;
2408
2409         do {
2410                 seq = read_seqcount_begin(&gtod->seq);
2411                 ts->tv_sec = gtod->wall_time_sec;
2412                 ns = gtod->clock.base_cycles;
2413                 ns += vgettsc(&gtod->clock, tsc_timestamp, &mode);
2414                 ns >>= gtod->clock.shift;
2415         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2416
2417         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2418         ts->tv_nsec = ns;
2419
2420         return mode;
2421 }
2422
2423 /* returns true if host is using TSC based clocksource */
2424 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2425 {
2426         /* checked again under seqlock below */
2427         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2428                 return false;
2429
2430         return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns,
2431                                                       tsc_timestamp));
2432 }
2433
2434 /* returns true if host is using TSC based clocksource */
2435 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2436                                            u64 *tsc_timestamp)
2437 {
2438         /* checked again under seqlock below */
2439         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2440                 return false;
2441
2442         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2443 }
2444 #endif
2445
2446 /*
2447  *
2448  * Assuming a stable TSC across physical CPUS, and a stable TSC
2449  * across virtual CPUs, the following condition is possible.
2450  * Each numbered line represents an event visible to both
2451  * CPUs at the next numbered event.
2452  *
2453  * "timespecX" represents host monotonic time. "tscX" represents
2454  * RDTSC value.
2455  *
2456  *              VCPU0 on CPU0           |       VCPU1 on CPU1
2457  *
2458  * 1.  read timespec0,tsc0
2459  * 2.                                   | timespec1 = timespec0 + N
2460  *                                      | tsc1 = tsc0 + M
2461  * 3. transition to guest               | transition to guest
2462  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2463  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
2464  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2465  *
2466  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2467  *
2468  *      - ret0 < ret1
2469  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2470  *              ...
2471  *      - 0 < N - M => M < N
2472  *
2473  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2474  * always the case (the difference between two distinct xtime instances
2475  * might be smaller then the difference between corresponding TSC reads,
2476  * when updating guest vcpus pvclock areas).
2477  *
2478  * To avoid that problem, do not allow visibility of distinct
2479  * system_timestamp/tsc_timestamp values simultaneously: use a master
2480  * copy of host monotonic time values. Update that master copy
2481  * in lockstep.
2482  *
2483  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2484  *
2485  */
2486
2487 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2488 {
2489 #ifdef CONFIG_X86_64
2490         struct kvm_arch *ka = &kvm->arch;
2491         int vclock_mode;
2492         bool host_tsc_clocksource, vcpus_matched;
2493
2494         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2495                         atomic_read(&kvm->online_vcpus));
2496
2497         /*
2498          * If the host uses TSC clock, then passthrough TSC as stable
2499          * to the guest.
2500          */
2501         host_tsc_clocksource = kvm_get_time_and_clockread(
2502                                         &ka->master_kernel_ns,
2503                                         &ka->master_cycle_now);
2504
2505         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2506                                 && !ka->backwards_tsc_observed
2507                                 && !ka->boot_vcpu_runs_old_kvmclock;
2508
2509         if (ka->use_master_clock)
2510                 atomic_set(&kvm_guest_has_master_clock, 1);
2511
2512         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2513         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2514                                         vcpus_matched);
2515 #endif
2516 }
2517
2518 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2519 {
2520         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2521 }
2522
2523 static void kvm_gen_update_masterclock(struct kvm *kvm)
2524 {
2525 #ifdef CONFIG_X86_64
2526         int i;
2527         struct kvm_vcpu *vcpu;
2528         struct kvm_arch *ka = &kvm->arch;
2529
2530         spin_lock(&ka->pvclock_gtod_sync_lock);
2531         kvm_make_mclock_inprogress_request(kvm);
2532         /* no guest entries from this point */
2533         pvclock_update_vm_gtod_copy(kvm);
2534
2535         kvm_for_each_vcpu(i, vcpu, kvm)
2536                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2537
2538         /* guest entries allowed */
2539         kvm_for_each_vcpu(i, vcpu, kvm)
2540                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2541
2542         spin_unlock(&ka->pvclock_gtod_sync_lock);
2543 #endif
2544 }
2545
2546 u64 get_kvmclock_ns(struct kvm *kvm)
2547 {
2548         struct kvm_arch *ka = &kvm->arch;
2549         struct pvclock_vcpu_time_info hv_clock;
2550         u64 ret;
2551
2552         spin_lock(&ka->pvclock_gtod_sync_lock);
2553         if (!ka->use_master_clock) {
2554                 spin_unlock(&ka->pvclock_gtod_sync_lock);
2555                 return get_kvmclock_base_ns() + ka->kvmclock_offset;
2556         }
2557
2558         hv_clock.tsc_timestamp = ka->master_cycle_now;
2559         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2560         spin_unlock(&ka->pvclock_gtod_sync_lock);
2561
2562         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2563         get_cpu();
2564
2565         if (__this_cpu_read(cpu_tsc_khz)) {
2566                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2567                                    &hv_clock.tsc_shift,
2568                                    &hv_clock.tsc_to_system_mul);
2569                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2570         } else
2571                 ret = get_kvmclock_base_ns() + ka->kvmclock_offset;
2572
2573         put_cpu();
2574
2575         return ret;
2576 }
2577
2578 static void kvm_setup_pvclock_page(struct kvm_vcpu *v)
2579 {
2580         struct kvm_vcpu_arch *vcpu = &v->arch;
2581         struct pvclock_vcpu_time_info guest_hv_clock;
2582
2583         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
2584                 &guest_hv_clock, sizeof(guest_hv_clock))))
2585                 return;
2586
2587         /* This VCPU is paused, but it's legal for a guest to read another
2588          * VCPU's kvmclock, so we really have to follow the specification where
2589          * it says that version is odd if data is being modified, and even after
2590          * it is consistent.
2591          *
2592          * Version field updates must be kept separate.  This is because
2593          * kvm_write_guest_cached might use a "rep movs" instruction, and
2594          * writes within a string instruction are weakly ordered.  So there
2595          * are three writes overall.
2596          *
2597          * As a small optimization, only write the version field in the first
2598          * and third write.  The vcpu->pv_time cache is still valid, because the
2599          * version field is the first in the struct.
2600          */
2601         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2602
2603         if (guest_hv_clock.version & 1)
2604                 ++guest_hv_clock.version;  /* first time write, random junk */
2605
2606         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2607         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2608                                 &vcpu->hv_clock,
2609                                 sizeof(vcpu->hv_clock.version));
2610
2611         smp_wmb();
2612
2613         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2614         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2615
2616         if (vcpu->pvclock_set_guest_stopped_request) {
2617                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2618                 vcpu->pvclock_set_guest_stopped_request = false;
2619         }
2620
2621         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2622
2623         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2624                                 &vcpu->hv_clock,
2625                                 sizeof(vcpu->hv_clock));
2626
2627         smp_wmb();
2628
2629         vcpu->hv_clock.version++;
2630         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2631                                 &vcpu->hv_clock,
2632                                 sizeof(vcpu->hv_clock.version));
2633 }
2634
2635 static int kvm_guest_time_update(struct kvm_vcpu *v)
2636 {
2637         unsigned long flags, tgt_tsc_khz;
2638         struct kvm_vcpu_arch *vcpu = &v->arch;
2639         struct kvm_arch *ka = &v->kvm->arch;
2640         s64 kernel_ns;
2641         u64 tsc_timestamp, host_tsc;
2642         u8 pvclock_flags;
2643         bool use_master_clock;
2644
2645         kernel_ns = 0;
2646         host_tsc = 0;
2647
2648         /*
2649          * If the host uses TSC clock, then passthrough TSC as stable
2650          * to the guest.
2651          */
2652         spin_lock(&ka->pvclock_gtod_sync_lock);
2653         use_master_clock = ka->use_master_clock;
2654         if (use_master_clock) {
2655                 host_tsc = ka->master_cycle_now;
2656                 kernel_ns = ka->master_kernel_ns;
2657         }
2658         spin_unlock(&ka->pvclock_gtod_sync_lock);
2659
2660         /* Keep irq disabled to prevent changes to the clock */
2661         local_irq_save(flags);
2662         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2663         if (unlikely(tgt_tsc_khz == 0)) {
2664                 local_irq_restore(flags);
2665                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2666                 return 1;
2667         }
2668         if (!use_master_clock) {
2669                 host_tsc = rdtsc();
2670                 kernel_ns = get_kvmclock_base_ns();
2671         }
2672
2673         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2674
2675         /*
2676          * We may have to catch up the TSC to match elapsed wall clock
2677          * time for two reasons, even if kvmclock is used.
2678          *   1) CPU could have been running below the maximum TSC rate
2679          *   2) Broken TSC compensation resets the base at each VCPU
2680          *      entry to avoid unknown leaps of TSC even when running
2681          *      again on the same CPU.  This may cause apparent elapsed
2682          *      time to disappear, and the guest to stand still or run
2683          *      very slowly.
2684          */
2685         if (vcpu->tsc_catchup) {
2686                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2687                 if (tsc > tsc_timestamp) {
2688                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2689                         tsc_timestamp = tsc;
2690                 }
2691         }
2692
2693         local_irq_restore(flags);
2694
2695         /* With all the info we got, fill in the values */
2696
2697         if (kvm_has_tsc_control)
2698                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
2699
2700         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2701                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2702                                    &vcpu->hv_clock.tsc_shift,
2703                                    &vcpu->hv_clock.tsc_to_system_mul);
2704                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2705         }
2706
2707         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2708         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2709         vcpu->last_guest_tsc = tsc_timestamp;
2710
2711         /* If the host uses TSC clocksource, then it is stable */
2712         pvclock_flags = 0;
2713         if (use_master_clock)
2714                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2715
2716         vcpu->hv_clock.flags = pvclock_flags;
2717
2718         if (vcpu->pv_time_enabled)
2719                 kvm_setup_pvclock_page(v);
2720         if (v == kvm_get_vcpu(v->kvm, 0))
2721                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2722         return 0;
2723 }
2724
2725 /*
2726  * kvmclock updates which are isolated to a given vcpu, such as
2727  * vcpu->cpu migration, should not allow system_timestamp from
2728  * the rest of the vcpus to remain static. Otherwise ntp frequency
2729  * correction applies to one vcpu's system_timestamp but not
2730  * the others.
2731  *
2732  * So in those cases, request a kvmclock update for all vcpus.
2733  * We need to rate-limit these requests though, as they can
2734  * considerably slow guests that have a large number of vcpus.
2735  * The time for a remote vcpu to update its kvmclock is bound
2736  * by the delay we use to rate-limit the updates.
2737  */
2738
2739 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2740
2741 static void kvmclock_update_fn(struct work_struct *work)
2742 {
2743         int i;
2744         struct delayed_work *dwork = to_delayed_work(work);
2745         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2746                                            kvmclock_update_work);
2747         struct kvm *kvm = container_of(ka, struct kvm, arch);
2748         struct kvm_vcpu *vcpu;
2749
2750         kvm_for_each_vcpu(i, vcpu, kvm) {
2751                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2752                 kvm_vcpu_kick(vcpu);
2753         }
2754 }
2755
2756 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2757 {
2758         struct kvm *kvm = v->kvm;
2759
2760         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2761         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2762                                         KVMCLOCK_UPDATE_DELAY);
2763 }
2764
2765 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2766
2767 static void kvmclock_sync_fn(struct work_struct *work)
2768 {
2769         struct delayed_work *dwork = to_delayed_work(work);
2770         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2771                                            kvmclock_sync_work);
2772         struct kvm *kvm = container_of(ka, struct kvm, arch);
2773
2774         if (!kvmclock_periodic_sync)
2775                 return;
2776
2777         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2778         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2779                                         KVMCLOCK_SYNC_PERIOD);
2780 }
2781
2782 /*
2783  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
2784  */
2785 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
2786 {
2787         /* McStatusWrEn enabled? */
2788         if (guest_cpuid_is_amd_or_hygon(vcpu))
2789                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
2790
2791         return false;
2792 }
2793
2794 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2795 {
2796         u64 mcg_cap = vcpu->arch.mcg_cap;
2797         unsigned bank_num = mcg_cap & 0xff;
2798         u32 msr = msr_info->index;
2799         u64 data = msr_info->data;
2800
2801         switch (msr) {
2802         case MSR_IA32_MCG_STATUS:
2803                 vcpu->arch.mcg_status = data;
2804                 break;
2805         case MSR_IA32_MCG_CTL:
2806                 if (!(mcg_cap & MCG_CTL_P) &&
2807                     (data || !msr_info->host_initiated))
2808                         return 1;
2809                 if (data != 0 && data != ~(u64)0)
2810                         return 1;
2811                 vcpu->arch.mcg_ctl = data;
2812                 break;
2813         default:
2814                 if (msr >= MSR_IA32_MC0_CTL &&
2815                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2816                         u32 offset = array_index_nospec(
2817                                 msr - MSR_IA32_MC0_CTL,
2818                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
2819
2820                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2821                          * some Linux kernels though clear bit 10 in bank 4 to
2822                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2823                          * this to avoid an uncatched #GP in the guest
2824                          */
2825                         if ((offset & 0x3) == 0 &&
2826                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2827                                 return -1;
2828
2829                         /* MCi_STATUS */
2830                         if (!msr_info->host_initiated &&
2831                             (offset & 0x3) == 1 && data != 0) {
2832                                 if (!can_set_mci_status(vcpu))
2833                                         return -1;
2834                         }
2835
2836                         vcpu->arch.mce_banks[offset] = data;
2837                         break;
2838                 }
2839                 return 1;
2840         }
2841         return 0;
2842 }
2843
2844 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
2845 {
2846         struct kvm *kvm = vcpu->kvm;
2847         int lm = is_long_mode(vcpu);
2848         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
2849                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
2850         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
2851                 : kvm->arch.xen_hvm_config.blob_size_32;
2852         u32 page_num = data & ~PAGE_MASK;
2853         u64 page_addr = data & PAGE_MASK;
2854         u8 *page;
2855
2856         if (page_num >= blob_size)
2857                 return 1;
2858
2859         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
2860         if (IS_ERR(page))
2861                 return PTR_ERR(page);
2862
2863         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE)) {
2864                 kfree(page);
2865                 return 1;
2866         }
2867         return 0;
2868 }
2869
2870 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu *vcpu)
2871 {
2872         u64 mask = KVM_ASYNC_PF_ENABLED | KVM_ASYNC_PF_DELIVERY_AS_INT;
2873
2874         return (vcpu->arch.apf.msr_en_val & mask) == mask;
2875 }
2876
2877 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2878 {
2879         gpa_t gpa = data & ~0x3f;
2880
2881         /* Bits 4:5 are reserved, Should be zero */
2882         if (data & 0x30)
2883                 return 1;
2884
2885         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_VMEXIT) &&
2886             (data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT))
2887                 return 1;
2888
2889         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT) &&
2890             (data & KVM_ASYNC_PF_DELIVERY_AS_INT))
2891                 return 1;
2892
2893         if (!lapic_in_kernel(vcpu))
2894                 return data ? 1 : 0;
2895
2896         vcpu->arch.apf.msr_en_val = data;
2897
2898         if (!kvm_pv_async_pf_enabled(vcpu)) {
2899                 kvm_clear_async_pf_completion_queue(vcpu);
2900                 kvm_async_pf_hash_reset(vcpu);
2901                 return 0;
2902         }
2903
2904         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2905                                         sizeof(u64)))
2906                 return 1;
2907
2908         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2909         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
2910
2911         kvm_async_pf_wakeup_all(vcpu);
2912
2913         return 0;
2914 }
2915
2916 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu *vcpu, u64 data)
2917 {
2918         /* Bits 8-63 are reserved */
2919         if (data >> 8)
2920                 return 1;
2921
2922         if (!lapic_in_kernel(vcpu))
2923                 return 1;
2924
2925         vcpu->arch.apf.msr_int_val = data;
2926
2927         vcpu->arch.apf.vec = data & KVM_ASYNC_PF_VEC_MASK;
2928
2929         return 0;
2930 }
2931
2932 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2933 {
2934         vcpu->arch.pv_time_enabled = false;
2935         vcpu->arch.time = 0;
2936 }
2937
2938 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu *vcpu)
2939 {
2940         ++vcpu->stat.tlb_flush;
2941         kvm_x86_ops.tlb_flush_all(vcpu);
2942 }
2943
2944 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu *vcpu)
2945 {
2946         ++vcpu->stat.tlb_flush;
2947         kvm_x86_ops.tlb_flush_guest(vcpu);
2948 }
2949
2950 static void record_steal_time(struct kvm_vcpu *vcpu)
2951 {
2952         struct kvm_host_map map;
2953         struct kvm_steal_time *st;
2954
2955         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2956                 return;
2957
2958         /* -EAGAIN is returned in atomic context so we can just return. */
2959         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT,
2960                         &map, &vcpu->arch.st.cache, false))
2961                 return;
2962
2963         st = map.hva +
2964                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
2965
2966         /*
2967          * Doing a TLB flush here, on the guest's behalf, can avoid
2968          * expensive IPIs.
2969          */
2970         if (guest_pv_has(vcpu, KVM_FEATURE_PV_TLB_FLUSH)) {
2971                 trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
2972                                        st->preempted & KVM_VCPU_FLUSH_TLB);
2973                 if (xchg(&st->preempted, 0) & KVM_VCPU_FLUSH_TLB)
2974                         kvm_vcpu_flush_tlb_guest(vcpu);
2975         }
2976
2977         vcpu->arch.st.preempted = 0;
2978
2979         if (st->version & 1)
2980                 st->version += 1;  /* first time write, random junk */
2981
2982         st->version += 1;
2983
2984         smp_wmb();
2985
2986         st->steal += current->sched_info.run_delay -
2987                 vcpu->arch.st.last_steal;
2988         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2989
2990         smp_wmb();
2991
2992         st->version += 1;
2993
2994         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, false);
2995 }
2996
2997 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2998 {
2999         bool pr = false;
3000         u32 msr = msr_info->index;
3001         u64 data = msr_info->data;
3002
3003         switch (msr) {
3004         case MSR_AMD64_NB_CFG:
3005         case MSR_IA32_UCODE_WRITE:
3006         case MSR_VM_HSAVE_PA:
3007         case MSR_AMD64_PATCH_LOADER:
3008         case MSR_AMD64_BU_CFG2:
3009         case MSR_AMD64_DC_CFG:
3010         case MSR_F15H_EX_CFG:
3011                 break;
3012
3013         case MSR_IA32_UCODE_REV:
3014                 if (msr_info->host_initiated)
3015                         vcpu->arch.microcode_version = data;
3016                 break;
3017         case MSR_IA32_ARCH_CAPABILITIES:
3018                 if (!msr_info->host_initiated)
3019                         return 1;
3020                 vcpu->arch.arch_capabilities = data;
3021                 break;
3022         case MSR_IA32_PERF_CAPABILITIES: {
3023                 struct kvm_msr_entry msr_ent = {.index = msr, .data = 0};
3024
3025                 if (!msr_info->host_initiated)
3026                         return 1;
3027                 if (guest_cpuid_has(vcpu, X86_FEATURE_PDCM) && kvm_get_msr_feature(&msr_ent))
3028                         return 1;
3029                 if (data & ~msr_ent.data)
3030                         return 1;
3031
3032                 vcpu->arch.perf_capabilities = data;
3033
3034                 return 0;
3035                 }
3036         case MSR_EFER:
3037                 return set_efer(vcpu, msr_info);
3038         case MSR_K7_HWCR:
3039                 data &= ~(u64)0x40;     /* ignore flush filter disable */
3040                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
3041                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
3042
3043                 /* Handle McStatusWrEn */
3044                 if (data == BIT_ULL(18)) {
3045                         vcpu->arch.msr_hwcr = data;
3046                 } else if (data != 0) {
3047                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
3048                                     data);
3049                         return 1;
3050                 }
3051                 break;
3052         case MSR_FAM10H_MMIO_CONF_BASE:
3053                 if (data != 0) {
3054                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
3055                                     "0x%llx\n", data);
3056                         return 1;
3057                 }
3058                 break;
3059         case MSR_IA32_DEBUGCTLMSR:
3060                 if (!data) {
3061                         /* We support the non-activated case already */
3062                         break;
3063                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
3064                         /* Values other than LBR and BTF are vendor-specific,
3065                            thus reserved and should throw a #GP */
3066                         return 1;
3067                 } else if (report_ignored_msrs)
3068                         vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
3069                                     __func__, data);
3070                 break;
3071         case 0x200 ... 0x2ff:
3072                 return kvm_mtrr_set_msr(vcpu, msr, data);
3073         case MSR_IA32_APICBASE:
3074                 return kvm_set_apic_base(vcpu, msr_info);
3075         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3076                 return kvm_x2apic_msr_write(vcpu, msr, data);
3077         case MSR_IA32_TSCDEADLINE:
3078                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
3079                 break;
3080         case MSR_IA32_TSC_ADJUST:
3081                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
3082                         if (!msr_info->host_initiated) {
3083                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
3084                                 adjust_tsc_offset_guest(vcpu, adj);
3085                         }
3086                         vcpu->arch.ia32_tsc_adjust_msr = data;
3087                 }
3088                 break;
3089         case MSR_IA32_MISC_ENABLE:
3090                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
3091                     ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
3092                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
3093                                 return 1;
3094                         vcpu->arch.ia32_misc_enable_msr = data;
3095                         kvm_update_cpuid_runtime(vcpu);
3096                 } else {
3097                         vcpu->arch.ia32_misc_enable_msr = data;
3098                 }
3099                 break;
3100         case MSR_IA32_SMBASE:
3101                 if (!msr_info->host_initiated)
3102                         return 1;
3103                 vcpu->arch.smbase = data;
3104                 break;
3105         case MSR_IA32_POWER_CTL:
3106                 vcpu->arch.msr_ia32_power_ctl = data;
3107                 break;
3108         case MSR_IA32_TSC:
3109                 if (msr_info->host_initiated) {
3110                         kvm_synchronize_tsc(vcpu, data);
3111                 } else {
3112                         u64 adj = kvm_compute_tsc_offset(vcpu, data) - vcpu->arch.l1_tsc_offset;
3113                         adjust_tsc_offset_guest(vcpu, adj);
3114                         vcpu->arch.ia32_tsc_adjust_msr += adj;
3115                 }
3116                 break;
3117         case MSR_IA32_XSS:
3118                 if (!msr_info->host_initiated &&
3119                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3120                         return 1;
3121                 /*
3122                  * KVM supports exposing PT to the guest, but does not support
3123                  * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3124                  * XSAVES/XRSTORS to save/restore PT MSRs.
3125                  */
3126                 if (data & ~supported_xss)
3127                         return 1;
3128                 vcpu->arch.ia32_xss = data;
3129                 break;
3130         case MSR_SMI_COUNT:
3131                 if (!msr_info->host_initiated)
3132                         return 1;
3133                 vcpu->arch.smi_count = data;
3134                 break;
3135         case MSR_KVM_WALL_CLOCK_NEW:
3136                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3137                         return 1;
3138
3139                 kvm_write_wall_clock(vcpu->kvm, data);
3140                 break;
3141         case MSR_KVM_WALL_CLOCK:
3142                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3143                         return 1;
3144
3145                 kvm_write_wall_clock(vcpu->kvm, data);
3146                 break;
3147         case MSR_KVM_SYSTEM_TIME_NEW:
3148                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3149                         return 1;
3150
3151                 kvm_write_system_time(vcpu, data, false, msr_info->host_initiated);
3152                 break;
3153         case MSR_KVM_SYSTEM_TIME:
3154                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3155                         return 1;
3156
3157                 kvm_write_system_time(vcpu, data, true,  msr_info->host_initiated);
3158                 break;
3159         case MSR_KVM_ASYNC_PF_EN:
3160                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3161                         return 1;
3162
3163                 if (kvm_pv_enable_async_pf(vcpu, data))
3164                         return 1;
3165                 break;
3166         case MSR_KVM_ASYNC_PF_INT:
3167                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3168                         return 1;
3169
3170                 if (kvm_pv_enable_async_pf_int(vcpu, data))
3171                         return 1;
3172                 break;
3173         case MSR_KVM_ASYNC_PF_ACK:
3174                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3175                         return 1;
3176                 if (data & 0x1) {
3177                         vcpu->arch.apf.pageready_pending = false;
3178                         kvm_check_async_pf_completion(vcpu);
3179                 }
3180                 break;
3181         case MSR_KVM_STEAL_TIME:
3182                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3183                         return 1;
3184
3185                 if (unlikely(!sched_info_on()))
3186                         return 1;
3187
3188                 if (data & KVM_STEAL_RESERVED_MASK)
3189                         return 1;
3190
3191                 vcpu->arch.st.msr_val = data;
3192
3193                 if (!(data & KVM_MSR_ENABLED))
3194                         break;
3195
3196                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3197
3198                 break;
3199         case MSR_KVM_PV_EOI_EN:
3200                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3201                         return 1;
3202
3203                 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
3204                         return 1;
3205                 break;
3206
3207         case MSR_KVM_POLL_CONTROL:
3208                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3209                         return 1;
3210
3211                 /* only enable bit supported */
3212                 if (data & (-1ULL << 1))
3213                         return 1;
3214
3215                 vcpu->arch.msr_kvm_poll_control = data;
3216                 break;
3217
3218         case MSR_IA32_MCG_CTL:
3219         case MSR_IA32_MCG_STATUS:
3220         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3221                 return set_msr_mce(vcpu, msr_info);
3222
3223         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3224         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3225                 pr = true;
3226                 fallthrough;
3227         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3228         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3229                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3230                         return kvm_pmu_set_msr(vcpu, msr_info);
3231
3232                 if (pr || data != 0)
3233                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
3234                                     "0x%x data 0x%llx\n", msr, data);
3235                 break;
3236         case MSR_K7_CLK_CTL:
3237                 /*
3238                  * Ignore all writes to this no longer documented MSR.
3239                  * Writes are only relevant for old K7 processors,
3240                  * all pre-dating SVM, but a recommended workaround from
3241                  * AMD for these chips. It is possible to specify the
3242                  * affected processor models on the command line, hence
3243                  * the need to ignore the workaround.
3244                  */
3245                 break;
3246         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3247         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3248         case HV_X64_MSR_SYNDBG_OPTIONS:
3249         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3250         case HV_X64_MSR_CRASH_CTL:
3251         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3252         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3253         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3254         case HV_X64_MSR_TSC_EMULATION_STATUS:
3255                 return kvm_hv_set_msr_common(vcpu, msr, data,
3256                                              msr_info->host_initiated);
3257         case MSR_IA32_BBL_CR_CTL3:
3258                 /* Drop writes to this legacy MSR -- see rdmsr
3259                  * counterpart for further detail.
3260                  */
3261                 if (report_ignored_msrs)
3262                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
3263                                 msr, data);
3264                 break;
3265         case MSR_AMD64_OSVW_ID_LENGTH:
3266                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3267                         return 1;
3268                 vcpu->arch.osvw.length = data;
3269                 break;
3270         case MSR_AMD64_OSVW_STATUS:
3271                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3272                         return 1;
3273                 vcpu->arch.osvw.status = data;
3274                 break;
3275         case MSR_PLATFORM_INFO:
3276                 if (!msr_info->host_initiated ||
3277                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
3278                      cpuid_fault_enabled(vcpu)))
3279                         return 1;
3280                 vcpu->arch.msr_platform_info = data;
3281                 break;
3282         case MSR_MISC_FEATURES_ENABLES:
3283                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
3284                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
3285                      !supports_cpuid_fault(vcpu)))
3286                         return 1;
3287                 vcpu->arch.msr_misc_features_enables = data;
3288                 break;
3289         default:
3290                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
3291                         return xen_hvm_config(vcpu, data);
3292                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3293                         return kvm_pmu_set_msr(vcpu, msr_info);
3294                 return KVM_MSR_RET_INVALID;
3295         }
3296         return 0;
3297 }
3298 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
3299
3300 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
3301 {
3302         u64 data;
3303         u64 mcg_cap = vcpu->arch.mcg_cap;
3304         unsigned bank_num = mcg_cap & 0xff;
3305
3306         switch (msr) {
3307         case MSR_IA32_P5_MC_ADDR:
3308         case MSR_IA32_P5_MC_TYPE:
3309                 data = 0;
3310                 break;
3311         case MSR_IA32_MCG_CAP:
3312                 data = vcpu->arch.mcg_cap;
3313                 break;
3314         case MSR_IA32_MCG_CTL:
3315                 if (!(mcg_cap & MCG_CTL_P) && !host)
3316                         return 1;
3317                 data = vcpu->arch.mcg_ctl;
3318                 break;
3319         case MSR_IA32_MCG_STATUS:
3320                 data = vcpu->arch.mcg_status;
3321                 break;
3322         default:
3323                 if (msr >= MSR_IA32_MC0_CTL &&
3324                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3325                         u32 offset = array_index_nospec(
3326                                 msr - MSR_IA32_MC0_CTL,
3327                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3328
3329                         data = vcpu->arch.mce_banks[offset];
3330                         break;
3331                 }
3332                 return 1;
3333         }
3334         *pdata = data;
3335         return 0;
3336 }
3337
3338 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3339 {
3340         switch (msr_info->index) {
3341         case MSR_IA32_PLATFORM_ID:
3342         case MSR_IA32_EBL_CR_POWERON:
3343         case MSR_IA32_DEBUGCTLMSR:
3344         case MSR_IA32_LASTBRANCHFROMIP:
3345         case MSR_IA32_LASTBRANCHTOIP:
3346         case MSR_IA32_LASTINTFROMIP:
3347         case MSR_IA32_LASTINTTOIP:
3348         case MSR_K8_SYSCFG:
3349         case MSR_K8_TSEG_ADDR:
3350         case MSR_K8_TSEG_MASK:
3351         case MSR_VM_HSAVE_PA:
3352         case MSR_K8_INT_PENDING_MSG:
3353         case MSR_AMD64_NB_CFG:
3354         case MSR_FAM10H_MMIO_CONF_BASE:
3355         case MSR_AMD64_BU_CFG2:
3356         case MSR_IA32_PERF_CTL:
3357         case MSR_AMD64_DC_CFG:
3358         case MSR_F15H_EX_CFG:
3359         /*
3360          * Intel Sandy Bridge CPUs must support the RAPL (running average power
3361          * limit) MSRs. Just return 0, as we do not want to expose the host
3362          * data here. Do not conditionalize this on CPUID, as KVM does not do
3363          * so for existing CPU-specific MSRs.
3364          */
3365         case MSR_RAPL_POWER_UNIT:
3366         case MSR_PP0_ENERGY_STATUS:     /* Power plane 0 (core) */
3367         case MSR_PP1_ENERGY_STATUS:     /* Power plane 1 (graphics uncore) */
3368         case MSR_PKG_ENERGY_STATUS:     /* Total package */
3369         case MSR_DRAM_ENERGY_STATUS:    /* DRAM controller */
3370                 msr_info->data = 0;
3371                 break;
3372         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
3373         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3374         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3375         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3376         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3377                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3378                         return kvm_pmu_get_msr(vcpu, msr_info);
3379                 msr_info->data = 0;
3380                 break;
3381         case MSR_IA32_UCODE_REV:
3382                 msr_info->data = vcpu->arch.microcode_version;
3383                 break;
3384         case MSR_IA32_ARCH_CAPABILITIES:
3385                 if (!msr_info->host_initiated &&
3386                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
3387                         return 1;
3388                 msr_info->data = vcpu->arch.arch_capabilities;
3389                 break;
3390         case MSR_IA32_PERF_CAPABILITIES:
3391                 if (!msr_info->host_initiated &&
3392                     !guest_cpuid_has(vcpu, X86_FEATURE_PDCM))
3393                         return 1;
3394                 msr_info->data = vcpu->arch.perf_capabilities;
3395                 break;
3396         case MSR_IA32_POWER_CTL:
3397                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
3398                 break;
3399         case MSR_IA32_TSC: {
3400                 /*
3401                  * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3402                  * even when not intercepted. AMD manual doesn't explicitly
3403                  * state this but appears to behave the same.
3404                  *
3405                  * On userspace reads and writes, however, we unconditionally
3406                  * return L1's TSC value to ensure backwards-compatible
3407                  * behavior for migration.
3408                  */
3409                 u64 tsc_offset = msr_info->host_initiated ? vcpu->arch.l1_tsc_offset :
3410                                                             vcpu->arch.tsc_offset;
3411
3412                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc()) + tsc_offset;
3413                 break;
3414         }
3415         case MSR_MTRRcap:
3416         case 0x200 ... 0x2ff:
3417                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
3418         case 0xcd: /* fsb frequency */
3419                 msr_info->data = 3;
3420                 break;
3421                 /*
3422                  * MSR_EBC_FREQUENCY_ID
3423                  * Conservative value valid for even the basic CPU models.
3424                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3425                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3426                  * and 266MHz for model 3, or 4. Set Core Clock
3427                  * Frequency to System Bus Frequency Ratio to 1 (bits
3428                  * 31:24) even though these are only valid for CPU
3429                  * models > 2, however guests may end up dividing or
3430                  * multiplying by zero otherwise.
3431                  */
3432         case MSR_EBC_FREQUENCY_ID:
3433                 msr_info->data = 1 << 24;
3434                 break;
3435         case MSR_IA32_APICBASE:
3436                 msr_info->data = kvm_get_apic_base(vcpu);
3437                 break;
3438         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3439                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
3440         case MSR_IA32_TSCDEADLINE:
3441                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
3442                 break;
3443         case MSR_IA32_TSC_ADJUST:
3444                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
3445                 break;
3446         case MSR_IA32_MISC_ENABLE:
3447                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
3448                 break;
3449         case MSR_IA32_SMBASE:
3450                 if (!msr_info->host_initiated)
3451                         return 1;
3452                 msr_info->data = vcpu->arch.smbase;
3453                 break;
3454         case MSR_SMI_COUNT:
3455                 msr_info->data = vcpu->arch.smi_count;
3456                 break;
3457         case MSR_IA32_PERF_STATUS:
3458                 /* TSC increment by tick */
3459                 msr_info->data = 1000ULL;
3460                 /* CPU multiplier */
3461                 msr_info->data |= (((uint64_t)4ULL) << 40);
3462                 break;
3463         case MSR_EFER:
3464                 msr_info->data = vcpu->arch.efer;
3465                 break;
3466         case MSR_KVM_WALL_CLOCK:
3467                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3468                         return 1;
3469
3470                 msr_info->data = vcpu->kvm->arch.wall_clock;
3471                 break;
3472         case MSR_KVM_WALL_CLOCK_NEW:
3473                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3474                         return 1;
3475
3476                 msr_info->data = vcpu->kvm->arch.wall_clock;
3477                 break;
3478         case MSR_KVM_SYSTEM_TIME:
3479                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3480                         return 1;
3481
3482                 msr_info->data = vcpu->arch.time;
3483                 break;
3484         case MSR_KVM_SYSTEM_TIME_NEW:
3485                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3486                         return 1;
3487
3488                 msr_info->data = vcpu->arch.time;
3489                 break;
3490         case MSR_KVM_ASYNC_PF_EN:
3491                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3492                         return 1;
3493
3494                 msr_info->data = vcpu->arch.apf.msr_en_val;
3495                 break;
3496         case MSR_KVM_ASYNC_PF_INT:
3497                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3498                         return 1;
3499
3500                 msr_info->data = vcpu->arch.apf.msr_int_val;
3501                 break;
3502         case MSR_KVM_ASYNC_PF_ACK:
3503                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3504                         return 1;
3505
3506                 msr_info->data = 0;
3507                 break;
3508         case MSR_KVM_STEAL_TIME:
3509                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3510                         return 1;
3511
3512                 msr_info->data = vcpu->arch.st.msr_val;
3513                 break;
3514         case MSR_KVM_PV_EOI_EN:
3515                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3516                         return 1;
3517
3518                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
3519                 break;
3520         case MSR_KVM_POLL_CONTROL:
3521                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3522                         return 1;
3523
3524                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
3525                 break;
3526         case MSR_IA32_P5_MC_ADDR:
3527         case MSR_IA32_P5_MC_TYPE:
3528         case MSR_IA32_MCG_CAP:
3529         case MSR_IA32_MCG_CTL:
3530         case MSR_IA32_MCG_STATUS:
3531         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3532                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
3533                                    msr_info->host_initiated);
3534         case MSR_IA32_XSS:
3535                 if (!msr_info->host_initiated &&
3536                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3537                         return 1;
3538                 msr_info->data = vcpu->arch.ia32_xss;
3539                 break;
3540         case MSR_K7_CLK_CTL:
3541                 /*
3542                  * Provide expected ramp-up count for K7. All other
3543                  * are set to zero, indicating minimum divisors for
3544                  * every field.
3545                  *
3546                  * This prevents guest kernels on AMD host with CPU
3547                  * type 6, model 8 and higher from exploding due to
3548                  * the rdmsr failing.
3549                  */
3550                 msr_info->data = 0x20000000;
3551                 break;
3552         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3553         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3554         case HV_X64_MSR_SYNDBG_OPTIONS:
3555         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3556         case HV_X64_MSR_CRASH_CTL:
3557         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3558         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3559         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3560         case HV_X64_MSR_TSC_EMULATION_STATUS:
3561                 return kvm_hv_get_msr_common(vcpu,
3562                                              msr_info->index, &msr_info->data,
3563                                              msr_info->host_initiated);
3564         case MSR_IA32_BBL_CR_CTL3:
3565                 /* This legacy MSR exists but isn't fully documented in current
3566                  * silicon.  It is however accessed by winxp in very narrow
3567                  * scenarios where it sets bit #19, itself documented as
3568                  * a "reserved" bit.  Best effort attempt to source coherent
3569                  * read data here should the balance of the register be
3570                  * interpreted by the guest:
3571                  *
3572                  * L2 cache control register 3: 64GB range, 256KB size,
3573                  * enabled, latency 0x1, configured
3574                  */
3575                 msr_info->data = 0xbe702111;
3576                 break;
3577         case MSR_AMD64_OSVW_ID_LENGTH:
3578                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3579                         return 1;
3580                 msr_info->data = vcpu->arch.osvw.length;
3581                 break;
3582         case MSR_AMD64_OSVW_STATUS:
3583                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3584                         return 1;
3585                 msr_info->data = vcpu->arch.osvw.status;
3586                 break;
3587         case MSR_PLATFORM_INFO:
3588                 if (!msr_info->host_initiated &&
3589                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
3590                         return 1;
3591                 msr_info->data = vcpu->arch.msr_platform_info;
3592                 break;
3593         case MSR_MISC_FEATURES_ENABLES:
3594                 msr_info->data = vcpu->arch.msr_misc_features_enables;
3595                 break;
3596         case MSR_K7_HWCR:
3597                 msr_info->data = vcpu->arch.msr_hwcr;
3598                 break;
3599         default:
3600                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3601                         return kvm_pmu_get_msr(vcpu, msr_info);
3602                 return KVM_MSR_RET_INVALID;
3603         }
3604         return 0;
3605 }
3606 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
3607
3608 /*
3609  * Read or write a bunch of msrs. All parameters are kernel addresses.
3610  *
3611  * @return number of msrs set successfully.
3612  */
3613 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
3614                     struct kvm_msr_entry *entries,
3615                     int (*do_msr)(struct kvm_vcpu *vcpu,
3616                                   unsigned index, u64 *data))
3617 {
3618         int i;
3619
3620         for (i = 0; i < msrs->nmsrs; ++i)
3621                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
3622                         break;
3623
3624         return i;
3625 }
3626
3627 /*
3628  * Read or write a bunch of msrs. Parameters are user addresses.
3629  *
3630  * @return number of msrs set successfully.
3631  */
3632 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
3633                   int (*do_msr)(struct kvm_vcpu *vcpu,
3634                                 unsigned index, u64 *data),
3635                   int writeback)
3636 {
3637         struct kvm_msrs msrs;
3638         struct kvm_msr_entry *entries;
3639         int r, n;
3640         unsigned size;
3641
3642         r = -EFAULT;
3643         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
3644                 goto out;
3645
3646         r = -E2BIG;
3647         if (msrs.nmsrs >= MAX_IO_MSRS)
3648                 goto out;
3649
3650         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
3651         entries = memdup_user(user_msrs->entries, size);
3652         if (IS_ERR(entries)) {
3653                 r = PTR_ERR(entries);
3654                 goto out;
3655         }
3656
3657         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
3658         if (r < 0)
3659                 goto out_free;
3660
3661         r = -EFAULT;
3662         if (writeback && copy_to_user(user_msrs->entries, entries, size))
3663                 goto out_free;
3664
3665         r = n;
3666
3667 out_free:
3668         kfree(entries);
3669 out:
3670         return r;
3671 }
3672
3673 static inline bool kvm_can_mwait_in_guest(void)
3674 {
3675         return boot_cpu_has(X86_FEATURE_MWAIT) &&
3676                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
3677                 boot_cpu_has(X86_FEATURE_ARAT);
3678 }
3679
3680 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
3681 {
3682         int r = 0;
3683
3684         switch (ext) {
3685         case KVM_CAP_IRQCHIP:
3686         case KVM_CAP_HLT:
3687         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
3688         case KVM_CAP_SET_TSS_ADDR:
3689         case KVM_CAP_EXT_CPUID:
3690         case KVM_CAP_EXT_EMUL_CPUID:
3691         case KVM_CAP_CLOCKSOURCE:
3692         case KVM_CAP_PIT:
3693         case KVM_CAP_NOP_IO_DELAY:
3694         case KVM_CAP_MP_STATE:
3695         case KVM_CAP_SYNC_MMU:
3696         case KVM_CAP_USER_NMI:
3697         case KVM_CAP_REINJECT_CONTROL:
3698         case KVM_CAP_IRQ_INJECT_STATUS:
3699         case KVM_CAP_IOEVENTFD:
3700         case KVM_CAP_IOEVENTFD_NO_LENGTH:
3701         case KVM_CAP_PIT2:
3702         case KVM_CAP_PIT_STATE2:
3703         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
3704         case KVM_CAP_XEN_HVM:
3705         case KVM_CAP_VCPU_EVENTS:
3706         case KVM_CAP_HYPERV:
3707         case KVM_CAP_HYPERV_VAPIC:
3708         case KVM_CAP_HYPERV_SPIN:
3709         case KVM_CAP_HYPERV_SYNIC:
3710         case KVM_CAP_HYPERV_SYNIC2:
3711         case KVM_CAP_HYPERV_VP_INDEX:
3712         case KVM_CAP_HYPERV_EVENTFD:
3713         case KVM_CAP_HYPERV_TLBFLUSH:
3714         case KVM_CAP_HYPERV_SEND_IPI:
3715         case KVM_CAP_HYPERV_CPUID:
3716         case KVM_CAP_PCI_SEGMENT:
3717         case KVM_CAP_DEBUGREGS:
3718         case KVM_CAP_X86_ROBUST_SINGLESTEP:
3719         case KVM_CAP_XSAVE:
3720         case KVM_CAP_ASYNC_PF:
3721         case KVM_CAP_ASYNC_PF_INT:
3722         case KVM_CAP_GET_TSC_KHZ:
3723         case KVM_CAP_KVMCLOCK_CTRL:
3724         case KVM_CAP_READONLY_MEM:
3725         case KVM_CAP_HYPERV_TIME:
3726         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
3727         case KVM_CAP_TSC_DEADLINE_TIMER:
3728         case KVM_CAP_DISABLE_QUIRKS:
3729         case KVM_CAP_SET_BOOT_CPU_ID:
3730         case KVM_CAP_SPLIT_IRQCHIP:
3731         case KVM_CAP_IMMEDIATE_EXIT:
3732         case KVM_CAP_PMU_EVENT_FILTER:
3733         case KVM_CAP_GET_MSR_FEATURES:
3734         case KVM_CAP_MSR_PLATFORM_INFO:
3735         case KVM_CAP_EXCEPTION_PAYLOAD:
3736         case KVM_CAP_SET_GUEST_DEBUG:
3737         case KVM_CAP_LAST_CPU:
3738         case KVM_CAP_X86_USER_SPACE_MSR:
3739         case KVM_CAP_X86_MSR_FILTER:
3740         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
3741                 r = 1;
3742                 break;
3743         case KVM_CAP_SYNC_REGS:
3744                 r = KVM_SYNC_X86_VALID_FIELDS;
3745                 break;
3746         case KVM_CAP_ADJUST_CLOCK:
3747                 r = KVM_CLOCK_TSC_STABLE;
3748                 break;
3749         case KVM_CAP_X86_DISABLE_EXITS:
3750                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
3751                       KVM_X86_DISABLE_EXITS_CSTATE;
3752                 if(kvm_can_mwait_in_guest())
3753                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
3754                 break;
3755         case KVM_CAP_X86_SMM:
3756                 /* SMBASE is usually relocated above 1M on modern chipsets,
3757                  * and SMM handlers might indeed rely on 4G segment limits,
3758                  * so do not report SMM to be available if real mode is
3759                  * emulated via vm86 mode.  Still, do not go to great lengths
3760                  * to avoid userspace's usage of the feature, because it is a
3761                  * fringe case that is not enabled except via specific settings
3762                  * of the module parameters.
3763                  */
3764                 r = kvm_x86_ops.has_emulated_msr(MSR_IA32_SMBASE);
3765                 break;
3766         case KVM_CAP_VAPIC:
3767                 r = !kvm_x86_ops.cpu_has_accelerated_tpr();
3768                 break;
3769         case KVM_CAP_NR_VCPUS:
3770                 r = KVM_SOFT_MAX_VCPUS;
3771                 break;
3772         case KVM_CAP_MAX_VCPUS:
3773                 r = KVM_MAX_VCPUS;
3774                 break;
3775         case KVM_CAP_MAX_VCPU_ID:
3776                 r = KVM_MAX_VCPU_ID;
3777                 break;
3778         case KVM_CAP_PV_MMU:    /* obsolete */
3779                 r = 0;
3780                 break;
3781         case KVM_CAP_MCE:
3782                 r = KVM_MAX_MCE_BANKS;
3783                 break;
3784         case KVM_CAP_XCRS:
3785                 r = boot_cpu_has(X86_FEATURE_XSAVE);
3786                 break;
3787         case KVM_CAP_TSC_CONTROL:
3788                 r = kvm_has_tsc_control;
3789                 break;
3790         case KVM_CAP_X2APIC_API:
3791                 r = KVM_X2APIC_API_VALID_FLAGS;
3792                 break;
3793         case KVM_CAP_NESTED_STATE:
3794                 r = kvm_x86_ops.nested_ops->get_state ?
3795                         kvm_x86_ops.nested_ops->get_state(NULL, NULL, 0) : 0;
3796                 break;
3797         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
3798                 r = kvm_x86_ops.enable_direct_tlbflush != NULL;
3799                 break;
3800         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
3801                 r = kvm_x86_ops.nested_ops->enable_evmcs != NULL;
3802                 break;
3803         case KVM_CAP_SMALLER_MAXPHYADDR:
3804                 r = (int) allow_smaller_maxphyaddr;
3805                 break;
3806         case KVM_CAP_STEAL_TIME:
3807                 r = sched_info_on();
3808                 break;
3809         default:
3810                 break;
3811         }
3812         return r;
3813
3814 }
3815
3816 long kvm_arch_dev_ioctl(struct file *filp,
3817                         unsigned int ioctl, unsigned long arg)
3818 {
3819         void __user *argp = (void __user *)arg;
3820         long r;
3821
3822         switch (ioctl) {
3823         case KVM_GET_MSR_INDEX_LIST: {
3824                 struct kvm_msr_list __user *user_msr_list = argp;
3825                 struct kvm_msr_list msr_list;
3826                 unsigned n;
3827
3828                 r = -EFAULT;
3829                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3830                         goto out;
3831                 n = msr_list.nmsrs;
3832                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
3833                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3834                         goto out;
3835                 r = -E2BIG;
3836                 if (n < msr_list.nmsrs)
3837                         goto out;
3838                 r = -EFAULT;
3839                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
3840                                  num_msrs_to_save * sizeof(u32)))
3841                         goto out;
3842                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
3843                                  &emulated_msrs,
3844                                  num_emulated_msrs * sizeof(u32)))
3845                         goto out;
3846                 r = 0;
3847                 break;
3848         }
3849         case KVM_GET_SUPPORTED_CPUID:
3850         case KVM_GET_EMULATED_CPUID: {
3851                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3852                 struct kvm_cpuid2 cpuid;
3853
3854                 r = -EFAULT;
3855                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3856                         goto out;
3857
3858                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
3859                                             ioctl);
3860                 if (r)
3861                         goto out;
3862
3863                 r = -EFAULT;
3864                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3865                         goto out;
3866                 r = 0;
3867                 break;
3868         }
3869         case KVM_X86_GET_MCE_CAP_SUPPORTED:
3870                 r = -EFAULT;
3871                 if (copy_to_user(argp, &kvm_mce_cap_supported,
3872                                  sizeof(kvm_mce_cap_supported)))
3873                         goto out;
3874                 r = 0;
3875                 break;
3876         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
3877                 struct kvm_msr_list __user *user_msr_list = argp;
3878                 struct kvm_msr_list msr_list;
3879                 unsigned int n;
3880
3881                 r = -EFAULT;
3882                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3883                         goto out;
3884                 n = msr_list.nmsrs;
3885                 msr_list.nmsrs = num_msr_based_features;
3886                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3887                         goto out;
3888                 r = -E2BIG;
3889                 if (n < msr_list.nmsrs)
3890                         goto out;
3891                 r = -EFAULT;
3892                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
3893                                  num_msr_based_features * sizeof(u32)))
3894                         goto out;
3895                 r = 0;
3896                 break;
3897         }
3898         case KVM_GET_MSRS:
3899                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
3900                 break;
3901         default:
3902                 r = -EINVAL;
3903                 break;
3904         }
3905 out:
3906         return r;
3907 }
3908
3909 static void wbinvd_ipi(void *garbage)
3910 {
3911         wbinvd();
3912 }
3913
3914 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
3915 {
3916         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
3917 }
3918
3919 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
3920 {
3921         /* Address WBINVD may be executed by guest */
3922         if (need_emulate_wbinvd(vcpu)) {
3923                 if (kvm_x86_ops.has_wbinvd_exit())
3924                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
3925                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
3926                         smp_call_function_single(vcpu->cpu,
3927                                         wbinvd_ipi, NULL, 1);
3928         }
3929
3930         kvm_x86_ops.vcpu_load(vcpu, cpu);
3931
3932         /* Save host pkru register if supported */
3933         vcpu->arch.host_pkru = read_pkru();
3934
3935         /* Apply any externally detected TSC adjustments (due to suspend) */
3936         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
3937                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
3938                 vcpu->arch.tsc_offset_adjustment = 0;
3939                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3940         }
3941
3942         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
3943                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
3944                                 rdtsc() - vcpu->arch.last_host_tsc;
3945                 if (tsc_delta < 0)
3946                         mark_tsc_unstable("KVM discovered backwards TSC");
3947
3948                 if (kvm_check_tsc_unstable()) {
3949                         u64 offset = kvm_compute_tsc_offset(vcpu,
3950                                                 vcpu->arch.last_guest_tsc);
3951                         kvm_vcpu_write_tsc_offset(vcpu, offset);
3952                         vcpu->arch.tsc_catchup = 1;
3953                 }
3954
3955                 if (kvm_lapic_hv_timer_in_use(vcpu))
3956                         kvm_lapic_restart_hv_timer(vcpu);
3957
3958                 /*
3959                  * On a host with synchronized TSC, there is no need to update
3960                  * kvmclock on vcpu->cpu migration
3961                  */
3962                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
3963                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
3964                 if (vcpu->cpu != cpu)
3965                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
3966                 vcpu->cpu = cpu;
3967         }
3968
3969         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3970 }
3971
3972 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
3973 {
3974         struct kvm_host_map map;
3975         struct kvm_steal_time *st;
3976
3977         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3978                 return;
3979
3980         if (vcpu->arch.st.preempted)
3981                 return;
3982
3983         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT, &map,
3984                         &vcpu->arch.st.cache, true))
3985                 return;
3986
3987         st = map.hva +
3988                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
3989
3990         st->preempted = vcpu->arch.st.preempted = KVM_VCPU_PREEMPTED;
3991
3992         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, true);
3993 }
3994
3995 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
3996 {
3997         int idx;
3998
3999         if (vcpu->preempted)
4000                 vcpu->arch.preempted_in_kernel = !kvm_x86_ops.get_cpl(vcpu);
4001
4002         /*
4003          * Disable page faults because we're in atomic context here.
4004          * kvm_write_guest_offset_cached() would call might_fault()
4005          * that relies on pagefault_disable() to tell if there's a
4006          * bug. NOTE: the write to guest memory may not go through if
4007          * during postcopy live migration or if there's heavy guest
4008          * paging.
4009          */
4010         pagefault_disable();
4011         /*
4012          * kvm_memslots() will be called by
4013          * kvm_write_guest_offset_cached() so take the srcu lock.
4014          */
4015         idx = srcu_read_lock(&vcpu->kvm->srcu);
4016         kvm_steal_time_set_preempted(vcpu);
4017         srcu_read_unlock(&vcpu->kvm->srcu, idx);
4018         pagefault_enable();
4019         kvm_x86_ops.vcpu_put(vcpu);
4020         vcpu->arch.last_host_tsc = rdtsc();
4021         /*
4022          * If userspace has set any breakpoints or watchpoints, dr6 is restored
4023          * on every vmexit, but if not, we might have a stale dr6 from the
4024          * guest. do_debug expects dr6 to be cleared after it runs, do the same.
4025          */
4026         set_debugreg(0, 6);
4027 }
4028
4029 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
4030                                     struct kvm_lapic_state *s)
4031 {
4032         if (vcpu->arch.apicv_active)
4033                 kvm_x86_ops.sync_pir_to_irr(vcpu);
4034
4035         return kvm_apic_get_state(vcpu, s);
4036 }
4037
4038 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
4039                                     struct kvm_lapic_state *s)
4040 {
4041         int r;
4042
4043         r = kvm_apic_set_state(vcpu, s);
4044         if (r)
4045                 return r;
4046         update_cr8_intercept(vcpu);
4047
4048         return 0;
4049 }
4050
4051 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
4052 {
4053         return (!lapic_in_kernel(vcpu) ||
4054                 kvm_apic_accept_pic_intr(vcpu));
4055 }
4056
4057 /*
4058  * if userspace requested an interrupt window, check that the
4059  * interrupt window is open.
4060  *
4061  * No need to exit to userspace if we already have an interrupt queued.
4062  */
4063 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
4064 {
4065         return kvm_arch_interrupt_allowed(vcpu) &&
4066                 !kvm_cpu_has_interrupt(vcpu) &&
4067                 !kvm_event_needs_reinjection(vcpu) &&
4068                 kvm_cpu_accept_dm_intr(vcpu);
4069 }
4070
4071 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
4072                                     struct kvm_interrupt *irq)
4073 {
4074         if (irq->irq >= KVM_NR_INTERRUPTS)
4075                 return -EINVAL;
4076
4077         if (!irqchip_in_kernel(vcpu->kvm)) {
4078                 kvm_queue_interrupt(vcpu, irq->irq, false);
4079                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4080                 return 0;
4081         }
4082
4083         /*
4084          * With in-kernel LAPIC, we only use this to inject EXTINT, so
4085          * fail for in-kernel 8259.
4086          */
4087         if (pic_in_kernel(vcpu->kvm))
4088                 return -ENXIO;
4089
4090         if (vcpu->arch.pending_external_vector != -1)
4091                 return -EEXIST;
4092
4093         vcpu->arch.pending_external_vector = irq->irq;
4094         kvm_make_request(KVM_REQ_EVENT, vcpu);
4095         return 0;
4096 }
4097
4098 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
4099 {
4100         kvm_inject_nmi(vcpu);
4101
4102         return 0;
4103 }
4104
4105 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
4106 {
4107         kvm_make_request(KVM_REQ_SMI, vcpu);
4108
4109         return 0;
4110 }
4111
4112 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
4113                                            struct kvm_tpr_access_ctl *tac)
4114 {
4115         if (tac->flags)
4116                 return -EINVAL;
4117         vcpu->arch.tpr_access_reporting = !!tac->enabled;
4118         return 0;
4119 }
4120
4121 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
4122                                         u64 mcg_cap)
4123 {
4124         int r;
4125         unsigned bank_num = mcg_cap & 0xff, bank;
4126
4127         r = -EINVAL;
4128         if (!bank_num || bank_num > KVM_MAX_MCE_BANKS)
4129                 goto out;
4130         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
4131                 goto out;
4132         r = 0;
4133         vcpu->arch.mcg_cap = mcg_cap;
4134         /* Init IA32_MCG_CTL to all 1s */
4135         if (mcg_cap & MCG_CTL_P)
4136                 vcpu->arch.mcg_ctl = ~(u64)0;
4137         /* Init IA32_MCi_CTL to all 1s */
4138         for (bank = 0; bank < bank_num; bank++)
4139                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
4140
4141         kvm_x86_ops.setup_mce(vcpu);
4142 out:
4143         return r;
4144 }
4145
4146 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
4147                                       struct kvm_x86_mce *mce)
4148 {
4149         u64 mcg_cap = vcpu->arch.mcg_cap;
4150         unsigned bank_num = mcg_cap & 0xff;
4151         u64 *banks = vcpu->arch.mce_banks;
4152
4153         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
4154                 return -EINVAL;
4155         /*
4156          * if IA32_MCG_CTL is not all 1s, the uncorrected error
4157          * reporting is disabled
4158          */
4159         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
4160             vcpu->arch.mcg_ctl != ~(u64)0)
4161                 return 0;
4162         banks += 4 * mce->bank;
4163         /*
4164          * if IA32_MCi_CTL is not all 1s, the uncorrected error
4165          * reporting is disabled for the bank
4166          */
4167         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
4168                 return 0;
4169         if (mce->status & MCI_STATUS_UC) {
4170                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
4171                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
4172                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
4173                         return 0;
4174                 }
4175                 if (banks[1] & MCI_STATUS_VAL)
4176                         mce->status |= MCI_STATUS_OVER;
4177                 banks[2] = mce->addr;
4178                 banks[3] = mce->misc;
4179                 vcpu->arch.mcg_status = mce->mcg_status;
4180                 banks[1] = mce->status;
4181                 kvm_queue_exception(vcpu, MC_VECTOR);
4182         } else if (!(banks[1] & MCI_STATUS_VAL)
4183                    || !(banks[1] & MCI_STATUS_UC)) {
4184                 if (banks[1] & MCI_STATUS_VAL)
4185                         mce->status |= MCI_STATUS_OVER;
4186                 banks[2] = mce->addr;
4187                 banks[3] = mce->misc;
4188                 banks[1] = mce->status;
4189         } else
4190                 banks[1] |= MCI_STATUS_OVER;
4191         return 0;
4192 }
4193
4194 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
4195                                                struct kvm_vcpu_events *events)
4196 {
4197         process_nmi(vcpu);
4198
4199         /*
4200          * In guest mode, payload delivery should be deferred,
4201          * so that the L1 hypervisor can intercept #PF before
4202          * CR2 is modified (or intercept #DB before DR6 is
4203          * modified under nVMX). Unless the per-VM capability,
4204          * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4205          * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4206          * opportunistically defer the exception payload, deliver it if the
4207          * capability hasn't been requested before processing a
4208          * KVM_GET_VCPU_EVENTS.
4209          */
4210         if (!vcpu->kvm->arch.exception_payload_enabled &&
4211             vcpu->arch.exception.pending && vcpu->arch.exception.has_payload)
4212                 kvm_deliver_exception_payload(vcpu);
4213
4214         /*
4215          * The API doesn't provide the instruction length for software
4216          * exceptions, so don't report them. As long as the guest RIP
4217          * isn't advanced, we should expect to encounter the exception
4218          * again.
4219          */
4220         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
4221                 events->exception.injected = 0;
4222                 events->exception.pending = 0;
4223         } else {
4224                 events->exception.injected = vcpu->arch.exception.injected;
4225                 events->exception.pending = vcpu->arch.exception.pending;
4226                 /*
4227                  * For ABI compatibility, deliberately conflate
4228                  * pending and injected exceptions when
4229                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4230                  */
4231                 if (!vcpu->kvm->arch.exception_payload_enabled)
4232                         events->exception.injected |=
4233                                 vcpu->arch.exception.pending;
4234         }
4235         events->exception.nr = vcpu->arch.exception.nr;
4236         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
4237         events->exception.error_code = vcpu->arch.exception.error_code;
4238         events->exception_has_payload = vcpu->arch.exception.has_payload;
4239         events->exception_payload = vcpu->arch.exception.payload;
4240
4241         events->interrupt.injected =
4242                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
4243         events->interrupt.nr = vcpu->arch.interrupt.nr;
4244         events->interrupt.soft = 0;
4245         events->interrupt.shadow = kvm_x86_ops.get_interrupt_shadow(vcpu);
4246
4247         events->nmi.injected = vcpu->arch.nmi_injected;
4248         events->nmi.pending = vcpu->arch.nmi_pending != 0;
4249         events->nmi.masked = kvm_x86_ops.get_nmi_mask(vcpu);
4250         events->nmi.pad = 0;
4251
4252         events->sipi_vector = 0; /* never valid when reporting to user space */
4253
4254         events->smi.smm = is_smm(vcpu);
4255         events->smi.pending = vcpu->arch.smi_pending;
4256         events->smi.smm_inside_nmi =
4257                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
4258         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
4259
4260         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
4261                          | KVM_VCPUEVENT_VALID_SHADOW
4262                          | KVM_VCPUEVENT_VALID_SMM);
4263         if (vcpu->kvm->arch.exception_payload_enabled)
4264                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
4265
4266         memset(&events->reserved, 0, sizeof(events->reserved));
4267 }
4268
4269 static void kvm_smm_changed(struct kvm_vcpu *vcpu);
4270
4271 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
4272                                               struct kvm_vcpu_events *events)
4273 {
4274         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4275                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4276                               | KVM_VCPUEVENT_VALID_SHADOW
4277                               | KVM_VCPUEVENT_VALID_SMM
4278                               | KVM_VCPUEVENT_VALID_PAYLOAD))
4279                 return -EINVAL;
4280
4281         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
4282                 if (!vcpu->kvm->arch.exception_payload_enabled)
4283                         return -EINVAL;
4284                 if (events->exception.pending)
4285                         events->exception.injected = 0;
4286                 else
4287                         events->exception_has_payload = 0;
4288         } else {
4289                 events->exception.pending = 0;
4290                 events->exception_has_payload = 0;
4291         }
4292
4293         if ((events->exception.injected || events->exception.pending) &&
4294             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
4295                 return -EINVAL;
4296
4297         /* INITs are latched while in SMM */
4298         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
4299             (events->smi.smm || events->smi.pending) &&
4300             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
4301                 return -EINVAL;
4302
4303         process_nmi(vcpu);
4304         vcpu->arch.exception.injected = events->exception.injected;
4305         vcpu->arch.exception.pending = events->exception.pending;
4306         vcpu->arch.exception.nr = events->exception.nr;
4307         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
4308         vcpu->arch.exception.error_code = events->exception.error_code;
4309         vcpu->arch.exception.has_payload = events->exception_has_payload;
4310         vcpu->arch.exception.payload = events->exception_payload;
4311
4312         vcpu->arch.interrupt.injected = events->interrupt.injected;
4313         vcpu->arch.interrupt.nr = events->interrupt.nr;
4314         vcpu->arch.interrupt.soft = events->interrupt.soft;
4315         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
4316                 kvm_x86_ops.set_interrupt_shadow(vcpu,
4317                                                   events->interrupt.shadow);
4318
4319         vcpu->arch.nmi_injected = events->nmi.injected;
4320         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
4321                 vcpu->arch.nmi_pending = events->nmi.pending;
4322         kvm_x86_ops.set_nmi_mask(vcpu, events->nmi.masked);
4323
4324         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
4325             lapic_in_kernel(vcpu))
4326                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
4327
4328         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
4329                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
4330                         if (events->smi.smm)
4331                                 vcpu->arch.hflags |= HF_SMM_MASK;
4332                         else
4333                                 vcpu->arch.hflags &= ~HF_SMM_MASK;
4334                         kvm_smm_changed(vcpu);
4335                 }
4336
4337                 vcpu->arch.smi_pending = events->smi.pending;
4338
4339                 if (events->smi.smm) {
4340                         if (events->smi.smm_inside_nmi)
4341                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
4342                         else
4343                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
4344                 }
4345
4346                 if (lapic_in_kernel(vcpu)) {
4347                         if (events->smi.latched_init)
4348                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4349                         else
4350                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4351                 }
4352         }
4353
4354         kvm_make_request(KVM_REQ_EVENT, vcpu);
4355
4356         return 0;
4357 }
4358
4359 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
4360                                              struct kvm_debugregs *dbgregs)
4361 {
4362         unsigned long val;
4363
4364         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
4365         kvm_get_dr(vcpu, 6, &val);
4366         dbgregs->dr6 = val;
4367         dbgregs->dr7 = vcpu->arch.dr7;
4368         dbgregs->flags = 0;
4369         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
4370 }
4371
4372 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
4373                                             struct kvm_debugregs *dbgregs)
4374 {
4375         if (dbgregs->flags)
4376                 return -EINVAL;
4377
4378         if (dbgregs->dr6 & ~0xffffffffull)
4379                 return -EINVAL;
4380         if (dbgregs->dr7 & ~0xffffffffull)
4381                 return -EINVAL;
4382
4383         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
4384         kvm_update_dr0123(vcpu);
4385         vcpu->arch.dr6 = dbgregs->dr6;
4386         vcpu->arch.dr7 = dbgregs->dr7;
4387         kvm_update_dr7(vcpu);
4388
4389         return 0;
4390 }
4391
4392 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
4393
4394 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
4395 {
4396         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4397         u64 xstate_bv = xsave->header.xfeatures;
4398         u64 valid;
4399
4400         /*
4401          * Copy legacy XSAVE area, to avoid complications with CPUID
4402          * leaves 0 and 1 in the loop below.
4403          */
4404         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
4405
4406         /* Set XSTATE_BV */
4407         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
4408         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
4409
4410         /*
4411          * Copy each region from the possibly compacted offset to the
4412          * non-compacted offset.
4413          */
4414         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4415         while (valid) {
4416                 u64 xfeature_mask = valid & -valid;
4417                 int xfeature_nr = fls64(xfeature_mask) - 1;
4418                 void *src = get_xsave_addr(xsave, xfeature_nr);
4419
4420                 if (src) {
4421                         u32 size, offset, ecx, edx;
4422                         cpuid_count(XSTATE_CPUID, xfeature_nr,
4423                                     &size, &offset, &ecx, &edx);
4424                         if (xfeature_nr == XFEATURE_PKRU)
4425                                 memcpy(dest + offset, &vcpu->arch.pkru,
4426                                        sizeof(vcpu->arch.pkru));
4427                         else
4428                                 memcpy(dest + offset, src, size);
4429
4430                 }
4431
4432                 valid -= xfeature_mask;
4433         }
4434 }
4435
4436 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
4437 {
4438         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4439         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
4440         u64 valid;
4441
4442         /*
4443          * Copy legacy XSAVE area, to avoid complications with CPUID
4444          * leaves 0 and 1 in the loop below.
4445          */
4446         memcpy(xsave, src, XSAVE_HDR_OFFSET);
4447
4448         /* Set XSTATE_BV and possibly XCOMP_BV.  */
4449         xsave->header.xfeatures = xstate_bv;
4450         if (boot_cpu_has(X86_FEATURE_XSAVES))
4451                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
4452
4453         /*
4454          * Copy each region from the non-compacted offset to the
4455          * possibly compacted offset.
4456          */
4457         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4458         while (valid) {
4459                 u64 xfeature_mask = valid & -valid;
4460                 int xfeature_nr = fls64(xfeature_mask) - 1;
4461                 void *dest = get_xsave_addr(xsave, xfeature_nr);
4462
4463                 if (dest) {
4464                         u32 size, offset, ecx, edx;
4465                         cpuid_count(XSTATE_CPUID, xfeature_nr,
4466                                     &size, &offset, &ecx, &edx);
4467                         if (xfeature_nr == XFEATURE_PKRU)
4468                                 memcpy(&vcpu->arch.pkru, src + offset,
4469                                        sizeof(vcpu->arch.pkru));
4470                         else
4471                                 memcpy(dest, src + offset, size);
4472                 }
4473
4474                 valid -= xfeature_mask;
4475         }
4476 }
4477
4478 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
4479                                          struct kvm_xsave *guest_xsave)
4480 {
4481         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4482                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
4483                 fill_xsave((u8 *) guest_xsave->region, vcpu);
4484         } else {
4485                 memcpy(guest_xsave->region,
4486                         &vcpu->arch.guest_fpu->state.fxsave,
4487                         sizeof(struct fxregs_state));
4488                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
4489                         XFEATURE_MASK_FPSSE;
4490         }
4491 }
4492
4493 #define XSAVE_MXCSR_OFFSET 24
4494
4495 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
4496                                         struct kvm_xsave *guest_xsave)
4497 {
4498         u64 xstate_bv =
4499                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
4500         u32 mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
4501
4502         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4503                 /*
4504                  * Here we allow setting states that are not present in
4505                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
4506                  * with old userspace.
4507                  */
4508                 if (xstate_bv & ~supported_xcr0 || mxcsr & ~mxcsr_feature_mask)
4509                         return -EINVAL;
4510                 load_xsave(vcpu, (u8 *)guest_xsave->region);
4511         } else {
4512                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
4513                         mxcsr & ~mxcsr_feature_mask)
4514                         return -EINVAL;
4515                 memcpy(&vcpu->arch.guest_fpu->state.fxsave,
4516                         guest_xsave->region, sizeof(struct fxregs_state));
4517         }
4518         return 0;
4519 }
4520
4521 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
4522                                         struct kvm_xcrs *guest_xcrs)
4523 {
4524         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
4525                 guest_xcrs->nr_xcrs = 0;
4526                 return;
4527         }
4528
4529         guest_xcrs->nr_xcrs = 1;
4530         guest_xcrs->flags = 0;
4531         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
4532         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
4533 }
4534
4535 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
4536                                        struct kvm_xcrs *guest_xcrs)
4537 {
4538         int i, r = 0;
4539
4540         if (!boot_cpu_has(X86_FEATURE_XSAVE))
4541                 return -EINVAL;
4542
4543         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
4544                 return -EINVAL;
4545
4546         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
4547                 /* Only support XCR0 currently */
4548                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
4549                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
4550                                 guest_xcrs->xcrs[i].value);
4551                         break;
4552                 }
4553         if (r)
4554                 r = -EINVAL;
4555         return r;
4556 }
4557
4558 /*
4559  * kvm_set_guest_paused() indicates to the guest kernel that it has been
4560  * stopped by the hypervisor.  This function will be called from the host only.
4561  * EINVAL is returned when the host attempts to set the flag for a guest that
4562  * does not support pv clocks.
4563  */
4564 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
4565 {
4566         if (!vcpu->arch.pv_time_enabled)
4567                 return -EINVAL;
4568         vcpu->arch.pvclock_set_guest_stopped_request = true;
4569         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4570         return 0;
4571 }
4572
4573 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
4574                                      struct kvm_enable_cap *cap)
4575 {
4576         int r;
4577         uint16_t vmcs_version;
4578         void __user *user_ptr;
4579
4580         if (cap->flags)
4581                 return -EINVAL;
4582
4583         switch (cap->cap) {
4584         case KVM_CAP_HYPERV_SYNIC2:
4585                 if (cap->args[0])
4586                         return -EINVAL;
4587                 fallthrough;
4588
4589         case KVM_CAP_HYPERV_SYNIC:
4590                 if (!irqchip_in_kernel(vcpu->kvm))
4591                         return -EINVAL;
4592                 return kvm_hv_activate_synic(vcpu, cap->cap ==
4593                                              KVM_CAP_HYPERV_SYNIC2);
4594         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4595                 if (!kvm_x86_ops.nested_ops->enable_evmcs)
4596                         return -ENOTTY;
4597                 r = kvm_x86_ops.nested_ops->enable_evmcs(vcpu, &vmcs_version);
4598                 if (!r) {
4599                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
4600                         if (copy_to_user(user_ptr, &vmcs_version,
4601                                          sizeof(vmcs_version)))
4602                                 r = -EFAULT;
4603                 }
4604                 return r;
4605         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4606                 if (!kvm_x86_ops.enable_direct_tlbflush)
4607                         return -ENOTTY;
4608
4609                 return kvm_x86_ops.enable_direct_tlbflush(vcpu);
4610
4611         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4612                 vcpu->arch.pv_cpuid.enforce = cap->args[0];
4613                 if (vcpu->arch.pv_cpuid.enforce)
4614                         kvm_update_pv_runtime(vcpu);
4615
4616                 return 0;
4617
4618         default:
4619                 return -EINVAL;
4620         }
4621 }
4622
4623 long kvm_arch_vcpu_ioctl(struct file *filp,
4624                          unsigned int ioctl, unsigned long arg)
4625 {
4626         struct kvm_vcpu *vcpu = filp->private_data;
4627         void __user *argp = (void __user *)arg;
4628         int r;
4629         union {
4630                 struct kvm_lapic_state *lapic;
4631                 struct kvm_xsave *xsave;
4632                 struct kvm_xcrs *xcrs;
4633                 void *buffer;
4634         } u;
4635
4636         vcpu_load(vcpu);
4637
4638         u.buffer = NULL;
4639         switch (ioctl) {
4640         case KVM_GET_LAPIC: {
4641                 r = -EINVAL;
4642                 if (!lapic_in_kernel(vcpu))
4643                         goto out;
4644                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
4645                                 GFP_KERNEL_ACCOUNT);
4646
4647                 r = -ENOMEM;
4648                 if (!u.lapic)
4649                         goto out;
4650                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
4651                 if (r)
4652                         goto out;
4653                 r = -EFAULT;
4654                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
4655                         goto out;
4656                 r = 0;
4657                 break;
4658         }
4659         case KVM_SET_LAPIC: {
4660                 r = -EINVAL;
4661                 if (!lapic_in_kernel(vcpu))
4662                         goto out;
4663                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
4664                 if (IS_ERR(u.lapic)) {
4665                         r = PTR_ERR(u.lapic);
4666                         goto out_nofree;
4667                 }
4668
4669                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
4670                 break;
4671         }
4672         case KVM_INTERRUPT: {
4673                 struct kvm_interrupt irq;
4674
4675                 r = -EFAULT;
4676                 if (copy_from_user(&irq, argp, sizeof(irq)))
4677                         goto out;
4678                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
4679                 break;
4680         }
4681         case KVM_NMI: {
4682                 r = kvm_vcpu_ioctl_nmi(vcpu);
4683                 break;
4684         }
4685         case KVM_SMI: {
4686                 r = kvm_vcpu_ioctl_smi(vcpu);
4687                 break;
4688         }
4689         case KVM_SET_CPUID: {
4690                 struct kvm_cpuid __user *cpuid_arg = argp;
4691                 struct kvm_cpuid cpuid;
4692
4693                 r = -EFAULT;
4694                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4695                         goto out;
4696                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4697                 break;
4698         }
4699         case KVM_SET_CPUID2: {
4700                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4701                 struct kvm_cpuid2 cpuid;
4702
4703                 r = -EFAULT;
4704                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4705                         goto out;
4706                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
4707                                               cpuid_arg->entries);
4708                 break;
4709         }
4710         case KVM_GET_CPUID2: {
4711                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4712                 struct kvm_cpuid2 cpuid;
4713
4714                 r = -EFAULT;
4715                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4716                         goto out;
4717                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
4718                                               cpuid_arg->entries);
4719                 if (r)
4720                         goto out;
4721                 r = -EFAULT;
4722                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4723                         goto out;
4724                 r = 0;
4725                 break;
4726         }
4727         case KVM_GET_MSRS: {
4728                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4729                 r = msr_io(vcpu, argp, do_get_msr, 1);
4730                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4731                 break;
4732         }
4733         case KVM_SET_MSRS: {
4734                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4735                 r = msr_io(vcpu, argp, do_set_msr, 0);
4736                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4737                 break;
4738         }
4739         case KVM_TPR_ACCESS_REPORTING: {
4740                 struct kvm_tpr_access_ctl tac;
4741
4742                 r = -EFAULT;
4743                 if (copy_from_user(&tac, argp, sizeof(tac)))
4744                         goto out;
4745                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
4746                 if (r)
4747                         goto out;
4748                 r = -EFAULT;
4749                 if (copy_to_user(argp, &tac, sizeof(tac)))
4750                         goto out;
4751                 r = 0;
4752                 break;
4753         };
4754         case KVM_SET_VAPIC_ADDR: {
4755                 struct kvm_vapic_addr va;
4756                 int idx;
4757
4758                 r = -EINVAL;
4759                 if (!lapic_in_kernel(vcpu))
4760                         goto out;
4761                 r = -EFAULT;
4762                 if (copy_from_user(&va, argp, sizeof(va)))
4763                         goto out;
4764                 idx = srcu_read_lock(&vcpu->kvm->srcu);
4765                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
4766                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4767                 break;
4768         }
4769         case KVM_X86_SETUP_MCE: {
4770                 u64 mcg_cap;
4771
4772                 r = -EFAULT;
4773                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
4774                         goto out;
4775                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
4776                 break;
4777         }
4778         case KVM_X86_SET_MCE: {
4779                 struct kvm_x86_mce mce;
4780
4781                 r = -EFAULT;
4782                 if (copy_from_user(&mce, argp, sizeof(mce)))
4783                         goto out;
4784                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
4785                 break;
4786         }
4787         case KVM_GET_VCPU_EVENTS: {
4788                 struct kvm_vcpu_events events;
4789
4790                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
4791
4792                 r = -EFAULT;
4793                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
4794                         break;
4795                 r = 0;
4796                 break;
4797         }
4798         case KVM_SET_VCPU_EVENTS: {
4799                 struct kvm_vcpu_events events;
4800
4801                 r = -EFAULT;
4802                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
4803                         break;
4804
4805                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
4806                 break;
4807         }
4808         case KVM_GET_DEBUGREGS: {
4809                 struct kvm_debugregs dbgregs;
4810
4811                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
4812
4813                 r = -EFAULT;
4814                 if (copy_to_user(argp, &dbgregs,
4815                                  sizeof(struct kvm_debugregs)))
4816                         break;
4817                 r = 0;
4818                 break;
4819         }
4820         case KVM_SET_DEBUGREGS: {
4821                 struct kvm_debugregs dbgregs;
4822
4823                 r = -EFAULT;
4824                 if (copy_from_user(&dbgregs, argp,
4825                                    sizeof(struct kvm_debugregs)))
4826                         break;
4827
4828                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
4829                 break;
4830         }
4831         case KVM_GET_XSAVE: {
4832                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
4833                 r = -ENOMEM;
4834                 if (!u.xsave)
4835                         break;
4836
4837                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
4838
4839                 r = -EFAULT;
4840                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
4841                         break;
4842                 r = 0;
4843                 break;
4844         }
4845         case KVM_SET_XSAVE: {
4846                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
4847                 if (IS_ERR(u.xsave)) {
4848                         r = PTR_ERR(u.xsave);
4849                         goto out_nofree;
4850                 }
4851
4852                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
4853                 break;
4854         }
4855         case KVM_GET_XCRS: {
4856                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
4857                 r = -ENOMEM;
4858                 if (!u.xcrs)
4859                         break;
4860
4861                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
4862
4863                 r = -EFAULT;
4864                 if (copy_to_user(argp, u.xcrs,
4865                                  sizeof(struct kvm_xcrs)))
4866                         break;
4867                 r = 0;
4868                 break;
4869         }
4870         case KVM_SET_XCRS: {
4871                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
4872                 if (IS_ERR(u.xcrs)) {
4873                         r = PTR_ERR(u.xcrs);
4874                         goto out_nofree;
4875                 }
4876
4877                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
4878                 break;
4879         }
4880         case KVM_SET_TSC_KHZ: {
4881                 u32 user_tsc_khz;
4882
4883                 r = -EINVAL;
4884                 user_tsc_khz = (u32)arg;
4885
4886                 if (kvm_has_tsc_control &&
4887                     user_tsc_khz >= kvm_max_guest_tsc_khz)
4888                         goto out;
4889
4890                 if (user_tsc_khz == 0)
4891                         user_tsc_khz = tsc_khz;
4892
4893                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
4894                         r = 0;
4895
4896                 goto out;
4897         }
4898         case KVM_GET_TSC_KHZ: {
4899                 r = vcpu->arch.virtual_tsc_khz;
4900                 goto out;
4901         }
4902         case KVM_KVMCLOCK_CTRL: {
4903                 r = kvm_set_guest_paused(vcpu);
4904                 goto out;
4905         }
4906         case KVM_ENABLE_CAP: {
4907                 struct kvm_enable_cap cap;
4908
4909                 r = -EFAULT;
4910                 if (copy_from_user(&cap, argp, sizeof(cap)))
4911                         goto out;
4912                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
4913                 break;
4914         }
4915         case KVM_GET_NESTED_STATE: {
4916                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4917                 u32 user_data_size;
4918
4919                 r = -EINVAL;
4920                 if (!kvm_x86_ops.nested_ops->get_state)
4921                         break;
4922
4923                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
4924                 r = -EFAULT;
4925                 if (get_user(user_data_size, &user_kvm_nested_state->size))
4926                         break;
4927
4928                 r = kvm_x86_ops.nested_ops->get_state(vcpu, user_kvm_nested_state,
4929                                                      user_data_size);
4930                 if (r < 0)
4931                         break;
4932
4933                 if (r > user_data_size) {
4934                         if (put_user(r, &user_kvm_nested_state->size))
4935                                 r = -EFAULT;
4936                         else
4937                                 r = -E2BIG;
4938                         break;
4939                 }
4940
4941                 r = 0;
4942                 break;
4943         }
4944         case KVM_SET_NESTED_STATE: {
4945                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4946                 struct kvm_nested_state kvm_state;
4947                 int idx;
4948
4949                 r = -EINVAL;
4950                 if (!kvm_x86_ops.nested_ops->set_state)
4951                         break;
4952
4953                 r = -EFAULT;
4954                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
4955                         break;
4956
4957                 r = -EINVAL;
4958                 if (kvm_state.size < sizeof(kvm_state))
4959                         break;
4960
4961                 if (kvm_state.flags &
4962                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
4963                       | KVM_STATE_NESTED_EVMCS | KVM_STATE_NESTED_MTF_PENDING
4964                       | KVM_STATE_NESTED_GIF_SET))
4965                         break;
4966
4967                 /* nested_run_pending implies guest_mode.  */
4968                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
4969                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
4970                         break;
4971
4972                 idx = srcu_read_lock(&vcpu->kvm->srcu);
4973                 r = kvm_x86_ops.nested_ops->set_state(vcpu, user_kvm_nested_state, &kvm_state);
4974                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4975                 break;
4976         }
4977         case KVM_GET_SUPPORTED_HV_CPUID: {
4978                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4979                 struct kvm_cpuid2 cpuid;
4980
4981                 r = -EFAULT;
4982                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4983                         goto out;
4984
4985                 r = kvm_vcpu_ioctl_get_hv_cpuid(vcpu, &cpuid,
4986                                                 cpuid_arg->entries);
4987                 if (r)
4988                         goto out;
4989
4990                 r = -EFAULT;
4991                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4992                         goto out;
4993                 r = 0;
4994                 break;
4995         }
4996         default:
4997                 r = -EINVAL;
4998         }
4999 out:
5000         kfree(u.buffer);
5001 out_nofree:
5002         vcpu_put(vcpu);
5003         return r;
5004 }
5005
5006 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
5007 {
5008         return VM_FAULT_SIGBUS;
5009 }
5010
5011 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
5012 {
5013         int ret;
5014
5015         if (addr > (unsigned int)(-3 * PAGE_SIZE))
5016                 return -EINVAL;
5017         ret = kvm_x86_ops.set_tss_addr(kvm, addr);
5018         return ret;
5019 }
5020
5021 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
5022                                               u64 ident_addr)
5023 {
5024         return kvm_x86_ops.set_identity_map_addr(kvm, ident_addr);
5025 }
5026
5027 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
5028                                          unsigned long kvm_nr_mmu_pages)
5029 {
5030         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
5031                 return -EINVAL;
5032
5033         mutex_lock(&kvm->slots_lock);
5034
5035         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
5036         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
5037
5038         mutex_unlock(&kvm->slots_lock);
5039         return 0;
5040 }
5041
5042 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
5043 {
5044         return kvm->arch.n_max_mmu_pages;
5045 }
5046
5047 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5048 {
5049         struct kvm_pic *pic = kvm->arch.vpic;
5050         int r;
5051
5052         r = 0;
5053         switch (chip->chip_id) {
5054         case KVM_IRQCHIP_PIC_MASTER:
5055                 memcpy(&chip->chip.pic, &pic->pics[0],
5056                         sizeof(struct kvm_pic_state));
5057                 break;
5058         case KVM_IRQCHIP_PIC_SLAVE:
5059                 memcpy(&chip->chip.pic, &pic->pics[1],
5060                         sizeof(struct kvm_pic_state));
5061                 break;
5062         case KVM_IRQCHIP_IOAPIC:
5063                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
5064                 break;
5065         default:
5066                 r = -EINVAL;
5067                 break;
5068         }
5069         return r;
5070 }
5071
5072 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5073 {
5074         struct kvm_pic *pic = kvm->arch.vpic;
5075         int r;
5076
5077         r = 0;
5078         switch (chip->chip_id) {
5079         case KVM_IRQCHIP_PIC_MASTER:
5080                 spin_lock(&pic->lock);
5081                 memcpy(&pic->pics[0], &chip->chip.pic,
5082                         sizeof(struct kvm_pic_state));
5083                 spin_unlock(&pic->lock);
5084                 break;
5085         case KVM_IRQCHIP_PIC_SLAVE:
5086                 spin_lock(&pic->lock);
5087                 memcpy(&pic->pics[1], &chip->chip.pic,
5088                         sizeof(struct kvm_pic_state));
5089                 spin_unlock(&pic->lock);
5090                 break;
5091         case KVM_IRQCHIP_IOAPIC:
5092                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
5093                 break;
5094         default:
5095                 r = -EINVAL;
5096                 break;
5097         }
5098         kvm_pic_update_irq(pic);
5099         return r;
5100 }
5101
5102 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5103 {
5104         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
5105
5106         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
5107
5108         mutex_lock(&kps->lock);
5109         memcpy(ps, &kps->channels, sizeof(*ps));
5110         mutex_unlock(&kps->lock);
5111         return 0;
5112 }
5113
5114 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5115 {
5116         int i;
5117         struct kvm_pit *pit = kvm->arch.vpit;
5118
5119         mutex_lock(&pit->pit_state.lock);
5120         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
5121         for (i = 0; i < 3; i++)
5122                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
5123         mutex_unlock(&pit->pit_state.lock);
5124         return 0;
5125 }
5126
5127 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5128 {
5129         mutex_lock(&kvm->arch.vpit->pit_state.lock);
5130         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
5131                 sizeof(ps->channels));
5132         ps->flags = kvm->arch.vpit->pit_state.flags;
5133         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
5134         memset(&ps->reserved, 0, sizeof(ps->reserved));
5135         return 0;
5136 }
5137
5138 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5139 {
5140         int start = 0;
5141         int i;
5142         u32 prev_legacy, cur_legacy;
5143         struct kvm_pit *pit = kvm->arch.vpit;
5144
5145         mutex_lock(&pit->pit_state.lock);
5146         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
5147         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
5148         if (!prev_legacy && cur_legacy)
5149                 start = 1;
5150         memcpy(&pit->pit_state.channels, &ps->channels,
5151                sizeof(pit->pit_state.channels));
5152         pit->pit_state.flags = ps->flags;
5153         for (i = 0; i < 3; i++)
5154                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
5155                                    start && i == 0);
5156         mutex_unlock(&pit->pit_state.lock);
5157         return 0;
5158 }
5159
5160 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
5161                                  struct kvm_reinject_control *control)
5162 {
5163         struct kvm_pit *pit = kvm->arch.vpit;
5164
5165         /* pit->pit_state.lock was overloaded to prevent userspace from getting
5166          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5167          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
5168          */
5169         mutex_lock(&pit->pit_state.lock);
5170         kvm_pit_set_reinject(pit, control->pit_reinject);
5171         mutex_unlock(&pit->pit_state.lock);
5172
5173         return 0;
5174 }
5175
5176 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
5177 {
5178         /*
5179          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
5180          */
5181         if (kvm_x86_ops.flush_log_dirty)
5182                 kvm_x86_ops.flush_log_dirty(kvm);
5183 }
5184
5185 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
5186                         bool line_status)
5187 {
5188         if (!irqchip_in_kernel(kvm))
5189                 return -ENXIO;
5190
5191         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
5192                                         irq_event->irq, irq_event->level,
5193                                         line_status);
5194         return 0;
5195 }
5196
5197 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
5198                             struct kvm_enable_cap *cap)
5199 {
5200         int r;
5201
5202         if (cap->flags)
5203                 return -EINVAL;
5204
5205         switch (cap->cap) {
5206         case KVM_CAP_DISABLE_QUIRKS:
5207                 kvm->arch.disabled_quirks = cap->args[0];
5208                 r = 0;
5209                 break;
5210         case KVM_CAP_SPLIT_IRQCHIP: {
5211                 mutex_lock(&kvm->lock);
5212                 r = -EINVAL;
5213                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
5214                         goto split_irqchip_unlock;
5215                 r = -EEXIST;
5216                 if (irqchip_in_kernel(kvm))
5217                         goto split_irqchip_unlock;
5218                 if (kvm->created_vcpus)
5219                         goto split_irqchip_unlock;
5220                 r = kvm_setup_empty_irq_routing(kvm);
5221                 if (r)
5222                         goto split_irqchip_unlock;
5223                 /* Pairs with irqchip_in_kernel. */
5224                 smp_wmb();
5225                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
5226                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
5227                 r = 0;
5228 split_irqchip_unlock:
5229                 mutex_unlock(&kvm->lock);
5230                 break;
5231         }
5232         case KVM_CAP_X2APIC_API:
5233                 r = -EINVAL;
5234                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
5235                         break;
5236
5237                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
5238                         kvm->arch.x2apic_format = true;
5239                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
5240                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
5241
5242                 r = 0;
5243                 break;
5244         case KVM_CAP_X86_DISABLE_EXITS:
5245                 r = -EINVAL;
5246                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
5247                         break;
5248
5249                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
5250                         kvm_can_mwait_in_guest())
5251                         kvm->arch.mwait_in_guest = true;
5252                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
5253                         kvm->arch.hlt_in_guest = true;
5254                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
5255                         kvm->arch.pause_in_guest = true;
5256                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
5257                         kvm->arch.cstate_in_guest = true;
5258                 r = 0;
5259                 break;
5260         case KVM_CAP_MSR_PLATFORM_INFO:
5261                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
5262                 r = 0;
5263                 break;
5264         case KVM_CAP_EXCEPTION_PAYLOAD:
5265                 kvm->arch.exception_payload_enabled = cap->args[0];
5266                 r = 0;
5267                 break;
5268         case KVM_CAP_X86_USER_SPACE_MSR:
5269                 kvm->arch.user_space_msr_mask = cap->args[0];
5270                 r = 0;
5271                 break;
5272         default:
5273                 r = -EINVAL;
5274                 break;
5275         }
5276         return r;
5277 }
5278
5279 static void kvm_clear_msr_filter(struct kvm *kvm)
5280 {
5281         u32 i;
5282         u32 count = kvm->arch.msr_filter.count;
5283         struct msr_bitmap_range ranges[16];
5284
5285         mutex_lock(&kvm->lock);
5286         kvm->arch.msr_filter.count = 0;
5287         memcpy(ranges, kvm->arch.msr_filter.ranges, count * sizeof(ranges[0]));
5288         mutex_unlock(&kvm->lock);
5289         synchronize_srcu(&kvm->srcu);
5290
5291         for (i = 0; i < count; i++)
5292                 kfree(ranges[i].bitmap);
5293 }
5294
5295 static int kvm_add_msr_filter(struct kvm *kvm, struct kvm_msr_filter_range *user_range)
5296 {
5297         struct msr_bitmap_range *ranges = kvm->arch.msr_filter.ranges;
5298         struct msr_bitmap_range range;
5299         unsigned long *bitmap = NULL;
5300         size_t bitmap_size;
5301         int r;
5302
5303         if (!user_range->nmsrs)
5304                 return 0;
5305
5306         bitmap_size = BITS_TO_LONGS(user_range->nmsrs) * sizeof(long);
5307         if (!bitmap_size || bitmap_size > KVM_MSR_FILTER_MAX_BITMAP_SIZE)
5308                 return -EINVAL;
5309
5310         bitmap = memdup_user((__user u8*)user_range->bitmap, bitmap_size);
5311         if (IS_ERR(bitmap))
5312                 return PTR_ERR(bitmap);
5313
5314         range = (struct msr_bitmap_range) {
5315                 .flags = user_range->flags,
5316                 .base = user_range->base,
5317                 .nmsrs = user_range->nmsrs,
5318                 .bitmap = bitmap,
5319         };
5320
5321         if (range.flags & ~(KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE)) {
5322                 r = -EINVAL;
5323                 goto err;
5324         }
5325
5326         if (!range.flags) {
5327                 r = -EINVAL;
5328                 goto err;
5329         }
5330
5331         /* Everything ok, add this range identifier to our global pool */
5332         ranges[kvm->arch.msr_filter.count] = range;
5333         /* Make sure we filled the array before we tell anyone to walk it */
5334         smp_wmb();
5335         kvm->arch.msr_filter.count++;
5336
5337         return 0;
5338 err:
5339         kfree(bitmap);
5340         return r;
5341 }
5342
5343 static int kvm_vm_ioctl_set_msr_filter(struct kvm *kvm, void __user *argp)
5344 {
5345         struct kvm_msr_filter __user *user_msr_filter = argp;
5346         struct kvm_msr_filter filter;
5347         bool default_allow;
5348         int r = 0;
5349         bool empty = true;
5350         u32 i;
5351
5352         if (copy_from_user(&filter, user_msr_filter, sizeof(filter)))
5353                 return -EFAULT;
5354
5355         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++)
5356                 empty &= !filter.ranges[i].nmsrs;
5357
5358         default_allow = !(filter.flags & KVM_MSR_FILTER_DEFAULT_DENY);
5359         if (empty && !default_allow)
5360                 return -EINVAL;
5361
5362         kvm_clear_msr_filter(kvm);
5363
5364         kvm->arch.msr_filter.default_allow = default_allow;
5365
5366         /*
5367          * Protect from concurrent calls to this function that could trigger
5368          * a TOCTOU violation on kvm->arch.msr_filter.count.
5369          */
5370         mutex_lock(&kvm->lock);
5371         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++) {
5372                 r = kvm_add_msr_filter(kvm, &filter.ranges[i]);
5373                 if (r)
5374                         break;
5375         }
5376
5377         kvm_make_all_cpus_request(kvm, KVM_REQ_MSR_FILTER_CHANGED);
5378         mutex_unlock(&kvm->lock);
5379
5380         return r;
5381 }
5382
5383 long kvm_arch_vm_ioctl(struct file *filp,
5384                        unsigned int ioctl, unsigned long arg)
5385 {
5386         struct kvm *kvm = filp->private_data;
5387         void __user *argp = (void __user *)arg;
5388         int r = -ENOTTY;
5389         /*
5390          * This union makes it completely explicit to gcc-3.x
5391          * that these two variables' stack usage should be
5392          * combined, not added together.
5393          */
5394         union {
5395                 struct kvm_pit_state ps;
5396                 struct kvm_pit_state2 ps2;
5397                 struct kvm_pit_config pit_config;
5398         } u;
5399
5400         switch (ioctl) {
5401         case KVM_SET_TSS_ADDR:
5402                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
5403                 break;
5404         case KVM_SET_IDENTITY_MAP_ADDR: {
5405                 u64 ident_addr;
5406
5407                 mutex_lock(&kvm->lock);
5408                 r = -EINVAL;
5409                 if (kvm->created_vcpus)
5410                         goto set_identity_unlock;
5411                 r = -EFAULT;
5412                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
5413                         goto set_identity_unlock;
5414                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
5415 set_identity_unlock:
5416                 mutex_unlock(&kvm->lock);
5417                 break;
5418         }
5419         case KVM_SET_NR_MMU_PAGES:
5420                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
5421                 break;
5422         case KVM_GET_NR_MMU_PAGES:
5423                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
5424                 break;
5425         case KVM_CREATE_IRQCHIP: {
5426                 mutex_lock(&kvm->lock);
5427
5428                 r = -EEXIST;
5429                 if (irqchip_in_kernel(kvm))
5430                         goto create_irqchip_unlock;
5431
5432                 r = -EINVAL;
5433                 if (kvm->created_vcpus)
5434                         goto create_irqchip_unlock;
5435
5436                 r = kvm_pic_init(kvm);
5437                 if (r)
5438                         goto create_irqchip_unlock;
5439
5440                 r = kvm_ioapic_init(kvm);
5441                 if (r) {
5442                         kvm_pic_destroy(kvm);
5443                         goto create_irqchip_unlock;
5444                 }
5445
5446                 r = kvm_setup_default_irq_routing(kvm);
5447                 if (r) {
5448                         kvm_ioapic_destroy(kvm);
5449                         kvm_pic_destroy(kvm);
5450                         goto create_irqchip_unlock;
5451                 }
5452                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
5453                 smp_wmb();
5454                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
5455         create_irqchip_unlock:
5456                 mutex_unlock(&kvm->lock);
5457                 break;
5458         }
5459         case KVM_CREATE_PIT:
5460                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
5461                 goto create_pit;
5462         case KVM_CREATE_PIT2:
5463                 r = -EFAULT;
5464                 if (copy_from_user(&u.pit_config, argp,
5465                                    sizeof(struct kvm_pit_config)))
5466                         goto out;
5467         create_pit:
5468                 mutex_lock(&kvm->lock);
5469                 r = -EEXIST;
5470                 if (kvm->arch.vpit)
5471                         goto create_pit_unlock;
5472                 r = -ENOMEM;
5473                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
5474                 if (kvm->arch.vpit)
5475                         r = 0;
5476         create_pit_unlock:
5477                 mutex_unlock(&kvm->lock);
5478                 break;
5479         case KVM_GET_IRQCHIP: {
5480                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5481                 struct kvm_irqchip *chip;
5482
5483                 chip = memdup_user(argp, sizeof(*chip));
5484                 if (IS_ERR(chip)) {
5485                         r = PTR_ERR(chip);
5486                         goto out;
5487                 }
5488
5489                 r = -ENXIO;
5490                 if (!irqchip_kernel(kvm))
5491                         goto get_irqchip_out;
5492                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
5493                 if (r)
5494                         goto get_irqchip_out;
5495                 r = -EFAULT;
5496                 if (copy_to_user(argp, chip, sizeof(*chip)))
5497                         goto get_irqchip_out;
5498                 r = 0;
5499         get_irqchip_out:
5500                 kfree(chip);
5501                 break;
5502         }
5503         case KVM_SET_IRQCHIP: {
5504                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5505                 struct kvm_irqchip *chip;
5506
5507                 chip = memdup_user(argp, sizeof(*chip));
5508                 if (IS_ERR(chip)) {
5509                         r = PTR_ERR(chip);
5510                         goto out;
5511                 }
5512
5513                 r = -ENXIO;
5514                 if (!irqchip_kernel(kvm))
5515                         goto set_irqchip_out;
5516                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
5517         set_irqchip_out:
5518                 kfree(chip);
5519                 break;
5520         }
5521         case KVM_GET_PIT: {
5522                 r = -EFAULT;
5523                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
5524                         goto out;
5525                 r = -ENXIO;
5526                 if (!kvm->arch.vpit)
5527                         goto out;
5528                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
5529                 if (r)
5530                         goto out;
5531                 r = -EFAULT;
5532                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
5533                         goto out;
5534                 r = 0;
5535                 break;
5536         }
5537         case KVM_SET_PIT: {
5538                 r = -EFAULT;
5539                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
5540                         goto out;
5541                 mutex_lock(&kvm->lock);
5542                 r = -ENXIO;
5543                 if (!kvm->arch.vpit)
5544                         goto set_pit_out;
5545                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
5546 set_pit_out:
5547                 mutex_unlock(&kvm->lock);
5548                 break;
5549         }
5550         case KVM_GET_PIT2: {
5551                 r = -ENXIO;
5552                 if (!kvm->arch.vpit)
5553                         goto out;
5554                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
5555                 if (r)
5556                         goto out;
5557                 r = -EFAULT;
5558                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
5559                         goto out;
5560                 r = 0;
5561                 break;
5562         }
5563         case KVM_SET_PIT2: {
5564                 r = -EFAULT;
5565                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
5566                         goto out;
5567                 mutex_lock(&kvm->lock);
5568                 r = -ENXIO;
5569                 if (!kvm->arch.vpit)
5570                         goto set_pit2_out;
5571                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
5572 set_pit2_out:
5573                 mutex_unlock(&kvm->lock);
5574                 break;
5575         }
5576         case KVM_REINJECT_CONTROL: {
5577                 struct kvm_reinject_control control;
5578                 r =  -EFAULT;
5579                 if (copy_from_user(&control, argp, sizeof(control)))
5580                         goto out;
5581                 r = -ENXIO;
5582                 if (!kvm->arch.vpit)
5583                         goto out;
5584                 r = kvm_vm_ioctl_reinject(kvm, &control);
5585                 break;
5586         }
5587         case KVM_SET_BOOT_CPU_ID:
5588                 r = 0;
5589                 mutex_lock(&kvm->lock);
5590                 if (kvm->created_vcpus)
5591                         r = -EBUSY;
5592                 else
5593                         kvm->arch.bsp_vcpu_id = arg;
5594                 mutex_unlock(&kvm->lock);
5595                 break;
5596         case KVM_XEN_HVM_CONFIG: {
5597                 struct kvm_xen_hvm_config xhc;
5598                 r = -EFAULT;
5599                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
5600                         goto out;
5601                 r = -EINVAL;
5602                 if (xhc.flags)
5603                         goto out;
5604                 memcpy(&kvm->arch.xen_hvm_config, &xhc, sizeof(xhc));
5605                 r = 0;
5606                 break;
5607         }
5608         case KVM_SET_CLOCK: {
5609                 struct kvm_clock_data user_ns;
5610                 u64 now_ns;
5611
5612                 r = -EFAULT;
5613                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
5614                         goto out;
5615
5616                 r = -EINVAL;
5617                 if (user_ns.flags)
5618                         goto out;
5619
5620                 r = 0;
5621                 /*
5622                  * TODO: userspace has to take care of races with VCPU_RUN, so
5623                  * kvm_gen_update_masterclock() can be cut down to locked
5624                  * pvclock_update_vm_gtod_copy().
5625                  */
5626                 kvm_gen_update_masterclock(kvm);
5627                 now_ns = get_kvmclock_ns(kvm);
5628                 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
5629                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
5630                 break;
5631         }
5632         case KVM_GET_CLOCK: {
5633                 struct kvm_clock_data user_ns;
5634                 u64 now_ns;
5635
5636                 now_ns = get_kvmclock_ns(kvm);
5637                 user_ns.clock = now_ns;
5638                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
5639                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
5640
5641                 r = -EFAULT;
5642                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
5643                         goto out;
5644                 r = 0;
5645                 break;
5646         }
5647         case KVM_MEMORY_ENCRYPT_OP: {
5648                 r = -ENOTTY;
5649                 if (kvm_x86_ops.mem_enc_op)
5650                         r = kvm_x86_ops.mem_enc_op(kvm, argp);
5651                 break;
5652         }
5653         case KVM_MEMORY_ENCRYPT_REG_REGION: {
5654                 struct kvm_enc_region region;
5655
5656                 r = -EFAULT;
5657                 if (copy_from_user(&region, argp, sizeof(region)))
5658                         goto out;
5659
5660                 r = -ENOTTY;
5661                 if (kvm_x86_ops.mem_enc_reg_region)
5662                         r = kvm_x86_ops.mem_enc_reg_region(kvm, &region);
5663                 break;
5664         }
5665         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
5666                 struct kvm_enc_region region;
5667
5668                 r = -EFAULT;
5669                 if (copy_from_user(&region, argp, sizeof(region)))
5670                         goto out;
5671
5672                 r = -ENOTTY;
5673                 if (kvm_x86_ops.mem_enc_unreg_region)
5674                         r = kvm_x86_ops.mem_enc_unreg_region(kvm, &region);
5675                 break;
5676         }
5677         case KVM_HYPERV_EVENTFD: {
5678                 struct kvm_hyperv_eventfd hvevfd;
5679
5680                 r = -EFAULT;
5681                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
5682                         goto out;
5683                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
5684                 break;
5685         }
5686         case KVM_SET_PMU_EVENT_FILTER:
5687                 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
5688                 break;
5689         case KVM_X86_SET_MSR_FILTER:
5690                 r = kvm_vm_ioctl_set_msr_filter(kvm, argp);
5691                 break;
5692         default:
5693                 r = -ENOTTY;
5694         }
5695 out:
5696         return r;
5697 }
5698
5699 static void kvm_init_msr_list(void)
5700 {
5701         struct x86_pmu_capability x86_pmu;
5702         u32 dummy[2];
5703         unsigned i;
5704
5705         BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
5706                          "Please update the fixed PMCs in msrs_to_saved_all[]");
5707
5708         perf_get_x86_pmu_capability(&x86_pmu);
5709
5710         num_msrs_to_save = 0;
5711         num_emulated_msrs = 0;
5712         num_msr_based_features = 0;
5713
5714         for (i = 0; i < ARRAY_SIZE(msrs_to_save_all); i++) {
5715                 if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
5716                         continue;
5717
5718                 /*
5719                  * Even MSRs that are valid in the host may not be exposed
5720                  * to the guests in some cases.
5721                  */
5722                 switch (msrs_to_save_all[i]) {
5723                 case MSR_IA32_BNDCFGS:
5724                         if (!kvm_mpx_supported())
5725                                 continue;
5726                         break;
5727                 case MSR_TSC_AUX:
5728                         if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP))
5729                                 continue;
5730                         break;
5731                 case MSR_IA32_UMWAIT_CONTROL:
5732                         if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG))
5733                                 continue;
5734                         break;
5735                 case MSR_IA32_RTIT_CTL:
5736                 case MSR_IA32_RTIT_STATUS:
5737                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT))
5738                                 continue;
5739                         break;
5740                 case MSR_IA32_RTIT_CR3_MATCH:
5741                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
5742                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
5743                                 continue;
5744                         break;
5745                 case MSR_IA32_RTIT_OUTPUT_BASE:
5746                 case MSR_IA32_RTIT_OUTPUT_MASK:
5747                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
5748                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
5749                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
5750                                 continue;
5751                         break;
5752                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
5753                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
5754                                 msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=
5755                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
5756                                 continue;
5757                         break;
5758                 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
5759                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
5760                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
5761                                 continue;
5762                         break;
5763                 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
5764                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
5765                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
5766                                 continue;
5767                         break;
5768                 default:
5769                         break;
5770                 }
5771
5772                 msrs_to_save[num_msrs_to_save++] = msrs_to_save_all[i];
5773         }
5774
5775         for (i = 0; i < ARRAY_SIZE(emulated_msrs_all); i++) {
5776                 if (!kvm_x86_ops.has_emulated_msr(emulated_msrs_all[i]))
5777                         continue;
5778
5779                 emulated_msrs[num_emulated_msrs++] = emulated_msrs_all[i];
5780         }
5781
5782         for (i = 0; i < ARRAY_SIZE(msr_based_features_all); i++) {
5783                 struct kvm_msr_entry msr;
5784
5785                 msr.index = msr_based_features_all[i];
5786                 if (kvm_get_msr_feature(&msr))
5787                         continue;
5788
5789                 msr_based_features[num_msr_based_features++] = msr_based_features_all[i];
5790         }
5791 }
5792
5793 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
5794                            const void *v)
5795 {
5796         int handled = 0;
5797         int n;
5798
5799         do {
5800                 n = min(len, 8);
5801                 if (!(lapic_in_kernel(vcpu) &&
5802                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
5803                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
5804                         break;
5805                 handled += n;
5806                 addr += n;
5807                 len -= n;
5808                 v += n;
5809         } while (len);
5810
5811         return handled;
5812 }
5813
5814 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
5815 {
5816         int handled = 0;
5817         int n;
5818
5819         do {
5820                 n = min(len, 8);
5821                 if (!(lapic_in_kernel(vcpu) &&
5822                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
5823                                          addr, n, v))
5824                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
5825                         break;
5826                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
5827                 handled += n;
5828                 addr += n;
5829                 len -= n;
5830                 v += n;
5831         } while (len);
5832
5833         return handled;
5834 }
5835
5836 static void kvm_set_segment(struct kvm_vcpu *vcpu,
5837                         struct kvm_segment *var, int seg)
5838 {
5839         kvm_x86_ops.set_segment(vcpu, var, seg);
5840 }
5841
5842 void kvm_get_segment(struct kvm_vcpu *vcpu,
5843                      struct kvm_segment *var, int seg)
5844 {
5845         kvm_x86_ops.get_segment(vcpu, var, seg);
5846 }
5847
5848 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
5849                            struct x86_exception *exception)
5850 {
5851         gpa_t t_gpa;
5852
5853         BUG_ON(!mmu_is_nested(vcpu));
5854
5855         /* NPT walks are always user-walks */
5856         access |= PFERR_USER_MASK;
5857         t_gpa  = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
5858
5859         return t_gpa;
5860 }
5861
5862 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
5863                               struct x86_exception *exception)
5864 {
5865         u32 access = (kvm_x86_ops.get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5866         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5867 }
5868
5869  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
5870                                 struct x86_exception *exception)
5871 {
5872         u32 access = (kvm_x86_ops.get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5873         access |= PFERR_FETCH_MASK;
5874         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5875 }
5876
5877 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
5878                                struct x86_exception *exception)
5879 {
5880         u32 access = (kvm_x86_ops.get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5881         access |= PFERR_WRITE_MASK;
5882         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5883 }
5884
5885 /* uses this to access any guest's mapped memory without checking CPL */
5886 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
5887                                 struct x86_exception *exception)
5888 {
5889         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
5890 }
5891
5892 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
5893                                       struct kvm_vcpu *vcpu, u32 access,
5894                                       struct x86_exception *exception)
5895 {
5896         void *data = val;
5897         int r = X86EMUL_CONTINUE;
5898
5899         while (bytes) {
5900                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
5901                                                             exception);
5902                 unsigned offset = addr & (PAGE_SIZE-1);
5903                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
5904                 int ret;
5905
5906                 if (gpa == UNMAPPED_GVA)
5907                         return X86EMUL_PROPAGATE_FAULT;
5908                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
5909                                                offset, toread);
5910                 if (ret < 0) {
5911                         r = X86EMUL_IO_NEEDED;
5912                         goto out;
5913                 }
5914
5915                 bytes -= toread;
5916                 data += toread;
5917                 addr += toread;
5918         }
5919 out:
5920         return r;
5921 }
5922
5923 /* used for instruction fetching */
5924 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
5925                                 gva_t addr, void *val, unsigned int bytes,
5926                                 struct x86_exception *exception)
5927 {
5928         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5929         u32 access = (kvm_x86_ops.get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5930         unsigned offset;
5931         int ret;
5932
5933         /* Inline kvm_read_guest_virt_helper for speed.  */
5934         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
5935                                                     exception);
5936         if (unlikely(gpa == UNMAPPED_GVA))
5937                 return X86EMUL_PROPAGATE_FAULT;
5938
5939         offset = addr & (PAGE_SIZE-1);
5940         if (WARN_ON(offset + bytes > PAGE_SIZE))
5941                 bytes = (unsigned)PAGE_SIZE - offset;
5942         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
5943                                        offset, bytes);
5944         if (unlikely(ret < 0))
5945                 return X86EMUL_IO_NEEDED;
5946
5947         return X86EMUL_CONTINUE;
5948 }
5949
5950 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
5951                                gva_t addr, void *val, unsigned int bytes,
5952                                struct x86_exception *exception)
5953 {
5954         u32 access = (kvm_x86_ops.get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5955
5956         /*
5957          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
5958          * is returned, but our callers are not ready for that and they blindly
5959          * call kvm_inject_page_fault.  Ensure that they at least do not leak
5960          * uninitialized kernel stack memory into cr2 and error code.
5961          */
5962         memset(exception, 0, sizeof(*exception));
5963         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
5964                                           exception);
5965 }
5966 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
5967
5968 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
5969                              gva_t addr, void *val, unsigned int bytes,
5970                              struct x86_exception *exception, bool system)
5971 {
5972         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5973         u32 access = 0;
5974
5975         if (!system && kvm_x86_ops.get_cpl(vcpu) == 3)
5976                 access |= PFERR_USER_MASK;
5977
5978         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
5979 }
5980
5981 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
5982                 unsigned long addr, void *val, unsigned int bytes)
5983 {
5984         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5985         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
5986
5987         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
5988 }
5989
5990 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
5991                                       struct kvm_vcpu *vcpu, u32 access,
5992                                       struct x86_exception *exception)
5993 {
5994         void *data = val;
5995         int r = X86EMUL_CONTINUE;
5996
5997         while (bytes) {
5998                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
5999                                                              access,
6000                                                              exception);
6001                 unsigned offset = addr & (PAGE_SIZE-1);
6002                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
6003                 int ret;
6004
6005                 if (gpa == UNMAPPED_GVA)
6006                         return X86EMUL_PROPAGATE_FAULT;
6007                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
6008                 if (ret < 0) {
6009                         r = X86EMUL_IO_NEEDED;
6010                         goto out;
6011                 }
6012
6013                 bytes -= towrite;
6014                 data += towrite;
6015                 addr += towrite;
6016         }
6017 out:
6018         return r;
6019 }
6020
6021 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
6022                               unsigned int bytes, struct x86_exception *exception,
6023                               bool system)
6024 {
6025         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6026         u32 access = PFERR_WRITE_MASK;
6027
6028         if (!system && kvm_x86_ops.get_cpl(vcpu) == 3)
6029                 access |= PFERR_USER_MASK;
6030
6031         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6032                                            access, exception);
6033 }
6034
6035 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
6036                                 unsigned int bytes, struct x86_exception *exception)
6037 {
6038         /* kvm_write_guest_virt_system can pull in tons of pages. */
6039         vcpu->arch.l1tf_flush_l1d = true;
6040
6041         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6042                                            PFERR_WRITE_MASK, exception);
6043 }
6044 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
6045
6046 int handle_ud(struct kvm_vcpu *vcpu)
6047 {
6048         static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
6049         int emul_type = EMULTYPE_TRAP_UD;
6050         char sig[5]; /* ud2; .ascii "kvm" */
6051         struct x86_exception e;
6052
6053         if (unlikely(!kvm_x86_ops.can_emulate_instruction(vcpu, NULL, 0)))
6054                 return 1;
6055
6056         if (force_emulation_prefix &&
6057             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
6058                                 sig, sizeof(sig), &e) == 0 &&
6059             memcmp(sig, kvm_emulate_prefix, sizeof(sig)) == 0) {
6060                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
6061                 emul_type = EMULTYPE_TRAP_UD_FORCED;
6062         }
6063
6064         return kvm_emulate_instruction(vcpu, emul_type);
6065 }
6066 EXPORT_SYMBOL_GPL(handle_ud);
6067
6068 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6069                             gpa_t gpa, bool write)
6070 {
6071         /* For APIC access vmexit */
6072         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6073                 return 1;
6074
6075         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
6076                 trace_vcpu_match_mmio(gva, gpa, write, true);
6077                 return 1;
6078         }
6079
6080         return 0;
6081 }
6082
6083 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6084                                 gpa_t *gpa, struct x86_exception *exception,
6085                                 bool write)
6086 {
6087         u32 access = ((kvm_x86_ops.get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
6088                 | (write ? PFERR_WRITE_MASK : 0);
6089
6090         /*
6091          * currently PKRU is only applied to ept enabled guest so
6092          * there is no pkey in EPT page table for L1 guest or EPT
6093          * shadow page table for L2 guest.
6094          */
6095         if (vcpu_match_mmio_gva(vcpu, gva)
6096             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
6097                                  vcpu->arch.mmio_access, 0, access)) {
6098                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
6099                                         (gva & (PAGE_SIZE - 1));
6100                 trace_vcpu_match_mmio(gva, *gpa, write, false);
6101                 return 1;
6102         }
6103
6104         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6105
6106         if (*gpa == UNMAPPED_GVA)
6107                 return -1;
6108
6109         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
6110 }
6111
6112 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
6113                         const void *val, int bytes)
6114 {
6115         int ret;
6116
6117         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
6118         if (ret < 0)
6119                 return 0;
6120         kvm_page_track_write(vcpu, gpa, val, bytes);
6121         return 1;
6122 }
6123
6124 struct read_write_emulator_ops {
6125         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
6126                                   int bytes);
6127         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
6128                                   void *val, int bytes);
6129         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6130                                int bytes, void *val);
6131         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6132                                     void *val, int bytes);
6133         bool write;
6134 };
6135
6136 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
6137 {
6138         if (vcpu->mmio_read_completed) {
6139                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
6140                                vcpu->mmio_fragments[0].gpa, val);
6141                 vcpu->mmio_read_completed = 0;
6142                 return 1;
6143         }
6144
6145         return 0;
6146 }
6147
6148 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6149                         void *val, int bytes)
6150 {
6151         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
6152 }
6153
6154 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6155                          void *val, int bytes)
6156 {
6157         return emulator_write_phys(vcpu, gpa, val, bytes);
6158 }
6159
6160 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
6161 {
6162         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
6163         return vcpu_mmio_write(vcpu, gpa, bytes, val);
6164 }
6165
6166 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6167                           void *val, int bytes)
6168 {
6169         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
6170         return X86EMUL_IO_NEEDED;
6171 }
6172
6173 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6174                            void *val, int bytes)
6175 {
6176         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
6177
6178         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
6179         return X86EMUL_CONTINUE;
6180 }
6181
6182 static const struct read_write_emulator_ops read_emultor = {
6183         .read_write_prepare = read_prepare,
6184         .read_write_emulate = read_emulate,
6185         .read_write_mmio = vcpu_mmio_read,
6186         .read_write_exit_mmio = read_exit_mmio,
6187 };
6188
6189 static const struct read_write_emulator_ops write_emultor = {
6190         .read_write_emulate = write_emulate,
6191         .read_write_mmio = write_mmio,
6192         .read_write_exit_mmio = write_exit_mmio,
6193         .write = true,
6194 };
6195
6196 static int emulator_read_write_onepage(unsigned long addr, void *val,
6197                                        unsigned int bytes,
6198                                        struct x86_exception *exception,
6199                                        struct kvm_vcpu *vcpu,
6200                                        const struct read_write_emulator_ops *ops)
6201 {
6202         gpa_t gpa;
6203         int handled, ret;
6204         bool write = ops->write;
6205         struct kvm_mmio_fragment *frag;
6206         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6207
6208         /*
6209          * If the exit was due to a NPF we may already have a GPA.
6210          * If the GPA is present, use it to avoid the GVA to GPA table walk.
6211          * Note, this cannot be used on string operations since string
6212          * operation using rep will only have the initial GPA from the NPF
6213          * occurred.
6214          */
6215         if (ctxt->gpa_available && emulator_can_use_gpa(ctxt) &&
6216             (addr & ~PAGE_MASK) == (ctxt->gpa_val & ~PAGE_MASK)) {
6217                 gpa = ctxt->gpa_val;
6218                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
6219         } else {
6220                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
6221                 if (ret < 0)
6222                         return X86EMUL_PROPAGATE_FAULT;
6223         }
6224
6225         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
6226                 return X86EMUL_CONTINUE;
6227
6228         /*
6229          * Is this MMIO handled locally?
6230          */
6231         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
6232         if (handled == bytes)
6233                 return X86EMUL_CONTINUE;
6234
6235         gpa += handled;
6236         bytes -= handled;
6237         val += handled;
6238
6239         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
6240         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
6241         frag->gpa = gpa;
6242         frag->data = val;
6243         frag->len = bytes;
6244         return X86EMUL_CONTINUE;
6245 }
6246
6247 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
6248                         unsigned long addr,
6249                         void *val, unsigned int bytes,
6250                         struct x86_exception *exception,
6251                         const struct read_write_emulator_ops *ops)
6252 {
6253         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6254         gpa_t gpa;
6255         int rc;
6256
6257         if (ops->read_write_prepare &&
6258                   ops->read_write_prepare(vcpu, val, bytes))
6259                 return X86EMUL_CONTINUE;
6260
6261         vcpu->mmio_nr_fragments = 0;
6262
6263         /* Crossing a page boundary? */
6264         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
6265                 int now;
6266
6267                 now = -addr & ~PAGE_MASK;
6268                 rc = emulator_read_write_onepage(addr, val, now, exception,
6269                                                  vcpu, ops);
6270
6271                 if (rc != X86EMUL_CONTINUE)
6272                         return rc;
6273                 addr += now;
6274                 if (ctxt->mode != X86EMUL_MODE_PROT64)
6275                         addr = (u32)addr;
6276                 val += now;
6277                 bytes -= now;
6278         }
6279
6280         rc = emulator_read_write_onepage(addr, val, bytes, exception,
6281                                          vcpu, ops);
6282         if (rc != X86EMUL_CONTINUE)
6283                 return rc;
6284
6285         if (!vcpu->mmio_nr_fragments)
6286                 return rc;
6287
6288         gpa = vcpu->mmio_fragments[0].gpa;
6289
6290         vcpu->mmio_needed = 1;
6291         vcpu->mmio_cur_fragment = 0;
6292
6293         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
6294         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
6295         vcpu->run->exit_reason = KVM_EXIT_MMIO;
6296         vcpu->run->mmio.phys_addr = gpa;
6297
6298         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
6299 }
6300
6301 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
6302                                   unsigned long addr,
6303                                   void *val,
6304                                   unsigned int bytes,
6305                                   struct x86_exception *exception)
6306 {
6307         return emulator_read_write(ctxt, addr, val, bytes,
6308                                    exception, &read_emultor);
6309 }
6310
6311 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
6312                             unsigned long addr,
6313                             const void *val,
6314                             unsigned int bytes,
6315                             struct x86_exception *exception)
6316 {
6317         return emulator_read_write(ctxt, addr, (void *)val, bytes,
6318                                    exception, &write_emultor);
6319 }
6320
6321 #define CMPXCHG_TYPE(t, ptr, old, new) \
6322         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
6323
6324 #ifdef CONFIG_X86_64
6325 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
6326 #else
6327 #  define CMPXCHG64(ptr, old, new) \
6328         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
6329 #endif
6330
6331 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
6332                                      unsigned long addr,
6333                                      const void *old,
6334                                      const void *new,
6335                                      unsigned int bytes,
6336                                      struct x86_exception *exception)
6337 {
6338         struct kvm_host_map map;
6339         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6340         u64 page_line_mask;
6341         gpa_t gpa;
6342         char *kaddr;
6343         bool exchanged;
6344
6345         /* guests cmpxchg8b have to be emulated atomically */
6346         if (bytes > 8 || (bytes & (bytes - 1)))
6347                 goto emul_write;
6348
6349         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
6350
6351         if (gpa == UNMAPPED_GVA ||
6352             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6353                 goto emul_write;
6354
6355         /*
6356          * Emulate the atomic as a straight write to avoid #AC if SLD is
6357          * enabled in the host and the access splits a cache line.
6358          */
6359         if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT))
6360                 page_line_mask = ~(cache_line_size() - 1);
6361         else
6362                 page_line_mask = PAGE_MASK;
6363
6364         if (((gpa + bytes - 1) & page_line_mask) != (gpa & page_line_mask))
6365                 goto emul_write;
6366
6367         if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
6368                 goto emul_write;
6369
6370         kaddr = map.hva + offset_in_page(gpa);
6371
6372         switch (bytes) {
6373         case 1:
6374                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
6375                 break;
6376         case 2:
6377                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
6378                 break;
6379         case 4:
6380                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
6381                 break;
6382         case 8:
6383                 exchanged = CMPXCHG64(kaddr, old, new);
6384                 break;
6385         default:
6386                 BUG();
6387         }
6388
6389         kvm_vcpu_unmap(vcpu, &map, true);
6390
6391         if (!exchanged)
6392                 return X86EMUL_CMPXCHG_FAILED;
6393
6394         kvm_page_track_write(vcpu, gpa, new, bytes);
6395
6396         return X86EMUL_CONTINUE;
6397
6398 emul_write:
6399         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
6400
6401         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
6402 }
6403
6404 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
6405 {
6406         int r = 0, i;
6407
6408         for (i = 0; i < vcpu->arch.pio.count; i++) {
6409                 if (vcpu->arch.pio.in)
6410                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
6411                                             vcpu->arch.pio.size, pd);
6412                 else
6413                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
6414                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
6415                                              pd);
6416                 if (r)
6417                         break;
6418                 pd += vcpu->arch.pio.size;
6419         }
6420         return r;
6421 }
6422
6423 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
6424                                unsigned short port, void *val,
6425                                unsigned int count, bool in)
6426 {
6427         vcpu->arch.pio.port = port;
6428         vcpu->arch.pio.in = in;
6429         vcpu->arch.pio.count  = count;
6430         vcpu->arch.pio.size = size;
6431
6432         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
6433                 vcpu->arch.pio.count = 0;
6434                 return 1;
6435         }
6436
6437         vcpu->run->exit_reason = KVM_EXIT_IO;
6438         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
6439         vcpu->run->io.size = size;
6440         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
6441         vcpu->run->io.count = count;
6442         vcpu->run->io.port = port;
6443
6444         return 0;
6445 }
6446
6447 static int emulator_pio_in(struct kvm_vcpu *vcpu, int size,
6448                            unsigned short port, void *val, unsigned int count)
6449 {
6450         int ret;
6451
6452         if (vcpu->arch.pio.count)
6453                 goto data_avail;
6454
6455         memset(vcpu->arch.pio_data, 0, size * count);
6456
6457         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
6458         if (ret) {
6459 data_avail:
6460                 memcpy(val, vcpu->arch.pio_data, size * count);
6461                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
6462                 vcpu->arch.pio.count = 0;
6463                 return 1;
6464         }
6465
6466         return 0;
6467 }
6468
6469 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
6470                                     int size, unsigned short port, void *val,
6471                                     unsigned int count)
6472 {
6473         return emulator_pio_in(emul_to_vcpu(ctxt), size, port, val, count);
6474
6475 }
6476
6477 static int emulator_pio_out(struct kvm_vcpu *vcpu, int size,
6478                             unsigned short port, const void *val,
6479                             unsigned int count)
6480 {
6481         memcpy(vcpu->arch.pio_data, val, size * count);
6482         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
6483         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
6484 }
6485
6486 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
6487                                      int size, unsigned short port,
6488                                      const void *val, unsigned int count)
6489 {
6490         return emulator_pio_out(emul_to_vcpu(ctxt), size, port, val, count);
6491 }
6492
6493 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
6494 {
6495         return kvm_x86_ops.get_segment_base(vcpu, seg);
6496 }
6497
6498 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
6499 {
6500         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
6501 }
6502
6503 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
6504 {
6505         if (!need_emulate_wbinvd(vcpu))
6506                 return X86EMUL_CONTINUE;
6507
6508         if (kvm_x86_ops.has_wbinvd_exit()) {
6509                 int cpu = get_cpu();
6510
6511                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
6512                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
6513                                 wbinvd_ipi, NULL, 1);
6514                 put_cpu();
6515                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
6516         } else
6517                 wbinvd();
6518         return X86EMUL_CONTINUE;
6519 }
6520
6521 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
6522 {
6523         kvm_emulate_wbinvd_noskip(vcpu);
6524         return kvm_skip_emulated_instruction(vcpu);
6525 }
6526 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
6527
6528
6529
6530 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
6531 {
6532         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
6533 }
6534
6535 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
6536                            unsigned long *dest)
6537 {
6538         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
6539 }
6540
6541 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
6542                            unsigned long value)
6543 {
6544
6545         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
6546 }
6547
6548 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
6549 {
6550         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
6551 }
6552
6553 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
6554 {
6555         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6556         unsigned long value;
6557
6558         switch (cr) {
6559         case 0:
6560                 value = kvm_read_cr0(vcpu);
6561                 break;
6562         case 2:
6563                 value = vcpu->arch.cr2;
6564                 break;
6565         case 3:
6566                 value = kvm_read_cr3(vcpu);
6567                 break;
6568         case 4:
6569                 value = kvm_read_cr4(vcpu);
6570                 break;
6571         case 8:
6572                 value = kvm_get_cr8(vcpu);
6573                 break;
6574         default:
6575                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
6576                 return 0;
6577         }
6578
6579         return value;
6580 }
6581
6582 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
6583 {
6584         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6585         int res = 0;
6586
6587         switch (cr) {
6588         case 0:
6589                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
6590                 break;
6591         case 2:
6592                 vcpu->arch.cr2 = val;
6593                 break;
6594         case 3:
6595                 res = kvm_set_cr3(vcpu, val);
6596                 break;
6597         case 4:
6598                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
6599                 break;
6600         case 8:
6601                 res = kvm_set_cr8(vcpu, val);
6602                 break;
6603         default:
6604                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
6605                 res = -1;
6606         }
6607
6608         return res;
6609 }
6610
6611 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
6612 {
6613         return kvm_x86_ops.get_cpl(emul_to_vcpu(ctxt));
6614 }
6615
6616 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6617 {
6618         kvm_x86_ops.get_gdt(emul_to_vcpu(ctxt), dt);
6619 }
6620
6621 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6622 {
6623         kvm_x86_ops.get_idt(emul_to_vcpu(ctxt), dt);
6624 }
6625
6626 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6627 {
6628         kvm_x86_ops.set_gdt(emul_to_vcpu(ctxt), dt);
6629 }
6630
6631 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6632 {
6633         kvm_x86_ops.set_idt(emul_to_vcpu(ctxt), dt);
6634 }
6635
6636 static unsigned long emulator_get_cached_segment_base(
6637         struct x86_emulate_ctxt *ctxt, int seg)
6638 {
6639         return get_segment_base(emul_to_vcpu(ctxt), seg);
6640 }
6641
6642 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
6643                                  struct desc_struct *desc, u32 *base3,
6644                                  int seg)
6645 {
6646         struct kvm_segment var;
6647
6648         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
6649         *selector = var.selector;
6650
6651         if (var.unusable) {
6652                 memset(desc, 0, sizeof(*desc));
6653                 if (base3)
6654                         *base3 = 0;
6655                 return false;
6656         }
6657
6658         if (var.g)
6659                 var.limit >>= 12;
6660         set_desc_limit(desc, var.limit);
6661         set_desc_base(desc, (unsigned long)var.base);
6662 #ifdef CONFIG_X86_64
6663         if (base3)
6664                 *base3 = var.base >> 32;
6665 #endif
6666         desc->type = var.type;
6667         desc->s = var.s;
6668         desc->dpl = var.dpl;
6669         desc->p = var.present;
6670         desc->avl = var.avl;
6671         desc->l = var.l;
6672         desc->d = var.db;
6673         desc->g = var.g;
6674
6675         return true;
6676 }
6677
6678 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
6679                                  struct desc_struct *desc, u32 base3,
6680                                  int seg)
6681 {
6682         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6683         struct kvm_segment var;
6684
6685         var.selector = selector;
6686         var.base = get_desc_base(desc);
6687 #ifdef CONFIG_X86_64
6688         var.base |= ((u64)base3) << 32;
6689 #endif
6690         var.limit = get_desc_limit(desc);
6691         if (desc->g)
6692                 var.limit = (var.limit << 12) | 0xfff;
6693         var.type = desc->type;
6694         var.dpl = desc->dpl;
6695         var.db = desc->d;
6696         var.s = desc->s;
6697         var.l = desc->l;
6698         var.g = desc->g;
6699         var.avl = desc->avl;
6700         var.present = desc->p;
6701         var.unusable = !var.present;
6702         var.padding = 0;
6703
6704         kvm_set_segment(vcpu, &var, seg);
6705         return;
6706 }
6707
6708 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
6709                             u32 msr_index, u64 *pdata)
6710 {
6711         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6712         int r;
6713
6714         r = kvm_get_msr(vcpu, msr_index, pdata);
6715
6716         if (r && kvm_get_msr_user_space(vcpu, msr_index, r)) {
6717                 /* Bounce to user space */
6718                 return X86EMUL_IO_NEEDED;
6719         }
6720
6721         return r;
6722 }
6723
6724 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
6725                             u32 msr_index, u64 data)
6726 {
6727         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6728         int r;
6729
6730         r = kvm_set_msr(vcpu, msr_index, data);
6731
6732         if (r && kvm_set_msr_user_space(vcpu, msr_index, data, r)) {
6733                 /* Bounce to user space */
6734                 return X86EMUL_IO_NEEDED;
6735         }
6736
6737         return r;
6738 }
6739
6740 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
6741 {
6742         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6743
6744         return vcpu->arch.smbase;
6745 }
6746
6747 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
6748 {
6749         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6750
6751         vcpu->arch.smbase = smbase;
6752 }
6753
6754 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
6755                               u32 pmc)
6756 {
6757         return kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt), pmc);
6758 }
6759
6760 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
6761                              u32 pmc, u64 *pdata)
6762 {
6763         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
6764 }
6765
6766 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
6767 {
6768         emul_to_vcpu(ctxt)->arch.halt_request = 1;
6769 }
6770
6771 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
6772                               struct x86_instruction_info *info,
6773                               enum x86_intercept_stage stage)
6774 {
6775         return kvm_x86_ops.check_intercept(emul_to_vcpu(ctxt), info, stage,
6776                                             &ctxt->exception);
6777 }
6778
6779 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
6780                               u32 *eax, u32 *ebx, u32 *ecx, u32 *edx,
6781                               bool exact_only)
6782 {
6783         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, exact_only);
6784 }
6785
6786 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt *ctxt)
6787 {
6788         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_LM);
6789 }
6790
6791 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt *ctxt)
6792 {
6793         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_MOVBE);
6794 }
6795
6796 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)
6797 {
6798         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_FXSR);
6799 }
6800
6801 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
6802 {
6803         return kvm_register_read(emul_to_vcpu(ctxt), reg);
6804 }
6805
6806 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
6807 {
6808         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
6809 }
6810
6811 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
6812 {
6813         kvm_x86_ops.set_nmi_mask(emul_to_vcpu(ctxt), masked);
6814 }
6815
6816 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
6817 {
6818         return emul_to_vcpu(ctxt)->arch.hflags;
6819 }
6820
6821 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
6822 {
6823         emul_to_vcpu(ctxt)->arch.hflags = emul_flags;
6824 }
6825
6826 static int emulator_pre_leave_smm(struct x86_emulate_ctxt *ctxt,
6827                                   const char *smstate)
6828 {
6829         return kvm_x86_ops.pre_leave_smm(emul_to_vcpu(ctxt), smstate);
6830 }
6831
6832 static void emulator_post_leave_smm(struct x86_emulate_ctxt *ctxt)
6833 {
6834         kvm_smm_changed(emul_to_vcpu(ctxt));
6835 }
6836
6837 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
6838 {
6839         return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
6840 }
6841
6842 static const struct x86_emulate_ops emulate_ops = {
6843         .read_gpr            = emulator_read_gpr,
6844         .write_gpr           = emulator_write_gpr,
6845         .read_std            = emulator_read_std,
6846         .write_std           = emulator_write_std,
6847         .read_phys           = kvm_read_guest_phys_system,
6848         .fetch               = kvm_fetch_guest_virt,
6849         .read_emulated       = emulator_read_emulated,
6850         .write_emulated      = emulator_write_emulated,
6851         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
6852         .invlpg              = emulator_invlpg,
6853         .pio_in_emulated     = emulator_pio_in_emulated,
6854         .pio_out_emulated    = emulator_pio_out_emulated,
6855         .get_segment         = emulator_get_segment,
6856         .set_segment         = emulator_set_segment,
6857         .get_cached_segment_base = emulator_get_cached_segment_base,
6858         .get_gdt             = emulator_get_gdt,
6859         .get_idt             = emulator_get_idt,
6860         .set_gdt             = emulator_set_gdt,
6861         .set_idt             = emulator_set_idt,
6862         .get_cr              = emulator_get_cr,
6863         .set_cr              = emulator_set_cr,
6864         .cpl                 = emulator_get_cpl,
6865         .get_dr              = emulator_get_dr,
6866         .set_dr              = emulator_set_dr,
6867         .get_smbase          = emulator_get_smbase,
6868         .set_smbase          = emulator_set_smbase,
6869         .set_msr             = emulator_set_msr,
6870         .get_msr             = emulator_get_msr,
6871         .check_pmc           = emulator_check_pmc,
6872         .read_pmc            = emulator_read_pmc,
6873         .halt                = emulator_halt,
6874         .wbinvd              = emulator_wbinvd,
6875         .fix_hypercall       = emulator_fix_hypercall,
6876         .intercept           = emulator_intercept,
6877         .get_cpuid           = emulator_get_cpuid,
6878         .guest_has_long_mode = emulator_guest_has_long_mode,
6879         .guest_has_movbe     = emulator_guest_has_movbe,
6880         .guest_has_fxsr      = emulator_guest_has_fxsr,
6881         .set_nmi_mask        = emulator_set_nmi_mask,
6882         .get_hflags          = emulator_get_hflags,
6883         .set_hflags          = emulator_set_hflags,
6884         .pre_leave_smm       = emulator_pre_leave_smm,
6885         .post_leave_smm      = emulator_post_leave_smm,
6886         .set_xcr             = emulator_set_xcr,
6887 };
6888
6889 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
6890 {
6891         u32 int_shadow = kvm_x86_ops.get_interrupt_shadow(vcpu);
6892         /*
6893          * an sti; sti; sequence only disable interrupts for the first
6894          * instruction. So, if the last instruction, be it emulated or
6895          * not, left the system with the INT_STI flag enabled, it
6896          * means that the last instruction is an sti. We should not
6897          * leave the flag on in this case. The same goes for mov ss
6898          */
6899         if (int_shadow & mask)
6900                 mask = 0;
6901         if (unlikely(int_shadow || mask)) {
6902                 kvm_x86_ops.set_interrupt_shadow(vcpu, mask);
6903                 if (!mask)
6904                         kvm_make_request(KVM_REQ_EVENT, vcpu);
6905         }
6906 }
6907
6908 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
6909 {
6910         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6911         if (ctxt->exception.vector == PF_VECTOR)
6912                 return kvm_inject_emulated_page_fault(vcpu, &ctxt->exception);
6913
6914         if (ctxt->exception.error_code_valid)
6915                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
6916                                       ctxt->exception.error_code);
6917         else
6918                 kvm_queue_exception(vcpu, ctxt->exception.vector);
6919         return false;
6920 }
6921
6922 static struct x86_emulate_ctxt *alloc_emulate_ctxt(struct kvm_vcpu *vcpu)
6923 {
6924         struct x86_emulate_ctxt *ctxt;
6925
6926         ctxt = kmem_cache_zalloc(x86_emulator_cache, GFP_KERNEL_ACCOUNT);
6927         if (!ctxt) {
6928                 pr_err("kvm: failed to allocate vcpu's emulator\n");
6929                 return NULL;
6930         }
6931
6932         ctxt->vcpu = vcpu;
6933         ctxt->ops = &emulate_ops;
6934         vcpu->arch.emulate_ctxt = ctxt;
6935
6936         return ctxt;
6937 }
6938
6939 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
6940 {
6941         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6942         int cs_db, cs_l;
6943
6944         kvm_x86_ops.get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
6945
6946         ctxt->gpa_available = false;
6947         ctxt->eflags = kvm_get_rflags(vcpu);
6948         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
6949
6950         ctxt->eip = kvm_rip_read(vcpu);
6951         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
6952                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
6953                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
6954                      cs_db                              ? X86EMUL_MODE_PROT32 :
6955                                                           X86EMUL_MODE_PROT16;
6956         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
6957         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
6958         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
6959
6960         init_decode_cache(ctxt);
6961         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
6962 }
6963
6964 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
6965 {
6966         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6967         int ret;
6968
6969         init_emulate_ctxt(vcpu);
6970
6971         ctxt->op_bytes = 2;
6972         ctxt->ad_bytes = 2;
6973         ctxt->_eip = ctxt->eip + inc_eip;
6974         ret = emulate_int_real(ctxt, irq);
6975
6976         if (ret != X86EMUL_CONTINUE) {
6977                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
6978         } else {
6979                 ctxt->eip = ctxt->_eip;
6980                 kvm_rip_write(vcpu, ctxt->eip);
6981                 kvm_set_rflags(vcpu, ctxt->eflags);
6982         }
6983 }
6984 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
6985
6986 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
6987 {
6988         ++vcpu->stat.insn_emulation_fail;
6989         trace_kvm_emulate_insn_failed(vcpu);
6990
6991         if (emulation_type & EMULTYPE_VMWARE_GP) {
6992                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
6993                 return 1;
6994         }
6995
6996         if (emulation_type & EMULTYPE_SKIP) {
6997                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
6998                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
6999                 vcpu->run->internal.ndata = 0;
7000                 return 0;
7001         }
7002
7003         kvm_queue_exception(vcpu, UD_VECTOR);
7004
7005         if (!is_guest_mode(vcpu) && kvm_x86_ops.get_cpl(vcpu) == 0) {
7006                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7007                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
7008                 vcpu->run->internal.ndata = 0;
7009                 return 0;
7010         }
7011
7012         return 1;
7013 }
7014
7015 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7016                                   bool write_fault_to_shadow_pgtable,
7017                                   int emulation_type)
7018 {
7019         gpa_t gpa = cr2_or_gpa;
7020         kvm_pfn_t pfn;
7021
7022         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7023                 return false;
7024
7025         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7026             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7027                 return false;
7028
7029         if (!vcpu->arch.mmu->direct_map) {
7030                 /*
7031                  * Write permission should be allowed since only
7032                  * write access need to be emulated.
7033                  */
7034                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7035
7036                 /*
7037                  * If the mapping is invalid in guest, let cpu retry
7038                  * it to generate fault.
7039                  */
7040                 if (gpa == UNMAPPED_GVA)
7041                         return true;
7042         }
7043
7044         /*
7045          * Do not retry the unhandleable instruction if it faults on the
7046          * readonly host memory, otherwise it will goto a infinite loop:
7047          * retry instruction -> write #PF -> emulation fail -> retry
7048          * instruction -> ...
7049          */
7050         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
7051
7052         /*
7053          * If the instruction failed on the error pfn, it can not be fixed,
7054          * report the error to userspace.
7055          */
7056         if (is_error_noslot_pfn(pfn))
7057                 return false;
7058
7059         kvm_release_pfn_clean(pfn);
7060
7061         /* The instructions are well-emulated on direct mmu. */
7062         if (vcpu->arch.mmu->direct_map) {
7063                 unsigned int indirect_shadow_pages;
7064
7065                 spin_lock(&vcpu->kvm->mmu_lock);
7066                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
7067                 spin_unlock(&vcpu->kvm->mmu_lock);
7068
7069                 if (indirect_shadow_pages)
7070                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7071
7072                 return true;
7073         }
7074
7075         /*
7076          * if emulation was due to access to shadowed page table
7077          * and it failed try to unshadow page and re-enter the
7078          * guest to let CPU execute the instruction.
7079          */
7080         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7081
7082         /*
7083          * If the access faults on its page table, it can not
7084          * be fixed by unprotecting shadow page and it should
7085          * be reported to userspace.
7086          */
7087         return !write_fault_to_shadow_pgtable;
7088 }
7089
7090 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
7091                               gpa_t cr2_or_gpa,  int emulation_type)
7092 {
7093         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7094         unsigned long last_retry_eip, last_retry_addr, gpa = cr2_or_gpa;
7095
7096         last_retry_eip = vcpu->arch.last_retry_eip;
7097         last_retry_addr = vcpu->arch.last_retry_addr;
7098
7099         /*
7100          * If the emulation is caused by #PF and it is non-page_table
7101          * writing instruction, it means the VM-EXIT is caused by shadow
7102          * page protected, we can zap the shadow page and retry this
7103          * instruction directly.
7104          *
7105          * Note: if the guest uses a non-page-table modifying instruction
7106          * on the PDE that points to the instruction, then we will unmap
7107          * the instruction and go to an infinite loop. So, we cache the
7108          * last retried eip and the last fault address, if we meet the eip
7109          * and the address again, we can break out of the potential infinite
7110          * loop.
7111          */
7112         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
7113
7114         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7115                 return false;
7116
7117         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7118             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7119                 return false;
7120
7121         if (x86_page_table_writing_insn(ctxt))
7122                 return false;
7123
7124         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2_or_gpa)
7125                 return false;
7126
7127         vcpu->arch.last_retry_eip = ctxt->eip;
7128         vcpu->arch.last_retry_addr = cr2_or_gpa;
7129
7130         if (!vcpu->arch.mmu->direct_map)
7131                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7132
7133         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7134
7135         return true;
7136 }
7137
7138 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
7139 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
7140
7141 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
7142 {
7143         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
7144                 /* This is a good place to trace that we are exiting SMM.  */
7145                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
7146
7147                 /* Process a latched INIT or SMI, if any.  */
7148                 kvm_make_request(KVM_REQ_EVENT, vcpu);
7149         }
7150
7151         kvm_mmu_reset_context(vcpu);
7152 }
7153
7154 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
7155                                 unsigned long *db)
7156 {
7157         u32 dr6 = 0;
7158         int i;
7159         u32 enable, rwlen;
7160
7161         enable = dr7;
7162         rwlen = dr7 >> 16;
7163         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
7164                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
7165                         dr6 |= (1 << i);
7166         return dr6;
7167 }
7168
7169 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
7170 {
7171         struct kvm_run *kvm_run = vcpu->run;
7172
7173         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
7174                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 | DR6_RTM;
7175                 kvm_run->debug.arch.pc = kvm_get_linear_rip(vcpu);
7176                 kvm_run->debug.arch.exception = DB_VECTOR;
7177                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
7178                 return 0;
7179         }
7180         kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
7181         return 1;
7182 }
7183
7184 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
7185 {
7186         unsigned long rflags = kvm_x86_ops.get_rflags(vcpu);
7187         int r;
7188
7189         r = kvm_x86_ops.skip_emulated_instruction(vcpu);
7190         if (unlikely(!r))
7191                 return 0;
7192
7193         /*
7194          * rflags is the old, "raw" value of the flags.  The new value has
7195          * not been saved yet.
7196          *
7197          * This is correct even for TF set by the guest, because "the
7198          * processor will not generate this exception after the instruction
7199          * that sets the TF flag".
7200          */
7201         if (unlikely(rflags & X86_EFLAGS_TF))
7202                 r = kvm_vcpu_do_singlestep(vcpu);
7203         return r;
7204 }
7205 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
7206
7207 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
7208 {
7209         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
7210             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
7211                 struct kvm_run *kvm_run = vcpu->run;
7212                 unsigned long eip = kvm_get_linear_rip(vcpu);
7213                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7214                                            vcpu->arch.guest_debug_dr7,
7215                                            vcpu->arch.eff_db);
7216
7217                 if (dr6 != 0) {
7218                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
7219                         kvm_run->debug.arch.pc = eip;
7220                         kvm_run->debug.arch.exception = DB_VECTOR;
7221                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
7222                         *r = 0;
7223                         return true;
7224                 }
7225         }
7226
7227         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
7228             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
7229                 unsigned long eip = kvm_get_linear_rip(vcpu);
7230                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7231                                            vcpu->arch.dr7,
7232                                            vcpu->arch.db);
7233
7234                 if (dr6 != 0) {
7235                         kvm_queue_exception_p(vcpu, DB_VECTOR, dr6);
7236                         *r = 1;
7237                         return true;
7238                 }
7239         }
7240
7241         return false;
7242 }
7243
7244 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
7245 {
7246         switch (ctxt->opcode_len) {
7247         case 1:
7248                 switch (ctxt->b) {
7249                 case 0xe4:      /* IN */
7250                 case 0xe5:
7251                 case 0xec:
7252                 case 0xed:
7253                 case 0xe6:      /* OUT */
7254                 case 0xe7:
7255                 case 0xee:
7256                 case 0xef:
7257                 case 0x6c:      /* INS */
7258                 case 0x6d:
7259                 case 0x6e:      /* OUTS */
7260                 case 0x6f:
7261                         return true;
7262                 }
7263                 break;
7264         case 2:
7265                 switch (ctxt->b) {
7266                 case 0x33:      /* RDPMC */
7267                         return true;
7268                 }
7269                 break;
7270         }
7271
7272         return false;
7273 }
7274
7275 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7276                             int emulation_type, void *insn, int insn_len)
7277 {
7278         int r;
7279         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7280         bool writeback = true;
7281         bool write_fault_to_spt;
7282
7283         if (unlikely(!kvm_x86_ops.can_emulate_instruction(vcpu, insn, insn_len)))
7284                 return 1;
7285
7286         vcpu->arch.l1tf_flush_l1d = true;
7287
7288         /*
7289          * Clear write_fault_to_shadow_pgtable here to ensure it is
7290          * never reused.
7291          */
7292         write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
7293         vcpu->arch.write_fault_to_shadow_pgtable = false;
7294         kvm_clear_exception_queue(vcpu);
7295
7296         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
7297                 init_emulate_ctxt(vcpu);
7298
7299                 /*
7300                  * We will reenter on the same instruction since
7301                  * we do not set complete_userspace_io.  This does not
7302                  * handle watchpoints yet, those would be handled in
7303                  * the emulate_ops.
7304                  */
7305                 if (!(emulation_type & EMULTYPE_SKIP) &&
7306                     kvm_vcpu_check_breakpoint(vcpu, &r))
7307                         return r;
7308
7309                 ctxt->interruptibility = 0;
7310                 ctxt->have_exception = false;
7311                 ctxt->exception.vector = -1;
7312                 ctxt->perm_ok = false;
7313
7314                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
7315
7316                 r = x86_decode_insn(ctxt, insn, insn_len);
7317
7318                 trace_kvm_emulate_insn_start(vcpu);
7319                 ++vcpu->stat.insn_emulation;
7320                 if (r != EMULATION_OK)  {
7321                         if ((emulation_type & EMULTYPE_TRAP_UD) ||
7322                             (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
7323                                 kvm_queue_exception(vcpu, UD_VECTOR);
7324                                 return 1;
7325                         }
7326                         if (reexecute_instruction(vcpu, cr2_or_gpa,
7327                                                   write_fault_to_spt,
7328                                                   emulation_type))
7329                                 return 1;
7330                         if (ctxt->have_exception) {
7331                                 /*
7332                                  * #UD should result in just EMULATION_FAILED, and trap-like
7333                                  * exception should not be encountered during decode.
7334                                  */
7335                                 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
7336                                              exception_type(ctxt->exception.vector) == EXCPT_TRAP);
7337                                 inject_emulated_exception(vcpu);
7338                                 return 1;
7339                         }
7340                         return handle_emulation_failure(vcpu, emulation_type);
7341                 }
7342         }
7343
7344         if ((emulation_type & EMULTYPE_VMWARE_GP) &&
7345             !is_vmware_backdoor_opcode(ctxt)) {
7346                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7347                 return 1;
7348         }
7349
7350         /*
7351          * Note, EMULTYPE_SKIP is intended for use *only* by vendor callbacks
7352          * for kvm_skip_emulated_instruction().  The caller is responsible for
7353          * updating interruptibility state and injecting single-step #DBs.
7354          */
7355         if (emulation_type & EMULTYPE_SKIP) {
7356                 kvm_rip_write(vcpu, ctxt->_eip);
7357                 if (ctxt->eflags & X86_EFLAGS_RF)
7358                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
7359                 return 1;
7360         }
7361
7362         if (retry_instruction(ctxt, cr2_or_gpa, emulation_type))
7363                 return 1;
7364
7365         /* this is needed for vmware backdoor interface to work since it
7366            changes registers values  during IO operation */
7367         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
7368                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7369                 emulator_invalidate_register_cache(ctxt);
7370         }
7371
7372 restart:
7373         if (emulation_type & EMULTYPE_PF) {
7374                 /* Save the faulting GPA (cr2) in the address field */
7375                 ctxt->exception.address = cr2_or_gpa;
7376
7377                 /* With shadow page tables, cr2 contains a GVA or nGPA. */
7378                 if (vcpu->arch.mmu->direct_map) {
7379                         ctxt->gpa_available = true;
7380                         ctxt->gpa_val = cr2_or_gpa;
7381                 }
7382         } else {
7383                 /* Sanitize the address out of an abundance of paranoia. */
7384                 ctxt->exception.address = 0;
7385         }
7386
7387         r = x86_emulate_insn(ctxt);
7388
7389         if (r == EMULATION_INTERCEPTED)
7390                 return 1;
7391
7392         if (r == EMULATION_FAILED) {
7393                 if (reexecute_instruction(vcpu, cr2_or_gpa, write_fault_to_spt,
7394                                         emulation_type))
7395                         return 1;
7396
7397                 return handle_emulation_failure(vcpu, emulation_type);
7398         }
7399
7400         if (ctxt->have_exception) {
7401                 r = 1;
7402                 if (inject_emulated_exception(vcpu))
7403                         return r;
7404         } else if (vcpu->arch.pio.count) {
7405                 if (!vcpu->arch.pio.in) {
7406                         /* FIXME: return into emulator if single-stepping.  */
7407                         vcpu->arch.pio.count = 0;
7408                 } else {
7409                         writeback = false;
7410                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
7411                 }
7412                 r = 0;
7413         } else if (vcpu->mmio_needed) {
7414                 ++vcpu->stat.mmio_exits;
7415
7416                 if (!vcpu->mmio_is_write)
7417                         writeback = false;
7418                 r = 0;
7419                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7420         } else if (r == EMULATION_RESTART)
7421                 goto restart;
7422         else
7423                 r = 1;
7424
7425         if (writeback) {
7426                 unsigned long rflags = kvm_x86_ops.get_rflags(vcpu);
7427                 toggle_interruptibility(vcpu, ctxt->interruptibility);
7428                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7429                 if (!ctxt->have_exception ||
7430                     exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
7431                         kvm_rip_write(vcpu, ctxt->eip);
7432                         if (r && (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
7433                                 r = kvm_vcpu_do_singlestep(vcpu);
7434                         if (kvm_x86_ops.update_emulated_instruction)
7435                                 kvm_x86_ops.update_emulated_instruction(vcpu);
7436                         __kvm_set_rflags(vcpu, ctxt->eflags);
7437                 }
7438
7439                 /*
7440                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
7441                  * do nothing, and it will be requested again as soon as
7442                  * the shadow expires.  But we still need to check here,
7443                  * because POPF has no interrupt shadow.
7444                  */
7445                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
7446                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7447         } else
7448                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
7449
7450         return r;
7451 }
7452
7453 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
7454 {
7455         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
7456 }
7457 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
7458
7459 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
7460                                         void *insn, int insn_len)
7461 {
7462         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
7463 }
7464 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
7465
7466 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
7467 {
7468         vcpu->arch.pio.count = 0;
7469         return 1;
7470 }
7471
7472 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
7473 {
7474         vcpu->arch.pio.count = 0;
7475
7476         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
7477                 return 1;
7478
7479         return kvm_skip_emulated_instruction(vcpu);
7480 }
7481
7482 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
7483                             unsigned short port)
7484 {
7485         unsigned long val = kvm_rax_read(vcpu);
7486         int ret = emulator_pio_out(vcpu, size, port, &val, 1);
7487
7488         if (ret)
7489                 return ret;
7490
7491         /*
7492          * Workaround userspace that relies on old KVM behavior of %rip being
7493          * incremented prior to exiting to userspace to handle "OUT 0x7e".
7494          */
7495         if (port == 0x7e &&
7496             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
7497                 vcpu->arch.complete_userspace_io =
7498                         complete_fast_pio_out_port_0x7e;
7499                 kvm_skip_emulated_instruction(vcpu);
7500         } else {
7501                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
7502                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
7503         }
7504         return 0;
7505 }
7506
7507 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
7508 {
7509         unsigned long val;
7510
7511         /* We should only ever be called with arch.pio.count equal to 1 */
7512         BUG_ON(vcpu->arch.pio.count != 1);
7513
7514         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
7515                 vcpu->arch.pio.count = 0;
7516                 return 1;
7517         }
7518
7519         /* For size less than 4 we merge, else we zero extend */
7520         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
7521
7522         /*
7523          * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
7524          * the copy and tracing
7525          */
7526         emulator_pio_in(vcpu, vcpu->arch.pio.size, vcpu->arch.pio.port, &val, 1);
7527         kvm_rax_write(vcpu, val);
7528
7529         return kvm_skip_emulated_instruction(vcpu);
7530 }
7531
7532 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
7533                            unsigned short port)
7534 {
7535         unsigned long val;
7536         int ret;
7537
7538         /* For size less than 4 we merge, else we zero extend */
7539         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
7540
7541         ret = emulator_pio_in(vcpu, size, port, &val, 1);
7542         if (ret) {
7543                 kvm_rax_write(vcpu, val);
7544                 return ret;
7545         }
7546
7547         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
7548         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
7549
7550         return 0;
7551 }
7552
7553 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
7554 {
7555         int ret;
7556
7557         if (in)
7558                 ret = kvm_fast_pio_in(vcpu, size, port);
7559         else
7560                 ret = kvm_fast_pio_out(vcpu, size, port);
7561         return ret && kvm_skip_emulated_instruction(vcpu);
7562 }
7563 EXPORT_SYMBOL_GPL(kvm_fast_pio);
7564
7565 static int kvmclock_cpu_down_prep(unsigned int cpu)
7566 {
7567         __this_cpu_write(cpu_tsc_khz, 0);
7568         return 0;
7569 }
7570
7571 static void tsc_khz_changed(void *data)
7572 {
7573         struct cpufreq_freqs *freq = data;
7574         unsigned long khz = 0;
7575
7576         if (data)
7577                 khz = freq->new;
7578         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
7579                 khz = cpufreq_quick_get(raw_smp_processor_id());
7580         if (!khz)
7581                 khz = tsc_khz;
7582         __this_cpu_write(cpu_tsc_khz, khz);
7583 }
7584
7585 #ifdef CONFIG_X86_64
7586 static void kvm_hyperv_tsc_notifier(void)
7587 {
7588         struct kvm *kvm;
7589         struct kvm_vcpu *vcpu;
7590         int cpu;
7591
7592         mutex_lock(&kvm_lock);
7593         list_for_each_entry(kvm, &vm_list, vm_list)
7594                 kvm_make_mclock_inprogress_request(kvm);
7595
7596         hyperv_stop_tsc_emulation();
7597
7598         /* TSC frequency always matches when on Hyper-V */
7599         for_each_present_cpu(cpu)
7600                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
7601         kvm_max_guest_tsc_khz = tsc_khz;
7602
7603         list_for_each_entry(kvm, &vm_list, vm_list) {
7604                 struct kvm_arch *ka = &kvm->arch;
7605
7606                 spin_lock(&ka->pvclock_gtod_sync_lock);
7607
7608                 pvclock_update_vm_gtod_copy(kvm);
7609
7610                 kvm_for_each_vcpu(cpu, vcpu, kvm)
7611                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7612
7613                 kvm_for_each_vcpu(cpu, vcpu, kvm)
7614                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
7615
7616                 spin_unlock(&ka->pvclock_gtod_sync_lock);
7617         }
7618         mutex_unlock(&kvm_lock);
7619 }
7620 #endif
7621
7622 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
7623 {
7624         struct kvm *kvm;
7625         struct kvm_vcpu *vcpu;
7626         int i, send_ipi = 0;
7627
7628         /*
7629          * We allow guests to temporarily run on slowing clocks,
7630          * provided we notify them after, or to run on accelerating
7631          * clocks, provided we notify them before.  Thus time never
7632          * goes backwards.
7633          *
7634          * However, we have a problem.  We can't atomically update
7635          * the frequency of a given CPU from this function; it is
7636          * merely a notifier, which can be called from any CPU.
7637          * Changing the TSC frequency at arbitrary points in time
7638          * requires a recomputation of local variables related to
7639          * the TSC for each VCPU.  We must flag these local variables
7640          * to be updated and be sure the update takes place with the
7641          * new frequency before any guests proceed.
7642          *
7643          * Unfortunately, the combination of hotplug CPU and frequency
7644          * change creates an intractable locking scenario; the order
7645          * of when these callouts happen is undefined with respect to
7646          * CPU hotplug, and they can race with each other.  As such,
7647          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
7648          * undefined; you can actually have a CPU frequency change take
7649          * place in between the computation of X and the setting of the
7650          * variable.  To protect against this problem, all updates of
7651          * the per_cpu tsc_khz variable are done in an interrupt
7652          * protected IPI, and all callers wishing to update the value
7653          * must wait for a synchronous IPI to complete (which is trivial
7654          * if the caller is on the CPU already).  This establishes the
7655          * necessary total order on variable updates.
7656          *
7657          * Note that because a guest time update may take place
7658          * anytime after the setting of the VCPU's request bit, the
7659          * correct TSC value must be set before the request.  However,
7660          * to ensure the update actually makes it to any guest which
7661          * starts running in hardware virtualization between the set
7662          * and the acquisition of the spinlock, we must also ping the
7663          * CPU after setting the request bit.
7664          *
7665          */
7666
7667         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
7668
7669         mutex_lock(&kvm_lock);
7670         list_for_each_entry(kvm, &vm_list, vm_list) {
7671                 kvm_for_each_vcpu(i, vcpu, kvm) {
7672                         if (vcpu->cpu != cpu)
7673                                 continue;
7674                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7675                         if (vcpu->cpu != raw_smp_processor_id())
7676                                 send_ipi = 1;
7677                 }
7678         }
7679         mutex_unlock(&kvm_lock);
7680
7681         if (freq->old < freq->new && send_ipi) {
7682                 /*
7683                  * We upscale the frequency.  Must make the guest
7684                  * doesn't see old kvmclock values while running with
7685                  * the new frequency, otherwise we risk the guest sees
7686                  * time go backwards.
7687                  *
7688                  * In case we update the frequency for another cpu
7689                  * (which might be in guest context) send an interrupt
7690                  * to kick the cpu out of guest context.  Next time
7691                  * guest context is entered kvmclock will be updated,
7692                  * so the guest will not see stale values.
7693                  */
7694                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
7695         }
7696 }
7697
7698 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
7699                                      void *data)
7700 {
7701         struct cpufreq_freqs *freq = data;
7702         int cpu;
7703
7704         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
7705                 return 0;
7706         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
7707                 return 0;
7708
7709         for_each_cpu(cpu, freq->policy->cpus)
7710                 __kvmclock_cpufreq_notifier(freq, cpu);
7711
7712         return 0;
7713 }
7714
7715 static struct notifier_block kvmclock_cpufreq_notifier_block = {
7716         .notifier_call  = kvmclock_cpufreq_notifier
7717 };
7718
7719 static int kvmclock_cpu_online(unsigned int cpu)
7720 {
7721         tsc_khz_changed(NULL);
7722         return 0;
7723 }
7724
7725 static void kvm_timer_init(void)
7726 {
7727         max_tsc_khz = tsc_khz;
7728
7729         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
7730 #ifdef CONFIG_CPU_FREQ
7731                 struct cpufreq_policy *policy;
7732                 int cpu;
7733
7734                 cpu = get_cpu();
7735                 policy = cpufreq_cpu_get(cpu);
7736                 if (policy) {
7737                         if (policy->cpuinfo.max_freq)
7738                                 max_tsc_khz = policy->cpuinfo.max_freq;
7739                         cpufreq_cpu_put(policy);
7740                 }
7741                 put_cpu();
7742 #endif
7743                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
7744                                           CPUFREQ_TRANSITION_NOTIFIER);
7745         }
7746
7747         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
7748                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
7749 }
7750
7751 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
7752 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
7753
7754 int kvm_is_in_guest(void)
7755 {
7756         return __this_cpu_read(current_vcpu) != NULL;
7757 }
7758
7759 static int kvm_is_user_mode(void)
7760 {
7761         int user_mode = 3;
7762
7763         if (__this_cpu_read(current_vcpu))
7764                 user_mode = kvm_x86_ops.get_cpl(__this_cpu_read(current_vcpu));
7765
7766         return user_mode != 0;
7767 }
7768
7769 static unsigned long kvm_get_guest_ip(void)
7770 {
7771         unsigned long ip = 0;
7772
7773         if (__this_cpu_read(current_vcpu))
7774                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
7775
7776         return ip;
7777 }
7778
7779 static void kvm_handle_intel_pt_intr(void)
7780 {
7781         struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
7782
7783         kvm_make_request(KVM_REQ_PMI, vcpu);
7784         __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
7785                         (unsigned long *)&vcpu->arch.pmu.global_status);
7786 }
7787
7788 static struct perf_guest_info_callbacks kvm_guest_cbs = {
7789         .is_in_guest            = kvm_is_in_guest,
7790         .is_user_mode           = kvm_is_user_mode,
7791         .get_guest_ip           = kvm_get_guest_ip,
7792         .handle_intel_pt_intr   = kvm_handle_intel_pt_intr,
7793 };
7794
7795 #ifdef CONFIG_X86_64
7796 static void pvclock_gtod_update_fn(struct work_struct *work)
7797 {
7798         struct kvm *kvm;
7799
7800         struct kvm_vcpu *vcpu;
7801         int i;
7802
7803         mutex_lock(&kvm_lock);
7804         list_for_each_entry(kvm, &vm_list, vm_list)
7805                 kvm_for_each_vcpu(i, vcpu, kvm)
7806                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7807         atomic_set(&kvm_guest_has_master_clock, 0);
7808         mutex_unlock(&kvm_lock);
7809 }
7810
7811 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
7812
7813 /*
7814  * Notification about pvclock gtod data update.
7815  */
7816 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
7817                                void *priv)
7818 {
7819         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
7820         struct timekeeper *tk = priv;
7821
7822         update_pvclock_gtod(tk);
7823
7824         /* disable master clock if host does not trust, or does not
7825          * use, TSC based clocksource.
7826          */
7827         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
7828             atomic_read(&kvm_guest_has_master_clock) != 0)
7829                 queue_work(system_long_wq, &pvclock_gtod_work);
7830
7831         return 0;
7832 }
7833
7834 static struct notifier_block pvclock_gtod_notifier = {
7835         .notifier_call = pvclock_gtod_notify,
7836 };
7837 #endif
7838
7839 int kvm_arch_init(void *opaque)
7840 {
7841         struct kvm_x86_init_ops *ops = opaque;
7842         int r;
7843
7844         if (kvm_x86_ops.hardware_enable) {
7845                 printk(KERN_ERR "kvm: already loaded the other module\n");
7846                 r = -EEXIST;
7847                 goto out;
7848         }
7849
7850         if (!ops->cpu_has_kvm_support()) {
7851                 pr_err_ratelimited("kvm: no hardware support\n");
7852                 r = -EOPNOTSUPP;
7853                 goto out;
7854         }
7855         if (ops->disabled_by_bios()) {
7856                 pr_err_ratelimited("kvm: disabled by bios\n");
7857                 r = -EOPNOTSUPP;
7858                 goto out;
7859         }
7860
7861         /*
7862          * KVM explicitly assumes that the guest has an FPU and
7863          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
7864          * vCPU's FPU state as a fxregs_state struct.
7865          */
7866         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
7867                 printk(KERN_ERR "kvm: inadequate fpu\n");
7868                 r = -EOPNOTSUPP;
7869                 goto out;
7870         }
7871
7872         r = -ENOMEM;
7873         x86_fpu_cache = kmem_cache_create("x86_fpu", sizeof(struct fpu),
7874                                           __alignof__(struct fpu), SLAB_ACCOUNT,
7875                                           NULL);
7876         if (!x86_fpu_cache) {
7877                 printk(KERN_ERR "kvm: failed to allocate cache for x86 fpu\n");
7878                 goto out;
7879         }
7880
7881         x86_emulator_cache = kvm_alloc_emulator_cache();
7882         if (!x86_emulator_cache) {
7883                 pr_err("kvm: failed to allocate cache for x86 emulator\n");
7884                 goto out_free_x86_fpu_cache;
7885         }
7886
7887         user_return_msrs = alloc_percpu(struct kvm_user_return_msrs);
7888         if (!user_return_msrs) {
7889                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_user_return_msrs\n");
7890                 goto out_free_x86_emulator_cache;
7891         }
7892
7893         r = kvm_mmu_module_init();
7894         if (r)
7895                 goto out_free_percpu;
7896
7897         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
7898                         PT_DIRTY_MASK, PT64_NX_MASK, 0,
7899                         PT_PRESENT_MASK, 0, sme_me_mask);
7900         kvm_timer_init();
7901
7902         perf_register_guest_info_callbacks(&kvm_guest_cbs);
7903
7904         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
7905                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
7906                 supported_xcr0 = host_xcr0 & KVM_SUPPORTED_XCR0;
7907         }
7908
7909         kvm_lapic_init();
7910         if (pi_inject_timer == -1)
7911                 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
7912 #ifdef CONFIG_X86_64
7913         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
7914
7915         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
7916                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
7917 #endif
7918
7919         return 0;
7920
7921 out_free_percpu:
7922         free_percpu(user_return_msrs);
7923 out_free_x86_emulator_cache:
7924         kmem_cache_destroy(x86_emulator_cache);
7925 out_free_x86_fpu_cache:
7926         kmem_cache_destroy(x86_fpu_cache);
7927 out:
7928         return r;
7929 }
7930
7931 void kvm_arch_exit(void)
7932 {
7933 #ifdef CONFIG_X86_64
7934         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
7935                 clear_hv_tscchange_cb();
7936 #endif
7937         kvm_lapic_exit();
7938         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
7939
7940         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
7941                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
7942                                             CPUFREQ_TRANSITION_NOTIFIER);
7943         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
7944 #ifdef CONFIG_X86_64
7945         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
7946 #endif
7947         kvm_x86_ops.hardware_enable = NULL;
7948         kvm_mmu_module_exit();
7949         free_percpu(user_return_msrs);
7950         kmem_cache_destroy(x86_fpu_cache);
7951 }
7952
7953 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
7954 {
7955         ++vcpu->stat.halt_exits;
7956         if (lapic_in_kernel(vcpu)) {
7957                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
7958                 return 1;
7959         } else {
7960                 vcpu->run->exit_reason = KVM_EXIT_HLT;
7961                 return 0;
7962         }
7963 }
7964 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
7965
7966 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
7967 {
7968         int ret = kvm_skip_emulated_instruction(vcpu);
7969         /*
7970          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
7971          * KVM_EXIT_DEBUG here.
7972          */
7973         return kvm_vcpu_halt(vcpu) && ret;
7974 }
7975 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
7976
7977 #ifdef CONFIG_X86_64
7978 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
7979                                 unsigned long clock_type)
7980 {
7981         struct kvm_clock_pairing clock_pairing;
7982         struct timespec64 ts;
7983         u64 cycle;
7984         int ret;
7985
7986         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
7987                 return -KVM_EOPNOTSUPP;
7988
7989         if (kvm_get_walltime_and_clockread(&ts, &cycle) == false)
7990                 return -KVM_EOPNOTSUPP;
7991
7992         clock_pairing.sec = ts.tv_sec;
7993         clock_pairing.nsec = ts.tv_nsec;
7994         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
7995         clock_pairing.flags = 0;
7996         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
7997
7998         ret = 0;
7999         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
8000                             sizeof(struct kvm_clock_pairing)))
8001                 ret = -KVM_EFAULT;
8002
8003         return ret;
8004 }
8005 #endif
8006
8007 /*
8008  * kvm_pv_kick_cpu_op:  Kick a vcpu.
8009  *
8010  * @apicid - apicid of vcpu to be kicked.
8011  */
8012 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
8013 {
8014         struct kvm_lapic_irq lapic_irq;
8015
8016         lapic_irq.shorthand = APIC_DEST_NOSHORT;
8017         lapic_irq.dest_mode = APIC_DEST_PHYSICAL;
8018         lapic_irq.level = 0;
8019         lapic_irq.dest_id = apicid;
8020         lapic_irq.msi_redir_hint = false;
8021
8022         lapic_irq.delivery_mode = APIC_DM_REMRD;
8023         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
8024 }
8025
8026 bool kvm_apicv_activated(struct kvm *kvm)
8027 {
8028         return (READ_ONCE(kvm->arch.apicv_inhibit_reasons) == 0);
8029 }
8030 EXPORT_SYMBOL_GPL(kvm_apicv_activated);
8031
8032 void kvm_apicv_init(struct kvm *kvm, bool enable)
8033 {
8034         if (enable)
8035                 clear_bit(APICV_INHIBIT_REASON_DISABLE,
8036                           &kvm->arch.apicv_inhibit_reasons);
8037         else
8038                 set_bit(APICV_INHIBIT_REASON_DISABLE,
8039                         &kvm->arch.apicv_inhibit_reasons);
8040 }
8041 EXPORT_SYMBOL_GPL(kvm_apicv_init);
8042
8043 static void kvm_sched_yield(struct kvm *kvm, unsigned long dest_id)
8044 {
8045         struct kvm_vcpu *target = NULL;
8046         struct kvm_apic_map *map;
8047
8048         rcu_read_lock();
8049         map = rcu_dereference(kvm->arch.apic_map);
8050
8051         if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
8052                 target = map->phys_map[dest_id]->vcpu;
8053
8054         rcu_read_unlock();
8055
8056         if (target && READ_ONCE(target->ready))
8057                 kvm_vcpu_yield_to(target);
8058 }
8059
8060 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
8061 {
8062         unsigned long nr, a0, a1, a2, a3, ret;
8063         int op_64_bit;
8064
8065         if (kvm_hv_hypercall_enabled(vcpu->kvm))
8066                 return kvm_hv_hypercall(vcpu);
8067
8068         nr = kvm_rax_read(vcpu);
8069         a0 = kvm_rbx_read(vcpu);
8070         a1 = kvm_rcx_read(vcpu);
8071         a2 = kvm_rdx_read(vcpu);
8072         a3 = kvm_rsi_read(vcpu);
8073
8074         trace_kvm_hypercall(nr, a0, a1, a2, a3);
8075
8076         op_64_bit = is_64_bit_mode(vcpu);
8077         if (!op_64_bit) {
8078                 nr &= 0xFFFFFFFF;
8079                 a0 &= 0xFFFFFFFF;
8080                 a1 &= 0xFFFFFFFF;
8081                 a2 &= 0xFFFFFFFF;
8082                 a3 &= 0xFFFFFFFF;
8083         }
8084
8085         if (kvm_x86_ops.get_cpl(vcpu) != 0) {
8086                 ret = -KVM_EPERM;
8087                 goto out;
8088         }
8089
8090         ret = -KVM_ENOSYS;
8091
8092         switch (nr) {
8093         case KVM_HC_VAPIC_POLL_IRQ:
8094                 ret = 0;
8095                 break;
8096         case KVM_HC_KICK_CPU:
8097                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_UNHALT))
8098                         break;
8099
8100                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
8101                 kvm_sched_yield(vcpu->kvm, a1);
8102                 ret = 0;
8103                 break;
8104 #ifdef CONFIG_X86_64
8105         case KVM_HC_CLOCK_PAIRING:
8106                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
8107                 break;
8108 #endif
8109         case KVM_HC_SEND_IPI:
8110                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SEND_IPI))
8111                         break;
8112
8113                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
8114                 break;
8115         case KVM_HC_SCHED_YIELD:
8116                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SCHED_YIELD))
8117                         break;
8118
8119                 kvm_sched_yield(vcpu->kvm, a0);
8120                 ret = 0;
8121                 break;
8122         default:
8123                 ret = -KVM_ENOSYS;
8124                 break;
8125         }
8126 out:
8127         if (!op_64_bit)
8128                 ret = (u32)ret;
8129         kvm_rax_write(vcpu, ret);
8130
8131         ++vcpu->stat.hypercalls;
8132         return kvm_skip_emulated_instruction(vcpu);
8133 }
8134 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
8135
8136 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
8137 {
8138         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
8139         char instruction[3];
8140         unsigned long rip = kvm_rip_read(vcpu);
8141
8142         kvm_x86_ops.patch_hypercall(vcpu, instruction);
8143
8144         return emulator_write_emulated(ctxt, rip, instruction, 3,
8145                 &ctxt->exception);
8146 }
8147
8148 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
8149 {
8150         return vcpu->run->request_interrupt_window &&
8151                 likely(!pic_in_kernel(vcpu->kvm));
8152 }
8153
8154 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
8155 {
8156         struct kvm_run *kvm_run = vcpu->run;
8157
8158         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
8159         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
8160         kvm_run->cr8 = kvm_get_cr8(vcpu);
8161         kvm_run->apic_base = kvm_get_apic_base(vcpu);
8162         kvm_run->ready_for_interrupt_injection =
8163                 pic_in_kernel(vcpu->kvm) ||
8164                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
8165 }
8166
8167 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
8168 {
8169         int max_irr, tpr;
8170
8171         if (!kvm_x86_ops.update_cr8_intercept)
8172                 return;
8173
8174         if (!lapic_in_kernel(vcpu))
8175                 return;
8176
8177         if (vcpu->arch.apicv_active)
8178                 return;
8179
8180         if (!vcpu->arch.apic->vapic_addr)
8181                 max_irr = kvm_lapic_find_highest_irr(vcpu);
8182         else
8183                 max_irr = -1;
8184
8185         if (max_irr != -1)
8186                 max_irr >>= 4;
8187
8188         tpr = kvm_lapic_get_cr8(vcpu);
8189
8190         kvm_x86_ops.update_cr8_intercept(vcpu, tpr, max_irr);
8191 }
8192
8193 static void inject_pending_event(struct kvm_vcpu *vcpu, bool *req_immediate_exit)
8194 {
8195         int r;
8196         bool can_inject = true;
8197
8198         /* try to reinject previous events if any */
8199
8200         if (vcpu->arch.exception.injected) {
8201                 kvm_x86_ops.queue_exception(vcpu);
8202                 can_inject = false;
8203         }
8204         /*
8205          * Do not inject an NMI or interrupt if there is a pending
8206          * exception.  Exceptions and interrupts are recognized at
8207          * instruction boundaries, i.e. the start of an instruction.
8208          * Trap-like exceptions, e.g. #DB, have higher priority than
8209          * NMIs and interrupts, i.e. traps are recognized before an
8210          * NMI/interrupt that's pending on the same instruction.
8211          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
8212          * priority, but are only generated (pended) during instruction
8213          * execution, i.e. a pending fault-like exception means the
8214          * fault occurred on the *previous* instruction and must be
8215          * serviced prior to recognizing any new events in order to
8216          * fully complete the previous instruction.
8217          */
8218         else if (!vcpu->arch.exception.pending) {
8219                 if (vcpu->arch.nmi_injected) {
8220                         kvm_x86_ops.set_nmi(vcpu);
8221                         can_inject = false;
8222                 } else if (vcpu->arch.interrupt.injected) {
8223                         kvm_x86_ops.set_irq(vcpu);
8224                         can_inject = false;
8225                 }
8226         }
8227
8228         WARN_ON_ONCE(vcpu->arch.exception.injected &&
8229                      vcpu->arch.exception.pending);
8230
8231         /*
8232          * Call check_nested_events() even if we reinjected a previous event
8233          * in order for caller to determine if it should require immediate-exit
8234          * from L2 to L1 due to pending L1 events which require exit
8235          * from L2 to L1.
8236          */
8237         if (is_guest_mode(vcpu)) {
8238                 r = kvm_x86_ops.nested_ops->check_events(vcpu);
8239                 if (r < 0)
8240                         goto busy;
8241         }
8242
8243         /* try to inject new event if pending */
8244         if (vcpu->arch.exception.pending) {
8245                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
8246                                         vcpu->arch.exception.has_error_code,
8247                                         vcpu->arch.exception.error_code);
8248
8249                 vcpu->arch.exception.pending = false;
8250                 vcpu->arch.exception.injected = true;
8251
8252                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
8253                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
8254                                              X86_EFLAGS_RF);
8255
8256                 if (vcpu->arch.exception.nr == DB_VECTOR) {
8257                         kvm_deliver_exception_payload(vcpu);
8258                         if (vcpu->arch.dr7 & DR7_GD) {
8259                                 vcpu->arch.dr7 &= ~DR7_GD;
8260                                 kvm_update_dr7(vcpu);
8261                         }
8262                 }
8263
8264                 kvm_x86_ops.queue_exception(vcpu);
8265                 can_inject = false;
8266         }
8267
8268         /*
8269          * Finally, inject interrupt events.  If an event cannot be injected
8270          * due to architectural conditions (e.g. IF=0) a window-open exit
8271          * will re-request KVM_REQ_EVENT.  Sometimes however an event is pending
8272          * and can architecturally be injected, but we cannot do it right now:
8273          * an interrupt could have arrived just now and we have to inject it
8274          * as a vmexit, or there could already an event in the queue, which is
8275          * indicated by can_inject.  In that case we request an immediate exit
8276          * in order to make progress and get back here for another iteration.
8277          * The kvm_x86_ops hooks communicate this by returning -EBUSY.
8278          */
8279         if (vcpu->arch.smi_pending) {
8280                 r = can_inject ? kvm_x86_ops.smi_allowed(vcpu, true) : -EBUSY;
8281                 if (r < 0)
8282                         goto busy;
8283                 if (r) {
8284                         vcpu->arch.smi_pending = false;
8285                         ++vcpu->arch.smi_count;
8286                         enter_smm(vcpu);
8287                         can_inject = false;
8288                 } else
8289                         kvm_x86_ops.enable_smi_window(vcpu);
8290         }
8291
8292         if (vcpu->arch.nmi_pending) {
8293                 r = can_inject ? kvm_x86_ops.nmi_allowed(vcpu, true) : -EBUSY;
8294                 if (r < 0)
8295                         goto busy;
8296                 if (r) {
8297                         --vcpu->arch.nmi_pending;
8298                         vcpu->arch.nmi_injected = true;
8299                         kvm_x86_ops.set_nmi(vcpu);
8300                         can_inject = false;
8301                         WARN_ON(kvm_x86_ops.nmi_allowed(vcpu, true) < 0);
8302                 }
8303                 if (vcpu->arch.nmi_pending)
8304                         kvm_x86_ops.enable_nmi_window(vcpu);
8305         }
8306
8307         if (kvm_cpu_has_injectable_intr(vcpu)) {
8308                 r = can_inject ? kvm_x86_ops.interrupt_allowed(vcpu, true) : -EBUSY;
8309                 if (r < 0)
8310                         goto busy;
8311                 if (r) {
8312                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu), false);
8313                         kvm_x86_ops.set_irq(vcpu);
8314                         WARN_ON(kvm_x86_ops.interrupt_allowed(vcpu, true) < 0);
8315                 }
8316                 if (kvm_cpu_has_injectable_intr(vcpu))
8317                         kvm_x86_ops.enable_irq_window(vcpu);
8318         }
8319
8320         if (is_guest_mode(vcpu) &&
8321             kvm_x86_ops.nested_ops->hv_timer_pending &&
8322             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
8323                 *req_immediate_exit = true;
8324
8325         WARN_ON(vcpu->arch.exception.pending);
8326         return;
8327
8328 busy:
8329         *req_immediate_exit = true;
8330         return;
8331 }
8332
8333 static void process_nmi(struct kvm_vcpu *vcpu)
8334 {
8335         unsigned limit = 2;
8336
8337         /*
8338          * x86 is limited to one NMI running, and one NMI pending after it.
8339          * If an NMI is already in progress, limit further NMIs to just one.
8340          * Otherwise, allow two (and we'll inject the first one immediately).
8341          */
8342         if (kvm_x86_ops.get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
8343                 limit = 1;
8344
8345         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
8346         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
8347         kvm_make_request(KVM_REQ_EVENT, vcpu);
8348 }
8349
8350 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
8351 {
8352         u32 flags = 0;
8353         flags |= seg->g       << 23;
8354         flags |= seg->db      << 22;
8355         flags |= seg->l       << 21;
8356         flags |= seg->avl     << 20;
8357         flags |= seg->present << 15;
8358         flags |= seg->dpl     << 13;
8359         flags |= seg->s       << 12;
8360         flags |= seg->type    << 8;
8361         return flags;
8362 }
8363
8364 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
8365 {
8366         struct kvm_segment seg;
8367         int offset;
8368
8369         kvm_get_segment(vcpu, &seg, n);
8370         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
8371
8372         if (n < 3)
8373                 offset = 0x7f84 + n * 12;
8374         else
8375                 offset = 0x7f2c + (n - 3) * 12;
8376
8377         put_smstate(u32, buf, offset + 8, seg.base);
8378         put_smstate(u32, buf, offset + 4, seg.limit);
8379         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
8380 }
8381
8382 #ifdef CONFIG_X86_64
8383 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
8384 {
8385         struct kvm_segment seg;
8386         int offset;
8387         u16 flags;
8388
8389         kvm_get_segment(vcpu, &seg, n);
8390         offset = 0x7e00 + n * 16;
8391
8392         flags = enter_smm_get_segment_flags(&seg) >> 8;
8393         put_smstate(u16, buf, offset, seg.selector);
8394         put_smstate(u16, buf, offset + 2, flags);
8395         put_smstate(u32, buf, offset + 4, seg.limit);
8396         put_smstate(u64, buf, offset + 8, seg.base);
8397 }
8398 #endif
8399
8400 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
8401 {
8402         struct desc_ptr dt;
8403         struct kvm_segment seg;
8404         unsigned long val;
8405         int i;
8406
8407         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
8408         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
8409         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
8410         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
8411
8412         for (i = 0; i < 8; i++)
8413                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
8414
8415         kvm_get_dr(vcpu, 6, &val);
8416         put_smstate(u32, buf, 0x7fcc, (u32)val);
8417         kvm_get_dr(vcpu, 7, &val);
8418         put_smstate(u32, buf, 0x7fc8, (u32)val);
8419
8420         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
8421         put_smstate(u32, buf, 0x7fc4, seg.selector);
8422         put_smstate(u32, buf, 0x7f64, seg.base);
8423         put_smstate(u32, buf, 0x7f60, seg.limit);
8424         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
8425
8426         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
8427         put_smstate(u32, buf, 0x7fc0, seg.selector);
8428         put_smstate(u32, buf, 0x7f80, seg.base);
8429         put_smstate(u32, buf, 0x7f7c, seg.limit);
8430         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
8431
8432         kvm_x86_ops.get_gdt(vcpu, &dt);
8433         put_smstate(u32, buf, 0x7f74, dt.address);
8434         put_smstate(u32, buf, 0x7f70, dt.size);
8435
8436         kvm_x86_ops.get_idt(vcpu, &dt);
8437         put_smstate(u32, buf, 0x7f58, dt.address);
8438         put_smstate(u32, buf, 0x7f54, dt.size);
8439
8440         for (i = 0; i < 6; i++)
8441                 enter_smm_save_seg_32(vcpu, buf, i);
8442
8443         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
8444
8445         /* revision id */
8446         put_smstate(u32, buf, 0x7efc, 0x00020000);
8447         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
8448 }
8449
8450 #ifdef CONFIG_X86_64
8451 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
8452 {
8453         struct desc_ptr dt;
8454         struct kvm_segment seg;
8455         unsigned long val;
8456         int i;
8457
8458         for (i = 0; i < 16; i++)
8459                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
8460
8461         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
8462         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
8463
8464         kvm_get_dr(vcpu, 6, &val);
8465         put_smstate(u64, buf, 0x7f68, val);
8466         kvm_get_dr(vcpu, 7, &val);
8467         put_smstate(u64, buf, 0x7f60, val);
8468
8469         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
8470         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
8471         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
8472
8473         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
8474
8475         /* revision id */
8476         put_smstate(u32, buf, 0x7efc, 0x00020064);
8477
8478         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
8479
8480         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
8481         put_smstate(u16, buf, 0x7e90, seg.selector);
8482         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
8483         put_smstate(u32, buf, 0x7e94, seg.limit);
8484         put_smstate(u64, buf, 0x7e98, seg.base);
8485
8486         kvm_x86_ops.get_idt(vcpu, &dt);
8487         put_smstate(u32, buf, 0x7e84, dt.size);
8488         put_smstate(u64, buf, 0x7e88, dt.address);
8489
8490         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
8491         put_smstate(u16, buf, 0x7e70, seg.selector);
8492         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
8493         put_smstate(u32, buf, 0x7e74, seg.limit);
8494         put_smstate(u64, buf, 0x7e78, seg.base);
8495
8496         kvm_x86_ops.get_gdt(vcpu, &dt);
8497         put_smstate(u32, buf, 0x7e64, dt.size);
8498         put_smstate(u64, buf, 0x7e68, dt.address);
8499
8500         for (i = 0; i < 6; i++)
8501                 enter_smm_save_seg_64(vcpu, buf, i);
8502 }
8503 #endif
8504
8505 static void enter_smm(struct kvm_vcpu *vcpu)
8506 {
8507         struct kvm_segment cs, ds;
8508         struct desc_ptr dt;
8509         char buf[512];
8510         u32 cr0;
8511
8512         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
8513         memset(buf, 0, 512);
8514 #ifdef CONFIG_X86_64
8515         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
8516                 enter_smm_save_state_64(vcpu, buf);
8517         else
8518 #endif
8519                 enter_smm_save_state_32(vcpu, buf);
8520
8521         /*
8522          * Give pre_enter_smm() a chance to make ISA-specific changes to the
8523          * vCPU state (e.g. leave guest mode) after we've saved the state into
8524          * the SMM state-save area.
8525          */
8526         kvm_x86_ops.pre_enter_smm(vcpu, buf);
8527
8528         vcpu->arch.hflags |= HF_SMM_MASK;
8529         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
8530
8531         if (kvm_x86_ops.get_nmi_mask(vcpu))
8532                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
8533         else
8534                 kvm_x86_ops.set_nmi_mask(vcpu, true);
8535
8536         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
8537         kvm_rip_write(vcpu, 0x8000);
8538
8539         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
8540         kvm_x86_ops.set_cr0(vcpu, cr0);
8541         vcpu->arch.cr0 = cr0;
8542
8543         kvm_x86_ops.set_cr4(vcpu, 0);
8544
8545         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
8546         dt.address = dt.size = 0;
8547         kvm_x86_ops.set_idt(vcpu, &dt);
8548
8549         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
8550
8551         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
8552         cs.base = vcpu->arch.smbase;
8553
8554         ds.selector = 0;
8555         ds.base = 0;
8556
8557         cs.limit    = ds.limit = 0xffffffff;
8558         cs.type     = ds.type = 0x3;
8559         cs.dpl      = ds.dpl = 0;
8560         cs.db       = ds.db = 0;
8561         cs.s        = ds.s = 1;
8562         cs.l        = ds.l = 0;
8563         cs.g        = ds.g = 1;
8564         cs.avl      = ds.avl = 0;
8565         cs.present  = ds.present = 1;
8566         cs.unusable = ds.unusable = 0;
8567         cs.padding  = ds.padding = 0;
8568
8569         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
8570         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
8571         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
8572         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
8573         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
8574         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
8575
8576 #ifdef CONFIG_X86_64
8577         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
8578                 kvm_x86_ops.set_efer(vcpu, 0);
8579 #endif
8580
8581         kvm_update_cpuid_runtime(vcpu);
8582         kvm_mmu_reset_context(vcpu);
8583 }
8584
8585 static void process_smi(struct kvm_vcpu *vcpu)
8586 {
8587         vcpu->arch.smi_pending = true;
8588         kvm_make_request(KVM_REQ_EVENT, vcpu);
8589 }
8590
8591 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
8592                                        unsigned long *vcpu_bitmap)
8593 {
8594         cpumask_var_t cpus;
8595
8596         zalloc_cpumask_var(&cpus, GFP_ATOMIC);
8597
8598         kvm_make_vcpus_request_mask(kvm, KVM_REQ_SCAN_IOAPIC,
8599                                     NULL, vcpu_bitmap, cpus);
8600
8601         free_cpumask_var(cpus);
8602 }
8603
8604 void kvm_make_scan_ioapic_request(struct kvm *kvm)
8605 {
8606         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
8607 }
8608
8609 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
8610 {
8611         if (!lapic_in_kernel(vcpu))
8612                 return;
8613
8614         vcpu->arch.apicv_active = kvm_apicv_activated(vcpu->kvm);
8615         kvm_apic_update_apicv(vcpu);
8616         kvm_x86_ops.refresh_apicv_exec_ctrl(vcpu);
8617 }
8618 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv);
8619
8620 /*
8621  * NOTE: Do not hold any lock prior to calling this.
8622  *
8623  * In particular, kvm_request_apicv_update() expects kvm->srcu not to be
8624  * locked, because it calls __x86_set_memory_region() which does
8625  * synchronize_srcu(&kvm->srcu).
8626  */
8627 void kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
8628 {
8629         struct kvm_vcpu *except;
8630         unsigned long old, new, expected;
8631
8632         if (!kvm_x86_ops.check_apicv_inhibit_reasons ||
8633             !kvm_x86_ops.check_apicv_inhibit_reasons(bit))
8634                 return;
8635
8636         old = READ_ONCE(kvm->arch.apicv_inhibit_reasons);
8637         do {
8638                 expected = new = old;
8639                 if (activate)
8640                         __clear_bit(bit, &new);
8641                 else
8642                         __set_bit(bit, &new);
8643                 if (new == old)
8644                         break;
8645                 old = cmpxchg(&kvm->arch.apicv_inhibit_reasons, expected, new);
8646         } while (old != expected);
8647
8648         if (!!old == !!new)
8649                 return;
8650
8651         trace_kvm_apicv_update_request(activate, bit);
8652         if (kvm_x86_ops.pre_update_apicv_exec_ctrl)
8653                 kvm_x86_ops.pre_update_apicv_exec_ctrl(kvm, activate);
8654
8655         /*
8656          * Sending request to update APICV for all other vcpus,
8657          * while update the calling vcpu immediately instead of
8658          * waiting for another #VMEXIT to handle the request.
8659          */
8660         except = kvm_get_running_vcpu();
8661         kvm_make_all_cpus_request_except(kvm, KVM_REQ_APICV_UPDATE,
8662                                          except);
8663         if (except)
8664                 kvm_vcpu_update_apicv(except);
8665 }
8666 EXPORT_SYMBOL_GPL(kvm_request_apicv_update);
8667
8668 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
8669 {
8670         if (!kvm_apic_present(vcpu))
8671                 return;
8672
8673         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
8674
8675         if (irqchip_split(vcpu->kvm))
8676                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
8677         else {
8678                 if (vcpu->arch.apicv_active)
8679                         kvm_x86_ops.sync_pir_to_irr(vcpu);
8680                 if (ioapic_in_kernel(vcpu->kvm))
8681                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
8682         }
8683
8684         if (is_guest_mode(vcpu))
8685                 vcpu->arch.load_eoi_exitmap_pending = true;
8686         else
8687                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
8688 }
8689
8690 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
8691 {
8692         u64 eoi_exit_bitmap[4];
8693
8694         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
8695                 return;
8696
8697         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
8698                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
8699         kvm_x86_ops.load_eoi_exitmap(vcpu, eoi_exit_bitmap);
8700 }
8701
8702 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
8703                                             unsigned long start, unsigned long end)
8704 {
8705         unsigned long apic_address;
8706
8707         /*
8708          * The physical address of apic access page is stored in the VMCS.
8709          * Update it when it becomes invalid.
8710          */
8711         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
8712         if (start <= apic_address && apic_address < end)
8713                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
8714 }
8715
8716 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
8717 {
8718         if (!lapic_in_kernel(vcpu))
8719                 return;
8720
8721         if (!kvm_x86_ops.set_apic_access_page_addr)
8722                 return;
8723
8724         kvm_x86_ops.set_apic_access_page_addr(vcpu);
8725 }
8726
8727 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
8728 {
8729         smp_send_reschedule(vcpu->cpu);
8730 }
8731 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
8732
8733 /*
8734  * Returns 1 to let vcpu_run() continue the guest execution loop without
8735  * exiting to the userspace.  Otherwise, the value will be returned to the
8736  * userspace.
8737  */
8738 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
8739 {
8740         int r;
8741         bool req_int_win =
8742                 dm_request_for_irq_injection(vcpu) &&
8743                 kvm_cpu_accept_dm_intr(vcpu);
8744         fastpath_t exit_fastpath;
8745
8746         bool req_immediate_exit = false;
8747
8748         if (kvm_request_pending(vcpu)) {
8749                 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu)) {
8750                         if (unlikely(!kvm_x86_ops.nested_ops->get_nested_state_pages(vcpu))) {
8751                                 r = 0;
8752                                 goto out;
8753                         }
8754                 }
8755                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
8756                         kvm_mmu_unload(vcpu);
8757                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
8758                         __kvm_migrate_timers(vcpu);
8759                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
8760                         kvm_gen_update_masterclock(vcpu->kvm);
8761                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
8762                         kvm_gen_kvmclock_update(vcpu);
8763                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
8764                         r = kvm_guest_time_update(vcpu);
8765                         if (unlikely(r))
8766                                 goto out;
8767                 }
8768                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
8769                         kvm_mmu_sync_roots(vcpu);
8770                 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD, vcpu))
8771                         kvm_mmu_load_pgd(vcpu);
8772                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) {
8773                         kvm_vcpu_flush_tlb_all(vcpu);
8774
8775                         /* Flushing all ASIDs flushes the current ASID... */
8776                         kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
8777                 }
8778                 if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu))
8779                         kvm_vcpu_flush_tlb_current(vcpu);
8780                 if (kvm_check_request(KVM_REQ_HV_TLB_FLUSH, vcpu))
8781                         kvm_vcpu_flush_tlb_guest(vcpu);
8782
8783                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
8784                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
8785                         r = 0;
8786                         goto out;
8787                 }
8788                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
8789                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
8790                         vcpu->mmio_needed = 0;
8791                         r = 0;
8792                         goto out;
8793                 }
8794                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
8795                         /* Page is swapped out. Do synthetic halt */
8796                         vcpu->arch.apf.halted = true;
8797                         r = 1;
8798                         goto out;
8799                 }
8800                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
8801                         record_steal_time(vcpu);
8802                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
8803                         process_smi(vcpu);
8804                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
8805                         process_nmi(vcpu);
8806                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
8807                         kvm_pmu_handle_event(vcpu);
8808                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
8809                         kvm_pmu_deliver_pmi(vcpu);
8810                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
8811                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
8812                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
8813                                      vcpu->arch.ioapic_handled_vectors)) {
8814                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
8815                                 vcpu->run->eoi.vector =
8816                                                 vcpu->arch.pending_ioapic_eoi;
8817                                 r = 0;
8818                                 goto out;
8819                         }
8820                 }
8821                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
8822                         vcpu_scan_ioapic(vcpu);
8823                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
8824                         vcpu_load_eoi_exitmap(vcpu);
8825                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
8826                         kvm_vcpu_reload_apic_access_page(vcpu);
8827                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
8828                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
8829                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
8830                         r = 0;
8831                         goto out;
8832                 }
8833                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
8834                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
8835                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
8836                         r = 0;
8837                         goto out;
8838                 }
8839                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
8840                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
8841                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
8842                         r = 0;
8843                         goto out;
8844                 }
8845
8846                 /*
8847                  * KVM_REQ_HV_STIMER has to be processed after
8848                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
8849                  * depend on the guest clock being up-to-date
8850                  */
8851                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
8852                         kvm_hv_process_stimers(vcpu);
8853                 if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu))
8854                         kvm_vcpu_update_apicv(vcpu);
8855                 if (kvm_check_request(KVM_REQ_APF_READY, vcpu))
8856                         kvm_check_async_pf_completion(vcpu);
8857                 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED, vcpu))
8858                         kvm_x86_ops.msr_filter_changed(vcpu);
8859         }
8860
8861         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
8862                 ++vcpu->stat.req_event;
8863                 kvm_apic_accept_events(vcpu);
8864                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
8865                         r = 1;
8866                         goto out;
8867                 }
8868
8869                 inject_pending_event(vcpu, &req_immediate_exit);
8870                 if (req_int_win)
8871                         kvm_x86_ops.enable_irq_window(vcpu);
8872
8873                 if (kvm_lapic_enabled(vcpu)) {
8874                         update_cr8_intercept(vcpu);
8875                         kvm_lapic_sync_to_vapic(vcpu);
8876                 }
8877         }
8878
8879         r = kvm_mmu_reload(vcpu);
8880         if (unlikely(r)) {
8881                 goto cancel_injection;
8882         }
8883
8884         preempt_disable();
8885
8886         kvm_x86_ops.prepare_guest_switch(vcpu);
8887
8888         /*
8889          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
8890          * IPI are then delayed after guest entry, which ensures that they
8891          * result in virtual interrupt delivery.
8892          */
8893         local_irq_disable();
8894         vcpu->mode = IN_GUEST_MODE;
8895
8896         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
8897
8898         /*
8899          * 1) We should set ->mode before checking ->requests.  Please see
8900          * the comment in kvm_vcpu_exiting_guest_mode().
8901          *
8902          * 2) For APICv, we should set ->mode before checking PID.ON. This
8903          * pairs with the memory barrier implicit in pi_test_and_set_on
8904          * (see vmx_deliver_posted_interrupt).
8905          *
8906          * 3) This also orders the write to mode from any reads to the page
8907          * tables done while the VCPU is running.  Please see the comment
8908          * in kvm_flush_remote_tlbs.
8909          */
8910         smp_mb__after_srcu_read_unlock();
8911
8912         /*
8913          * This handles the case where a posted interrupt was
8914          * notified with kvm_vcpu_kick.
8915          */
8916         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
8917                 kvm_x86_ops.sync_pir_to_irr(vcpu);
8918
8919         if (kvm_vcpu_exit_request(vcpu)) {
8920                 vcpu->mode = OUTSIDE_GUEST_MODE;
8921                 smp_wmb();
8922                 local_irq_enable();
8923                 preempt_enable();
8924                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8925                 r = 1;
8926                 goto cancel_injection;
8927         }
8928
8929         if (req_immediate_exit) {
8930                 kvm_make_request(KVM_REQ_EVENT, vcpu);
8931                 kvm_x86_ops.request_immediate_exit(vcpu);
8932         }
8933
8934         trace_kvm_entry(vcpu);
8935
8936         fpregs_assert_state_consistent();
8937         if (test_thread_flag(TIF_NEED_FPU_LOAD))
8938                 switch_fpu_return();
8939
8940         if (unlikely(vcpu->arch.switch_db_regs)) {
8941                 set_debugreg(0, 7);
8942                 set_debugreg(vcpu->arch.eff_db[0], 0);
8943                 set_debugreg(vcpu->arch.eff_db[1], 1);
8944                 set_debugreg(vcpu->arch.eff_db[2], 2);
8945                 set_debugreg(vcpu->arch.eff_db[3], 3);
8946                 set_debugreg(vcpu->arch.dr6, 6);
8947                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
8948         }
8949
8950         exit_fastpath = kvm_x86_ops.run(vcpu);
8951
8952         /*
8953          * Do this here before restoring debug registers on the host.  And
8954          * since we do this before handling the vmexit, a DR access vmexit
8955          * can (a) read the correct value of the debug registers, (b) set
8956          * KVM_DEBUGREG_WONT_EXIT again.
8957          */
8958         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
8959                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
8960                 kvm_x86_ops.sync_dirty_debug_regs(vcpu);
8961                 kvm_update_dr0123(vcpu);
8962                 kvm_update_dr7(vcpu);
8963                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
8964         }
8965
8966         /*
8967          * If the guest has used debug registers, at least dr7
8968          * will be disabled while returning to the host.
8969          * If we don't have active breakpoints in the host, we don't
8970          * care about the messed up debug address registers. But if
8971          * we have some of them active, restore the old state.
8972          */
8973         if (hw_breakpoint_active())
8974                 hw_breakpoint_restore();
8975
8976         vcpu->arch.last_vmentry_cpu = vcpu->cpu;
8977         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
8978
8979         vcpu->mode = OUTSIDE_GUEST_MODE;
8980         smp_wmb();
8981
8982         kvm_x86_ops.handle_exit_irqoff(vcpu);
8983
8984         /*
8985          * Consume any pending interrupts, including the possible source of
8986          * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
8987          * An instruction is required after local_irq_enable() to fully unblock
8988          * interrupts on processors that implement an interrupt shadow, the
8989          * stat.exits increment will do nicely.
8990          */
8991         kvm_before_interrupt(vcpu);
8992         local_irq_enable();
8993         ++vcpu->stat.exits;
8994         local_irq_disable();
8995         kvm_after_interrupt(vcpu);
8996
8997         if (lapic_in_kernel(vcpu)) {
8998                 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
8999                 if (delta != S64_MIN) {
9000                         trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
9001                         vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
9002                 }
9003         }
9004
9005         local_irq_enable();
9006         preempt_enable();
9007
9008         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9009
9010         /*
9011          * Profile KVM exit RIPs:
9012          */
9013         if (unlikely(prof_on == KVM_PROFILING)) {
9014                 unsigned long rip = kvm_rip_read(vcpu);
9015                 profile_hit(KVM_PROFILING, (void *)rip);
9016         }
9017
9018         if (unlikely(vcpu->arch.tsc_always_catchup))
9019                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
9020
9021         if (vcpu->arch.apic_attention)
9022                 kvm_lapic_sync_from_vapic(vcpu);
9023
9024         r = kvm_x86_ops.handle_exit(vcpu, exit_fastpath);
9025         return r;
9026
9027 cancel_injection:
9028         if (req_immediate_exit)
9029                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9030         kvm_x86_ops.cancel_injection(vcpu);
9031         if (unlikely(vcpu->arch.apic_attention))
9032                 kvm_lapic_sync_from_vapic(vcpu);
9033 out:
9034         return r;
9035 }
9036
9037 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
9038 {
9039         if (!kvm_arch_vcpu_runnable(vcpu) &&
9040             (!kvm_x86_ops.pre_block || kvm_x86_ops.pre_block(vcpu) == 0)) {
9041                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9042                 kvm_vcpu_block(vcpu);
9043                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9044
9045                 if (kvm_x86_ops.post_block)
9046                         kvm_x86_ops.post_block(vcpu);
9047
9048                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
9049                         return 1;
9050         }
9051
9052         kvm_apic_accept_events(vcpu);
9053         switch(vcpu->arch.mp_state) {
9054         case KVM_MP_STATE_HALTED:
9055                 vcpu->arch.pv.pv_unhalted = false;
9056                 vcpu->arch.mp_state =
9057                         KVM_MP_STATE_RUNNABLE;
9058                 fallthrough;
9059         case KVM_MP_STATE_RUNNABLE:
9060                 vcpu->arch.apf.halted = false;
9061                 break;
9062         case KVM_MP_STATE_INIT_RECEIVED:
9063                 break;
9064         default:
9065                 return -EINTR;
9066         }
9067         return 1;
9068 }
9069
9070 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
9071 {
9072         if (is_guest_mode(vcpu))
9073                 kvm_x86_ops.nested_ops->check_events(vcpu);
9074
9075         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
9076                 !vcpu->arch.apf.halted);
9077 }
9078
9079 static int vcpu_run(struct kvm_vcpu *vcpu)
9080 {
9081         int r;
9082         struct kvm *kvm = vcpu->kvm;
9083
9084         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9085         vcpu->arch.l1tf_flush_l1d = true;
9086
9087         for (;;) {
9088                 if (kvm_vcpu_running(vcpu)) {
9089                         r = vcpu_enter_guest(vcpu);
9090                 } else {
9091                         r = vcpu_block(kvm, vcpu);
9092                 }
9093
9094                 if (r <= 0)
9095                         break;
9096
9097                 kvm_clear_request(KVM_REQ_PENDING_TIMER, vcpu);
9098                 if (kvm_cpu_has_pending_timer(vcpu))
9099                         kvm_inject_pending_timer_irqs(vcpu);
9100
9101                 if (dm_request_for_irq_injection(vcpu) &&
9102                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
9103                         r = 0;
9104                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
9105                         ++vcpu->stat.request_irq_exits;
9106                         break;
9107                 }
9108
9109                 if (__xfer_to_guest_mode_work_pending()) {
9110                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9111                         r = xfer_to_guest_mode_handle_work(vcpu);
9112                         if (r)
9113                                 return r;
9114                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9115                 }
9116         }
9117
9118         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9119
9120         return r;
9121 }
9122
9123 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
9124 {
9125         int r;
9126
9127         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9128         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
9129         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9130         return r;
9131 }
9132
9133 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
9134 {
9135         BUG_ON(!vcpu->arch.pio.count);
9136
9137         return complete_emulated_io(vcpu);
9138 }
9139
9140 /*
9141  * Implements the following, as a state machine:
9142  *
9143  * read:
9144  *   for each fragment
9145  *     for each mmio piece in the fragment
9146  *       write gpa, len
9147  *       exit
9148  *       copy data
9149  *   execute insn
9150  *
9151  * write:
9152  *   for each fragment
9153  *     for each mmio piece in the fragment
9154  *       write gpa, len
9155  *       copy data
9156  *       exit
9157  */
9158 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
9159 {
9160         struct kvm_run *run = vcpu->run;
9161         struct kvm_mmio_fragment *frag;
9162         unsigned len;
9163
9164         BUG_ON(!vcpu->mmio_needed);
9165
9166         /* Complete previous fragment */
9167         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
9168         len = min(8u, frag->len);
9169         if (!vcpu->mmio_is_write)
9170                 memcpy(frag->data, run->mmio.data, len);
9171
9172         if (frag->len <= 8) {
9173                 /* Switch to the next fragment. */
9174                 frag++;
9175                 vcpu->mmio_cur_fragment++;
9176         } else {
9177                 /* Go forward to the next mmio piece. */
9178                 frag->data += len;
9179                 frag->gpa += len;
9180                 frag->len -= len;
9181         }
9182
9183         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
9184                 vcpu->mmio_needed = 0;
9185
9186                 /* FIXME: return into emulator if single-stepping.  */
9187                 if (vcpu->mmio_is_write)
9188                         return 1;
9189                 vcpu->mmio_read_completed = 1;
9190                 return complete_emulated_io(vcpu);
9191         }
9192
9193         run->exit_reason = KVM_EXIT_MMIO;
9194         run->mmio.phys_addr = frag->gpa;
9195         if (vcpu->mmio_is_write)
9196                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
9197         run->mmio.len = min(8u, frag->len);
9198         run->mmio.is_write = vcpu->mmio_is_write;
9199         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
9200         return 0;
9201 }
9202
9203 static void kvm_save_current_fpu(struct fpu *fpu)
9204 {
9205         /*
9206          * If the target FPU state is not resident in the CPU registers, just
9207          * memcpy() from current, else save CPU state directly to the target.
9208          */
9209         if (test_thread_flag(TIF_NEED_FPU_LOAD))
9210                 memcpy(&fpu->state, &current->thread.fpu.state,
9211                        fpu_kernel_xstate_size);
9212         else
9213                 copy_fpregs_to_fpstate(fpu);
9214 }
9215
9216 /* Swap (qemu) user FPU context for the guest FPU context. */
9217 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
9218 {
9219         fpregs_lock();
9220
9221         kvm_save_current_fpu(vcpu->arch.user_fpu);
9222
9223         /* PKRU is separately restored in kvm_x86_ops.run.  */
9224         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu->state,
9225                                 ~XFEATURE_MASK_PKRU);
9226
9227         fpregs_mark_activate();
9228         fpregs_unlock();
9229
9230         trace_kvm_fpu(1);
9231 }
9232
9233 /* When vcpu_run ends, restore user space FPU context. */
9234 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
9235 {
9236         fpregs_lock();
9237
9238         kvm_save_current_fpu(vcpu->arch.guest_fpu);
9239
9240         copy_kernel_to_fpregs(&vcpu->arch.user_fpu->state);
9241
9242         fpregs_mark_activate();
9243         fpregs_unlock();
9244
9245         ++vcpu->stat.fpu_reload;
9246         trace_kvm_fpu(0);
9247 }
9248
9249 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
9250 {
9251         struct kvm_run *kvm_run = vcpu->run;
9252         int r;
9253
9254         vcpu_load(vcpu);
9255         kvm_sigset_activate(vcpu);
9256         kvm_load_guest_fpu(vcpu);
9257
9258         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
9259                 if (kvm_run->immediate_exit) {
9260                         r = -EINTR;
9261                         goto out;
9262                 }
9263                 kvm_vcpu_block(vcpu);
9264                 kvm_apic_accept_events(vcpu);
9265                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
9266                 r = -EAGAIN;
9267                 if (signal_pending(current)) {
9268                         r = -EINTR;
9269                         kvm_run->exit_reason = KVM_EXIT_INTR;
9270                         ++vcpu->stat.signal_exits;
9271                 }
9272                 goto out;
9273         }
9274
9275         if (kvm_run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) {
9276                 r = -EINVAL;
9277                 goto out;
9278         }
9279
9280         if (kvm_run->kvm_dirty_regs) {
9281                 r = sync_regs(vcpu);
9282                 if (r != 0)
9283                         goto out;
9284         }
9285
9286         /* re-sync apic's tpr */
9287         if (!lapic_in_kernel(vcpu)) {
9288                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
9289                         r = -EINVAL;
9290                         goto out;
9291                 }
9292         }
9293
9294         if (unlikely(vcpu->arch.complete_userspace_io)) {
9295                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
9296                 vcpu->arch.complete_userspace_io = NULL;
9297                 r = cui(vcpu);
9298                 if (r <= 0)
9299                         goto out;
9300         } else
9301                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
9302
9303         if (kvm_run->immediate_exit)
9304                 r = -EINTR;
9305         else
9306                 r = vcpu_run(vcpu);
9307
9308 out:
9309         kvm_put_guest_fpu(vcpu);
9310         if (kvm_run->kvm_valid_regs)
9311                 store_regs(vcpu);
9312         post_kvm_run_save(vcpu);
9313         kvm_sigset_deactivate(vcpu);
9314
9315         vcpu_put(vcpu);
9316         return r;
9317 }
9318
9319 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9320 {
9321         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
9322                 /*
9323                  * We are here if userspace calls get_regs() in the middle of
9324                  * instruction emulation. Registers state needs to be copied
9325                  * back from emulation context to vcpu. Userspace shouldn't do
9326                  * that usually, but some bad designed PV devices (vmware
9327                  * backdoor interface) need this to work
9328                  */
9329                 emulator_writeback_register_cache(vcpu->arch.emulate_ctxt);
9330                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
9331         }
9332         regs->rax = kvm_rax_read(vcpu);
9333         regs->rbx = kvm_rbx_read(vcpu);
9334         regs->rcx = kvm_rcx_read(vcpu);
9335         regs->rdx = kvm_rdx_read(vcpu);
9336         regs->rsi = kvm_rsi_read(vcpu);
9337         regs->rdi = kvm_rdi_read(vcpu);
9338         regs->rsp = kvm_rsp_read(vcpu);
9339         regs->rbp = kvm_rbp_read(vcpu);
9340 #ifdef CONFIG_X86_64
9341         regs->r8 = kvm_r8_read(vcpu);
9342         regs->r9 = kvm_r9_read(vcpu);
9343         regs->r10 = kvm_r10_read(vcpu);
9344         regs->r11 = kvm_r11_read(vcpu);
9345         regs->r12 = kvm_r12_read(vcpu);
9346         regs->r13 = kvm_r13_read(vcpu);
9347         regs->r14 = kvm_r14_read(vcpu);
9348         regs->r15 = kvm_r15_read(vcpu);
9349 #endif
9350
9351         regs->rip = kvm_rip_read(vcpu);
9352         regs->rflags = kvm_get_rflags(vcpu);
9353 }
9354
9355 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9356 {
9357         vcpu_load(vcpu);
9358         __get_regs(vcpu, regs);
9359         vcpu_put(vcpu);
9360         return 0;
9361 }
9362
9363 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9364 {
9365         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
9366         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
9367
9368         kvm_rax_write(vcpu, regs->rax);
9369         kvm_rbx_write(vcpu, regs->rbx);
9370         kvm_rcx_write(vcpu, regs->rcx);
9371         kvm_rdx_write(vcpu, regs->rdx);
9372         kvm_rsi_write(vcpu, regs->rsi);
9373         kvm_rdi_write(vcpu, regs->rdi);
9374         kvm_rsp_write(vcpu, regs->rsp);
9375         kvm_rbp_write(vcpu, regs->rbp);
9376 #ifdef CONFIG_X86_64
9377         kvm_r8_write(vcpu, regs->r8);
9378         kvm_r9_write(vcpu, regs->r9);
9379         kvm_r10_write(vcpu, regs->r10);
9380         kvm_r11_write(vcpu, regs->r11);
9381         kvm_r12_write(vcpu, regs->r12);
9382         kvm_r13_write(vcpu, regs->r13);
9383         kvm_r14_write(vcpu, regs->r14);
9384         kvm_r15_write(vcpu, regs->r15);
9385 #endif
9386
9387         kvm_rip_write(vcpu, regs->rip);
9388         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
9389
9390         vcpu->arch.exception.pending = false;
9391
9392         kvm_make_request(KVM_REQ_EVENT, vcpu);
9393 }
9394
9395 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9396 {
9397         vcpu_load(vcpu);
9398         __set_regs(vcpu, regs);
9399         vcpu_put(vcpu);
9400         return 0;
9401 }
9402
9403 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
9404 {
9405         struct kvm_segment cs;
9406
9407         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
9408         *db = cs.db;
9409         *l = cs.l;
9410 }
9411 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
9412
9413 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9414 {
9415         struct desc_ptr dt;
9416
9417         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
9418         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
9419         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
9420         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
9421         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
9422         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
9423
9424         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
9425         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
9426
9427         kvm_x86_ops.get_idt(vcpu, &dt);
9428         sregs->idt.limit = dt.size;
9429         sregs->idt.base = dt.address;
9430         kvm_x86_ops.get_gdt(vcpu, &dt);
9431         sregs->gdt.limit = dt.size;
9432         sregs->gdt.base = dt.address;
9433
9434         sregs->cr0 = kvm_read_cr0(vcpu);
9435         sregs->cr2 = vcpu->arch.cr2;
9436         sregs->cr3 = kvm_read_cr3(vcpu);
9437         sregs->cr4 = kvm_read_cr4(vcpu);
9438         sregs->cr8 = kvm_get_cr8(vcpu);
9439         sregs->efer = vcpu->arch.efer;
9440         sregs->apic_base = kvm_get_apic_base(vcpu);
9441
9442         memset(sregs->interrupt_bitmap, 0, sizeof(sregs->interrupt_bitmap));
9443
9444         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
9445                 set_bit(vcpu->arch.interrupt.nr,
9446                         (unsigned long *)sregs->interrupt_bitmap);
9447 }
9448
9449 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
9450                                   struct kvm_sregs *sregs)
9451 {
9452         vcpu_load(vcpu);
9453         __get_sregs(vcpu, sregs);
9454         vcpu_put(vcpu);
9455         return 0;
9456 }
9457
9458 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
9459                                     struct kvm_mp_state *mp_state)
9460 {
9461         vcpu_load(vcpu);
9462         if (kvm_mpx_supported())
9463                 kvm_load_guest_fpu(vcpu);
9464
9465         kvm_apic_accept_events(vcpu);
9466         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
9467                                         vcpu->arch.pv.pv_unhalted)
9468                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
9469         else
9470                 mp_state->mp_state = vcpu->arch.mp_state;
9471
9472         if (kvm_mpx_supported())
9473                 kvm_put_guest_fpu(vcpu);
9474         vcpu_put(vcpu);
9475         return 0;
9476 }
9477
9478 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
9479                                     struct kvm_mp_state *mp_state)
9480 {
9481         int ret = -EINVAL;
9482
9483         vcpu_load(vcpu);
9484
9485         if (!lapic_in_kernel(vcpu) &&
9486             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
9487                 goto out;
9488
9489         /*
9490          * KVM_MP_STATE_INIT_RECEIVED means the processor is in
9491          * INIT state; latched init should be reported using
9492          * KVM_SET_VCPU_EVENTS, so reject it here.
9493          */
9494         if ((kvm_vcpu_latch_init(vcpu) || vcpu->arch.smi_pending) &&
9495             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
9496              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
9497                 goto out;
9498
9499         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
9500                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
9501                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
9502         } else
9503                 vcpu->arch.mp_state = mp_state->mp_state;
9504         kvm_make_request(KVM_REQ_EVENT, vcpu);
9505
9506         ret = 0;
9507 out:
9508         vcpu_put(vcpu);
9509         return ret;
9510 }
9511
9512 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
9513                     int reason, bool has_error_code, u32 error_code)
9514 {
9515         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
9516         int ret;
9517
9518         init_emulate_ctxt(vcpu);
9519
9520         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
9521                                    has_error_code, error_code);
9522         if (ret) {
9523                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
9524                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
9525                 vcpu->run->internal.ndata = 0;
9526                 return 0;
9527         }
9528
9529         kvm_rip_write(vcpu, ctxt->eip);
9530         kvm_set_rflags(vcpu, ctxt->eflags);
9531         return 1;
9532 }
9533 EXPORT_SYMBOL_GPL(kvm_task_switch);
9534
9535 static bool kvm_is_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9536 {
9537         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
9538                 /*
9539                  * When EFER.LME and CR0.PG are set, the processor is in
9540                  * 64-bit mode (though maybe in a 32-bit code segment).
9541                  * CR4.PAE and EFER.LMA must be set.
9542                  */
9543                 if (!(sregs->cr4 & X86_CR4_PAE) || !(sregs->efer & EFER_LMA))
9544                         return false;
9545         } else {
9546                 /*
9547                  * Not in 64-bit mode: EFER.LMA is clear and the code
9548                  * segment cannot be 64-bit.
9549                  */
9550                 if (sregs->efer & EFER_LMA || sregs->cs.l)
9551                         return false;
9552         }
9553
9554         return kvm_is_valid_cr4(vcpu, sregs->cr4);
9555 }
9556
9557 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9558 {
9559         struct msr_data apic_base_msr;
9560         int mmu_reset_needed = 0;
9561         int cpuid_update_needed = 0;
9562         int pending_vec, max_bits, idx;
9563         struct desc_ptr dt;
9564         int ret = -EINVAL;
9565
9566         if (!kvm_is_valid_sregs(vcpu, sregs))
9567                 goto out;
9568
9569         apic_base_msr.data = sregs->apic_base;
9570         apic_base_msr.host_initiated = true;
9571         if (kvm_set_apic_base(vcpu, &apic_base_msr))
9572                 goto out;
9573
9574         dt.size = sregs->idt.limit;
9575         dt.address = sregs->idt.base;
9576         kvm_x86_ops.set_idt(vcpu, &dt);
9577         dt.size = sregs->gdt.limit;
9578         dt.address = sregs->gdt.base;
9579         kvm_x86_ops.set_gdt(vcpu, &dt);
9580
9581         vcpu->arch.cr2 = sregs->cr2;
9582         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
9583         vcpu->arch.cr3 = sregs->cr3;
9584         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
9585
9586         kvm_set_cr8(vcpu, sregs->cr8);
9587
9588         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
9589         kvm_x86_ops.set_efer(vcpu, sregs->efer);
9590
9591         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
9592         kvm_x86_ops.set_cr0(vcpu, sregs->cr0);
9593         vcpu->arch.cr0 = sregs->cr0;
9594
9595         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
9596         cpuid_update_needed |= ((kvm_read_cr4(vcpu) ^ sregs->cr4) &
9597                                 (X86_CR4_OSXSAVE | X86_CR4_PKE));
9598         kvm_x86_ops.set_cr4(vcpu, sregs->cr4);
9599         if (cpuid_update_needed)
9600                 kvm_update_cpuid_runtime(vcpu);
9601
9602         idx = srcu_read_lock(&vcpu->kvm->srcu);
9603         if (is_pae_paging(vcpu)) {
9604                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
9605                 mmu_reset_needed = 1;
9606         }
9607         srcu_read_unlock(&vcpu->kvm->srcu, idx);
9608
9609         if (mmu_reset_needed)
9610                 kvm_mmu_reset_context(vcpu);
9611
9612         max_bits = KVM_NR_INTERRUPTS;
9613         pending_vec = find_first_bit(
9614                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
9615         if (pending_vec < max_bits) {
9616                 kvm_queue_interrupt(vcpu, pending_vec, false);
9617                 pr_debug("Set back pending irq %d\n", pending_vec);
9618         }
9619
9620         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
9621         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
9622         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
9623         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
9624         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
9625         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
9626
9627         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
9628         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
9629
9630         update_cr8_intercept(vcpu);
9631
9632         /* Older userspace won't unhalt the vcpu on reset. */
9633         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
9634             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
9635             !is_protmode(vcpu))
9636                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9637
9638         kvm_make_request(KVM_REQ_EVENT, vcpu);
9639
9640         ret = 0;
9641 out:
9642         return ret;
9643 }
9644
9645 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
9646                                   struct kvm_sregs *sregs)
9647 {
9648         int ret;
9649
9650         vcpu_load(vcpu);
9651         ret = __set_sregs(vcpu, sregs);
9652         vcpu_put(vcpu);
9653         return ret;
9654 }
9655
9656 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
9657                                         struct kvm_guest_debug *dbg)
9658 {
9659         unsigned long rflags;
9660         int i, r;
9661
9662         vcpu_load(vcpu);
9663
9664         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
9665                 r = -EBUSY;
9666                 if (vcpu->arch.exception.pending)
9667                         goto out;
9668                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
9669                         kvm_queue_exception(vcpu, DB_VECTOR);
9670                 else
9671                         kvm_queue_exception(vcpu, BP_VECTOR);
9672         }
9673
9674         /*
9675          * Read rflags as long as potentially injected trace flags are still
9676          * filtered out.
9677          */
9678         rflags = kvm_get_rflags(vcpu);
9679
9680         vcpu->guest_debug = dbg->control;
9681         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
9682                 vcpu->guest_debug = 0;
9683
9684         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
9685                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
9686                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
9687                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
9688         } else {
9689                 for (i = 0; i < KVM_NR_DB_REGS; i++)
9690                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
9691         }
9692         kvm_update_dr7(vcpu);
9693
9694         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
9695                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
9696                         get_segment_base(vcpu, VCPU_SREG_CS);
9697
9698         /*
9699          * Trigger an rflags update that will inject or remove the trace
9700          * flags.
9701          */
9702         kvm_set_rflags(vcpu, rflags);
9703
9704         kvm_x86_ops.update_exception_bitmap(vcpu);
9705
9706         r = 0;
9707
9708 out:
9709         vcpu_put(vcpu);
9710         return r;
9711 }
9712
9713 /*
9714  * Translate a guest virtual address to a guest physical address.
9715  */
9716 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
9717                                     struct kvm_translation *tr)
9718 {
9719         unsigned long vaddr = tr->linear_address;
9720         gpa_t gpa;
9721         int idx;
9722
9723         vcpu_load(vcpu);
9724
9725         idx = srcu_read_lock(&vcpu->kvm->srcu);
9726         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
9727         srcu_read_unlock(&vcpu->kvm->srcu, idx);
9728         tr->physical_address = gpa;
9729         tr->valid = gpa != UNMAPPED_GVA;
9730         tr->writeable = 1;
9731         tr->usermode = 0;
9732
9733         vcpu_put(vcpu);
9734         return 0;
9735 }
9736
9737 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
9738 {
9739         struct fxregs_state *fxsave;
9740
9741         vcpu_load(vcpu);
9742
9743         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
9744         memcpy(fpu->fpr, fxsave->st_space, 128);
9745         fpu->fcw = fxsave->cwd;
9746         fpu->fsw = fxsave->swd;
9747         fpu->ftwx = fxsave->twd;
9748         fpu->last_opcode = fxsave->fop;
9749         fpu->last_ip = fxsave->rip;
9750         fpu->last_dp = fxsave->rdp;
9751         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
9752
9753         vcpu_put(vcpu);
9754         return 0;
9755 }
9756
9757 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
9758 {
9759         struct fxregs_state *fxsave;
9760
9761         vcpu_load(vcpu);
9762
9763         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
9764
9765         memcpy(fxsave->st_space, fpu->fpr, 128);
9766         fxsave->cwd = fpu->fcw;
9767         fxsave->swd = fpu->fsw;
9768         fxsave->twd = fpu->ftwx;
9769         fxsave->fop = fpu->last_opcode;
9770         fxsave->rip = fpu->last_ip;
9771         fxsave->rdp = fpu->last_dp;
9772         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
9773
9774         vcpu_put(vcpu);
9775         return 0;
9776 }
9777
9778 static void store_regs(struct kvm_vcpu *vcpu)
9779 {
9780         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
9781
9782         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
9783                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
9784
9785         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
9786                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
9787
9788         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
9789                 kvm_vcpu_ioctl_x86_get_vcpu_events(
9790                                 vcpu, &vcpu->run->s.regs.events);
9791 }
9792
9793 static int sync_regs(struct kvm_vcpu *vcpu)
9794 {
9795         if (vcpu->run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)
9796                 return -EINVAL;
9797
9798         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
9799                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
9800                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
9801         }
9802         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
9803                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
9804                         return -EINVAL;
9805                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
9806         }
9807         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
9808                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
9809                                 vcpu, &vcpu->run->s.regs.events))
9810                         return -EINVAL;
9811                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
9812         }
9813
9814         return 0;
9815 }
9816
9817 static void fx_init(struct kvm_vcpu *vcpu)
9818 {
9819         fpstate_init(&vcpu->arch.guest_fpu->state);
9820         if (boot_cpu_has(X86_FEATURE_XSAVES))
9821                 vcpu->arch.guest_fpu->state.xsave.header.xcomp_bv =
9822                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
9823
9824         /*
9825          * Ensure guest xcr0 is valid for loading
9826          */
9827         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
9828
9829         vcpu->arch.cr0 |= X86_CR0_ET;
9830 }
9831
9832 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
9833 {
9834         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
9835                 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
9836                              "guest TSC will not be reliable\n");
9837
9838         return 0;
9839 }
9840
9841 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
9842 {
9843         struct page *page;
9844         int r;
9845
9846         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
9847                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9848         else
9849                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
9850
9851         kvm_set_tsc_khz(vcpu, max_tsc_khz);
9852
9853         r = kvm_mmu_create(vcpu);
9854         if (r < 0)
9855                 return r;
9856
9857         if (irqchip_in_kernel(vcpu->kvm)) {
9858                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
9859                 if (r < 0)
9860                         goto fail_mmu_destroy;
9861                 if (kvm_apicv_activated(vcpu->kvm))
9862                         vcpu->arch.apicv_active = true;
9863         } else
9864                 static_key_slow_inc(&kvm_no_apic_vcpu);
9865
9866         r = -ENOMEM;
9867
9868         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
9869         if (!page)
9870                 goto fail_free_lapic;
9871         vcpu->arch.pio_data = page_address(page);
9872
9873         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
9874                                        GFP_KERNEL_ACCOUNT);
9875         if (!vcpu->arch.mce_banks)
9876                 goto fail_free_pio_data;
9877         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
9878
9879         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
9880                                 GFP_KERNEL_ACCOUNT))
9881                 goto fail_free_mce_banks;
9882
9883         if (!alloc_emulate_ctxt(vcpu))
9884                 goto free_wbinvd_dirty_mask;
9885
9886         vcpu->arch.user_fpu = kmem_cache_zalloc(x86_fpu_cache,
9887                                                 GFP_KERNEL_ACCOUNT);
9888         if (!vcpu->arch.user_fpu) {
9889                 pr_err("kvm: failed to allocate userspace's fpu\n");
9890                 goto free_emulate_ctxt;
9891         }
9892
9893         vcpu->arch.guest_fpu = kmem_cache_zalloc(x86_fpu_cache,
9894                                                  GFP_KERNEL_ACCOUNT);
9895         if (!vcpu->arch.guest_fpu) {
9896                 pr_err("kvm: failed to allocate vcpu's fpu\n");
9897                 goto free_user_fpu;
9898         }
9899         fx_init(vcpu);
9900
9901         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
9902
9903         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
9904
9905         kvm_async_pf_hash_reset(vcpu);
9906         kvm_pmu_init(vcpu);
9907
9908         vcpu->arch.pending_external_vector = -1;
9909         vcpu->arch.preempted_in_kernel = false;
9910
9911         kvm_hv_vcpu_init(vcpu);
9912
9913         r = kvm_x86_ops.vcpu_create(vcpu);
9914         if (r)
9915                 goto free_guest_fpu;
9916
9917         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
9918         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
9919         kvm_vcpu_mtrr_init(vcpu);
9920         vcpu_load(vcpu);
9921         kvm_vcpu_reset(vcpu, false);
9922         kvm_init_mmu(vcpu, false);
9923         vcpu_put(vcpu);
9924         return 0;
9925
9926 free_guest_fpu:
9927         kmem_cache_free(x86_fpu_cache, vcpu->arch.guest_fpu);
9928 free_user_fpu:
9929         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
9930 free_emulate_ctxt:
9931         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
9932 free_wbinvd_dirty_mask:
9933         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
9934 fail_free_mce_banks:
9935         kfree(vcpu->arch.mce_banks);
9936 fail_free_pio_data:
9937         free_page((unsigned long)vcpu->arch.pio_data);
9938 fail_free_lapic:
9939         kvm_free_lapic(vcpu);
9940 fail_mmu_destroy:
9941         kvm_mmu_destroy(vcpu);
9942         return r;
9943 }
9944
9945 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
9946 {
9947         struct kvm *kvm = vcpu->kvm;
9948
9949         kvm_hv_vcpu_postcreate(vcpu);
9950
9951         if (mutex_lock_killable(&vcpu->mutex))
9952                 return;
9953         vcpu_load(vcpu);
9954         kvm_synchronize_tsc(vcpu, 0);
9955         vcpu_put(vcpu);
9956
9957         /* poll control enabled by default */
9958         vcpu->arch.msr_kvm_poll_control = 1;
9959
9960         mutex_unlock(&vcpu->mutex);
9961
9962         if (kvmclock_periodic_sync && vcpu->vcpu_idx == 0)
9963                 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
9964                                                 KVMCLOCK_SYNC_PERIOD);
9965 }
9966
9967 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
9968 {
9969         struct gfn_to_pfn_cache *cache = &vcpu->arch.st.cache;
9970         int idx;
9971
9972         kvm_release_pfn(cache->pfn, cache->dirty, cache);
9973
9974         kvmclock_reset(vcpu);
9975
9976         kvm_x86_ops.vcpu_free(vcpu);
9977
9978         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
9979         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
9980         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
9981         kmem_cache_free(x86_fpu_cache, vcpu->arch.guest_fpu);
9982
9983         kvm_hv_vcpu_uninit(vcpu);
9984         kvm_pmu_destroy(vcpu);
9985         kfree(vcpu->arch.mce_banks);
9986         kvm_free_lapic(vcpu);
9987         idx = srcu_read_lock(&vcpu->kvm->srcu);
9988         kvm_mmu_destroy(vcpu);
9989         srcu_read_unlock(&vcpu->kvm->srcu, idx);
9990         free_page((unsigned long)vcpu->arch.pio_data);
9991         kvfree(vcpu->arch.cpuid_entries);
9992         if (!lapic_in_kernel(vcpu))
9993                 static_key_slow_dec(&kvm_no_apic_vcpu);
9994 }
9995
9996 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
9997 {
9998         kvm_lapic_reset(vcpu, init_event);
9999
10000         vcpu->arch.hflags = 0;
10001
10002         vcpu->arch.smi_pending = 0;
10003         vcpu->arch.smi_count = 0;
10004         atomic_set(&vcpu->arch.nmi_queued, 0);
10005         vcpu->arch.nmi_pending = 0;
10006         vcpu->arch.nmi_injected = false;
10007         kvm_clear_interrupt_queue(vcpu);
10008         kvm_clear_exception_queue(vcpu);
10009
10010         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
10011         kvm_update_dr0123(vcpu);
10012         vcpu->arch.dr6 = DR6_INIT;
10013         vcpu->arch.dr7 = DR7_FIXED_1;
10014         kvm_update_dr7(vcpu);
10015
10016         vcpu->arch.cr2 = 0;
10017
10018         kvm_make_request(KVM_REQ_EVENT, vcpu);
10019         vcpu->arch.apf.msr_en_val = 0;
10020         vcpu->arch.apf.msr_int_val = 0;
10021         vcpu->arch.st.msr_val = 0;
10022
10023         kvmclock_reset(vcpu);
10024
10025         kvm_clear_async_pf_completion_queue(vcpu);
10026         kvm_async_pf_hash_reset(vcpu);
10027         vcpu->arch.apf.halted = false;
10028
10029         if (kvm_mpx_supported()) {
10030                 void *mpx_state_buffer;
10031
10032                 /*
10033                  * To avoid have the INIT path from kvm_apic_has_events() that be
10034                  * called with loaded FPU and does not let userspace fix the state.
10035                  */
10036                 if (init_event)
10037                         kvm_put_guest_fpu(vcpu);
10038                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10039                                         XFEATURE_BNDREGS);
10040                 if (mpx_state_buffer)
10041                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
10042                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10043                                         XFEATURE_BNDCSR);
10044                 if (mpx_state_buffer)
10045                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
10046                 if (init_event)
10047                         kvm_load_guest_fpu(vcpu);
10048         }
10049
10050         if (!init_event) {
10051                 kvm_pmu_reset(vcpu);
10052                 vcpu->arch.smbase = 0x30000;
10053
10054                 vcpu->arch.msr_misc_features_enables = 0;
10055
10056                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10057         }
10058
10059         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
10060         vcpu->arch.regs_avail = ~0;
10061         vcpu->arch.regs_dirty = ~0;
10062
10063         vcpu->arch.ia32_xss = 0;
10064
10065         kvm_x86_ops.vcpu_reset(vcpu, init_event);
10066 }
10067
10068 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
10069 {
10070         struct kvm_segment cs;
10071
10072         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
10073         cs.selector = vector << 8;
10074         cs.base = vector << 12;
10075         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
10076         kvm_rip_write(vcpu, 0);
10077 }
10078
10079 int kvm_arch_hardware_enable(void)
10080 {
10081         struct kvm *kvm;
10082         struct kvm_vcpu *vcpu;
10083         int i;
10084         int ret;
10085         u64 local_tsc;
10086         u64 max_tsc = 0;
10087         bool stable, backwards_tsc = false;
10088
10089         kvm_user_return_msr_cpu_online();
10090         ret = kvm_x86_ops.hardware_enable();
10091         if (ret != 0)
10092                 return ret;
10093
10094         local_tsc = rdtsc();
10095         stable = !kvm_check_tsc_unstable();
10096         list_for_each_entry(kvm, &vm_list, vm_list) {
10097                 kvm_for_each_vcpu(i, vcpu, kvm) {
10098                         if (!stable && vcpu->cpu == smp_processor_id())
10099                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
10100                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
10101                                 backwards_tsc = true;
10102                                 if (vcpu->arch.last_host_tsc > max_tsc)
10103                                         max_tsc = vcpu->arch.last_host_tsc;
10104                         }
10105                 }
10106         }
10107
10108         /*
10109          * Sometimes, even reliable TSCs go backwards.  This happens on
10110          * platforms that reset TSC during suspend or hibernate actions, but
10111          * maintain synchronization.  We must compensate.  Fortunately, we can
10112          * detect that condition here, which happens early in CPU bringup,
10113          * before any KVM threads can be running.  Unfortunately, we can't
10114          * bring the TSCs fully up to date with real time, as we aren't yet far
10115          * enough into CPU bringup that we know how much real time has actually
10116          * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
10117          * variables that haven't been updated yet.
10118          *
10119          * So we simply find the maximum observed TSC above, then record the
10120          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
10121          * the adjustment will be applied.  Note that we accumulate
10122          * adjustments, in case multiple suspend cycles happen before some VCPU
10123          * gets a chance to run again.  In the event that no KVM threads get a
10124          * chance to run, we will miss the entire elapsed period, as we'll have
10125          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
10126          * loose cycle time.  This isn't too big a deal, since the loss will be
10127          * uniform across all VCPUs (not to mention the scenario is extremely
10128          * unlikely). It is possible that a second hibernate recovery happens
10129          * much faster than a first, causing the observed TSC here to be
10130          * smaller; this would require additional padding adjustment, which is
10131          * why we set last_host_tsc to the local tsc observed here.
10132          *
10133          * N.B. - this code below runs only on platforms with reliable TSC,
10134          * as that is the only way backwards_tsc is set above.  Also note
10135          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
10136          * have the same delta_cyc adjustment applied if backwards_tsc
10137          * is detected.  Note further, this adjustment is only done once,
10138          * as we reset last_host_tsc on all VCPUs to stop this from being
10139          * called multiple times (one for each physical CPU bringup).
10140          *
10141          * Platforms with unreliable TSCs don't have to deal with this, they
10142          * will be compensated by the logic in vcpu_load, which sets the TSC to
10143          * catchup mode.  This will catchup all VCPUs to real time, but cannot
10144          * guarantee that they stay in perfect synchronization.
10145          */
10146         if (backwards_tsc) {
10147                 u64 delta_cyc = max_tsc - local_tsc;
10148                 list_for_each_entry(kvm, &vm_list, vm_list) {
10149                         kvm->arch.backwards_tsc_observed = true;
10150                         kvm_for_each_vcpu(i, vcpu, kvm) {
10151                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
10152                                 vcpu->arch.last_host_tsc = local_tsc;
10153                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
10154                         }
10155
10156                         /*
10157                          * We have to disable TSC offset matching.. if you were
10158                          * booting a VM while issuing an S4 host suspend....
10159                          * you may have some problem.  Solving this issue is
10160                          * left as an exercise to the reader.
10161                          */
10162                         kvm->arch.last_tsc_nsec = 0;
10163                         kvm->arch.last_tsc_write = 0;
10164                 }
10165
10166         }
10167         return 0;
10168 }
10169
10170 void kvm_arch_hardware_disable(void)
10171 {
10172         kvm_x86_ops.hardware_disable();
10173         drop_user_return_notifiers();
10174 }
10175
10176 int kvm_arch_hardware_setup(void *opaque)
10177 {
10178         struct kvm_x86_init_ops *ops = opaque;
10179         int r;
10180
10181         rdmsrl_safe(MSR_EFER, &host_efer);
10182
10183         if (boot_cpu_has(X86_FEATURE_XSAVES))
10184                 rdmsrl(MSR_IA32_XSS, host_xss);
10185
10186         r = ops->hardware_setup();
10187         if (r != 0)
10188                 return r;
10189
10190         memcpy(&kvm_x86_ops, ops->runtime_ops, sizeof(kvm_x86_ops));
10191
10192         if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))
10193                 supported_xss = 0;
10194
10195 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
10196         cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
10197 #undef __kvm_cpu_cap_has
10198
10199         if (kvm_has_tsc_control) {
10200                 /*
10201                  * Make sure the user can only configure tsc_khz values that
10202                  * fit into a signed integer.
10203                  * A min value is not calculated because it will always
10204                  * be 1 on all machines.
10205                  */
10206                 u64 max = min(0x7fffffffULL,
10207                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
10208                 kvm_max_guest_tsc_khz = max;
10209
10210                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
10211         }
10212
10213         kvm_init_msr_list();
10214         return 0;
10215 }
10216
10217 void kvm_arch_hardware_unsetup(void)
10218 {
10219         kvm_x86_ops.hardware_unsetup();
10220 }
10221
10222 int kvm_arch_check_processor_compat(void *opaque)
10223 {
10224         struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
10225         struct kvm_x86_init_ops *ops = opaque;
10226
10227         WARN_ON(!irqs_disabled());
10228
10229         if (__cr4_reserved_bits(cpu_has, c) !=
10230             __cr4_reserved_bits(cpu_has, &boot_cpu_data))
10231                 return -EIO;
10232
10233         return ops->check_processor_compatibility();
10234 }
10235
10236 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
10237 {
10238         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
10239 }
10240 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
10241
10242 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
10243 {
10244         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
10245 }
10246
10247 struct static_key kvm_no_apic_vcpu __read_mostly;
10248 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
10249
10250 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
10251 {
10252         struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
10253
10254         vcpu->arch.l1tf_flush_l1d = true;
10255         if (pmu->version && unlikely(pmu->event_count)) {
10256                 pmu->need_cleanup = true;
10257                 kvm_make_request(KVM_REQ_PMU, vcpu);
10258         }
10259         kvm_x86_ops.sched_in(vcpu, cpu);
10260 }
10261
10262 void kvm_arch_free_vm(struct kvm *kvm)
10263 {
10264         kfree(kvm->arch.hyperv.hv_pa_pg);
10265         vfree(kvm);
10266 }
10267
10268
10269 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
10270 {
10271         if (type)
10272                 return -EINVAL;
10273
10274         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
10275         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
10276         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
10277         INIT_LIST_HEAD(&kvm->arch.lpage_disallowed_mmu_pages);
10278         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
10279         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
10280
10281         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
10282         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
10283         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
10284         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
10285                 &kvm->arch.irq_sources_bitmap);
10286
10287         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
10288         mutex_init(&kvm->arch.apic_map_lock);
10289         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
10290
10291         kvm->arch.kvmclock_offset = -get_kvmclock_base_ns();
10292         pvclock_update_vm_gtod_copy(kvm);
10293
10294         kvm->arch.guest_can_read_msr_platform_info = true;
10295
10296         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
10297         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
10298
10299         kvm_hv_init_vm(kvm);
10300         kvm_page_track_init(kvm);
10301         kvm_mmu_init_vm(kvm);
10302
10303         return kvm_x86_ops.vm_init(kvm);
10304 }
10305
10306 int kvm_arch_post_init_vm(struct kvm *kvm)
10307 {
10308         return kvm_mmu_post_init_vm(kvm);
10309 }
10310
10311 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
10312 {
10313         vcpu_load(vcpu);
10314         kvm_mmu_unload(vcpu);
10315         vcpu_put(vcpu);
10316 }
10317
10318 static void kvm_free_vcpus(struct kvm *kvm)
10319 {
10320         unsigned int i;
10321         struct kvm_vcpu *vcpu;
10322
10323         /*
10324          * Unpin any mmu pages first.
10325          */
10326         kvm_for_each_vcpu(i, vcpu, kvm) {
10327                 kvm_clear_async_pf_completion_queue(vcpu);
10328                 kvm_unload_vcpu_mmu(vcpu);
10329         }
10330         kvm_for_each_vcpu(i, vcpu, kvm)
10331                 kvm_vcpu_destroy(vcpu);
10332
10333         mutex_lock(&kvm->lock);
10334         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
10335                 kvm->vcpus[i] = NULL;
10336
10337         atomic_set(&kvm->online_vcpus, 0);
10338         mutex_unlock(&kvm->lock);
10339 }
10340
10341 void kvm_arch_sync_events(struct kvm *kvm)
10342 {
10343         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
10344         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
10345         kvm_free_pit(kvm);
10346 }
10347
10348 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
10349 {
10350         int i, r;
10351         unsigned long hva, old_npages;
10352         struct kvm_memslots *slots = kvm_memslots(kvm);
10353         struct kvm_memory_slot *slot;
10354
10355         /* Called with kvm->slots_lock held.  */
10356         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
10357                 return -EINVAL;
10358
10359         slot = id_to_memslot(slots, id);
10360         if (size) {
10361                 if (slot && slot->npages)
10362                         return -EEXIST;
10363
10364                 /*
10365                  * MAP_SHARED to prevent internal slot pages from being moved
10366                  * by fork()/COW.
10367                  */
10368                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
10369                               MAP_SHARED | MAP_ANONYMOUS, 0);
10370                 if (IS_ERR((void *)hva))
10371                         return PTR_ERR((void *)hva);
10372         } else {
10373                 if (!slot || !slot->npages)
10374                         return 0;
10375
10376                 old_npages = slot->npages;
10377                 hva = 0;
10378         }
10379
10380         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
10381                 struct kvm_userspace_memory_region m;
10382
10383                 m.slot = id | (i << 16);
10384                 m.flags = 0;
10385                 m.guest_phys_addr = gpa;
10386                 m.userspace_addr = hva;
10387                 m.memory_size = size;
10388                 r = __kvm_set_memory_region(kvm, &m);
10389                 if (r < 0)
10390                         return r;
10391         }
10392
10393         if (!size)
10394                 vm_munmap(hva, old_npages * PAGE_SIZE);
10395
10396         return 0;
10397 }
10398 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
10399
10400 void kvm_arch_pre_destroy_vm(struct kvm *kvm)
10401 {
10402         kvm_mmu_pre_destroy_vm(kvm);
10403 }
10404
10405 void kvm_arch_destroy_vm(struct kvm *kvm)
10406 {
10407         u32 i;
10408
10409         if (current->mm == kvm->mm) {
10410                 /*
10411                  * Free memory regions allocated on behalf of userspace,
10412                  * unless the the memory map has changed due to process exit
10413                  * or fd copying.
10414                  */
10415                 mutex_lock(&kvm->slots_lock);
10416                 __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
10417                                         0, 0);
10418                 __x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT,
10419                                         0, 0);
10420                 __x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
10421                 mutex_unlock(&kvm->slots_lock);
10422         }
10423         if (kvm_x86_ops.vm_destroy)
10424                 kvm_x86_ops.vm_destroy(kvm);
10425         for (i = 0; i < kvm->arch.msr_filter.count; i++)
10426                 kfree(kvm->arch.msr_filter.ranges[i].bitmap);
10427         kvm_pic_destroy(kvm);
10428         kvm_ioapic_destroy(kvm);
10429         kvm_free_vcpus(kvm);
10430         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
10431         kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
10432         kvm_mmu_uninit_vm(kvm);
10433         kvm_page_track_cleanup(kvm);
10434         kvm_hv_destroy_vm(kvm);
10435 }
10436
10437 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
10438 {
10439         int i;
10440
10441         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10442                 kvfree(slot->arch.rmap[i]);
10443                 slot->arch.rmap[i] = NULL;
10444
10445                 if (i == 0)
10446                         continue;
10447
10448                 kvfree(slot->arch.lpage_info[i - 1]);
10449                 slot->arch.lpage_info[i - 1] = NULL;
10450         }
10451
10452         kvm_page_track_free_memslot(slot);
10453 }
10454
10455 static int kvm_alloc_memslot_metadata(struct kvm_memory_slot *slot,
10456                                       unsigned long npages)
10457 {
10458         int i;
10459
10460         /*
10461          * Clear out the previous array pointers for the KVM_MR_MOVE case.  The
10462          * old arrays will be freed by __kvm_set_memory_region() if installing
10463          * the new memslot is successful.
10464          */
10465         memset(&slot->arch, 0, sizeof(slot->arch));
10466
10467         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10468                 struct kvm_lpage_info *linfo;
10469                 unsigned long ugfn;
10470                 int lpages;
10471                 int level = i + 1;
10472
10473                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
10474                                       slot->base_gfn, level) + 1;
10475
10476                 slot->arch.rmap[i] =
10477                         kvcalloc(lpages, sizeof(*slot->arch.rmap[i]),
10478                                  GFP_KERNEL_ACCOUNT);
10479                 if (!slot->arch.rmap[i])
10480                         goto out_free;
10481                 if (i == 0)
10482                         continue;
10483
10484                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
10485                 if (!linfo)
10486                         goto out_free;
10487
10488                 slot->arch.lpage_info[i - 1] = linfo;
10489
10490                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
10491                         linfo[0].disallow_lpage = 1;
10492                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
10493                         linfo[lpages - 1].disallow_lpage = 1;
10494                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
10495                 /*
10496                  * If the gfn and userspace address are not aligned wrt each
10497                  * other, disable large page support for this slot.
10498                  */
10499                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1)) {
10500                         unsigned long j;
10501
10502                         for (j = 0; j < lpages; ++j)
10503                                 linfo[j].disallow_lpage = 1;
10504                 }
10505         }
10506
10507         if (kvm_page_track_create_memslot(slot, npages))
10508                 goto out_free;
10509
10510         return 0;
10511
10512 out_free:
10513         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10514                 kvfree(slot->arch.rmap[i]);
10515                 slot->arch.rmap[i] = NULL;
10516                 if (i == 0)
10517                         continue;
10518
10519                 kvfree(slot->arch.lpage_info[i - 1]);
10520                 slot->arch.lpage_info[i - 1] = NULL;
10521         }
10522         return -ENOMEM;
10523 }
10524
10525 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
10526 {
10527         struct kvm_vcpu *vcpu;
10528         int i;
10529
10530         /*
10531          * memslots->generation has been incremented.
10532          * mmio generation may have reached its maximum value.
10533          */
10534         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
10535
10536         /* Force re-initialization of steal_time cache */
10537         kvm_for_each_vcpu(i, vcpu, kvm)
10538                 kvm_vcpu_kick(vcpu);
10539 }
10540
10541 int kvm_arch_prepare_memory_region(struct kvm *kvm,
10542                                 struct kvm_memory_slot *memslot,
10543                                 const struct kvm_userspace_memory_region *mem,
10544                                 enum kvm_mr_change change)
10545 {
10546         if (change == KVM_MR_CREATE || change == KVM_MR_MOVE)
10547                 return kvm_alloc_memslot_metadata(memslot,
10548                                                   mem->memory_size >> PAGE_SHIFT);
10549         return 0;
10550 }
10551
10552 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
10553                                      struct kvm_memory_slot *old,
10554                                      struct kvm_memory_slot *new,
10555                                      enum kvm_mr_change change)
10556 {
10557         /*
10558          * Nothing to do for RO slots or CREATE/MOVE/DELETE of a slot.
10559          * See comments below.
10560          */
10561         if ((change != KVM_MR_FLAGS_ONLY) || (new->flags & KVM_MEM_READONLY))
10562                 return;
10563
10564         /*
10565          * Dirty logging tracks sptes in 4k granularity, meaning that large
10566          * sptes have to be split.  If live migration is successful, the guest
10567          * in the source machine will be destroyed and large sptes will be
10568          * created in the destination. However, if the guest continues to run
10569          * in the source machine (for example if live migration fails), small
10570          * sptes will remain around and cause bad performance.
10571          *
10572          * Scan sptes if dirty logging has been stopped, dropping those
10573          * which can be collapsed into a single large-page spte.  Later
10574          * page faults will create the large-page sptes.
10575          *
10576          * There is no need to do this in any of the following cases:
10577          * CREATE:      No dirty mappings will already exist.
10578          * MOVE/DELETE: The old mappings will already have been cleaned up by
10579          *              kvm_arch_flush_shadow_memslot()
10580          */
10581         if ((old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
10582             !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
10583                 kvm_mmu_zap_collapsible_sptes(kvm, new);
10584
10585         /*
10586          * Enable or disable dirty logging for the slot.
10587          *
10588          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of the old
10589          * slot have been zapped so no dirty logging updates are needed for
10590          * the old slot.
10591          * For KVM_MR_CREATE and KVM_MR_MOVE, once the new slot is visible
10592          * any mappings that might be created in it will consume the
10593          * properties of the new slot and do not need to be updated here.
10594          *
10595          * When PML is enabled, the kvm_x86_ops dirty logging hooks are
10596          * called to enable/disable dirty logging.
10597          *
10598          * When disabling dirty logging with PML enabled, the D-bit is set
10599          * for sptes in the slot in order to prevent unnecessary GPA
10600          * logging in the PML buffer (and potential PML buffer full VMEXIT).
10601          * This guarantees leaving PML enabled for the guest's lifetime
10602          * won't have any additional overhead from PML when the guest is
10603          * running with dirty logging disabled.
10604          *
10605          * When enabling dirty logging, large sptes are write-protected
10606          * so they can be split on first write.  New large sptes cannot
10607          * be created for this slot until the end of the logging.
10608          * See the comments in fast_page_fault().
10609          * For small sptes, nothing is done if the dirty log is in the
10610          * initial-all-set state.  Otherwise, depending on whether pml
10611          * is enabled the D-bit or the W-bit will be cleared.
10612          */
10613         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
10614                 if (kvm_x86_ops.slot_enable_log_dirty) {
10615                         kvm_x86_ops.slot_enable_log_dirty(kvm, new);
10616                 } else {
10617                         int level =
10618                                 kvm_dirty_log_manual_protect_and_init_set(kvm) ?
10619                                 PG_LEVEL_2M : PG_LEVEL_4K;
10620
10621                         /*
10622                          * If we're with initial-all-set, we don't need
10623                          * to write protect any small page because
10624                          * they're reported as dirty already.  However
10625                          * we still need to write-protect huge pages
10626                          * so that the page split can happen lazily on
10627                          * the first write to the huge page.
10628                          */
10629                         kvm_mmu_slot_remove_write_access(kvm, new, level);
10630                 }
10631         } else {
10632                 if (kvm_x86_ops.slot_disable_log_dirty)
10633                         kvm_x86_ops.slot_disable_log_dirty(kvm, new);
10634         }
10635 }
10636
10637 void kvm_arch_commit_memory_region(struct kvm *kvm,
10638                                 const struct kvm_userspace_memory_region *mem,
10639                                 struct kvm_memory_slot *old,
10640                                 const struct kvm_memory_slot *new,
10641                                 enum kvm_mr_change change)
10642 {
10643         if (!kvm->arch.n_requested_mmu_pages)
10644                 kvm_mmu_change_mmu_pages(kvm,
10645                                 kvm_mmu_calculate_default_mmu_pages(kvm));
10646
10647         /*
10648          * FIXME: const-ify all uses of struct kvm_memory_slot.
10649          */
10650         kvm_mmu_slot_apply_flags(kvm, old, (struct kvm_memory_slot *) new, change);
10651
10652         /* Free the arrays associated with the old memslot. */
10653         if (change == KVM_MR_MOVE)
10654                 kvm_arch_free_memslot(kvm, old);
10655 }
10656
10657 void kvm_arch_flush_shadow_all(struct kvm *kvm)
10658 {
10659         kvm_mmu_zap_all(kvm);
10660 }
10661
10662 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
10663                                    struct kvm_memory_slot *slot)
10664 {
10665         kvm_page_track_flush_slot(kvm, slot);
10666 }
10667
10668 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
10669 {
10670         return (is_guest_mode(vcpu) &&
10671                         kvm_x86_ops.guest_apic_has_interrupt &&
10672                         kvm_x86_ops.guest_apic_has_interrupt(vcpu));
10673 }
10674
10675 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
10676 {
10677         if (!list_empty_careful(&vcpu->async_pf.done))
10678                 return true;
10679
10680         if (kvm_apic_has_events(vcpu))
10681                 return true;
10682
10683         if (vcpu->arch.pv.pv_unhalted)
10684                 return true;
10685
10686         if (vcpu->arch.exception.pending)
10687                 return true;
10688
10689         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
10690             (vcpu->arch.nmi_pending &&
10691              kvm_x86_ops.nmi_allowed(vcpu, false)))
10692                 return true;
10693
10694         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
10695             (vcpu->arch.smi_pending &&
10696              kvm_x86_ops.smi_allowed(vcpu, false)))
10697                 return true;
10698
10699         if (kvm_arch_interrupt_allowed(vcpu) &&
10700             (kvm_cpu_has_interrupt(vcpu) ||
10701             kvm_guest_apic_has_interrupt(vcpu)))
10702                 return true;
10703
10704         if (kvm_hv_has_stimer_pending(vcpu))
10705                 return true;
10706
10707         if (is_guest_mode(vcpu) &&
10708             kvm_x86_ops.nested_ops->hv_timer_pending &&
10709             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
10710                 return true;
10711
10712         return false;
10713 }
10714
10715 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
10716 {
10717         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
10718 }
10719
10720 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
10721 {
10722         if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
10723                 return true;
10724
10725         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
10726                 kvm_test_request(KVM_REQ_SMI, vcpu) ||
10727                  kvm_test_request(KVM_REQ_EVENT, vcpu))
10728                 return true;
10729
10730         if (vcpu->arch.apicv_active && kvm_x86_ops.dy_apicv_has_pending_interrupt(vcpu))
10731                 return true;
10732
10733         return false;
10734 }
10735
10736 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
10737 {
10738         return vcpu->arch.preempted_in_kernel;
10739 }
10740
10741 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
10742 {
10743         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
10744 }
10745
10746 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
10747 {
10748         return kvm_x86_ops.interrupt_allowed(vcpu, false);
10749 }
10750
10751 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
10752 {
10753         if (is_64_bit_mode(vcpu))
10754                 return kvm_rip_read(vcpu);
10755         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
10756                      kvm_rip_read(vcpu));
10757 }
10758 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
10759
10760 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
10761 {
10762         return kvm_get_linear_rip(vcpu) == linear_rip;
10763 }
10764 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
10765
10766 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
10767 {
10768         unsigned long rflags;
10769
10770         rflags = kvm_x86_ops.get_rflags(vcpu);
10771         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
10772                 rflags &= ~X86_EFLAGS_TF;
10773         return rflags;
10774 }
10775 EXPORT_SYMBOL_GPL(kvm_get_rflags);
10776
10777 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
10778 {
10779         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
10780             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
10781                 rflags |= X86_EFLAGS_TF;
10782         kvm_x86_ops.set_rflags(vcpu, rflags);
10783 }
10784
10785 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
10786 {
10787         __kvm_set_rflags(vcpu, rflags);
10788         kvm_make_request(KVM_REQ_EVENT, vcpu);
10789 }
10790 EXPORT_SYMBOL_GPL(kvm_set_rflags);
10791
10792 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
10793 {
10794         int r;
10795
10796         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
10797               work->wakeup_all)
10798                 return;
10799
10800         r = kvm_mmu_reload(vcpu);
10801         if (unlikely(r))
10802                 return;
10803
10804         if (!vcpu->arch.mmu->direct_map &&
10805               work->arch.cr3 != vcpu->arch.mmu->get_guest_pgd(vcpu))
10806                 return;
10807
10808         kvm_mmu_do_page_fault(vcpu, work->cr2_or_gpa, 0, true);
10809 }
10810
10811 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
10812 {
10813         BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU));
10814
10815         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
10816 }
10817
10818 static inline u32 kvm_async_pf_next_probe(u32 key)
10819 {
10820         return (key + 1) & (ASYNC_PF_PER_VCPU - 1);
10821 }
10822
10823 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
10824 {
10825         u32 key = kvm_async_pf_hash_fn(gfn);
10826
10827         while (vcpu->arch.apf.gfns[key] != ~0)
10828                 key = kvm_async_pf_next_probe(key);
10829
10830         vcpu->arch.apf.gfns[key] = gfn;
10831 }
10832
10833 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
10834 {
10835         int i;
10836         u32 key = kvm_async_pf_hash_fn(gfn);
10837
10838         for (i = 0; i < ASYNC_PF_PER_VCPU &&
10839                      (vcpu->arch.apf.gfns[key] != gfn &&
10840                       vcpu->arch.apf.gfns[key] != ~0); i++)
10841                 key = kvm_async_pf_next_probe(key);
10842
10843         return key;
10844 }
10845
10846 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
10847 {
10848         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
10849 }
10850
10851 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
10852 {
10853         u32 i, j, k;
10854
10855         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
10856
10857         if (WARN_ON_ONCE(vcpu->arch.apf.gfns[i] != gfn))
10858                 return;
10859
10860         while (true) {
10861                 vcpu->arch.apf.gfns[i] = ~0;
10862                 do {
10863                         j = kvm_async_pf_next_probe(j);
10864                         if (vcpu->arch.apf.gfns[j] == ~0)
10865                                 return;
10866                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
10867                         /*
10868                          * k lies cyclically in ]i,j]
10869                          * |    i.k.j |
10870                          * |....j i.k.| or  |.k..j i...|
10871                          */
10872                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
10873                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
10874                 i = j;
10875         }
10876 }
10877
10878 static inline int apf_put_user_notpresent(struct kvm_vcpu *vcpu)
10879 {
10880         u32 reason = KVM_PV_REASON_PAGE_NOT_PRESENT;
10881
10882         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &reason,
10883                                       sizeof(reason));
10884 }
10885
10886 static inline int apf_put_user_ready(struct kvm_vcpu *vcpu, u32 token)
10887 {
10888         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
10889
10890         return kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
10891                                              &token, offset, sizeof(token));
10892 }
10893
10894 static inline bool apf_pageready_slot_free(struct kvm_vcpu *vcpu)
10895 {
10896         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
10897         u32 val;
10898
10899         if (kvm_read_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
10900                                          &val, offset, sizeof(val)))
10901                 return false;
10902
10903         return !val;
10904 }
10905
10906 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
10907 {
10908         if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
10909                 return false;
10910
10911         if (!kvm_pv_async_pf_enabled(vcpu) ||
10912             (vcpu->arch.apf.send_user_only && kvm_x86_ops.get_cpl(vcpu) == 0))
10913                 return false;
10914
10915         return true;
10916 }
10917
10918 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
10919 {
10920         if (unlikely(!lapic_in_kernel(vcpu) ||
10921                      kvm_event_needs_reinjection(vcpu) ||
10922                      vcpu->arch.exception.pending))
10923                 return false;
10924
10925         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
10926                 return false;
10927
10928         /*
10929          * If interrupts are off we cannot even use an artificial
10930          * halt state.
10931          */
10932         return kvm_arch_interrupt_allowed(vcpu);
10933 }
10934
10935 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
10936                                      struct kvm_async_pf *work)
10937 {
10938         struct x86_exception fault;
10939
10940         trace_kvm_async_pf_not_present(work->arch.token, work->cr2_or_gpa);
10941         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
10942
10943         if (kvm_can_deliver_async_pf(vcpu) &&
10944             !apf_put_user_notpresent(vcpu)) {
10945                 fault.vector = PF_VECTOR;
10946                 fault.error_code_valid = true;
10947                 fault.error_code = 0;
10948                 fault.nested_page_fault = false;
10949                 fault.address = work->arch.token;
10950                 fault.async_page_fault = true;
10951                 kvm_inject_page_fault(vcpu, &fault);
10952                 return true;
10953         } else {
10954                 /*
10955                  * It is not possible to deliver a paravirtualized asynchronous
10956                  * page fault, but putting the guest in an artificial halt state
10957                  * can be beneficial nevertheless: if an interrupt arrives, we
10958                  * can deliver it timely and perhaps the guest will schedule
10959                  * another process.  When the instruction that triggered a page
10960                  * fault is retried, hopefully the page will be ready in the host.
10961                  */
10962                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
10963                 return false;
10964         }
10965 }
10966
10967 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
10968                                  struct kvm_async_pf *work)
10969 {
10970         struct kvm_lapic_irq irq = {
10971                 .delivery_mode = APIC_DM_FIXED,
10972                 .vector = vcpu->arch.apf.vec
10973         };
10974
10975         if (work->wakeup_all)
10976                 work->arch.token = ~0; /* broadcast wakeup */
10977         else
10978                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
10979         trace_kvm_async_pf_ready(work->arch.token, work->cr2_or_gpa);
10980
10981         if ((work->wakeup_all || work->notpresent_injected) &&
10982             kvm_pv_async_pf_enabled(vcpu) &&
10983             !apf_put_user_ready(vcpu, work->arch.token)) {
10984                 vcpu->arch.apf.pageready_pending = true;
10985                 kvm_apic_set_irq(vcpu, &irq, NULL);
10986         }
10987
10988         vcpu->arch.apf.halted = false;
10989         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10990 }
10991
10992 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu)
10993 {
10994         kvm_make_request(KVM_REQ_APF_READY, vcpu);
10995         if (!vcpu->arch.apf.pageready_pending)
10996                 kvm_vcpu_kick(vcpu);
10997 }
10998
10999 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu)
11000 {
11001         if (!kvm_pv_async_pf_enabled(vcpu))
11002                 return true;
11003         else
11004                 return apf_pageready_slot_free(vcpu);
11005 }
11006
11007 void kvm_arch_start_assignment(struct kvm *kvm)
11008 {
11009         atomic_inc(&kvm->arch.assigned_device_count);
11010 }
11011 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
11012
11013 void kvm_arch_end_assignment(struct kvm *kvm)
11014 {
11015         atomic_dec(&kvm->arch.assigned_device_count);
11016 }
11017 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
11018
11019 bool kvm_arch_has_assigned_device(struct kvm *kvm)
11020 {
11021         return atomic_read(&kvm->arch.assigned_device_count);
11022 }
11023 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
11024
11025 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
11026 {
11027         atomic_inc(&kvm->arch.noncoherent_dma_count);
11028 }
11029 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
11030
11031 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
11032 {
11033         atomic_dec(&kvm->arch.noncoherent_dma_count);
11034 }
11035 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
11036
11037 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
11038 {
11039         return atomic_read(&kvm->arch.noncoherent_dma_count);
11040 }
11041 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
11042
11043 bool kvm_arch_has_irq_bypass(void)
11044 {
11045         return true;
11046 }
11047
11048 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
11049                                       struct irq_bypass_producer *prod)
11050 {
11051         struct kvm_kernel_irqfd *irqfd =
11052                 container_of(cons, struct kvm_kernel_irqfd, consumer);
11053         int ret;
11054
11055         irqfd->producer = prod;
11056         kvm_arch_start_assignment(irqfd->kvm);
11057         ret = kvm_x86_ops.update_pi_irte(irqfd->kvm,
11058                                          prod->irq, irqfd->gsi, 1);
11059
11060         if (ret)
11061                 kvm_arch_end_assignment(irqfd->kvm);
11062
11063         return ret;
11064 }
11065
11066 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
11067                                       struct irq_bypass_producer *prod)
11068 {
11069         int ret;
11070         struct kvm_kernel_irqfd *irqfd =
11071                 container_of(cons, struct kvm_kernel_irqfd, consumer);
11072
11073         WARN_ON(irqfd->producer != prod);
11074         irqfd->producer = NULL;
11075
11076         /*
11077          * When producer of consumer is unregistered, we change back to
11078          * remapped mode, so we can re-use the current implementation
11079          * when the irq is masked/disabled or the consumer side (KVM
11080          * int this case doesn't want to receive the interrupts.
11081         */
11082         ret = kvm_x86_ops.update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
11083         if (ret)
11084                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
11085                        " fails: %d\n", irqfd->consumer.token, ret);
11086
11087         kvm_arch_end_assignment(irqfd->kvm);
11088 }
11089
11090 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
11091                                    uint32_t guest_irq, bool set)
11092 {
11093         return kvm_x86_ops.update_pi_irte(kvm, host_irq, guest_irq, set);
11094 }
11095
11096 bool kvm_vector_hashing_enabled(void)
11097 {
11098         return vector_hashing;
11099 }
11100
11101 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
11102 {
11103         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
11104 }
11105 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
11106
11107
11108 int kvm_spec_ctrl_test_value(u64 value)
11109 {
11110         /*
11111          * test that setting IA32_SPEC_CTRL to given value
11112          * is allowed by the host processor
11113          */
11114
11115         u64 saved_value;
11116         unsigned long flags;
11117         int ret = 0;
11118
11119         local_irq_save(flags);
11120
11121         if (rdmsrl_safe(MSR_IA32_SPEC_CTRL, &saved_value))
11122                 ret = 1;
11123         else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL, value))
11124                 ret = 1;
11125         else
11126                 wrmsrl(MSR_IA32_SPEC_CTRL, saved_value);
11127
11128         local_irq_restore(flags);
11129
11130         return ret;
11131 }
11132 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value);
11133
11134 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code)
11135 {
11136         struct x86_exception fault;
11137         u32 access = error_code &
11138                 (PFERR_WRITE_MASK | PFERR_FETCH_MASK | PFERR_USER_MASK);
11139
11140         if (!(error_code & PFERR_PRESENT_MASK) ||
11141             vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, &fault) != UNMAPPED_GVA) {
11142                 /*
11143                  * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
11144                  * tables probably do not match the TLB.  Just proceed
11145                  * with the error code that the processor gave.
11146                  */
11147                 fault.vector = PF_VECTOR;
11148                 fault.error_code_valid = true;
11149                 fault.error_code = error_code;
11150                 fault.nested_page_fault = false;
11151                 fault.address = gva;
11152         }
11153         vcpu->arch.walk_mmu->inject_page_fault(vcpu, &fault);
11154 }
11155 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error);
11156
11157 /*
11158  * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
11159  * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
11160  * indicates whether exit to userspace is needed.
11161  */
11162 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
11163                               struct x86_exception *e)
11164 {
11165         if (r == X86EMUL_PROPAGATE_FAULT) {
11166                 kvm_inject_emulated_page_fault(vcpu, e);
11167                 return 1;
11168         }
11169
11170         /*
11171          * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
11172          * while handling a VMX instruction KVM could've handled the request
11173          * correctly by exiting to userspace and performing I/O but there
11174          * doesn't seem to be a real use-case behind such requests, just return
11175          * KVM_EXIT_INTERNAL_ERROR for now.
11176          */
11177         vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
11178         vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
11179         vcpu->run->internal.ndata = 0;
11180
11181         return 0;
11182 }
11183 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure);
11184
11185 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva)
11186 {
11187         bool pcid_enabled;
11188         struct x86_exception e;
11189         unsigned i;
11190         unsigned long roots_to_free = 0;
11191         struct {
11192                 u64 pcid;
11193                 u64 gla;
11194         } operand;
11195         int r;
11196
11197         r = kvm_read_guest_virt(vcpu, gva, &operand, sizeof(operand), &e);
11198         if (r != X86EMUL_CONTINUE)
11199                 return kvm_handle_memory_failure(vcpu, r, &e);
11200
11201         if (operand.pcid >> 12 != 0) {
11202                 kvm_inject_gp(vcpu, 0);
11203                 return 1;
11204         }
11205
11206         pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
11207
11208         switch (type) {
11209         case INVPCID_TYPE_INDIV_ADDR:
11210                 if ((!pcid_enabled && (operand.pcid != 0)) ||
11211                     is_noncanonical_address(operand.gla, vcpu)) {
11212                         kvm_inject_gp(vcpu, 0);
11213                         return 1;
11214                 }
11215                 kvm_mmu_invpcid_gva(vcpu, operand.gla, operand.pcid);
11216                 return kvm_skip_emulated_instruction(vcpu);
11217
11218         case INVPCID_TYPE_SINGLE_CTXT:
11219                 if (!pcid_enabled && (operand.pcid != 0)) {
11220                         kvm_inject_gp(vcpu, 0);
11221                         return 1;
11222                 }
11223
11224                 if (kvm_get_active_pcid(vcpu) == operand.pcid) {
11225                         kvm_mmu_sync_roots(vcpu);
11226                         kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
11227                 }
11228
11229                 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
11230                         if (kvm_get_pcid(vcpu, vcpu->arch.mmu->prev_roots[i].pgd)
11231                             == operand.pcid)
11232                                 roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
11233
11234                 kvm_mmu_free_roots(vcpu, vcpu->arch.mmu, roots_to_free);
11235                 /*
11236                  * If neither the current cr3 nor any of the prev_roots use the
11237                  * given PCID, then nothing needs to be done here because a
11238                  * resync will happen anyway before switching to any other CR3.
11239                  */
11240
11241                 return kvm_skip_emulated_instruction(vcpu);
11242
11243         case INVPCID_TYPE_ALL_NON_GLOBAL:
11244                 /*
11245                  * Currently, KVM doesn't mark global entries in the shadow
11246                  * page tables, so a non-global flush just degenerates to a
11247                  * global flush. If needed, we could optimize this later by
11248                  * keeping track of global entries in shadow page tables.
11249                  */
11250
11251                 fallthrough;
11252         case INVPCID_TYPE_ALL_INCL_GLOBAL:
11253                 kvm_mmu_unload(vcpu);
11254                 return kvm_skip_emulated_instruction(vcpu);
11255
11256         default:
11257                 BUG(); /* We have already checked above that type <= 3 */
11258         }
11259 }
11260 EXPORT_SYMBOL_GPL(kvm_handle_invpcid);
11261
11262 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
11263 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
11264 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
11265 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
11266 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
11267 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
11268 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
11269 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
11270 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
11271 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
11272 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
11273 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
11274 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
11275 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
11276 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
11277 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
11278 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
11279 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
11280 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
11281 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);
11282 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log);
11283 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request);