arch/x86/kvm/x86.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * derived from drivers/kvm/kvm_main.c
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  * Copyright (C) 2008 Qumranet, Inc.
   9  * Copyright IBM Corporation, 2008
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *   Yaniv Kamay  <yaniv@qumranet.com>
  15  *   Amit Shah    <amit.shah@qumranet.com>
  16  *   Ben-Ami Yassour <benami@il.ibm.com>
  17  */
  18
  19 #include <linux/kvm_host.h>
  20 #include "irq.h"
  21 #include "ioapic.h"
  22 #include "mmu.h"
  23 #include "i8254.h"
  24 #include "tss.h"
  25 #include "kvm_cache_regs.h"
  26 #include "kvm_emulate.h"
  27 #include "x86.h"
  28 #include "cpuid.h"
  29 #include "pmu.h"
  30 #include "hyperv.h"
  31 #include "lapic.h"
  32
  33 #include <linux/clocksource.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/kvm.h>
  36 #include <linux/fs.h>
  37 #include <linux/vmalloc.h>
  38 #include <linux/export.h>
  39 #include <linux/moduleparam.h>
  40 #include <linux/mman.h>
  41 #include <linux/highmem.h>
  42 #include <linux/iommu.h>
  43 #include <linux/intel-iommu.h>
  44 #include <linux/cpufreq.h>
  45 #include <linux/user-return-notifier.h>
  46 #include <linux/srcu.h>
  47 #include <linux/slab.h>
  48 #include <linux/perf_event.h>
  49 #include <linux/uaccess.h>
  50 #include <linux/hash.h>
  51 #include <linux/pci.h>
  52 #include <linux/timekeeper_internal.h>
  53 #include <linux/pvclock_gtod.h>
  54 #include <linux/kvm_irqfd.h>
  55 #include <linux/irqbypass.h>
  56 #include <linux/sched/stat.h>
  57 #include <linux/sched/isolation.h>
  58 #include <linux/mem_encrypt.h>
  59 #include <linux/entry-kvm.h>
  60
  61 #include <trace/events/kvm.h>
  62
  63 #include <asm/debugreg.h>
  64 #include <asm/msr.h>
  65 #include <asm/desc.h>
  66 #include <asm/mce.h>
  67 #include <linux/kernel_stat.h>
  68 #include <asm/fpu/internal.h> /* Ugh! */
  69 #include <asm/pvclock.h>
  70 #include <asm/div64.h>
  71 #include <asm/irq_remapping.h>
  72 #include <asm/mshyperv.h>
  73 #include <asm/hypervisor.h>
  74 #include <asm/tlbflush.h>
  75 #include <asm/intel_pt.h>
  76 #include <asm/emulate_prefix.h>
  77 #include <clocksource/hyperv_timer.h>
  78
  79 #define CREATE_TRACE_POINTS
  80 #include "trace.h"
  81
  82 #define MAX_IO_MSRS 256
  83 #define KVM_MAX_MCE_BANKS 32
  84 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  85 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  86
  87 #define emul_to_vcpu(ctxt) \
  88         ((struct kvm_vcpu *)(ctxt)->vcpu)
  89
  90 /* EFER defaults:
  91  * - enable syscall per default because its emulated by KVM
  92  * - enable LME and LMA per default on 64 bit KVM
  93  */
  94 #ifdef CONFIG_X86_64
  95 static
  96 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  97 #else
  98 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  99 #endif
 100
 101 static u64 __read_mostly cr4_reserved_bits = CR4_RESERVED_BITS;
 102
 103 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
 104                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 105
 106 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 107 static void process_nmi(struct kvm_vcpu *vcpu);
 108 static void enter_smm(struct kvm_vcpu *vcpu);
 109 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 110 static void store_regs(struct kvm_vcpu *vcpu);
 111 static int sync_regs(struct kvm_vcpu *vcpu);
 112
 113 struct kvm_x86_ops kvm_x86_ops __read_mostly;
 114 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 115
 116 static bool __read_mostly ignore_msrs = 0;
 117 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 118
 119 static bool __read_mostly report_ignored_msrs = true;
 120 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 121
 122 unsigned int min_timer_period_us = 200;
 123 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 124
 125 static bool __read_mostly kvmclock_periodic_sync = true;
 126 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 127
 128 bool __read_mostly kvm_has_tsc_control;
 129 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 130 u32  __read_mostly kvm_max_guest_tsc_khz;
 131 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 132 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 133 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 134 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 135 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 136 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 137 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 138
 139 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 140 static u32 __read_mostly tsc_tolerance_ppm = 250;
 141 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 142
 143 /*
 144  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 145  * adaptive tuning starting from default advancment of 1000ns.  '0' disables
 146  * advancement entirely.  Any other value is used as-is and disables adaptive
 147  * tuning, i.e. allows priveleged userspace to set an exact advancement time.
 148  */
 149 static int __read_mostly lapic_timer_advance_ns = -1;
 150 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 151
 152 static bool __read_mostly vector_hashing = true;
 153 module_param(vector_hashing, bool, S_IRUGO);
 154
 155 bool __read_mostly enable_vmware_backdoor = false;
 156 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 157 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 158
 159 static bool __read_mostly force_emulation_prefix = false;
 160 module_param(force_emulation_prefix, bool, S_IRUGO);
 161
 162 int __read_mostly pi_inject_timer = -1;
 163 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
 164
 165 /*
 166  * Restoring the host value for MSRs that are only consumed when running in
 167  * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
 168  * returns to userspace, i.e. the kernel can run with the guest's value.
 169  */
 170 #define KVM_MAX_NR_USER_RETURN_MSRS 16
 171
 172 struct kvm_user_return_msrs_global {
 173         int nr;
 174         u32 msrs[KVM_MAX_NR_USER_RETURN_MSRS];
 175 };
 176
 177 struct kvm_user_return_msrs {
 178         struct user_return_notifier urn;
 179         bool registered;
 180         struct kvm_user_return_msr_values {
 181                 u64 host;
 182                 u64 curr;
 183         } values[KVM_MAX_NR_USER_RETURN_MSRS];
 184 };
 185
 186 static struct kvm_user_return_msrs_global __read_mostly user_return_msrs_global;
 187 static struct kvm_user_return_msrs __percpu *user_return_msrs;
 188
 189 #define KVM_SUPPORTED_XCR0     (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
 190                                 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
 191                                 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
 192                                 | XFEATURE_MASK_PKRU)
 193
 194 u64 __read_mostly host_efer;
 195 EXPORT_SYMBOL_GPL(host_efer);
 196
 197 bool __read_mostly allow_smaller_maxphyaddr = 0;
 198 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr);
 199
 200 static u64 __read_mostly host_xss;
 201 u64 __read_mostly supported_xss;
 202 EXPORT_SYMBOL_GPL(supported_xss);
 203
 204 struct kvm_stats_debugfs_item debugfs_entries[] = {
 205         VCPU_STAT("pf_fixed", pf_fixed),
 206         VCPU_STAT("pf_guest", pf_guest),
 207         VCPU_STAT("tlb_flush", tlb_flush),
 208         VCPU_STAT("invlpg", invlpg),
 209         VCPU_STAT("exits", exits),
 210         VCPU_STAT("io_exits", io_exits),
 211         VCPU_STAT("mmio_exits", mmio_exits),
 212         VCPU_STAT("signal_exits", signal_exits),
 213         VCPU_STAT("irq_window", irq_window_exits),
 214         VCPU_STAT("nmi_window", nmi_window_exits),
 215         VCPU_STAT("halt_exits", halt_exits),
 216         VCPU_STAT("halt_successful_poll", halt_successful_poll),
 217         VCPU_STAT("halt_attempted_poll", halt_attempted_poll),
 218         VCPU_STAT("halt_poll_invalid", halt_poll_invalid),
 219         VCPU_STAT("halt_wakeup", halt_wakeup),
 220         VCPU_STAT("hypercalls", hypercalls),
 221         VCPU_STAT("request_irq", request_irq_exits),
 222         VCPU_STAT("irq_exits", irq_exits),
 223         VCPU_STAT("host_state_reload", host_state_reload),
 224         VCPU_STAT("fpu_reload", fpu_reload),
 225         VCPU_STAT("insn_emulation", insn_emulation),
 226         VCPU_STAT("insn_emulation_fail", insn_emulation_fail),
 227         VCPU_STAT("irq_injections", irq_injections),
 228         VCPU_STAT("nmi_injections", nmi_injections),
 229         VCPU_STAT("req_event", req_event),
 230         VCPU_STAT("l1d_flush", l1d_flush),
 231         VCPU_STAT("halt_poll_success_ns", halt_poll_success_ns),
 232         VCPU_STAT("halt_poll_fail_ns", halt_poll_fail_ns),
 233         VM_STAT("mmu_shadow_zapped", mmu_shadow_zapped),
 234         VM_STAT("mmu_pte_write", mmu_pte_write),
 235         VM_STAT("mmu_pte_updated", mmu_pte_updated),
 236         VM_STAT("mmu_pde_zapped", mmu_pde_zapped),
 237         VM_STAT("mmu_flooded", mmu_flooded),
 238         VM_STAT("mmu_recycled", mmu_recycled),
 239         VM_STAT("mmu_cache_miss", mmu_cache_miss),
 240         VM_STAT("mmu_unsync", mmu_unsync),
 241         VM_STAT("remote_tlb_flush", remote_tlb_flush),
 242         VM_STAT("largepages", lpages, .mode = 0444),
 243         VM_STAT("nx_largepages_splitted", nx_lpage_splits, .mode = 0444),
 244         VM_STAT("max_mmu_page_hash_collisions", max_mmu_page_hash_collisions),
 245         { NULL }
 246 };
 247
 248 u64 __read_mostly host_xcr0;
 249 u64 __read_mostly supported_xcr0;
 250 EXPORT_SYMBOL_GPL(supported_xcr0);
 251
 252 static struct kmem_cache *x86_fpu_cache;
 253
 254 static struct kmem_cache *x86_emulator_cache;
 255
 256 /*
 257  * When called, it means the previous get/set msr reached an invalid msr.
 258  * Return true if we want to ignore/silent this failed msr access.
 259  */
 260 static bool kvm_msr_ignored_check(struct kvm_vcpu *vcpu, u32 msr,
 261                                   u64 data, bool write)
 262 {
 263         const char *op = write ? "wrmsr" : "rdmsr";
 264
 265         if (ignore_msrs) {
 266                 if (report_ignored_msrs)
 267                         kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
 268                                       op, msr, data);
 269                 /* Mask the error */
 270                 return true;
 271         } else {
 272                 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
 273                                       op, msr, data);
 274                 return false;
 275         }
 276 }
 277
 278 static struct kmem_cache *kvm_alloc_emulator_cache(void)
 279 {
 280         unsigned int useroffset = offsetof(struct x86_emulate_ctxt, src);
 281         unsigned int size = sizeof(struct x86_emulate_ctxt);
 282
 283         return kmem_cache_create_usercopy("x86_emulator", size,
 284                                           __alignof__(struct x86_emulate_ctxt),
 285                                           SLAB_ACCOUNT, useroffset,
 286                                           size - useroffset, NULL);
 287 }
 288
 289 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 290
 291 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 292 {
 293         int i;
 294         for (i = 0; i < ASYNC_PF_PER_VCPU; i++)
 295                 vcpu->arch.apf.gfns[i] = ~0;
 296 }
 297
 298 static void kvm_on_user_return(struct user_return_notifier *urn)
 299 {
 300         unsigned slot;
 301         struct kvm_user_return_msrs *msrs
 302                 = container_of(urn, struct kvm_user_return_msrs, urn);
 303         struct kvm_user_return_msr_values *values;
 304         unsigned long flags;
 305
 306         /*
 307          * Disabling irqs at this point since the following code could be
 308          * interrupted and executed through kvm_arch_hardware_disable()
 309          */
 310         local_irq_save(flags);
 311         if (msrs->registered) {
 312                 msrs->registered = false;
 313                 user_return_notifier_unregister(urn);
 314         }
 315         local_irq_restore(flags);
 316         for (slot = 0; slot < user_return_msrs_global.nr; ++slot) {
 317                 values = &msrs->values[slot];
 318                 if (values->host != values->curr) {
 319                         wrmsrl(user_return_msrs_global.msrs[slot], values->host);
 320                         values->curr = values->host;
 321                 }
 322         }
 323 }
 324
 325 void kvm_define_user_return_msr(unsigned slot, u32 msr)
 326 {
 327         BUG_ON(slot >= KVM_MAX_NR_USER_RETURN_MSRS);
 328         user_return_msrs_global.msrs[slot] = msr;
 329         if (slot >= user_return_msrs_global.nr)
 330                 user_return_msrs_global.nr = slot + 1;
 331 }
 332 EXPORT_SYMBOL_GPL(kvm_define_user_return_msr);
 333
 334 static void kvm_user_return_msr_cpu_online(void)
 335 {
 336         unsigned int cpu = smp_processor_id();
 337         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 338         u64 value;
 339         int i;
 340
 341         for (i = 0; i < user_return_msrs_global.nr; ++i) {
 342                 rdmsrl_safe(user_return_msrs_global.msrs[i], &value);
 343                 msrs->values[i].host = value;
 344                 msrs->values[i].curr = value;
 345         }
 346 }
 347
 348 int kvm_set_user_return_msr(unsigned slot, u64 value, u64 mask)
 349 {
 350         unsigned int cpu = smp_processor_id();
 351         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 352         int err;
 353
 354         value = (value & mask) | (msrs->values[slot].host & ~mask);
 355         if (value == msrs->values[slot].curr)
 356                 return 0;
 357         err = wrmsrl_safe(user_return_msrs_global.msrs[slot], value);
 358         if (err)
 359                 return 1;
 360
 361         msrs->values[slot].curr = value;
 362         if (!msrs->registered) {
 363                 msrs->urn.on_user_return = kvm_on_user_return;
 364                 user_return_notifier_register(&msrs->urn);
 365                 msrs->registered = true;
 366         }
 367         return 0;
 368 }
 369 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr);
 370
 371 static void drop_user_return_notifiers(void)
 372 {
 373         unsigned int cpu = smp_processor_id();
 374         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 375
 376         if (msrs->registered)
 377                 kvm_on_user_return(&msrs->urn);
 378 }
 379
 380 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 381 {
 382         return vcpu->arch.apic_base;
 383 }
 384 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 385
 386 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 387 {
 388         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 389 }
 390 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 391
 392 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 393 {
 394         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 395         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 396         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) | 0x2ff |
 397                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 398
 399         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 400                 return 1;
 401         if (!msr_info->host_initiated) {
 402                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 403                         return 1;
 404                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 405                         return 1;
 406         }
 407
 408         kvm_lapic_set_base(vcpu, msr_info->data);
 409         kvm_recalculate_apic_map(vcpu->kvm);
 410         return 0;
 411 }
 412 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 413
 414 asmlinkage __visible noinstr void kvm_spurious_fault(void)
 415 {
 416         /* Fault while not rebooting.  We want the trace. */
 417         BUG_ON(!kvm_rebooting);
 418 }
 419 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 420
 421 #define EXCPT_BENIGN            0
 422 #define EXCPT_CONTRIBUTORY      1
 423 #define EXCPT_PF                2
 424
 425 static int exception_class(int vector)
 426 {
 427         switch (vector) {
 428         case PF_VECTOR:
 429                 return EXCPT_PF;
 430         case DE_VECTOR:
 431         case TS_VECTOR:
 432         case NP_VECTOR:
 433         case SS_VECTOR:
 434         case GP_VECTOR:
 435                 return EXCPT_CONTRIBUTORY;
 436         default:
 437                 break;
 438         }
 439         return EXCPT_BENIGN;
 440 }
 441
 442 #define EXCPT_FAULT             0
 443 #define EXCPT_TRAP              1
 444 #define EXCPT_ABORT             2
 445 #define EXCPT_INTERRUPT         3
 446
 447 static int exception_type(int vector)
 448 {
 449         unsigned int mask;
 450
 451         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 452                 return EXCPT_INTERRUPT;
 453
 454         mask = 1 << vector;
 455
 456         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 457         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 458                 return EXCPT_TRAP;
 459
 460         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 461                 return EXCPT_ABORT;
 462
 463         /* Reserved exceptions will result in fault */
 464         return EXCPT_FAULT;
 465 }
 466
 467 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 468 {
 469         unsigned nr = vcpu->arch.exception.nr;
 470         bool has_payload = vcpu->arch.exception.has_payload;
 471         unsigned long payload = vcpu->arch.exception.payload;
 472
 473         if (!has_payload)
 474                 return;
 475
 476         switch (nr) {
 477         case DB_VECTOR:
 478                 /*
 479                  * "Certain debug exceptions may clear bit 0-3.  The
 480                  * remaining contents of the DR6 register are never
 481                  * cleared by the processor".
 482                  */
 483                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 484                 /*
 485                  * DR6.RTM is set by all #DB exceptions that don't clear it.
 486                  */
 487                 vcpu->arch.dr6 |= DR6_RTM;
 488                 vcpu->arch.dr6 |= payload;
 489                 /*
 490                  * Bit 16 should be set in the payload whenever the #DB
 491                  * exception should clear DR6.RTM. This makes the payload
 492                  * compatible with the pending debug exceptions under VMX.
 493                  * Though not currently documented in the SDM, this also
 494                  * makes the payload compatible with the exit qualification
 495                  * for #DB exceptions under VMX.
 496                  */
 497                 vcpu->arch.dr6 ^= payload & DR6_RTM;
 498
 499                 /*
 500                  * The #DB payload is defined as compatible with the 'pending
 501                  * debug exceptions' field under VMX, not DR6. While bit 12 is
 502                  * defined in the 'pending debug exceptions' field (enabled
 503                  * breakpoint), it is reserved and must be zero in DR6.
 504                  */
 505                 vcpu->arch.dr6 &= ~BIT(12);
 506                 break;
 507         case PF_VECTOR:
 508                 vcpu->arch.cr2 = payload;
 509                 break;
 510         }
 511
 512         vcpu->arch.exception.has_payload = false;
 513         vcpu->arch.exception.payload = 0;
 514 }
 515 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 516
 517 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 518                 unsigned nr, bool has_error, u32 error_code,
 519                 bool has_payload, unsigned long payload, bool reinject)
 520 {
 521         u32 prev_nr;
 522         int class1, class2;
 523
 524         kvm_make_request(KVM_REQ_EVENT, vcpu);
 525
 526         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 527         queue:
 528                 if (has_error && !is_protmode(vcpu))
 529                         has_error = false;
 530                 if (reinject) {
 531                         /*
 532                          * On vmentry, vcpu->arch.exception.pending is only
 533                          * true if an event injection was blocked by
 534                          * nested_run_pending.  In that case, however,
 535                          * vcpu_enter_guest requests an immediate exit,
 536                          * and the guest shouldn't proceed far enough to
 537                          * need reinjection.
 538                          */
 539                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 540                         vcpu->arch.exception.injected = true;
 541                         if (WARN_ON_ONCE(has_payload)) {
 542                                 /*
 543                                  * A reinjected event has already
 544                                  * delivered its payload.
 545                                  */
 546                                 has_payload = false;
 547                                 payload = 0;
 548                         }
 549                 } else {
 550                         vcpu->arch.exception.pending = true;
 551                         vcpu->arch.exception.injected = false;
 552                 }
 553                 vcpu->arch.exception.has_error_code = has_error;
 554                 vcpu->arch.exception.nr = nr;
 555                 vcpu->arch.exception.error_code = error_code;
 556                 vcpu->arch.exception.has_payload = has_payload;
 557                 vcpu->arch.exception.payload = payload;
 558                 if (!is_guest_mode(vcpu))
 559                         kvm_deliver_exception_payload(vcpu);
 560                 return;
 561         }
 562
 563         /* to check exception */
 564         prev_nr = vcpu->arch.exception.nr;
 565         if (prev_nr == DF_VECTOR) {
 566                 /* triple fault -> shutdown */
 567                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 568                 return;
 569         }
 570         class1 = exception_class(prev_nr);
 571         class2 = exception_class(nr);
 572         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 573                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 574                 /*
 575                  * Generate double fault per SDM Table 5-5.  Set
 576                  * exception.pending = true so that the double fault
 577                  * can trigger a nested vmexit.
 578                  */
 579                 vcpu->arch.exception.pending = true;
 580                 vcpu->arch.exception.injected = false;
 581                 vcpu->arch.exception.has_error_code = true;
 582                 vcpu->arch.exception.nr = DF_VECTOR;
 583                 vcpu->arch.exception.error_code = 0;
 584                 vcpu->arch.exception.has_payload = false;
 585                 vcpu->arch.exception.payload = 0;
 586         } else
 587                 /* replace previous exception with a new one in a hope
 588                    that instruction re-execution will regenerate lost
 589                    exception */
 590                 goto queue;
 591 }
 592
 593 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 594 {
 595         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 596 }
 597 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 598
 599 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 600 {
 601         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 602 }
 603 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 604
 605 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 606                            unsigned long payload)
 607 {
 608         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 609 }
 610 EXPORT_SYMBOL_GPL(kvm_queue_exception_p);
 611
 612 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 613                                     u32 error_code, unsigned long payload)
 614 {
 615         kvm_multiple_exception(vcpu, nr, true, error_code,
 616                                true, payload, false);
 617 }
 618
 619 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 620 {
 621         if (err)
 622                 kvm_inject_gp(vcpu, 0);
 623         else
 624                 return kvm_skip_emulated_instruction(vcpu);
 625
 626         return 1;
 627 }
 628 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 629
 630 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 631 {
 632         ++vcpu->stat.pf_guest;
 633         vcpu->arch.exception.nested_apf =
 634                 is_guest_mode(vcpu) && fault->async_page_fault;
 635         if (vcpu->arch.exception.nested_apf) {
 636                 vcpu->arch.apf.nested_apf_token = fault->address;
 637                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 638         } else {
 639                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 640                                         fault->address);
 641         }
 642 }
 643 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 644
 645 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
 646                                     struct x86_exception *fault)
 647 {
 648         struct kvm_mmu *fault_mmu;
 649         WARN_ON_ONCE(fault->vector != PF_VECTOR);
 650
 651         fault_mmu = fault->nested_page_fault ? vcpu->arch.mmu :
 652                                                vcpu->arch.walk_mmu;
 653
 654         /*
 655          * Invalidate the TLB entry for the faulting address, if it exists,
 656          * else the access will fault indefinitely (and to emulate hardware).
 657          */
 658         if ((fault->error_code & PFERR_PRESENT_MASK) &&
 659             !(fault->error_code & PFERR_RSVD_MASK))
 660                 kvm_mmu_invalidate_gva(vcpu, fault_mmu, fault->address,
 661                                        fault_mmu->root_hpa);
 662
 663         fault_mmu->inject_page_fault(vcpu, fault);
 664         return fault->nested_page_fault;
 665 }
 666 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault);
 667
 668 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 669 {
 670         atomic_inc(&vcpu->arch.nmi_queued);
 671         kvm_make_request(KVM_REQ_NMI, vcpu);
 672 }
 673 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 674
 675 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 676 {
 677         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 678 }
 679 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 680
 681 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 682 {
 683         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 684 }
 685 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 686
 687 /*
 688  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 689  * a #GP and return false.
 690  */
 691 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 692 {
 693         if (kvm_x86_ops.get_cpl(vcpu) <= required_cpl)
 694                 return true;
 695         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 696         return false;
 697 }
 698 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 699
 700 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 701 {
 702         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 703                 return true;
 704
 705         kvm_queue_exception(vcpu, UD_VECTOR);
 706         return false;
 707 }
 708 EXPORT_SYMBOL_GPL(kvm_require_dr);
 709
 710 /*
 711  * This function will be used to read from the physical memory of the currently
 712  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 713  * can read from guest physical or from the guest's guest physical memory.
 714  */
 715 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 716                             gfn_t ngfn, void *data, int offset, int len,
 717                             u32 access)
 718 {
 719         struct x86_exception exception;
 720         gfn_t real_gfn;
 721         gpa_t ngpa;
 722
 723         ngpa     = gfn_to_gpa(ngfn);
 724         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 725         if (real_gfn == UNMAPPED_GVA)
 726                 return -EFAULT;
 727
 728         real_gfn = gpa_to_gfn(real_gfn);
 729
 730         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 731 }
 732 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 733
 734 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 735                                void *data, int offset, int len, u32 access)
 736 {
 737         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 738                                        data, offset, len, access);
 739 }
 740
 741 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
 742 {
 743         return rsvd_bits(cpuid_maxphyaddr(vcpu), 63) | rsvd_bits(5, 8) |
 744                rsvd_bits(1, 2);
 745 }
 746
 747 /*
 748  * Load the pae pdptrs.  Return 1 if they are all valid, 0 otherwise.
 749  */
 750 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 751 {
 752         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 753         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 754         int i;
 755         int ret;
 756         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 757
 758         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 759                                       offset * sizeof(u64), sizeof(pdpte),
 760                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 761         if (ret < 0) {
 762                 ret = 0;
 763                 goto out;
 764         }
 765         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 766                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 767                     (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
 768                         ret = 0;
 769                         goto out;
 770                 }
 771         }
 772         ret = 1;
 773
 774         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 775         kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
 776
 777 out:
 778
 779         return ret;
 780 }
 781 EXPORT_SYMBOL_GPL(load_pdptrs);
 782
 783 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 784 {
 785         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 786         int offset;
 787         gfn_t gfn;
 788         int r;
 789
 790         if (!is_pae_paging(vcpu))
 791                 return false;
 792
 793         if (!kvm_register_is_available(vcpu, VCPU_EXREG_PDPTR))
 794                 return true;
 795
 796         gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
 797         offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
 798         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 799                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 800         if (r < 0)
 801                 return true;
 802
 803         return memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 804 }
 805 EXPORT_SYMBOL_GPL(pdptrs_changed);
 806
 807 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 808 {
 809         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 810         unsigned long pdptr_bits = X86_CR0_CD | X86_CR0_NW | X86_CR0_PG;
 811         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 812
 813         cr0 |= X86_CR0_ET;
 814
 815 #ifdef CONFIG_X86_64
 816         if (cr0 & 0xffffffff00000000UL)
 817                 return 1;
 818 #endif
 819
 820         cr0 &= ~CR0_RESERVED_BITS;
 821
 822         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 823                 return 1;
 824
 825         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 826                 return 1;
 827
 828 #ifdef CONFIG_X86_64
 829         if ((vcpu->arch.efer & EFER_LME) && !is_paging(vcpu) &&
 830             (cr0 & X86_CR0_PG)) {
 831                 int cs_db, cs_l;
 832
 833                 if (!is_pae(vcpu))
 834                         return 1;
 835                 kvm_x86_ops.get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 836                 if (cs_l)
 837                         return 1;
 838         }
 839 #endif
 840         if (!(vcpu->arch.efer & EFER_LME) && (cr0 & X86_CR0_PG) &&
 841             is_pae(vcpu) && ((cr0 ^ old_cr0) & pdptr_bits) &&
 842             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu)))
 843                 return 1;
 844
 845         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 846                 return 1;
 847
 848         kvm_x86_ops.set_cr0(vcpu, cr0);
 849
 850         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 851                 kvm_clear_async_pf_completion_queue(vcpu);
 852                 kvm_async_pf_hash_reset(vcpu);
 853         }
 854
 855         if ((cr0 ^ old_cr0) & update_bits)
 856                 kvm_mmu_reset_context(vcpu);
 857
 858         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 859             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 860             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 861                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 862
 863         return 0;
 864 }
 865 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 866
 867 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 868 {
 869         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 870 }
 871 EXPORT_SYMBOL_GPL(kvm_lmsw);
 872
 873 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu)
 874 {
 875         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 876
 877                 if (vcpu->arch.xcr0 != host_xcr0)
 878                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 879
 880                 if (vcpu->arch.xsaves_enabled &&
 881                     vcpu->arch.ia32_xss != host_xss)
 882                         wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss);
 883         }
 884
 885         if (static_cpu_has(X86_FEATURE_PKU) &&
 886             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 887              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU)) &&
 888             vcpu->arch.pkru != vcpu->arch.host_pkru)
 889                 __write_pkru(vcpu->arch.pkru);
 890 }
 891 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);
 892
 893 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)
 894 {
 895         if (static_cpu_has(X86_FEATURE_PKU) &&
 896             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 897              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU))) {
 898                 vcpu->arch.pkru = rdpkru();
 899                 if (vcpu->arch.pkru != vcpu->arch.host_pkru)
 900                         __write_pkru(vcpu->arch.host_pkru);
 901         }
 902
 903         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 904
 905                 if (vcpu->arch.xcr0 != host_xcr0)
 906                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 907
 908                 if (vcpu->arch.xsaves_enabled &&
 909                     vcpu->arch.ia32_xss != host_xss)
 910                         wrmsrl(MSR_IA32_XSS, host_xss);
 911         }
 912
 913 }
 914 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state);
 915
 916 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 917 {
 918         u64 xcr0 = xcr;
 919         u64 old_xcr0 = vcpu->arch.xcr0;
 920         u64 valid_bits;
 921
 922         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 923         if (index != XCR_XFEATURE_ENABLED_MASK)
 924                 return 1;
 925         if (!(xcr0 & XFEATURE_MASK_FP))
 926                 return 1;
 927         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 928                 return 1;
 929
 930         /*
 931          * Do not allow the guest to set bits that we do not support
 932          * saving.  However, xcr0 bit 0 is always set, even if the
 933          * emulated CPU does not support XSAVE (see fx_init).
 934          */
 935         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 936         if (xcr0 & ~valid_bits)
 937                 return 1;
 938
 939         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 940             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 941                 return 1;
 942
 943         if (xcr0 & XFEATURE_MASK_AVX512) {
 944                 if (!(xcr0 & XFEATURE_MASK_YMM))
 945                         return 1;
 946                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 947                         return 1;
 948         }
 949         vcpu->arch.xcr0 = xcr0;
 950
 951         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 952                 kvm_update_cpuid_runtime(vcpu);
 953         return 0;
 954 }
 955
 956 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 957 {
 958         if (kvm_x86_ops.get_cpl(vcpu) != 0 ||
 959             __kvm_set_xcr(vcpu, index, xcr)) {
 960                 kvm_inject_gp(vcpu, 0);
 961                 return 1;
 962         }
 963         return 0;
 964 }
 965 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 966
 967 int kvm_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 968 {
 969         if (cr4 & cr4_reserved_bits)
 970                 return -EINVAL;
 971
 972         if (cr4 & vcpu->arch.cr4_guest_rsvd_bits)
 973                 return -EINVAL;
 974
 975         return 0;
 976 }
 977 EXPORT_SYMBOL_GPL(kvm_valid_cr4);
 978
 979 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 980 {
 981         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 982         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 983                                    X86_CR4_SMEP;
 984         unsigned long mmu_role_bits = pdptr_bits | X86_CR4_SMAP | X86_CR4_PKE;
 985
 986         if (kvm_valid_cr4(vcpu, cr4))
 987                 return 1;
 988
 989         if (is_long_mode(vcpu)) {
 990                 if (!(cr4 & X86_CR4_PAE))
 991                         return 1;
 992                 if ((cr4 ^ old_cr4) & X86_CR4_LA57)
 993                         return 1;
 994         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 995                    && ((cr4 ^ old_cr4) & pdptr_bits)
 996                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 997                                    kvm_read_cr3(vcpu)))
 998                 return 1;
 999
1000         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
1001                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
1002                         return 1;
1003
1004                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1005                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
1006                         return 1;
1007         }
1008
1009         if (kvm_x86_ops.set_cr4(vcpu, cr4))
1010                 return 1;
1011
1012         if (((cr4 ^ old_cr4) & mmu_role_bits) ||
1013             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
1014                 kvm_mmu_reset_context(vcpu);
1015
1016         if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
1017                 kvm_update_cpuid_runtime(vcpu);
1018
1019         return 0;
1020 }
1021 EXPORT_SYMBOL_GPL(kvm_set_cr4);
1022
1023 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1024 {
1025         bool skip_tlb_flush = false;
1026 #ifdef CONFIG_X86_64
1027         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
1028
1029         if (pcid_enabled) {
1030                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
1031                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
1032         }
1033 #endif
1034
1035         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
1036                 if (!skip_tlb_flush) {
1037                         kvm_mmu_sync_roots(vcpu);
1038                         kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1039                 }
1040                 return 0;
1041         }
1042
1043         if (is_long_mode(vcpu) &&
1044             (cr3 & rsvd_bits(cpuid_maxphyaddr(vcpu), 63)))
1045                 return 1;
1046         else if (is_pae_paging(vcpu) &&
1047                  !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
1048                 return 1;
1049
1050         kvm_mmu_new_pgd(vcpu, cr3, skip_tlb_flush, skip_tlb_flush);
1051         vcpu->arch.cr3 = cr3;
1052         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
1053
1054         return 0;
1055 }
1056 EXPORT_SYMBOL_GPL(kvm_set_cr3);
1057
1058 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
1059 {
1060         if (cr8 & CR8_RESERVED_BITS)
1061                 return 1;
1062         if (lapic_in_kernel(vcpu))
1063                 kvm_lapic_set_tpr(vcpu, cr8);
1064         else
1065                 vcpu->arch.cr8 = cr8;
1066         return 0;
1067 }
1068 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1069
1070 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1071 {
1072         if (lapic_in_kernel(vcpu))
1073                 return kvm_lapic_get_cr8(vcpu);
1074         else
1075                 return vcpu->arch.cr8;
1076 }
1077 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1078
1079 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1080 {
1081         int i;
1082
1083         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1084                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1085                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1086                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
1087         }
1088 }
1089
1090 void kvm_update_dr7(struct kvm_vcpu *vcpu)
1091 {
1092         unsigned long dr7;
1093
1094         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1095                 dr7 = vcpu->arch.guest_debug_dr7;
1096         else
1097                 dr7 = vcpu->arch.dr7;
1098         kvm_x86_ops.set_dr7(vcpu, dr7);
1099         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1100         if (dr7 & DR7_BP_EN_MASK)
1101                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1102 }
1103 EXPORT_SYMBOL_GPL(kvm_update_dr7);
1104
1105 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1106 {
1107         u64 fixed = DR6_FIXED_1;
1108
1109         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1110                 fixed |= DR6_RTM;
1111         return fixed;
1112 }
1113
1114 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1115 {
1116         size_t size = ARRAY_SIZE(vcpu->arch.db);
1117
1118         switch (dr) {
1119         case 0 ... 3:
1120                 vcpu->arch.db[array_index_nospec(dr, size)] = val;
1121                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1122                         vcpu->arch.eff_db[dr] = val;
1123                 break;
1124         case 4:
1125         case 6:
1126                 if (!kvm_dr6_valid(val))
1127                         return -1; /* #GP */
1128                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1129                 break;
1130         case 5:
1131         default: /* 7 */
1132                 if (!kvm_dr7_valid(val))
1133                         return -1; /* #GP */
1134                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1135                 kvm_update_dr7(vcpu);
1136                 break;
1137         }
1138
1139         return 0;
1140 }
1141
1142 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1143 {
1144         if (__kvm_set_dr(vcpu, dr, val)) {
1145                 kvm_inject_gp(vcpu, 0);
1146                 return 1;
1147         }
1148         return 0;
1149 }
1150 EXPORT_SYMBOL_GPL(kvm_set_dr);
1151
1152 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1153 {
1154         size_t size = ARRAY_SIZE(vcpu->arch.db);
1155
1156         switch (dr) {
1157         case 0 ... 3:
1158                 *val = vcpu->arch.db[array_index_nospec(dr, size)];
1159                 break;
1160         case 4:
1161         case 6:
1162                 *val = vcpu->arch.dr6;
1163                 break;
1164         case 5:
1165         default: /* 7 */
1166                 *val = vcpu->arch.dr7;
1167                 break;
1168         }
1169         return 0;
1170 }
1171 EXPORT_SYMBOL_GPL(kvm_get_dr);
1172
1173 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
1174 {
1175         u32 ecx = kvm_rcx_read(vcpu);
1176         u64 data;
1177         int err;
1178
1179         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
1180         if (err)
1181                 return err;
1182         kvm_rax_write(vcpu, (u32)data);
1183         kvm_rdx_write(vcpu, data >> 32);
1184         return err;
1185 }
1186 EXPORT_SYMBOL_GPL(kvm_rdpmc);
1187
1188 /*
1189  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1190  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1191  *
1192  * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1193  * extract the supported MSRs from the related const lists.
1194  * msrs_to_save is selected from the msrs_to_save_all to reflect the
1195  * capabilities of the host cpu. This capabilities test skips MSRs that are
1196  * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1197  * may depend on host virtualization features rather than host cpu features.
1198  */
1199
1200 static const u32 msrs_to_save_all[] = {
1201         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1202         MSR_STAR,
1203 #ifdef CONFIG_X86_64
1204         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1205 #endif
1206         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1207         MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1208         MSR_IA32_SPEC_CTRL,
1209         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1210         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1211         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1212         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1213         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1214         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1215         MSR_IA32_UMWAIT_CONTROL,
1216
1217         MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1218         MSR_ARCH_PERFMON_FIXED_CTR0 + 2, MSR_ARCH_PERFMON_FIXED_CTR0 + 3,
1219         MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1220         MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1221         MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1222         MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1223         MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1224         MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1225         MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1226         MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1227         MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1228         MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1229         MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1230         MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1231         MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1232         MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1233         MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1234         MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1235         MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1236         MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1237         MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1238         MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1239 };
1240
1241 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
1242 static unsigned num_msrs_to_save;
1243
1244 static const u32 emulated_msrs_all[] = {
1245         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1246         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1247         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1248         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1249         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1250         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1251         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1252         HV_X64_MSR_RESET,
1253         HV_X64_MSR_VP_INDEX,
1254         HV_X64_MSR_VP_RUNTIME,
1255         HV_X64_MSR_SCONTROL,
1256         HV_X64_MSR_STIMER0_CONFIG,
1257         HV_X64_MSR_VP_ASSIST_PAGE,
1258         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1259         HV_X64_MSR_TSC_EMULATION_STATUS,
1260         HV_X64_MSR_SYNDBG_OPTIONS,
1261         HV_X64_MSR_SYNDBG_CONTROL, HV_X64_MSR_SYNDBG_STATUS,
1262         HV_X64_MSR_SYNDBG_SEND_BUFFER, HV_X64_MSR_SYNDBG_RECV_BUFFER,
1263         HV_X64_MSR_SYNDBG_PENDING_BUFFER,
1264
1265         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1266         MSR_KVM_PV_EOI_EN, MSR_KVM_ASYNC_PF_INT, MSR_KVM_ASYNC_PF_ACK,
1267
1268         MSR_IA32_TSC_ADJUST,
1269         MSR_IA32_TSCDEADLINE,
1270         MSR_IA32_ARCH_CAPABILITIES,
1271         MSR_IA32_PERF_CAPABILITIES,
1272         MSR_IA32_MISC_ENABLE,
1273         MSR_IA32_MCG_STATUS,
1274         MSR_IA32_MCG_CTL,
1275         MSR_IA32_MCG_EXT_CTL,
1276         MSR_IA32_SMBASE,
1277         MSR_SMI_COUNT,
1278         MSR_PLATFORM_INFO,
1279         MSR_MISC_FEATURES_ENABLES,
1280         MSR_AMD64_VIRT_SPEC_CTRL,
1281         MSR_IA32_POWER_CTL,
1282         MSR_IA32_UCODE_REV,
1283
1284         /*
1285          * The following list leaves out MSRs whose values are determined
1286          * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1287          * We always support the "true" VMX control MSRs, even if the host
1288          * processor does not, so I am putting these registers here rather
1289          * than in msrs_to_save_all.
1290          */
1291         MSR_IA32_VMX_BASIC,
1292         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1293         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1294         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1295         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1296         MSR_IA32_VMX_MISC,
1297         MSR_IA32_VMX_CR0_FIXED0,
1298         MSR_IA32_VMX_CR4_FIXED0,
1299         MSR_IA32_VMX_VMCS_ENUM,
1300         MSR_IA32_VMX_PROCBASED_CTLS2,
1301         MSR_IA32_VMX_EPT_VPID_CAP,
1302         MSR_IA32_VMX_VMFUNC,
1303
1304         MSR_K7_HWCR,
1305         MSR_KVM_POLL_CONTROL,
1306 };
1307
1308 static u32 emulated_msrs[ARRAY_SIZE(emulated_msrs_all)];
1309 static unsigned num_emulated_msrs;
1310
1311 /*
1312  * List of msr numbers which are used to expose MSR-based features that
1313  * can be used by a hypervisor to validate requested CPU features.
1314  */
1315 static const u32 msr_based_features_all[] = {
1316         MSR_IA32_VMX_BASIC,
1317         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1318         MSR_IA32_VMX_PINBASED_CTLS,
1319         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1320         MSR_IA32_VMX_PROCBASED_CTLS,
1321         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1322         MSR_IA32_VMX_EXIT_CTLS,
1323         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1324         MSR_IA32_VMX_ENTRY_CTLS,
1325         MSR_IA32_VMX_MISC,
1326         MSR_IA32_VMX_CR0_FIXED0,
1327         MSR_IA32_VMX_CR0_FIXED1,
1328         MSR_IA32_VMX_CR4_FIXED0,
1329         MSR_IA32_VMX_CR4_FIXED1,
1330         MSR_IA32_VMX_VMCS_ENUM,
1331         MSR_IA32_VMX_PROCBASED_CTLS2,
1332         MSR_IA32_VMX_EPT_VPID_CAP,
1333         MSR_IA32_VMX_VMFUNC,
1334
1335         MSR_F10H_DECFG,
1336         MSR_IA32_UCODE_REV,
1337         MSR_IA32_ARCH_CAPABILITIES,
1338         MSR_IA32_PERF_CAPABILITIES,
1339 };
1340
1341 static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all)];
1342 static unsigned int num_msr_based_features;
1343
1344 static u64 kvm_get_arch_capabilities(void)
1345 {
1346         u64 data = 0;
1347
1348         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1349                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1350
1351         /*
1352          * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1353          * the nested hypervisor runs with NX huge pages.  If it is not,
1354          * L1 is anyway vulnerable to ITLB_MULTIHIT explots from other
1355          * L1 guests, so it need not worry about its own (L2) guests.
1356          */
1357         data |= ARCH_CAP_PSCHANGE_MC_NO;
1358
1359         /*
1360          * If we're doing cache flushes (either "always" or "cond")
1361          * we will do one whenever the guest does a vmlaunch/vmresume.
1362          * If an outer hypervisor is doing the cache flush for us
1363          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1364          * capability to the guest too, and if EPT is disabled we're not
1365          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1366          * require a nested hypervisor to do a flush of its own.
1367          */
1368         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1369                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1370
1371         if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1372                 data |= ARCH_CAP_RDCL_NO;
1373         if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1374                 data |= ARCH_CAP_SSB_NO;
1375         if (!boot_cpu_has_bug(X86_BUG_MDS))
1376                 data |= ARCH_CAP_MDS_NO;
1377
1378         /*
1379          * On TAA affected systems:
1380          *      - nothing to do if TSX is disabled on the host.
1381          *      - we emulate TSX_CTRL if present on the host.
1382          *        This lets the guest use VERW to clear CPU buffers.
1383          */
1384         if (!boot_cpu_has(X86_FEATURE_RTM))
1385                 data &= ~(ARCH_CAP_TAA_NO | ARCH_CAP_TSX_CTRL_MSR);
1386         else if (!boot_cpu_has_bug(X86_BUG_TAA))
1387                 data |= ARCH_CAP_TAA_NO;
1388
1389         return data;
1390 }
1391
1392 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1393 {
1394         switch (msr->index) {
1395         case MSR_IA32_ARCH_CAPABILITIES:
1396                 msr->data = kvm_get_arch_capabilities();
1397                 break;
1398         case MSR_IA32_UCODE_REV:
1399                 rdmsrl_safe(msr->index, &msr->data);
1400                 break;
1401         default:
1402                 return kvm_x86_ops.get_msr_feature(msr);
1403         }
1404         return 0;
1405 }
1406
1407 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1408 {
1409         struct kvm_msr_entry msr;
1410         int r;
1411
1412         msr.index = index;
1413         r = kvm_get_msr_feature(&msr);
1414
1415         if (r == KVM_MSR_RET_INVALID) {
1416                 /* Unconditionally clear the output for simplicity */
1417                 *data = 0;
1418                 if (kvm_msr_ignored_check(vcpu, index, 0, false))
1419                         r = 0;
1420         }
1421
1422         if (r)
1423                 return r;
1424
1425         *data = msr.data;
1426
1427         return 0;
1428 }
1429
1430 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1431 {
1432         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1433                 return false;
1434
1435         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1436                 return false;
1437
1438         if (efer & (EFER_LME | EFER_LMA) &&
1439             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1440                 return false;
1441
1442         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1443                 return false;
1444
1445         return true;
1446
1447 }
1448 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1449 {
1450         if (efer & efer_reserved_bits)
1451                 return false;
1452
1453         return __kvm_valid_efer(vcpu, efer);
1454 }
1455 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1456
1457 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1458 {
1459         u64 old_efer = vcpu->arch.efer;
1460         u64 efer = msr_info->data;
1461         int r;
1462
1463         if (efer & efer_reserved_bits)
1464                 return 1;
1465
1466         if (!msr_info->host_initiated) {
1467                 if (!__kvm_valid_efer(vcpu, efer))
1468                         return 1;
1469
1470                 if (is_paging(vcpu) &&
1471                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1472                         return 1;
1473         }
1474
1475         efer &= ~EFER_LMA;
1476         efer |= vcpu->arch.efer & EFER_LMA;
1477
1478         r = kvm_x86_ops.set_efer(vcpu, efer);
1479         if (r) {
1480                 WARN_ON(r > 0);
1481                 return r;
1482         }
1483
1484         /* Update reserved bits */
1485         if ((efer ^ old_efer) & EFER_NX)
1486                 kvm_mmu_reset_context(vcpu);
1487
1488         return 0;
1489 }
1490
1491 void kvm_enable_efer_bits(u64 mask)
1492 {
1493        efer_reserved_bits &= ~mask;
1494 }
1495 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1496
1497 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type)
1498 {
1499         struct kvm *kvm = vcpu->kvm;
1500         struct msr_bitmap_range *ranges = kvm->arch.msr_filter.ranges;
1501         u32 count = kvm->arch.msr_filter.count;
1502         u32 i;
1503         bool r = kvm->arch.msr_filter.default_allow;
1504         int idx;
1505
1506         /* MSR filtering not set up or x2APIC enabled, allow everything */
1507         if (!count || (index >= 0x800 && index <= 0x8ff))
1508                 return true;
1509
1510         /* Prevent collision with set_msr_filter */
1511         idx = srcu_read_lock(&kvm->srcu);
1512
1513         for (i = 0; i < count; i++) {
1514                 u32 start = ranges[i].base;
1515                 u32 end = start + ranges[i].nmsrs;
1516                 u32 flags = ranges[i].flags;
1517                 unsigned long *bitmap = ranges[i].bitmap;
1518
1519                 if ((index >= start) && (index < end) && (flags & type)) {
1520                         r = !!test_bit(index - start, bitmap);
1521                         break;
1522                 }
1523         }
1524
1525         srcu_read_unlock(&kvm->srcu, idx);
1526
1527         return r;
1528 }
1529 EXPORT_SYMBOL_GPL(kvm_msr_allowed);
1530
1531 /*
1532  * Write @data into the MSR specified by @index.  Select MSR specific fault
1533  * checks are bypassed if @host_initiated is %true.
1534  * Returns 0 on success, non-0 otherwise.
1535  * Assumes vcpu_load() was already called.
1536  */
1537 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1538                          bool host_initiated)
1539 {
1540         struct msr_data msr;
1541
1542         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_WRITE))
1543                 return KVM_MSR_RET_FILTERED;
1544
1545         switch (index) {
1546         case MSR_FS_BASE:
1547         case MSR_GS_BASE:
1548         case MSR_KERNEL_GS_BASE:
1549         case MSR_CSTAR:
1550         case MSR_LSTAR:
1551                 if (is_noncanonical_address(data, vcpu))
1552                         return 1;
1553                 break;
1554         case MSR_IA32_SYSENTER_EIP:
1555         case MSR_IA32_SYSENTER_ESP:
1556                 /*
1557                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1558                  * non-canonical address is written on Intel but not on
1559                  * AMD (which ignores the top 32-bits, because it does
1560                  * not implement 64-bit SYSENTER).
1561                  *
1562                  * 64-bit code should hence be able to write a non-canonical
1563                  * value on AMD.  Making the address canonical ensures that
1564                  * vmentry does not fail on Intel after writing a non-canonical
1565                  * value, and that something deterministic happens if the guest
1566                  * invokes 64-bit SYSENTER.
1567                  */
1568                 data = get_canonical(data, vcpu_virt_addr_bits(vcpu));
1569         }
1570
1571         msr.data = data;
1572         msr.index = index;
1573         msr.host_initiated = host_initiated;
1574
1575         return kvm_x86_ops.set_msr(vcpu, &msr);
1576 }
1577
1578 static int kvm_set_msr_ignored_check(struct kvm_vcpu *vcpu,
1579                                      u32 index, u64 data, bool host_initiated)
1580 {
1581         int ret = __kvm_set_msr(vcpu, index, data, host_initiated);
1582
1583         if (ret == KVM_MSR_RET_INVALID)
1584                 if (kvm_msr_ignored_check(vcpu, index, data, true))
1585                         ret = 0;
1586
1587         return ret;
1588 }
1589
1590 /*
1591  * Read the MSR specified by @index into @data.  Select MSR specific fault
1592  * checks are bypassed if @host_initiated is %true.
1593  * Returns 0 on success, non-0 otherwise.
1594  * Assumes vcpu_load() was already called.
1595  */
1596 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1597                   bool host_initiated)
1598 {
1599         struct msr_data msr;
1600         int ret;
1601
1602         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_READ))
1603                 return KVM_MSR_RET_FILTERED;
1604
1605         msr.index = index;
1606         msr.host_initiated = host_initiated;
1607
1608         ret = kvm_x86_ops.get_msr(vcpu, &msr);
1609         if (!ret)
1610                 *data = msr.data;
1611         return ret;
1612 }
1613
1614 static int kvm_get_msr_ignored_check(struct kvm_vcpu *vcpu,
1615                                      u32 index, u64 *data, bool host_initiated)
1616 {
1617         int ret = __kvm_get_msr(vcpu, index, data, host_initiated);
1618
1619         if (ret == KVM_MSR_RET_INVALID) {
1620                 /* Unconditionally clear *data for simplicity */
1621                 *data = 0;
1622                 if (kvm_msr_ignored_check(vcpu, index, 0, false))
1623                         ret = 0;
1624         }
1625
1626         return ret;
1627 }
1628
1629 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1630 {
1631         return kvm_get_msr_ignored_check(vcpu, index, data, false);
1632 }
1633 EXPORT_SYMBOL_GPL(kvm_get_msr);
1634
1635 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1636 {
1637         return kvm_set_msr_ignored_check(vcpu, index, data, false);
1638 }
1639 EXPORT_SYMBOL_GPL(kvm_set_msr);
1640
1641 static int complete_emulated_msr(struct kvm_vcpu *vcpu, bool is_read)
1642 {
1643         if (vcpu->run->msr.error) {
1644                 kvm_inject_gp(vcpu, 0);
1645                 return 1;
1646         } else if (is_read) {
1647                 kvm_rax_write(vcpu, (u32)vcpu->run->msr.data);
1648                 kvm_rdx_write(vcpu, vcpu->run->msr.data >> 32);
1649         }
1650
1651         return kvm_skip_emulated_instruction(vcpu);
1652 }
1653
1654 static int complete_emulated_rdmsr(struct kvm_vcpu *vcpu)
1655 {
1656         return complete_emulated_msr(vcpu, true);
1657 }
1658
1659 static int complete_emulated_wrmsr(struct kvm_vcpu *vcpu)
1660 {
1661         return complete_emulated_msr(vcpu, false);
1662 }
1663
1664 static u64 kvm_msr_reason(int r)
1665 {
1666         switch (r) {
1667         case KVM_MSR_RET_INVALID:
1668                 return KVM_MSR_EXIT_REASON_UNKNOWN;
1669         case KVM_MSR_RET_FILTERED:
1670                 return KVM_MSR_EXIT_REASON_FILTER;
1671         default:
1672                 return KVM_MSR_EXIT_REASON_INVAL;
1673         }
1674 }
1675
1676 static int kvm_msr_user_space(struct kvm_vcpu *vcpu, u32 index,
1677                               u32 exit_reason, u64 data,
1678                               int (*completion)(struct kvm_vcpu *vcpu),
1679                               int r)
1680 {
1681         u64 msr_reason = kvm_msr_reason(r);
1682
1683         /* Check if the user wanted to know about this MSR fault */
1684         if (!(vcpu->kvm->arch.user_space_msr_mask & msr_reason))
1685                 return 0;
1686
1687         vcpu->run->exit_reason = exit_reason;
1688         vcpu->run->msr.error = 0;
1689         memset(vcpu->run->msr.pad, 0, sizeof(vcpu->run->msr.pad));
1690         vcpu->run->msr.reason = msr_reason;
1691         vcpu->run->msr.index = index;
1692         vcpu->run->msr.data = data;
1693         vcpu->arch.complete_userspace_io = completion;
1694
1695         return 1;
1696 }
1697
1698 static int kvm_get_msr_user_space(struct kvm_vcpu *vcpu, u32 index, int r)
1699 {
1700         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_RDMSR, 0,
1701                                    complete_emulated_rdmsr, r);
1702 }
1703
1704 static int kvm_set_msr_user_space(struct kvm_vcpu *vcpu, u32 index, u64 data, int r)
1705 {
1706         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_WRMSR, data,
1707                                    complete_emulated_wrmsr, r);
1708 }
1709
1710 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1711 {
1712         u32 ecx = kvm_rcx_read(vcpu);
1713         u64 data;
1714         int r;
1715
1716         r = kvm_get_msr(vcpu, ecx, &data);
1717
1718         /* MSR read failed? See if we should ask user space */
1719         if (r && kvm_get_msr_user_space(vcpu, ecx, r)) {
1720                 /* Bounce to user space */
1721                 return 0;
1722         }
1723
1724         /* MSR read failed? Inject a #GP */
1725         if (r) {
1726                 trace_kvm_msr_read_ex(ecx);
1727                 kvm_inject_gp(vcpu, 0);
1728                 return 1;
1729         }
1730
1731         trace_kvm_msr_read(ecx, data);
1732
1733         kvm_rax_write(vcpu, data & -1u);
1734         kvm_rdx_write(vcpu, (data >> 32) & -1u);
1735         return kvm_skip_emulated_instruction(vcpu);
1736 }
1737 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
1738
1739 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
1740 {
1741         u32 ecx = kvm_rcx_read(vcpu);
1742         u64 data = kvm_read_edx_eax(vcpu);
1743         int r;
1744
1745         r = kvm_set_msr(vcpu, ecx, data);
1746
1747         /* MSR write failed? See if we should ask user space */
1748         if (r && kvm_set_msr_user_space(vcpu, ecx, data, r))
1749                 /* Bounce to user space */
1750                 return 0;
1751
1752         /* Signal all other negative errors to userspace */
1753         if (r < 0)
1754                 return r;
1755
1756         /* MSR write failed? Inject a #GP */
1757         if (r > 0) {
1758                 trace_kvm_msr_write_ex(ecx, data);
1759                 kvm_inject_gp(vcpu, 0);
1760                 return 1;
1761         }
1762
1763         trace_kvm_msr_write(ecx, data);
1764         return kvm_skip_emulated_instruction(vcpu);
1765 }
1766 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
1767
1768 bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu)
1769 {
1770         return vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu) ||
1771                 xfer_to_guest_mode_work_pending();
1772 }
1773 EXPORT_SYMBOL_GPL(kvm_vcpu_exit_request);
1774
1775 /*
1776  * The fast path for frequent and performance sensitive wrmsr emulation,
1777  * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
1778  * the latency of virtual IPI by avoiding the expensive bits of transitioning
1779  * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
1780  * other cases which must be called after interrupts are enabled on the host.
1781  */
1782 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data)
1783 {
1784         if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(vcpu->arch.apic))
1785                 return 1;
1786
1787         if (((data & APIC_SHORT_MASK) == APIC_DEST_NOSHORT) &&
1788                 ((data & APIC_DEST_MASK) == APIC_DEST_PHYSICAL) &&
1789                 ((data & APIC_MODE_MASK) == APIC_DM_FIXED) &&
1790                 ((u32)(data >> 32) != X2APIC_BROADCAST)) {
1791
1792                 data &= ~(1 << 12);
1793                 kvm_apic_send_ipi(vcpu->arch.apic, (u32)data, (u32)(data >> 32));
1794                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR2, (u32)(data >> 32));
1795                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR, (u32)data);
1796                 trace_kvm_apic_write(APIC_ICR, (u32)data);
1797                 return 0;
1798         }
1799
1800         return 1;
1801 }
1802
1803 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu *vcpu, u64 data)
1804 {
1805         if (!kvm_can_use_hv_timer(vcpu))
1806                 return 1;
1807
1808         kvm_set_lapic_tscdeadline_msr(vcpu, data);
1809         return 0;
1810 }
1811
1812 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
1813 {
1814         u32 msr = kvm_rcx_read(vcpu);
1815         u64 data;
1816         fastpath_t ret = EXIT_FASTPATH_NONE;
1817
1818         switch (msr) {
1819         case APIC_BASE_MSR + (APIC_ICR >> 4):
1820                 data = kvm_read_edx_eax(vcpu);
1821                 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu, data)) {
1822                         kvm_skip_emulated_instruction(vcpu);
1823                         ret = EXIT_FASTPATH_EXIT_HANDLED;
1824                 }
1825                 break;
1826         case MSR_IA32_TSCDEADLINE:
1827                 data = kvm_read_edx_eax(vcpu);
1828                 if (!handle_fastpath_set_tscdeadline(vcpu, data)) {
1829                         kvm_skip_emulated_instruction(vcpu);
1830                         ret = EXIT_FASTPATH_REENTER_GUEST;
1831                 }
1832                 break;
1833         default:
1834                 break;
1835         }
1836
1837         if (ret != EXIT_FASTPATH_NONE)
1838                 trace_kvm_msr_write(msr, data);
1839
1840         return ret;
1841 }
1842 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff);
1843
1844 /*
1845  * Adapt set_msr() to msr_io()'s calling convention
1846  */
1847 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1848 {
1849         return kvm_get_msr_ignored_check(vcpu, index, data, true);
1850 }
1851
1852 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1853 {
1854         return kvm_set_msr_ignored_check(vcpu, index, *data, true);
1855 }
1856
1857 #ifdef CONFIG_X86_64
1858 struct pvclock_clock {
1859         int vclock_mode;
1860         u64 cycle_last;
1861         u64 mask;
1862         u32 mult;
1863         u32 shift;
1864         u64 base_cycles;
1865         u64 offset;
1866 };
1867
1868 struct pvclock_gtod_data {
1869         seqcount_t      seq;
1870
1871         struct pvclock_clock clock; /* extract of a clocksource struct */
1872         struct pvclock_clock raw_clock; /* extract of a clocksource struct */
1873
1874         ktime_t         offs_boot;
1875         u64             wall_time_sec;
1876 };
1877
1878 static struct pvclock_gtod_data pvclock_gtod_data;
1879
1880 static void update_pvclock_gtod(struct timekeeper *tk)
1881 {
1882         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1883
1884         write_seqcount_begin(&vdata->seq);
1885
1886         /* copy pvclock gtod data */
1887         vdata->clock.vclock_mode        = tk->tkr_mono.clock->vdso_clock_mode;
1888         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1889         vdata->clock.mask               = tk->tkr_mono.mask;
1890         vdata->clock.mult               = tk->tkr_mono.mult;
1891         vdata->clock.shift              = tk->tkr_mono.shift;
1892         vdata->clock.base_cycles        = tk->tkr_mono.xtime_nsec;
1893         vdata->clock.offset             = tk->tkr_mono.base;
1894
1895         vdata->raw_clock.vclock_mode    = tk->tkr_raw.clock->vdso_clock_mode;
1896         vdata->raw_clock.cycle_last     = tk->tkr_raw.cycle_last;
1897         vdata->raw_clock.mask           = tk->tkr_raw.mask;
1898         vdata->raw_clock.mult           = tk->tkr_raw.mult;
1899         vdata->raw_clock.shift          = tk->tkr_raw.shift;
1900         vdata->raw_clock.base_cycles    = tk->tkr_raw.xtime_nsec;
1901         vdata->raw_clock.offset         = tk->tkr_raw.base;
1902
1903         vdata->wall_time_sec            = tk->xtime_sec;
1904
1905         vdata->offs_boot                = tk->offs_boot;
1906
1907         write_seqcount_end(&vdata->seq);
1908 }
1909
1910 static s64 get_kvmclock_base_ns(void)
1911 {
1912         /* Count up from boot time, but with the frequency of the raw clock.  */
1913         return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data.offs_boot));
1914 }
1915 #else
1916 static s64 get_kvmclock_base_ns(void)
1917 {
1918         /* Master clock not used, so we can just use CLOCK_BOOTTIME.  */
1919         return ktime_get_boottime_ns();
1920 }
1921 #endif
1922
1923 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1924 {
1925         int version;
1926         int r;
1927         struct pvclock_wall_clock wc;
1928         u64 wall_nsec;
1929
1930         kvm->arch.wall_clock = wall_clock;
1931
1932         if (!wall_clock)
1933                 return;
1934
1935         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1936         if (r)
1937                 return;
1938
1939         if (version & 1)
1940                 ++version;  /* first time write, random junk */
1941
1942         ++version;
1943
1944         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1945                 return;
1946
1947         /*
1948          * The guest calculates current wall clock time by adding
1949          * system time (updated by kvm_guest_time_update below) to the
1950          * wall clock specified here.  We do the reverse here.
1951          */
1952         wall_nsec = ktime_get_real_ns() - get_kvmclock_ns(kvm);
1953
1954         wc.nsec = do_div(wall_nsec, 1000000000);
1955         wc.sec = (u32)wall_nsec; /* overflow in 2106 guest time */
1956         wc.version = version;
1957
1958         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1959
1960         version++;
1961         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1962 }
1963
1964 static void kvm_write_system_time(struct kvm_vcpu *vcpu, gpa_t system_time,
1965                                   bool old_msr, bool host_initiated)
1966 {
1967         struct kvm_arch *ka = &vcpu->kvm->arch;
1968
1969         if (vcpu->vcpu_id == 0 && !host_initiated) {
1970                 if (ka->boot_vcpu_runs_old_kvmclock && old_msr)
1971                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1972
1973                 ka->boot_vcpu_runs_old_kvmclock = old_msr;
1974         }
1975
1976         vcpu->arch.time = system_time;
1977         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
1978
1979         /* we verify if the enable bit is set... */
1980         vcpu->arch.pv_time_enabled = false;
1981         if (!(system_time & 1))
1982                 return;
1983
1984         if (!kvm_gfn_to_hva_cache_init(vcpu->kvm,
1985                                        &vcpu->arch.pv_time, system_time & ~1ULL,
1986                                        sizeof(struct pvclock_vcpu_time_info)))
1987                 vcpu->arch.pv_time_enabled = true;
1988
1989         return;
1990 }
1991
1992 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1993 {
1994         do_shl32_div32(dividend, divisor);
1995         return dividend;
1996 }
1997
1998 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1999                                s8 *pshift, u32 *pmultiplier)
2000 {
2001         uint64_t scaled64;
2002         int32_t  shift = 0;
2003         uint64_t tps64;
2004         uint32_t tps32;
2005
2006         tps64 = base_hz;
2007         scaled64 = scaled_hz;
2008         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
2009                 tps64 >>= 1;
2010                 shift--;
2011         }
2012
2013         tps32 = (uint32_t)tps64;
2014         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
2015                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
2016                         scaled64 >>= 1;
2017                 else
2018                         tps32 <<= 1;
2019                 shift++;
2020         }
2021
2022         *pshift = shift;
2023         *pmultiplier = div_frac(scaled64, tps32);
2024 }
2025
2026 #ifdef CONFIG_X86_64
2027 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
2028 #endif
2029
2030 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
2031 static unsigned long max_tsc_khz;
2032
2033 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
2034 {
2035         u64 v = (u64)khz * (1000000 + ppm);
2036         do_div(v, 1000000);
2037         return v;
2038 }
2039
2040 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
2041 {
2042         u64 ratio;
2043
2044         /* Guest TSC same frequency as host TSC? */
2045         if (!scale) {
2046                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
2047                 return 0;
2048         }
2049
2050         /* TSC scaling supported? */
2051         if (!kvm_has_tsc_control) {
2052                 if (user_tsc_khz > tsc_khz) {
2053                         vcpu->arch.tsc_catchup = 1;
2054                         vcpu->arch.tsc_always_catchup = 1;
2055                         return 0;
2056                 } else {
2057                         pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2058                         return -1;
2059                 }
2060         }
2061
2062         /* TSC scaling required  - calculate ratio */
2063         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
2064                                 user_tsc_khz, tsc_khz);
2065
2066         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
2067                 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2068                                     user_tsc_khz);
2069                 return -1;
2070         }
2071
2072         vcpu->arch.tsc_scaling_ratio = ratio;
2073         return 0;
2074 }
2075
2076 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
2077 {
2078         u32 thresh_lo, thresh_hi;
2079         int use_scaling = 0;
2080
2081         /* tsc_khz can be zero if TSC calibration fails */
2082         if (user_tsc_khz == 0) {
2083                 /* set tsc_scaling_ratio to a safe value */
2084                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
2085                 return -1;
2086         }
2087
2088         /* Compute a scale to convert nanoseconds in TSC cycles */
2089         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
2090                            &vcpu->arch.virtual_tsc_shift,
2091                            &vcpu->arch.virtual_tsc_mult);
2092         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
2093
2094         /*
2095          * Compute the variation in TSC rate which is acceptable
2096          * within the range of tolerance and decide if the
2097          * rate being applied is within that bounds of the hardware
2098          * rate.  If so, no scaling or compensation need be done.
2099          */
2100         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
2101         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
2102         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
2103                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
2104                 use_scaling = 1;
2105         }
2106         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
2107 }
2108
2109 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
2110 {
2111         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
2112                                       vcpu->arch.virtual_tsc_mult,
2113                                       vcpu->arch.virtual_tsc_shift);
2114         tsc += vcpu->arch.this_tsc_write;
2115         return tsc;
2116 }
2117
2118 static inline int gtod_is_based_on_tsc(int mode)
2119 {
2120         return mode == VDSO_CLOCKMODE_TSC || mode == VDSO_CLOCKMODE_HVCLOCK;
2121 }
2122
2123 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
2124 {
2125 #ifdef CONFIG_X86_64
2126         bool vcpus_matched;
2127         struct kvm_arch *ka = &vcpu->kvm->arch;
2128         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2129
2130         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2131                          atomic_read(&vcpu->kvm->online_vcpus));
2132
2133         /*
2134          * Once the masterclock is enabled, always perform request in
2135          * order to update it.
2136          *
2137          * In order to enable masterclock, the host clocksource must be TSC
2138          * and the vcpus need to have matched TSCs.  When that happens,
2139          * perform request to enable masterclock.
2140          */
2141         if (ka->use_master_clock ||
2142             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
2143                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2144
2145         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
2146                             atomic_read(&vcpu->kvm->online_vcpus),
2147                             ka->use_master_clock, gtod->clock.vclock_mode);
2148 #endif
2149 }
2150
2151 /*
2152  * Multiply tsc by a fixed point number represented by ratio.
2153  *
2154  * The most significant 64-N bits (mult) of ratio represent the
2155  * integral part of the fixed point number; the remaining N bits
2156  * (frac) represent the fractional part, ie. ratio represents a fixed
2157  * point number (mult + frac * 2^(-N)).
2158  *
2159  * N equals to kvm_tsc_scaling_ratio_frac_bits.
2160  */
2161 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
2162 {
2163         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
2164 }
2165
2166 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
2167 {
2168         u64 _tsc = tsc;
2169         u64 ratio = vcpu->arch.tsc_scaling_ratio;
2170
2171         if (ratio != kvm_default_tsc_scaling_ratio)
2172                 _tsc = __scale_tsc(ratio, tsc);
2173
2174         return _tsc;
2175 }
2176 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
2177
2178 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
2179 {
2180         u64 tsc;
2181
2182         tsc = kvm_scale_tsc(vcpu, rdtsc());
2183
2184         return target_tsc - tsc;
2185 }
2186
2187 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
2188 {
2189         return vcpu->arch.l1_tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
2190 }
2191 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
2192
2193 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
2194 {
2195         vcpu->arch.l1_tsc_offset = offset;
2196         vcpu->arch.tsc_offset = kvm_x86_ops.write_l1_tsc_offset(vcpu, offset);
2197 }
2198
2199 static inline bool kvm_check_tsc_unstable(void)
2200 {
2201 #ifdef CONFIG_X86_64
2202         /*
2203          * TSC is marked unstable when we're running on Hyper-V,
2204          * 'TSC page' clocksource is good.
2205          */
2206         if (pvclock_gtod_data.clock.vclock_mode == VDSO_CLOCKMODE_HVCLOCK)
2207                 return false;
2208 #endif
2209         return check_tsc_unstable();
2210 }
2211
2212 static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 data)
2213 {
2214         struct kvm *kvm = vcpu->kvm;
2215         u64 offset, ns, elapsed;
2216         unsigned long flags;
2217         bool matched;
2218         bool already_matched;
2219         bool synchronizing = false;
2220
2221         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
2222         offset = kvm_compute_tsc_offset(vcpu, data);
2223         ns = get_kvmclock_base_ns();
2224         elapsed = ns - kvm->arch.last_tsc_nsec;
2225
2226         if (vcpu->arch.virtual_tsc_khz) {
2227                 if (data == 0) {
2228                         /*
2229                          * detection of vcpu initialization -- need to sync
2230                          * with other vCPUs. This particularly helps to keep
2231                          * kvm_clock stable after CPU hotplug
2232                          */
2233                         synchronizing = true;
2234                 } else {
2235                         u64 tsc_exp = kvm->arch.last_tsc_write +
2236                                                 nsec_to_cycles(vcpu, elapsed);
2237                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
2238                         /*
2239                          * Special case: TSC write with a small delta (1 second)
2240                          * of virtual cycle time against real time is
2241                          * interpreted as an attempt to synchronize the CPU.
2242                          */
2243                         synchronizing = data < tsc_exp + tsc_hz &&
2244                                         data + tsc_hz > tsc_exp;
2245                 }
2246         }
2247
2248         /*
2249          * For a reliable TSC, we can match TSC offsets, and for an unstable
2250          * TSC, we add elapsed time in this computation.  We could let the
2251          * compensation code attempt to catch up if we fall behind, but
2252          * it's better to try to match offsets from the beginning.
2253          */
2254         if (synchronizing &&
2255             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
2256                 if (!kvm_check_tsc_unstable()) {
2257                         offset = kvm->arch.cur_tsc_offset;
2258                 } else {
2259                         u64 delta = nsec_to_cycles(vcpu, elapsed);
2260                         data += delta;
2261                         offset = kvm_compute_tsc_offset(vcpu, data);
2262                 }
2263                 matched = true;
2264                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
2265         } else {
2266                 /*
2267                  * We split periods of matched TSC writes into generations.
2268                  * For each generation, we track the original measured
2269                  * nanosecond time, offset, and write, so if TSCs are in
2270                  * sync, we can match exact offset, and if not, we can match
2271                  * exact software computation in compute_guest_tsc()
2272                  *
2273                  * These values are tracked in kvm->arch.cur_xxx variables.
2274                  */
2275                 kvm->arch.cur_tsc_generation++;
2276                 kvm->arch.cur_tsc_nsec = ns;
2277                 kvm->arch.cur_tsc_write = data;
2278                 kvm->arch.cur_tsc_offset = offset;
2279                 matched = false;
2280         }
2281
2282         /*
2283          * We also track th most recent recorded KHZ, write and time to
2284          * allow the matching interval to be extended at each write.
2285          */
2286         kvm->arch.last_tsc_nsec = ns;
2287         kvm->arch.last_tsc_write = data;
2288         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
2289
2290         vcpu->arch.last_guest_tsc = data;
2291
2292         /* Keep track of which generation this VCPU has synchronized to */
2293         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
2294         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
2295         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
2296
2297         kvm_vcpu_write_tsc_offset(vcpu, offset);
2298         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
2299
2300         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
2301         if (!matched) {
2302                 kvm->arch.nr_vcpus_matched_tsc = 0;
2303         } else if (!already_matched) {
2304                 kvm->arch.nr_vcpus_matched_tsc++;
2305         }
2306
2307         kvm_track_tsc_matching(vcpu);
2308         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
2309 }
2310
2311 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
2312                                            s64 adjustment)
2313 {
2314         u64 tsc_offset = vcpu->arch.l1_tsc_offset;
2315         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
2316 }
2317
2318 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
2319 {
2320         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
2321                 WARN_ON(adjustment < 0);
2322         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
2323         adjust_tsc_offset_guest(vcpu, adjustment);
2324 }
2325
2326 #ifdef CONFIG_X86_64
2327
2328 static u64 read_tsc(void)
2329 {
2330         u64 ret = (u64)rdtsc_ordered();
2331         u64 last = pvclock_gtod_data.clock.cycle_last;
2332
2333         if (likely(ret >= last))
2334                 return ret;
2335
2336         /*
2337          * GCC likes to generate cmov here, but this branch is extremely
2338          * predictable (it's just a function of time and the likely is
2339          * very likely) and there's a data dependence, so force GCC
2340          * to generate a branch instead.  I don't barrier() because
2341          * we don't actually need a barrier, and if this function
2342          * ever gets inlined it will generate worse code.
2343          */
2344         asm volatile ("");
2345         return last;
2346 }
2347
2348 static inline u64 vgettsc(struct pvclock_clock *clock, u64 *tsc_timestamp,
2349                           int *mode)
2350 {
2351         long v;
2352         u64 tsc_pg_val;
2353
2354         switch (clock->vclock_mode) {
2355         case VDSO_CLOCKMODE_HVCLOCK:
2356                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2357                                                   tsc_timestamp);
2358                 if (tsc_pg_val != U64_MAX) {
2359                         /* TSC page valid */
2360                         *mode = VDSO_CLOCKMODE_HVCLOCK;
2361                         v = (tsc_pg_val - clock->cycle_last) &
2362                                 clock->mask;
2363                 } else {
2364                         /* TSC page invalid */
2365                         *mode = VDSO_CLOCKMODE_NONE;
2366                 }
2367                 break;
2368         case VDSO_CLOCKMODE_TSC:
2369                 *mode = VDSO_CLOCKMODE_TSC;
2370                 *tsc_timestamp = read_tsc();
2371                 v = (*tsc_timestamp - clock->cycle_last) &
2372                         clock->mask;
2373                 break;
2374         default:
2375                 *mode = VDSO_CLOCKMODE_NONE;
2376         }
2377
2378         if (*mode == VDSO_CLOCKMODE_NONE)
2379                 *tsc_timestamp = v = 0;
2380
2381         return v * clock->mult;
2382 }
2383
2384 static int do_monotonic_raw(s64 *t, u64 *tsc_timestamp)
2385 {
2386         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2387         unsigned long seq;
2388         int mode;
2389         u64 ns;
2390
2391         do {
2392                 seq = read_seqcount_begin(&gtod->seq);
2393                 ns = gtod->raw_clock.base_cycles;
2394                 ns += vgettsc(&gtod->raw_clock, tsc_timestamp, &mode);
2395                 ns >>= gtod->raw_clock.shift;
2396                 ns += ktime_to_ns(ktime_add(gtod->raw_clock.offset, gtod->offs_boot));
2397         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2398         *t = ns;
2399
2400         return mode;
2401 }
2402
2403 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2404 {
2405         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2406         unsigned long seq;
2407         int mode;
2408         u64 ns;
2409
2410         do {
2411                 seq = read_seqcount_begin(&gtod->seq);
2412                 ts->tv_sec = gtod->wall_time_sec;
2413                 ns = gtod->clock.base_cycles;
2414                 ns += vgettsc(&gtod->clock, tsc_timestamp, &mode);
2415                 ns >>= gtod->clock.shift;
2416         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2417
2418         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2419         ts->tv_nsec = ns;
2420
2421         return mode;
2422 }
2423
2424 /* returns true if host is using TSC based clocksource */
2425 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2426 {
2427         /* checked again under seqlock below */
2428         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2429                 return false;
2430
2431         return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns,
2432                                                       tsc_timestamp));
2433 }
2434
2435 /* returns true if host is using TSC based clocksource */
2436 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2437                                            u64 *tsc_timestamp)
2438 {
2439         /* checked again under seqlock below */
2440         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2441                 return false;
2442
2443         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2444 }
2445 #endif
2446
2447 /*
2448  *
2449  * Assuming a stable TSC across physical CPUS, and a stable TSC
2450  * across virtual CPUs, the following condition is possible.
2451  * Each numbered line represents an event visible to both
2452  * CPUs at the next numbered event.
2453  *
2454  * "timespecX" represents host monotonic time. "tscX" represents
2455  * RDTSC value.
2456  *
2457  *              VCPU0 on CPU0           |       VCPU1 on CPU1
2458  *
2459  * 1.  read timespec0,tsc0
2460  * 2.                                   | timespec1 = timespec0 + N
2461  *                                      | tsc1 = tsc0 + M
2462  * 3. transition to guest               | transition to guest
2463  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2464  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
2465  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2466  *
2467  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2468  *
2469  *      - ret0 < ret1
2470  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2471  *              ...
2472  *      - 0 < N - M => M < N
2473  *
2474  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2475  * always the case (the difference between two distinct xtime instances
2476  * might be smaller then the difference between corresponding TSC reads,
2477  * when updating guest vcpus pvclock areas).
2478  *
2479  * To avoid that problem, do not allow visibility of distinct
2480  * system_timestamp/tsc_timestamp values simultaneously: use a master
2481  * copy of host monotonic time values. Update that master copy
2482  * in lockstep.
2483  *
2484  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2485  *
2486  */
2487
2488 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2489 {
2490 #ifdef CONFIG_X86_64
2491         struct kvm_arch *ka = &kvm->arch;
2492         int vclock_mode;
2493         bool host_tsc_clocksource, vcpus_matched;
2494
2495         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2496                         atomic_read(&kvm->online_vcpus));
2497
2498         /*
2499          * If the host uses TSC clock, then passthrough TSC as stable
2500          * to the guest.
2501          */
2502         host_tsc_clocksource = kvm_get_time_and_clockread(
2503                                         &ka->master_kernel_ns,
2504                                         &ka->master_cycle_now);
2505
2506         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2507                                 && !ka->backwards_tsc_observed
2508                                 && !ka->boot_vcpu_runs_old_kvmclock;
2509
2510         if (ka->use_master_clock)
2511                 atomic_set(&kvm_guest_has_master_clock, 1);
2512
2513         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2514         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2515                                         vcpus_matched);
2516 #endif
2517 }
2518
2519 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2520 {
2521         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2522 }
2523
2524 static void kvm_gen_update_masterclock(struct kvm *kvm)
2525 {
2526 #ifdef CONFIG_X86_64
2527         int i;
2528         struct kvm_vcpu *vcpu;
2529         struct kvm_arch *ka = &kvm->arch;
2530
2531         spin_lock(&ka->pvclock_gtod_sync_lock);
2532         kvm_make_mclock_inprogress_request(kvm);
2533         /* no guest entries from this point */
2534         pvclock_update_vm_gtod_copy(kvm);
2535
2536         kvm_for_each_vcpu(i, vcpu, kvm)
2537                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2538
2539         /* guest entries allowed */
2540         kvm_for_each_vcpu(i, vcpu, kvm)
2541                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2542
2543         spin_unlock(&ka->pvclock_gtod_sync_lock);
2544 #endif
2545 }
2546
2547 u64 get_kvmclock_ns(struct kvm *kvm)
2548 {
2549         struct kvm_arch *ka = &kvm->arch;
2550         struct pvclock_vcpu_time_info hv_clock;
2551         u64 ret;
2552
2553         spin_lock(&ka->pvclock_gtod_sync_lock);
2554         if (!ka->use_master_clock) {
2555                 spin_unlock(&ka->pvclock_gtod_sync_lock);
2556                 return get_kvmclock_base_ns() + ka->kvmclock_offset;
2557         }
2558
2559         hv_clock.tsc_timestamp = ka->master_cycle_now;
2560         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2561         spin_unlock(&ka->pvclock_gtod_sync_lock);
2562
2563         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2564         get_cpu();
2565
2566         if (__this_cpu_read(cpu_tsc_khz)) {
2567                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2568                                    &hv_clock.tsc_shift,
2569                                    &hv_clock.tsc_to_system_mul);
2570                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2571         } else
2572                 ret = get_kvmclock_base_ns() + ka->kvmclock_offset;
2573
2574         put_cpu();
2575
2576         return ret;
2577 }
2578
2579 static void kvm_setup_pvclock_page(struct kvm_vcpu *v)
2580 {
2581         struct kvm_vcpu_arch *vcpu = &v->arch;
2582         struct pvclock_vcpu_time_info guest_hv_clock;
2583
2584         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
2585                 &guest_hv_clock, sizeof(guest_hv_clock))))
2586                 return;
2587
2588         /* This VCPU is paused, but it's legal for a guest to read another
2589          * VCPU's kvmclock, so we really have to follow the specification where
2590          * it says that version is odd if data is being modified, and even after
2591          * it is consistent.
2592          *
2593          * Version field updates must be kept separate.  This is because
2594          * kvm_write_guest_cached might use a "rep movs" instruction, and
2595          * writes within a string instruction are weakly ordered.  So there
2596          * are three writes overall.
2597          *
2598          * As a small optimization, only write the version field in the first
2599          * and third write.  The vcpu->pv_time cache is still valid, because the
2600          * version field is the first in the struct.
2601          */
2602         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2603
2604         if (guest_hv_clock.version & 1)
2605                 ++guest_hv_clock.version;  /* first time write, random junk */
2606
2607         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2608         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2609                                 &vcpu->hv_clock,
2610                                 sizeof(vcpu->hv_clock.version));
2611
2612         smp_wmb();
2613
2614         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2615         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2616
2617         if (vcpu->pvclock_set_guest_stopped_request) {
2618                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2619                 vcpu->pvclock_set_guest_stopped_request = false;
2620         }
2621
2622         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2623
2624         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2625                                 &vcpu->hv_clock,
2626                                 sizeof(vcpu->hv_clock));
2627
2628         smp_wmb();
2629
2630         vcpu->hv_clock.version++;
2631         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2632                                 &vcpu->hv_clock,
2633                                 sizeof(vcpu->hv_clock.version));
2634 }
2635
2636 static int kvm_guest_time_update(struct kvm_vcpu *v)
2637 {
2638         unsigned long flags, tgt_tsc_khz;
2639         struct kvm_vcpu_arch *vcpu = &v->arch;
2640         struct kvm_arch *ka = &v->kvm->arch;
2641         s64 kernel_ns;
2642         u64 tsc_timestamp, host_tsc;
2643         u8 pvclock_flags;
2644         bool use_master_clock;
2645
2646         kernel_ns = 0;
2647         host_tsc = 0;
2648
2649         /*
2650          * If the host uses TSC clock, then passthrough TSC as stable
2651          * to the guest.
2652          */
2653         spin_lock(&ka->pvclock_gtod_sync_lock);
2654         use_master_clock = ka->use_master_clock;
2655         if (use_master_clock) {
2656                 host_tsc = ka->master_cycle_now;
2657                 kernel_ns = ka->master_kernel_ns;
2658         }
2659         spin_unlock(&ka->pvclock_gtod_sync_lock);
2660
2661         /* Keep irq disabled to prevent changes to the clock */
2662         local_irq_save(flags);
2663         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2664         if (unlikely(tgt_tsc_khz == 0)) {
2665                 local_irq_restore(flags);
2666                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2667                 return 1;
2668         }
2669         if (!use_master_clock) {
2670                 host_tsc = rdtsc();
2671                 kernel_ns = get_kvmclock_base_ns();
2672         }
2673
2674         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2675
2676         /*
2677          * We may have to catch up the TSC to match elapsed wall clock
2678          * time for two reasons, even if kvmclock is used.
2679          *   1) CPU could have been running below the maximum TSC rate
2680          *   2) Broken TSC compensation resets the base at each VCPU
2681          *      entry to avoid unknown leaps of TSC even when running
2682          *      again on the same CPU.  This may cause apparent elapsed
2683          *      time to disappear, and the guest to stand still or run
2684          *      very slowly.
2685          */
2686         if (vcpu->tsc_catchup) {
2687                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2688                 if (tsc > tsc_timestamp) {
2689                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2690                         tsc_timestamp = tsc;
2691                 }
2692         }
2693
2694         local_irq_restore(flags);
2695
2696         /* With all the info we got, fill in the values */
2697
2698         if (kvm_has_tsc_control)
2699                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
2700
2701         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2702                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2703                                    &vcpu->hv_clock.tsc_shift,
2704                                    &vcpu->hv_clock.tsc_to_system_mul);
2705                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2706         }
2707
2708         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2709         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2710         vcpu->last_guest_tsc = tsc_timestamp;
2711
2712         /* If the host uses TSC clocksource, then it is stable */
2713         pvclock_flags = 0;
2714         if (use_master_clock)
2715                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2716
2717         vcpu->hv_clock.flags = pvclock_flags;
2718
2719         if (vcpu->pv_time_enabled)
2720                 kvm_setup_pvclock_page(v);
2721         if (v == kvm_get_vcpu(v->kvm, 0))
2722                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2723         return 0;
2724 }
2725
2726 /*
2727  * kvmclock updates which are isolated to a given vcpu, such as
2728  * vcpu->cpu migration, should not allow system_timestamp from
2729  * the rest of the vcpus to remain static. Otherwise ntp frequency
2730  * correction applies to one vcpu's system_timestamp but not
2731  * the others.
2732  *
2733  * So in those cases, request a kvmclock update for all vcpus.
2734  * We need to rate-limit these requests though, as they can
2735  * considerably slow guests that have a large number of vcpus.
2736  * The time for a remote vcpu to update its kvmclock is bound
2737  * by the delay we use to rate-limit the updates.
2738  */
2739
2740 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2741
2742 static void kvmclock_update_fn(struct work_struct *work)
2743 {
2744         int i;
2745         struct delayed_work *dwork = to_delayed_work(work);
2746         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2747                                            kvmclock_update_work);
2748         struct kvm *kvm = container_of(ka, struct kvm, arch);
2749         struct kvm_vcpu *vcpu;
2750
2751         kvm_for_each_vcpu(i, vcpu, kvm) {
2752                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2753                 kvm_vcpu_kick(vcpu);
2754         }
2755 }
2756
2757 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2758 {
2759         struct kvm *kvm = v->kvm;
2760
2761         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2762         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2763                                         KVMCLOCK_UPDATE_DELAY);
2764 }
2765
2766 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2767
2768 static void kvmclock_sync_fn(struct work_struct *work)
2769 {
2770         struct delayed_work *dwork = to_delayed_work(work);
2771         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2772                                            kvmclock_sync_work);
2773         struct kvm *kvm = container_of(ka, struct kvm, arch);
2774
2775         if (!kvmclock_periodic_sync)
2776                 return;
2777
2778         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2779         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2780                                         KVMCLOCK_SYNC_PERIOD);
2781 }
2782
2783 /*
2784  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
2785  */
2786 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
2787 {
2788         /* McStatusWrEn enabled? */
2789         if (guest_cpuid_is_amd_or_hygon(vcpu))
2790                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
2791
2792         return false;
2793 }
2794
2795 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2796 {
2797         u64 mcg_cap = vcpu->arch.mcg_cap;
2798         unsigned bank_num = mcg_cap & 0xff;
2799         u32 msr = msr_info->index;
2800         u64 data = msr_info->data;
2801
2802         switch (msr) {
2803         case MSR_IA32_MCG_STATUS:
2804                 vcpu->arch.mcg_status = data;
2805                 break;
2806         case MSR_IA32_MCG_CTL:
2807                 if (!(mcg_cap & MCG_CTL_P) &&
2808                     (data || !msr_info->host_initiated))
2809                         return 1;
2810                 if (data != 0 && data != ~(u64)0)
2811                         return 1;
2812                 vcpu->arch.mcg_ctl = data;
2813                 break;
2814         default:
2815                 if (msr >= MSR_IA32_MC0_CTL &&
2816                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2817                         u32 offset = array_index_nospec(
2818                                 msr - MSR_IA32_MC0_CTL,
2819                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
2820
2821                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2822                          * some Linux kernels though clear bit 10 in bank 4 to
2823                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2824                          * this to avoid an uncatched #GP in the guest
2825                          */
2826                         if ((offset & 0x3) == 0 &&
2827                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2828                                 return -1;
2829
2830                         /* MCi_STATUS */
2831                         if (!msr_info->host_initiated &&
2832                             (offset & 0x3) == 1 && data != 0) {
2833                                 if (!can_set_mci_status(vcpu))
2834                                         return -1;
2835                         }
2836
2837                         vcpu->arch.mce_banks[offset] = data;
2838                         break;
2839                 }
2840                 return 1;
2841         }
2842         return 0;
2843 }
2844
2845 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
2846 {
2847         struct kvm *kvm = vcpu->kvm;
2848         int lm = is_long_mode(vcpu);
2849         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
2850                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
2851         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
2852                 : kvm->arch.xen_hvm_config.blob_size_32;
2853         u32 page_num = data & ~PAGE_MASK;
2854         u64 page_addr = data & PAGE_MASK;
2855         u8 *page;
2856
2857         if (page_num >= blob_size)
2858                 return 1;
2859
2860         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
2861         if (IS_ERR(page))
2862                 return PTR_ERR(page);
2863
2864         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE)) {
2865                 kfree(page);
2866                 return 1;
2867         }
2868         return 0;
2869 }
2870
2871 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu *vcpu)
2872 {
2873         u64 mask = KVM_ASYNC_PF_ENABLED | KVM_ASYNC_PF_DELIVERY_AS_INT;
2874
2875         return (vcpu->arch.apf.msr_en_val & mask) == mask;
2876 }
2877
2878 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2879 {
2880         gpa_t gpa = data & ~0x3f;
2881
2882         /* Bits 4:5 are reserved, Should be zero */
2883         if (data & 0x30)
2884                 return 1;
2885
2886         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_VMEXIT) &&
2887             (data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT))
2888                 return 1;
2889
2890         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT) &&
2891             (data & KVM_ASYNC_PF_DELIVERY_AS_INT))
2892                 return 1;
2893
2894         if (!lapic_in_kernel(vcpu))
2895                 return data ? 1 : 0;
2896
2897         vcpu->arch.apf.msr_en_val = data;
2898
2899         if (!kvm_pv_async_pf_enabled(vcpu)) {
2900                 kvm_clear_async_pf_completion_queue(vcpu);
2901                 kvm_async_pf_hash_reset(vcpu);
2902                 return 0;
2903         }
2904
2905         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2906                                         sizeof(u64)))
2907                 return 1;
2908
2909         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2910         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
2911
2912         kvm_async_pf_wakeup_all(vcpu);
2913
2914         return 0;
2915 }
2916
2917 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu *vcpu, u64 data)
2918 {
2919         /* Bits 8-63 are reserved */
2920         if (data >> 8)
2921                 return 1;
2922
2923         if (!lapic_in_kernel(vcpu))
2924                 return 1;
2925
2926         vcpu->arch.apf.msr_int_val = data;
2927
2928         vcpu->arch.apf.vec = data & KVM_ASYNC_PF_VEC_MASK;
2929
2930         return 0;
2931 }
2932
2933 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2934 {
2935         vcpu->arch.pv_time_enabled = false;
2936         vcpu->arch.time = 0;
2937 }
2938
2939 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu *vcpu)
2940 {
2941         ++vcpu->stat.tlb_flush;
2942         kvm_x86_ops.tlb_flush_all(vcpu);
2943 }
2944
2945 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu *vcpu)
2946 {
2947         ++vcpu->stat.tlb_flush;
2948         kvm_x86_ops.tlb_flush_guest(vcpu);
2949 }
2950
2951 static void record_steal_time(struct kvm_vcpu *vcpu)
2952 {
2953         struct kvm_host_map map;
2954         struct kvm_steal_time *st;
2955
2956         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2957                 return;
2958
2959         /* -EAGAIN is returned in atomic context so we can just return. */
2960         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT,
2961                         &map, &vcpu->arch.st.cache, false))
2962                 return;
2963
2964         st = map.hva +
2965                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
2966
2967         /*
2968          * Doing a TLB flush here, on the guest's behalf, can avoid
2969          * expensive IPIs.
2970          */
2971         if (guest_pv_has(vcpu, KVM_FEATURE_PV_TLB_FLUSH)) {
2972                 trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
2973                                        st->preempted & KVM_VCPU_FLUSH_TLB);
2974                 if (xchg(&st->preempted, 0) & KVM_VCPU_FLUSH_TLB)
2975                         kvm_vcpu_flush_tlb_guest(vcpu);
2976         }
2977
2978         vcpu->arch.st.preempted = 0;
2979
2980         if (st->version & 1)
2981                 st->version += 1;  /* first time write, random junk */
2982
2983         st->version += 1;
2984
2985         smp_wmb();
2986
2987         st->steal += current->sched_info.run_delay -
2988                 vcpu->arch.st.last_steal;
2989         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2990
2991         smp_wmb();
2992
2993         st->version += 1;
2994
2995         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, false);
2996 }
2997
2998 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2999 {
3000         bool pr = false;
3001         u32 msr = msr_info->index;
3002         u64 data = msr_info->data;
3003
3004         switch (msr) {
3005         case MSR_AMD64_NB_CFG:
3006         case MSR_IA32_UCODE_WRITE:
3007         case MSR_VM_HSAVE_PA:
3008         case MSR_AMD64_PATCH_LOADER:
3009         case MSR_AMD64_BU_CFG2:
3010         case MSR_AMD64_DC_CFG:
3011         case MSR_F15H_EX_CFG:
3012                 break;
3013
3014         case MSR_IA32_UCODE_REV:
3015                 if (msr_info->host_initiated)
3016                         vcpu->arch.microcode_version = data;
3017                 break;
3018         case MSR_IA32_ARCH_CAPABILITIES:
3019                 if (!msr_info->host_initiated)
3020                         return 1;
3021                 vcpu->arch.arch_capabilities = data;
3022                 break;
3023         case MSR_IA32_PERF_CAPABILITIES: {
3024                 struct kvm_msr_entry msr_ent = {.index = msr, .data = 0};
3025
3026                 if (!msr_info->host_initiated)
3027                         return 1;
3028                 if (guest_cpuid_has(vcpu, X86_FEATURE_PDCM) && kvm_get_msr_feature(&msr_ent))
3029                         return 1;
3030                 if (data & ~msr_ent.data)
3031                         return 1;
3032
3033                 vcpu->arch.perf_capabilities = data;
3034
3035                 return 0;
3036                 }
3037         case MSR_EFER:
3038                 return set_efer(vcpu, msr_info);
3039         case MSR_K7_HWCR:
3040                 data &= ~(u64)0x40;     /* ignore flush filter disable */
3041                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
3042                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
3043
3044                 /* Handle McStatusWrEn */
3045                 if (data == BIT_ULL(18)) {
3046                         vcpu->arch.msr_hwcr = data;
3047                 } else if (data != 0) {
3048                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
3049                                     data);
3050                         return 1;
3051                 }
3052                 break;
3053         case MSR_FAM10H_MMIO_CONF_BASE:
3054                 if (data != 0) {
3055                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
3056                                     "0x%llx\n", data);
3057                         return 1;
3058                 }
3059                 break;
3060         case MSR_IA32_DEBUGCTLMSR:
3061                 if (!data) {
3062                         /* We support the non-activated case already */
3063                         break;
3064                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
3065                         /* Values other than LBR and BTF are vendor-specific,
3066                            thus reserved and should throw a #GP */
3067                         return 1;
3068                 }
3069                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
3070                             __func__, data);
3071                 break;
3072         case 0x200 ... 0x2ff:
3073                 return kvm_mtrr_set_msr(vcpu, msr, data);
3074         case MSR_IA32_APICBASE:
3075                 return kvm_set_apic_base(vcpu, msr_info);
3076         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3077                 return kvm_x2apic_msr_write(vcpu, msr, data);
3078         case MSR_IA32_TSCDEADLINE:
3079                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
3080                 break;
3081         case MSR_IA32_TSC_ADJUST:
3082                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
3083                         if (!msr_info->host_initiated) {
3084                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
3085                                 adjust_tsc_offset_guest(vcpu, adj);
3086                         }
3087                         vcpu->arch.ia32_tsc_adjust_msr = data;
3088                 }
3089                 break;
3090         case MSR_IA32_MISC_ENABLE:
3091                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
3092                     ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
3093                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
3094                                 return 1;
3095                         vcpu->arch.ia32_misc_enable_msr = data;
3096                         kvm_update_cpuid_runtime(vcpu);
3097                 } else {
3098                         vcpu->arch.ia32_misc_enable_msr = data;
3099                 }
3100                 break;
3101         case MSR_IA32_SMBASE:
3102                 if (!msr_info->host_initiated)
3103                         return 1;
3104                 vcpu->arch.smbase = data;
3105                 break;
3106         case MSR_IA32_POWER_CTL:
3107                 vcpu->arch.msr_ia32_power_ctl = data;
3108                 break;
3109         case MSR_IA32_TSC:
3110                 if (msr_info->host_initiated) {
3111                         kvm_synchronize_tsc(vcpu, data);
3112                 } else {
3113                         u64 adj = kvm_compute_tsc_offset(vcpu, data) - vcpu->arch.l1_tsc_offset;
3114                         adjust_tsc_offset_guest(vcpu, adj);
3115                         vcpu->arch.ia32_tsc_adjust_msr += adj;
3116                 }
3117                 break;
3118         case MSR_IA32_XSS:
3119                 if (!msr_info->host_initiated &&
3120                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3121                         return 1;
3122                 /*
3123                  * KVM supports exposing PT to the guest, but does not support
3124                  * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3125                  * XSAVES/XRSTORS to save/restore PT MSRs.
3126                  */
3127                 if (data & ~supported_xss)
3128                         return 1;
3129                 vcpu->arch.ia32_xss = data;
3130                 break;
3131         case MSR_SMI_COUNT:
3132                 if (!msr_info->host_initiated)
3133                         return 1;
3134                 vcpu->arch.smi_count = data;
3135                 break;
3136         case MSR_KVM_WALL_CLOCK_NEW:
3137                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3138                         return 1;
3139
3140                 kvm_write_wall_clock(vcpu->kvm, data);
3141                 break;
3142         case MSR_KVM_WALL_CLOCK:
3143                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3144                         return 1;
3145
3146                 kvm_write_wall_clock(vcpu->kvm, data);
3147                 break;
3148         case MSR_KVM_SYSTEM_TIME_NEW:
3149                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3150                         return 1;
3151
3152                 kvm_write_system_time(vcpu, data, false, msr_info->host_initiated);
3153                 break;
3154         case MSR_KVM_SYSTEM_TIME:
3155                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3156                         return 1;
3157
3158                 kvm_write_system_time(vcpu, data, true,  msr_info->host_initiated);
3159                 break;
3160         case MSR_KVM_ASYNC_PF_EN:
3161                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3162                         return 1;
3163
3164                 if (kvm_pv_enable_async_pf(vcpu, data))
3165                         return 1;
3166                 break;
3167         case MSR_KVM_ASYNC_PF_INT:
3168                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3169                         return 1;
3170
3171                 if (kvm_pv_enable_async_pf_int(vcpu, data))
3172                         return 1;
3173                 break;
3174         case MSR_KVM_ASYNC_PF_ACK:
3175                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3176                         return 1;
3177                 if (data & 0x1) {
3178                         vcpu->arch.apf.pageready_pending = false;
3179                         kvm_check_async_pf_completion(vcpu);
3180                 }
3181                 break;
3182         case MSR_KVM_STEAL_TIME:
3183                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3184                         return 1;
3185
3186                 if (unlikely(!sched_info_on()))
3187                         return 1;
3188
3189                 if (data & KVM_STEAL_RESERVED_MASK)
3190                         return 1;
3191
3192                 vcpu->arch.st.msr_val = data;
3193
3194                 if (!(data & KVM_MSR_ENABLED))
3195                         break;
3196
3197                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3198
3199                 break;
3200         case MSR_KVM_PV_EOI_EN:
3201                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3202                         return 1;
3203
3204                 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
3205                         return 1;
3206                 break;
3207
3208         case MSR_KVM_POLL_CONTROL:
3209                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3210                         return 1;
3211
3212                 /* only enable bit supported */
3213                 if (data & (-1ULL << 1))
3214                         return 1;
3215
3216                 vcpu->arch.msr_kvm_poll_control = data;
3217                 break;
3218
3219         case MSR_IA32_MCG_CTL:
3220         case MSR_IA32_MCG_STATUS:
3221         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3222                 return set_msr_mce(vcpu, msr_info);
3223
3224         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3225         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3226                 pr = true;
3227                 fallthrough;
3228         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3229         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3230                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3231                         return kvm_pmu_set_msr(vcpu, msr_info);
3232
3233                 if (pr || data != 0)
3234                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
3235                                     "0x%x data 0x%llx\n", msr, data);
3236                 break;
3237         case MSR_K7_CLK_CTL:
3238                 /*
3239                  * Ignore all writes to this no longer documented MSR.
3240                  * Writes are only relevant for old K7 processors,
3241                  * all pre-dating SVM, but a recommended workaround from
3242                  * AMD for these chips. It is possible to specify the
3243                  * affected processor models on the command line, hence
3244                  * the need to ignore the workaround.
3245                  */
3246                 break;
3247         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3248         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3249         case HV_X64_MSR_SYNDBG_OPTIONS:
3250         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3251         case HV_X64_MSR_CRASH_CTL:
3252         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3253         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3254         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3255         case HV_X64_MSR_TSC_EMULATION_STATUS:
3256                 return kvm_hv_set_msr_common(vcpu, msr, data,
3257                                              msr_info->host_initiated);
3258         case MSR_IA32_BBL_CR_CTL3:
3259                 /* Drop writes to this legacy MSR -- see rdmsr
3260                  * counterpart for further detail.
3261                  */
3262                 if (report_ignored_msrs)
3263                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
3264                                 msr, data);
3265                 break;
3266         case MSR_AMD64_OSVW_ID_LENGTH:
3267                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3268                         return 1;
3269                 vcpu->arch.osvw.length = data;
3270                 break;
3271         case MSR_AMD64_OSVW_STATUS:
3272                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3273                         return 1;
3274                 vcpu->arch.osvw.status = data;
3275                 break;
3276         case MSR_PLATFORM_INFO:
3277                 if (!msr_info->host_initiated ||
3278                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
3279                      cpuid_fault_enabled(vcpu)))
3280                         return 1;
3281                 vcpu->arch.msr_platform_info = data;
3282                 break;
3283         case MSR_MISC_FEATURES_ENABLES:
3284                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
3285                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
3286                      !supports_cpuid_fault(vcpu)))
3287                         return 1;
3288                 vcpu->arch.msr_misc_features_enables = data;
3289                 break;
3290         default:
3291                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
3292                         return xen_hvm_config(vcpu, data);
3293                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3294                         return kvm_pmu_set_msr(vcpu, msr_info);
3295                 return KVM_MSR_RET_INVALID;
3296         }
3297         return 0;
3298 }
3299 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
3300
3301 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
3302 {
3303         u64 data;
3304         u64 mcg_cap = vcpu->arch.mcg_cap;
3305         unsigned bank_num = mcg_cap & 0xff;
3306
3307         switch (msr) {
3308         case MSR_IA32_P5_MC_ADDR:
3309         case MSR_IA32_P5_MC_TYPE:
3310                 data = 0;
3311                 break;
3312         case MSR_IA32_MCG_CAP:
3313                 data = vcpu->arch.mcg_cap;
3314                 break;
3315         case MSR_IA32_MCG_CTL:
3316                 if (!(mcg_cap & MCG_CTL_P) && !host)
3317                         return 1;
3318                 data = vcpu->arch.mcg_ctl;
3319                 break;
3320         case MSR_IA32_MCG_STATUS:
3321                 data = vcpu->arch.mcg_status;
3322                 break;
3323         default:
3324                 if (msr >= MSR_IA32_MC0_CTL &&
3325                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3326                         u32 offset = array_index_nospec(
3327                                 msr - MSR_IA32_MC0_CTL,
3328                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3329
3330                         data = vcpu->arch.mce_banks[offset];
3331                         break;
3332                 }
3333                 return 1;
3334         }
3335         *pdata = data;
3336         return 0;
3337 }
3338
3339 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3340 {
3341         switch (msr_info->index) {
3342         case MSR_IA32_PLATFORM_ID:
3343         case MSR_IA32_EBL_CR_POWERON:
3344         case MSR_IA32_DEBUGCTLMSR:
3345         case MSR_IA32_LASTBRANCHFROMIP:
3346         case MSR_IA32_LASTBRANCHTOIP:
3347         case MSR_IA32_LASTINTFROMIP:
3348         case MSR_IA32_LASTINTTOIP:
3349         case MSR_K8_SYSCFG:
3350         case MSR_K8_TSEG_ADDR:
3351         case MSR_K8_TSEG_MASK:
3352         case MSR_VM_HSAVE_PA:
3353         case MSR_K8_INT_PENDING_MSG:
3354         case MSR_AMD64_NB_CFG:
3355         case MSR_FAM10H_MMIO_CONF_BASE:
3356         case MSR_AMD64_BU_CFG2:
3357         case MSR_IA32_PERF_CTL:
3358         case MSR_AMD64_DC_CFG:
3359         case MSR_F15H_EX_CFG:
3360         /*
3361          * Intel Sandy Bridge CPUs must support the RAPL (running average power
3362          * limit) MSRs. Just return 0, as we do not want to expose the host
3363          * data here. Do not conditionalize this on CPUID, as KVM does not do
3364          * so for existing CPU-specific MSRs.
3365          */
3366         case MSR_RAPL_POWER_UNIT:
3367         case MSR_PP0_ENERGY_STATUS:     /* Power plane 0 (core) */
3368         case MSR_PP1_ENERGY_STATUS:     /* Power plane 1 (graphics uncore) */
3369         case MSR_PKG_ENERGY_STATUS:     /* Total package */
3370         case MSR_DRAM_ENERGY_STATUS:    /* DRAM controller */
3371                 msr_info->data = 0;
3372                 break;
3373         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
3374         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3375         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3376         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3377         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3378                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3379                         return kvm_pmu_get_msr(vcpu, msr_info);
3380                 msr_info->data = 0;
3381                 break;
3382         case MSR_IA32_UCODE_REV:
3383                 msr_info->data = vcpu->arch.microcode_version;
3384                 break;
3385         case MSR_IA32_ARCH_CAPABILITIES:
3386                 if (!msr_info->host_initiated &&
3387                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
3388                         return 1;
3389                 msr_info->data = vcpu->arch.arch_capabilities;
3390                 break;
3391         case MSR_IA32_PERF_CAPABILITIES:
3392                 if (!msr_info->host_initiated &&
3393                     !guest_cpuid_has(vcpu, X86_FEATURE_PDCM))
3394                         return 1;
3395                 msr_info->data = vcpu->arch.perf_capabilities;
3396                 break;
3397         case MSR_IA32_POWER_CTL:
3398                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
3399                 break;
3400         case MSR_IA32_TSC: {
3401                 /*
3402                  * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3403                  * even when not intercepted. AMD manual doesn't explicitly
3404                  * state this but appears to behave the same.
3405                  *
3406                  * On userspace reads and writes, however, we unconditionally
3407                  * return L1's TSC value to ensure backwards-compatible
3408                  * behavior for migration.
3409                  */
3410                 u64 tsc_offset = msr_info->host_initiated ? vcpu->arch.l1_tsc_offset :
3411                                                             vcpu->arch.tsc_offset;
3412
3413                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc()) + tsc_offset;
3414                 break;
3415         }
3416         case MSR_MTRRcap:
3417         case 0x200 ... 0x2ff:
3418                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
3419         case 0xcd: /* fsb frequency */
3420                 msr_info->data = 3;
3421                 break;
3422                 /*
3423                  * MSR_EBC_FREQUENCY_ID
3424                  * Conservative value valid for even the basic CPU models.
3425                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3426                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3427                  * and 266MHz for model 3, or 4. Set Core Clock
3428                  * Frequency to System Bus Frequency Ratio to 1 (bits
3429                  * 31:24) even though these are only valid for CPU
3430                  * models > 2, however guests may end up dividing or
3431                  * multiplying by zero otherwise.
3432                  */
3433         case MSR_EBC_FREQUENCY_ID:
3434                 msr_info->data = 1 << 24;
3435                 break;
3436         case MSR_IA32_APICBASE:
3437                 msr_info->data = kvm_get_apic_base(vcpu);
3438                 break;
3439         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3440                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
3441         case MSR_IA32_TSCDEADLINE:
3442                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
3443                 break;
3444         case MSR_IA32_TSC_ADJUST:
3445                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
3446                 break;
3447         case MSR_IA32_MISC_ENABLE:
3448                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
3449                 break;
3450         case MSR_IA32_SMBASE:
3451                 if (!msr_info->host_initiated)
3452                         return 1;
3453                 msr_info->data = vcpu->arch.smbase;
3454                 break;
3455         case MSR_SMI_COUNT:
3456                 msr_info->data = vcpu->arch.smi_count;
3457                 break;
3458         case MSR_IA32_PERF_STATUS:
3459                 /* TSC increment by tick */
3460                 msr_info->data = 1000ULL;
3461                 /* CPU multiplier */
3462                 msr_info->data |= (((uint64_t)4ULL) << 40);
3463                 break;
3464         case MSR_EFER:
3465                 msr_info->data = vcpu->arch.efer;
3466                 break;
3467         case MSR_KVM_WALL_CLOCK:
3468         case MSR_KVM_WALL_CLOCK_NEW:
3469                 msr_info->data = vcpu->kvm->arch.wall_clock;
3470                 break;
3471         case MSR_KVM_SYSTEM_TIME:
3472         case MSR_KVM_SYSTEM_TIME_NEW:
3473                 msr_info->data = vcpu->arch.time;
3474                 break;
3475         case MSR_KVM_ASYNC_PF_EN:
3476                 msr_info->data = vcpu->arch.apf.msr_en_val;
3477                 break;
3478         case MSR_KVM_ASYNC_PF_INT:
3479                 msr_info->data = vcpu->arch.apf.msr_int_val;
3480                 break;
3481         case MSR_KVM_ASYNC_PF_ACK:
3482                 msr_info->data = 0;
3483                 break;
3484         case MSR_KVM_STEAL_TIME:
3485                 msr_info->data = vcpu->arch.st.msr_val;
3486                 break;
3487         case MSR_KVM_PV_EOI_EN:
3488                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
3489                 break;
3490         case MSR_KVM_POLL_CONTROL:
3491                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
3492                 break;
3493         case MSR_IA32_P5_MC_ADDR:
3494         case MSR_IA32_P5_MC_TYPE:
3495         case MSR_IA32_MCG_CAP:
3496         case MSR_IA32_MCG_CTL:
3497         case MSR_IA32_MCG_STATUS:
3498         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3499                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
3500                                    msr_info->host_initiated);
3501         case MSR_IA32_XSS:
3502                 if (!msr_info->host_initiated &&
3503                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3504                         return 1;
3505                 msr_info->data = vcpu->arch.ia32_xss;
3506                 break;
3507         case MSR_K7_CLK_CTL:
3508                 /*
3509                  * Provide expected ramp-up count for K7. All other
3510                  * are set to zero, indicating minimum divisors for
3511                  * every field.
3512                  *
3513                  * This prevents guest kernels on AMD host with CPU
3514                  * type 6, model 8 and higher from exploding due to
3515                  * the rdmsr failing.
3516                  */
3517                 msr_info->data = 0x20000000;
3518                 break;
3519         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3520         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3521         case HV_X64_MSR_SYNDBG_OPTIONS:
3522         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3523         case HV_X64_MSR_CRASH_CTL:
3524         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3525         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3526         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3527         case HV_X64_MSR_TSC_EMULATION_STATUS:
3528                 return kvm_hv_get_msr_common(vcpu,
3529                                              msr_info->index, &msr_info->data,
3530                                              msr_info->host_initiated);
3531         case MSR_IA32_BBL_CR_CTL3:
3532                 /* This legacy MSR exists but isn't fully documented in current
3533                  * silicon.  It is however accessed by winxp in very narrow
3534                  * scenarios where it sets bit #19, itself documented as
3535                  * a "reserved" bit.  Best effort attempt to source coherent
3536                  * read data here should the balance of the register be
3537                  * interpreted by the guest:
3538                  *
3539                  * L2 cache control register 3: 64GB range, 256KB size,
3540                  * enabled, latency 0x1, configured
3541                  */
3542                 msr_info->data = 0xbe702111;
3543                 break;
3544         case MSR_AMD64_OSVW_ID_LENGTH:
3545                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3546                         return 1;
3547                 msr_info->data = vcpu->arch.osvw.length;
3548                 break;
3549         case MSR_AMD64_OSVW_STATUS:
3550                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3551                         return 1;
3552                 msr_info->data = vcpu->arch.osvw.status;
3553                 break;
3554         case MSR_PLATFORM_INFO:
3555                 if (!msr_info->host_initiated &&
3556                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
3557                         return 1;
3558                 msr_info->data = vcpu->arch.msr_platform_info;
3559                 break;
3560         case MSR_MISC_FEATURES_ENABLES:
3561                 msr_info->data = vcpu->arch.msr_misc_features_enables;
3562                 break;
3563         case MSR_K7_HWCR:
3564                 msr_info->data = vcpu->arch.msr_hwcr;
3565                 break;
3566         default:
3567                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3568                         return kvm_pmu_get_msr(vcpu, msr_info);
3569                 return KVM_MSR_RET_INVALID;
3570         }
3571         return 0;
3572 }
3573 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
3574
3575 /*
3576  * Read or write a bunch of msrs. All parameters are kernel addresses.
3577  *
3578  * @return number of msrs set successfully.
3579  */
3580 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
3581                     struct kvm_msr_entry *entries,
3582                     int (*do_msr)(struct kvm_vcpu *vcpu,
3583                                   unsigned index, u64 *data))
3584 {
3585         int i;
3586
3587         for (i = 0; i < msrs->nmsrs; ++i)
3588                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
3589                         break;
3590
3591         return i;
3592 }
3593
3594 /*
3595  * Read or write a bunch of msrs. Parameters are user addresses.
3596  *
3597  * @return number of msrs set successfully.
3598  */
3599 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
3600                   int (*do_msr)(struct kvm_vcpu *vcpu,
3601                                 unsigned index, u64 *data),
3602                   int writeback)
3603 {
3604         struct kvm_msrs msrs;
3605         struct kvm_msr_entry *entries;
3606         int r, n;
3607         unsigned size;
3608
3609         r = -EFAULT;
3610         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
3611                 goto out;
3612
3613         r = -E2BIG;
3614         if (msrs.nmsrs >= MAX_IO_MSRS)
3615                 goto out;
3616
3617         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
3618         entries = memdup_user(user_msrs->entries, size);
3619         if (IS_ERR(entries)) {
3620                 r = PTR_ERR(entries);
3621                 goto out;
3622         }
3623
3624         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
3625         if (r < 0)
3626                 goto out_free;
3627
3628         r = -EFAULT;
3629         if (writeback && copy_to_user(user_msrs->entries, entries, size))
3630                 goto out_free;
3631
3632         r = n;
3633
3634 out_free:
3635         kfree(entries);
3636 out:
3637         return r;
3638 }
3639
3640 static inline bool kvm_can_mwait_in_guest(void)
3641 {
3642         return boot_cpu_has(X86_FEATURE_MWAIT) &&
3643                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
3644                 boot_cpu_has(X86_FEATURE_ARAT);
3645 }
3646
3647 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
3648 {
3649         int r = 0;
3650
3651         switch (ext) {
3652         case KVM_CAP_IRQCHIP:
3653         case KVM_CAP_HLT:
3654         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
3655         case KVM_CAP_SET_TSS_ADDR:
3656         case KVM_CAP_EXT_CPUID:
3657         case KVM_CAP_EXT_EMUL_CPUID:
3658         case KVM_CAP_CLOCKSOURCE:
3659         case KVM_CAP_PIT:
3660         case KVM_CAP_NOP_IO_DELAY:
3661         case KVM_CAP_MP_STATE:
3662         case KVM_CAP_SYNC_MMU:
3663         case KVM_CAP_USER_NMI:
3664         case KVM_CAP_REINJECT_CONTROL:
3665         case KVM_CAP_IRQ_INJECT_STATUS:
3666         case KVM_CAP_IOEVENTFD:
3667         case KVM_CAP_IOEVENTFD_NO_LENGTH:
3668         case KVM_CAP_PIT2:
3669         case KVM_CAP_PIT_STATE2:
3670         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
3671         case KVM_CAP_XEN_HVM:
3672         case KVM_CAP_VCPU_EVENTS:
3673         case KVM_CAP_HYPERV:
3674         case KVM_CAP_HYPERV_VAPIC:
3675         case KVM_CAP_HYPERV_SPIN:
3676         case KVM_CAP_HYPERV_SYNIC:
3677         case KVM_CAP_HYPERV_SYNIC2:
3678         case KVM_CAP_HYPERV_VP_INDEX:
3679         case KVM_CAP_HYPERV_EVENTFD:
3680         case KVM_CAP_HYPERV_TLBFLUSH:
3681         case KVM_CAP_HYPERV_SEND_IPI:
3682         case KVM_CAP_HYPERV_CPUID:
3683         case KVM_CAP_PCI_SEGMENT:
3684         case KVM_CAP_DEBUGREGS:
3685         case KVM_CAP_X86_ROBUST_SINGLESTEP:
3686         case KVM_CAP_XSAVE:
3687         case KVM_CAP_ASYNC_PF:
3688         case KVM_CAP_ASYNC_PF_INT:
3689         case KVM_CAP_GET_TSC_KHZ:
3690         case KVM_CAP_KVMCLOCK_CTRL:
3691         case KVM_CAP_READONLY_MEM:
3692         case KVM_CAP_HYPERV_TIME:
3693         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
3694         case KVM_CAP_TSC_DEADLINE_TIMER:
3695         case KVM_CAP_DISABLE_QUIRKS:
3696         case KVM_CAP_SET_BOOT_CPU_ID:
3697         case KVM_CAP_SPLIT_IRQCHIP:
3698         case KVM_CAP_IMMEDIATE_EXIT:
3699         case KVM_CAP_PMU_EVENT_FILTER:
3700         case KVM_CAP_GET_MSR_FEATURES:
3701         case KVM_CAP_MSR_PLATFORM_INFO:
3702         case KVM_CAP_EXCEPTION_PAYLOAD:
3703         case KVM_CAP_SET_GUEST_DEBUG:
3704         case KVM_CAP_LAST_CPU:
3705         case KVM_CAP_X86_USER_SPACE_MSR:
3706         case KVM_CAP_X86_MSR_FILTER:
3707         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
3708                 r = 1;
3709                 break;
3710         case KVM_CAP_SYNC_REGS:
3711                 r = KVM_SYNC_X86_VALID_FIELDS;
3712                 break;
3713         case KVM_CAP_ADJUST_CLOCK:
3714                 r = KVM_CLOCK_TSC_STABLE;
3715                 break;
3716         case KVM_CAP_X86_DISABLE_EXITS:
3717                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
3718                       KVM_X86_DISABLE_EXITS_CSTATE;
3719                 if(kvm_can_mwait_in_guest())
3720                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
3721                 break;
3722         case KVM_CAP_X86_SMM:
3723                 /* SMBASE is usually relocated above 1M on modern chipsets,
3724                  * and SMM handlers might indeed rely on 4G segment limits,
3725                  * so do not report SMM to be available if real mode is
3726                  * emulated via vm86 mode.  Still, do not go to great lengths
3727                  * to avoid userspace's usage of the feature, because it is a
3728                  * fringe case that is not enabled except via specific settings
3729                  * of the module parameters.
3730                  */
3731                 r = kvm_x86_ops.has_emulated_msr(MSR_IA32_SMBASE);
3732                 break;
3733         case KVM_CAP_VAPIC:
3734                 r = !kvm_x86_ops.cpu_has_accelerated_tpr();
3735                 break;
3736         case KVM_CAP_NR_VCPUS:
3737                 r = KVM_SOFT_MAX_VCPUS;
3738                 break;
3739         case KVM_CAP_MAX_VCPUS:
3740                 r = KVM_MAX_VCPUS;
3741                 break;
3742         case KVM_CAP_MAX_VCPU_ID:
3743                 r = KVM_MAX_VCPU_ID;
3744                 break;
3745         case KVM_CAP_PV_MMU:    /* obsolete */
3746                 r = 0;
3747                 break;
3748         case KVM_CAP_MCE:
3749                 r = KVM_MAX_MCE_BANKS;
3750                 break;
3751         case KVM_CAP_XCRS:
3752                 r = boot_cpu_has(X86_FEATURE_XSAVE);
3753                 break;
3754         case KVM_CAP_TSC_CONTROL:
3755                 r = kvm_has_tsc_control;
3756                 break;
3757         case KVM_CAP_X2APIC_API:
3758                 r = KVM_X2APIC_API_VALID_FLAGS;
3759                 break;
3760         case KVM_CAP_NESTED_STATE:
3761                 r = kvm_x86_ops.nested_ops->get_state ?
3762                         kvm_x86_ops.nested_ops->get_state(NULL, NULL, 0) : 0;
3763                 break;
3764         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
3765                 r = kvm_x86_ops.enable_direct_tlbflush != NULL;
3766                 break;
3767         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
3768                 r = kvm_x86_ops.nested_ops->enable_evmcs != NULL;
3769                 break;
3770         case KVM_CAP_SMALLER_MAXPHYADDR:
3771                 r = (int) allow_smaller_maxphyaddr;
3772                 break;
3773         case KVM_CAP_STEAL_TIME:
3774                 r = sched_info_on();
3775                 break;
3776         default:
3777                 break;
3778         }
3779         return r;
3780
3781 }
3782
3783 long kvm_arch_dev_ioctl(struct file *filp,
3784                         unsigned int ioctl, unsigned long arg)
3785 {
3786         void __user *argp = (void __user *)arg;
3787         long r;
3788
3789         switch (ioctl) {
3790         case KVM_GET_MSR_INDEX_LIST: {
3791                 struct kvm_msr_list __user *user_msr_list = argp;
3792                 struct kvm_msr_list msr_list;
3793                 unsigned n;
3794
3795                 r = -EFAULT;
3796                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3797                         goto out;
3798                 n = msr_list.nmsrs;
3799                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
3800                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3801                         goto out;
3802                 r = -E2BIG;
3803                 if (n < msr_list.nmsrs)
3804                         goto out;
3805                 r = -EFAULT;
3806                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
3807                                  num_msrs_to_save * sizeof(u32)))
3808                         goto out;
3809                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
3810                                  &emulated_msrs,
3811                                  num_emulated_msrs * sizeof(u32)))
3812                         goto out;
3813                 r = 0;
3814                 break;
3815         }
3816         case KVM_GET_SUPPORTED_CPUID:
3817         case KVM_GET_EMULATED_CPUID: {
3818                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3819                 struct kvm_cpuid2 cpuid;
3820
3821                 r = -EFAULT;
3822                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3823                         goto out;
3824
3825                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
3826                                             ioctl);
3827                 if (r)
3828                         goto out;
3829
3830                 r = -EFAULT;
3831                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3832                         goto out;
3833                 r = 0;
3834                 break;
3835         }
3836         case KVM_X86_GET_MCE_CAP_SUPPORTED:
3837                 r = -EFAULT;
3838                 if (copy_to_user(argp, &kvm_mce_cap_supported,
3839                                  sizeof(kvm_mce_cap_supported)))
3840                         goto out;
3841                 r = 0;
3842                 break;
3843         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
3844                 struct kvm_msr_list __user *user_msr_list = argp;
3845                 struct kvm_msr_list msr_list;
3846                 unsigned int n;
3847
3848                 r = -EFAULT;
3849                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3850                         goto out;
3851                 n = msr_list.nmsrs;
3852                 msr_list.nmsrs = num_msr_based_features;
3853                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3854                         goto out;
3855                 r = -E2BIG;
3856                 if (n < msr_list.nmsrs)
3857                         goto out;
3858                 r = -EFAULT;
3859                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
3860                                  num_msr_based_features * sizeof(u32)))
3861                         goto out;
3862                 r = 0;
3863                 break;
3864         }
3865         case KVM_GET_MSRS:
3866                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
3867                 break;
3868         default:
3869                 r = -EINVAL;
3870                 break;
3871         }
3872 out:
3873         return r;
3874 }
3875
3876 static void wbinvd_ipi(void *garbage)
3877 {
3878         wbinvd();
3879 }
3880
3881 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
3882 {
3883         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
3884 }
3885
3886 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
3887 {
3888         /* Address WBINVD may be executed by guest */
3889         if (need_emulate_wbinvd(vcpu)) {
3890                 if (kvm_x86_ops.has_wbinvd_exit())
3891                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
3892                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
3893                         smp_call_function_single(vcpu->cpu,
3894                                         wbinvd_ipi, NULL, 1);
3895         }
3896
3897         kvm_x86_ops.vcpu_load(vcpu, cpu);
3898
3899         /* Save host pkru register if supported */
3900         vcpu->arch.host_pkru = read_pkru();
3901
3902         /* Apply any externally detected TSC adjustments (due to suspend) */
3903         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
3904                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
3905                 vcpu->arch.tsc_offset_adjustment = 0;
3906                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3907         }
3908
3909         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
3910                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
3911                                 rdtsc() - vcpu->arch.last_host_tsc;
3912                 if (tsc_delta < 0)
3913                         mark_tsc_unstable("KVM discovered backwards TSC");
3914
3915                 if (kvm_check_tsc_unstable()) {
3916                         u64 offset = kvm_compute_tsc_offset(vcpu,
3917                                                 vcpu->arch.last_guest_tsc);
3918                         kvm_vcpu_write_tsc_offset(vcpu, offset);
3919                         vcpu->arch.tsc_catchup = 1;
3920                 }
3921
3922                 if (kvm_lapic_hv_timer_in_use(vcpu))
3923                         kvm_lapic_restart_hv_timer(vcpu);
3924
3925                 /*
3926                  * On a host with synchronized TSC, there is no need to update
3927                  * kvmclock on vcpu->cpu migration
3928                  */
3929                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
3930                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
3931                 if (vcpu->cpu != cpu)
3932                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
3933                 vcpu->cpu = cpu;
3934         }
3935
3936         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3937 }
3938
3939 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
3940 {
3941         struct kvm_host_map map;
3942         struct kvm_steal_time *st;
3943
3944         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3945                 return;
3946
3947         if (vcpu->arch.st.preempted)
3948                 return;
3949
3950         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT, &map,
3951                         &vcpu->arch.st.cache, true))
3952                 return;
3953
3954         st = map.hva +
3955                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
3956
3957         st->preempted = vcpu->arch.st.preempted = KVM_VCPU_PREEMPTED;
3958
3959         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, true);
3960 }
3961
3962 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
3963 {
3964         int idx;
3965
3966         if (vcpu->preempted)
3967                 vcpu->arch.preempted_in_kernel = !kvm_x86_ops.get_cpl(vcpu);
3968
3969         /*
3970          * Disable page faults because we're in atomic context here.
3971          * kvm_write_guest_offset_cached() would call might_fault()
3972          * that relies on pagefault_disable() to tell if there's a
3973          * bug. NOTE: the write to guest memory may not go through if
3974          * during postcopy live migration or if there's heavy guest
3975          * paging.
3976          */
3977         pagefault_disable();
3978         /*
3979          * kvm_memslots() will be called by
3980          * kvm_write_guest_offset_cached() so take the srcu lock.
3981          */
3982         idx = srcu_read_lock(&vcpu->kvm->srcu);
3983         kvm_steal_time_set_preempted(vcpu);
3984         srcu_read_unlock(&vcpu->kvm->srcu, idx);
3985         pagefault_enable();
3986         kvm_x86_ops.vcpu_put(vcpu);
3987         vcpu->arch.last_host_tsc = rdtsc();
3988         /*
3989          * If userspace has set any breakpoints or watchpoints, dr6 is restored
3990          * on every vmexit, but if not, we might have a stale dr6 from the
3991          * guest. do_debug expects dr6 to be cleared after it runs, do the same.
3992          */
3993         set_debugreg(0, 6);
3994 }
3995
3996 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
3997                                     struct kvm_lapic_state *s)
3998 {
3999         if (vcpu->arch.apicv_active)
4000                 kvm_x86_ops.sync_pir_to_irr(vcpu);
4001
4002         return kvm_apic_get_state(vcpu, s);
4003 }
4004
4005 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
4006                                     struct kvm_lapic_state *s)
4007 {
4008         int r;
4009
4010         r = kvm_apic_set_state(vcpu, s);
4011         if (r)
4012                 return r;
4013         update_cr8_intercept(vcpu);
4014
4015         return 0;
4016 }
4017
4018 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
4019 {
4020         return (!lapic_in_kernel(vcpu) ||
4021                 kvm_apic_accept_pic_intr(vcpu));
4022 }
4023
4024 /*
4025  * if userspace requested an interrupt window, check that the
4026  * interrupt window is open.
4027  *
4028  * No need to exit to userspace if we already have an interrupt queued.
4029  */
4030 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
4031 {
4032         return kvm_arch_interrupt_allowed(vcpu) &&
4033                 !kvm_cpu_has_interrupt(vcpu) &&
4034                 !kvm_event_needs_reinjection(vcpu) &&
4035                 kvm_cpu_accept_dm_intr(vcpu);
4036 }
4037
4038 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
4039                                     struct kvm_interrupt *irq)
4040 {
4041         if (irq->irq >= KVM_NR_INTERRUPTS)
4042                 return -EINVAL;
4043
4044         if (!irqchip_in_kernel(vcpu->kvm)) {
4045                 kvm_queue_interrupt(vcpu, irq->irq, false);
4046                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4047                 return 0;
4048         }
4049
4050         /*
4051          * With in-kernel LAPIC, we only use this to inject EXTINT, so
4052          * fail for in-kernel 8259.
4053          */
4054         if (pic_in_kernel(vcpu->kvm))
4055                 return -ENXIO;
4056
4057         if (vcpu->arch.pending_external_vector != -1)
4058                 return -EEXIST;
4059
4060         vcpu->arch.pending_external_vector = irq->irq;
4061         kvm_make_request(KVM_REQ_EVENT, vcpu);
4062         return 0;
4063 }
4064
4065 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
4066 {
4067         kvm_inject_nmi(vcpu);
4068
4069         return 0;
4070 }
4071
4072 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
4073 {
4074         kvm_make_request(KVM_REQ_SMI, vcpu);
4075
4076         return 0;
4077 }
4078
4079 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
4080                                            struct kvm_tpr_access_ctl *tac)
4081 {
4082         if (tac->flags)
4083                 return -EINVAL;
4084         vcpu->arch.tpr_access_reporting = !!tac->enabled;
4085         return 0;
4086 }
4087
4088 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
4089                                         u64 mcg_cap)
4090 {
4091         int r;
4092         unsigned bank_num = mcg_cap & 0xff, bank;
4093
4094         r = -EINVAL;
4095         if (!bank_num || bank_num > KVM_MAX_MCE_BANKS)
4096                 goto out;
4097         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
4098                 goto out;
4099         r = 0;
4100         vcpu->arch.mcg_cap = mcg_cap;
4101         /* Init IA32_MCG_CTL to all 1s */
4102         if (mcg_cap & MCG_CTL_P)
4103                 vcpu->arch.mcg_ctl = ~(u64)0;
4104         /* Init IA32_MCi_CTL to all 1s */
4105         for (bank = 0; bank < bank_num; bank++)
4106                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
4107
4108         kvm_x86_ops.setup_mce(vcpu);
4109 out:
4110         return r;
4111 }
4112
4113 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
4114                                       struct kvm_x86_mce *mce)
4115 {
4116         u64 mcg_cap = vcpu->arch.mcg_cap;
4117         unsigned bank_num = mcg_cap & 0xff;
4118         u64 *banks = vcpu->arch.mce_banks;
4119
4120         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
4121                 return -EINVAL;
4122         /*
4123          * if IA32_MCG_CTL is not all 1s, the uncorrected error
4124          * reporting is disabled
4125          */
4126         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
4127             vcpu->arch.mcg_ctl != ~(u64)0)
4128                 return 0;
4129         banks += 4 * mce->bank;
4130         /*
4131          * if IA32_MCi_CTL is not all 1s, the uncorrected error
4132          * reporting is disabled for the bank
4133          */
4134         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
4135                 return 0;
4136         if (mce->status & MCI_STATUS_UC) {
4137                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
4138                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
4139                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
4140                         return 0;
4141                 }
4142                 if (banks[1] & MCI_STATUS_VAL)
4143                         mce->status |= MCI_STATUS_OVER;
4144                 banks[2] = mce->addr;
4145                 banks[3] = mce->misc;
4146                 vcpu->arch.mcg_status = mce->mcg_status;
4147                 banks[1] = mce->status;
4148                 kvm_queue_exception(vcpu, MC_VECTOR);
4149         } else if (!(banks[1] & MCI_STATUS_VAL)
4150                    || !(banks[1] & MCI_STATUS_UC)) {
4151                 if (banks[1] & MCI_STATUS_VAL)
4152                         mce->status |= MCI_STATUS_OVER;
4153                 banks[2] = mce->addr;
4154                 banks[3] = mce->misc;
4155                 banks[1] = mce->status;
4156         } else
4157                 banks[1] |= MCI_STATUS_OVER;
4158         return 0;
4159 }
4160
4161 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
4162                                                struct kvm_vcpu_events *events)
4163 {
4164         process_nmi(vcpu);
4165
4166         /*
4167          * In guest mode, payload delivery should be deferred,
4168          * so that the L1 hypervisor can intercept #PF before
4169          * CR2 is modified (or intercept #DB before DR6 is
4170          * modified under nVMX). Unless the per-VM capability,
4171          * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4172          * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4173          * opportunistically defer the exception payload, deliver it if the
4174          * capability hasn't been requested before processing a
4175          * KVM_GET_VCPU_EVENTS.
4176          */
4177         if (!vcpu->kvm->arch.exception_payload_enabled &&
4178             vcpu->arch.exception.pending && vcpu->arch.exception.has_payload)
4179                 kvm_deliver_exception_payload(vcpu);
4180
4181         /*
4182          * The API doesn't provide the instruction length for software
4183          * exceptions, so don't report them. As long as the guest RIP
4184          * isn't advanced, we should expect to encounter the exception
4185          * again.
4186          */
4187         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
4188                 events->exception.injected = 0;
4189                 events->exception.pending = 0;
4190         } else {
4191                 events->exception.injected = vcpu->arch.exception.injected;
4192                 events->exception.pending = vcpu->arch.exception.pending;
4193                 /*
4194                  * For ABI compatibility, deliberately conflate
4195                  * pending and injected exceptions when
4196                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4197                  */
4198                 if (!vcpu->kvm->arch.exception_payload_enabled)
4199                         events->exception.injected |=
4200                                 vcpu->arch.exception.pending;
4201         }
4202         events->exception.nr = vcpu->arch.exception.nr;
4203         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
4204         events->exception.error_code = vcpu->arch.exception.error_code;
4205         events->exception_has_payload = vcpu->arch.exception.has_payload;
4206         events->exception_payload = vcpu->arch.exception.payload;
4207
4208         events->interrupt.injected =
4209                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
4210         events->interrupt.nr = vcpu->arch.interrupt.nr;
4211         events->interrupt.soft = 0;
4212         events->interrupt.shadow = kvm_x86_ops.get_interrupt_shadow(vcpu);
4213
4214         events->nmi.injected = vcpu->arch.nmi_injected;
4215         events->nmi.pending = vcpu->arch.nmi_pending != 0;
4216         events->nmi.masked = kvm_x86_ops.get_nmi_mask(vcpu);
4217         events->nmi.pad = 0;
4218
4219         events->sipi_vector = 0; /* never valid when reporting to user space */
4220
4221         events->smi.smm = is_smm(vcpu);
4222         events->smi.pending = vcpu->arch.smi_pending;
4223         events->smi.smm_inside_nmi =
4224                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
4225         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
4226
4227         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
4228                          | KVM_VCPUEVENT_VALID_SHADOW
4229                          | KVM_VCPUEVENT_VALID_SMM);
4230         if (vcpu->kvm->arch.exception_payload_enabled)
4231                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
4232
4233         memset(&events->reserved, 0, sizeof(events->reserved));
4234 }
4235
4236 static void kvm_smm_changed(struct kvm_vcpu *vcpu);
4237
4238 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
4239                                               struct kvm_vcpu_events *events)
4240 {
4241         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4242                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4243                               | KVM_VCPUEVENT_VALID_SHADOW
4244                               | KVM_VCPUEVENT_VALID_SMM
4245                               | KVM_VCPUEVENT_VALID_PAYLOAD))
4246                 return -EINVAL;
4247
4248         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
4249                 if (!vcpu->kvm->arch.exception_payload_enabled)
4250                         return -EINVAL;
4251                 if (events->exception.pending)
4252                         events->exception.injected = 0;
4253                 else
4254                         events->exception_has_payload = 0;
4255         } else {
4256                 events->exception.pending = 0;
4257                 events->exception_has_payload = 0;
4258         }
4259
4260         if ((events->exception.injected || events->exception.pending) &&
4261             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
4262                 return -EINVAL;
4263
4264         /* INITs are latched while in SMM */
4265         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
4266             (events->smi.smm || events->smi.pending) &&
4267             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
4268                 return -EINVAL;
4269
4270         process_nmi(vcpu);
4271         vcpu->arch.exception.injected = events->exception.injected;
4272         vcpu->arch.exception.pending = events->exception.pending;
4273         vcpu->arch.exception.nr = events->exception.nr;
4274         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
4275         vcpu->arch.exception.error_code = events->exception.error_code;
4276         vcpu->arch.exception.has_payload = events->exception_has_payload;
4277         vcpu->arch.exception.payload = events->exception_payload;
4278
4279         vcpu->arch.interrupt.injected = events->interrupt.injected;
4280         vcpu->arch.interrupt.nr = events->interrupt.nr;
4281         vcpu->arch.interrupt.soft = events->interrupt.soft;
4282         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
4283                 kvm_x86_ops.set_interrupt_shadow(vcpu,
4284                                                   events->interrupt.shadow);
4285
4286         vcpu->arch.nmi_injected = events->nmi.injected;
4287         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
4288                 vcpu->arch.nmi_pending = events->nmi.pending;
4289         kvm_x86_ops.set_nmi_mask(vcpu, events->nmi.masked);
4290
4291         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
4292             lapic_in_kernel(vcpu))
4293                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
4294
4295         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
4296                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
4297                         if (events->smi.smm)
4298                                 vcpu->arch.hflags |= HF_SMM_MASK;
4299                         else
4300                                 vcpu->arch.hflags &= ~HF_SMM_MASK;
4301                         kvm_smm_changed(vcpu);
4302                 }
4303
4304                 vcpu->arch.smi_pending = events->smi.pending;
4305
4306                 if (events->smi.smm) {
4307                         if (events->smi.smm_inside_nmi)
4308                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
4309                         else
4310                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
4311                 }
4312
4313                 if (lapic_in_kernel(vcpu)) {
4314                         if (events->smi.latched_init)
4315                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4316                         else
4317                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4318                 }
4319         }
4320
4321         kvm_make_request(KVM_REQ_EVENT, vcpu);
4322
4323         return 0;
4324 }
4325
4326 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
4327                                              struct kvm_debugregs *dbgregs)
4328 {
4329         unsigned long val;
4330
4331         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
4332         kvm_get_dr(vcpu, 6, &val);
4333         dbgregs->dr6 = val;
4334         dbgregs->dr7 = vcpu->arch.dr7;
4335         dbgregs->flags = 0;
4336         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
4337 }
4338
4339 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
4340                                             struct kvm_debugregs *dbgregs)
4341 {
4342         if (dbgregs->flags)
4343                 return -EINVAL;
4344
4345         if (dbgregs->dr6 & ~0xffffffffull)
4346                 return -EINVAL;
4347         if (dbgregs->dr7 & ~0xffffffffull)
4348                 return -EINVAL;
4349
4350         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
4351         kvm_update_dr0123(vcpu);
4352         vcpu->arch.dr6 = dbgregs->dr6;
4353         vcpu->arch.dr7 = dbgregs->dr7;
4354         kvm_update_dr7(vcpu);
4355
4356         return 0;
4357 }
4358
4359 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
4360
4361 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
4362 {
4363         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4364         u64 xstate_bv = xsave->header.xfeatures;
4365         u64 valid;
4366
4367         /*
4368          * Copy legacy XSAVE area, to avoid complications with CPUID
4369          * leaves 0 and 1 in the loop below.
4370          */
4371         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
4372
4373         /* Set XSTATE_BV */
4374         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
4375         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
4376
4377         /*
4378          * Copy each region from the possibly compacted offset to the
4379          * non-compacted offset.
4380          */
4381         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4382         while (valid) {
4383                 u64 xfeature_mask = valid & -valid;
4384                 int xfeature_nr = fls64(xfeature_mask) - 1;
4385                 void *src = get_xsave_addr(xsave, xfeature_nr);
4386
4387                 if (src) {
4388                         u32 size, offset, ecx, edx;
4389                         cpuid_count(XSTATE_CPUID, xfeature_nr,
4390                                     &size, &offset, &ecx, &edx);
4391                         if (xfeature_nr == XFEATURE_PKRU)
4392                                 memcpy(dest + offset, &vcpu->arch.pkru,
4393                                        sizeof(vcpu->arch.pkru));
4394                         else
4395                                 memcpy(dest + offset, src, size);
4396
4397                 }
4398
4399                 valid -= xfeature_mask;
4400         }
4401 }
4402
4403 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
4404 {
4405         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4406         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
4407         u64 valid;
4408
4409         /*
4410          * Copy legacy XSAVE area, to avoid complications with CPUID
4411          * leaves 0 and 1 in the loop below.
4412          */
4413         memcpy(xsave, src, XSAVE_HDR_OFFSET);
4414
4415         /* Set XSTATE_BV and possibly XCOMP_BV.  */
4416         xsave->header.xfeatures = xstate_bv;
4417         if (boot_cpu_has(X86_FEATURE_XSAVES))
4418                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
4419
4420         /*
4421          * Copy each region from the non-compacted offset to the
4422          * possibly compacted offset.
4423          */
4424         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4425         while (valid) {
4426                 u64 xfeature_mask = valid & -valid;
4427                 int xfeature_nr = fls64(xfeature_mask) - 1;
4428                 void *dest = get_xsave_addr(xsave, xfeature_nr);
4429
4430                 if (dest) {
4431                         u32 size, offset, ecx, edx;
4432                         cpuid_count(XSTATE_CPUID, xfeature_nr,
4433                                     &size, &offset, &ecx, &edx);
4434                         if (xfeature_nr == XFEATURE_PKRU)
4435                                 memcpy(&vcpu->arch.pkru, src + offset,
4436                                        sizeof(vcpu->arch.pkru));
4437                         else
4438                                 memcpy(dest, src + offset, size);
4439                 }
4440
4441                 valid -= xfeature_mask;
4442         }
4443 }
4444
4445 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
4446                                          struct kvm_xsave *guest_xsave)
4447 {
4448         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4449                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
4450                 fill_xsave((u8 *) guest_xsave->region, vcpu);
4451         } else {
4452                 memcpy(guest_xsave->region,
4453                         &vcpu->arch.guest_fpu->state.fxsave,
4454                         sizeof(struct fxregs_state));
4455                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
4456                         XFEATURE_MASK_FPSSE;
4457         }
4458 }
4459
4460 #define XSAVE_MXCSR_OFFSET 24
4461
4462 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
4463                                         struct kvm_xsave *guest_xsave)
4464 {
4465         u64 xstate_bv =
4466                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
4467         u32 mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
4468
4469         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4470                 /*
4471                  * Here we allow setting states that are not present in
4472                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
4473                  * with old userspace.
4474                  */
4475                 if (xstate_bv & ~supported_xcr0 || mxcsr & ~mxcsr_feature_mask)
4476                         return -EINVAL;
4477                 load_xsave(vcpu, (u8 *)guest_xsave->region);
4478         } else {
4479                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
4480                         mxcsr & ~mxcsr_feature_mask)
4481                         return -EINVAL;
4482                 memcpy(&vcpu->arch.guest_fpu->state.fxsave,
4483                         guest_xsave->region, sizeof(struct fxregs_state));
4484         }
4485         return 0;
4486 }
4487
4488 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
4489                                         struct kvm_xcrs *guest_xcrs)
4490 {
4491         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
4492                 guest_xcrs->nr_xcrs = 0;
4493                 return;
4494         }
4495
4496         guest_xcrs->nr_xcrs = 1;
4497         guest_xcrs->flags = 0;
4498         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
4499         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
4500 }
4501
4502 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
4503                                        struct kvm_xcrs *guest_xcrs)
4504 {
4505         int i, r = 0;
4506
4507         if (!boot_cpu_has(X86_FEATURE_XSAVE))
4508                 return -EINVAL;
4509
4510         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
4511                 return -EINVAL;
4512
4513         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
4514                 /* Only support XCR0 currently */
4515                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
4516                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
4517                                 guest_xcrs->xcrs[i].value);
4518                         break;
4519                 }
4520         if (r)
4521                 r = -EINVAL;
4522         return r;
4523 }
4524
4525 /*
4526  * kvm_set_guest_paused() indicates to the guest kernel that it has been
4527  * stopped by the hypervisor.  This function will be called from the host only.
4528  * EINVAL is returned when the host attempts to set the flag for a guest that
4529  * does not support pv clocks.
4530  */
4531 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
4532 {
4533         if (!vcpu->arch.pv_time_enabled)
4534                 return -EINVAL;
4535         vcpu->arch.pvclock_set_guest_stopped_request = true;
4536         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4537         return 0;
4538 }
4539
4540 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
4541                                      struct kvm_enable_cap *cap)
4542 {
4543         int r;
4544         uint16_t vmcs_version;
4545         void __user *user_ptr;
4546
4547         if (cap->flags)
4548                 return -EINVAL;
4549
4550         switch (cap->cap) {
4551         case KVM_CAP_HYPERV_SYNIC2:
4552                 if (cap->args[0])
4553                         return -EINVAL;
4554                 fallthrough;
4555
4556         case KVM_CAP_HYPERV_SYNIC:
4557                 if (!irqchip_in_kernel(vcpu->kvm))
4558                         return -EINVAL;
4559                 return kvm_hv_activate_synic(vcpu, cap->cap ==
4560                                              KVM_CAP_HYPERV_SYNIC2);
4561         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4562                 if (!kvm_x86_ops.nested_ops->enable_evmcs)
4563                         return -ENOTTY;
4564                 r = kvm_x86_ops.nested_ops->enable_evmcs(vcpu, &vmcs_version);
4565                 if (!r) {
4566                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
4567                         if (copy_to_user(user_ptr, &vmcs_version,
4568                                          sizeof(vmcs_version)))
4569                                 r = -EFAULT;
4570                 }
4571                 return r;
4572         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4573                 if (!kvm_x86_ops.enable_direct_tlbflush)
4574                         return -ENOTTY;
4575
4576                 return kvm_x86_ops.enable_direct_tlbflush(vcpu);
4577
4578         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4579                 vcpu->arch.pv_cpuid.enforce = cap->args[0];
4580
4581                 return 0;
4582
4583         default:
4584                 return -EINVAL;
4585         }
4586 }
4587
4588 long kvm_arch_vcpu_ioctl(struct file *filp,
4589                          unsigned int ioctl, unsigned long arg)
4590 {
4591         struct kvm_vcpu *vcpu = filp->private_data;
4592         void __user *argp = (void __user *)arg;
4593         int r;
4594         union {
4595                 struct kvm_lapic_state *lapic;
4596                 struct kvm_xsave *xsave;
4597                 struct kvm_xcrs *xcrs;
4598                 void *buffer;
4599         } u;
4600
4601         vcpu_load(vcpu);
4602
4603         u.buffer = NULL;
4604         switch (ioctl) {
4605         case KVM_GET_LAPIC: {
4606                 r = -EINVAL;
4607                 if (!lapic_in_kernel(vcpu))
4608                         goto out;
4609                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
4610                                 GFP_KERNEL_ACCOUNT);
4611
4612                 r = -ENOMEM;
4613                 if (!u.lapic)
4614                         goto out;
4615                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
4616                 if (r)
4617                         goto out;
4618                 r = -EFAULT;
4619                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
4620                         goto out;
4621                 r = 0;
4622                 break;
4623         }
4624         case KVM_SET_LAPIC: {
4625                 r = -EINVAL;
4626                 if (!lapic_in_kernel(vcpu))
4627                         goto out;
4628                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
4629                 if (IS_ERR(u.lapic)) {
4630                         r = PTR_ERR(u.lapic);
4631                         goto out_nofree;
4632                 }
4633
4634                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
4635                 break;
4636         }
4637         case KVM_INTERRUPT: {
4638                 struct kvm_interrupt irq;
4639
4640                 r = -EFAULT;
4641                 if (copy_from_user(&irq, argp, sizeof(irq)))
4642                         goto out;
4643                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
4644                 break;
4645         }
4646         case KVM_NMI: {
4647                 r = kvm_vcpu_ioctl_nmi(vcpu);
4648                 break;
4649         }
4650         case KVM_SMI: {
4651                 r = kvm_vcpu_ioctl_smi(vcpu);
4652                 break;
4653         }
4654         case KVM_SET_CPUID: {
4655                 struct kvm_cpuid __user *cpuid_arg = argp;
4656                 struct kvm_cpuid cpuid;
4657
4658                 r = -EFAULT;
4659                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4660                         goto out;
4661                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4662                 break;
4663         }
4664         case KVM_SET_CPUID2: {
4665                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4666                 struct kvm_cpuid2 cpuid;
4667
4668                 r = -EFAULT;
4669                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4670                         goto out;
4671                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
4672                                               cpuid_arg->entries);
4673                 break;
4674         }
4675         case KVM_GET_CPUID2: {
4676                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4677                 struct kvm_cpuid2 cpuid;
4678
4679                 r = -EFAULT;
4680                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4681                         goto out;
4682                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
4683                                               cpuid_arg->entries);
4684                 if (r)
4685                         goto out;
4686                 r = -EFAULT;
4687                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4688                         goto out;
4689                 r = 0;
4690                 break;
4691         }
4692         case KVM_GET_MSRS: {
4693                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4694                 r = msr_io(vcpu, argp, do_get_msr, 1);
4695                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4696                 break;
4697         }
4698         case KVM_SET_MSRS: {
4699                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4700                 r = msr_io(vcpu, argp, do_set_msr, 0);
4701                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4702                 break;
4703         }
4704         case KVM_TPR_ACCESS_REPORTING: {
4705                 struct kvm_tpr_access_ctl tac;
4706
4707                 r = -EFAULT;
4708                 if (copy_from_user(&tac, argp, sizeof(tac)))
4709                         goto out;
4710                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
4711                 if (r)
4712                         goto out;
4713                 r = -EFAULT;
4714                 if (copy_to_user(argp, &tac, sizeof(tac)))
4715                         goto out;
4716                 r = 0;
4717                 break;
4718         };
4719         case KVM_SET_VAPIC_ADDR: {
4720                 struct kvm_vapic_addr va;
4721                 int idx;
4722
4723                 r = -EINVAL;
4724                 if (!lapic_in_kernel(vcpu))
4725                         goto out;
4726                 r = -EFAULT;
4727                 if (copy_from_user(&va, argp, sizeof(va)))
4728                         goto out;
4729                 idx = srcu_read_lock(&vcpu->kvm->srcu);
4730                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
4731                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4732                 break;
4733         }
4734         case KVM_X86_SETUP_MCE: {
4735                 u64 mcg_cap;
4736
4737                 r = -EFAULT;
4738                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
4739                         goto out;
4740                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
4741                 break;
4742         }
4743         case KVM_X86_SET_MCE: {
4744                 struct kvm_x86_mce mce;
4745
4746                 r = -EFAULT;
4747                 if (copy_from_user(&mce, argp, sizeof(mce)))
4748                         goto out;
4749                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
4750                 break;
4751         }
4752         case KVM_GET_VCPU_EVENTS: {
4753                 struct kvm_vcpu_events events;
4754
4755                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
4756
4757                 r = -EFAULT;
4758                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
4759                         break;
4760                 r = 0;
4761                 break;
4762         }
4763         case KVM_SET_VCPU_EVENTS: {
4764                 struct kvm_vcpu_events events;
4765
4766                 r = -EFAULT;
4767                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
4768                         break;
4769
4770                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
4771                 break;
4772         }
4773         case KVM_GET_DEBUGREGS: {
4774                 struct kvm_debugregs dbgregs;
4775
4776                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
4777
4778                 r = -EFAULT;
4779                 if (copy_to_user(argp, &dbgregs,
4780                                  sizeof(struct kvm_debugregs)))
4781                         break;
4782                 r = 0;
4783                 break;
4784         }
4785         case KVM_SET_DEBUGREGS: {
4786                 struct kvm_debugregs dbgregs;
4787
4788                 r = -EFAULT;
4789                 if (copy_from_user(&dbgregs, argp,
4790                                    sizeof(struct kvm_debugregs)))
4791                         break;
4792
4793                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
4794                 break;
4795         }
4796         case KVM_GET_XSAVE: {
4797                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
4798                 r = -ENOMEM;
4799                 if (!u.xsave)
4800                         break;
4801
4802                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
4803
4804                 r = -EFAULT;
4805                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
4806                         break;
4807                 r = 0;
4808                 break;
4809         }
4810         case KVM_SET_XSAVE: {
4811                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
4812                 if (IS_ERR(u.xsave)) {
4813                         r = PTR_ERR(u.xsave);
4814                         goto out_nofree;
4815                 }
4816
4817                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
4818                 break;
4819         }
4820         case KVM_GET_XCRS: {
4821                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
4822                 r = -ENOMEM;
4823                 if (!u.xcrs)
4824                         break;
4825
4826                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
4827
4828                 r = -EFAULT;
4829                 if (copy_to_user(argp, u.xcrs,
4830                                  sizeof(struct kvm_xcrs)))
4831                         break;
4832                 r = 0;
4833                 break;
4834         }
4835         case KVM_SET_XCRS: {
4836                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
4837                 if (IS_ERR(u.xcrs)) {
4838                         r = PTR_ERR(u.xcrs);
4839                         goto out_nofree;
4840                 }
4841
4842                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
4843                 break;
4844         }
4845         case KVM_SET_TSC_KHZ: {
4846                 u32 user_tsc_khz;
4847
4848                 r = -EINVAL;
4849                 user_tsc_khz = (u32)arg;
4850
4851                 if (kvm_has_tsc_control &&
4852                     user_tsc_khz >= kvm_max_guest_tsc_khz)
4853                         goto out;
4854
4855                 if (user_tsc_khz == 0)
4856                         user_tsc_khz = tsc_khz;
4857
4858                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
4859                         r = 0;
4860
4861                 goto out;
4862         }
4863         case KVM_GET_TSC_KHZ: {
4864                 r = vcpu->arch.virtual_tsc_khz;
4865                 goto out;
4866         }
4867         case KVM_KVMCLOCK_CTRL: {
4868                 r = kvm_set_guest_paused(vcpu);
4869                 goto out;
4870         }
4871         case KVM_ENABLE_CAP: {
4872                 struct kvm_enable_cap cap;
4873
4874                 r = -EFAULT;
4875                 if (copy_from_user(&cap, argp, sizeof(cap)))
4876                         goto out;
4877                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
4878                 break;
4879         }
4880         case KVM_GET_NESTED_STATE: {
4881                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4882                 u32 user_data_size;
4883
4884                 r = -EINVAL;
4885                 if (!kvm_x86_ops.nested_ops->get_state)
4886                         break;
4887
4888                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
4889                 r = -EFAULT;
4890                 if (get_user(user_data_size, &user_kvm_nested_state->size))
4891                         break;
4892
4893                 r = kvm_x86_ops.nested_ops->get_state(vcpu, user_kvm_nested_state,
4894                                                      user_data_size);
4895                 if (r < 0)
4896                         break;
4897
4898                 if (r > user_data_size) {
4899                         if (put_user(r, &user_kvm_nested_state->size))
4900                                 r = -EFAULT;
4901                         else
4902                                 r = -E2BIG;
4903                         break;
4904                 }
4905
4906                 r = 0;
4907                 break;
4908         }
4909         case KVM_SET_NESTED_STATE: {
4910                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4911                 struct kvm_nested_state kvm_state;
4912                 int idx;
4913
4914                 r = -EINVAL;
4915                 if (!kvm_x86_ops.nested_ops->set_state)
4916                         break;
4917
4918                 r = -EFAULT;
4919                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
4920                         break;
4921
4922                 r = -EINVAL;
4923                 if (kvm_state.size < sizeof(kvm_state))
4924                         break;
4925
4926                 if (kvm_state.flags &
4927                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
4928                       | KVM_STATE_NESTED_EVMCS | KVM_STATE_NESTED_MTF_PENDING
4929                       | KVM_STATE_NESTED_GIF_SET))
4930                         break;
4931
4932                 /* nested_run_pending implies guest_mode.  */
4933                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
4934                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
4935                         break;
4936
4937                 idx = srcu_read_lock(&vcpu->kvm->srcu);
4938                 r = kvm_x86_ops.nested_ops->set_state(vcpu, user_kvm_nested_state, &kvm_state);
4939                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4940                 break;
4941         }
4942         case KVM_GET_SUPPORTED_HV_CPUID: {
4943                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4944                 struct kvm_cpuid2 cpuid;
4945
4946                 r = -EFAULT;
4947                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4948                         goto out;
4949
4950                 r = kvm_vcpu_ioctl_get_hv_cpuid(vcpu, &cpuid,
4951                                                 cpuid_arg->entries);
4952                 if (r)
4953                         goto out;
4954
4955                 r = -EFAULT;
4956                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4957                         goto out;
4958                 r = 0;
4959                 break;
4960         }
4961         default:
4962                 r = -EINVAL;
4963         }
4964 out:
4965         kfree(u.buffer);
4966 out_nofree:
4967         vcpu_put(vcpu);
4968         return r;
4969 }
4970
4971 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
4972 {
4973         return VM_FAULT_SIGBUS;
4974 }
4975
4976 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
4977 {
4978         int ret;
4979
4980         if (addr > (unsigned int)(-3 * PAGE_SIZE))
4981                 return -EINVAL;
4982         ret = kvm_x86_ops.set_tss_addr(kvm, addr);
4983         return ret;
4984 }
4985
4986 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
4987                                               u64 ident_addr)
4988 {
4989         return kvm_x86_ops.set_identity_map_addr(kvm, ident_addr);
4990 }
4991
4992 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
4993                                          unsigned long kvm_nr_mmu_pages)
4994 {
4995         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
4996                 return -EINVAL;
4997
4998         mutex_lock(&kvm->slots_lock);
4999
5000         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
5001         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
5002
5003         mutex_unlock(&kvm->slots_lock);
5004         return 0;
5005 }
5006
5007 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
5008 {
5009         return kvm->arch.n_max_mmu_pages;
5010 }
5011
5012 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5013 {
5014         struct kvm_pic *pic = kvm->arch.vpic;
5015         int r;
5016
5017         r = 0;
5018         switch (chip->chip_id) {
5019         case KVM_IRQCHIP_PIC_MASTER:
5020                 memcpy(&chip->chip.pic, &pic->pics[0],
5021                         sizeof(struct kvm_pic_state));
5022                 break;
5023         case KVM_IRQCHIP_PIC_SLAVE:
5024                 memcpy(&chip->chip.pic, &pic->pics[1],
5025                         sizeof(struct kvm_pic_state));
5026                 break;
5027         case KVM_IRQCHIP_IOAPIC:
5028                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
5029                 break;
5030         default:
5031                 r = -EINVAL;
5032                 break;
5033         }
5034         return r;
5035 }
5036
5037 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5038 {
5039         struct kvm_pic *pic = kvm->arch.vpic;
5040         int r;
5041
5042         r = 0;
5043         switch (chip->chip_id) {
5044         case KVM_IRQCHIP_PIC_MASTER:
5045                 spin_lock(&pic->lock);
5046                 memcpy(&pic->pics[0], &chip->chip.pic,
5047                         sizeof(struct kvm_pic_state));
5048                 spin_unlock(&pic->lock);
5049                 break;
5050         case KVM_IRQCHIP_PIC_SLAVE:
5051                 spin_lock(&pic->lock);
5052                 memcpy(&pic->pics[1], &chip->chip.pic,
5053                         sizeof(struct kvm_pic_state));
5054                 spin_unlock(&pic->lock);
5055                 break;
5056         case KVM_IRQCHIP_IOAPIC:
5057                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
5058                 break;
5059         default:
5060                 r = -EINVAL;
5061                 break;
5062         }
5063         kvm_pic_update_irq(pic);
5064         return r;
5065 }
5066
5067 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5068 {
5069         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
5070
5071         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
5072
5073         mutex_lock(&kps->lock);
5074         memcpy(ps, &kps->channels, sizeof(*ps));
5075         mutex_unlock(&kps->lock);
5076         return 0;
5077 }
5078
5079 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5080 {
5081         int i;
5082         struct kvm_pit *pit = kvm->arch.vpit;
5083
5084         mutex_lock(&pit->pit_state.lock);
5085         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
5086         for (i = 0; i < 3; i++)
5087                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
5088         mutex_unlock(&pit->pit_state.lock);
5089         return 0;
5090 }
5091
5092 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5093 {
5094         mutex_lock(&kvm->arch.vpit->pit_state.lock);
5095         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
5096                 sizeof(ps->channels));
5097         ps->flags = kvm->arch.vpit->pit_state.flags;
5098         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
5099         memset(&ps->reserved, 0, sizeof(ps->reserved));
5100         return 0;
5101 }
5102
5103 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5104 {
5105         int start = 0;
5106         int i;
5107         u32 prev_legacy, cur_legacy;
5108         struct kvm_pit *pit = kvm->arch.vpit;
5109
5110         mutex_lock(&pit->pit_state.lock);
5111         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
5112         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
5113         if (!prev_legacy && cur_legacy)
5114                 start = 1;
5115         memcpy(&pit->pit_state.channels, &ps->channels,
5116                sizeof(pit->pit_state.channels));
5117         pit->pit_state.flags = ps->flags;
5118         for (i = 0; i < 3; i++)
5119                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
5120                                    start && i == 0);
5121         mutex_unlock(&pit->pit_state.lock);
5122         return 0;
5123 }
5124
5125 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
5126                                  struct kvm_reinject_control *control)
5127 {
5128         struct kvm_pit *pit = kvm->arch.vpit;
5129
5130         /* pit->pit_state.lock was overloaded to prevent userspace from getting
5131          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5132          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
5133          */
5134         mutex_lock(&pit->pit_state.lock);
5135         kvm_pit_set_reinject(pit, control->pit_reinject);
5136         mutex_unlock(&pit->pit_state.lock);
5137
5138         return 0;
5139 }
5140
5141 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
5142 {
5143         /*
5144          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
5145          */
5146         if (kvm_x86_ops.flush_log_dirty)
5147                 kvm_x86_ops.flush_log_dirty(kvm);
5148 }
5149
5150 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
5151                         bool line_status)
5152 {
5153         if (!irqchip_in_kernel(kvm))
5154                 return -ENXIO;
5155
5156         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
5157                                         irq_event->irq, irq_event->level,
5158                                         line_status);
5159         return 0;
5160 }
5161
5162 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
5163                             struct kvm_enable_cap *cap)
5164 {
5165         int r;
5166
5167         if (cap->flags)
5168                 return -EINVAL;
5169
5170         switch (cap->cap) {
5171         case KVM_CAP_DISABLE_QUIRKS:
5172                 kvm->arch.disabled_quirks = cap->args[0];
5173                 r = 0;
5174                 break;
5175         case KVM_CAP_SPLIT_IRQCHIP: {
5176                 mutex_lock(&kvm->lock);
5177                 r = -EINVAL;
5178                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
5179                         goto split_irqchip_unlock;
5180                 r = -EEXIST;
5181                 if (irqchip_in_kernel(kvm))
5182                         goto split_irqchip_unlock;
5183                 if (kvm->created_vcpus)
5184                         goto split_irqchip_unlock;
5185                 r = kvm_setup_empty_irq_routing(kvm);
5186                 if (r)
5187                         goto split_irqchip_unlock;
5188                 /* Pairs with irqchip_in_kernel. */
5189                 smp_wmb();
5190                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
5191                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
5192                 r = 0;
5193 split_irqchip_unlock:
5194                 mutex_unlock(&kvm->lock);
5195                 break;
5196         }
5197         case KVM_CAP_X2APIC_API:
5198                 r = -EINVAL;
5199                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
5200                         break;
5201
5202                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
5203                         kvm->arch.x2apic_format = true;
5204                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
5205                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
5206
5207                 r = 0;
5208                 break;
5209         case KVM_CAP_X86_DISABLE_EXITS:
5210                 r = -EINVAL;
5211                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
5212                         break;
5213
5214                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
5215                         kvm_can_mwait_in_guest())
5216                         kvm->arch.mwait_in_guest = true;
5217                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
5218                         kvm->arch.hlt_in_guest = true;
5219                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
5220                         kvm->arch.pause_in_guest = true;
5221                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
5222                         kvm->arch.cstate_in_guest = true;
5223                 r = 0;
5224                 break;
5225         case KVM_CAP_MSR_PLATFORM_INFO:
5226                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
5227                 r = 0;
5228                 break;
5229         case KVM_CAP_EXCEPTION_PAYLOAD:
5230                 kvm->arch.exception_payload_enabled = cap->args[0];
5231                 r = 0;
5232                 break;
5233         case KVM_CAP_X86_USER_SPACE_MSR:
5234                 kvm->arch.user_space_msr_mask = cap->args[0];
5235                 r = 0;
5236                 break;
5237         default:
5238                 r = -EINVAL;
5239                 break;
5240         }
5241         return r;
5242 }
5243
5244 static void kvm_clear_msr_filter(struct kvm *kvm)
5245 {
5246         u32 i;
5247         u32 count = kvm->arch.msr_filter.count;
5248         struct msr_bitmap_range ranges[16];
5249
5250         mutex_lock(&kvm->lock);
5251         kvm->arch.msr_filter.count = 0;
5252         memcpy(ranges, kvm->arch.msr_filter.ranges, count * sizeof(ranges[0]));
5253         mutex_unlock(&kvm->lock);
5254         synchronize_srcu(&kvm->srcu);
5255
5256         for (i = 0; i < count; i++)
5257                 kfree(ranges[i].bitmap);
5258 }
5259
5260 static int kvm_add_msr_filter(struct kvm *kvm, struct kvm_msr_filter_range *user_range)
5261 {
5262         struct msr_bitmap_range *ranges = kvm->arch.msr_filter.ranges;
5263         struct msr_bitmap_range range;
5264         unsigned long *bitmap = NULL;
5265         size_t bitmap_size;
5266         int r;
5267
5268         if (!user_range->nmsrs)
5269                 return 0;
5270
5271         bitmap_size = BITS_TO_LONGS(user_range->nmsrs) * sizeof(long);
5272         if (!bitmap_size || bitmap_size > KVM_MSR_FILTER_MAX_BITMAP_SIZE)
5273                 return -EINVAL;
5274
5275         bitmap = memdup_user((__user u8*)user_range->bitmap, bitmap_size);
5276         if (IS_ERR(bitmap))
5277                 return PTR_ERR(bitmap);
5278
5279         range = (struct msr_bitmap_range) {
5280                 .flags = user_range->flags,
5281                 .base = user_range->base,
5282                 .nmsrs = user_range->nmsrs,
5283                 .bitmap = bitmap,
5284         };
5285
5286         if (range.flags & ~(KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE)) {
5287                 r = -EINVAL;
5288                 goto err;
5289         }
5290
5291         if (!range.flags) {
5292                 r = -EINVAL;
5293                 goto err;
5294         }
5295
5296         /* Everything ok, add this range identifier to our global pool */
5297         ranges[kvm->arch.msr_filter.count] = range;
5298         /* Make sure we filled the array before we tell anyone to walk it */
5299         smp_wmb();
5300         kvm->arch.msr_filter.count++;
5301
5302         return 0;
5303 err:
5304         kfree(bitmap);
5305         return r;
5306 }
5307
5308 static int kvm_vm_ioctl_set_msr_filter(struct kvm *kvm, void __user *argp)
5309 {
5310         struct kvm_msr_filter __user *user_msr_filter = argp;
5311         struct kvm_msr_filter filter;
5312         bool default_allow;
5313         int r = 0;
5314         bool empty = true;
5315         u32 i;
5316
5317         if (copy_from_user(&filter, user_msr_filter, sizeof(filter)))
5318                 return -EFAULT;
5319
5320         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++)
5321                 empty &= !filter.ranges[i].nmsrs;
5322
5323         default_allow = !(filter.flags & KVM_MSR_FILTER_DEFAULT_DENY);
5324         if (empty && !default_allow)
5325                 return -EINVAL;
5326
5327         kvm_clear_msr_filter(kvm);
5328
5329         kvm->arch.msr_filter.default_allow = default_allow;
5330
5331         /*
5332          * Protect from concurrent calls to this function that could trigger
5333          * a TOCTOU violation on kvm->arch.msr_filter.count.
5334          */
5335         mutex_lock(&kvm->lock);
5336         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++) {
5337                 r = kvm_add_msr_filter(kvm, &filter.ranges[i]);
5338                 if (r)
5339                         break;
5340         }
5341
5342         kvm_make_all_cpus_request(kvm, KVM_REQ_MSR_FILTER_CHANGED);
5343         mutex_unlock(&kvm->lock);
5344
5345         return r;
5346 }
5347
5348 long kvm_arch_vm_ioctl(struct file *filp,
5349                        unsigned int ioctl, unsigned long arg)
5350 {
5351         struct kvm *kvm = filp->private_data;
5352         void __user *argp = (void __user *)arg;
5353         int r = -ENOTTY;
5354         /*
5355          * This union makes it completely explicit to gcc-3.x
5356          * that these two variables' stack usage should be
5357          * combined, not added together.
5358          */
5359         union {
5360                 struct kvm_pit_state ps;
5361                 struct kvm_pit_state2 ps2;
5362                 struct kvm_pit_config pit_config;
5363         } u;
5364
5365         switch (ioctl) {
5366         case KVM_SET_TSS_ADDR:
5367                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
5368                 break;
5369         case KVM_SET_IDENTITY_MAP_ADDR: {
5370                 u64 ident_addr;
5371
5372                 mutex_lock(&kvm->lock);
5373                 r = -EINVAL;
5374                 if (kvm->created_vcpus)
5375                         goto set_identity_unlock;
5376                 r = -EFAULT;
5377                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
5378                         goto set_identity_unlock;
5379                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
5380 set_identity_unlock:
5381                 mutex_unlock(&kvm->lock);
5382                 break;
5383         }
5384         case KVM_SET_NR_MMU_PAGES:
5385                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
5386                 break;
5387         case KVM_GET_NR_MMU_PAGES:
5388                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
5389                 break;
5390         case KVM_CREATE_IRQCHIP: {
5391                 mutex_lock(&kvm->lock);
5392
5393                 r = -EEXIST;
5394                 if (irqchip_in_kernel(kvm))
5395                         goto create_irqchip_unlock;
5396
5397                 r = -EINVAL;
5398                 if (kvm->created_vcpus)
5399                         goto create_irqchip_unlock;
5400
5401                 r = kvm_pic_init(kvm);
5402                 if (r)
5403                         goto create_irqchip_unlock;
5404
5405                 r = kvm_ioapic_init(kvm);
5406                 if (r) {
5407                         kvm_pic_destroy(kvm);
5408                         goto create_irqchip_unlock;
5409                 }
5410
5411                 r = kvm_setup_default_irq_routing(kvm);
5412                 if (r) {
5413                         kvm_ioapic_destroy(kvm);
5414                         kvm_pic_destroy(kvm);
5415                         goto create_irqchip_unlock;
5416                 }
5417                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
5418                 smp_wmb();
5419                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
5420         create_irqchip_unlock:
5421                 mutex_unlock(&kvm->lock);
5422                 break;
5423         }
5424         case KVM_CREATE_PIT:
5425                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
5426                 goto create_pit;
5427         case KVM_CREATE_PIT2:
5428                 r = -EFAULT;
5429                 if (copy_from_user(&u.pit_config, argp,
5430                                    sizeof(struct kvm_pit_config)))
5431                         goto out;
5432         create_pit:
5433                 mutex_lock(&kvm->lock);
5434                 r = -EEXIST;
5435                 if (kvm->arch.vpit)
5436                         goto create_pit_unlock;
5437                 r = -ENOMEM;
5438                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
5439                 if (kvm->arch.vpit)
5440                         r = 0;
5441         create_pit_unlock:
5442                 mutex_unlock(&kvm->lock);
5443                 break;
5444         case KVM_GET_IRQCHIP: {
5445                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5446                 struct kvm_irqchip *chip;
5447
5448                 chip = memdup_user(argp, sizeof(*chip));
5449                 if (IS_ERR(chip)) {
5450                         r = PTR_ERR(chip);
5451                         goto out;
5452                 }
5453
5454                 r = -ENXIO;
5455                 if (!irqchip_kernel(kvm))
5456                         goto get_irqchip_out;
5457                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
5458                 if (r)
5459                         goto get_irqchip_out;
5460                 r = -EFAULT;
5461                 if (copy_to_user(argp, chip, sizeof(*chip)))
5462                         goto get_irqchip_out;
5463                 r = 0;
5464         get_irqchip_out:
5465                 kfree(chip);
5466                 break;
5467         }
5468         case KVM_SET_IRQCHIP: {
5469                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5470                 struct kvm_irqchip *chip;
5471
5472                 chip = memdup_user(argp, sizeof(*chip));
5473                 if (IS_ERR(chip)) {
5474                         r = PTR_ERR(chip);
5475                         goto out;
5476                 }
5477
5478                 r = -ENXIO;
5479                 if (!irqchip_kernel(kvm))
5480                         goto set_irqchip_out;
5481                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
5482         set_irqchip_out:
5483                 kfree(chip);
5484                 break;
5485         }
5486         case KVM_GET_PIT: {
5487                 r = -EFAULT;
5488                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
5489                         goto out;
5490                 r = -ENXIO;
5491                 if (!kvm->arch.vpit)
5492                         goto out;
5493                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
5494                 if (r)
5495                         goto out;
5496                 r = -EFAULT;
5497                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
5498                         goto out;
5499                 r = 0;
5500                 break;
5501         }
5502         case KVM_SET_PIT: {
5503                 r = -EFAULT;
5504                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
5505                         goto out;
5506                 mutex_lock(&kvm->lock);
5507                 r = -ENXIO;
5508                 if (!kvm->arch.vpit)
5509                         goto set_pit_out;
5510                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
5511 set_pit_out:
5512                 mutex_unlock(&kvm->lock);
5513                 break;
5514         }
5515         case KVM_GET_PIT2: {
5516                 r = -ENXIO;
5517                 if (!kvm->arch.vpit)
5518                         goto out;
5519                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
5520                 if (r)
5521                         goto out;
5522                 r = -EFAULT;
5523                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
5524                         goto out;
5525                 r = 0;
5526                 break;
5527         }
5528         case KVM_SET_PIT2: {
5529                 r = -EFAULT;
5530                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
5531                         goto out;
5532                 mutex_lock(&kvm->lock);
5533                 r = -ENXIO;
5534                 if (!kvm->arch.vpit)
5535                         goto set_pit2_out;
5536                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
5537 set_pit2_out:
5538                 mutex_unlock(&kvm->lock);
5539                 break;
5540         }
5541         case KVM_REINJECT_CONTROL: {
5542                 struct kvm_reinject_control control;
5543                 r =  -EFAULT;
5544                 if (copy_from_user(&control, argp, sizeof(control)))
5545                         goto out;
5546                 r = -ENXIO;
5547                 if (!kvm->arch.vpit)
5548                         goto out;
5549                 r = kvm_vm_ioctl_reinject(kvm, &control);
5550                 break;
5551         }
5552         case KVM_SET_BOOT_CPU_ID:
5553                 r = 0;
5554                 mutex_lock(&kvm->lock);
5555                 if (kvm->created_vcpus)
5556                         r = -EBUSY;
5557                 else
5558                         kvm->arch.bsp_vcpu_id = arg;
5559                 mutex_unlock(&kvm->lock);
5560                 break;
5561         case KVM_XEN_HVM_CONFIG: {
5562                 struct kvm_xen_hvm_config xhc;
5563                 r = -EFAULT;
5564                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
5565                         goto out;
5566                 r = -EINVAL;
5567                 if (xhc.flags)
5568                         goto out;
5569                 memcpy(&kvm->arch.xen_hvm_config, &xhc, sizeof(xhc));
5570                 r = 0;
5571                 break;
5572         }
5573         case KVM_SET_CLOCK: {
5574                 struct kvm_clock_data user_ns;
5575                 u64 now_ns;
5576
5577                 r = -EFAULT;
5578                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
5579                         goto out;
5580
5581                 r = -EINVAL;
5582                 if (user_ns.flags)
5583                         goto out;
5584
5585                 r = 0;
5586                 /*
5587                  * TODO: userspace has to take care of races with VCPU_RUN, so
5588                  * kvm_gen_update_masterclock() can be cut down to locked
5589                  * pvclock_update_vm_gtod_copy().
5590                  */
5591                 kvm_gen_update_masterclock(kvm);
5592                 now_ns = get_kvmclock_ns(kvm);
5593                 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
5594                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
5595                 break;
5596         }
5597         case KVM_GET_CLOCK: {
5598                 struct kvm_clock_data user_ns;
5599                 u64 now_ns;
5600
5601                 now_ns = get_kvmclock_ns(kvm);
5602                 user_ns.clock = now_ns;
5603                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
5604                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
5605
5606                 r = -EFAULT;
5607                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
5608                         goto out;
5609                 r = 0;
5610                 break;
5611         }
5612         case KVM_MEMORY_ENCRYPT_OP: {
5613                 r = -ENOTTY;
5614                 if (kvm_x86_ops.mem_enc_op)
5615                         r = kvm_x86_ops.mem_enc_op(kvm, argp);
5616                 break;
5617         }
5618         case KVM_MEMORY_ENCRYPT_REG_REGION: {
5619                 struct kvm_enc_region region;
5620
5621                 r = -EFAULT;
5622                 if (copy_from_user(&region, argp, sizeof(region)))
5623                         goto out;
5624
5625                 r = -ENOTTY;
5626                 if (kvm_x86_ops.mem_enc_reg_region)
5627                         r = kvm_x86_ops.mem_enc_reg_region(kvm, &region);
5628                 break;
5629         }
5630         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
5631                 struct kvm_enc_region region;
5632
5633                 r = -EFAULT;
5634                 if (copy_from_user(&region, argp, sizeof(region)))
5635                         goto out;
5636
5637                 r = -ENOTTY;
5638                 if (kvm_x86_ops.mem_enc_unreg_region)
5639                         r = kvm_x86_ops.mem_enc_unreg_region(kvm, &region);
5640                 break;
5641         }
5642         case KVM_HYPERV_EVENTFD: {
5643                 struct kvm_hyperv_eventfd hvevfd;
5644
5645                 r = -EFAULT;
5646                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
5647                         goto out;
5648                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
5649                 break;
5650         }
5651         case KVM_SET_PMU_EVENT_FILTER:
5652                 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
5653                 break;
5654         case KVM_X86_SET_MSR_FILTER:
5655                 r = kvm_vm_ioctl_set_msr_filter(kvm, argp);
5656                 break;
5657         default:
5658                 r = -ENOTTY;
5659         }
5660 out:
5661         return r;
5662 }
5663
5664 static void kvm_init_msr_list(void)
5665 {
5666         struct x86_pmu_capability x86_pmu;
5667         u32 dummy[2];
5668         unsigned i;
5669
5670         BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
5671                          "Please update the fixed PMCs in msrs_to_saved_all[]");
5672
5673         perf_get_x86_pmu_capability(&x86_pmu);
5674
5675         num_msrs_to_save = 0;
5676         num_emulated_msrs = 0;
5677         num_msr_based_features = 0;
5678
5679         for (i = 0; i < ARRAY_SIZE(msrs_to_save_all); i++) {
5680                 if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
5681                         continue;
5682
5683                 /*
5684                  * Even MSRs that are valid in the host may not be exposed
5685                  * to the guests in some cases.
5686                  */
5687                 switch (msrs_to_save_all[i]) {
5688                 case MSR_IA32_BNDCFGS:
5689                         if (!kvm_mpx_supported())
5690                                 continue;
5691                         break;
5692                 case MSR_TSC_AUX:
5693                         if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP))
5694                                 continue;
5695                         break;
5696                 case MSR_IA32_UMWAIT_CONTROL:
5697                         if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG))
5698                                 continue;
5699                         break;
5700                 case MSR_IA32_RTIT_CTL:
5701                 case MSR_IA32_RTIT_STATUS:
5702                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT))
5703                                 continue;
5704                         break;
5705                 case MSR_IA32_RTIT_CR3_MATCH:
5706                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
5707                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
5708                                 continue;
5709                         break;
5710                 case MSR_IA32_RTIT_OUTPUT_BASE:
5711                 case MSR_IA32_RTIT_OUTPUT_MASK:
5712                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
5713                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
5714                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
5715                                 continue;
5716                         break;
5717                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
5718                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
5719                                 msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=
5720                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
5721                                 continue;
5722                         break;
5723                 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
5724                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
5725                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
5726                                 continue;
5727                         break;
5728                 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
5729                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
5730                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
5731                                 continue;
5732                         break;
5733                 default:
5734                         break;
5735                 }
5736
5737                 msrs_to_save[num_msrs_to_save++] = msrs_to_save_all[i];
5738         }
5739
5740         for (i = 0; i < ARRAY_SIZE(emulated_msrs_all); i++) {
5741                 if (!kvm_x86_ops.has_emulated_msr(emulated_msrs_all[i]))
5742                         continue;
5743
5744                 emulated_msrs[num_emulated_msrs++] = emulated_msrs_all[i];
5745         }
5746
5747         for (i = 0; i < ARRAY_SIZE(msr_based_features_all); i++) {
5748                 struct kvm_msr_entry msr;
5749
5750                 msr.index = msr_based_features_all[i];
5751                 if (kvm_get_msr_feature(&msr))
5752                         continue;
5753
5754                 msr_based_features[num_msr_based_features++] = msr_based_features_all[i];
5755         }
5756 }
5757
5758 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
5759                            const void *v)
5760 {
5761         int handled = 0;
5762         int n;
5763
5764         do {
5765                 n = min(len, 8);
5766                 if (!(lapic_in_kernel(vcpu) &&
5767                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
5768                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
5769                         break;
5770                 handled += n;
5771                 addr += n;
5772                 len -= n;
5773                 v += n;
5774         } while (len);
5775
5776         return handled;
5777 }
5778
5779 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
5780 {
5781         int handled = 0;
5782         int n;
5783
5784         do {
5785                 n = min(len, 8);
5786                 if (!(lapic_in_kernel(vcpu) &&
5787                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
5788                                          addr, n, v))
5789                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
5790                         break;
5791                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
5792                 handled += n;
5793                 addr += n;
5794                 len -= n;
5795                 v += n;
5796         } while (len);
5797
5798         return handled;
5799 }
5800
5801 static void kvm_set_segment(struct kvm_vcpu *vcpu,
5802                         struct kvm_segment *var, int seg)
5803 {
5804         kvm_x86_ops.set_segment(vcpu, var, seg);
5805 }
5806
5807 void kvm_get_segment(struct kvm_vcpu *vcpu,
5808                      struct kvm_segment *var, int seg)
5809 {
5810         kvm_x86_ops.get_segment(vcpu, var, seg);
5811 }
5812
5813 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
5814                            struct x86_exception *exception)
5815 {
5816         gpa_t t_gpa;
5817
5818         BUG_ON(!mmu_is_nested(vcpu));
5819
5820         /* NPT walks are always user-walks */
5821         access |= PFERR_USER_MASK;
5822         t_gpa  = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
5823
5824         return t_gpa;
5825 }
5826
5827 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
5828                               struct x86_exception *exception)
5829 {
5830         u32 access = (kvm_x86_ops.get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5831         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5832 }
5833
5834  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
5835                                 struct x86_exception *exception)
5836 {
5837         u32 access = (kvm_x86_ops.get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5838         access |= PFERR_FETCH_MASK;
5839         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5840 }
5841
5842 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
5843                                struct x86_exception *exception)
5844 {
5845         u32 access = (kvm_x86_ops.get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5846         access |= PFERR_WRITE_MASK;
5847         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5848 }
5849
5850 /* uses this to access any guest's mapped memory without checking CPL */
5851 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
5852                                 struct x86_exception *exception)
5853 {
5854         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
5855 }
5856
5857 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
5858                                       struct kvm_vcpu *vcpu, u32 access,
5859                                       struct x86_exception *exception)
5860 {
5861         void *data = val;
5862         int r = X86EMUL_CONTINUE;
5863
5864         while (bytes) {
5865                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
5866                                                             exception);
5867                 unsigned offset = addr & (PAGE_SIZE-1);
5868                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
5869                 int ret;
5870
5871                 if (gpa == UNMAPPED_GVA)
5872                         return X86EMUL_PROPAGATE_FAULT;
5873                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
5874                                                offset, toread);
5875                 if (ret < 0) {
5876                         r = X86EMUL_IO_NEEDED;
5877                         goto out;
5878                 }
5879
5880                 bytes -= toread;
5881                 data += toread;
5882                 addr += toread;
5883         }
5884 out:
5885         return r;
5886 }
5887
5888 /* used for instruction fetching */
5889 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
5890                                 gva_t addr, void *val, unsigned int bytes,
5891                                 struct x86_exception *exception)
5892 {
5893         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5894         u32 access = (kvm_x86_ops.get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5895         unsigned offset;
5896         int ret;
5897
5898         /* Inline kvm_read_guest_virt_helper for speed.  */
5899         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
5900                                                     exception);
5901         if (unlikely(gpa == UNMAPPED_GVA))
5902                 return X86EMUL_PROPAGATE_FAULT;
5903
5904         offset = addr & (PAGE_SIZE-1);
5905         if (WARN_ON(offset + bytes > PAGE_SIZE))
5906                 bytes = (unsigned)PAGE_SIZE - offset;
5907         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
5908                                        offset, bytes);
5909         if (unlikely(ret < 0))
5910                 return X86EMUL_IO_NEEDED;
5911
5912         return X86EMUL_CONTINUE;
5913 }
5914
5915 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
5916                                gva_t addr, void *val, unsigned int bytes,
5917                                struct x86_exception *exception)
5918 {
5919         u32 access = (kvm_x86_ops.get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5920
5921         /*
5922          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
5923          * is returned, but our callers are not ready for that and they blindly
5924          * call kvm_inject_page_fault.  Ensure that they at least do not leak
5925          * uninitialized kernel stack memory into cr2 and error code.
5926          */
5927         memset(exception, 0, sizeof(*exception));
5928         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
5929                                           exception);
5930 }
5931 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
5932
5933 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
5934                              gva_t addr, void *val, unsigned int bytes,
5935                              struct x86_exception *exception, bool system)
5936 {
5937         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5938         u32 access = 0;
5939
5940         if (!system && kvm_x86_ops.get_cpl(vcpu) == 3)
5941                 access |= PFERR_USER_MASK;
5942
5943         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
5944 }
5945
5946 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
5947                 unsigned long addr, void *val, unsigned int bytes)
5948 {
5949         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5950         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
5951
5952         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
5953 }
5954
5955 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
5956                                       struct kvm_vcpu *vcpu, u32 access,
5957                                       struct x86_exception *exception)
5958 {
5959         void *data = val;
5960         int r = X86EMUL_CONTINUE;
5961
5962         while (bytes) {
5963                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
5964                                                              access,
5965                                                              exception);
5966                 unsigned offset = addr & (PAGE_SIZE-1);
5967                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
5968                 int ret;
5969
5970                 if (gpa == UNMAPPED_GVA)
5971                         return X86EMUL_PROPAGATE_FAULT;
5972                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
5973                 if (ret < 0) {
5974                         r = X86EMUL_IO_NEEDED;
5975                         goto out;
5976                 }
5977
5978                 bytes -= towrite;
5979                 data += towrite;
5980                 addr += towrite;
5981         }
5982 out:
5983         return r;
5984 }
5985
5986 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
5987                               unsigned int bytes, struct x86_exception *exception,
5988                               bool system)
5989 {
5990         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5991         u32 access = PFERR_WRITE_MASK;
5992
5993         if (!system && kvm_x86_ops.get_cpl(vcpu) == 3)
5994                 access |= PFERR_USER_MASK;
5995
5996         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
5997                                            access, exception);
5998 }
5999
6000 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
6001                                 unsigned int bytes, struct x86_exception *exception)
6002 {
6003         /* kvm_write_guest_virt_system can pull in tons of pages. */
6004         vcpu->arch.l1tf_flush_l1d = true;
6005
6006         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6007                                            PFERR_WRITE_MASK, exception);
6008 }
6009 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
6010
6011 int handle_ud(struct kvm_vcpu *vcpu)
6012 {
6013         static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
6014         int emul_type = EMULTYPE_TRAP_UD;
6015         char sig[5]; /* ud2; .ascii "kvm" */
6016         struct x86_exception e;
6017
6018         if (unlikely(!kvm_x86_ops.can_emulate_instruction(vcpu, NULL, 0)))
6019                 return 1;
6020
6021         if (force_emulation_prefix &&
6022             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
6023                                 sig, sizeof(sig), &e) == 0 &&
6024             memcmp(sig, kvm_emulate_prefix, sizeof(sig)) == 0) {
6025                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
6026                 emul_type = EMULTYPE_TRAP_UD_FORCED;
6027         }
6028
6029         return kvm_emulate_instruction(vcpu, emul_type);
6030 }
6031 EXPORT_SYMBOL_GPL(handle_ud);
6032
6033 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6034                             gpa_t gpa, bool write)
6035 {
6036         /* For APIC access vmexit */
6037         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6038                 return 1;
6039
6040         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
6041                 trace_vcpu_match_mmio(gva, gpa, write, true);
6042                 return 1;
6043         }
6044
6045         return 0;
6046 }
6047
6048 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6049                                 gpa_t *gpa, struct x86_exception *exception,
6050                                 bool write)
6051 {
6052         u32 access = ((kvm_x86_ops.get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
6053                 | (write ? PFERR_WRITE_MASK : 0);
6054
6055         /*
6056          * currently PKRU is only applied to ept enabled guest so
6057          * there is no pkey in EPT page table for L1 guest or EPT
6058          * shadow page table for L2 guest.
6059          */
6060         if (vcpu_match_mmio_gva(vcpu, gva)
6061             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
6062                                  vcpu->arch.mmio_access, 0, access)) {
6063                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
6064                                         (gva & (PAGE_SIZE - 1));
6065                 trace_vcpu_match_mmio(gva, *gpa, write, false);
6066                 return 1;
6067         }
6068
6069         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6070
6071         if (*gpa == UNMAPPED_GVA)
6072                 return -1;
6073
6074         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
6075 }
6076
6077 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
6078                         const void *val, int bytes)
6079 {
6080         int ret;
6081
6082         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
6083         if (ret < 0)
6084                 return 0;
6085         kvm_page_track_write(vcpu, gpa, val, bytes);
6086         return 1;
6087 }
6088
6089 struct read_write_emulator_ops {
6090         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
6091                                   int bytes);
6092         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
6093                                   void *val, int bytes);
6094         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6095                                int bytes, void *val);
6096         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6097                                     void *val, int bytes);
6098         bool write;
6099 };
6100
6101 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
6102 {
6103         if (vcpu->mmio_read_completed) {
6104                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
6105                                vcpu->mmio_fragments[0].gpa, val);
6106                 vcpu->mmio_read_completed = 0;
6107                 return 1;
6108         }
6109
6110         return 0;
6111 }
6112
6113 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6114                         void *val, int bytes)
6115 {
6116         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
6117 }
6118
6119 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6120                          void *val, int bytes)
6121 {
6122         return emulator_write_phys(vcpu, gpa, val, bytes);
6123 }
6124
6125 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
6126 {
6127         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
6128         return vcpu_mmio_write(vcpu, gpa, bytes, val);
6129 }
6130
6131 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6132                           void *val, int bytes)
6133 {
6134         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
6135         return X86EMUL_IO_NEEDED;
6136 }
6137
6138 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6139                            void *val, int bytes)
6140 {
6141         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
6142
6143         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
6144         return X86EMUL_CONTINUE;
6145 }
6146
6147 static const struct read_write_emulator_ops read_emultor = {
6148         .read_write_prepare = read_prepare,
6149         .read_write_emulate = read_emulate,
6150         .read_write_mmio = vcpu_mmio_read,
6151         .read_write_exit_mmio = read_exit_mmio,
6152 };
6153
6154 static const struct read_write_emulator_ops write_emultor = {
6155         .read_write_emulate = write_emulate,
6156         .read_write_mmio = write_mmio,
6157         .read_write_exit_mmio = write_exit_mmio,
6158         .write = true,
6159 };
6160
6161 static int emulator_read_write_onepage(unsigned long addr, void *val,
6162                                        unsigned int bytes,
6163                                        struct x86_exception *exception,
6164                                        struct kvm_vcpu *vcpu,
6165                                        const struct read_write_emulator_ops *ops)
6166 {
6167         gpa_t gpa;
6168         int handled, ret;
6169         bool write = ops->write;
6170         struct kvm_mmio_fragment *frag;
6171         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6172
6173         /*
6174          * If the exit was due to a NPF we may already have a GPA.
6175          * If the GPA is present, use it to avoid the GVA to GPA table walk.
6176          * Note, this cannot be used on string operations since string
6177          * operation using rep will only have the initial GPA from the NPF
6178          * occurred.
6179          */
6180         if (ctxt->gpa_available && emulator_can_use_gpa(ctxt) &&
6181             (addr & ~PAGE_MASK) == (ctxt->gpa_val & ~PAGE_MASK)) {
6182                 gpa = ctxt->gpa_val;
6183                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
6184         } else {
6185                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
6186                 if (ret < 0)
6187                         return X86EMUL_PROPAGATE_FAULT;
6188         }
6189
6190         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
6191                 return X86EMUL_CONTINUE;
6192
6193         /*
6194          * Is this MMIO handled locally?
6195          */
6196         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
6197         if (handled == bytes)
6198                 return X86EMUL_CONTINUE;
6199
6200         gpa += handled;
6201         bytes -= handled;
6202         val += handled;
6203
6204         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
6205         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
6206         frag->gpa = gpa;
6207         frag->data = val;
6208         frag->len = bytes;
6209         return X86EMUL_CONTINUE;
6210 }
6211
6212 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
6213                         unsigned long addr,
6214                         void *val, unsigned int bytes,
6215                         struct x86_exception *exception,
6216                         const struct read_write_emulator_ops *ops)
6217 {
6218         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6219         gpa_t gpa;
6220         int rc;
6221
6222         if (ops->read_write_prepare &&
6223                   ops->read_write_prepare(vcpu, val, bytes))
6224                 return X86EMUL_CONTINUE;
6225
6226         vcpu->mmio_nr_fragments = 0;
6227
6228         /* Crossing a page boundary? */
6229         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
6230                 int now;
6231
6232                 now = -addr & ~PAGE_MASK;
6233                 rc = emulator_read_write_onepage(addr, val, now, exception,
6234                                                  vcpu, ops);
6235
6236                 if (rc != X86EMUL_CONTINUE)
6237                         return rc;
6238                 addr += now;
6239                 if (ctxt->mode != X86EMUL_MODE_PROT64)
6240                         addr = (u32)addr;
6241                 val += now;
6242                 bytes -= now;
6243         }
6244
6245         rc = emulator_read_write_onepage(addr, val, bytes, exception,
6246                                          vcpu, ops);
6247         if (rc != X86EMUL_CONTINUE)
6248                 return rc;
6249
6250         if (!vcpu->mmio_nr_fragments)
6251                 return rc;
6252
6253         gpa = vcpu->mmio_fragments[0].gpa;
6254
6255         vcpu->mmio_needed = 1;
6256         vcpu->mmio_cur_fragment = 0;
6257
6258         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
6259         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
6260         vcpu->run->exit_reason = KVM_EXIT_MMIO;
6261         vcpu->run->mmio.phys_addr = gpa;
6262
6263         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
6264 }
6265
6266 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
6267                                   unsigned long addr,
6268                                   void *val,
6269                                   unsigned int bytes,
6270                                   struct x86_exception *exception)
6271 {
6272         return emulator_read_write(ctxt, addr, val, bytes,
6273                                    exception, &read_emultor);
6274 }
6275
6276 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
6277                             unsigned long addr,
6278                             const void *val,
6279                             unsigned int bytes,
6280                             struct x86_exception *exception)
6281 {
6282         return emulator_read_write(ctxt, addr, (void *)val, bytes,
6283                                    exception, &write_emultor);
6284 }
6285
6286 #define CMPXCHG_TYPE(t, ptr, old, new) \
6287         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
6288
6289 #ifdef CONFIG_X86_64
6290 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
6291 #else
6292 #  define CMPXCHG64(ptr, old, new) \
6293         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
6294 #endif
6295
6296 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
6297                                      unsigned long addr,
6298                                      const void *old,
6299                                      const void *new,
6300                                      unsigned int bytes,
6301                                      struct x86_exception *exception)
6302 {
6303         struct kvm_host_map map;
6304         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6305         u64 page_line_mask;
6306         gpa_t gpa;
6307         char *kaddr;
6308         bool exchanged;
6309
6310         /* guests cmpxchg8b have to be emulated atomically */
6311         if (bytes > 8 || (bytes & (bytes - 1)))
6312                 goto emul_write;
6313
6314         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
6315
6316         if (gpa == UNMAPPED_GVA ||
6317             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6318                 goto emul_write;
6319
6320         /*
6321          * Emulate the atomic as a straight write to avoid #AC if SLD is
6322          * enabled in the host and the access splits a cache line.
6323          */
6324         if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT))
6325                 page_line_mask = ~(cache_line_size() - 1);
6326         else
6327                 page_line_mask = PAGE_MASK;
6328
6329         if (((gpa + bytes - 1) & page_line_mask) != (gpa & page_line_mask))
6330                 goto emul_write;
6331
6332         if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
6333                 goto emul_write;
6334
6335         kaddr = map.hva + offset_in_page(gpa);
6336
6337         switch (bytes) {
6338         case 1:
6339                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
6340                 break;
6341         case 2:
6342                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
6343                 break;
6344         case 4:
6345                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
6346                 break;
6347         case 8:
6348                 exchanged = CMPXCHG64(kaddr, old, new);
6349                 break;
6350         default:
6351                 BUG();
6352         }
6353
6354         kvm_vcpu_unmap(vcpu, &map, true);
6355
6356         if (!exchanged)
6357                 return X86EMUL_CMPXCHG_FAILED;
6358
6359         kvm_page_track_write(vcpu, gpa, new, bytes);
6360
6361         return X86EMUL_CONTINUE;
6362
6363 emul_write:
6364         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
6365
6366         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
6367 }
6368
6369 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
6370 {
6371         int r = 0, i;
6372
6373         for (i = 0; i < vcpu->arch.pio.count; i++) {
6374                 if (vcpu->arch.pio.in)
6375                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
6376                                             vcpu->arch.pio.size, pd);
6377                 else
6378                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
6379                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
6380                                              pd);
6381                 if (r)
6382                         break;
6383                 pd += vcpu->arch.pio.size;
6384         }
6385         return r;
6386 }
6387
6388 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
6389                                unsigned short port, void *val,
6390                                unsigned int count, bool in)
6391 {
6392         vcpu->arch.pio.port = port;
6393         vcpu->arch.pio.in = in;
6394         vcpu->arch.pio.count  = count;
6395         vcpu->arch.pio.size = size;
6396
6397         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
6398                 vcpu->arch.pio.count = 0;
6399                 return 1;
6400         }
6401
6402         vcpu->run->exit_reason = KVM_EXIT_IO;
6403         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
6404         vcpu->run->io.size = size;
6405         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
6406         vcpu->run->io.count = count;
6407         vcpu->run->io.port = port;
6408
6409         return 0;
6410 }
6411
6412 static int emulator_pio_in(struct kvm_vcpu *vcpu, int size,
6413                            unsigned short port, void *val, unsigned int count)
6414 {
6415         int ret;
6416
6417         if (vcpu->arch.pio.count)
6418                 goto data_avail;
6419
6420         memset(vcpu->arch.pio_data, 0, size * count);
6421
6422         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
6423         if (ret) {
6424 data_avail:
6425                 memcpy(val, vcpu->arch.pio_data, size * count);
6426                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
6427                 vcpu->arch.pio.count = 0;
6428                 return 1;
6429         }
6430
6431         return 0;
6432 }
6433
6434 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
6435                                     int size, unsigned short port, void *val,
6436                                     unsigned int count)
6437 {
6438         return emulator_pio_in(emul_to_vcpu(ctxt), size, port, val, count);
6439
6440 }
6441
6442 static int emulator_pio_out(struct kvm_vcpu *vcpu, int size,
6443                             unsigned short port, const void *val,
6444                             unsigned int count)
6445 {
6446         memcpy(vcpu->arch.pio_data, val, size * count);
6447         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
6448         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
6449 }
6450
6451 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
6452                                      int size, unsigned short port,
6453                                      const void *val, unsigned int count)
6454 {
6455         return emulator_pio_out(emul_to_vcpu(ctxt), size, port, val, count);
6456 }
6457
6458 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
6459 {
6460         return kvm_x86_ops.get_segment_base(vcpu, seg);
6461 }
6462
6463 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
6464 {
6465         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
6466 }
6467
6468 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
6469 {
6470         if (!need_emulate_wbinvd(vcpu))
6471                 return X86EMUL_CONTINUE;
6472
6473         if (kvm_x86_ops.has_wbinvd_exit()) {
6474                 int cpu = get_cpu();
6475
6476                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
6477                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
6478                                 wbinvd_ipi, NULL, 1);
6479                 put_cpu();
6480                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
6481         } else
6482                 wbinvd();
6483         return X86EMUL_CONTINUE;
6484 }
6485
6486 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
6487 {
6488         kvm_emulate_wbinvd_noskip(vcpu);
6489         return kvm_skip_emulated_instruction(vcpu);
6490 }
6491 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
6492
6493
6494
6495 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
6496 {
6497         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
6498 }
6499
6500 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
6501                            unsigned long *dest)
6502 {
6503         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
6504 }
6505
6506 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
6507                            unsigned long value)
6508 {
6509
6510         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
6511 }
6512
6513 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
6514 {
6515         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
6516 }
6517
6518 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
6519 {
6520         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6521         unsigned long value;
6522
6523         switch (cr) {
6524         case 0:
6525                 value = kvm_read_cr0(vcpu);
6526                 break;
6527         case 2:
6528                 value = vcpu->arch.cr2;
6529                 break;
6530         case 3:
6531                 value = kvm_read_cr3(vcpu);
6532                 break;
6533         case 4:
6534                 value = kvm_read_cr4(vcpu);
6535                 break;
6536         case 8:
6537                 value = kvm_get_cr8(vcpu);
6538                 break;
6539         default:
6540                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
6541                 return 0;
6542         }
6543
6544         return value;
6545 }
6546
6547 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
6548 {
6549         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6550         int res = 0;
6551
6552         switch (cr) {
6553         case 0:
6554                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
6555                 break;
6556         case 2:
6557                 vcpu->arch.cr2 = val;
6558                 break;
6559         case 3:
6560                 res = kvm_set_cr3(vcpu, val);
6561                 break;
6562         case 4:
6563                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
6564                 break;
6565         case 8:
6566                 res = kvm_set_cr8(vcpu, val);
6567                 break;
6568         default:
6569                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
6570                 res = -1;
6571         }
6572
6573         return res;
6574 }
6575
6576 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
6577 {
6578         return kvm_x86_ops.get_cpl(emul_to_vcpu(ctxt));
6579 }
6580
6581 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6582 {
6583         kvm_x86_ops.get_gdt(emul_to_vcpu(ctxt), dt);
6584 }
6585
6586 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6587 {
6588         kvm_x86_ops.get_idt(emul_to_vcpu(ctxt), dt);
6589 }
6590
6591 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6592 {
6593         kvm_x86_ops.set_gdt(emul_to_vcpu(ctxt), dt);
6594 }
6595
6596 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6597 {
6598         kvm_x86_ops.set_idt(emul_to_vcpu(ctxt), dt);
6599 }
6600
6601 static unsigned long emulator_get_cached_segment_base(
6602         struct x86_emulate_ctxt *ctxt, int seg)
6603 {
6604         return get_segment_base(emul_to_vcpu(ctxt), seg);
6605 }
6606
6607 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
6608                                  struct desc_struct *desc, u32 *base3,
6609                                  int seg)
6610 {
6611         struct kvm_segment var;
6612
6613         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
6614         *selector = var.selector;
6615
6616         if (var.unusable) {
6617                 memset(desc, 0, sizeof(*desc));
6618                 if (base3)
6619                         *base3 = 0;
6620                 return false;
6621         }
6622
6623         if (var.g)
6624                 var.limit >>= 12;
6625         set_desc_limit(desc, var.limit);
6626         set_desc_base(desc, (unsigned long)var.base);
6627 #ifdef CONFIG_X86_64
6628         if (base3)
6629                 *base3 = var.base >> 32;
6630 #endif
6631         desc->type = var.type;
6632         desc->s = var.s;
6633         desc->dpl = var.dpl;
6634         desc->p = var.present;
6635         desc->avl = var.avl;
6636         desc->l = var.l;
6637         desc->d = var.db;
6638         desc->g = var.g;
6639
6640         return true;
6641 }
6642
6643 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
6644                                  struct desc_struct *desc, u32 base3,
6645                                  int seg)
6646 {
6647         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6648         struct kvm_segment var;
6649
6650         var.selector = selector;
6651         var.base = get_desc_base(desc);
6652 #ifdef CONFIG_X86_64
6653         var.base |= ((u64)base3) << 32;
6654 #endif
6655         var.limit = get_desc_limit(desc);
6656         if (desc->g)
6657                 var.limit = (var.limit << 12) | 0xfff;
6658         var.type = desc->type;
6659         var.dpl = desc->dpl;
6660         var.db = desc->d;
6661         var.s = desc->s;
6662         var.l = desc->l;
6663         var.g = desc->g;
6664         var.avl = desc->avl;
6665         var.present = desc->p;
6666         var.unusable = !var.present;
6667         var.padding = 0;
6668
6669         kvm_set_segment(vcpu, &var, seg);
6670         return;
6671 }
6672
6673 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
6674                             u32 msr_index, u64 *pdata)
6675 {
6676         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6677         int r;
6678
6679         r = kvm_get_msr(vcpu, msr_index, pdata);
6680
6681         if (r && kvm_get_msr_user_space(vcpu, msr_index, r)) {
6682                 /* Bounce to user space */
6683                 return X86EMUL_IO_NEEDED;
6684         }
6685
6686         return r;
6687 }
6688
6689 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
6690                             u32 msr_index, u64 data)
6691 {
6692         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6693         int r;
6694
6695         r = kvm_set_msr(vcpu, msr_index, data);
6696
6697         if (r && kvm_set_msr_user_space(vcpu, msr_index, data, r)) {
6698                 /* Bounce to user space */
6699                 return X86EMUL_IO_NEEDED;
6700         }
6701
6702         return r;
6703 }
6704
6705 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
6706 {
6707         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6708
6709         return vcpu->arch.smbase;
6710 }
6711
6712 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
6713 {
6714         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6715
6716         vcpu->arch.smbase = smbase;
6717 }
6718
6719 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
6720                               u32 pmc)
6721 {
6722         return kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt), pmc);
6723 }
6724
6725 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
6726                              u32 pmc, u64 *pdata)
6727 {
6728         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
6729 }
6730
6731 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
6732 {
6733         emul_to_vcpu(ctxt)->arch.halt_request = 1;
6734 }
6735
6736 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
6737                               struct x86_instruction_info *info,
6738                               enum x86_intercept_stage stage)
6739 {
6740         return kvm_x86_ops.check_intercept(emul_to_vcpu(ctxt), info, stage,
6741                                             &ctxt->exception);
6742 }
6743
6744 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
6745                               u32 *eax, u32 *ebx, u32 *ecx, u32 *edx,
6746                               bool exact_only)
6747 {
6748         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, exact_only);
6749 }
6750
6751 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt *ctxt)
6752 {
6753         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_LM);
6754 }
6755
6756 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt *ctxt)
6757 {
6758         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_MOVBE);
6759 }
6760
6761 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)
6762 {
6763         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_FXSR);
6764 }
6765
6766 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
6767 {
6768         return kvm_register_read(emul_to_vcpu(ctxt), reg);
6769 }
6770
6771 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
6772 {
6773         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
6774 }
6775
6776 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
6777 {
6778         kvm_x86_ops.set_nmi_mask(emul_to_vcpu(ctxt), masked);
6779 }
6780
6781 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
6782 {
6783         return emul_to_vcpu(ctxt)->arch.hflags;
6784 }
6785
6786 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
6787 {
6788         emul_to_vcpu(ctxt)->arch.hflags = emul_flags;
6789 }
6790
6791 static int emulator_pre_leave_smm(struct x86_emulate_ctxt *ctxt,
6792                                   const char *smstate)
6793 {
6794         return kvm_x86_ops.pre_leave_smm(emul_to_vcpu(ctxt), smstate);
6795 }
6796
6797 static void emulator_post_leave_smm(struct x86_emulate_ctxt *ctxt)
6798 {
6799         kvm_smm_changed(emul_to_vcpu(ctxt));
6800 }
6801
6802 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
6803 {
6804         return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
6805 }
6806
6807 static const struct x86_emulate_ops emulate_ops = {
6808         .read_gpr            = emulator_read_gpr,
6809         .write_gpr           = emulator_write_gpr,
6810         .read_std            = emulator_read_std,
6811         .write_std           = emulator_write_std,
6812         .read_phys           = kvm_read_guest_phys_system,
6813         .fetch               = kvm_fetch_guest_virt,
6814         .read_emulated       = emulator_read_emulated,
6815         .write_emulated      = emulator_write_emulated,
6816         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
6817         .invlpg              = emulator_invlpg,
6818         .pio_in_emulated     = emulator_pio_in_emulated,
6819         .pio_out_emulated    = emulator_pio_out_emulated,
6820         .get_segment         = emulator_get_segment,
6821         .set_segment         = emulator_set_segment,
6822         .get_cached_segment_base = emulator_get_cached_segment_base,
6823         .get_gdt             = emulator_get_gdt,
6824         .get_idt             = emulator_get_idt,
6825         .set_gdt             = emulator_set_gdt,
6826         .set_idt             = emulator_set_idt,
6827         .get_cr              = emulator_get_cr,
6828         .set_cr              = emulator_set_cr,
6829         .cpl                 = emulator_get_cpl,
6830         .get_dr              = emulator_get_dr,
6831         .set_dr              = emulator_set_dr,
6832         .get_smbase          = emulator_get_smbase,
6833         .set_smbase          = emulator_set_smbase,
6834         .set_msr             = emulator_set_msr,
6835         .get_msr             = emulator_get_msr,
6836         .check_pmc           = emulator_check_pmc,
6837         .read_pmc            = emulator_read_pmc,
6838         .halt                = emulator_halt,
6839         .wbinvd              = emulator_wbinvd,
6840         .fix_hypercall       = emulator_fix_hypercall,
6841         .intercept           = emulator_intercept,
6842         .get_cpuid           = emulator_get_cpuid,
6843         .guest_has_long_mode = emulator_guest_has_long_mode,
6844         .guest_has_movbe     = emulator_guest_has_movbe,
6845         .guest_has_fxsr      = emulator_guest_has_fxsr,
6846         .set_nmi_mask        = emulator_set_nmi_mask,
6847         .get_hflags          = emulator_get_hflags,
6848         .set_hflags          = emulator_set_hflags,
6849         .pre_leave_smm       = emulator_pre_leave_smm,
6850         .post_leave_smm      = emulator_post_leave_smm,
6851         .set_xcr             = emulator_set_xcr,
6852 };
6853
6854 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
6855 {
6856         u32 int_shadow = kvm_x86_ops.get_interrupt_shadow(vcpu);
6857         /*
6858          * an sti; sti; sequence only disable interrupts for the first
6859          * instruction. So, if the last instruction, be it emulated or
6860          * not, left the system with the INT_STI flag enabled, it
6861          * means that the last instruction is an sti. We should not
6862          * leave the flag on in this case. The same goes for mov ss
6863          */
6864         if (int_shadow & mask)
6865                 mask = 0;
6866         if (unlikely(int_shadow || mask)) {
6867                 kvm_x86_ops.set_interrupt_shadow(vcpu, mask);
6868                 if (!mask)
6869                         kvm_make_request(KVM_REQ_EVENT, vcpu);
6870         }
6871 }
6872
6873 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
6874 {
6875         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6876         if (ctxt->exception.vector == PF_VECTOR)
6877                 return kvm_inject_emulated_page_fault(vcpu, &ctxt->exception);
6878
6879         if (ctxt->exception.error_code_valid)
6880                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
6881                                       ctxt->exception.error_code);
6882         else
6883                 kvm_queue_exception(vcpu, ctxt->exception.vector);
6884         return false;
6885 }
6886
6887 static struct x86_emulate_ctxt *alloc_emulate_ctxt(struct kvm_vcpu *vcpu)
6888 {
6889         struct x86_emulate_ctxt *ctxt;
6890
6891         ctxt = kmem_cache_zalloc(x86_emulator_cache, GFP_KERNEL_ACCOUNT);
6892         if (!ctxt) {
6893                 pr_err("kvm: failed to allocate vcpu's emulator\n");
6894                 return NULL;
6895         }
6896
6897         ctxt->vcpu = vcpu;
6898         ctxt->ops = &emulate_ops;
6899         vcpu->arch.emulate_ctxt = ctxt;
6900
6901         return ctxt;
6902 }
6903
6904 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
6905 {
6906         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6907         int cs_db, cs_l;
6908
6909         kvm_x86_ops.get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
6910
6911         ctxt->gpa_available = false;
6912         ctxt->eflags = kvm_get_rflags(vcpu);
6913         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
6914
6915         ctxt->eip = kvm_rip_read(vcpu);
6916         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
6917                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
6918                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
6919                      cs_db                              ? X86EMUL_MODE_PROT32 :
6920                                                           X86EMUL_MODE_PROT16;
6921         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
6922         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
6923         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
6924
6925         init_decode_cache(ctxt);
6926         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
6927 }
6928
6929 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
6930 {
6931         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6932         int ret;
6933
6934         init_emulate_ctxt(vcpu);
6935
6936         ctxt->op_bytes = 2;
6937         ctxt->ad_bytes = 2;
6938         ctxt->_eip = ctxt->eip + inc_eip;
6939         ret = emulate_int_real(ctxt, irq);
6940
6941         if (ret != X86EMUL_CONTINUE) {
6942                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
6943         } else {
6944                 ctxt->eip = ctxt->_eip;
6945                 kvm_rip_write(vcpu, ctxt->eip);
6946                 kvm_set_rflags(vcpu, ctxt->eflags);
6947         }
6948 }
6949 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
6950
6951 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
6952 {
6953         ++vcpu->stat.insn_emulation_fail;
6954         trace_kvm_emulate_insn_failed(vcpu);
6955
6956         if (emulation_type & EMULTYPE_VMWARE_GP) {
6957                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
6958                 return 1;
6959         }
6960
6961         if (emulation_type & EMULTYPE_SKIP) {
6962                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
6963                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
6964                 vcpu->run->internal.ndata = 0;
6965                 return 0;
6966         }
6967
6968         kvm_queue_exception(vcpu, UD_VECTOR);
6969
6970         if (!is_guest_mode(vcpu) && kvm_x86_ops.get_cpl(vcpu) == 0) {
6971                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
6972                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
6973                 vcpu->run->internal.ndata = 0;
6974                 return 0;
6975         }
6976
6977         return 1;
6978 }
6979
6980 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
6981                                   bool write_fault_to_shadow_pgtable,
6982                                   int emulation_type)
6983 {
6984         gpa_t gpa = cr2_or_gpa;
6985         kvm_pfn_t pfn;
6986
6987         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
6988                 return false;
6989
6990         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
6991             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
6992                 return false;
6993
6994         if (!vcpu->arch.mmu->direct_map) {
6995                 /*
6996                  * Write permission should be allowed since only
6997                  * write access need to be emulated.
6998                  */
6999                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7000
7001                 /*
7002                  * If the mapping is invalid in guest, let cpu retry
7003                  * it to generate fault.
7004                  */
7005                 if (gpa == UNMAPPED_GVA)
7006                         return true;
7007         }
7008
7009         /*
7010          * Do not retry the unhandleable instruction if it faults on the
7011          * readonly host memory, otherwise it will goto a infinite loop:
7012          * retry instruction -> write #PF -> emulation fail -> retry
7013          * instruction -> ...
7014          */
7015         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
7016
7017         /*
7018          * If the instruction failed on the error pfn, it can not be fixed,
7019          * report the error to userspace.
7020          */
7021         if (is_error_noslot_pfn(pfn))
7022                 return false;
7023
7024         kvm_release_pfn_clean(pfn);
7025
7026         /* The instructions are well-emulated on direct mmu. */
7027         if (vcpu->arch.mmu->direct_map) {
7028                 unsigned int indirect_shadow_pages;
7029
7030                 spin_lock(&vcpu->kvm->mmu_lock);
7031                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
7032                 spin_unlock(&vcpu->kvm->mmu_lock);
7033
7034                 if (indirect_shadow_pages)
7035                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7036
7037                 return true;
7038         }
7039
7040         /*
7041          * if emulation was due to access to shadowed page table
7042          * and it failed try to unshadow page and re-enter the
7043          * guest to let CPU execute the instruction.
7044          */
7045         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7046
7047         /*
7048          * If the access faults on its page table, it can not
7049          * be fixed by unprotecting shadow page and it should
7050          * be reported to userspace.
7051          */
7052         return !write_fault_to_shadow_pgtable;
7053 }
7054
7055 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
7056                               gpa_t cr2_or_gpa,  int emulation_type)
7057 {
7058         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7059         unsigned long last_retry_eip, last_retry_addr, gpa = cr2_or_gpa;
7060
7061         last_retry_eip = vcpu->arch.last_retry_eip;
7062         last_retry_addr = vcpu->arch.last_retry_addr;
7063
7064         /*
7065          * If the emulation is caused by #PF and it is non-page_table
7066          * writing instruction, it means the VM-EXIT is caused by shadow
7067          * page protected, we can zap the shadow page and retry this
7068          * instruction directly.
7069          *
7070          * Note: if the guest uses a non-page-table modifying instruction
7071          * on the PDE that points to the instruction, then we will unmap
7072          * the instruction and go to an infinite loop. So, we cache the
7073          * last retried eip and the last fault address, if we meet the eip
7074          * and the address again, we can break out of the potential infinite
7075          * loop.
7076          */
7077         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
7078
7079         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7080                 return false;
7081
7082         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7083             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7084                 return false;
7085
7086         if (x86_page_table_writing_insn(ctxt))
7087                 return false;
7088
7089         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2_or_gpa)
7090                 return false;
7091
7092         vcpu->arch.last_retry_eip = ctxt->eip;
7093         vcpu->arch.last_retry_addr = cr2_or_gpa;
7094
7095         if (!vcpu->arch.mmu->direct_map)
7096                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7097
7098         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7099
7100         return true;
7101 }
7102
7103 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
7104 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
7105
7106 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
7107 {
7108         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
7109                 /* This is a good place to trace that we are exiting SMM.  */
7110                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
7111
7112                 /* Process a latched INIT or SMI, if any.  */
7113                 kvm_make_request(KVM_REQ_EVENT, vcpu);
7114         }
7115
7116         kvm_mmu_reset_context(vcpu);
7117 }
7118
7119 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
7120                                 unsigned long *db)
7121 {
7122         u32 dr6 = 0;
7123         int i;
7124         u32 enable, rwlen;
7125
7126         enable = dr7;
7127         rwlen = dr7 >> 16;
7128         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
7129                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
7130                         dr6 |= (1 << i);
7131         return dr6;
7132 }
7133
7134 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
7135 {
7136         struct kvm_run *kvm_run = vcpu->run;
7137
7138         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
7139                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 | DR6_RTM;
7140                 kvm_run->debug.arch.pc = kvm_get_linear_rip(vcpu);
7141                 kvm_run->debug.arch.exception = DB_VECTOR;
7142                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
7143                 return 0;
7144         }
7145         kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
7146         return 1;
7147 }
7148
7149 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
7150 {
7151         unsigned long rflags = kvm_x86_ops.get_rflags(vcpu);
7152         int r;
7153
7154         r = kvm_x86_ops.skip_emulated_instruction(vcpu);
7155         if (unlikely(!r))
7156                 return 0;
7157
7158         /*
7159          * rflags is the old, "raw" value of the flags.  The new value has
7160          * not been saved yet.
7161          *
7162          * This is correct even for TF set by the guest, because "the
7163          * processor will not generate this exception after the instruction
7164          * that sets the TF flag".
7165          */
7166         if (unlikely(rflags & X86_EFLAGS_TF))
7167                 r = kvm_vcpu_do_singlestep(vcpu);
7168         return r;
7169 }
7170 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
7171
7172 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
7173 {
7174         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
7175             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
7176                 struct kvm_run *kvm_run = vcpu->run;
7177                 unsigned long eip = kvm_get_linear_rip(vcpu);
7178                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7179                                            vcpu->arch.guest_debug_dr7,
7180                                            vcpu->arch.eff_db);
7181
7182                 if (dr6 != 0) {
7183                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
7184                         kvm_run->debug.arch.pc = eip;
7185                         kvm_run->debug.arch.exception = DB_VECTOR;
7186                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
7187                         *r = 0;
7188                         return true;
7189                 }
7190         }
7191
7192         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
7193             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
7194                 unsigned long eip = kvm_get_linear_rip(vcpu);
7195                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7196                                            vcpu->arch.dr7,
7197                                            vcpu->arch.db);
7198
7199                 if (dr6 != 0) {
7200                         kvm_queue_exception_p(vcpu, DB_VECTOR, dr6);
7201                         *r = 1;
7202                         return true;
7203                 }
7204         }
7205
7206         return false;
7207 }
7208
7209 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
7210 {
7211         switch (ctxt->opcode_len) {
7212         case 1:
7213                 switch (ctxt->b) {
7214                 case 0xe4:      /* IN */
7215                 case 0xe5:
7216                 case 0xec:
7217                 case 0xed:
7218                 case 0xe6:      /* OUT */
7219                 case 0xe7:
7220                 case 0xee:
7221                 case 0xef:
7222                 case 0x6c:      /* INS */
7223                 case 0x6d:
7224                 case 0x6e:      /* OUTS */
7225                 case 0x6f:
7226                         return true;
7227                 }
7228                 break;
7229         case 2:
7230                 switch (ctxt->b) {
7231                 case 0x33:      /* RDPMC */
7232                         return true;
7233                 }
7234                 break;
7235         }
7236
7237         return false;
7238 }
7239
7240 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7241                             int emulation_type, void *insn, int insn_len)
7242 {
7243         int r;
7244         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7245         bool writeback = true;
7246         bool write_fault_to_spt;
7247
7248         if (unlikely(!kvm_x86_ops.can_emulate_instruction(vcpu, insn, insn_len)))
7249                 return 1;
7250
7251         vcpu->arch.l1tf_flush_l1d = true;
7252
7253         /*
7254          * Clear write_fault_to_shadow_pgtable here to ensure it is
7255          * never reused.
7256          */
7257         write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
7258         vcpu->arch.write_fault_to_shadow_pgtable = false;
7259         kvm_clear_exception_queue(vcpu);
7260
7261         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
7262                 init_emulate_ctxt(vcpu);
7263
7264                 /*
7265                  * We will reenter on the same instruction since
7266                  * we do not set complete_userspace_io.  This does not
7267                  * handle watchpoints yet, those would be handled in
7268                  * the emulate_ops.
7269                  */
7270                 if (!(emulation_type & EMULTYPE_SKIP) &&
7271                     kvm_vcpu_check_breakpoint(vcpu, &r))
7272                         return r;
7273
7274                 ctxt->interruptibility = 0;
7275                 ctxt->have_exception = false;
7276                 ctxt->exception.vector = -1;
7277                 ctxt->perm_ok = false;
7278
7279                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
7280
7281                 r = x86_decode_insn(ctxt, insn, insn_len);
7282
7283                 trace_kvm_emulate_insn_start(vcpu);
7284                 ++vcpu->stat.insn_emulation;
7285                 if (r != EMULATION_OK)  {
7286                         if ((emulation_type & EMULTYPE_TRAP_UD) ||
7287                             (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
7288                                 kvm_queue_exception(vcpu, UD_VECTOR);
7289                                 return 1;
7290                         }
7291                         if (reexecute_instruction(vcpu, cr2_or_gpa,
7292                                                   write_fault_to_spt,
7293                                                   emulation_type))
7294                                 return 1;
7295                         if (ctxt->have_exception) {
7296                                 /*
7297                                  * #UD should result in just EMULATION_FAILED, and trap-like
7298                                  * exception should not be encountered during decode.
7299                                  */
7300                                 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
7301                                              exception_type(ctxt->exception.vector) == EXCPT_TRAP);
7302                                 inject_emulated_exception(vcpu);
7303                                 return 1;
7304                         }
7305                         return handle_emulation_failure(vcpu, emulation_type);
7306                 }
7307         }
7308
7309         if ((emulation_type & EMULTYPE_VMWARE_GP) &&
7310             !is_vmware_backdoor_opcode(ctxt)) {
7311                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7312                 return 1;
7313         }
7314
7315         /*
7316          * Note, EMULTYPE_SKIP is intended for use *only* by vendor callbacks
7317          * for kvm_skip_emulated_instruction().  The caller is responsible for
7318          * updating interruptibility state and injecting single-step #DBs.
7319          */
7320         if (emulation_type & EMULTYPE_SKIP) {
7321                 kvm_rip_write(vcpu, ctxt->_eip);
7322                 if (ctxt->eflags & X86_EFLAGS_RF)
7323                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
7324                 return 1;
7325         }
7326
7327         if (retry_instruction(ctxt, cr2_or_gpa, emulation_type))
7328                 return 1;
7329
7330         /* this is needed for vmware backdoor interface to work since it
7331            changes registers values  during IO operation */
7332         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
7333                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7334                 emulator_invalidate_register_cache(ctxt);
7335         }
7336
7337 restart:
7338         if (emulation_type & EMULTYPE_PF) {
7339                 /* Save the faulting GPA (cr2) in the address field */
7340                 ctxt->exception.address = cr2_or_gpa;
7341
7342                 /* With shadow page tables, cr2 contains a GVA or nGPA. */
7343                 if (vcpu->arch.mmu->direct_map) {
7344                         ctxt->gpa_available = true;
7345                         ctxt->gpa_val = cr2_or_gpa;
7346                 }
7347         } else {
7348                 /* Sanitize the address out of an abundance of paranoia. */
7349                 ctxt->exception.address = 0;
7350         }
7351
7352         r = x86_emulate_insn(ctxt);
7353
7354         if (r == EMULATION_INTERCEPTED)
7355                 return 1;
7356
7357         if (r == EMULATION_FAILED) {
7358                 if (reexecute_instruction(vcpu, cr2_or_gpa, write_fault_to_spt,
7359                                         emulation_type))
7360                         return 1;
7361
7362                 return handle_emulation_failure(vcpu, emulation_type);
7363         }
7364
7365         if (ctxt->have_exception) {
7366                 r = 1;
7367                 if (inject_emulated_exception(vcpu))
7368                         return r;
7369         } else if (vcpu->arch.pio.count) {
7370                 if (!vcpu->arch.pio.in) {
7371                         /* FIXME: return into emulator if single-stepping.  */
7372                         vcpu->arch.pio.count = 0;
7373                 } else {
7374                         writeback = false;
7375                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
7376                 }
7377                 r = 0;
7378         } else if (vcpu->mmio_needed) {
7379                 ++vcpu->stat.mmio_exits;
7380
7381                 if (!vcpu->mmio_is_write)
7382                         writeback = false;
7383                 r = 0;
7384                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7385         } else if (r == EMULATION_RESTART)
7386                 goto restart;
7387         else
7388                 r = 1;
7389
7390         if (writeback) {
7391                 unsigned long rflags = kvm_x86_ops.get_rflags(vcpu);
7392                 toggle_interruptibility(vcpu, ctxt->interruptibility);
7393                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7394                 if (!ctxt->have_exception ||
7395                     exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
7396                         kvm_rip_write(vcpu, ctxt->eip);
7397                         if (r && (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
7398                                 r = kvm_vcpu_do_singlestep(vcpu);
7399                         if (kvm_x86_ops.update_emulated_instruction)
7400                                 kvm_x86_ops.update_emulated_instruction(vcpu);
7401                         __kvm_set_rflags(vcpu, ctxt->eflags);
7402                 }
7403
7404                 /*
7405                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
7406                  * do nothing, and it will be requested again as soon as
7407                  * the shadow expires.  But we still need to check here,
7408                  * because POPF has no interrupt shadow.
7409                  */
7410                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
7411                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7412         } else
7413                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
7414
7415         return r;
7416 }
7417
7418 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
7419 {
7420         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
7421 }
7422 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
7423
7424 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
7425                                         void *insn, int insn_len)
7426 {
7427         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
7428 }
7429 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
7430
7431 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
7432 {
7433         vcpu->arch.pio.count = 0;
7434         return 1;
7435 }
7436
7437 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
7438 {
7439         vcpu->arch.pio.count = 0;
7440
7441         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
7442                 return 1;
7443
7444         return kvm_skip_emulated_instruction(vcpu);
7445 }
7446
7447 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
7448                             unsigned short port)
7449 {
7450         unsigned long val = kvm_rax_read(vcpu);
7451         int ret = emulator_pio_out(vcpu, size, port, &val, 1);
7452
7453         if (ret)
7454                 return ret;
7455
7456         /*
7457          * Workaround userspace that relies on old KVM behavior of %rip being
7458          * incremented prior to exiting to userspace to handle "OUT 0x7e".
7459          */
7460         if (port == 0x7e &&
7461             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
7462                 vcpu->arch.complete_userspace_io =
7463                         complete_fast_pio_out_port_0x7e;
7464                 kvm_skip_emulated_instruction(vcpu);
7465         } else {
7466                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
7467                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
7468         }
7469         return 0;
7470 }
7471
7472 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
7473 {
7474         unsigned long val;
7475
7476         /* We should only ever be called with arch.pio.count equal to 1 */
7477         BUG_ON(vcpu->arch.pio.count != 1);
7478
7479         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
7480                 vcpu->arch.pio.count = 0;
7481                 return 1;
7482         }
7483
7484         /* For size less than 4 we merge, else we zero extend */
7485         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
7486
7487         /*
7488          * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
7489          * the copy and tracing
7490          */
7491         emulator_pio_in(vcpu, vcpu->arch.pio.size, vcpu->arch.pio.port, &val, 1);
7492         kvm_rax_write(vcpu, val);
7493
7494         return kvm_skip_emulated_instruction(vcpu);
7495 }
7496
7497 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
7498                            unsigned short port)
7499 {
7500         unsigned long val;
7501         int ret;
7502
7503         /* For size less than 4 we merge, else we zero extend */
7504         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
7505
7506         ret = emulator_pio_in(vcpu, size, port, &val, 1);
7507         if (ret) {
7508                 kvm_rax_write(vcpu, val);
7509                 return ret;
7510         }
7511
7512         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
7513         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
7514
7515         return 0;
7516 }
7517
7518 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
7519 {
7520         int ret;
7521
7522         if (in)
7523                 ret = kvm_fast_pio_in(vcpu, size, port);
7524         else
7525                 ret = kvm_fast_pio_out(vcpu, size, port);
7526         return ret && kvm_skip_emulated_instruction(vcpu);
7527 }
7528 EXPORT_SYMBOL_GPL(kvm_fast_pio);
7529
7530 static int kvmclock_cpu_down_prep(unsigned int cpu)
7531 {
7532         __this_cpu_write(cpu_tsc_khz, 0);
7533         return 0;
7534 }
7535
7536 static void tsc_khz_changed(void *data)
7537 {
7538         struct cpufreq_freqs *freq = data;
7539         unsigned long khz = 0;
7540
7541         if (data)
7542                 khz = freq->new;
7543         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
7544                 khz = cpufreq_quick_get(raw_smp_processor_id());
7545         if (!khz)
7546                 khz = tsc_khz;
7547         __this_cpu_write(cpu_tsc_khz, khz);
7548 }
7549
7550 #ifdef CONFIG_X86_64
7551 static void kvm_hyperv_tsc_notifier(void)
7552 {
7553         struct kvm *kvm;
7554         struct kvm_vcpu *vcpu;
7555         int cpu;
7556
7557         mutex_lock(&kvm_lock);
7558         list_for_each_entry(kvm, &vm_list, vm_list)
7559                 kvm_make_mclock_inprogress_request(kvm);
7560
7561         hyperv_stop_tsc_emulation();
7562
7563         /* TSC frequency always matches when on Hyper-V */
7564         for_each_present_cpu(cpu)
7565                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
7566         kvm_max_guest_tsc_khz = tsc_khz;
7567
7568         list_for_each_entry(kvm, &vm_list, vm_list) {
7569                 struct kvm_arch *ka = &kvm->arch;
7570
7571                 spin_lock(&ka->pvclock_gtod_sync_lock);
7572
7573                 pvclock_update_vm_gtod_copy(kvm);
7574
7575                 kvm_for_each_vcpu(cpu, vcpu, kvm)
7576                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7577
7578                 kvm_for_each_vcpu(cpu, vcpu, kvm)
7579                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
7580
7581                 spin_unlock(&ka->pvclock_gtod_sync_lock);
7582         }
7583         mutex_unlock(&kvm_lock);
7584 }
7585 #endif
7586
7587 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
7588 {
7589         struct kvm *kvm;
7590         struct kvm_vcpu *vcpu;
7591         int i, send_ipi = 0;
7592
7593         /*
7594          * We allow guests to temporarily run on slowing clocks,
7595          * provided we notify them after, or to run on accelerating
7596          * clocks, provided we notify them before.  Thus time never
7597          * goes backwards.
7598          *
7599          * However, we have a problem.  We can't atomically update
7600          * the frequency of a given CPU from this function; it is
7601          * merely a notifier, which can be called from any CPU.
7602          * Changing the TSC frequency at arbitrary points in time
7603          * requires a recomputation of local variables related to
7604          * the TSC for each VCPU.  We must flag these local variables
7605          * to be updated and be sure the update takes place with the
7606          * new frequency before any guests proceed.
7607          *
7608          * Unfortunately, the combination of hotplug CPU and frequency
7609          * change creates an intractable locking scenario; the order
7610          * of when these callouts happen is undefined with respect to
7611          * CPU hotplug, and they can race with each other.  As such,
7612          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
7613          * undefined; you can actually have a CPU frequency change take
7614          * place in between the computation of X and the setting of the
7615          * variable.  To protect against this problem, all updates of
7616          * the per_cpu tsc_khz variable are done in an interrupt
7617          * protected IPI, and all callers wishing to update the value
7618          * must wait for a synchronous IPI to complete (which is trivial
7619          * if the caller is on the CPU already).  This establishes the
7620          * necessary total order on variable updates.
7621          *
7622          * Note that because a guest time update may take place
7623          * anytime after the setting of the VCPU's request bit, the
7624          * correct TSC value must be set before the request.  However,
7625          * to ensure the update actually makes it to any guest which
7626          * starts running in hardware virtualization between the set
7627          * and the acquisition of the spinlock, we must also ping the
7628          * CPU after setting the request bit.
7629          *
7630          */
7631
7632         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
7633
7634         mutex_lock(&kvm_lock);
7635         list_for_each_entry(kvm, &vm_list, vm_list) {
7636                 kvm_for_each_vcpu(i, vcpu, kvm) {
7637                         if (vcpu->cpu != cpu)
7638                                 continue;
7639                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7640                         if (vcpu->cpu != raw_smp_processor_id())
7641                                 send_ipi = 1;
7642                 }
7643         }
7644         mutex_unlock(&kvm_lock);
7645
7646         if (freq->old < freq->new && send_ipi) {
7647                 /*
7648                  * We upscale the frequency.  Must make the guest
7649                  * doesn't see old kvmclock values while running with
7650                  * the new frequency, otherwise we risk the guest sees
7651                  * time go backwards.
7652                  *
7653                  * In case we update the frequency for another cpu
7654                  * (which might be in guest context) send an interrupt
7655                  * to kick the cpu out of guest context.  Next time
7656                  * guest context is entered kvmclock will be updated,
7657                  * so the guest will not see stale values.
7658                  */
7659                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
7660         }
7661 }
7662
7663 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
7664                                      void *data)
7665 {
7666         struct cpufreq_freqs *freq = data;
7667         int cpu;
7668
7669         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
7670                 return 0;
7671         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
7672                 return 0;
7673
7674         for_each_cpu(cpu, freq->policy->cpus)
7675                 __kvmclock_cpufreq_notifier(freq, cpu);
7676
7677         return 0;
7678 }
7679
7680 static struct notifier_block kvmclock_cpufreq_notifier_block = {
7681         .notifier_call  = kvmclock_cpufreq_notifier
7682 };
7683
7684 static int kvmclock_cpu_online(unsigned int cpu)
7685 {
7686         tsc_khz_changed(NULL);
7687         return 0;
7688 }
7689
7690 static void kvm_timer_init(void)
7691 {
7692         max_tsc_khz = tsc_khz;
7693
7694         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
7695 #ifdef CONFIG_CPU_FREQ
7696                 struct cpufreq_policy *policy;
7697                 int cpu;
7698
7699                 cpu = get_cpu();
7700                 policy = cpufreq_cpu_get(cpu);
7701                 if (policy) {
7702                         if (policy->cpuinfo.max_freq)
7703                                 max_tsc_khz = policy->cpuinfo.max_freq;
7704                         cpufreq_cpu_put(policy);
7705                 }
7706                 put_cpu();
7707 #endif
7708                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
7709                                           CPUFREQ_TRANSITION_NOTIFIER);
7710         }
7711
7712         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
7713                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
7714 }
7715
7716 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
7717 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
7718
7719 int kvm_is_in_guest(void)
7720 {
7721         return __this_cpu_read(current_vcpu) != NULL;
7722 }
7723
7724 static int kvm_is_user_mode(void)
7725 {
7726         int user_mode = 3;
7727
7728         if (__this_cpu_read(current_vcpu))
7729                 user_mode = kvm_x86_ops.get_cpl(__this_cpu_read(current_vcpu));
7730
7731         return user_mode != 0;
7732 }
7733
7734 static unsigned long kvm_get_guest_ip(void)
7735 {
7736         unsigned long ip = 0;
7737
7738         if (__this_cpu_read(current_vcpu))
7739                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
7740
7741         return ip;
7742 }
7743
7744 static void kvm_handle_intel_pt_intr(void)
7745 {
7746         struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
7747
7748         kvm_make_request(KVM_REQ_PMI, vcpu);
7749         __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
7750                         (unsigned long *)&vcpu->arch.pmu.global_status);
7751 }
7752
7753 static struct perf_guest_info_callbacks kvm_guest_cbs = {
7754         .is_in_guest            = kvm_is_in_guest,
7755         .is_user_mode           = kvm_is_user_mode,
7756         .get_guest_ip           = kvm_get_guest_ip,
7757         .handle_intel_pt_intr   = kvm_handle_intel_pt_intr,
7758 };
7759
7760 #ifdef CONFIG_X86_64
7761 static void pvclock_gtod_update_fn(struct work_struct *work)
7762 {
7763         struct kvm *kvm;
7764
7765         struct kvm_vcpu *vcpu;
7766         int i;
7767
7768         mutex_lock(&kvm_lock);
7769         list_for_each_entry(kvm, &vm_list, vm_list)
7770                 kvm_for_each_vcpu(i, vcpu, kvm)
7771                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7772         atomic_set(&kvm_guest_has_master_clock, 0);
7773         mutex_unlock(&kvm_lock);
7774 }
7775
7776 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
7777
7778 /*
7779  * Notification about pvclock gtod data update.
7780  */
7781 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
7782                                void *priv)
7783 {
7784         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
7785         struct timekeeper *tk = priv;
7786
7787         update_pvclock_gtod(tk);
7788
7789         /* disable master clock if host does not trust, or does not
7790          * use, TSC based clocksource.
7791          */
7792         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
7793             atomic_read(&kvm_guest_has_master_clock) != 0)
7794                 queue_work(system_long_wq, &pvclock_gtod_work);
7795
7796         return 0;
7797 }
7798
7799 static struct notifier_block pvclock_gtod_notifier = {
7800         .notifier_call = pvclock_gtod_notify,
7801 };
7802 #endif
7803
7804 int kvm_arch_init(void *opaque)
7805 {
7806         struct kvm_x86_init_ops *ops = opaque;
7807         int r;
7808
7809         if (kvm_x86_ops.hardware_enable) {
7810                 printk(KERN_ERR "kvm: already loaded the other module\n");
7811                 r = -EEXIST;
7812                 goto out;
7813         }
7814
7815         if (!ops->cpu_has_kvm_support()) {
7816                 pr_err_ratelimited("kvm: no hardware support\n");
7817                 r = -EOPNOTSUPP;
7818                 goto out;
7819         }
7820         if (ops->disabled_by_bios()) {
7821                 pr_err_ratelimited("kvm: disabled by bios\n");
7822                 r = -EOPNOTSUPP;
7823                 goto out;
7824         }
7825
7826         /*
7827          * KVM explicitly assumes that the guest has an FPU and
7828          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
7829          * vCPU's FPU state as a fxregs_state struct.
7830          */
7831         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
7832                 printk(KERN_ERR "kvm: inadequate fpu\n");
7833                 r = -EOPNOTSUPP;
7834                 goto out;
7835         }
7836
7837         r = -ENOMEM;
7838         x86_fpu_cache = kmem_cache_create("x86_fpu", sizeof(struct fpu),
7839                                           __alignof__(struct fpu), SLAB_ACCOUNT,
7840                                           NULL);
7841         if (!x86_fpu_cache) {
7842                 printk(KERN_ERR "kvm: failed to allocate cache for x86 fpu\n");
7843                 goto out;
7844         }
7845
7846         x86_emulator_cache = kvm_alloc_emulator_cache();
7847         if (!x86_emulator_cache) {
7848                 pr_err("kvm: failed to allocate cache for x86 emulator\n");
7849                 goto out_free_x86_fpu_cache;
7850         }
7851
7852         user_return_msrs = alloc_percpu(struct kvm_user_return_msrs);
7853         if (!user_return_msrs) {
7854                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_user_return_msrs\n");
7855                 goto out_free_x86_emulator_cache;
7856         }
7857
7858         r = kvm_mmu_module_init();
7859         if (r)
7860                 goto out_free_percpu;
7861
7862         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
7863                         PT_DIRTY_MASK, PT64_NX_MASK, 0,
7864                         PT_PRESENT_MASK, 0, sme_me_mask);
7865         kvm_timer_init();
7866
7867         perf_register_guest_info_callbacks(&kvm_guest_cbs);
7868
7869         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
7870                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
7871                 supported_xcr0 = host_xcr0 & KVM_SUPPORTED_XCR0;
7872         }
7873
7874         kvm_lapic_init();
7875         if (pi_inject_timer == -1)
7876                 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
7877 #ifdef CONFIG_X86_64
7878         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
7879
7880         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
7881                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
7882 #endif
7883
7884         return 0;
7885
7886 out_free_percpu:
7887         free_percpu(user_return_msrs);
7888 out_free_x86_emulator_cache:
7889         kmem_cache_destroy(x86_emulator_cache);
7890 out_free_x86_fpu_cache:
7891         kmem_cache_destroy(x86_fpu_cache);
7892 out:
7893         return r;
7894 }
7895
7896 void kvm_arch_exit(void)
7897 {
7898 #ifdef CONFIG_X86_64
7899         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
7900                 clear_hv_tscchange_cb();
7901 #endif
7902         kvm_lapic_exit();
7903         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
7904
7905         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
7906                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
7907                                             CPUFREQ_TRANSITION_NOTIFIER);
7908         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
7909 #ifdef CONFIG_X86_64
7910         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
7911 #endif
7912         kvm_x86_ops.hardware_enable = NULL;
7913         kvm_mmu_module_exit();
7914         free_percpu(user_return_msrs);
7915         kmem_cache_destroy(x86_fpu_cache);
7916 }
7917
7918 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
7919 {
7920         ++vcpu->stat.halt_exits;
7921         if (lapic_in_kernel(vcpu)) {
7922                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
7923                 return 1;
7924         } else {
7925                 vcpu->run->exit_reason = KVM_EXIT_HLT;
7926                 return 0;
7927         }
7928 }
7929 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
7930
7931 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
7932 {
7933         int ret = kvm_skip_emulated_instruction(vcpu);
7934         /*
7935          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
7936          * KVM_EXIT_DEBUG here.
7937          */
7938         return kvm_vcpu_halt(vcpu) && ret;
7939 }
7940 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
7941
7942 #ifdef CONFIG_X86_64
7943 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
7944                                 unsigned long clock_type)
7945 {
7946         struct kvm_clock_pairing clock_pairing;
7947         struct timespec64 ts;
7948         u64 cycle;
7949         int ret;
7950
7951         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
7952                 return -KVM_EOPNOTSUPP;
7953
7954         if (kvm_get_walltime_and_clockread(&ts, &cycle) == false)
7955                 return -KVM_EOPNOTSUPP;
7956
7957         clock_pairing.sec = ts.tv_sec;
7958         clock_pairing.nsec = ts.tv_nsec;
7959         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
7960         clock_pairing.flags = 0;
7961         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
7962
7963         ret = 0;
7964         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
7965                             sizeof(struct kvm_clock_pairing)))
7966                 ret = -KVM_EFAULT;
7967
7968         return ret;
7969 }
7970 #endif
7971
7972 /*
7973  * kvm_pv_kick_cpu_op:  Kick a vcpu.
7974  *
7975  * @apicid - apicid of vcpu to be kicked.
7976  */
7977 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
7978 {
7979         struct kvm_lapic_irq lapic_irq;
7980
7981         lapic_irq.shorthand = APIC_DEST_NOSHORT;
7982         lapic_irq.dest_mode = APIC_DEST_PHYSICAL;
7983         lapic_irq.level = 0;
7984         lapic_irq.dest_id = apicid;
7985         lapic_irq.msi_redir_hint = false;
7986
7987         lapic_irq.delivery_mode = APIC_DM_REMRD;
7988         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
7989 }
7990
7991 bool kvm_apicv_activated(struct kvm *kvm)
7992 {
7993         return (READ_ONCE(kvm->arch.apicv_inhibit_reasons) == 0);
7994 }
7995 EXPORT_SYMBOL_GPL(kvm_apicv_activated);
7996
7997 void kvm_apicv_init(struct kvm *kvm, bool enable)
7998 {
7999         if (enable)
8000                 clear_bit(APICV_INHIBIT_REASON_DISABLE,
8001                           &kvm->arch.apicv_inhibit_reasons);
8002         else
8003                 set_bit(APICV_INHIBIT_REASON_DISABLE,
8004                         &kvm->arch.apicv_inhibit_reasons);
8005 }
8006 EXPORT_SYMBOL_GPL(kvm_apicv_init);
8007
8008 static void kvm_sched_yield(struct kvm *kvm, unsigned long dest_id)
8009 {
8010         struct kvm_vcpu *target = NULL;
8011         struct kvm_apic_map *map;
8012
8013         rcu_read_lock();
8014         map = rcu_dereference(kvm->arch.apic_map);
8015
8016         if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
8017                 target = map->phys_map[dest_id]->vcpu;
8018
8019         rcu_read_unlock();
8020
8021         if (target && READ_ONCE(target->ready))
8022                 kvm_vcpu_yield_to(target);
8023 }
8024
8025 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
8026 {
8027         unsigned long nr, a0, a1, a2, a3, ret;
8028         int op_64_bit;
8029
8030         if (kvm_hv_hypercall_enabled(vcpu->kvm))
8031                 return kvm_hv_hypercall(vcpu);
8032
8033         nr = kvm_rax_read(vcpu);
8034         a0 = kvm_rbx_read(vcpu);
8035         a1 = kvm_rcx_read(vcpu);
8036         a2 = kvm_rdx_read(vcpu);
8037         a3 = kvm_rsi_read(vcpu);
8038
8039         trace_kvm_hypercall(nr, a0, a1, a2, a3);
8040
8041         op_64_bit = is_64_bit_mode(vcpu);
8042         if (!op_64_bit) {
8043                 nr &= 0xFFFFFFFF;
8044                 a0 &= 0xFFFFFFFF;
8045                 a1 &= 0xFFFFFFFF;
8046                 a2 &= 0xFFFFFFFF;
8047                 a3 &= 0xFFFFFFFF;
8048         }
8049
8050         if (kvm_x86_ops.get_cpl(vcpu) != 0) {
8051                 ret = -KVM_EPERM;
8052                 goto out;
8053         }
8054
8055         ret = -KVM_ENOSYS;
8056
8057         switch (nr) {
8058         case KVM_HC_VAPIC_POLL_IRQ:
8059                 ret = 0;
8060                 break;
8061         case KVM_HC_KICK_CPU:
8062                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_UNHALT))
8063                         break;
8064
8065                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
8066                 kvm_sched_yield(vcpu->kvm, a1);
8067                 ret = 0;
8068                 break;
8069 #ifdef CONFIG_X86_64
8070         case KVM_HC_CLOCK_PAIRING:
8071                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
8072                 break;
8073 #endif
8074         case KVM_HC_SEND_IPI:
8075                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SEND_IPI))
8076                         break;
8077
8078                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
8079                 break;
8080         case KVM_HC_SCHED_YIELD:
8081                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SCHED_YIELD))
8082                         break;
8083
8084                 kvm_sched_yield(vcpu->kvm, a0);
8085                 ret = 0;
8086                 break;
8087         default:
8088                 ret = -KVM_ENOSYS;
8089                 break;
8090         }
8091 out:
8092         if (!op_64_bit)
8093                 ret = (u32)ret;
8094         kvm_rax_write(vcpu, ret);
8095
8096         ++vcpu->stat.hypercalls;
8097         return kvm_skip_emulated_instruction(vcpu);
8098 }
8099 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
8100
8101 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
8102 {
8103         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
8104         char instruction[3];
8105         unsigned long rip = kvm_rip_read(vcpu);
8106
8107         kvm_x86_ops.patch_hypercall(vcpu, instruction);
8108
8109         return emulator_write_emulated(ctxt, rip, instruction, 3,
8110                 &ctxt->exception);
8111 }
8112
8113 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
8114 {
8115         return vcpu->run->request_interrupt_window &&
8116                 likely(!pic_in_kernel(vcpu->kvm));
8117 }
8118
8119 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
8120 {
8121         struct kvm_run *kvm_run = vcpu->run;
8122
8123         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
8124         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
8125         kvm_run->cr8 = kvm_get_cr8(vcpu);
8126         kvm_run->apic_base = kvm_get_apic_base(vcpu);
8127         kvm_run->ready_for_interrupt_injection =
8128                 pic_in_kernel(vcpu->kvm) ||
8129                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
8130 }
8131
8132 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
8133 {
8134         int max_irr, tpr;
8135
8136         if (!kvm_x86_ops.update_cr8_intercept)
8137                 return;
8138
8139         if (!lapic_in_kernel(vcpu))
8140                 return;
8141
8142         if (vcpu->arch.apicv_active)
8143                 return;
8144
8145         if (!vcpu->arch.apic->vapic_addr)
8146                 max_irr = kvm_lapic_find_highest_irr(vcpu);
8147         else
8148                 max_irr = -1;
8149
8150         if (max_irr != -1)
8151                 max_irr >>= 4;
8152
8153         tpr = kvm_lapic_get_cr8(vcpu);
8154
8155         kvm_x86_ops.update_cr8_intercept(vcpu, tpr, max_irr);
8156 }
8157
8158 static void inject_pending_event(struct kvm_vcpu *vcpu, bool *req_immediate_exit)
8159 {
8160         int r;
8161         bool can_inject = true;
8162
8163         /* try to reinject previous events if any */
8164
8165         if (vcpu->arch.exception.injected) {
8166                 kvm_x86_ops.queue_exception(vcpu);
8167                 can_inject = false;
8168         }
8169         /*
8170          * Do not inject an NMI or interrupt if there is a pending
8171          * exception.  Exceptions and interrupts are recognized at
8172          * instruction boundaries, i.e. the start of an instruction.
8173          * Trap-like exceptions, e.g. #DB, have higher priority than
8174          * NMIs and interrupts, i.e. traps are recognized before an
8175          * NMI/interrupt that's pending on the same instruction.
8176          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
8177          * priority, but are only generated (pended) during instruction
8178          * execution, i.e. a pending fault-like exception means the
8179          * fault occurred on the *previous* instruction and must be
8180          * serviced prior to recognizing any new events in order to
8181          * fully complete the previous instruction.
8182          */
8183         else if (!vcpu->arch.exception.pending) {
8184                 if (vcpu->arch.nmi_injected) {
8185                         kvm_x86_ops.set_nmi(vcpu);
8186                         can_inject = false;
8187                 } else if (vcpu->arch.interrupt.injected) {
8188                         kvm_x86_ops.set_irq(vcpu);
8189                         can_inject = false;
8190                 }
8191         }
8192
8193         WARN_ON_ONCE(vcpu->arch.exception.injected &&
8194                      vcpu->arch.exception.pending);
8195
8196         /*
8197          * Call check_nested_events() even if we reinjected a previous event
8198          * in order for caller to determine if it should require immediate-exit
8199          * from L2 to L1 due to pending L1 events which require exit
8200          * from L2 to L1.
8201          */
8202         if (is_guest_mode(vcpu)) {
8203                 r = kvm_x86_ops.nested_ops->check_events(vcpu);
8204                 if (r < 0)
8205                         goto busy;
8206         }
8207
8208         /* try to inject new event if pending */
8209         if (vcpu->arch.exception.pending) {
8210                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
8211                                         vcpu->arch.exception.has_error_code,
8212                                         vcpu->arch.exception.error_code);
8213
8214                 vcpu->arch.exception.pending = false;
8215                 vcpu->arch.exception.injected = true;
8216
8217                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
8218                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
8219                                              X86_EFLAGS_RF);
8220
8221                 if (vcpu->arch.exception.nr == DB_VECTOR) {
8222                         kvm_deliver_exception_payload(vcpu);
8223                         if (vcpu->arch.dr7 & DR7_GD) {
8224                                 vcpu->arch.dr7 &= ~DR7_GD;
8225                                 kvm_update_dr7(vcpu);
8226                         }
8227                 }
8228
8229                 kvm_x86_ops.queue_exception(vcpu);
8230                 can_inject = false;
8231         }
8232
8233         /*
8234          * Finally, inject interrupt events.  If an event cannot be injected
8235          * due to architectural conditions (e.g. IF=0) a window-open exit
8236          * will re-request KVM_REQ_EVENT.  Sometimes however an event is pending
8237          * and can architecturally be injected, but we cannot do it right now:
8238          * an interrupt could have arrived just now and we have to inject it
8239          * as a vmexit, or there could already an event in the queue, which is
8240          * indicated by can_inject.  In that case we request an immediate exit
8241          * in order to make progress and get back here for another iteration.
8242          * The kvm_x86_ops hooks communicate this by returning -EBUSY.
8243          */
8244         if (vcpu->arch.smi_pending) {
8245                 r = can_inject ? kvm_x86_ops.smi_allowed(vcpu, true) : -EBUSY;
8246                 if (r < 0)
8247                         goto busy;
8248                 if (r) {
8249                         vcpu->arch.smi_pending = false;
8250                         ++vcpu->arch.smi_count;
8251                         enter_smm(vcpu);
8252                         can_inject = false;
8253                 } else
8254                         kvm_x86_ops.enable_smi_window(vcpu);
8255         }
8256
8257         if (vcpu->arch.nmi_pending) {
8258                 r = can_inject ? kvm_x86_ops.nmi_allowed(vcpu, true) : -EBUSY;
8259                 if (r < 0)
8260                         goto busy;
8261                 if (r) {
8262                         --vcpu->arch.nmi_pending;
8263                         vcpu->arch.nmi_injected = true;
8264                         kvm_x86_ops.set_nmi(vcpu);
8265                         can_inject = false;
8266                         WARN_ON(kvm_x86_ops.nmi_allowed(vcpu, true) < 0);
8267                 }
8268                 if (vcpu->arch.nmi_pending)
8269                         kvm_x86_ops.enable_nmi_window(vcpu);
8270         }
8271
8272         if (kvm_cpu_has_injectable_intr(vcpu)) {
8273                 r = can_inject ? kvm_x86_ops.interrupt_allowed(vcpu, true) : -EBUSY;
8274                 if (r < 0)
8275                         goto busy;
8276                 if (r) {
8277                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu), false);
8278                         kvm_x86_ops.set_irq(vcpu);
8279                         WARN_ON(kvm_x86_ops.interrupt_allowed(vcpu, true) < 0);
8280                 }
8281                 if (kvm_cpu_has_injectable_intr(vcpu))
8282                         kvm_x86_ops.enable_irq_window(vcpu);
8283         }
8284
8285         if (is_guest_mode(vcpu) &&
8286             kvm_x86_ops.nested_ops->hv_timer_pending &&
8287             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
8288                 *req_immediate_exit = true;
8289
8290         WARN_ON(vcpu->arch.exception.pending);
8291         return;
8292
8293 busy:
8294         *req_immediate_exit = true;
8295         return;
8296 }
8297
8298 static void process_nmi(struct kvm_vcpu *vcpu)
8299 {
8300         unsigned limit = 2;
8301
8302         /*
8303          * x86 is limited to one NMI running, and one NMI pending after it.
8304          * If an NMI is already in progress, limit further NMIs to just one.
8305          * Otherwise, allow two (and we'll inject the first one immediately).
8306          */
8307         if (kvm_x86_ops.get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
8308                 limit = 1;
8309
8310         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
8311         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
8312         kvm_make_request(KVM_REQ_EVENT, vcpu);
8313 }
8314
8315 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
8316 {
8317         u32 flags = 0;
8318         flags |= seg->g       << 23;
8319         flags |= seg->db      << 22;
8320         flags |= seg->l       << 21;
8321         flags |= seg->avl     << 20;
8322         flags |= seg->present << 15;
8323         flags |= seg->dpl     << 13;
8324         flags |= seg->s       << 12;
8325         flags |= seg->type    << 8;
8326         return flags;
8327 }
8328
8329 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
8330 {
8331         struct kvm_segment seg;
8332         int offset;
8333
8334         kvm_get_segment(vcpu, &seg, n);
8335         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
8336
8337         if (n < 3)
8338                 offset = 0x7f84 + n * 12;
8339         else
8340                 offset = 0x7f2c + (n - 3) * 12;
8341
8342         put_smstate(u32, buf, offset + 8, seg.base);
8343         put_smstate(u32, buf, offset + 4, seg.limit);
8344         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
8345 }
8346
8347 #ifdef CONFIG_X86_64
8348 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
8349 {
8350         struct kvm_segment seg;
8351         int offset;
8352         u16 flags;
8353
8354         kvm_get_segment(vcpu, &seg, n);
8355         offset = 0x7e00 + n * 16;
8356
8357         flags = enter_smm_get_segment_flags(&seg) >> 8;
8358         put_smstate(u16, buf, offset, seg.selector);
8359         put_smstate(u16, buf, offset + 2, flags);
8360         put_smstate(u32, buf, offset + 4, seg.limit);
8361         put_smstate(u64, buf, offset + 8, seg.base);
8362 }
8363 #endif
8364
8365 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
8366 {
8367         struct desc_ptr dt;
8368         struct kvm_segment seg;
8369         unsigned long val;
8370         int i;
8371
8372         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
8373         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
8374         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
8375         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
8376
8377         for (i = 0; i < 8; i++)
8378                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
8379
8380         kvm_get_dr(vcpu, 6, &val);
8381         put_smstate(u32, buf, 0x7fcc, (u32)val);
8382         kvm_get_dr(vcpu, 7, &val);
8383         put_smstate(u32, buf, 0x7fc8, (u32)val);
8384
8385         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
8386         put_smstate(u32, buf, 0x7fc4, seg.selector);
8387         put_smstate(u32, buf, 0x7f64, seg.base);
8388         put_smstate(u32, buf, 0x7f60, seg.limit);
8389         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
8390
8391         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
8392         put_smstate(u32, buf, 0x7fc0, seg.selector);
8393         put_smstate(u32, buf, 0x7f80, seg.base);
8394         put_smstate(u32, buf, 0x7f7c, seg.limit);
8395         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
8396
8397         kvm_x86_ops.get_gdt(vcpu, &dt);
8398         put_smstate(u32, buf, 0x7f74, dt.address);
8399         put_smstate(u32, buf, 0x7f70, dt.size);
8400
8401         kvm_x86_ops.get_idt(vcpu, &dt);
8402         put_smstate(u32, buf, 0x7f58, dt.address);
8403         put_smstate(u32, buf, 0x7f54, dt.size);
8404
8405         for (i = 0; i < 6; i++)
8406                 enter_smm_save_seg_32(vcpu, buf, i);
8407
8408         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
8409
8410         /* revision id */
8411         put_smstate(u32, buf, 0x7efc, 0x00020000);
8412         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
8413 }
8414
8415 #ifdef CONFIG_X86_64
8416 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
8417 {
8418         struct desc_ptr dt;
8419         struct kvm_segment seg;
8420         unsigned long val;
8421         int i;
8422
8423         for (i = 0; i < 16; i++)
8424                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
8425
8426         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
8427         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
8428
8429         kvm_get_dr(vcpu, 6, &val);
8430         put_smstate(u64, buf, 0x7f68, val);
8431         kvm_get_dr(vcpu, 7, &val);
8432         put_smstate(u64, buf, 0x7f60, val);
8433
8434         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
8435         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
8436         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
8437
8438         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
8439
8440         /* revision id */
8441         put_smstate(u32, buf, 0x7efc, 0x00020064);
8442
8443         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
8444
8445         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
8446         put_smstate(u16, buf, 0x7e90, seg.selector);
8447         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
8448         put_smstate(u32, buf, 0x7e94, seg.limit);
8449         put_smstate(u64, buf, 0x7e98, seg.base);
8450
8451         kvm_x86_ops.get_idt(vcpu, &dt);
8452         put_smstate(u32, buf, 0x7e84, dt.size);
8453         put_smstate(u64, buf, 0x7e88, dt.address);
8454
8455         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
8456         put_smstate(u16, buf, 0x7e70, seg.selector);
8457         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
8458         put_smstate(u32, buf, 0x7e74, seg.limit);
8459         put_smstate(u64, buf, 0x7e78, seg.base);
8460
8461         kvm_x86_ops.get_gdt(vcpu, &dt);
8462         put_smstate(u32, buf, 0x7e64, dt.size);
8463         put_smstate(u64, buf, 0x7e68, dt.address);
8464
8465         for (i = 0; i < 6; i++)
8466                 enter_smm_save_seg_64(vcpu, buf, i);
8467 }
8468 #endif
8469
8470 static void enter_smm(struct kvm_vcpu *vcpu)
8471 {
8472         struct kvm_segment cs, ds;
8473         struct desc_ptr dt;
8474         char buf[512];
8475         u32 cr0;
8476
8477         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
8478         memset(buf, 0, 512);
8479 #ifdef CONFIG_X86_64
8480         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
8481                 enter_smm_save_state_64(vcpu, buf);
8482         else
8483 #endif
8484                 enter_smm_save_state_32(vcpu, buf);
8485
8486         /*
8487          * Give pre_enter_smm() a chance to make ISA-specific changes to the
8488          * vCPU state (e.g. leave guest mode) after we've saved the state into
8489          * the SMM state-save area.
8490          */
8491         kvm_x86_ops.pre_enter_smm(vcpu, buf);
8492
8493         vcpu->arch.hflags |= HF_SMM_MASK;
8494         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
8495
8496         if (kvm_x86_ops.get_nmi_mask(vcpu))
8497                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
8498         else
8499                 kvm_x86_ops.set_nmi_mask(vcpu, true);
8500
8501         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
8502         kvm_rip_write(vcpu, 0x8000);
8503
8504         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
8505         kvm_x86_ops.set_cr0(vcpu, cr0);
8506         vcpu->arch.cr0 = cr0;
8507
8508         kvm_x86_ops.set_cr4(vcpu, 0);
8509
8510         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
8511         dt.address = dt.size = 0;
8512         kvm_x86_ops.set_idt(vcpu, &dt);
8513
8514         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
8515
8516         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
8517         cs.base = vcpu->arch.smbase;
8518
8519         ds.selector = 0;
8520         ds.base = 0;
8521
8522         cs.limit    = ds.limit = 0xffffffff;
8523         cs.type     = ds.type = 0x3;
8524         cs.dpl      = ds.dpl = 0;
8525         cs.db       = ds.db = 0;
8526         cs.s        = ds.s = 1;
8527         cs.l        = ds.l = 0;
8528         cs.g        = ds.g = 1;
8529         cs.avl      = ds.avl = 0;
8530         cs.present  = ds.present = 1;
8531         cs.unusable = ds.unusable = 0;
8532         cs.padding  = ds.padding = 0;
8533
8534         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
8535         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
8536         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
8537         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
8538         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
8539         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
8540
8541 #ifdef CONFIG_X86_64
8542         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
8543                 kvm_x86_ops.set_efer(vcpu, 0);
8544 #endif
8545
8546         kvm_update_cpuid_runtime(vcpu);
8547         kvm_mmu_reset_context(vcpu);
8548 }
8549
8550 static void process_smi(struct kvm_vcpu *vcpu)
8551 {
8552         vcpu->arch.smi_pending = true;
8553         kvm_make_request(KVM_REQ_EVENT, vcpu);
8554 }
8555
8556 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
8557                                        unsigned long *vcpu_bitmap)
8558 {
8559         cpumask_var_t cpus;
8560
8561         zalloc_cpumask_var(&cpus, GFP_ATOMIC);
8562
8563         kvm_make_vcpus_request_mask(kvm, KVM_REQ_SCAN_IOAPIC,
8564                                     NULL, vcpu_bitmap, cpus);
8565
8566         free_cpumask_var(cpus);
8567 }
8568
8569 void kvm_make_scan_ioapic_request(struct kvm *kvm)
8570 {
8571         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
8572 }
8573
8574 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
8575 {
8576         if (!lapic_in_kernel(vcpu))
8577                 return;
8578
8579         vcpu->arch.apicv_active = kvm_apicv_activated(vcpu->kvm);
8580         kvm_apic_update_apicv(vcpu);
8581         kvm_x86_ops.refresh_apicv_exec_ctrl(vcpu);
8582 }
8583 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv);
8584
8585 /*
8586  * NOTE: Do not hold any lock prior to calling this.
8587  *
8588  * In particular, kvm_request_apicv_update() expects kvm->srcu not to be
8589  * locked, because it calls __x86_set_memory_region() which does
8590  * synchronize_srcu(&kvm->srcu).
8591  */
8592 void kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
8593 {
8594         struct kvm_vcpu *except;
8595         unsigned long old, new, expected;
8596
8597         if (!kvm_x86_ops.check_apicv_inhibit_reasons ||
8598             !kvm_x86_ops.check_apicv_inhibit_reasons(bit))
8599                 return;
8600
8601         old = READ_ONCE(kvm->arch.apicv_inhibit_reasons);
8602         do {
8603                 expected = new = old;
8604                 if (activate)
8605                         __clear_bit(bit, &new);
8606                 else
8607                         __set_bit(bit, &new);
8608                 if (new == old)
8609                         break;
8610                 old = cmpxchg(&kvm->arch.apicv_inhibit_reasons, expected, new);
8611         } while (old != expected);
8612
8613         if (!!old == !!new)
8614                 return;
8615
8616         trace_kvm_apicv_update_request(activate, bit);
8617         if (kvm_x86_ops.pre_update_apicv_exec_ctrl)
8618                 kvm_x86_ops.pre_update_apicv_exec_ctrl(kvm, activate);
8619
8620         /*
8621          * Sending request to update APICV for all other vcpus,
8622          * while update the calling vcpu immediately instead of
8623          * waiting for another #VMEXIT to handle the request.
8624          */
8625         except = kvm_get_running_vcpu();
8626         kvm_make_all_cpus_request_except(kvm, KVM_REQ_APICV_UPDATE,
8627                                          except);
8628         if (except)
8629                 kvm_vcpu_update_apicv(except);
8630 }
8631 EXPORT_SYMBOL_GPL(kvm_request_apicv_update);
8632
8633 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
8634 {
8635         if (!kvm_apic_present(vcpu))
8636                 return;
8637
8638         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
8639
8640         if (irqchip_split(vcpu->kvm))
8641                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
8642         else {
8643                 if (vcpu->arch.apicv_active)
8644                         kvm_x86_ops.sync_pir_to_irr(vcpu);
8645                 if (ioapic_in_kernel(vcpu->kvm))
8646                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
8647         }
8648
8649         if (is_guest_mode(vcpu))
8650                 vcpu->arch.load_eoi_exitmap_pending = true;
8651         else
8652                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
8653 }
8654
8655 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
8656 {
8657         u64 eoi_exit_bitmap[4];
8658
8659         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
8660                 return;
8661
8662         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
8663                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
8664         kvm_x86_ops.load_eoi_exitmap(vcpu, eoi_exit_bitmap);
8665 }
8666
8667 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
8668                                             unsigned long start, unsigned long end)
8669 {
8670         unsigned long apic_address;
8671
8672         /*
8673          * The physical address of apic access page is stored in the VMCS.
8674          * Update it when it becomes invalid.
8675          */
8676         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
8677         if (start <= apic_address && apic_address < end)
8678                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
8679 }
8680
8681 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
8682 {
8683         if (!lapic_in_kernel(vcpu))
8684                 return;
8685
8686         if (!kvm_x86_ops.set_apic_access_page_addr)
8687                 return;
8688
8689         kvm_x86_ops.set_apic_access_page_addr(vcpu);
8690 }
8691
8692 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
8693 {
8694         smp_send_reschedule(vcpu->cpu);
8695 }
8696 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
8697
8698 /*
8699  * Returns 1 to let vcpu_run() continue the guest execution loop without
8700  * exiting to the userspace.  Otherwise, the value will be returned to the
8701  * userspace.
8702  */
8703 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
8704 {
8705         int r;
8706         bool req_int_win =
8707                 dm_request_for_irq_injection(vcpu) &&
8708                 kvm_cpu_accept_dm_intr(vcpu);
8709         fastpath_t exit_fastpath;
8710
8711         bool req_immediate_exit = false;
8712
8713         if (kvm_request_pending(vcpu)) {
8714                 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu)) {
8715                         if (unlikely(!kvm_x86_ops.nested_ops->get_nested_state_pages(vcpu))) {
8716                                 r = 0;
8717                                 goto out;
8718                         }
8719                 }
8720                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
8721                         kvm_mmu_unload(vcpu);
8722                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
8723                         __kvm_migrate_timers(vcpu);
8724                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
8725                         kvm_gen_update_masterclock(vcpu->kvm);
8726                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
8727                         kvm_gen_kvmclock_update(vcpu);
8728                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
8729                         r = kvm_guest_time_update(vcpu);
8730                         if (unlikely(r))
8731                                 goto out;
8732                 }
8733                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
8734                         kvm_mmu_sync_roots(vcpu);
8735                 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD, vcpu))
8736                         kvm_mmu_load_pgd(vcpu);
8737                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) {
8738                         kvm_vcpu_flush_tlb_all(vcpu);
8739
8740                         /* Flushing all ASIDs flushes the current ASID... */
8741                         kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
8742                 }
8743                 if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu))
8744                         kvm_vcpu_flush_tlb_current(vcpu);
8745                 if (kvm_check_request(KVM_REQ_HV_TLB_FLUSH, vcpu))
8746                         kvm_vcpu_flush_tlb_guest(vcpu);
8747
8748                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
8749                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
8750                         r = 0;
8751                         goto out;
8752                 }
8753                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
8754                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
8755                         vcpu->mmio_needed = 0;
8756                         r = 0;
8757                         goto out;
8758                 }
8759                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
8760                         /* Page is swapped out. Do synthetic halt */
8761                         vcpu->arch.apf.halted = true;
8762                         r = 1;
8763                         goto out;
8764                 }
8765                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
8766                         record_steal_time(vcpu);
8767                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
8768                         process_smi(vcpu);
8769                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
8770                         process_nmi(vcpu);
8771                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
8772                         kvm_pmu_handle_event(vcpu);
8773                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
8774                         kvm_pmu_deliver_pmi(vcpu);
8775                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
8776                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
8777                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
8778                                      vcpu->arch.ioapic_handled_vectors)) {
8779                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
8780                                 vcpu->run->eoi.vector =
8781                                                 vcpu->arch.pending_ioapic_eoi;
8782                                 r = 0;
8783                                 goto out;
8784                         }
8785                 }
8786                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
8787                         vcpu_scan_ioapic(vcpu);
8788                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
8789                         vcpu_load_eoi_exitmap(vcpu);
8790                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
8791                         kvm_vcpu_reload_apic_access_page(vcpu);
8792                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
8793                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
8794                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
8795                         r = 0;
8796                         goto out;
8797                 }
8798                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
8799                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
8800                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
8801                         r = 0;
8802                         goto out;
8803                 }
8804                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
8805                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
8806                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
8807                         r = 0;
8808                         goto out;
8809                 }
8810
8811                 /*
8812                  * KVM_REQ_HV_STIMER has to be processed after
8813                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
8814                  * depend on the guest clock being up-to-date
8815                  */
8816                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
8817                         kvm_hv_process_stimers(vcpu);
8818                 if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu))
8819                         kvm_vcpu_update_apicv(vcpu);
8820                 if (kvm_check_request(KVM_REQ_APF_READY, vcpu))
8821                         kvm_check_async_pf_completion(vcpu);
8822                 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED, vcpu))
8823                         kvm_x86_ops.msr_filter_changed(vcpu);
8824         }
8825
8826         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
8827                 ++vcpu->stat.req_event;
8828                 kvm_apic_accept_events(vcpu);
8829                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
8830                         r = 1;
8831                         goto out;
8832                 }
8833
8834                 inject_pending_event(vcpu, &req_immediate_exit);
8835                 if (req_int_win)
8836                         kvm_x86_ops.enable_irq_window(vcpu);
8837
8838                 if (kvm_lapic_enabled(vcpu)) {
8839                         update_cr8_intercept(vcpu);
8840                         kvm_lapic_sync_to_vapic(vcpu);
8841                 }
8842         }
8843
8844         r = kvm_mmu_reload(vcpu);
8845         if (unlikely(r)) {
8846                 goto cancel_injection;
8847         }
8848
8849         preempt_disable();
8850
8851         kvm_x86_ops.prepare_guest_switch(vcpu);
8852
8853         /*
8854          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
8855          * IPI are then delayed after guest entry, which ensures that they
8856          * result in virtual interrupt delivery.
8857          */
8858         local_irq_disable();
8859         vcpu->mode = IN_GUEST_MODE;
8860
8861         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
8862
8863         /*
8864          * 1) We should set ->mode before checking ->requests.  Please see
8865          * the comment in kvm_vcpu_exiting_guest_mode().
8866          *
8867          * 2) For APICv, we should set ->mode before checking PID.ON. This
8868          * pairs with the memory barrier implicit in pi_test_and_set_on
8869          * (see vmx_deliver_posted_interrupt).
8870          *
8871          * 3) This also orders the write to mode from any reads to the page
8872          * tables done while the VCPU is running.  Please see the comment
8873          * in kvm_flush_remote_tlbs.
8874          */
8875         smp_mb__after_srcu_read_unlock();
8876
8877         /*
8878          * This handles the case where a posted interrupt was
8879          * notified with kvm_vcpu_kick.
8880          */
8881         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
8882                 kvm_x86_ops.sync_pir_to_irr(vcpu);
8883
8884         if (kvm_vcpu_exit_request(vcpu)) {
8885                 vcpu->mode = OUTSIDE_GUEST_MODE;
8886                 smp_wmb();
8887                 local_irq_enable();
8888                 preempt_enable();
8889                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8890                 r = 1;
8891                 goto cancel_injection;
8892         }
8893
8894         if (req_immediate_exit) {
8895                 kvm_make_request(KVM_REQ_EVENT, vcpu);
8896                 kvm_x86_ops.request_immediate_exit(vcpu);
8897         }
8898
8899         trace_kvm_entry(vcpu);
8900
8901         fpregs_assert_state_consistent();
8902         if (test_thread_flag(TIF_NEED_FPU_LOAD))
8903                 switch_fpu_return();
8904
8905         if (unlikely(vcpu->arch.switch_db_regs)) {
8906                 set_debugreg(0, 7);
8907                 set_debugreg(vcpu->arch.eff_db[0], 0);
8908                 set_debugreg(vcpu->arch.eff_db[1], 1);
8909                 set_debugreg(vcpu->arch.eff_db[2], 2);
8910                 set_debugreg(vcpu->arch.eff_db[3], 3);
8911                 set_debugreg(vcpu->arch.dr6, 6);
8912                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
8913         }
8914
8915         exit_fastpath = kvm_x86_ops.run(vcpu);
8916
8917         /*
8918          * Do this here before restoring debug registers on the host.  And
8919          * since we do this before handling the vmexit, a DR access vmexit
8920          * can (a) read the correct value of the debug registers, (b) set
8921          * KVM_DEBUGREG_WONT_EXIT again.
8922          */
8923         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
8924                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
8925                 kvm_x86_ops.sync_dirty_debug_regs(vcpu);
8926                 kvm_update_dr0123(vcpu);
8927                 kvm_update_dr7(vcpu);
8928                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
8929         }
8930
8931         /*
8932          * If the guest has used debug registers, at least dr7
8933          * will be disabled while returning to the host.
8934          * If we don't have active breakpoints in the host, we don't
8935          * care about the messed up debug address registers. But if
8936          * we have some of them active, restore the old state.
8937          */
8938         if (hw_breakpoint_active())
8939                 hw_breakpoint_restore();
8940
8941         vcpu->arch.last_vmentry_cpu = vcpu->cpu;
8942         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
8943
8944         vcpu->mode = OUTSIDE_GUEST_MODE;
8945         smp_wmb();
8946
8947         kvm_x86_ops.handle_exit_irqoff(vcpu);
8948
8949         /*
8950          * Consume any pending interrupts, including the possible source of
8951          * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
8952          * An instruction is required after local_irq_enable() to fully unblock
8953          * interrupts on processors that implement an interrupt shadow, the
8954          * stat.exits increment will do nicely.
8955          */
8956         kvm_before_interrupt(vcpu);
8957         local_irq_enable();
8958         ++vcpu->stat.exits;
8959         local_irq_disable();
8960         kvm_after_interrupt(vcpu);
8961
8962         if (lapic_in_kernel(vcpu)) {
8963                 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
8964                 if (delta != S64_MIN) {
8965                         trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
8966                         vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
8967                 }
8968         }
8969
8970         local_irq_enable();
8971         preempt_enable();
8972
8973         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8974
8975         /*
8976          * Profile KVM exit RIPs:
8977          */
8978         if (unlikely(prof_on == KVM_PROFILING)) {
8979                 unsigned long rip = kvm_rip_read(vcpu);
8980                 profile_hit(KVM_PROFILING, (void *)rip);
8981         }
8982
8983         if (unlikely(vcpu->arch.tsc_always_catchup))
8984                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8985
8986         if (vcpu->arch.apic_attention)
8987                 kvm_lapic_sync_from_vapic(vcpu);
8988
8989         r = kvm_x86_ops.handle_exit(vcpu, exit_fastpath);
8990         return r;
8991
8992 cancel_injection:
8993         if (req_immediate_exit)
8994                 kvm_make_request(KVM_REQ_EVENT, vcpu);
8995         kvm_x86_ops.cancel_injection(vcpu);
8996         if (unlikely(vcpu->arch.apic_attention))
8997                 kvm_lapic_sync_from_vapic(vcpu);
8998 out:
8999         return r;
9000 }
9001
9002 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
9003 {
9004         if (!kvm_arch_vcpu_runnable(vcpu) &&
9005             (!kvm_x86_ops.pre_block || kvm_x86_ops.pre_block(vcpu) == 0)) {
9006                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9007                 kvm_vcpu_block(vcpu);
9008                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9009
9010                 if (kvm_x86_ops.post_block)
9011                         kvm_x86_ops.post_block(vcpu);
9012
9013                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
9014                         return 1;
9015         }
9016
9017         kvm_apic_accept_events(vcpu);
9018         switch(vcpu->arch.mp_state) {
9019         case KVM_MP_STATE_HALTED:
9020                 vcpu->arch.pv.pv_unhalted = false;
9021                 vcpu->arch.mp_state =
9022                         KVM_MP_STATE_RUNNABLE;
9023                 fallthrough;
9024         case KVM_MP_STATE_RUNNABLE:
9025                 vcpu->arch.apf.halted = false;
9026                 break;
9027         case KVM_MP_STATE_INIT_RECEIVED:
9028                 break;
9029         default:
9030                 return -EINTR;
9031         }
9032         return 1;
9033 }
9034
9035 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
9036 {
9037         if (is_guest_mode(vcpu))
9038                 kvm_x86_ops.nested_ops->check_events(vcpu);
9039
9040         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
9041                 !vcpu->arch.apf.halted);
9042 }
9043
9044 static int vcpu_run(struct kvm_vcpu *vcpu)
9045 {
9046         int r;
9047         struct kvm *kvm = vcpu->kvm;
9048
9049         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9050         vcpu->arch.l1tf_flush_l1d = true;
9051
9052         for (;;) {
9053                 if (kvm_vcpu_running(vcpu)) {
9054                         r = vcpu_enter_guest(vcpu);
9055                 } else {
9056                         r = vcpu_block(kvm, vcpu);
9057                 }
9058
9059                 if (r <= 0)
9060                         break;
9061
9062                 kvm_clear_request(KVM_REQ_PENDING_TIMER, vcpu);
9063                 if (kvm_cpu_has_pending_timer(vcpu))
9064                         kvm_inject_pending_timer_irqs(vcpu);
9065
9066                 if (dm_request_for_irq_injection(vcpu) &&
9067                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
9068                         r = 0;
9069                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
9070                         ++vcpu->stat.request_irq_exits;
9071                         break;
9072                 }
9073
9074                 if (__xfer_to_guest_mode_work_pending()) {
9075                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9076                         r = xfer_to_guest_mode_handle_work(vcpu);
9077                         if (r)
9078                                 return r;
9079                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9080                 }
9081         }
9082
9083         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9084
9085         return r;
9086 }
9087
9088 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
9089 {
9090         int r;
9091
9092         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9093         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
9094         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9095         return r;
9096 }
9097
9098 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
9099 {
9100         BUG_ON(!vcpu->arch.pio.count);
9101
9102         return complete_emulated_io(vcpu);
9103 }
9104
9105 /*
9106  * Implements the following, as a state machine:
9107  *
9108  * read:
9109  *   for each fragment
9110  *     for each mmio piece in the fragment
9111  *       write gpa, len
9112  *       exit
9113  *       copy data
9114  *   execute insn
9115  *
9116  * write:
9117  *   for each fragment
9118  *     for each mmio piece in the fragment
9119  *       write gpa, len
9120  *       copy data
9121  *       exit
9122  */
9123 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
9124 {
9125         struct kvm_run *run = vcpu->run;
9126         struct kvm_mmio_fragment *frag;
9127         unsigned len;
9128
9129         BUG_ON(!vcpu->mmio_needed);
9130
9131         /* Complete previous fragment */
9132         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
9133         len = min(8u, frag->len);
9134         if (!vcpu->mmio_is_write)
9135                 memcpy(frag->data, run->mmio.data, len);
9136
9137         if (frag->len <= 8) {
9138                 /* Switch to the next fragment. */
9139                 frag++;
9140                 vcpu->mmio_cur_fragment++;
9141         } else {
9142                 /* Go forward to the next mmio piece. */
9143                 frag->data += len;
9144                 frag->gpa += len;
9145                 frag->len -= len;
9146         }
9147
9148         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
9149                 vcpu->mmio_needed = 0;
9150
9151                 /* FIXME: return into emulator if single-stepping.  */
9152                 if (vcpu->mmio_is_write)
9153                         return 1;
9154                 vcpu->mmio_read_completed = 1;
9155                 return complete_emulated_io(vcpu);
9156         }
9157
9158         run->exit_reason = KVM_EXIT_MMIO;
9159         run->mmio.phys_addr = frag->gpa;
9160         if (vcpu->mmio_is_write)
9161                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
9162         run->mmio.len = min(8u, frag->len);
9163         run->mmio.is_write = vcpu->mmio_is_write;
9164         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
9165         return 0;
9166 }
9167
9168 static void kvm_save_current_fpu(struct fpu *fpu)
9169 {
9170         /*
9171          * If the target FPU state is not resident in the CPU registers, just
9172          * memcpy() from current, else save CPU state directly to the target.
9173          */
9174         if (test_thread_flag(TIF_NEED_FPU_LOAD))
9175                 memcpy(&fpu->state, &current->thread.fpu.state,
9176                        fpu_kernel_xstate_size);
9177         else
9178                 copy_fpregs_to_fpstate(fpu);
9179 }
9180
9181 /* Swap (qemu) user FPU context for the guest FPU context. */
9182 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
9183 {
9184         fpregs_lock();
9185
9186         kvm_save_current_fpu(vcpu->arch.user_fpu);
9187
9188         /* PKRU is separately restored in kvm_x86_ops.run.  */
9189         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu->state,
9190                                 ~XFEATURE_MASK_PKRU);
9191
9192         fpregs_mark_activate();
9193         fpregs_unlock();
9194
9195         trace_kvm_fpu(1);
9196 }
9197
9198 /* When vcpu_run ends, restore user space FPU context. */
9199 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
9200 {
9201         fpregs_lock();
9202
9203         kvm_save_current_fpu(vcpu->arch.guest_fpu);
9204
9205         copy_kernel_to_fpregs(&vcpu->arch.user_fpu->state);
9206
9207         fpregs_mark_activate();
9208         fpregs_unlock();
9209
9210         ++vcpu->stat.fpu_reload;
9211         trace_kvm_fpu(0);
9212 }
9213
9214 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
9215 {
9216         struct kvm_run *kvm_run = vcpu->run;
9217         int r;
9218
9219         vcpu_load(vcpu);
9220         kvm_sigset_activate(vcpu);
9221         kvm_load_guest_fpu(vcpu);
9222
9223         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
9224                 if (kvm_run->immediate_exit) {
9225                         r = -EINTR;
9226                         goto out;
9227                 }
9228                 kvm_vcpu_block(vcpu);
9229                 kvm_apic_accept_events(vcpu);
9230                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
9231                 r = -EAGAIN;
9232                 if (signal_pending(current)) {
9233                         r = -EINTR;
9234                         kvm_run->exit_reason = KVM_EXIT_INTR;
9235                         ++vcpu->stat.signal_exits;
9236                 }
9237                 goto out;
9238         }
9239
9240         if (kvm_run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) {
9241                 r = -EINVAL;
9242                 goto out;
9243         }
9244
9245         if (kvm_run->kvm_dirty_regs) {
9246                 r = sync_regs(vcpu);
9247                 if (r != 0)
9248                         goto out;
9249         }
9250
9251         /* re-sync apic's tpr */
9252         if (!lapic_in_kernel(vcpu)) {
9253                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
9254                         r = -EINVAL;
9255                         goto out;
9256                 }
9257         }
9258
9259         if (unlikely(vcpu->arch.complete_userspace_io)) {
9260                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
9261                 vcpu->arch.complete_userspace_io = NULL;
9262                 r = cui(vcpu);
9263                 if (r <= 0)
9264                         goto out;
9265         } else
9266                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
9267
9268         if (kvm_run->immediate_exit)
9269                 r = -EINTR;
9270         else
9271                 r = vcpu_run(vcpu);
9272
9273 out:
9274         kvm_put_guest_fpu(vcpu);
9275         if (kvm_run->kvm_valid_regs)
9276                 store_regs(vcpu);
9277         post_kvm_run_save(vcpu);
9278         kvm_sigset_deactivate(vcpu);
9279
9280         vcpu_put(vcpu);
9281         return r;
9282 }
9283
9284 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9285 {
9286         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
9287                 /*
9288                  * We are here if userspace calls get_regs() in the middle of
9289                  * instruction emulation. Registers state needs to be copied
9290                  * back from emulation context to vcpu. Userspace shouldn't do
9291                  * that usually, but some bad designed PV devices (vmware
9292                  * backdoor interface) need this to work
9293                  */
9294                 emulator_writeback_register_cache(vcpu->arch.emulate_ctxt);
9295                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
9296         }
9297         regs->rax = kvm_rax_read(vcpu);
9298         regs->rbx = kvm_rbx_read(vcpu);
9299         regs->rcx = kvm_rcx_read(vcpu);
9300         regs->rdx = kvm_rdx_read(vcpu);
9301         regs->rsi = kvm_rsi_read(vcpu);
9302         regs->rdi = kvm_rdi_read(vcpu);
9303         regs->rsp = kvm_rsp_read(vcpu);
9304         regs->rbp = kvm_rbp_read(vcpu);
9305 #ifdef CONFIG_X86_64
9306         regs->r8 = kvm_r8_read(vcpu);
9307         regs->r9 = kvm_r9_read(vcpu);
9308         regs->r10 = kvm_r10_read(vcpu);
9309         regs->r11 = kvm_r11_read(vcpu);
9310         regs->r12 = kvm_r12_read(vcpu);
9311         regs->r13 = kvm_r13_read(vcpu);
9312         regs->r14 = kvm_r14_read(vcpu);
9313         regs->r15 = kvm_r15_read(vcpu);
9314 #endif
9315
9316         regs->rip = kvm_rip_read(vcpu);
9317         regs->rflags = kvm_get_rflags(vcpu);
9318 }
9319
9320 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9321 {
9322         vcpu_load(vcpu);
9323         __get_regs(vcpu, regs);
9324         vcpu_put(vcpu);
9325         return 0;
9326 }
9327
9328 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9329 {
9330         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
9331         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
9332
9333         kvm_rax_write(vcpu, regs->rax);
9334         kvm_rbx_write(vcpu, regs->rbx);
9335         kvm_rcx_write(vcpu, regs->rcx);
9336         kvm_rdx_write(vcpu, regs->rdx);
9337         kvm_rsi_write(vcpu, regs->rsi);
9338         kvm_rdi_write(vcpu, regs->rdi);
9339         kvm_rsp_write(vcpu, regs->rsp);
9340         kvm_rbp_write(vcpu, regs->rbp);
9341 #ifdef CONFIG_X86_64
9342         kvm_r8_write(vcpu, regs->r8);
9343         kvm_r9_write(vcpu, regs->r9);
9344         kvm_r10_write(vcpu, regs->r10);
9345         kvm_r11_write(vcpu, regs->r11);
9346         kvm_r12_write(vcpu, regs->r12);
9347         kvm_r13_write(vcpu, regs->r13);
9348         kvm_r14_write(vcpu, regs->r14);
9349         kvm_r15_write(vcpu, regs->r15);
9350 #endif
9351
9352         kvm_rip_write(vcpu, regs->rip);
9353         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
9354
9355         vcpu->arch.exception.pending = false;
9356
9357         kvm_make_request(KVM_REQ_EVENT, vcpu);
9358 }
9359
9360 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9361 {
9362         vcpu_load(vcpu);
9363         __set_regs(vcpu, regs);
9364         vcpu_put(vcpu);
9365         return 0;
9366 }
9367
9368 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
9369 {
9370         struct kvm_segment cs;
9371
9372         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
9373         *db = cs.db;
9374         *l = cs.l;
9375 }
9376 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
9377
9378 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9379 {
9380         struct desc_ptr dt;
9381
9382         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
9383         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
9384         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
9385         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
9386         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
9387         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
9388
9389         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
9390         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
9391
9392         kvm_x86_ops.get_idt(vcpu, &dt);
9393         sregs->idt.limit = dt.size;
9394         sregs->idt.base = dt.address;
9395         kvm_x86_ops.get_gdt(vcpu, &dt);
9396         sregs->gdt.limit = dt.size;
9397         sregs->gdt.base = dt.address;
9398
9399         sregs->cr0 = kvm_read_cr0(vcpu);
9400         sregs->cr2 = vcpu->arch.cr2;
9401         sregs->cr3 = kvm_read_cr3(vcpu);
9402         sregs->cr4 = kvm_read_cr4(vcpu);
9403         sregs->cr8 = kvm_get_cr8(vcpu);
9404         sregs->efer = vcpu->arch.efer;
9405         sregs->apic_base = kvm_get_apic_base(vcpu);
9406
9407         memset(sregs->interrupt_bitmap, 0, sizeof(sregs->interrupt_bitmap));
9408
9409         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
9410                 set_bit(vcpu->arch.interrupt.nr,
9411                         (unsigned long *)sregs->interrupt_bitmap);
9412 }
9413
9414 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
9415                                   struct kvm_sregs *sregs)
9416 {
9417         vcpu_load(vcpu);
9418         __get_sregs(vcpu, sregs);
9419         vcpu_put(vcpu);
9420         return 0;
9421 }
9422
9423 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
9424                                     struct kvm_mp_state *mp_state)
9425 {
9426         vcpu_load(vcpu);
9427         if (kvm_mpx_supported())
9428                 kvm_load_guest_fpu(vcpu);
9429
9430         kvm_apic_accept_events(vcpu);
9431         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
9432                                         vcpu->arch.pv.pv_unhalted)
9433                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
9434         else
9435                 mp_state->mp_state = vcpu->arch.mp_state;
9436
9437         if (kvm_mpx_supported())
9438                 kvm_put_guest_fpu(vcpu);
9439         vcpu_put(vcpu);
9440         return 0;
9441 }
9442
9443 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
9444                                     struct kvm_mp_state *mp_state)
9445 {
9446         int ret = -EINVAL;
9447
9448         vcpu_load(vcpu);
9449
9450         if (!lapic_in_kernel(vcpu) &&
9451             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
9452                 goto out;
9453
9454         /*
9455          * KVM_MP_STATE_INIT_RECEIVED means the processor is in
9456          * INIT state; latched init should be reported using
9457          * KVM_SET_VCPU_EVENTS, so reject it here.
9458          */
9459         if ((kvm_vcpu_latch_init(vcpu) || vcpu->arch.smi_pending) &&
9460             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
9461              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
9462                 goto out;
9463
9464         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
9465                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
9466                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
9467         } else
9468                 vcpu->arch.mp_state = mp_state->mp_state;
9469         kvm_make_request(KVM_REQ_EVENT, vcpu);
9470
9471         ret = 0;
9472 out:
9473         vcpu_put(vcpu);
9474         return ret;
9475 }
9476
9477 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
9478                     int reason, bool has_error_code, u32 error_code)
9479 {
9480         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
9481         int ret;
9482
9483         init_emulate_ctxt(vcpu);
9484
9485         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
9486                                    has_error_code, error_code);
9487         if (ret) {
9488                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
9489                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
9490                 vcpu->run->internal.ndata = 0;
9491                 return 0;
9492         }
9493
9494         kvm_rip_write(vcpu, ctxt->eip);
9495         kvm_set_rflags(vcpu, ctxt->eflags);
9496         return 1;
9497 }
9498 EXPORT_SYMBOL_GPL(kvm_task_switch);
9499
9500 static int kvm_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9501 {
9502         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
9503                 /*
9504                  * When EFER.LME and CR0.PG are set, the processor is in
9505                  * 64-bit mode (though maybe in a 32-bit code segment).
9506                  * CR4.PAE and EFER.LMA must be set.
9507                  */
9508                 if (!(sregs->cr4 & X86_CR4_PAE)
9509                     || !(sregs->efer & EFER_LMA))
9510                         return -EINVAL;
9511         } else {
9512                 /*
9513                  * Not in 64-bit mode: EFER.LMA is clear and the code
9514                  * segment cannot be 64-bit.
9515                  */
9516                 if (sregs->efer & EFER_LMA || sregs->cs.l)
9517                         return -EINVAL;
9518         }
9519
9520         return kvm_valid_cr4(vcpu, sregs->cr4);
9521 }
9522
9523 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9524 {
9525         struct msr_data apic_base_msr;
9526         int mmu_reset_needed = 0;
9527         int cpuid_update_needed = 0;
9528         int pending_vec, max_bits, idx;
9529         struct desc_ptr dt;
9530         int ret = -EINVAL;
9531
9532         if (kvm_valid_sregs(vcpu, sregs))
9533                 goto out;
9534
9535         apic_base_msr.data = sregs->apic_base;
9536         apic_base_msr.host_initiated = true;
9537         if (kvm_set_apic_base(vcpu, &apic_base_msr))
9538                 goto out;
9539
9540         dt.size = sregs->idt.limit;
9541         dt.address = sregs->idt.base;
9542         kvm_x86_ops.set_idt(vcpu, &dt);
9543         dt.size = sregs->gdt.limit;
9544         dt.address = sregs->gdt.base;
9545         kvm_x86_ops.set_gdt(vcpu, &dt);
9546
9547         vcpu->arch.cr2 = sregs->cr2;
9548         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
9549         vcpu->arch.cr3 = sregs->cr3;
9550         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
9551
9552         kvm_set_cr8(vcpu, sregs->cr8);
9553
9554         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
9555         kvm_x86_ops.set_efer(vcpu, sregs->efer);
9556
9557         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
9558         kvm_x86_ops.set_cr0(vcpu, sregs->cr0);
9559         vcpu->arch.cr0 = sregs->cr0;
9560
9561         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
9562         cpuid_update_needed |= ((kvm_read_cr4(vcpu) ^ sregs->cr4) &
9563                                 (X86_CR4_OSXSAVE | X86_CR4_PKE));
9564         kvm_x86_ops.set_cr4(vcpu, sregs->cr4);
9565         if (cpuid_update_needed)
9566                 kvm_update_cpuid_runtime(vcpu);
9567
9568         idx = srcu_read_lock(&vcpu->kvm->srcu);
9569         if (is_pae_paging(vcpu)) {
9570                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
9571                 mmu_reset_needed = 1;
9572         }
9573         srcu_read_unlock(&vcpu->kvm->srcu, idx);
9574
9575         if (mmu_reset_needed)
9576                 kvm_mmu_reset_context(vcpu);
9577
9578         max_bits = KVM_NR_INTERRUPTS;
9579         pending_vec = find_first_bit(
9580                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
9581         if (pending_vec < max_bits) {
9582                 kvm_queue_interrupt(vcpu, pending_vec, false);
9583                 pr_debug("Set back pending irq %d\n", pending_vec);
9584         }
9585
9586         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
9587         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
9588         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
9589         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
9590         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
9591         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
9592
9593         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
9594         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
9595
9596         update_cr8_intercept(vcpu);
9597
9598         /* Older userspace won't unhalt the vcpu on reset. */
9599         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
9600             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
9601             !is_protmode(vcpu))
9602                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9603
9604         kvm_make_request(KVM_REQ_EVENT, vcpu);
9605
9606         ret = 0;
9607 out:
9608         return ret;
9609 }
9610
9611 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
9612                                   struct kvm_sregs *sregs)
9613 {
9614         int ret;
9615
9616         vcpu_load(vcpu);
9617         ret = __set_sregs(vcpu, sregs);
9618         vcpu_put(vcpu);
9619         return ret;
9620 }
9621
9622 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
9623                                         struct kvm_guest_debug *dbg)
9624 {
9625         unsigned long rflags;
9626         int i, r;
9627
9628         vcpu_load(vcpu);
9629
9630         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
9631                 r = -EBUSY;
9632                 if (vcpu->arch.exception.pending)
9633                         goto out;
9634                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
9635                         kvm_queue_exception(vcpu, DB_VECTOR);
9636                 else
9637                         kvm_queue_exception(vcpu, BP_VECTOR);
9638         }
9639
9640         /*
9641          * Read rflags as long as potentially injected trace flags are still
9642          * filtered out.
9643          */
9644         rflags = kvm_get_rflags(vcpu);
9645
9646         vcpu->guest_debug = dbg->control;
9647         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
9648                 vcpu->guest_debug = 0;
9649
9650         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
9651                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
9652                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
9653                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
9654         } else {
9655                 for (i = 0; i < KVM_NR_DB_REGS; i++)
9656                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
9657         }
9658         kvm_update_dr7(vcpu);
9659
9660         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
9661                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
9662                         get_segment_base(vcpu, VCPU_SREG_CS);
9663
9664         /*
9665          * Trigger an rflags update that will inject or remove the trace
9666          * flags.
9667          */
9668         kvm_set_rflags(vcpu, rflags);
9669
9670         kvm_x86_ops.update_exception_bitmap(vcpu);
9671
9672         r = 0;
9673
9674 out:
9675         vcpu_put(vcpu);
9676         return r;
9677 }
9678
9679 /*
9680  * Translate a guest virtual address to a guest physical address.
9681  */
9682 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
9683                                     struct kvm_translation *tr)
9684 {
9685         unsigned long vaddr = tr->linear_address;
9686         gpa_t gpa;
9687         int idx;
9688
9689         vcpu_load(vcpu);
9690
9691         idx = srcu_read_lock(&vcpu->kvm->srcu);
9692         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
9693         srcu_read_unlock(&vcpu->kvm->srcu, idx);
9694         tr->physical_address = gpa;
9695         tr->valid = gpa != UNMAPPED_GVA;
9696         tr->writeable = 1;
9697         tr->usermode = 0;
9698
9699         vcpu_put(vcpu);
9700         return 0;
9701 }
9702
9703 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
9704 {
9705         struct fxregs_state *fxsave;
9706
9707         vcpu_load(vcpu);
9708
9709         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
9710         memcpy(fpu->fpr, fxsave->st_space, 128);
9711         fpu->fcw = fxsave->cwd;
9712         fpu->fsw = fxsave->swd;
9713         fpu->ftwx = fxsave->twd;
9714         fpu->last_opcode = fxsave->fop;
9715         fpu->last_ip = fxsave->rip;
9716         fpu->last_dp = fxsave->rdp;
9717         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
9718
9719         vcpu_put(vcpu);
9720         return 0;
9721 }
9722
9723 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
9724 {
9725         struct fxregs_state *fxsave;
9726
9727         vcpu_load(vcpu);
9728
9729         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
9730
9731         memcpy(fxsave->st_space, fpu->fpr, 128);
9732         fxsave->cwd = fpu->fcw;
9733         fxsave->swd = fpu->fsw;
9734         fxsave->twd = fpu->ftwx;
9735         fxsave->fop = fpu->last_opcode;
9736         fxsave->rip = fpu->last_ip;
9737         fxsave->rdp = fpu->last_dp;
9738         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
9739
9740         vcpu_put(vcpu);
9741         return 0;
9742 }
9743
9744 static void store_regs(struct kvm_vcpu *vcpu)
9745 {
9746         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
9747
9748         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
9749                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
9750
9751         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
9752                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
9753
9754         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
9755                 kvm_vcpu_ioctl_x86_get_vcpu_events(
9756                                 vcpu, &vcpu->run->s.regs.events);
9757 }
9758
9759 static int sync_regs(struct kvm_vcpu *vcpu)
9760 {
9761         if (vcpu->run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)
9762                 return -EINVAL;
9763
9764         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
9765                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
9766                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
9767         }
9768         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
9769                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
9770                         return -EINVAL;
9771                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
9772         }
9773         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
9774                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
9775                                 vcpu, &vcpu->run->s.regs.events))
9776                         return -EINVAL;
9777                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
9778         }
9779
9780         return 0;
9781 }
9782
9783 static void fx_init(struct kvm_vcpu *vcpu)
9784 {
9785         fpstate_init(&vcpu->arch.guest_fpu->state);
9786         if (boot_cpu_has(X86_FEATURE_XSAVES))
9787                 vcpu->arch.guest_fpu->state.xsave.header.xcomp_bv =
9788                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
9789
9790         /*
9791          * Ensure guest xcr0 is valid for loading
9792          */
9793         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
9794
9795         vcpu->arch.cr0 |= X86_CR0_ET;
9796 }
9797
9798 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
9799 {
9800         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
9801                 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
9802                              "guest TSC will not be reliable\n");
9803
9804         return 0;
9805 }
9806
9807 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
9808 {
9809         struct page *page;
9810         int r;
9811
9812         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
9813                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9814         else
9815                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
9816
9817         kvm_set_tsc_khz(vcpu, max_tsc_khz);
9818
9819         r = kvm_mmu_create(vcpu);
9820         if (r < 0)
9821                 return r;
9822
9823         if (irqchip_in_kernel(vcpu->kvm)) {
9824                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
9825                 if (r < 0)
9826                         goto fail_mmu_destroy;
9827                 if (kvm_apicv_activated(vcpu->kvm))
9828                         vcpu->arch.apicv_active = true;
9829         } else
9830                 static_key_slow_inc(&kvm_no_apic_vcpu);
9831
9832         r = -ENOMEM;
9833
9834         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
9835         if (!page)
9836                 goto fail_free_lapic;
9837         vcpu->arch.pio_data = page_address(page);
9838
9839         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
9840                                        GFP_KERNEL_ACCOUNT);
9841         if (!vcpu->arch.mce_banks)
9842                 goto fail_free_pio_data;
9843         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
9844
9845         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
9846                                 GFP_KERNEL_ACCOUNT))
9847                 goto fail_free_mce_banks;
9848
9849         if (!alloc_emulate_ctxt(vcpu))
9850                 goto free_wbinvd_dirty_mask;
9851
9852         vcpu->arch.user_fpu = kmem_cache_zalloc(x86_fpu_cache,
9853                                                 GFP_KERNEL_ACCOUNT);
9854         if (!vcpu->arch.user_fpu) {
9855                 pr_err("kvm: failed to allocate userspace's fpu\n");
9856                 goto free_emulate_ctxt;
9857         }
9858
9859         vcpu->arch.guest_fpu = kmem_cache_zalloc(x86_fpu_cache,
9860                                                  GFP_KERNEL_ACCOUNT);
9861         if (!vcpu->arch.guest_fpu) {
9862                 pr_err("kvm: failed to allocate vcpu's fpu\n");
9863                 goto free_user_fpu;
9864         }
9865         fx_init(vcpu);
9866
9867         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
9868
9869         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
9870
9871         kvm_async_pf_hash_reset(vcpu);
9872         kvm_pmu_init(vcpu);
9873
9874         vcpu->arch.pending_external_vector = -1;
9875         vcpu->arch.preempted_in_kernel = false;
9876
9877         kvm_hv_vcpu_init(vcpu);
9878
9879         r = kvm_x86_ops.vcpu_create(vcpu);
9880         if (r)
9881                 goto free_guest_fpu;
9882
9883         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
9884         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
9885         kvm_vcpu_mtrr_init(vcpu);
9886         vcpu_load(vcpu);
9887         kvm_vcpu_reset(vcpu, false);
9888         kvm_init_mmu(vcpu, false);
9889         vcpu_put(vcpu);
9890         return 0;
9891
9892 free_guest_fpu:
9893         kmem_cache_free(x86_fpu_cache, vcpu->arch.guest_fpu);
9894 free_user_fpu:
9895         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
9896 free_emulate_ctxt:
9897         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
9898 free_wbinvd_dirty_mask:
9899         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
9900 fail_free_mce_banks:
9901         kfree(vcpu->arch.mce_banks);
9902 fail_free_pio_data:
9903         free_page((unsigned long)vcpu->arch.pio_data);
9904 fail_free_lapic:
9905         kvm_free_lapic(vcpu);
9906 fail_mmu_destroy:
9907         kvm_mmu_destroy(vcpu);
9908         return r;
9909 }
9910
9911 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
9912 {
9913         struct kvm *kvm = vcpu->kvm;
9914
9915         kvm_hv_vcpu_postcreate(vcpu);
9916
9917         if (mutex_lock_killable(&vcpu->mutex))
9918                 return;
9919         vcpu_load(vcpu);
9920         kvm_synchronize_tsc(vcpu, 0);
9921         vcpu_put(vcpu);
9922
9923         /* poll control enabled by default */
9924         vcpu->arch.msr_kvm_poll_control = 1;
9925
9926         mutex_unlock(&vcpu->mutex);
9927
9928         if (kvmclock_periodic_sync && vcpu->vcpu_idx == 0)
9929                 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
9930                                                 KVMCLOCK_SYNC_PERIOD);
9931 }
9932
9933 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
9934 {
9935         struct gfn_to_pfn_cache *cache = &vcpu->arch.st.cache;
9936         int idx;
9937
9938         kvm_release_pfn(cache->pfn, cache->dirty, cache);
9939
9940         kvmclock_reset(vcpu);
9941
9942         kvm_x86_ops.vcpu_free(vcpu);
9943
9944         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
9945         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
9946         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
9947         kmem_cache_free(x86_fpu_cache, vcpu->arch.guest_fpu);
9948
9949         kvm_hv_vcpu_uninit(vcpu);
9950         kvm_pmu_destroy(vcpu);
9951         kfree(vcpu->arch.mce_banks);
9952         kvm_free_lapic(vcpu);
9953         idx = srcu_read_lock(&vcpu->kvm->srcu);
9954         kvm_mmu_destroy(vcpu);
9955         srcu_read_unlock(&vcpu->kvm->srcu, idx);
9956         free_page((unsigned long)vcpu->arch.pio_data);
9957         kvfree(vcpu->arch.cpuid_entries);
9958         if (!lapic_in_kernel(vcpu))
9959                 static_key_slow_dec(&kvm_no_apic_vcpu);
9960 }
9961
9962 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
9963 {
9964         kvm_lapic_reset(vcpu, init_event);
9965
9966         vcpu->arch.hflags = 0;
9967
9968         vcpu->arch.smi_pending = 0;
9969         vcpu->arch.smi_count = 0;
9970         atomic_set(&vcpu->arch.nmi_queued, 0);
9971         vcpu->arch.nmi_pending = 0;
9972         vcpu->arch.nmi_injected = false;
9973         kvm_clear_interrupt_queue(vcpu);
9974         kvm_clear_exception_queue(vcpu);
9975
9976         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
9977         kvm_update_dr0123(vcpu);
9978         vcpu->arch.dr6 = DR6_INIT;
9979         vcpu->arch.dr7 = DR7_FIXED_1;
9980         kvm_update_dr7(vcpu);
9981
9982         vcpu->arch.cr2 = 0;
9983
9984         kvm_make_request(KVM_REQ_EVENT, vcpu);
9985         vcpu->arch.apf.msr_en_val = 0;
9986         vcpu->arch.apf.msr_int_val = 0;
9987         vcpu->arch.st.msr_val = 0;
9988
9989         kvmclock_reset(vcpu);
9990
9991         kvm_clear_async_pf_completion_queue(vcpu);
9992         kvm_async_pf_hash_reset(vcpu);
9993         vcpu->arch.apf.halted = false;
9994
9995         if (kvm_mpx_supported()) {
9996                 void *mpx_state_buffer;
9997
9998                 /*
9999                  * To avoid have the INIT path from kvm_apic_has_events() that be
10000                  * called with loaded FPU and does not let userspace fix the state.
10001                  */
10002                 if (init_event)
10003                         kvm_put_guest_fpu(vcpu);
10004                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10005                                         XFEATURE_BNDREGS);
10006                 if (mpx_state_buffer)
10007                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
10008                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10009                                         XFEATURE_BNDCSR);
10010                 if (mpx_state_buffer)
10011                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
10012                 if (init_event)
10013                         kvm_load_guest_fpu(vcpu);
10014         }
10015
10016         if (!init_event) {
10017                 kvm_pmu_reset(vcpu);
10018                 vcpu->arch.smbase = 0x30000;
10019
10020                 vcpu->arch.msr_misc_features_enables = 0;
10021
10022                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10023         }
10024
10025         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
10026         vcpu->arch.regs_avail = ~0;
10027         vcpu->arch.regs_dirty = ~0;
10028
10029         vcpu->arch.ia32_xss = 0;
10030
10031         kvm_x86_ops.vcpu_reset(vcpu, init_event);
10032 }
10033
10034 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
10035 {
10036         struct kvm_segment cs;
10037
10038         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
10039         cs.selector = vector << 8;
10040         cs.base = vector << 12;
10041         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
10042         kvm_rip_write(vcpu, 0);
10043 }
10044
10045 int kvm_arch_hardware_enable(void)
10046 {
10047         struct kvm *kvm;
10048         struct kvm_vcpu *vcpu;
10049         int i;
10050         int ret;
10051         u64 local_tsc;
10052         u64 max_tsc = 0;
10053         bool stable, backwards_tsc = false;
10054
10055         kvm_user_return_msr_cpu_online();
10056         ret = kvm_x86_ops.hardware_enable();
10057         if (ret != 0)
10058                 return ret;
10059
10060         local_tsc = rdtsc();
10061         stable = !kvm_check_tsc_unstable();
10062         list_for_each_entry(kvm, &vm_list, vm_list) {
10063                 kvm_for_each_vcpu(i, vcpu, kvm) {
10064                         if (!stable && vcpu->cpu == smp_processor_id())
10065                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
10066                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
10067                                 backwards_tsc = true;
10068                                 if (vcpu->arch.last_host_tsc > max_tsc)
10069                                         max_tsc = vcpu->arch.last_host_tsc;
10070                         }
10071                 }
10072         }
10073
10074         /*
10075          * Sometimes, even reliable TSCs go backwards.  This happens on
10076          * platforms that reset TSC during suspend or hibernate actions, but
10077          * maintain synchronization.  We must compensate.  Fortunately, we can
10078          * detect that condition here, which happens early in CPU bringup,
10079          * before any KVM threads can be running.  Unfortunately, we can't
10080          * bring the TSCs fully up to date with real time, as we aren't yet far
10081          * enough into CPU bringup that we know how much real time has actually
10082          * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
10083          * variables that haven't been updated yet.
10084          *
10085          * So we simply find the maximum observed TSC above, then record the
10086          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
10087          * the adjustment will be applied.  Note that we accumulate
10088          * adjustments, in case multiple suspend cycles happen before some VCPU
10089          * gets a chance to run again.  In the event that no KVM threads get a
10090          * chance to run, we will miss the entire elapsed period, as we'll have
10091          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
10092          * loose cycle time.  This isn't too big a deal, since the loss will be
10093          * uniform across all VCPUs (not to mention the scenario is extremely
10094          * unlikely). It is possible that a second hibernate recovery happens
10095          * much faster than a first, causing the observed TSC here to be
10096          * smaller; this would require additional padding adjustment, which is
10097          * why we set last_host_tsc to the local tsc observed here.
10098          *
10099          * N.B. - this code below runs only on platforms with reliable TSC,
10100          * as that is the only way backwards_tsc is set above.  Also note
10101          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
10102          * have the same delta_cyc adjustment applied if backwards_tsc
10103          * is detected.  Note further, this adjustment is only done once,
10104          * as we reset last_host_tsc on all VCPUs to stop this from being
10105          * called multiple times (one for each physical CPU bringup).
10106          *
10107          * Platforms with unreliable TSCs don't have to deal with this, they
10108          * will be compensated by the logic in vcpu_load, which sets the TSC to
10109          * catchup mode.  This will catchup all VCPUs to real time, but cannot
10110          * guarantee that they stay in perfect synchronization.
10111          */
10112         if (backwards_tsc) {
10113                 u64 delta_cyc = max_tsc - local_tsc;
10114                 list_for_each_entry(kvm, &vm_list, vm_list) {
10115                         kvm->arch.backwards_tsc_observed = true;
10116                         kvm_for_each_vcpu(i, vcpu, kvm) {
10117                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
10118                                 vcpu->arch.last_host_tsc = local_tsc;
10119                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
10120                         }
10121
10122                         /*
10123                          * We have to disable TSC offset matching.. if you were
10124                          * booting a VM while issuing an S4 host suspend....
10125                          * you may have some problem.  Solving this issue is
10126                          * left as an exercise to the reader.
10127                          */
10128                         kvm->arch.last_tsc_nsec = 0;
10129                         kvm->arch.last_tsc_write = 0;
10130                 }
10131
10132         }
10133         return 0;
10134 }
10135
10136 void kvm_arch_hardware_disable(void)
10137 {
10138         kvm_x86_ops.hardware_disable();
10139         drop_user_return_notifiers();
10140 }
10141
10142 int kvm_arch_hardware_setup(void *opaque)
10143 {
10144         struct kvm_x86_init_ops *ops = opaque;
10145         int r;
10146
10147         rdmsrl_safe(MSR_EFER, &host_efer);
10148
10149         if (boot_cpu_has(X86_FEATURE_XSAVES))
10150                 rdmsrl(MSR_IA32_XSS, host_xss);
10151
10152         r = ops->hardware_setup();
10153         if (r != 0)
10154                 return r;
10155
10156         memcpy(&kvm_x86_ops, ops->runtime_ops, sizeof(kvm_x86_ops));
10157
10158         if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))
10159                 supported_xss = 0;
10160
10161 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
10162         cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
10163 #undef __kvm_cpu_cap_has
10164
10165         if (kvm_has_tsc_control) {
10166                 /*
10167                  * Make sure the user can only configure tsc_khz values that
10168                  * fit into a signed integer.
10169                  * A min value is not calculated because it will always
10170                  * be 1 on all machines.
10171                  */
10172                 u64 max = min(0x7fffffffULL,
10173                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
10174                 kvm_max_guest_tsc_khz = max;
10175
10176                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
10177         }
10178
10179         kvm_init_msr_list();
10180         return 0;
10181 }
10182
10183 void kvm_arch_hardware_unsetup(void)
10184 {
10185         kvm_x86_ops.hardware_unsetup();
10186 }
10187
10188 int kvm_arch_check_processor_compat(void *opaque)
10189 {
10190         struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
10191         struct kvm_x86_init_ops *ops = opaque;
10192
10193         WARN_ON(!irqs_disabled());
10194
10195         if (__cr4_reserved_bits(cpu_has, c) !=
10196             __cr4_reserved_bits(cpu_has, &boot_cpu_data))
10197                 return -EIO;
10198
10199         return ops->check_processor_compatibility();
10200 }
10201
10202 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
10203 {
10204         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
10205 }
10206 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
10207
10208 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
10209 {
10210         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
10211 }
10212
10213 struct static_key kvm_no_apic_vcpu __read_mostly;
10214 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
10215
10216 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
10217 {
10218         struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
10219
10220         vcpu->arch.l1tf_flush_l1d = true;
10221         if (pmu->version && unlikely(pmu->event_count)) {
10222                 pmu->need_cleanup = true;
10223                 kvm_make_request(KVM_REQ_PMU, vcpu);
10224         }
10225         kvm_x86_ops.sched_in(vcpu, cpu);
10226 }
10227
10228 void kvm_arch_free_vm(struct kvm *kvm)
10229 {
10230         kfree(kvm->arch.hyperv.hv_pa_pg);
10231         vfree(kvm);
10232 }
10233
10234
10235 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
10236 {
10237         if (type)
10238                 return -EINVAL;
10239
10240         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
10241         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
10242         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
10243         INIT_LIST_HEAD(&kvm->arch.lpage_disallowed_mmu_pages);
10244         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
10245         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
10246
10247         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
10248         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
10249         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
10250         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
10251                 &kvm->arch.irq_sources_bitmap);
10252
10253         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
10254         mutex_init(&kvm->arch.apic_map_lock);
10255         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
10256
10257         kvm->arch.kvmclock_offset = -get_kvmclock_base_ns();
10258         pvclock_update_vm_gtod_copy(kvm);
10259
10260         kvm->arch.guest_can_read_msr_platform_info = true;
10261
10262         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
10263         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
10264
10265         kvm_hv_init_vm(kvm);
10266         kvm_page_track_init(kvm);
10267         kvm_mmu_init_vm(kvm);
10268
10269         return kvm_x86_ops.vm_init(kvm);
10270 }
10271
10272 int kvm_arch_post_init_vm(struct kvm *kvm)
10273 {
10274         return kvm_mmu_post_init_vm(kvm);
10275 }
10276
10277 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
10278 {
10279         vcpu_load(vcpu);
10280         kvm_mmu_unload(vcpu);
10281         vcpu_put(vcpu);
10282 }
10283
10284 static void kvm_free_vcpus(struct kvm *kvm)
10285 {
10286         unsigned int i;
10287         struct kvm_vcpu *vcpu;
10288
10289         /*
10290          * Unpin any mmu pages first.
10291          */
10292         kvm_for_each_vcpu(i, vcpu, kvm) {
10293                 kvm_clear_async_pf_completion_queue(vcpu);
10294                 kvm_unload_vcpu_mmu(vcpu);
10295         }
10296         kvm_for_each_vcpu(i, vcpu, kvm)
10297                 kvm_vcpu_destroy(vcpu);
10298
10299         mutex_lock(&kvm->lock);
10300         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
10301                 kvm->vcpus[i] = NULL;
10302
10303         atomic_set(&kvm->online_vcpus, 0);
10304         mutex_unlock(&kvm->lock);
10305 }
10306
10307 void kvm_arch_sync_events(struct kvm *kvm)
10308 {
10309         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
10310         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
10311         kvm_free_pit(kvm);
10312 }
10313
10314 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
10315 {
10316         int i, r;
10317         unsigned long hva, old_npages;
10318         struct kvm_memslots *slots = kvm_memslots(kvm);
10319         struct kvm_memory_slot *slot;
10320
10321         /* Called with kvm->slots_lock held.  */
10322         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
10323                 return -EINVAL;
10324
10325         slot = id_to_memslot(slots, id);
10326         if (size) {
10327                 if (slot && slot->npages)
10328                         return -EEXIST;
10329
10330                 /*
10331                  * MAP_SHARED to prevent internal slot pages from being moved
10332                  * by fork()/COW.
10333                  */
10334                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
10335                               MAP_SHARED | MAP_ANONYMOUS, 0);
10336                 if (IS_ERR((void *)hva))
10337                         return PTR_ERR((void *)hva);
10338         } else {
10339                 if (!slot || !slot->npages)
10340                         return 0;
10341
10342                 old_npages = slot->npages;
10343                 hva = 0;
10344         }
10345
10346         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
10347                 struct kvm_userspace_memory_region m;
10348
10349                 m.slot = id | (i << 16);
10350                 m.flags = 0;
10351                 m.guest_phys_addr = gpa;
10352                 m.userspace_addr = hva;
10353                 m.memory_size = size;
10354                 r = __kvm_set_memory_region(kvm, &m);
10355                 if (r < 0)
10356                         return r;
10357         }
10358
10359         if (!size)
10360                 vm_munmap(hva, old_npages * PAGE_SIZE);
10361
10362         return 0;
10363 }
10364 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
10365
10366 void kvm_arch_pre_destroy_vm(struct kvm *kvm)
10367 {
10368         kvm_mmu_pre_destroy_vm(kvm);
10369 }
10370
10371 void kvm_arch_destroy_vm(struct kvm *kvm)
10372 {
10373         u32 i;
10374
10375         if (current->mm == kvm->mm) {
10376                 /*
10377                  * Free memory regions allocated on behalf of userspace,
10378                  * unless the the memory map has changed due to process exit
10379                  * or fd copying.
10380                  */
10381                 mutex_lock(&kvm->slots_lock);
10382                 __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
10383                                         0, 0);
10384                 __x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT,
10385                                         0, 0);
10386                 __x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
10387                 mutex_unlock(&kvm->slots_lock);
10388         }
10389         if (kvm_x86_ops.vm_destroy)
10390                 kvm_x86_ops.vm_destroy(kvm);
10391         for (i = 0; i < kvm->arch.msr_filter.count; i++)
10392                 kfree(kvm->arch.msr_filter.ranges[i].bitmap);
10393         kvm_pic_destroy(kvm);
10394         kvm_ioapic_destroy(kvm);
10395         kvm_free_vcpus(kvm);
10396         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
10397         kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
10398         kvm_mmu_uninit_vm(kvm);
10399         kvm_page_track_cleanup(kvm);
10400         kvm_hv_destroy_vm(kvm);
10401 }
10402
10403 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
10404 {
10405         int i;
10406
10407         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10408                 kvfree(slot->arch.rmap[i]);
10409                 slot->arch.rmap[i] = NULL;
10410
10411                 if (i == 0)
10412                         continue;
10413
10414                 kvfree(slot->arch.lpage_info[i - 1]);
10415                 slot->arch.lpage_info[i - 1] = NULL;
10416         }
10417
10418         kvm_page_track_free_memslot(slot);
10419 }
10420
10421 static int kvm_alloc_memslot_metadata(struct kvm_memory_slot *slot,
10422                                       unsigned long npages)
10423 {
10424         int i;
10425
10426         /*
10427          * Clear out the previous array pointers for the KVM_MR_MOVE case.  The
10428          * old arrays will be freed by __kvm_set_memory_region() if installing
10429          * the new memslot is successful.
10430          */
10431         memset(&slot->arch, 0, sizeof(slot->arch));
10432
10433         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10434                 struct kvm_lpage_info *linfo;
10435                 unsigned long ugfn;
10436                 int lpages;
10437                 int level = i + 1;
10438
10439                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
10440                                       slot->base_gfn, level) + 1;
10441
10442                 slot->arch.rmap[i] =
10443                         kvcalloc(lpages, sizeof(*slot->arch.rmap[i]),
10444                                  GFP_KERNEL_ACCOUNT);
10445                 if (!slot->arch.rmap[i])
10446                         goto out_free;
10447                 if (i == 0)
10448                         continue;
10449
10450                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
10451                 if (!linfo)
10452                         goto out_free;
10453
10454                 slot->arch.lpage_info[i - 1] = linfo;
10455
10456                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
10457                         linfo[0].disallow_lpage = 1;
10458                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
10459                         linfo[lpages - 1].disallow_lpage = 1;
10460                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
10461                 /*
10462                  * If the gfn and userspace address are not aligned wrt each
10463                  * other, disable large page support for this slot.
10464                  */
10465                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1)) {
10466                         unsigned long j;
10467
10468                         for (j = 0; j < lpages; ++j)
10469                                 linfo[j].disallow_lpage = 1;
10470                 }
10471         }
10472
10473         if (kvm_page_track_create_memslot(slot, npages))
10474                 goto out_free;
10475
10476         return 0;
10477
10478 out_free:
10479         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10480                 kvfree(slot->arch.rmap[i]);
10481                 slot->arch.rmap[i] = NULL;
10482                 if (i == 0)
10483                         continue;
10484
10485                 kvfree(slot->arch.lpage_info[i - 1]);
10486                 slot->arch.lpage_info[i - 1] = NULL;
10487         }
10488         return -ENOMEM;
10489 }
10490
10491 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
10492 {
10493         struct kvm_vcpu *vcpu;
10494         int i;
10495
10496         /*
10497          * memslots->generation has been incremented.
10498          * mmio generation may have reached its maximum value.
10499          */
10500         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
10501
10502         /* Force re-initialization of steal_time cache */
10503         kvm_for_each_vcpu(i, vcpu, kvm)
10504                 kvm_vcpu_kick(vcpu);
10505 }
10506
10507 int kvm_arch_prepare_memory_region(struct kvm *kvm,
10508                                 struct kvm_memory_slot *memslot,
10509                                 const struct kvm_userspace_memory_region *mem,
10510                                 enum kvm_mr_change change)
10511 {
10512         if (change == KVM_MR_CREATE || change == KVM_MR_MOVE)
10513                 return kvm_alloc_memslot_metadata(memslot,
10514                                                   mem->memory_size >> PAGE_SHIFT);
10515         return 0;
10516 }
10517
10518 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
10519                                      struct kvm_memory_slot *old,
10520                                      struct kvm_memory_slot *new,
10521                                      enum kvm_mr_change change)
10522 {
10523         /*
10524          * Nothing to do for RO slots or CREATE/MOVE/DELETE of a slot.
10525          * See comments below.
10526          */
10527         if ((change != KVM_MR_FLAGS_ONLY) || (new->flags & KVM_MEM_READONLY))
10528                 return;
10529
10530         /*
10531          * Dirty logging tracks sptes in 4k granularity, meaning that large
10532          * sptes have to be split.  If live migration is successful, the guest
10533          * in the source machine will be destroyed and large sptes will be
10534          * created in the destination. However, if the guest continues to run
10535          * in the source machine (for example if live migration fails), small
10536          * sptes will remain around and cause bad performance.
10537          *
10538          * Scan sptes if dirty logging has been stopped, dropping those
10539          * which can be collapsed into a single large-page spte.  Later
10540          * page faults will create the large-page sptes.
10541          *
10542          * There is no need to do this in any of the following cases:
10543          * CREATE:      No dirty mappings will already exist.
10544          * MOVE/DELETE: The old mappings will already have been cleaned up by
10545          *              kvm_arch_flush_shadow_memslot()
10546          */
10547         if ((old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
10548             !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
10549                 kvm_mmu_zap_collapsible_sptes(kvm, new);
10550
10551         /*
10552          * Enable or disable dirty logging for the slot.
10553          *
10554          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of the old
10555          * slot have been zapped so no dirty logging updates are needed for
10556          * the old slot.
10557          * For KVM_MR_CREATE and KVM_MR_MOVE, once the new slot is visible
10558          * any mappings that might be created in it will consume the
10559          * properties of the new slot and do not need to be updated here.
10560          *
10561          * When PML is enabled, the kvm_x86_ops dirty logging hooks are
10562          * called to enable/disable dirty logging.
10563          *
10564          * When disabling dirty logging with PML enabled, the D-bit is set
10565          * for sptes in the slot in order to prevent unnecessary GPA
10566          * logging in the PML buffer (and potential PML buffer full VMEXIT).
10567          * This guarantees leaving PML enabled for the guest's lifetime
10568          * won't have any additional overhead from PML when the guest is
10569          * running with dirty logging disabled.
10570          *
10571          * When enabling dirty logging, large sptes are write-protected
10572          * so they can be split on first write.  New large sptes cannot
10573          * be created for this slot until the end of the logging.
10574          * See the comments in fast_page_fault().
10575          * For small sptes, nothing is done if the dirty log is in the
10576          * initial-all-set state.  Otherwise, depending on whether pml
10577          * is enabled the D-bit or the W-bit will be cleared.
10578          */
10579         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
10580                 if (kvm_x86_ops.slot_enable_log_dirty) {
10581                         kvm_x86_ops.slot_enable_log_dirty(kvm, new);
10582                 } else {
10583                         int level =
10584                                 kvm_dirty_log_manual_protect_and_init_set(kvm) ?
10585                                 PG_LEVEL_2M : PG_LEVEL_4K;
10586
10587                         /*
10588                          * If we're with initial-all-set, we don't need
10589                          * to write protect any small page because
10590                          * they're reported as dirty already.  However
10591                          * we still need to write-protect huge pages
10592                          * so that the page split can happen lazily on
10593                          * the first write to the huge page.
10594                          */
10595                         kvm_mmu_slot_remove_write_access(kvm, new, level);
10596                 }
10597         } else {
10598                 if (kvm_x86_ops.slot_disable_log_dirty)
10599                         kvm_x86_ops.slot_disable_log_dirty(kvm, new);
10600         }
10601 }
10602
10603 void kvm_arch_commit_memory_region(struct kvm *kvm,
10604                                 const struct kvm_userspace_memory_region *mem,
10605                                 struct kvm_memory_slot *old,
10606                                 const struct kvm_memory_slot *new,
10607                                 enum kvm_mr_change change)
10608 {
10609         if (!kvm->arch.n_requested_mmu_pages)
10610                 kvm_mmu_change_mmu_pages(kvm,
10611                                 kvm_mmu_calculate_default_mmu_pages(kvm));
10612
10613         /*
10614          * FIXME: const-ify all uses of struct kvm_memory_slot.
10615          */
10616         kvm_mmu_slot_apply_flags(kvm, old, (struct kvm_memory_slot *) new, change);
10617
10618         /* Free the arrays associated with the old memslot. */
10619         if (change == KVM_MR_MOVE)
10620                 kvm_arch_free_memslot(kvm, old);
10621 }
10622
10623 void kvm_arch_flush_shadow_all(struct kvm *kvm)
10624 {
10625         kvm_mmu_zap_all(kvm);
10626 }
10627
10628 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
10629                                    struct kvm_memory_slot *slot)
10630 {
10631         kvm_page_track_flush_slot(kvm, slot);
10632 }
10633
10634 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
10635 {
10636         return (is_guest_mode(vcpu) &&
10637                         kvm_x86_ops.guest_apic_has_interrupt &&
10638                         kvm_x86_ops.guest_apic_has_interrupt(vcpu));
10639 }
10640
10641 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
10642 {
10643         if (!list_empty_careful(&vcpu->async_pf.done))
10644                 return true;
10645
10646         if (kvm_apic_has_events(vcpu))
10647                 return true;
10648
10649         if (vcpu->arch.pv.pv_unhalted)
10650                 return true;
10651
10652         if (vcpu->arch.exception.pending)
10653                 return true;
10654
10655         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
10656             (vcpu->arch.nmi_pending &&
10657              kvm_x86_ops.nmi_allowed(vcpu, false)))
10658                 return true;
10659
10660         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
10661             (vcpu->arch.smi_pending &&
10662              kvm_x86_ops.smi_allowed(vcpu, false)))
10663                 return true;
10664
10665         if (kvm_arch_interrupt_allowed(vcpu) &&
10666             (kvm_cpu_has_interrupt(vcpu) ||
10667             kvm_guest_apic_has_interrupt(vcpu)))
10668                 return true;
10669
10670         if (kvm_hv_has_stimer_pending(vcpu))
10671                 return true;
10672
10673         if (is_guest_mode(vcpu) &&
10674             kvm_x86_ops.nested_ops->hv_timer_pending &&
10675             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
10676                 return true;
10677
10678         return false;
10679 }
10680
10681 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
10682 {
10683         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
10684 }
10685
10686 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
10687 {
10688         if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
10689                 return true;
10690
10691         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
10692                 kvm_test_request(KVM_REQ_SMI, vcpu) ||
10693                  kvm_test_request(KVM_REQ_EVENT, vcpu))
10694                 return true;
10695
10696         if (vcpu->arch.apicv_active && kvm_x86_ops.dy_apicv_has_pending_interrupt(vcpu))
10697                 return true;
10698
10699         return false;
10700 }
10701
10702 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
10703 {
10704         return vcpu->arch.preempted_in_kernel;
10705 }
10706
10707 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
10708 {
10709         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
10710 }
10711
10712 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
10713 {
10714         return kvm_x86_ops.interrupt_allowed(vcpu, false);
10715 }
10716
10717 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
10718 {
10719         if (is_64_bit_mode(vcpu))
10720                 return kvm_rip_read(vcpu);
10721         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
10722                      kvm_rip_read(vcpu));
10723 }
10724 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
10725
10726 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
10727 {
10728         return kvm_get_linear_rip(vcpu) == linear_rip;
10729 }
10730 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
10731
10732 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
10733 {
10734         unsigned long rflags;
10735
10736         rflags = kvm_x86_ops.get_rflags(vcpu);
10737         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
10738                 rflags &= ~X86_EFLAGS_TF;
10739         return rflags;
10740 }
10741 EXPORT_SYMBOL_GPL(kvm_get_rflags);
10742
10743 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
10744 {
10745         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
10746             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
10747                 rflags |= X86_EFLAGS_TF;
10748         kvm_x86_ops.set_rflags(vcpu, rflags);
10749 }
10750
10751 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
10752 {
10753         __kvm_set_rflags(vcpu, rflags);
10754         kvm_make_request(KVM_REQ_EVENT, vcpu);
10755 }
10756 EXPORT_SYMBOL_GPL(kvm_set_rflags);
10757
10758 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
10759 {
10760         int r;
10761
10762         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
10763               work->wakeup_all)
10764                 return;
10765
10766         r = kvm_mmu_reload(vcpu);
10767         if (unlikely(r))
10768                 return;
10769
10770         if (!vcpu->arch.mmu->direct_map &&
10771               work->arch.cr3 != vcpu->arch.mmu->get_guest_pgd(vcpu))
10772                 return;
10773
10774         kvm_mmu_do_page_fault(vcpu, work->cr2_or_gpa, 0, true);
10775 }
10776
10777 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
10778 {
10779         BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU));
10780
10781         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
10782 }
10783
10784 static inline u32 kvm_async_pf_next_probe(u32 key)
10785 {
10786         return (key + 1) & (ASYNC_PF_PER_VCPU - 1);
10787 }
10788
10789 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
10790 {
10791         u32 key = kvm_async_pf_hash_fn(gfn);
10792
10793         while (vcpu->arch.apf.gfns[key] != ~0)
10794                 key = kvm_async_pf_next_probe(key);
10795
10796         vcpu->arch.apf.gfns[key] = gfn;
10797 }
10798
10799 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
10800 {
10801         int i;
10802         u32 key = kvm_async_pf_hash_fn(gfn);
10803
10804         for (i = 0; i < ASYNC_PF_PER_VCPU &&
10805                      (vcpu->arch.apf.gfns[key] != gfn &&
10806                       vcpu->arch.apf.gfns[key] != ~0); i++)
10807                 key = kvm_async_pf_next_probe(key);
10808
10809         return key;
10810 }
10811
10812 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
10813 {
10814         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
10815 }
10816
10817 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
10818 {
10819         u32 i, j, k;
10820
10821         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
10822
10823         if (WARN_ON_ONCE(vcpu->arch.apf.gfns[i] != gfn))
10824                 return;
10825
10826         while (true) {
10827                 vcpu->arch.apf.gfns[i] = ~0;
10828                 do {
10829                         j = kvm_async_pf_next_probe(j);
10830                         if (vcpu->arch.apf.gfns[j] == ~0)
10831                                 return;
10832                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
10833                         /*
10834                          * k lies cyclically in ]i,j]
10835                          * |    i.k.j |
10836                          * |....j i.k.| or  |.k..j i...|
10837                          */
10838                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
10839                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
10840                 i = j;
10841         }
10842 }
10843
10844 static inline int apf_put_user_notpresent(struct kvm_vcpu *vcpu)
10845 {
10846         u32 reason = KVM_PV_REASON_PAGE_NOT_PRESENT;
10847
10848         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &reason,
10849                                       sizeof(reason));
10850 }
10851
10852 static inline int apf_put_user_ready(struct kvm_vcpu *vcpu, u32 token)
10853 {
10854         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
10855
10856         return kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
10857                                              &token, offset, sizeof(token));
10858 }
10859
10860 static inline bool apf_pageready_slot_free(struct kvm_vcpu *vcpu)
10861 {
10862         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
10863         u32 val;
10864
10865         if (kvm_read_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
10866                                          &val, offset, sizeof(val)))
10867                 return false;
10868
10869         return !val;
10870 }
10871
10872 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
10873 {
10874         if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
10875                 return false;
10876
10877         if (!kvm_pv_async_pf_enabled(vcpu) ||
10878             (vcpu->arch.apf.send_user_only && kvm_x86_ops.get_cpl(vcpu) == 0))
10879                 return false;
10880
10881         return true;
10882 }
10883
10884 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
10885 {
10886         if (unlikely(!lapic_in_kernel(vcpu) ||
10887                      kvm_event_needs_reinjection(vcpu) ||
10888                      vcpu->arch.exception.pending))
10889                 return false;
10890
10891         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
10892                 return false;
10893
10894         /*
10895          * If interrupts are off we cannot even use an artificial
10896          * halt state.
10897          */
10898         return kvm_arch_interrupt_allowed(vcpu);
10899 }
10900
10901 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
10902                                      struct kvm_async_pf *work)
10903 {
10904         struct x86_exception fault;
10905
10906         trace_kvm_async_pf_not_present(work->arch.token, work->cr2_or_gpa);
10907         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
10908
10909         if (kvm_can_deliver_async_pf(vcpu) &&
10910             !apf_put_user_notpresent(vcpu)) {
10911                 fault.vector = PF_VECTOR;
10912                 fault.error_code_valid = true;
10913                 fault.error_code = 0;
10914                 fault.nested_page_fault = false;
10915                 fault.address = work->arch.token;
10916                 fault.async_page_fault = true;
10917                 kvm_inject_page_fault(vcpu, &fault);
10918                 return true;
10919         } else {
10920                 /*
10921                  * It is not possible to deliver a paravirtualized asynchronous
10922                  * page fault, but putting the guest in an artificial halt state
10923                  * can be beneficial nevertheless: if an interrupt arrives, we
10924                  * can deliver it timely and perhaps the guest will schedule
10925                  * another process.  When the instruction that triggered a page
10926                  * fault is retried, hopefully the page will be ready in the host.
10927                  */
10928                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
10929                 return false;
10930         }
10931 }
10932
10933 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
10934                                  struct kvm_async_pf *work)
10935 {
10936         struct kvm_lapic_irq irq = {
10937                 .delivery_mode = APIC_DM_FIXED,
10938                 .vector = vcpu->arch.apf.vec
10939         };
10940
10941         if (work->wakeup_all)
10942                 work->arch.token = ~0; /* broadcast wakeup */
10943         else
10944                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
10945         trace_kvm_async_pf_ready(work->arch.token, work->cr2_or_gpa);
10946
10947         if ((work->wakeup_all || work->notpresent_injected) &&
10948             kvm_pv_async_pf_enabled(vcpu) &&
10949             !apf_put_user_ready(vcpu, work->arch.token)) {
10950                 vcpu->arch.apf.pageready_pending = true;
10951                 kvm_apic_set_irq(vcpu, &irq, NULL);
10952         }
10953
10954         vcpu->arch.apf.halted = false;
10955         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10956 }
10957
10958 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu)
10959 {
10960         kvm_make_request(KVM_REQ_APF_READY, vcpu);
10961         if (!vcpu->arch.apf.pageready_pending)
10962                 kvm_vcpu_kick(vcpu);
10963 }
10964
10965 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu)
10966 {
10967         if (!kvm_pv_async_pf_enabled(vcpu))
10968                 return true;
10969         else
10970                 return apf_pageready_slot_free(vcpu);
10971 }
10972
10973 void kvm_arch_start_assignment(struct kvm *kvm)
10974 {
10975         atomic_inc(&kvm->arch.assigned_device_count);
10976 }
10977 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
10978
10979 void kvm_arch_end_assignment(struct kvm *kvm)
10980 {
10981         atomic_dec(&kvm->arch.assigned_device_count);
10982 }
10983 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
10984
10985 bool kvm_arch_has_assigned_device(struct kvm *kvm)
10986 {
10987         return atomic_read(&kvm->arch.assigned_device_count);
10988 }
10989 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
10990
10991 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
10992 {
10993         atomic_inc(&kvm->arch.noncoherent_dma_count);
10994 }
10995 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
10996
10997 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
10998 {
10999         atomic_dec(&kvm->arch.noncoherent_dma_count);
11000 }
11001 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
11002
11003 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
11004 {
11005         return atomic_read(&kvm->arch.noncoherent_dma_count);
11006 }
11007 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
11008
11009 bool kvm_arch_has_irq_bypass(void)
11010 {
11011         return true;
11012 }
11013
11014 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
11015                                       struct irq_bypass_producer *prod)
11016 {
11017         struct kvm_kernel_irqfd *irqfd =
11018                 container_of(cons, struct kvm_kernel_irqfd, consumer);
11019         int ret;
11020
11021         irqfd->producer = prod;
11022         kvm_arch_start_assignment(irqfd->kvm);
11023         ret = kvm_x86_ops.update_pi_irte(irqfd->kvm,
11024                                          prod->irq, irqfd->gsi, 1);
11025
11026         if (ret)
11027                 kvm_arch_end_assignment(irqfd->kvm);
11028
11029         return ret;
11030 }
11031
11032 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
11033                                       struct irq_bypass_producer *prod)
11034 {
11035         int ret;
11036         struct kvm_kernel_irqfd *irqfd =
11037                 container_of(cons, struct kvm_kernel_irqfd, consumer);
11038
11039         WARN_ON(irqfd->producer != prod);
11040         irqfd->producer = NULL;
11041
11042         /*
11043          * When producer of consumer is unregistered, we change back to
11044          * remapped mode, so we can re-use the current implementation
11045          * when the irq is masked/disabled or the consumer side (KVM
11046          * int this case doesn't want to receive the interrupts.
11047         */
11048         ret = kvm_x86_ops.update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
11049         if (ret)
11050                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
11051                        " fails: %d\n", irqfd->consumer.token, ret);
11052
11053         kvm_arch_end_assignment(irqfd->kvm);
11054 }
11055
11056 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
11057                                    uint32_t guest_irq, bool set)
11058 {
11059         return kvm_x86_ops.update_pi_irte(kvm, host_irq, guest_irq, set);
11060 }
11061
11062 bool kvm_vector_hashing_enabled(void)
11063 {
11064         return vector_hashing;
11065 }
11066
11067 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
11068 {
11069         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
11070 }
11071 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
11072
11073
11074 int kvm_spec_ctrl_test_value(u64 value)
11075 {
11076         /*
11077          * test that setting IA32_SPEC_CTRL to given value
11078          * is allowed by the host processor
11079          */
11080
11081         u64 saved_value;
11082         unsigned long flags;
11083         int ret = 0;
11084
11085         local_irq_save(flags);
11086
11087         if (rdmsrl_safe(MSR_IA32_SPEC_CTRL, &saved_value))
11088                 ret = 1;
11089         else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL, value))
11090                 ret = 1;
11091         else
11092                 wrmsrl(MSR_IA32_SPEC_CTRL, saved_value);
11093
11094         local_irq_restore(flags);
11095
11096         return ret;
11097 }
11098 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value);
11099
11100 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code)
11101 {
11102         struct x86_exception fault;
11103         u32 access = error_code &
11104                 (PFERR_WRITE_MASK | PFERR_FETCH_MASK | PFERR_USER_MASK);
11105
11106         if (!(error_code & PFERR_PRESENT_MASK) ||
11107             vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, &fault) != UNMAPPED_GVA) {
11108                 /*
11109                  * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
11110                  * tables probably do not match the TLB.  Just proceed
11111                  * with the error code that the processor gave.
11112                  */
11113                 fault.vector = PF_VECTOR;
11114                 fault.error_code_valid = true;
11115                 fault.error_code = error_code;
11116                 fault.nested_page_fault = false;
11117                 fault.address = gva;
11118         }
11119         vcpu->arch.walk_mmu->inject_page_fault(vcpu, &fault);
11120 }
11121 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error);
11122
11123 /*
11124  * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
11125  * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
11126  * indicates whether exit to userspace is needed.
11127  */
11128 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
11129                               struct x86_exception *e)
11130 {
11131         if (r == X86EMUL_PROPAGATE_FAULT) {
11132                 kvm_inject_emulated_page_fault(vcpu, e);
11133                 return 1;
11134         }
11135
11136         /*
11137          * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
11138          * while handling a VMX instruction KVM could've handled the request
11139          * correctly by exiting to userspace and performing I/O but there
11140          * doesn't seem to be a real use-case behind such requests, just return
11141          * KVM_EXIT_INTERNAL_ERROR for now.
11142          */
11143         vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
11144         vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
11145         vcpu->run->internal.ndata = 0;
11146
11147         return 0;
11148 }
11149 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure);
11150
11151 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva)
11152 {
11153         bool pcid_enabled;
11154         struct x86_exception e;
11155         unsigned i;
11156         unsigned long roots_to_free = 0;
11157         struct {
11158                 u64 pcid;
11159                 u64 gla;
11160         } operand;
11161         int r;
11162
11163         r = kvm_read_guest_virt(vcpu, gva, &operand, sizeof(operand), &e);
11164         if (r != X86EMUL_CONTINUE)
11165                 return kvm_handle_memory_failure(vcpu, r, &e);
11166
11167         if (operand.pcid >> 12 != 0) {
11168                 kvm_inject_gp(vcpu, 0);
11169                 return 1;
11170         }
11171
11172         pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
11173
11174         switch (type) {
11175         case INVPCID_TYPE_INDIV_ADDR:
11176                 if ((!pcid_enabled && (operand.pcid != 0)) ||
11177                     is_noncanonical_address(operand.gla, vcpu)) {
11178                         kvm_inject_gp(vcpu, 0);
11179                         return 1;
11180                 }
11181                 kvm_mmu_invpcid_gva(vcpu, operand.gla, operand.pcid);
11182                 return kvm_skip_emulated_instruction(vcpu);
11183
11184         case INVPCID_TYPE_SINGLE_CTXT:
11185                 if (!pcid_enabled && (operand.pcid != 0)) {
11186                         kvm_inject_gp(vcpu, 0);
11187                         return 1;
11188                 }
11189
11190                 if (kvm_get_active_pcid(vcpu) == operand.pcid) {
11191                         kvm_mmu_sync_roots(vcpu);
11192                         kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
11193                 }
11194
11195                 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
11196                         if (kvm_get_pcid(vcpu, vcpu->arch.mmu->prev_roots[i].pgd)
11197                             == operand.pcid)
11198                                 roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
11199
11200                 kvm_mmu_free_roots(vcpu, vcpu->arch.mmu, roots_to_free);
11201                 /*
11202                  * If neither the current cr3 nor any of the prev_roots use the
11203                  * given PCID, then nothing needs to be done here because a
11204                  * resync will happen anyway before switching to any other CR3.
11205                  */
11206
11207                 return kvm_skip_emulated_instruction(vcpu);
11208
11209         case INVPCID_TYPE_ALL_NON_GLOBAL:
11210                 /*
11211                  * Currently, KVM doesn't mark global entries in the shadow
11212                  * page tables, so a non-global flush just degenerates to a
11213                  * global flush. If needed, we could optimize this later by
11214                  * keeping track of global entries in shadow page tables.
11215                  */
11216
11217                 fallthrough;
11218         case INVPCID_TYPE_ALL_INCL_GLOBAL:
11219                 kvm_mmu_unload(vcpu);
11220                 return kvm_skip_emulated_instruction(vcpu);
11221
11222         default:
11223                 BUG(); /* We have already checked above that type <= 3 */
11224         }
11225 }
11226 EXPORT_SYMBOL_GPL(kvm_handle_invpcid);
11227
11228 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
11229 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
11230 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
11231 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
11232 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
11233 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
11234 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
11235 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
11236 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
11237 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
11238 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
11239 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
11240 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
11241 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
11242 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
11243 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
11244 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
11245 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
11246 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
11247 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);
11248 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log);
11249 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request);