arch/x86/kvm/x86.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * derived from drivers/kvm/kvm_main.c
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  * Copyright (C) 2008 Qumranet, Inc.
   9  * Copyright IBM Corporation, 2008
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *   Yaniv Kamay  <yaniv@qumranet.com>
  15  *   Amit Shah    <amit.shah@qumranet.com>
  16  *   Ben-Ami Yassour <benami@il.ibm.com>
  17  */
  18
  19 #include <linux/kvm_host.h>
  20 #include "irq.h"
  21 #include "ioapic.h"
  22 #include "mmu.h"
  23 #include "i8254.h"
  24 #include "tss.h"
  25 #include "kvm_cache_regs.h"
  26 #include "kvm_emulate.h"
  27 #include "x86.h"
  28 #include "cpuid.h"
  29 #include "pmu.h"
  30 #include "hyperv.h"
  31 #include "lapic.h"
  32
  33 #include <linux/clocksource.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/kvm.h>
  36 #include <linux/fs.h>
  37 #include <linux/vmalloc.h>
  38 #include <linux/export.h>
  39 #include <linux/moduleparam.h>
  40 #include <linux/mman.h>
  41 #include <linux/highmem.h>
  42 #include <linux/iommu.h>
  43 #include <linux/intel-iommu.h>
  44 #include <linux/cpufreq.h>
  45 #include <linux/user-return-notifier.h>
  46 #include <linux/srcu.h>
  47 #include <linux/slab.h>
  48 #include <linux/perf_event.h>
  49 #include <linux/uaccess.h>
  50 #include <linux/hash.h>
  51 #include <linux/pci.h>
  52 #include <linux/timekeeper_internal.h>
  53 #include <linux/pvclock_gtod.h>
  54 #include <linux/kvm_irqfd.h>
  55 #include <linux/irqbypass.h>
  56 #include <linux/sched/stat.h>
  57 #include <linux/sched/isolation.h>
  58 #include <linux/mem_encrypt.h>
  59 #include <linux/entry-kvm.h>
  60
  61 #include <trace/events/kvm.h>
  62
  63 #include <asm/debugreg.h>
  64 #include <asm/msr.h>
  65 #include <asm/desc.h>
  66 #include <asm/mce.h>
  67 #include <linux/kernel_stat.h>
  68 #include <asm/fpu/internal.h> /* Ugh! */
  69 #include <asm/pvclock.h>
  70 #include <asm/div64.h>
  71 #include <asm/irq_remapping.h>
  72 #include <asm/mshyperv.h>
  73 #include <asm/hypervisor.h>
  74 #include <asm/tlbflush.h>
  75 #include <asm/intel_pt.h>
  76 #include <asm/emulate_prefix.h>
  77 #include <clocksource/hyperv_timer.h>
  78
  79 #define CREATE_TRACE_POINTS
  80 #include "trace.h"
  81
  82 #define MAX_IO_MSRS 256
  83 #define KVM_MAX_MCE_BANKS 32
  84 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  85 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  86
  87 #define emul_to_vcpu(ctxt) \
  88         ((struct kvm_vcpu *)(ctxt)->vcpu)
  89
  90 /* EFER defaults:
  91  * - enable syscall per default because its emulated by KVM
  92  * - enable LME and LMA per default on 64 bit KVM
  93  */
  94 #ifdef CONFIG_X86_64
  95 static
  96 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  97 #else
  98 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  99 #endif
 100
 101 static u64 __read_mostly cr4_reserved_bits = CR4_RESERVED_BITS;
 102
 103 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
 104                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 105
 106 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 107 static void process_nmi(struct kvm_vcpu *vcpu);
 108 static void enter_smm(struct kvm_vcpu *vcpu);
 109 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 110 static void store_regs(struct kvm_vcpu *vcpu);
 111 static int sync_regs(struct kvm_vcpu *vcpu);
 112
 113 struct kvm_x86_ops kvm_x86_ops __read_mostly;
 114 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 115
 116 static bool __read_mostly ignore_msrs = 0;
 117 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 118
 119 static bool __read_mostly report_ignored_msrs = true;
 120 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 121
 122 unsigned int min_timer_period_us = 200;
 123 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 124
 125 static bool __read_mostly kvmclock_periodic_sync = true;
 126 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 127
 128 bool __read_mostly kvm_has_tsc_control;
 129 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 130 u32  __read_mostly kvm_max_guest_tsc_khz;
 131 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 132 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 133 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 134 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 135 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 136 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 137 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 138
 139 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 140 static u32 __read_mostly tsc_tolerance_ppm = 250;
 141 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 142
 143 /*
 144  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 145  * adaptive tuning starting from default advancment of 1000ns.  '0' disables
 146  * advancement entirely.  Any other value is used as-is and disables adaptive
 147  * tuning, i.e. allows priveleged userspace to set an exact advancement time.
 148  */
 149 static int __read_mostly lapic_timer_advance_ns = -1;
 150 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 151
 152 static bool __read_mostly vector_hashing = true;
 153 module_param(vector_hashing, bool, S_IRUGO);
 154
 155 bool __read_mostly enable_vmware_backdoor = false;
 156 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 157 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 158
 159 static bool __read_mostly force_emulation_prefix = false;
 160 module_param(force_emulation_prefix, bool, S_IRUGO);
 161
 162 int __read_mostly pi_inject_timer = -1;
 163 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
 164
 165 /*
 166  * Restoring the host value for MSRs that are only consumed when running in
 167  * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
 168  * returns to userspace, i.e. the kernel can run with the guest's value.
 169  */
 170 #define KVM_MAX_NR_USER_RETURN_MSRS 16
 171
 172 struct kvm_user_return_msrs_global {
 173         int nr;
 174         u32 msrs[KVM_MAX_NR_USER_RETURN_MSRS];
 175 };
 176
 177 struct kvm_user_return_msrs {
 178         struct user_return_notifier urn;
 179         bool registered;
 180         struct kvm_user_return_msr_values {
 181                 u64 host;
 182                 u64 curr;
 183         } values[KVM_MAX_NR_USER_RETURN_MSRS];
 184 };
 185
 186 static struct kvm_user_return_msrs_global __read_mostly user_return_msrs_global;
 187 static struct kvm_user_return_msrs __percpu *user_return_msrs;
 188
 189 #define KVM_SUPPORTED_XCR0     (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
 190                                 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
 191                                 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
 192                                 | XFEATURE_MASK_PKRU)
 193
 194 u64 __read_mostly host_efer;
 195 EXPORT_SYMBOL_GPL(host_efer);
 196
 197 bool __read_mostly allow_smaller_maxphyaddr = 0;
 198 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr);
 199
 200 static u64 __read_mostly host_xss;
 201 u64 __read_mostly supported_xss;
 202 EXPORT_SYMBOL_GPL(supported_xss);
 203
 204 struct kvm_stats_debugfs_item debugfs_entries[] = {
 205         VCPU_STAT("pf_fixed", pf_fixed),
 206         VCPU_STAT("pf_guest", pf_guest),
 207         VCPU_STAT("tlb_flush", tlb_flush),
 208         VCPU_STAT("invlpg", invlpg),
 209         VCPU_STAT("exits", exits),
 210         VCPU_STAT("io_exits", io_exits),
 211         VCPU_STAT("mmio_exits", mmio_exits),
 212         VCPU_STAT("signal_exits", signal_exits),
 213         VCPU_STAT("irq_window", irq_window_exits),
 214         VCPU_STAT("nmi_window", nmi_window_exits),
 215         VCPU_STAT("halt_exits", halt_exits),
 216         VCPU_STAT("halt_successful_poll", halt_successful_poll),
 217         VCPU_STAT("halt_attempted_poll", halt_attempted_poll),
 218         VCPU_STAT("halt_poll_invalid", halt_poll_invalid),
 219         VCPU_STAT("halt_wakeup", halt_wakeup),
 220         VCPU_STAT("hypercalls", hypercalls),
 221         VCPU_STAT("request_irq", request_irq_exits),
 222         VCPU_STAT("irq_exits", irq_exits),
 223         VCPU_STAT("host_state_reload", host_state_reload),
 224         VCPU_STAT("fpu_reload", fpu_reload),
 225         VCPU_STAT("insn_emulation", insn_emulation),
 226         VCPU_STAT("insn_emulation_fail", insn_emulation_fail),
 227         VCPU_STAT("irq_injections", irq_injections),
 228         VCPU_STAT("nmi_injections", nmi_injections),
 229         VCPU_STAT("req_event", req_event),
 230         VCPU_STAT("l1d_flush", l1d_flush),
 231         VCPU_STAT("halt_poll_success_ns", halt_poll_success_ns),
 232         VCPU_STAT("halt_poll_fail_ns", halt_poll_fail_ns),
 233         VM_STAT("mmu_shadow_zapped", mmu_shadow_zapped),
 234         VM_STAT("mmu_pte_write", mmu_pte_write),
 235         VM_STAT("mmu_pte_updated", mmu_pte_updated),
 236         VM_STAT("mmu_pde_zapped", mmu_pde_zapped),
 237         VM_STAT("mmu_flooded", mmu_flooded),
 238         VM_STAT("mmu_recycled", mmu_recycled),
 239         VM_STAT("mmu_cache_miss", mmu_cache_miss),
 240         VM_STAT("mmu_unsync", mmu_unsync),
 241         VM_STAT("remote_tlb_flush", remote_tlb_flush),
 242         VM_STAT("largepages", lpages, .mode = 0444),
 243         VM_STAT("nx_largepages_splitted", nx_lpage_splits, .mode = 0444),
 244         VM_STAT("max_mmu_page_hash_collisions", max_mmu_page_hash_collisions),
 245         { NULL }
 246 };
 247
 248 u64 __read_mostly host_xcr0;
 249 u64 __read_mostly supported_xcr0;
 250 EXPORT_SYMBOL_GPL(supported_xcr0);
 251
 252 static struct kmem_cache *x86_fpu_cache;
 253
 254 static struct kmem_cache *x86_emulator_cache;
 255
 256 /*
 257  * When called, it means the previous get/set msr reached an invalid msr.
 258  * Return 0 if we want to ignore/silent this failed msr access, or 1 if we want
 259  * to fail the caller.
 260  */
 261 static int kvm_msr_ignored_check(struct kvm_vcpu *vcpu, u32 msr,
 262                                  u64 data, bool write)
 263 {
 264         const char *op = write ? "wrmsr" : "rdmsr";
 265
 266         if (ignore_msrs) {
 267                 if (report_ignored_msrs)
 268                         kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
 269                                       op, msr, data);
 270                 /* Mask the error */
 271                 return 0;
 272         } else {
 273                 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
 274                                       op, msr, data);
 275                 return -ENOENT;
 276         }
 277 }
 278
 279 static struct kmem_cache *kvm_alloc_emulator_cache(void)
 280 {
 281         unsigned int useroffset = offsetof(struct x86_emulate_ctxt, src);
 282         unsigned int size = sizeof(struct x86_emulate_ctxt);
 283
 284         return kmem_cache_create_usercopy("x86_emulator", size,
 285                                           __alignof__(struct x86_emulate_ctxt),
 286                                           SLAB_ACCOUNT, useroffset,
 287                                           size - useroffset, NULL);
 288 }
 289
 290 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 291
 292 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 293 {
 294         int i;
 295         for (i = 0; i < ASYNC_PF_PER_VCPU; i++)
 296                 vcpu->arch.apf.gfns[i] = ~0;
 297 }
 298
 299 static void kvm_on_user_return(struct user_return_notifier *urn)
 300 {
 301         unsigned slot;
 302         struct kvm_user_return_msrs *msrs
 303                 = container_of(urn, struct kvm_user_return_msrs, urn);
 304         struct kvm_user_return_msr_values *values;
 305         unsigned long flags;
 306
 307         /*
 308          * Disabling irqs at this point since the following code could be
 309          * interrupted and executed through kvm_arch_hardware_disable()
 310          */
 311         local_irq_save(flags);
 312         if (msrs->registered) {
 313                 msrs->registered = false;
 314                 user_return_notifier_unregister(urn);
 315         }
 316         local_irq_restore(flags);
 317         for (slot = 0; slot < user_return_msrs_global.nr; ++slot) {
 318                 values = &msrs->values[slot];
 319                 if (values->host != values->curr) {
 320                         wrmsrl(user_return_msrs_global.msrs[slot], values->host);
 321                         values->curr = values->host;
 322                 }
 323         }
 324 }
 325
 326 void kvm_define_user_return_msr(unsigned slot, u32 msr)
 327 {
 328         BUG_ON(slot >= KVM_MAX_NR_USER_RETURN_MSRS);
 329         user_return_msrs_global.msrs[slot] = msr;
 330         if (slot >= user_return_msrs_global.nr)
 331                 user_return_msrs_global.nr = slot + 1;
 332 }
 333 EXPORT_SYMBOL_GPL(kvm_define_user_return_msr);
 334
 335 static void kvm_user_return_msr_cpu_online(void)
 336 {
 337         unsigned int cpu = smp_processor_id();
 338         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 339         u64 value;
 340         int i;
 341
 342         for (i = 0; i < user_return_msrs_global.nr; ++i) {
 343                 rdmsrl_safe(user_return_msrs_global.msrs[i], &value);
 344                 msrs->values[i].host = value;
 345                 msrs->values[i].curr = value;
 346         }
 347 }
 348
 349 int kvm_set_user_return_msr(unsigned slot, u64 value, u64 mask)
 350 {
 351         unsigned int cpu = smp_processor_id();
 352         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 353         int err;
 354
 355         value = (value & mask) | (msrs->values[slot].host & ~mask);
 356         if (value == msrs->values[slot].curr)
 357                 return 0;
 358         err = wrmsrl_safe(user_return_msrs_global.msrs[slot], value);
 359         if (err)
 360                 return 1;
 361
 362         msrs->values[slot].curr = value;
 363         if (!msrs->registered) {
 364                 msrs->urn.on_user_return = kvm_on_user_return;
 365                 user_return_notifier_register(&msrs->urn);
 366                 msrs->registered = true;
 367         }
 368         return 0;
 369 }
 370 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr);
 371
 372 static void drop_user_return_notifiers(void)
 373 {
 374         unsigned int cpu = smp_processor_id();
 375         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 376
 377         if (msrs->registered)
 378                 kvm_on_user_return(&msrs->urn);
 379 }
 380
 381 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 382 {
 383         return vcpu->arch.apic_base;
 384 }
 385 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 386
 387 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 388 {
 389         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 390 }
 391 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 392
 393 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 394 {
 395         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 396         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 397         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) | 0x2ff |
 398                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 399
 400         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 401                 return 1;
 402         if (!msr_info->host_initiated) {
 403                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 404                         return 1;
 405                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 406                         return 1;
 407         }
 408
 409         kvm_lapic_set_base(vcpu, msr_info->data);
 410         kvm_recalculate_apic_map(vcpu->kvm);
 411         return 0;
 412 }
 413 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 414
 415 asmlinkage __visible noinstr void kvm_spurious_fault(void)
 416 {
 417         /* Fault while not rebooting.  We want the trace. */
 418         BUG_ON(!kvm_rebooting);
 419 }
 420 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 421
 422 #define EXCPT_BENIGN            0
 423 #define EXCPT_CONTRIBUTORY      1
 424 #define EXCPT_PF                2
 425
 426 static int exception_class(int vector)
 427 {
 428         switch (vector) {
 429         case PF_VECTOR:
 430                 return EXCPT_PF;
 431         case DE_VECTOR:
 432         case TS_VECTOR:
 433         case NP_VECTOR:
 434         case SS_VECTOR:
 435         case GP_VECTOR:
 436                 return EXCPT_CONTRIBUTORY;
 437         default:
 438                 break;
 439         }
 440         return EXCPT_BENIGN;
 441 }
 442
 443 #define EXCPT_FAULT             0
 444 #define EXCPT_TRAP              1
 445 #define EXCPT_ABORT             2
 446 #define EXCPT_INTERRUPT         3
 447
 448 static int exception_type(int vector)
 449 {
 450         unsigned int mask;
 451
 452         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 453                 return EXCPT_INTERRUPT;
 454
 455         mask = 1 << vector;
 456
 457         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 458         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 459                 return EXCPT_TRAP;
 460
 461         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 462                 return EXCPT_ABORT;
 463
 464         /* Reserved exceptions will result in fault */
 465         return EXCPT_FAULT;
 466 }
 467
 468 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 469 {
 470         unsigned nr = vcpu->arch.exception.nr;
 471         bool has_payload = vcpu->arch.exception.has_payload;
 472         unsigned long payload = vcpu->arch.exception.payload;
 473
 474         if (!has_payload)
 475                 return;
 476
 477         switch (nr) {
 478         case DB_VECTOR:
 479                 /*
 480                  * "Certain debug exceptions may clear bit 0-3.  The
 481                  * remaining contents of the DR6 register are never
 482                  * cleared by the processor".
 483                  */
 484                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 485                 /*
 486                  * DR6.RTM is set by all #DB exceptions that don't clear it.
 487                  */
 488                 vcpu->arch.dr6 |= DR6_RTM;
 489                 vcpu->arch.dr6 |= payload;
 490                 /*
 491                  * Bit 16 should be set in the payload whenever the #DB
 492                  * exception should clear DR6.RTM. This makes the payload
 493                  * compatible with the pending debug exceptions under VMX.
 494                  * Though not currently documented in the SDM, this also
 495                  * makes the payload compatible with the exit qualification
 496                  * for #DB exceptions under VMX.
 497                  */
 498                 vcpu->arch.dr6 ^= payload & DR6_RTM;
 499
 500                 /*
 501                  * The #DB payload is defined as compatible with the 'pending
 502                  * debug exceptions' field under VMX, not DR6. While bit 12 is
 503                  * defined in the 'pending debug exceptions' field (enabled
 504                  * breakpoint), it is reserved and must be zero in DR6.
 505                  */
 506                 vcpu->arch.dr6 &= ~BIT(12);
 507                 break;
 508         case PF_VECTOR:
 509                 vcpu->arch.cr2 = payload;
 510                 break;
 511         }
 512
 513         vcpu->arch.exception.has_payload = false;
 514         vcpu->arch.exception.payload = 0;
 515 }
 516 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 517
 518 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 519                 unsigned nr, bool has_error, u32 error_code,
 520                 bool has_payload, unsigned long payload, bool reinject)
 521 {
 522         u32 prev_nr;
 523         int class1, class2;
 524
 525         kvm_make_request(KVM_REQ_EVENT, vcpu);
 526
 527         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 528         queue:
 529                 if (has_error && !is_protmode(vcpu))
 530                         has_error = false;
 531                 if (reinject) {
 532                         /*
 533                          * On vmentry, vcpu->arch.exception.pending is only
 534                          * true if an event injection was blocked by
 535                          * nested_run_pending.  In that case, however,
 536                          * vcpu_enter_guest requests an immediate exit,
 537                          * and the guest shouldn't proceed far enough to
 538                          * need reinjection.
 539                          */
 540                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 541                         vcpu->arch.exception.injected = true;
 542                         if (WARN_ON_ONCE(has_payload)) {
 543                                 /*
 544                                  * A reinjected event has already
 545                                  * delivered its payload.
 546                                  */
 547                                 has_payload = false;
 548                                 payload = 0;
 549                         }
 550                 } else {
 551                         vcpu->arch.exception.pending = true;
 552                         vcpu->arch.exception.injected = false;
 553                 }
 554                 vcpu->arch.exception.has_error_code = has_error;
 555                 vcpu->arch.exception.nr = nr;
 556                 vcpu->arch.exception.error_code = error_code;
 557                 vcpu->arch.exception.has_payload = has_payload;
 558                 vcpu->arch.exception.payload = payload;
 559                 if (!is_guest_mode(vcpu))
 560                         kvm_deliver_exception_payload(vcpu);
 561                 return;
 562         }
 563
 564         /* to check exception */
 565         prev_nr = vcpu->arch.exception.nr;
 566         if (prev_nr == DF_VECTOR) {
 567                 /* triple fault -> shutdown */
 568                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 569                 return;
 570         }
 571         class1 = exception_class(prev_nr);
 572         class2 = exception_class(nr);
 573         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 574                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 575                 /*
 576                  * Generate double fault per SDM Table 5-5.  Set
 577                  * exception.pending = true so that the double fault
 578                  * can trigger a nested vmexit.
 579                  */
 580                 vcpu->arch.exception.pending = true;
 581                 vcpu->arch.exception.injected = false;
 582                 vcpu->arch.exception.has_error_code = true;
 583                 vcpu->arch.exception.nr = DF_VECTOR;
 584                 vcpu->arch.exception.error_code = 0;
 585                 vcpu->arch.exception.has_payload = false;
 586                 vcpu->arch.exception.payload = 0;
 587         } else
 588                 /* replace previous exception with a new one in a hope
 589                    that instruction re-execution will regenerate lost
 590                    exception */
 591                 goto queue;
 592 }
 593
 594 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 595 {
 596         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 597 }
 598 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 599
 600 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 601 {
 602         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 603 }
 604 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 605
 606 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 607                            unsigned long payload)
 608 {
 609         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 610 }
 611 EXPORT_SYMBOL_GPL(kvm_queue_exception_p);
 612
 613 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 614                                     u32 error_code, unsigned long payload)
 615 {
 616         kvm_multiple_exception(vcpu, nr, true, error_code,
 617                                true, payload, false);
 618 }
 619
 620 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 621 {
 622         if (err)
 623                 kvm_inject_gp(vcpu, 0);
 624         else
 625                 return kvm_skip_emulated_instruction(vcpu);
 626
 627         return 1;
 628 }
 629 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 630
 631 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 632 {
 633         ++vcpu->stat.pf_guest;
 634         vcpu->arch.exception.nested_apf =
 635                 is_guest_mode(vcpu) && fault->async_page_fault;
 636         if (vcpu->arch.exception.nested_apf) {
 637                 vcpu->arch.apf.nested_apf_token = fault->address;
 638                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 639         } else {
 640                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 641                                         fault->address);
 642         }
 643 }
 644 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 645
 646 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
 647                                     struct x86_exception *fault)
 648 {
 649         struct kvm_mmu *fault_mmu;
 650         WARN_ON_ONCE(fault->vector != PF_VECTOR);
 651
 652         fault_mmu = fault->nested_page_fault ? vcpu->arch.mmu :
 653                                                vcpu->arch.walk_mmu;
 654
 655         /*
 656          * Invalidate the TLB entry for the faulting address, if it exists,
 657          * else the access will fault indefinitely (and to emulate hardware).
 658          */
 659         if ((fault->error_code & PFERR_PRESENT_MASK) &&
 660             !(fault->error_code & PFERR_RSVD_MASK))
 661                 kvm_mmu_invalidate_gva(vcpu, fault_mmu, fault->address,
 662                                        fault_mmu->root_hpa);
 663
 664         fault_mmu->inject_page_fault(vcpu, fault);
 665         return fault->nested_page_fault;
 666 }
 667 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault);
 668
 669 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 670 {
 671         atomic_inc(&vcpu->arch.nmi_queued);
 672         kvm_make_request(KVM_REQ_NMI, vcpu);
 673 }
 674 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 675
 676 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 677 {
 678         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 679 }
 680 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 681
 682 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 683 {
 684         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 685 }
 686 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 687
 688 /*
 689  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 690  * a #GP and return false.
 691  */
 692 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 693 {
 694         if (kvm_x86_ops.get_cpl(vcpu) <= required_cpl)
 695                 return true;
 696         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 697         return false;
 698 }
 699 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 700
 701 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 702 {
 703         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 704                 return true;
 705
 706         kvm_queue_exception(vcpu, UD_VECTOR);
 707         return false;
 708 }
 709 EXPORT_SYMBOL_GPL(kvm_require_dr);
 710
 711 /*
 712  * This function will be used to read from the physical memory of the currently
 713  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 714  * can read from guest physical or from the guest's guest physical memory.
 715  */
 716 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 717                             gfn_t ngfn, void *data, int offset, int len,
 718                             u32 access)
 719 {
 720         struct x86_exception exception;
 721         gfn_t real_gfn;
 722         gpa_t ngpa;
 723
 724         ngpa     = gfn_to_gpa(ngfn);
 725         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 726         if (real_gfn == UNMAPPED_GVA)
 727                 return -EFAULT;
 728
 729         real_gfn = gpa_to_gfn(real_gfn);
 730
 731         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 732 }
 733 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 734
 735 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 736                                void *data, int offset, int len, u32 access)
 737 {
 738         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 739                                        data, offset, len, access);
 740 }
 741
 742 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
 743 {
 744         return rsvd_bits(cpuid_maxphyaddr(vcpu), 63) | rsvd_bits(5, 8) |
 745                rsvd_bits(1, 2);
 746 }
 747
 748 /*
 749  * Load the pae pdptrs.  Return 1 if they are all valid, 0 otherwise.
 750  */
 751 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 752 {
 753         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 754         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 755         int i;
 756         int ret;
 757         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 758
 759         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 760                                       offset * sizeof(u64), sizeof(pdpte),
 761                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 762         if (ret < 0) {
 763                 ret = 0;
 764                 goto out;
 765         }
 766         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 767                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 768                     (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
 769                         ret = 0;
 770                         goto out;
 771                 }
 772         }
 773         ret = 1;
 774
 775         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 776         kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
 777
 778 out:
 779
 780         return ret;
 781 }
 782 EXPORT_SYMBOL_GPL(load_pdptrs);
 783
 784 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 785 {
 786         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 787         int offset;
 788         gfn_t gfn;
 789         int r;
 790
 791         if (!is_pae_paging(vcpu))
 792                 return false;
 793
 794         if (!kvm_register_is_available(vcpu, VCPU_EXREG_PDPTR))
 795                 return true;
 796
 797         gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
 798         offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
 799         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 800                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 801         if (r < 0)
 802                 return true;
 803
 804         return memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 805 }
 806 EXPORT_SYMBOL_GPL(pdptrs_changed);
 807
 808 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 809 {
 810         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 811         unsigned long pdptr_bits = X86_CR0_CD | X86_CR0_NW | X86_CR0_PG;
 812         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 813
 814         cr0 |= X86_CR0_ET;
 815
 816 #ifdef CONFIG_X86_64
 817         if (cr0 & 0xffffffff00000000UL)
 818                 return 1;
 819 #endif
 820
 821         cr0 &= ~CR0_RESERVED_BITS;
 822
 823         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 824                 return 1;
 825
 826         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 827                 return 1;
 828
 829 #ifdef CONFIG_X86_64
 830         if ((vcpu->arch.efer & EFER_LME) && !is_paging(vcpu) &&
 831             (cr0 & X86_CR0_PG)) {
 832                 int cs_db, cs_l;
 833
 834                 if (!is_pae(vcpu))
 835                         return 1;
 836                 kvm_x86_ops.get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 837                 if (cs_l)
 838                         return 1;
 839         }
 840 #endif
 841         if (!(vcpu->arch.efer & EFER_LME) && (cr0 & X86_CR0_PG) &&
 842             is_pae(vcpu) && ((cr0 ^ old_cr0) & pdptr_bits) &&
 843             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu)))
 844                 return 1;
 845
 846         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 847                 return 1;
 848
 849         kvm_x86_ops.set_cr0(vcpu, cr0);
 850
 851         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 852                 kvm_clear_async_pf_completion_queue(vcpu);
 853                 kvm_async_pf_hash_reset(vcpu);
 854         }
 855
 856         if ((cr0 ^ old_cr0) & update_bits)
 857                 kvm_mmu_reset_context(vcpu);
 858
 859         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 860             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 861             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 862                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 863
 864         return 0;
 865 }
 866 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 867
 868 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 869 {
 870         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 871 }
 872 EXPORT_SYMBOL_GPL(kvm_lmsw);
 873
 874 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu)
 875 {
 876         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 877
 878                 if (vcpu->arch.xcr0 != host_xcr0)
 879                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 880
 881                 if (vcpu->arch.xsaves_enabled &&
 882                     vcpu->arch.ia32_xss != host_xss)
 883                         wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss);
 884         }
 885
 886         if (static_cpu_has(X86_FEATURE_PKU) &&
 887             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 888              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU)) &&
 889             vcpu->arch.pkru != vcpu->arch.host_pkru)
 890                 __write_pkru(vcpu->arch.pkru);
 891 }
 892 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);
 893
 894 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)
 895 {
 896         if (static_cpu_has(X86_FEATURE_PKU) &&
 897             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 898              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU))) {
 899                 vcpu->arch.pkru = rdpkru();
 900                 if (vcpu->arch.pkru != vcpu->arch.host_pkru)
 901                         __write_pkru(vcpu->arch.host_pkru);
 902         }
 903
 904         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 905
 906                 if (vcpu->arch.xcr0 != host_xcr0)
 907                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 908
 909                 if (vcpu->arch.xsaves_enabled &&
 910                     vcpu->arch.ia32_xss != host_xss)
 911                         wrmsrl(MSR_IA32_XSS, host_xss);
 912         }
 913
 914 }
 915 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state);
 916
 917 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 918 {
 919         u64 xcr0 = xcr;
 920         u64 old_xcr0 = vcpu->arch.xcr0;
 921         u64 valid_bits;
 922
 923         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 924         if (index != XCR_XFEATURE_ENABLED_MASK)
 925                 return 1;
 926         if (!(xcr0 & XFEATURE_MASK_FP))
 927                 return 1;
 928         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 929                 return 1;
 930
 931         /*
 932          * Do not allow the guest to set bits that we do not support
 933          * saving.  However, xcr0 bit 0 is always set, even if the
 934          * emulated CPU does not support XSAVE (see fx_init).
 935          */
 936         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 937         if (xcr0 & ~valid_bits)
 938                 return 1;
 939
 940         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 941             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 942                 return 1;
 943
 944         if (xcr0 & XFEATURE_MASK_AVX512) {
 945                 if (!(xcr0 & XFEATURE_MASK_YMM))
 946                         return 1;
 947                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 948                         return 1;
 949         }
 950         vcpu->arch.xcr0 = xcr0;
 951
 952         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 953                 kvm_update_cpuid_runtime(vcpu);
 954         return 0;
 955 }
 956
 957 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 958 {
 959         if (kvm_x86_ops.get_cpl(vcpu) != 0 ||
 960             __kvm_set_xcr(vcpu, index, xcr)) {
 961                 kvm_inject_gp(vcpu, 0);
 962                 return 1;
 963         }
 964         return 0;
 965 }
 966 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 967
 968 int kvm_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 969 {
 970         if (cr4 & cr4_reserved_bits)
 971                 return -EINVAL;
 972
 973         if (cr4 & vcpu->arch.cr4_guest_rsvd_bits)
 974                 return -EINVAL;
 975
 976         return 0;
 977 }
 978 EXPORT_SYMBOL_GPL(kvm_valid_cr4);
 979
 980 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 981 {
 982         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 983         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 984                                    X86_CR4_SMEP;
 985         unsigned long mmu_role_bits = pdptr_bits | X86_CR4_SMAP | X86_CR4_PKE;
 986
 987         if (kvm_valid_cr4(vcpu, cr4))
 988                 return 1;
 989
 990         if (is_long_mode(vcpu)) {
 991                 if (!(cr4 & X86_CR4_PAE))
 992                         return 1;
 993                 if ((cr4 ^ old_cr4) & X86_CR4_LA57)
 994                         return 1;
 995         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 996                    && ((cr4 ^ old_cr4) & pdptr_bits)
 997                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 998                                    kvm_read_cr3(vcpu)))
 999                 return 1;
1000
1001         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
1002                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
1003                         return 1;
1004
1005                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1006                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
1007                         return 1;
1008         }
1009
1010         if (kvm_x86_ops.set_cr4(vcpu, cr4))
1011                 return 1;
1012
1013         if (((cr4 ^ old_cr4) & mmu_role_bits) ||
1014             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
1015                 kvm_mmu_reset_context(vcpu);
1016
1017         if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
1018                 kvm_update_cpuid_runtime(vcpu);
1019
1020         return 0;
1021 }
1022 EXPORT_SYMBOL_GPL(kvm_set_cr4);
1023
1024 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1025 {
1026         bool skip_tlb_flush = false;
1027 #ifdef CONFIG_X86_64
1028         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
1029
1030         if (pcid_enabled) {
1031                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
1032                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
1033         }
1034 #endif
1035
1036         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
1037                 if (!skip_tlb_flush) {
1038                         kvm_mmu_sync_roots(vcpu);
1039                         kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1040                 }
1041                 return 0;
1042         }
1043
1044         if (is_long_mode(vcpu) &&
1045             (cr3 & rsvd_bits(cpuid_maxphyaddr(vcpu), 63)))
1046                 return 1;
1047         else if (is_pae_paging(vcpu) &&
1048                  !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
1049                 return 1;
1050
1051         kvm_mmu_new_pgd(vcpu, cr3, skip_tlb_flush, skip_tlb_flush);
1052         vcpu->arch.cr3 = cr3;
1053         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
1054
1055         return 0;
1056 }
1057 EXPORT_SYMBOL_GPL(kvm_set_cr3);
1058
1059 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
1060 {
1061         if (cr8 & CR8_RESERVED_BITS)
1062                 return 1;
1063         if (lapic_in_kernel(vcpu))
1064                 kvm_lapic_set_tpr(vcpu, cr8);
1065         else
1066                 vcpu->arch.cr8 = cr8;
1067         return 0;
1068 }
1069 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1070
1071 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1072 {
1073         if (lapic_in_kernel(vcpu))
1074                 return kvm_lapic_get_cr8(vcpu);
1075         else
1076                 return vcpu->arch.cr8;
1077 }
1078 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1079
1080 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1081 {
1082         int i;
1083
1084         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1085                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1086                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1087                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
1088         }
1089 }
1090
1091 void kvm_update_dr7(struct kvm_vcpu *vcpu)
1092 {
1093         unsigned long dr7;
1094
1095         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1096                 dr7 = vcpu->arch.guest_debug_dr7;
1097         else
1098                 dr7 = vcpu->arch.dr7;
1099         kvm_x86_ops.set_dr7(vcpu, dr7);
1100         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1101         if (dr7 & DR7_BP_EN_MASK)
1102                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1103 }
1104 EXPORT_SYMBOL_GPL(kvm_update_dr7);
1105
1106 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1107 {
1108         u64 fixed = DR6_FIXED_1;
1109
1110         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1111                 fixed |= DR6_RTM;
1112         return fixed;
1113 }
1114
1115 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1116 {
1117         size_t size = ARRAY_SIZE(vcpu->arch.db);
1118
1119         switch (dr) {
1120         case 0 ... 3:
1121                 vcpu->arch.db[array_index_nospec(dr, size)] = val;
1122                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1123                         vcpu->arch.eff_db[dr] = val;
1124                 break;
1125         case 4:
1126         case 6:
1127                 if (!kvm_dr6_valid(val))
1128                         return -1; /* #GP */
1129                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1130                 break;
1131         case 5:
1132         default: /* 7 */
1133                 if (!kvm_dr7_valid(val))
1134                         return -1; /* #GP */
1135                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1136                 kvm_update_dr7(vcpu);
1137                 break;
1138         }
1139
1140         return 0;
1141 }
1142
1143 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1144 {
1145         if (__kvm_set_dr(vcpu, dr, val)) {
1146                 kvm_inject_gp(vcpu, 0);
1147                 return 1;
1148         }
1149         return 0;
1150 }
1151 EXPORT_SYMBOL_GPL(kvm_set_dr);
1152
1153 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1154 {
1155         size_t size = ARRAY_SIZE(vcpu->arch.db);
1156
1157         switch (dr) {
1158         case 0 ... 3:
1159                 *val = vcpu->arch.db[array_index_nospec(dr, size)];
1160                 break;
1161         case 4:
1162         case 6:
1163                 *val = vcpu->arch.dr6;
1164                 break;
1165         case 5:
1166         default: /* 7 */
1167                 *val = vcpu->arch.dr7;
1168                 break;
1169         }
1170         return 0;
1171 }
1172 EXPORT_SYMBOL_GPL(kvm_get_dr);
1173
1174 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
1175 {
1176         u32 ecx = kvm_rcx_read(vcpu);
1177         u64 data;
1178         int err;
1179
1180         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
1181         if (err)
1182                 return err;
1183         kvm_rax_write(vcpu, (u32)data);
1184         kvm_rdx_write(vcpu, data >> 32);
1185         return err;
1186 }
1187 EXPORT_SYMBOL_GPL(kvm_rdpmc);
1188
1189 /*
1190  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1191  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1192  *
1193  * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1194  * extract the supported MSRs from the related const lists.
1195  * msrs_to_save is selected from the msrs_to_save_all to reflect the
1196  * capabilities of the host cpu. This capabilities test skips MSRs that are
1197  * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1198  * may depend on host virtualization features rather than host cpu features.
1199  */
1200
1201 static const u32 msrs_to_save_all[] = {
1202         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1203         MSR_STAR,
1204 #ifdef CONFIG_X86_64
1205         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1206 #endif
1207         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1208         MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1209         MSR_IA32_SPEC_CTRL,
1210         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1211         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1212         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1213         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1214         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1215         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1216         MSR_IA32_UMWAIT_CONTROL,
1217
1218         MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1219         MSR_ARCH_PERFMON_FIXED_CTR0 + 2, MSR_ARCH_PERFMON_FIXED_CTR0 + 3,
1220         MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1221         MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1222         MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1223         MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1224         MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1225         MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1226         MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1227         MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1228         MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1229         MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1230         MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1231         MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1232         MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1233         MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1234         MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1235         MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1236         MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1237         MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1238         MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1239         MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1240 };
1241
1242 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
1243 static unsigned num_msrs_to_save;
1244
1245 static const u32 emulated_msrs_all[] = {
1246         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1247         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1248         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1249         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1250         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1251         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1252         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1253         HV_X64_MSR_RESET,
1254         HV_X64_MSR_VP_INDEX,
1255         HV_X64_MSR_VP_RUNTIME,
1256         HV_X64_MSR_SCONTROL,
1257         HV_X64_MSR_STIMER0_CONFIG,
1258         HV_X64_MSR_VP_ASSIST_PAGE,
1259         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1260         HV_X64_MSR_TSC_EMULATION_STATUS,
1261         HV_X64_MSR_SYNDBG_OPTIONS,
1262         HV_X64_MSR_SYNDBG_CONTROL, HV_X64_MSR_SYNDBG_STATUS,
1263         HV_X64_MSR_SYNDBG_SEND_BUFFER, HV_X64_MSR_SYNDBG_RECV_BUFFER,
1264         HV_X64_MSR_SYNDBG_PENDING_BUFFER,
1265
1266         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1267         MSR_KVM_PV_EOI_EN, MSR_KVM_ASYNC_PF_INT, MSR_KVM_ASYNC_PF_ACK,
1268
1269         MSR_IA32_TSC_ADJUST,
1270         MSR_IA32_TSCDEADLINE,
1271         MSR_IA32_ARCH_CAPABILITIES,
1272         MSR_IA32_PERF_CAPABILITIES,
1273         MSR_IA32_MISC_ENABLE,
1274         MSR_IA32_MCG_STATUS,
1275         MSR_IA32_MCG_CTL,
1276         MSR_IA32_MCG_EXT_CTL,
1277         MSR_IA32_SMBASE,
1278         MSR_SMI_COUNT,
1279         MSR_PLATFORM_INFO,
1280         MSR_MISC_FEATURES_ENABLES,
1281         MSR_AMD64_VIRT_SPEC_CTRL,
1282         MSR_IA32_POWER_CTL,
1283         MSR_IA32_UCODE_REV,
1284
1285         /*
1286          * The following list leaves out MSRs whose values are determined
1287          * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1288          * We always support the "true" VMX control MSRs, even if the host
1289          * processor does not, so I am putting these registers here rather
1290          * than in msrs_to_save_all.
1291          */
1292         MSR_IA32_VMX_BASIC,
1293         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1294         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1295         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1296         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1297         MSR_IA32_VMX_MISC,
1298         MSR_IA32_VMX_CR0_FIXED0,
1299         MSR_IA32_VMX_CR4_FIXED0,
1300         MSR_IA32_VMX_VMCS_ENUM,
1301         MSR_IA32_VMX_PROCBASED_CTLS2,
1302         MSR_IA32_VMX_EPT_VPID_CAP,
1303         MSR_IA32_VMX_VMFUNC,
1304
1305         MSR_K7_HWCR,
1306         MSR_KVM_POLL_CONTROL,
1307 };
1308
1309 static u32 emulated_msrs[ARRAY_SIZE(emulated_msrs_all)];
1310 static unsigned num_emulated_msrs;
1311
1312 /*
1313  * List of msr numbers which are used to expose MSR-based features that
1314  * can be used by a hypervisor to validate requested CPU features.
1315  */
1316 static const u32 msr_based_features_all[] = {
1317         MSR_IA32_VMX_BASIC,
1318         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1319         MSR_IA32_VMX_PINBASED_CTLS,
1320         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1321         MSR_IA32_VMX_PROCBASED_CTLS,
1322         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1323         MSR_IA32_VMX_EXIT_CTLS,
1324         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1325         MSR_IA32_VMX_ENTRY_CTLS,
1326         MSR_IA32_VMX_MISC,
1327         MSR_IA32_VMX_CR0_FIXED0,
1328         MSR_IA32_VMX_CR0_FIXED1,
1329         MSR_IA32_VMX_CR4_FIXED0,
1330         MSR_IA32_VMX_CR4_FIXED1,
1331         MSR_IA32_VMX_VMCS_ENUM,
1332         MSR_IA32_VMX_PROCBASED_CTLS2,
1333         MSR_IA32_VMX_EPT_VPID_CAP,
1334         MSR_IA32_VMX_VMFUNC,
1335
1336         MSR_F10H_DECFG,
1337         MSR_IA32_UCODE_REV,
1338         MSR_IA32_ARCH_CAPABILITIES,
1339         MSR_IA32_PERF_CAPABILITIES,
1340 };
1341
1342 static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all)];
1343 static unsigned int num_msr_based_features;
1344
1345 static u64 kvm_get_arch_capabilities(void)
1346 {
1347         u64 data = 0;
1348
1349         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1350                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1351
1352         /*
1353          * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1354          * the nested hypervisor runs with NX huge pages.  If it is not,
1355          * L1 is anyway vulnerable to ITLB_MULTIHIT explots from other
1356          * L1 guests, so it need not worry about its own (L2) guests.
1357          */
1358         data |= ARCH_CAP_PSCHANGE_MC_NO;
1359
1360         /*
1361          * If we're doing cache flushes (either "always" or "cond")
1362          * we will do one whenever the guest does a vmlaunch/vmresume.
1363          * If an outer hypervisor is doing the cache flush for us
1364          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1365          * capability to the guest too, and if EPT is disabled we're not
1366          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1367          * require a nested hypervisor to do a flush of its own.
1368          */
1369         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1370                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1371
1372         if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1373                 data |= ARCH_CAP_RDCL_NO;
1374         if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1375                 data |= ARCH_CAP_SSB_NO;
1376         if (!boot_cpu_has_bug(X86_BUG_MDS))
1377                 data |= ARCH_CAP_MDS_NO;
1378
1379         /*
1380          * On TAA affected systems:
1381          *      - nothing to do if TSX is disabled on the host.
1382          *      - we emulate TSX_CTRL if present on the host.
1383          *        This lets the guest use VERW to clear CPU buffers.
1384          */
1385         if (!boot_cpu_has(X86_FEATURE_RTM))
1386                 data &= ~(ARCH_CAP_TAA_NO | ARCH_CAP_TSX_CTRL_MSR);
1387         else if (!boot_cpu_has_bug(X86_BUG_TAA))
1388                 data |= ARCH_CAP_TAA_NO;
1389
1390         return data;
1391 }
1392
1393 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1394 {
1395         switch (msr->index) {
1396         case MSR_IA32_ARCH_CAPABILITIES:
1397                 msr->data = kvm_get_arch_capabilities();
1398                 break;
1399         case MSR_IA32_UCODE_REV:
1400                 rdmsrl_safe(msr->index, &msr->data);
1401                 break;
1402         default:
1403                 return kvm_x86_ops.get_msr_feature(msr);
1404         }
1405         return 0;
1406 }
1407
1408 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1409 {
1410         struct kvm_msr_entry msr;
1411         int r;
1412
1413         msr.index = index;
1414         r = kvm_get_msr_feature(&msr);
1415
1416         if (r == KVM_MSR_RET_INVALID) {
1417                 /* Unconditionally clear the output for simplicity */
1418                 *data = 0;
1419                 r = kvm_msr_ignored_check(vcpu, index, 0, false);
1420         }
1421
1422         if (r)
1423                 return r;
1424
1425         *data = msr.data;
1426
1427         return 0;
1428 }
1429
1430 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1431 {
1432         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1433                 return false;
1434
1435         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1436                 return false;
1437
1438         if (efer & (EFER_LME | EFER_LMA) &&
1439             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1440                 return false;
1441
1442         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1443                 return false;
1444
1445         return true;
1446
1447 }
1448 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1449 {
1450         if (efer & efer_reserved_bits)
1451                 return false;
1452
1453         return __kvm_valid_efer(vcpu, efer);
1454 }
1455 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1456
1457 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1458 {
1459         u64 old_efer = vcpu->arch.efer;
1460         u64 efer = msr_info->data;
1461         int r;
1462
1463         if (efer & efer_reserved_bits)
1464                 return 1;
1465
1466         if (!msr_info->host_initiated) {
1467                 if (!__kvm_valid_efer(vcpu, efer))
1468                         return 1;
1469
1470                 if (is_paging(vcpu) &&
1471                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1472                         return 1;
1473         }
1474
1475         efer &= ~EFER_LMA;
1476         efer |= vcpu->arch.efer & EFER_LMA;
1477
1478         r = kvm_x86_ops.set_efer(vcpu, efer);
1479         if (r) {
1480                 WARN_ON(r > 0);
1481                 return r;
1482         }
1483
1484         /* Update reserved bits */
1485         if ((efer ^ old_efer) & EFER_NX)
1486                 kvm_mmu_reset_context(vcpu);
1487
1488         return 0;
1489 }
1490
1491 void kvm_enable_efer_bits(u64 mask)
1492 {
1493        efer_reserved_bits &= ~mask;
1494 }
1495 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1496
1497 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type)
1498 {
1499         struct kvm *kvm = vcpu->kvm;
1500         struct msr_bitmap_range *ranges = kvm->arch.msr_filter.ranges;
1501         u32 count = kvm->arch.msr_filter.count;
1502         u32 i;
1503         bool r = kvm->arch.msr_filter.default_allow;
1504         int idx;
1505
1506         /* MSR filtering not set up or x2APIC enabled, allow everything */
1507         if (!count || (index >= 0x800 && index <= 0x8ff))
1508                 return true;
1509
1510         /* Prevent collision with set_msr_filter */
1511         idx = srcu_read_lock(&kvm->srcu);
1512
1513         for (i = 0; i < count; i++) {
1514                 u32 start = ranges[i].base;
1515                 u32 end = start + ranges[i].nmsrs;
1516                 u32 flags = ranges[i].flags;
1517                 unsigned long *bitmap = ranges[i].bitmap;
1518
1519                 if ((index >= start) && (index < end) && (flags & type)) {
1520                         r = !!test_bit(index - start, bitmap);
1521                         break;
1522                 }
1523         }
1524
1525         srcu_read_unlock(&kvm->srcu, idx);
1526
1527         return r;
1528 }
1529 EXPORT_SYMBOL_GPL(kvm_msr_allowed);
1530
1531 /*
1532  * Write @data into the MSR specified by @index.  Select MSR specific fault
1533  * checks are bypassed if @host_initiated is %true.
1534  * Returns 0 on success, non-0 otherwise.
1535  * Assumes vcpu_load() was already called.
1536  */
1537 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1538                          bool host_initiated)
1539 {
1540         struct msr_data msr;
1541
1542         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_WRITE))
1543                 return -EPERM;
1544
1545         switch (index) {
1546         case MSR_FS_BASE:
1547         case MSR_GS_BASE:
1548         case MSR_KERNEL_GS_BASE:
1549         case MSR_CSTAR:
1550         case MSR_LSTAR:
1551                 if (is_noncanonical_address(data, vcpu))
1552                         return 1;
1553                 break;
1554         case MSR_IA32_SYSENTER_EIP:
1555         case MSR_IA32_SYSENTER_ESP:
1556                 /*
1557                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1558                  * non-canonical address is written on Intel but not on
1559                  * AMD (which ignores the top 32-bits, because it does
1560                  * not implement 64-bit SYSENTER).
1561                  *
1562                  * 64-bit code should hence be able to write a non-canonical
1563                  * value on AMD.  Making the address canonical ensures that
1564                  * vmentry does not fail on Intel after writing a non-canonical
1565                  * value, and that something deterministic happens if the guest
1566                  * invokes 64-bit SYSENTER.
1567                  */
1568                 data = get_canonical(data, vcpu_virt_addr_bits(vcpu));
1569         }
1570
1571         msr.data = data;
1572         msr.index = index;
1573         msr.host_initiated = host_initiated;
1574
1575         return kvm_x86_ops.set_msr(vcpu, &msr);
1576 }
1577
1578 static int kvm_set_msr_ignored_check(struct kvm_vcpu *vcpu,
1579                                      u32 index, u64 data, bool host_initiated)
1580 {
1581         int ret = __kvm_set_msr(vcpu, index, data, host_initiated);
1582
1583         if (ret == KVM_MSR_RET_INVALID)
1584                 ret = kvm_msr_ignored_check(vcpu, index, data, true);
1585
1586         return ret;
1587 }
1588
1589 /*
1590  * Read the MSR specified by @index into @data.  Select MSR specific fault
1591  * checks are bypassed if @host_initiated is %true.
1592  * Returns 0 on success, non-0 otherwise.
1593  * Assumes vcpu_load() was already called.
1594  */
1595 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1596                   bool host_initiated)
1597 {
1598         struct msr_data msr;
1599         int ret;
1600
1601         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_READ))
1602                 return -EPERM;
1603
1604         msr.index = index;
1605         msr.host_initiated = host_initiated;
1606
1607         ret = kvm_x86_ops.get_msr(vcpu, &msr);
1608         if (!ret)
1609                 *data = msr.data;
1610         return ret;
1611 }
1612
1613 static int kvm_get_msr_ignored_check(struct kvm_vcpu *vcpu,
1614                                      u32 index, u64 *data, bool host_initiated)
1615 {
1616         int ret = __kvm_get_msr(vcpu, index, data, host_initiated);
1617
1618         if (ret == KVM_MSR_RET_INVALID) {
1619                 /* Unconditionally clear *data for simplicity */
1620                 *data = 0;
1621                 ret = kvm_msr_ignored_check(vcpu, index, 0, false);
1622         }
1623
1624         return ret;
1625 }
1626
1627 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1628 {
1629         return kvm_get_msr_ignored_check(vcpu, index, data, false);
1630 }
1631 EXPORT_SYMBOL_GPL(kvm_get_msr);
1632
1633 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1634 {
1635         return kvm_set_msr_ignored_check(vcpu, index, data, false);
1636 }
1637 EXPORT_SYMBOL_GPL(kvm_set_msr);
1638
1639 static int complete_emulated_msr(struct kvm_vcpu *vcpu, bool is_read)
1640 {
1641         if (vcpu->run->msr.error) {
1642                 kvm_inject_gp(vcpu, 0);
1643                 return 1;
1644         } else if (is_read) {
1645                 kvm_rax_write(vcpu, (u32)vcpu->run->msr.data);
1646                 kvm_rdx_write(vcpu, vcpu->run->msr.data >> 32);
1647         }
1648
1649         return kvm_skip_emulated_instruction(vcpu);
1650 }
1651
1652 static int complete_emulated_rdmsr(struct kvm_vcpu *vcpu)
1653 {
1654         return complete_emulated_msr(vcpu, true);
1655 }
1656
1657 static int complete_emulated_wrmsr(struct kvm_vcpu *vcpu)
1658 {
1659         return complete_emulated_msr(vcpu, false);
1660 }
1661
1662 static u64 kvm_msr_reason(int r)
1663 {
1664         switch (r) {
1665         case -ENOENT:
1666                 return KVM_MSR_EXIT_REASON_UNKNOWN;
1667         case -EPERM:
1668                 return KVM_MSR_EXIT_REASON_FILTER;
1669         default:
1670                 return KVM_MSR_EXIT_REASON_INVAL;
1671         }
1672 }
1673
1674 static int kvm_msr_user_space(struct kvm_vcpu *vcpu, u32 index,
1675                               u32 exit_reason, u64 data,
1676                               int (*completion)(struct kvm_vcpu *vcpu),
1677                               int r)
1678 {
1679         u64 msr_reason = kvm_msr_reason(r);
1680
1681         /* Check if the user wanted to know about this MSR fault */
1682         if (!(vcpu->kvm->arch.user_space_msr_mask & msr_reason))
1683                 return 0;
1684
1685         vcpu->run->exit_reason = exit_reason;
1686         vcpu->run->msr.error = 0;
1687         memset(vcpu->run->msr.pad, 0, sizeof(vcpu->run->msr.pad));
1688         vcpu->run->msr.reason = msr_reason;
1689         vcpu->run->msr.index = index;
1690         vcpu->run->msr.data = data;
1691         vcpu->arch.complete_userspace_io = completion;
1692
1693         return 1;
1694 }
1695
1696 static int kvm_get_msr_user_space(struct kvm_vcpu *vcpu, u32 index, int r)
1697 {
1698         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_RDMSR, 0,
1699                                    complete_emulated_rdmsr, r);
1700 }
1701
1702 static int kvm_set_msr_user_space(struct kvm_vcpu *vcpu, u32 index, u64 data, int r)
1703 {
1704         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_WRMSR, data,
1705                                    complete_emulated_wrmsr, r);
1706 }
1707
1708 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1709 {
1710         u32 ecx = kvm_rcx_read(vcpu);
1711         u64 data;
1712         int r;
1713
1714         r = kvm_get_msr(vcpu, ecx, &data);
1715
1716         /* MSR read failed? See if we should ask user space */
1717         if (r && kvm_get_msr_user_space(vcpu, ecx, r)) {
1718                 /* Bounce to user space */
1719                 return 0;
1720         }
1721
1722         /* MSR read failed? Inject a #GP */
1723         if (r) {
1724                 trace_kvm_msr_read_ex(ecx);
1725                 kvm_inject_gp(vcpu, 0);
1726                 return 1;
1727         }
1728
1729         trace_kvm_msr_read(ecx, data);
1730
1731         kvm_rax_write(vcpu, data & -1u);
1732         kvm_rdx_write(vcpu, (data >> 32) & -1u);
1733         return kvm_skip_emulated_instruction(vcpu);
1734 }
1735 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
1736
1737 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
1738 {
1739         u32 ecx = kvm_rcx_read(vcpu);
1740         u64 data = kvm_read_edx_eax(vcpu);
1741         int r;
1742
1743         r = kvm_set_msr(vcpu, ecx, data);
1744
1745         /* MSR write failed? See if we should ask user space */
1746         if (r && kvm_set_msr_user_space(vcpu, ecx, data, r))
1747                 /* Bounce to user space */
1748                 return 0;
1749
1750         /* Signal all other negative errors to userspace */
1751         if (r < 0)
1752                 return r;
1753
1754         /* MSR write failed? Inject a #GP */
1755         if (r > 0) {
1756                 trace_kvm_msr_write_ex(ecx, data);
1757                 kvm_inject_gp(vcpu, 0);
1758                 return 1;
1759         }
1760
1761         trace_kvm_msr_write(ecx, data);
1762         return kvm_skip_emulated_instruction(vcpu);
1763 }
1764 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
1765
1766 bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu)
1767 {
1768         return vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu) ||
1769                 xfer_to_guest_mode_work_pending();
1770 }
1771 EXPORT_SYMBOL_GPL(kvm_vcpu_exit_request);
1772
1773 /*
1774  * The fast path for frequent and performance sensitive wrmsr emulation,
1775  * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
1776  * the latency of virtual IPI by avoiding the expensive bits of transitioning
1777  * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
1778  * other cases which must be called after interrupts are enabled on the host.
1779  */
1780 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data)
1781 {
1782         if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(vcpu->arch.apic))
1783                 return 1;
1784
1785         if (((data & APIC_SHORT_MASK) == APIC_DEST_NOSHORT) &&
1786                 ((data & APIC_DEST_MASK) == APIC_DEST_PHYSICAL) &&
1787                 ((data & APIC_MODE_MASK) == APIC_DM_FIXED) &&
1788                 ((u32)(data >> 32) != X2APIC_BROADCAST)) {
1789
1790                 data &= ~(1 << 12);
1791                 kvm_apic_send_ipi(vcpu->arch.apic, (u32)data, (u32)(data >> 32));
1792                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR2, (u32)(data >> 32));
1793                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR, (u32)data);
1794                 trace_kvm_apic_write(APIC_ICR, (u32)data);
1795                 return 0;
1796         }
1797
1798         return 1;
1799 }
1800
1801 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu *vcpu, u64 data)
1802 {
1803         if (!kvm_can_use_hv_timer(vcpu))
1804                 return 1;
1805
1806         kvm_set_lapic_tscdeadline_msr(vcpu, data);
1807         return 0;
1808 }
1809
1810 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
1811 {
1812         u32 msr = kvm_rcx_read(vcpu);
1813         u64 data;
1814         fastpath_t ret = EXIT_FASTPATH_NONE;
1815
1816         switch (msr) {
1817         case APIC_BASE_MSR + (APIC_ICR >> 4):
1818                 data = kvm_read_edx_eax(vcpu);
1819                 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu, data)) {
1820                         kvm_skip_emulated_instruction(vcpu);
1821                         ret = EXIT_FASTPATH_EXIT_HANDLED;
1822                 }
1823                 break;
1824         case MSR_IA32_TSCDEADLINE:
1825                 data = kvm_read_edx_eax(vcpu);
1826                 if (!handle_fastpath_set_tscdeadline(vcpu, data)) {
1827                         kvm_skip_emulated_instruction(vcpu);
1828                         ret = EXIT_FASTPATH_REENTER_GUEST;
1829                 }
1830                 break;
1831         default:
1832                 break;
1833         }
1834
1835         if (ret != EXIT_FASTPATH_NONE)
1836                 trace_kvm_msr_write(msr, data);
1837
1838         return ret;
1839 }
1840 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff);
1841
1842 /*
1843  * Adapt set_msr() to msr_io()'s calling convention
1844  */
1845 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1846 {
1847         return kvm_get_msr_ignored_check(vcpu, index, data, true);
1848 }
1849
1850 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1851 {
1852         return kvm_set_msr_ignored_check(vcpu, index, *data, true);
1853 }
1854
1855 #ifdef CONFIG_X86_64
1856 struct pvclock_clock {
1857         int vclock_mode;
1858         u64 cycle_last;
1859         u64 mask;
1860         u32 mult;
1861         u32 shift;
1862         u64 base_cycles;
1863         u64 offset;
1864 };
1865
1866 struct pvclock_gtod_data {
1867         seqcount_t      seq;
1868
1869         struct pvclock_clock clock; /* extract of a clocksource struct */
1870         struct pvclock_clock raw_clock; /* extract of a clocksource struct */
1871
1872         ktime_t         offs_boot;
1873         u64             wall_time_sec;
1874 };
1875
1876 static struct pvclock_gtod_data pvclock_gtod_data;
1877
1878 static void update_pvclock_gtod(struct timekeeper *tk)
1879 {
1880         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1881
1882         write_seqcount_begin(&vdata->seq);
1883
1884         /* copy pvclock gtod data */
1885         vdata->clock.vclock_mode        = tk->tkr_mono.clock->vdso_clock_mode;
1886         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1887         vdata->clock.mask               = tk->tkr_mono.mask;
1888         vdata->clock.mult               = tk->tkr_mono.mult;
1889         vdata->clock.shift              = tk->tkr_mono.shift;
1890         vdata->clock.base_cycles        = tk->tkr_mono.xtime_nsec;
1891         vdata->clock.offset             = tk->tkr_mono.base;
1892
1893         vdata->raw_clock.vclock_mode    = tk->tkr_raw.clock->vdso_clock_mode;
1894         vdata->raw_clock.cycle_last     = tk->tkr_raw.cycle_last;
1895         vdata->raw_clock.mask           = tk->tkr_raw.mask;
1896         vdata->raw_clock.mult           = tk->tkr_raw.mult;
1897         vdata->raw_clock.shift          = tk->tkr_raw.shift;
1898         vdata->raw_clock.base_cycles    = tk->tkr_raw.xtime_nsec;
1899         vdata->raw_clock.offset         = tk->tkr_raw.base;
1900
1901         vdata->wall_time_sec            = tk->xtime_sec;
1902
1903         vdata->offs_boot                = tk->offs_boot;
1904
1905         write_seqcount_end(&vdata->seq);
1906 }
1907
1908 static s64 get_kvmclock_base_ns(void)
1909 {
1910         /* Count up from boot time, but with the frequency of the raw clock.  */
1911         return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data.offs_boot));
1912 }
1913 #else
1914 static s64 get_kvmclock_base_ns(void)
1915 {
1916         /* Master clock not used, so we can just use CLOCK_BOOTTIME.  */
1917         return ktime_get_boottime_ns();
1918 }
1919 #endif
1920
1921 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1922 {
1923         int version;
1924         int r;
1925         struct pvclock_wall_clock wc;
1926         u64 wall_nsec;
1927
1928         kvm->arch.wall_clock = wall_clock;
1929
1930         if (!wall_clock)
1931                 return;
1932
1933         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1934         if (r)
1935                 return;
1936
1937         if (version & 1)
1938                 ++version;  /* first time write, random junk */
1939
1940         ++version;
1941
1942         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1943                 return;
1944
1945         /*
1946          * The guest calculates current wall clock time by adding
1947          * system time (updated by kvm_guest_time_update below) to the
1948          * wall clock specified here.  We do the reverse here.
1949          */
1950         wall_nsec = ktime_get_real_ns() - get_kvmclock_ns(kvm);
1951
1952         wc.nsec = do_div(wall_nsec, 1000000000);
1953         wc.sec = (u32)wall_nsec; /* overflow in 2106 guest time */
1954         wc.version = version;
1955
1956         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1957
1958         version++;
1959         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1960 }
1961
1962 static void kvm_write_system_time(struct kvm_vcpu *vcpu, gpa_t system_time,
1963                                   bool old_msr, bool host_initiated)
1964 {
1965         struct kvm_arch *ka = &vcpu->kvm->arch;
1966
1967         if (vcpu->vcpu_id == 0 && !host_initiated) {
1968                 if (ka->boot_vcpu_runs_old_kvmclock && old_msr)
1969                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1970
1971                 ka->boot_vcpu_runs_old_kvmclock = old_msr;
1972         }
1973
1974         vcpu->arch.time = system_time;
1975         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
1976
1977         /* we verify if the enable bit is set... */
1978         vcpu->arch.pv_time_enabled = false;
1979         if (!(system_time & 1))
1980                 return;
1981
1982         if (!kvm_gfn_to_hva_cache_init(vcpu->kvm,
1983                                        &vcpu->arch.pv_time, system_time & ~1ULL,
1984                                        sizeof(struct pvclock_vcpu_time_info)))
1985                 vcpu->arch.pv_time_enabled = true;
1986
1987         return;
1988 }
1989
1990 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1991 {
1992         do_shl32_div32(dividend, divisor);
1993         return dividend;
1994 }
1995
1996 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1997                                s8 *pshift, u32 *pmultiplier)
1998 {
1999         uint64_t scaled64;
2000         int32_t  shift = 0;
2001         uint64_t tps64;
2002         uint32_t tps32;
2003
2004         tps64 = base_hz;
2005         scaled64 = scaled_hz;
2006         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
2007                 tps64 >>= 1;
2008                 shift--;
2009         }
2010
2011         tps32 = (uint32_t)tps64;
2012         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
2013                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
2014                         scaled64 >>= 1;
2015                 else
2016                         tps32 <<= 1;
2017                 shift++;
2018         }
2019
2020         *pshift = shift;
2021         *pmultiplier = div_frac(scaled64, tps32);
2022 }
2023
2024 #ifdef CONFIG_X86_64
2025 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
2026 #endif
2027
2028 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
2029 static unsigned long max_tsc_khz;
2030
2031 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
2032 {
2033         u64 v = (u64)khz * (1000000 + ppm);
2034         do_div(v, 1000000);
2035         return v;
2036 }
2037
2038 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
2039 {
2040         u64 ratio;
2041
2042         /* Guest TSC same frequency as host TSC? */
2043         if (!scale) {
2044                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
2045                 return 0;
2046         }
2047
2048         /* TSC scaling supported? */
2049         if (!kvm_has_tsc_control) {
2050                 if (user_tsc_khz > tsc_khz) {
2051                         vcpu->arch.tsc_catchup = 1;
2052                         vcpu->arch.tsc_always_catchup = 1;
2053                         return 0;
2054                 } else {
2055                         pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2056                         return -1;
2057                 }
2058         }
2059
2060         /* TSC scaling required  - calculate ratio */
2061         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
2062                                 user_tsc_khz, tsc_khz);
2063
2064         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
2065                 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2066                                     user_tsc_khz);
2067                 return -1;
2068         }
2069
2070         vcpu->arch.tsc_scaling_ratio = ratio;
2071         return 0;
2072 }
2073
2074 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
2075 {
2076         u32 thresh_lo, thresh_hi;
2077         int use_scaling = 0;
2078
2079         /* tsc_khz can be zero if TSC calibration fails */
2080         if (user_tsc_khz == 0) {
2081                 /* set tsc_scaling_ratio to a safe value */
2082                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
2083                 return -1;
2084         }
2085
2086         /* Compute a scale to convert nanoseconds in TSC cycles */
2087         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
2088                            &vcpu->arch.virtual_tsc_shift,
2089                            &vcpu->arch.virtual_tsc_mult);
2090         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
2091
2092         /*
2093          * Compute the variation in TSC rate which is acceptable
2094          * within the range of tolerance and decide if the
2095          * rate being applied is within that bounds of the hardware
2096          * rate.  If so, no scaling or compensation need be done.
2097          */
2098         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
2099         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
2100         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
2101                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
2102                 use_scaling = 1;
2103         }
2104         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
2105 }
2106
2107 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
2108 {
2109         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
2110                                       vcpu->arch.virtual_tsc_mult,
2111                                       vcpu->arch.virtual_tsc_shift);
2112         tsc += vcpu->arch.this_tsc_write;
2113         return tsc;
2114 }
2115
2116 static inline int gtod_is_based_on_tsc(int mode)
2117 {
2118         return mode == VDSO_CLOCKMODE_TSC || mode == VDSO_CLOCKMODE_HVCLOCK;
2119 }
2120
2121 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
2122 {
2123 #ifdef CONFIG_X86_64
2124         bool vcpus_matched;
2125         struct kvm_arch *ka = &vcpu->kvm->arch;
2126         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2127
2128         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2129                          atomic_read(&vcpu->kvm->online_vcpus));
2130
2131         /*
2132          * Once the masterclock is enabled, always perform request in
2133          * order to update it.
2134          *
2135          * In order to enable masterclock, the host clocksource must be TSC
2136          * and the vcpus need to have matched TSCs.  When that happens,
2137          * perform request to enable masterclock.
2138          */
2139         if (ka->use_master_clock ||
2140             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
2141                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2142
2143         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
2144                             atomic_read(&vcpu->kvm->online_vcpus),
2145                             ka->use_master_clock, gtod->clock.vclock_mode);
2146 #endif
2147 }
2148
2149 /*
2150  * Multiply tsc by a fixed point number represented by ratio.
2151  *
2152  * The most significant 64-N bits (mult) of ratio represent the
2153  * integral part of the fixed point number; the remaining N bits
2154  * (frac) represent the fractional part, ie. ratio represents a fixed
2155  * point number (mult + frac * 2^(-N)).
2156  *
2157  * N equals to kvm_tsc_scaling_ratio_frac_bits.
2158  */
2159 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
2160 {
2161         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
2162 }
2163
2164 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
2165 {
2166         u64 _tsc = tsc;
2167         u64 ratio = vcpu->arch.tsc_scaling_ratio;
2168
2169         if (ratio != kvm_default_tsc_scaling_ratio)
2170                 _tsc = __scale_tsc(ratio, tsc);
2171
2172         return _tsc;
2173 }
2174 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
2175
2176 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
2177 {
2178         u64 tsc;
2179
2180         tsc = kvm_scale_tsc(vcpu, rdtsc());
2181
2182         return target_tsc - tsc;
2183 }
2184
2185 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
2186 {
2187         return vcpu->arch.l1_tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
2188 }
2189 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
2190
2191 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
2192 {
2193         vcpu->arch.l1_tsc_offset = offset;
2194         vcpu->arch.tsc_offset = kvm_x86_ops.write_l1_tsc_offset(vcpu, offset);
2195 }
2196
2197 static inline bool kvm_check_tsc_unstable(void)
2198 {
2199 #ifdef CONFIG_X86_64
2200         /*
2201          * TSC is marked unstable when we're running on Hyper-V,
2202          * 'TSC page' clocksource is good.
2203          */
2204         if (pvclock_gtod_data.clock.vclock_mode == VDSO_CLOCKMODE_HVCLOCK)
2205                 return false;
2206 #endif
2207         return check_tsc_unstable();
2208 }
2209
2210 static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 data)
2211 {
2212         struct kvm *kvm = vcpu->kvm;
2213         u64 offset, ns, elapsed;
2214         unsigned long flags;
2215         bool matched;
2216         bool already_matched;
2217         bool synchronizing = false;
2218
2219         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
2220         offset = kvm_compute_tsc_offset(vcpu, data);
2221         ns = get_kvmclock_base_ns();
2222         elapsed = ns - kvm->arch.last_tsc_nsec;
2223
2224         if (vcpu->arch.virtual_tsc_khz) {
2225                 if (data == 0) {
2226                         /*
2227                          * detection of vcpu initialization -- need to sync
2228                          * with other vCPUs. This particularly helps to keep
2229                          * kvm_clock stable after CPU hotplug
2230                          */
2231                         synchronizing = true;
2232                 } else {
2233                         u64 tsc_exp = kvm->arch.last_tsc_write +
2234                                                 nsec_to_cycles(vcpu, elapsed);
2235                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
2236                         /*
2237                          * Special case: TSC write with a small delta (1 second)
2238                          * of virtual cycle time against real time is
2239                          * interpreted as an attempt to synchronize the CPU.
2240                          */
2241                         synchronizing = data < tsc_exp + tsc_hz &&
2242                                         data + tsc_hz > tsc_exp;
2243                 }
2244         }
2245
2246         /*
2247          * For a reliable TSC, we can match TSC offsets, and for an unstable
2248          * TSC, we add elapsed time in this computation.  We could let the
2249          * compensation code attempt to catch up if we fall behind, but
2250          * it's better to try to match offsets from the beginning.
2251          */
2252         if (synchronizing &&
2253             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
2254                 if (!kvm_check_tsc_unstable()) {
2255                         offset = kvm->arch.cur_tsc_offset;
2256                 } else {
2257                         u64 delta = nsec_to_cycles(vcpu, elapsed);
2258                         data += delta;
2259                         offset = kvm_compute_tsc_offset(vcpu, data);
2260                 }
2261                 matched = true;
2262                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
2263         } else {
2264                 /*
2265                  * We split periods of matched TSC writes into generations.
2266                  * For each generation, we track the original measured
2267                  * nanosecond time, offset, and write, so if TSCs are in
2268                  * sync, we can match exact offset, and if not, we can match
2269                  * exact software computation in compute_guest_tsc()
2270                  *
2271                  * These values are tracked in kvm->arch.cur_xxx variables.
2272                  */
2273                 kvm->arch.cur_tsc_generation++;
2274                 kvm->arch.cur_tsc_nsec = ns;
2275                 kvm->arch.cur_tsc_write = data;
2276                 kvm->arch.cur_tsc_offset = offset;
2277                 matched = false;
2278         }
2279
2280         /*
2281          * We also track th most recent recorded KHZ, write and time to
2282          * allow the matching interval to be extended at each write.
2283          */
2284         kvm->arch.last_tsc_nsec = ns;
2285         kvm->arch.last_tsc_write = data;
2286         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
2287
2288         vcpu->arch.last_guest_tsc = data;
2289
2290         /* Keep track of which generation this VCPU has synchronized to */
2291         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
2292         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
2293         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
2294
2295         kvm_vcpu_write_tsc_offset(vcpu, offset);
2296         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
2297
2298         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
2299         if (!matched) {
2300                 kvm->arch.nr_vcpus_matched_tsc = 0;
2301         } else if (!already_matched) {
2302                 kvm->arch.nr_vcpus_matched_tsc++;
2303         }
2304
2305         kvm_track_tsc_matching(vcpu);
2306         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
2307 }
2308
2309 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
2310                                            s64 adjustment)
2311 {
2312         u64 tsc_offset = vcpu->arch.l1_tsc_offset;
2313         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
2314 }
2315
2316 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
2317 {
2318         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
2319                 WARN_ON(adjustment < 0);
2320         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
2321         adjust_tsc_offset_guest(vcpu, adjustment);
2322 }
2323
2324 #ifdef CONFIG_X86_64
2325
2326 static u64 read_tsc(void)
2327 {
2328         u64 ret = (u64)rdtsc_ordered();
2329         u64 last = pvclock_gtod_data.clock.cycle_last;
2330
2331         if (likely(ret >= last))
2332                 return ret;
2333
2334         /*
2335          * GCC likes to generate cmov here, but this branch is extremely
2336          * predictable (it's just a function of time and the likely is
2337          * very likely) and there's a data dependence, so force GCC
2338          * to generate a branch instead.  I don't barrier() because
2339          * we don't actually need a barrier, and if this function
2340          * ever gets inlined it will generate worse code.
2341          */
2342         asm volatile ("");
2343         return last;
2344 }
2345
2346 static inline u64 vgettsc(struct pvclock_clock *clock, u64 *tsc_timestamp,
2347                           int *mode)
2348 {
2349         long v;
2350         u64 tsc_pg_val;
2351
2352         switch (clock->vclock_mode) {
2353         case VDSO_CLOCKMODE_HVCLOCK:
2354                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2355                                                   tsc_timestamp);
2356                 if (tsc_pg_val != U64_MAX) {
2357                         /* TSC page valid */
2358                         *mode = VDSO_CLOCKMODE_HVCLOCK;
2359                         v = (tsc_pg_val - clock->cycle_last) &
2360                                 clock->mask;
2361                 } else {
2362                         /* TSC page invalid */
2363                         *mode = VDSO_CLOCKMODE_NONE;
2364                 }
2365                 break;
2366         case VDSO_CLOCKMODE_TSC:
2367                 *mode = VDSO_CLOCKMODE_TSC;
2368                 *tsc_timestamp = read_tsc();
2369                 v = (*tsc_timestamp - clock->cycle_last) &
2370                         clock->mask;
2371                 break;
2372         default:
2373                 *mode = VDSO_CLOCKMODE_NONE;
2374         }
2375
2376         if (*mode == VDSO_CLOCKMODE_NONE)
2377                 *tsc_timestamp = v = 0;
2378
2379         return v * clock->mult;
2380 }
2381
2382 static int do_monotonic_raw(s64 *t, u64 *tsc_timestamp)
2383 {
2384         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2385         unsigned long seq;
2386         int mode;
2387         u64 ns;
2388
2389         do {
2390                 seq = read_seqcount_begin(&gtod->seq);
2391                 ns = gtod->raw_clock.base_cycles;
2392                 ns += vgettsc(&gtod->raw_clock, tsc_timestamp, &mode);
2393                 ns >>= gtod->raw_clock.shift;
2394                 ns += ktime_to_ns(ktime_add(gtod->raw_clock.offset, gtod->offs_boot));
2395         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2396         *t = ns;
2397
2398         return mode;
2399 }
2400
2401 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2402 {
2403         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2404         unsigned long seq;
2405         int mode;
2406         u64 ns;
2407
2408         do {
2409                 seq = read_seqcount_begin(&gtod->seq);
2410                 ts->tv_sec = gtod->wall_time_sec;
2411                 ns = gtod->clock.base_cycles;
2412                 ns += vgettsc(&gtod->clock, tsc_timestamp, &mode);
2413                 ns >>= gtod->clock.shift;
2414         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2415
2416         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2417         ts->tv_nsec = ns;
2418
2419         return mode;
2420 }
2421
2422 /* returns true if host is using TSC based clocksource */
2423 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2424 {
2425         /* checked again under seqlock below */
2426         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2427                 return false;
2428
2429         return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns,
2430                                                       tsc_timestamp));
2431 }
2432
2433 /* returns true if host is using TSC based clocksource */
2434 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2435                                            u64 *tsc_timestamp)
2436 {
2437         /* checked again under seqlock below */
2438         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2439                 return false;
2440
2441         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2442 }
2443 #endif
2444
2445 /*
2446  *
2447  * Assuming a stable TSC across physical CPUS, and a stable TSC
2448  * across virtual CPUs, the following condition is possible.
2449  * Each numbered line represents an event visible to both
2450  * CPUs at the next numbered event.
2451  *
2452  * "timespecX" represents host monotonic time. "tscX" represents
2453  * RDTSC value.
2454  *
2455  *              VCPU0 on CPU0           |       VCPU1 on CPU1
2456  *
2457  * 1.  read timespec0,tsc0
2458  * 2.                                   | timespec1 = timespec0 + N
2459  *                                      | tsc1 = tsc0 + M
2460  * 3. transition to guest               | transition to guest
2461  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2462  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
2463  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2464  *
2465  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2466  *
2467  *      - ret0 < ret1
2468  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2469  *              ...
2470  *      - 0 < N - M => M < N
2471  *
2472  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2473  * always the case (the difference between two distinct xtime instances
2474  * might be smaller then the difference between corresponding TSC reads,
2475  * when updating guest vcpus pvclock areas).
2476  *
2477  * To avoid that problem, do not allow visibility of distinct
2478  * system_timestamp/tsc_timestamp values simultaneously: use a master
2479  * copy of host monotonic time values. Update that master copy
2480  * in lockstep.
2481  *
2482  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2483  *
2484  */
2485
2486 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2487 {
2488 #ifdef CONFIG_X86_64
2489         struct kvm_arch *ka = &kvm->arch;
2490         int vclock_mode;
2491         bool host_tsc_clocksource, vcpus_matched;
2492
2493         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2494                         atomic_read(&kvm->online_vcpus));
2495
2496         /*
2497          * If the host uses TSC clock, then passthrough TSC as stable
2498          * to the guest.
2499          */
2500         host_tsc_clocksource = kvm_get_time_and_clockread(
2501                                         &ka->master_kernel_ns,
2502                                         &ka->master_cycle_now);
2503
2504         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2505                                 && !ka->backwards_tsc_observed
2506                                 && !ka->boot_vcpu_runs_old_kvmclock;
2507
2508         if (ka->use_master_clock)
2509                 atomic_set(&kvm_guest_has_master_clock, 1);
2510
2511         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2512         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2513                                         vcpus_matched);
2514 #endif
2515 }
2516
2517 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2518 {
2519         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2520 }
2521
2522 static void kvm_gen_update_masterclock(struct kvm *kvm)
2523 {
2524 #ifdef CONFIG_X86_64
2525         int i;
2526         struct kvm_vcpu *vcpu;
2527         struct kvm_arch *ka = &kvm->arch;
2528
2529         spin_lock(&ka->pvclock_gtod_sync_lock);
2530         kvm_make_mclock_inprogress_request(kvm);
2531         /* no guest entries from this point */
2532         pvclock_update_vm_gtod_copy(kvm);
2533
2534         kvm_for_each_vcpu(i, vcpu, kvm)
2535                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2536
2537         /* guest entries allowed */
2538         kvm_for_each_vcpu(i, vcpu, kvm)
2539                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2540
2541         spin_unlock(&ka->pvclock_gtod_sync_lock);
2542 #endif
2543 }
2544
2545 u64 get_kvmclock_ns(struct kvm *kvm)
2546 {
2547         struct kvm_arch *ka = &kvm->arch;
2548         struct pvclock_vcpu_time_info hv_clock;
2549         u64 ret;
2550
2551         spin_lock(&ka->pvclock_gtod_sync_lock);
2552         if (!ka->use_master_clock) {
2553                 spin_unlock(&ka->pvclock_gtod_sync_lock);
2554                 return get_kvmclock_base_ns() + ka->kvmclock_offset;
2555         }
2556
2557         hv_clock.tsc_timestamp = ka->master_cycle_now;
2558         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2559         spin_unlock(&ka->pvclock_gtod_sync_lock);
2560
2561         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2562         get_cpu();
2563
2564         if (__this_cpu_read(cpu_tsc_khz)) {
2565                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2566                                    &hv_clock.tsc_shift,
2567                                    &hv_clock.tsc_to_system_mul);
2568                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2569         } else
2570                 ret = get_kvmclock_base_ns() + ka->kvmclock_offset;
2571
2572         put_cpu();
2573
2574         return ret;
2575 }
2576
2577 static void kvm_setup_pvclock_page(struct kvm_vcpu *v)
2578 {
2579         struct kvm_vcpu_arch *vcpu = &v->arch;
2580         struct pvclock_vcpu_time_info guest_hv_clock;
2581
2582         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
2583                 &guest_hv_clock, sizeof(guest_hv_clock))))
2584                 return;
2585
2586         /* This VCPU is paused, but it's legal for a guest to read another
2587          * VCPU's kvmclock, so we really have to follow the specification where
2588          * it says that version is odd if data is being modified, and even after
2589          * it is consistent.
2590          *
2591          * Version field updates must be kept separate.  This is because
2592          * kvm_write_guest_cached might use a "rep movs" instruction, and
2593          * writes within a string instruction are weakly ordered.  So there
2594          * are three writes overall.
2595          *
2596          * As a small optimization, only write the version field in the first
2597          * and third write.  The vcpu->pv_time cache is still valid, because the
2598          * version field is the first in the struct.
2599          */
2600         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2601
2602         if (guest_hv_clock.version & 1)
2603                 ++guest_hv_clock.version;  /* first time write, random junk */
2604
2605         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2606         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2607                                 &vcpu->hv_clock,
2608                                 sizeof(vcpu->hv_clock.version));
2609
2610         smp_wmb();
2611
2612         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2613         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2614
2615         if (vcpu->pvclock_set_guest_stopped_request) {
2616                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2617                 vcpu->pvclock_set_guest_stopped_request = false;
2618         }
2619
2620         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2621
2622         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2623                                 &vcpu->hv_clock,
2624                                 sizeof(vcpu->hv_clock));
2625
2626         smp_wmb();
2627
2628         vcpu->hv_clock.version++;
2629         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2630                                 &vcpu->hv_clock,
2631                                 sizeof(vcpu->hv_clock.version));
2632 }
2633
2634 static int kvm_guest_time_update(struct kvm_vcpu *v)
2635 {
2636         unsigned long flags, tgt_tsc_khz;
2637         struct kvm_vcpu_arch *vcpu = &v->arch;
2638         struct kvm_arch *ka = &v->kvm->arch;
2639         s64 kernel_ns;
2640         u64 tsc_timestamp, host_tsc;
2641         u8 pvclock_flags;
2642         bool use_master_clock;
2643
2644         kernel_ns = 0;
2645         host_tsc = 0;
2646
2647         /*
2648          * If the host uses TSC clock, then passthrough TSC as stable
2649          * to the guest.
2650          */
2651         spin_lock(&ka->pvclock_gtod_sync_lock);
2652         use_master_clock = ka->use_master_clock;
2653         if (use_master_clock) {
2654                 host_tsc = ka->master_cycle_now;
2655                 kernel_ns = ka->master_kernel_ns;
2656         }
2657         spin_unlock(&ka->pvclock_gtod_sync_lock);
2658
2659         /* Keep irq disabled to prevent changes to the clock */
2660         local_irq_save(flags);
2661         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2662         if (unlikely(tgt_tsc_khz == 0)) {
2663                 local_irq_restore(flags);
2664                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2665                 return 1;
2666         }
2667         if (!use_master_clock) {
2668                 host_tsc = rdtsc();
2669                 kernel_ns = get_kvmclock_base_ns();
2670         }
2671
2672         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2673
2674         /*
2675          * We may have to catch up the TSC to match elapsed wall clock
2676          * time for two reasons, even if kvmclock is used.
2677          *   1) CPU could have been running below the maximum TSC rate
2678          *   2) Broken TSC compensation resets the base at each VCPU
2679          *      entry to avoid unknown leaps of TSC even when running
2680          *      again on the same CPU.  This may cause apparent elapsed
2681          *      time to disappear, and the guest to stand still or run
2682          *      very slowly.
2683          */
2684         if (vcpu->tsc_catchup) {
2685                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2686                 if (tsc > tsc_timestamp) {
2687                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2688                         tsc_timestamp = tsc;
2689                 }
2690         }
2691
2692         local_irq_restore(flags);
2693
2694         /* With all the info we got, fill in the values */
2695
2696         if (kvm_has_tsc_control)
2697                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
2698
2699         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2700                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2701                                    &vcpu->hv_clock.tsc_shift,
2702                                    &vcpu->hv_clock.tsc_to_system_mul);
2703                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2704         }
2705
2706         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2707         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2708         vcpu->last_guest_tsc = tsc_timestamp;
2709
2710         /* If the host uses TSC clocksource, then it is stable */
2711         pvclock_flags = 0;
2712         if (use_master_clock)
2713                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2714
2715         vcpu->hv_clock.flags = pvclock_flags;
2716
2717         if (vcpu->pv_time_enabled)
2718                 kvm_setup_pvclock_page(v);
2719         if (v == kvm_get_vcpu(v->kvm, 0))
2720                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2721         return 0;
2722 }
2723
2724 /*
2725  * kvmclock updates which are isolated to a given vcpu, such as
2726  * vcpu->cpu migration, should not allow system_timestamp from
2727  * the rest of the vcpus to remain static. Otherwise ntp frequency
2728  * correction applies to one vcpu's system_timestamp but not
2729  * the others.
2730  *
2731  * So in those cases, request a kvmclock update for all vcpus.
2732  * We need to rate-limit these requests though, as they can
2733  * considerably slow guests that have a large number of vcpus.
2734  * The time for a remote vcpu to update its kvmclock is bound
2735  * by the delay we use to rate-limit the updates.
2736  */
2737
2738 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2739
2740 static void kvmclock_update_fn(struct work_struct *work)
2741 {
2742         int i;
2743         struct delayed_work *dwork = to_delayed_work(work);
2744         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2745                                            kvmclock_update_work);
2746         struct kvm *kvm = container_of(ka, struct kvm, arch);
2747         struct kvm_vcpu *vcpu;
2748
2749         kvm_for_each_vcpu(i, vcpu, kvm) {
2750                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2751                 kvm_vcpu_kick(vcpu);
2752         }
2753 }
2754
2755 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2756 {
2757         struct kvm *kvm = v->kvm;
2758
2759         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2760         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2761                                         KVMCLOCK_UPDATE_DELAY);
2762 }
2763
2764 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2765
2766 static void kvmclock_sync_fn(struct work_struct *work)
2767 {
2768         struct delayed_work *dwork = to_delayed_work(work);
2769         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2770                                            kvmclock_sync_work);
2771         struct kvm *kvm = container_of(ka, struct kvm, arch);
2772
2773         if (!kvmclock_periodic_sync)
2774                 return;
2775
2776         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2777         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2778                                         KVMCLOCK_SYNC_PERIOD);
2779 }
2780
2781 /*
2782  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
2783  */
2784 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
2785 {
2786         /* McStatusWrEn enabled? */
2787         if (guest_cpuid_is_amd_or_hygon(vcpu))
2788                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
2789
2790         return false;
2791 }
2792
2793 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2794 {
2795         u64 mcg_cap = vcpu->arch.mcg_cap;
2796         unsigned bank_num = mcg_cap & 0xff;
2797         u32 msr = msr_info->index;
2798         u64 data = msr_info->data;
2799
2800         switch (msr) {
2801         case MSR_IA32_MCG_STATUS:
2802                 vcpu->arch.mcg_status = data;
2803                 break;
2804         case MSR_IA32_MCG_CTL:
2805                 if (!(mcg_cap & MCG_CTL_P) &&
2806                     (data || !msr_info->host_initiated))
2807                         return 1;
2808                 if (data != 0 && data != ~(u64)0)
2809                         return 1;
2810                 vcpu->arch.mcg_ctl = data;
2811                 break;
2812         default:
2813                 if (msr >= MSR_IA32_MC0_CTL &&
2814                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2815                         u32 offset = array_index_nospec(
2816                                 msr - MSR_IA32_MC0_CTL,
2817                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
2818
2819                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2820                          * some Linux kernels though clear bit 10 in bank 4 to
2821                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2822                          * this to avoid an uncatched #GP in the guest
2823                          */
2824                         if ((offset & 0x3) == 0 &&
2825                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2826                                 return -1;
2827
2828                         /* MCi_STATUS */
2829                         if (!msr_info->host_initiated &&
2830                             (offset & 0x3) == 1 && data != 0) {
2831                                 if (!can_set_mci_status(vcpu))
2832                                         return -1;
2833                         }
2834
2835                         vcpu->arch.mce_banks[offset] = data;
2836                         break;
2837                 }
2838                 return 1;
2839         }
2840         return 0;
2841 }
2842
2843 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
2844 {
2845         struct kvm *kvm = vcpu->kvm;
2846         int lm = is_long_mode(vcpu);
2847         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
2848                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
2849         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
2850                 : kvm->arch.xen_hvm_config.blob_size_32;
2851         u32 page_num = data & ~PAGE_MASK;
2852         u64 page_addr = data & PAGE_MASK;
2853         u8 *page;
2854
2855         if (page_num >= blob_size)
2856                 return 1;
2857
2858         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
2859         if (IS_ERR(page))
2860                 return PTR_ERR(page);
2861
2862         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE)) {
2863                 kfree(page);
2864                 return 1;
2865         }
2866         return 0;
2867 }
2868
2869 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu *vcpu)
2870 {
2871         u64 mask = KVM_ASYNC_PF_ENABLED | KVM_ASYNC_PF_DELIVERY_AS_INT;
2872
2873         return (vcpu->arch.apf.msr_en_val & mask) == mask;
2874 }
2875
2876 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2877 {
2878         gpa_t gpa = data & ~0x3f;
2879
2880         /* Bits 4:5 are reserved, Should be zero */
2881         if (data & 0x30)
2882                 return 1;
2883
2884         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_VMEXIT) &&
2885             (data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT))
2886                 return 1;
2887
2888         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT) &&
2889             (data & KVM_ASYNC_PF_DELIVERY_AS_INT))
2890                 return 1;
2891
2892         if (!lapic_in_kernel(vcpu))
2893                 return data ? 1 : 0;
2894
2895         vcpu->arch.apf.msr_en_val = data;
2896
2897         if (!kvm_pv_async_pf_enabled(vcpu)) {
2898                 kvm_clear_async_pf_completion_queue(vcpu);
2899                 kvm_async_pf_hash_reset(vcpu);
2900                 return 0;
2901         }
2902
2903         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2904                                         sizeof(u64)))
2905                 return 1;
2906
2907         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2908         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
2909
2910         kvm_async_pf_wakeup_all(vcpu);
2911
2912         return 0;
2913 }
2914
2915 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu *vcpu, u64 data)
2916 {
2917         /* Bits 8-63 are reserved */
2918         if (data >> 8)
2919                 return 1;
2920
2921         if (!lapic_in_kernel(vcpu))
2922                 return 1;
2923
2924         vcpu->arch.apf.msr_int_val = data;
2925
2926         vcpu->arch.apf.vec = data & KVM_ASYNC_PF_VEC_MASK;
2927
2928         return 0;
2929 }
2930
2931 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2932 {
2933         vcpu->arch.pv_time_enabled = false;
2934         vcpu->arch.time = 0;
2935 }
2936
2937 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu *vcpu)
2938 {
2939         ++vcpu->stat.tlb_flush;
2940         kvm_x86_ops.tlb_flush_all(vcpu);
2941 }
2942
2943 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu *vcpu)
2944 {
2945         ++vcpu->stat.tlb_flush;
2946         kvm_x86_ops.tlb_flush_guest(vcpu);
2947 }
2948
2949 static void record_steal_time(struct kvm_vcpu *vcpu)
2950 {
2951         struct kvm_host_map map;
2952         struct kvm_steal_time *st;
2953
2954         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2955                 return;
2956
2957         /* -EAGAIN is returned in atomic context so we can just return. */
2958         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT,
2959                         &map, &vcpu->arch.st.cache, false))
2960                 return;
2961
2962         st = map.hva +
2963                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
2964
2965         /*
2966          * Doing a TLB flush here, on the guest's behalf, can avoid
2967          * expensive IPIs.
2968          */
2969         if (guest_pv_has(vcpu, KVM_FEATURE_PV_TLB_FLUSH)) {
2970                 trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
2971                                        st->preempted & KVM_VCPU_FLUSH_TLB);
2972                 if (xchg(&st->preempted, 0) & KVM_VCPU_FLUSH_TLB)
2973                         kvm_vcpu_flush_tlb_guest(vcpu);
2974         }
2975
2976         vcpu->arch.st.preempted = 0;
2977
2978         if (st->version & 1)
2979                 st->version += 1;  /* first time write, random junk */
2980
2981         st->version += 1;
2982
2983         smp_wmb();
2984
2985         st->steal += current->sched_info.run_delay -
2986                 vcpu->arch.st.last_steal;
2987         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2988
2989         smp_wmb();
2990
2991         st->version += 1;
2992
2993         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, false);
2994 }
2995
2996 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2997 {
2998         bool pr = false;
2999         u32 msr = msr_info->index;
3000         u64 data = msr_info->data;
3001
3002         switch (msr) {
3003         case MSR_AMD64_NB_CFG:
3004         case MSR_IA32_UCODE_WRITE:
3005         case MSR_VM_HSAVE_PA:
3006         case MSR_AMD64_PATCH_LOADER:
3007         case MSR_AMD64_BU_CFG2:
3008         case MSR_AMD64_DC_CFG:
3009         case MSR_F15H_EX_CFG:
3010                 break;
3011
3012         case MSR_IA32_UCODE_REV:
3013                 if (msr_info->host_initiated)
3014                         vcpu->arch.microcode_version = data;
3015                 break;
3016         case MSR_IA32_ARCH_CAPABILITIES:
3017                 if (!msr_info->host_initiated)
3018                         return 1;
3019                 vcpu->arch.arch_capabilities = data;
3020                 break;
3021         case MSR_IA32_PERF_CAPABILITIES: {
3022                 struct kvm_msr_entry msr_ent = {.index = msr, .data = 0};
3023
3024                 if (!msr_info->host_initiated)
3025                         return 1;
3026                 if (guest_cpuid_has(vcpu, X86_FEATURE_PDCM) && kvm_get_msr_feature(&msr_ent))
3027                         return 1;
3028                 if (data & ~msr_ent.data)
3029                         return 1;
3030
3031                 vcpu->arch.perf_capabilities = data;
3032
3033                 return 0;
3034                 }
3035         case MSR_EFER:
3036                 return set_efer(vcpu, msr_info);
3037         case MSR_K7_HWCR:
3038                 data &= ~(u64)0x40;     /* ignore flush filter disable */
3039                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
3040                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
3041
3042                 /* Handle McStatusWrEn */
3043                 if (data == BIT_ULL(18)) {
3044                         vcpu->arch.msr_hwcr = data;
3045                 } else if (data != 0) {
3046                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
3047                                     data);
3048                         return 1;
3049                 }
3050                 break;
3051         case MSR_FAM10H_MMIO_CONF_BASE:
3052                 if (data != 0) {
3053                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
3054                                     "0x%llx\n", data);
3055                         return 1;
3056                 }
3057                 break;
3058         case MSR_IA32_DEBUGCTLMSR:
3059                 if (!data) {
3060                         /* We support the non-activated case already */
3061                         break;
3062                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
3063                         /* Values other than LBR and BTF are vendor-specific,
3064                            thus reserved and should throw a #GP */
3065                         return 1;
3066                 }
3067                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
3068                             __func__, data);
3069                 break;
3070         case 0x200 ... 0x2ff:
3071                 return kvm_mtrr_set_msr(vcpu, msr, data);
3072         case MSR_IA32_APICBASE:
3073                 return kvm_set_apic_base(vcpu, msr_info);
3074         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3075                 return kvm_x2apic_msr_write(vcpu, msr, data);
3076         case MSR_IA32_TSCDEADLINE:
3077                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
3078                 break;
3079         case MSR_IA32_TSC_ADJUST:
3080                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
3081                         if (!msr_info->host_initiated) {
3082                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
3083                                 adjust_tsc_offset_guest(vcpu, adj);
3084                         }
3085                         vcpu->arch.ia32_tsc_adjust_msr = data;
3086                 }
3087                 break;
3088         case MSR_IA32_MISC_ENABLE:
3089                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
3090                     ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
3091                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
3092                                 return 1;
3093                         vcpu->arch.ia32_misc_enable_msr = data;
3094                         kvm_update_cpuid_runtime(vcpu);
3095                 } else {
3096                         vcpu->arch.ia32_misc_enable_msr = data;
3097                 }
3098                 break;
3099         case MSR_IA32_SMBASE:
3100                 if (!msr_info->host_initiated)
3101                         return 1;
3102                 vcpu->arch.smbase = data;
3103                 break;
3104         case MSR_IA32_POWER_CTL:
3105                 vcpu->arch.msr_ia32_power_ctl = data;
3106                 break;
3107         case MSR_IA32_TSC:
3108                 if (msr_info->host_initiated) {
3109                         kvm_synchronize_tsc(vcpu, data);
3110                 } else {
3111                         u64 adj = kvm_compute_tsc_offset(vcpu, data) - vcpu->arch.l1_tsc_offset;
3112                         adjust_tsc_offset_guest(vcpu, adj);
3113                         vcpu->arch.ia32_tsc_adjust_msr += adj;
3114                 }
3115                 break;
3116         case MSR_IA32_XSS:
3117                 if (!msr_info->host_initiated &&
3118                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3119                         return 1;
3120                 /*
3121                  * KVM supports exposing PT to the guest, but does not support
3122                  * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3123                  * XSAVES/XRSTORS to save/restore PT MSRs.
3124                  */
3125                 if (data & ~supported_xss)
3126                         return 1;
3127                 vcpu->arch.ia32_xss = data;
3128                 break;
3129         case MSR_SMI_COUNT:
3130                 if (!msr_info->host_initiated)
3131                         return 1;
3132                 vcpu->arch.smi_count = data;
3133                 break;
3134         case MSR_KVM_WALL_CLOCK_NEW:
3135                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3136                         return 1;
3137
3138                 kvm_write_wall_clock(vcpu->kvm, data);
3139                 break;
3140         case MSR_KVM_WALL_CLOCK:
3141                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3142                         return 1;
3143
3144                 kvm_write_wall_clock(vcpu->kvm, data);
3145                 break;
3146         case MSR_KVM_SYSTEM_TIME_NEW:
3147                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3148                         return 1;
3149
3150                 kvm_write_system_time(vcpu, data, false, msr_info->host_initiated);
3151                 break;
3152         case MSR_KVM_SYSTEM_TIME:
3153                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3154                         return 1;
3155
3156                 kvm_write_system_time(vcpu, data, true,  msr_info->host_initiated);
3157                 break;
3158         case MSR_KVM_ASYNC_PF_EN:
3159                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3160                         return 1;
3161
3162                 if (kvm_pv_enable_async_pf(vcpu, data))
3163                         return 1;
3164                 break;
3165         case MSR_KVM_ASYNC_PF_INT:
3166                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3167                         return 1;
3168
3169                 if (kvm_pv_enable_async_pf_int(vcpu, data))
3170                         return 1;
3171                 break;
3172         case MSR_KVM_ASYNC_PF_ACK:
3173                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3174                         return 1;
3175                 if (data & 0x1) {
3176                         vcpu->arch.apf.pageready_pending = false;
3177                         kvm_check_async_pf_completion(vcpu);
3178                 }
3179                 break;
3180         case MSR_KVM_STEAL_TIME:
3181                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3182                         return 1;
3183
3184                 if (unlikely(!sched_info_on()))
3185                         return 1;
3186
3187                 if (data & KVM_STEAL_RESERVED_MASK)
3188                         return 1;
3189
3190                 vcpu->arch.st.msr_val = data;
3191
3192                 if (!(data & KVM_MSR_ENABLED))
3193                         break;
3194
3195                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3196
3197                 break;
3198         case MSR_KVM_PV_EOI_EN:
3199                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3200                         return 1;
3201
3202                 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
3203                         return 1;
3204                 break;
3205
3206         case MSR_KVM_POLL_CONTROL:
3207                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3208                         return 1;
3209
3210                 /* only enable bit supported */
3211                 if (data & (-1ULL << 1))
3212                         return 1;
3213
3214                 vcpu->arch.msr_kvm_poll_control = data;
3215                 break;
3216
3217         case MSR_IA32_MCG_CTL:
3218         case MSR_IA32_MCG_STATUS:
3219         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3220                 return set_msr_mce(vcpu, msr_info);
3221
3222         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3223         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3224                 pr = true;
3225                 fallthrough;
3226         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3227         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3228                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3229                         return kvm_pmu_set_msr(vcpu, msr_info);
3230
3231                 if (pr || data != 0)
3232                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
3233                                     "0x%x data 0x%llx\n", msr, data);
3234                 break;
3235         case MSR_K7_CLK_CTL:
3236                 /*
3237                  * Ignore all writes to this no longer documented MSR.
3238                  * Writes are only relevant for old K7 processors,
3239                  * all pre-dating SVM, but a recommended workaround from
3240                  * AMD for these chips. It is possible to specify the
3241                  * affected processor models on the command line, hence
3242                  * the need to ignore the workaround.
3243                  */
3244                 break;
3245         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3246         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3247         case HV_X64_MSR_SYNDBG_OPTIONS:
3248         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3249         case HV_X64_MSR_CRASH_CTL:
3250         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3251         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3252         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3253         case HV_X64_MSR_TSC_EMULATION_STATUS:
3254                 return kvm_hv_set_msr_common(vcpu, msr, data,
3255                                              msr_info->host_initiated);
3256         case MSR_IA32_BBL_CR_CTL3:
3257                 /* Drop writes to this legacy MSR -- see rdmsr
3258                  * counterpart for further detail.
3259                  */
3260                 if (report_ignored_msrs)
3261                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
3262                                 msr, data);
3263                 break;
3264         case MSR_AMD64_OSVW_ID_LENGTH:
3265                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3266                         return 1;
3267                 vcpu->arch.osvw.length = data;
3268                 break;
3269         case MSR_AMD64_OSVW_STATUS:
3270                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3271                         return 1;
3272                 vcpu->arch.osvw.status = data;
3273                 break;
3274         case MSR_PLATFORM_INFO:
3275                 if (!msr_info->host_initiated ||
3276                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
3277                      cpuid_fault_enabled(vcpu)))
3278                         return 1;
3279                 vcpu->arch.msr_platform_info = data;
3280                 break;
3281         case MSR_MISC_FEATURES_ENABLES:
3282                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
3283                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
3284                      !supports_cpuid_fault(vcpu)))
3285                         return 1;
3286                 vcpu->arch.msr_misc_features_enables = data;
3287                 break;
3288         default:
3289                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
3290                         return xen_hvm_config(vcpu, data);
3291                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3292                         return kvm_pmu_set_msr(vcpu, msr_info);
3293                 return KVM_MSR_RET_INVALID;
3294         }
3295         return 0;
3296 }
3297 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
3298
3299 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
3300 {
3301         u64 data;
3302         u64 mcg_cap = vcpu->arch.mcg_cap;
3303         unsigned bank_num = mcg_cap & 0xff;
3304
3305         switch (msr) {
3306         case MSR_IA32_P5_MC_ADDR:
3307         case MSR_IA32_P5_MC_TYPE:
3308                 data = 0;
3309                 break;
3310         case MSR_IA32_MCG_CAP:
3311                 data = vcpu->arch.mcg_cap;
3312                 break;
3313         case MSR_IA32_MCG_CTL:
3314                 if (!(mcg_cap & MCG_CTL_P) && !host)
3315                         return 1;
3316                 data = vcpu->arch.mcg_ctl;
3317                 break;
3318         case MSR_IA32_MCG_STATUS:
3319                 data = vcpu->arch.mcg_status;
3320                 break;
3321         default:
3322                 if (msr >= MSR_IA32_MC0_CTL &&
3323                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3324                         u32 offset = array_index_nospec(
3325                                 msr - MSR_IA32_MC0_CTL,
3326                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3327
3328                         data = vcpu->arch.mce_banks[offset];
3329                         break;
3330                 }
3331                 return 1;
3332         }
3333         *pdata = data;
3334         return 0;
3335 }
3336
3337 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3338 {
3339         switch (msr_info->index) {
3340         case MSR_IA32_PLATFORM_ID:
3341         case MSR_IA32_EBL_CR_POWERON:
3342         case MSR_IA32_DEBUGCTLMSR:
3343         case MSR_IA32_LASTBRANCHFROMIP:
3344         case MSR_IA32_LASTBRANCHTOIP:
3345         case MSR_IA32_LASTINTFROMIP:
3346         case MSR_IA32_LASTINTTOIP:
3347         case MSR_K8_SYSCFG:
3348         case MSR_K8_TSEG_ADDR:
3349         case MSR_K8_TSEG_MASK:
3350         case MSR_VM_HSAVE_PA:
3351         case MSR_K8_INT_PENDING_MSG:
3352         case MSR_AMD64_NB_CFG:
3353         case MSR_FAM10H_MMIO_CONF_BASE:
3354         case MSR_AMD64_BU_CFG2:
3355         case MSR_IA32_PERF_CTL:
3356         case MSR_AMD64_DC_CFG:
3357         case MSR_F15H_EX_CFG:
3358         /*
3359          * Intel Sandy Bridge CPUs must support the RAPL (running average power
3360          * limit) MSRs. Just return 0, as we do not want to expose the host
3361          * data here. Do not conditionalize this on CPUID, as KVM does not do
3362          * so for existing CPU-specific MSRs.
3363          */
3364         case MSR_RAPL_POWER_UNIT:
3365         case MSR_PP0_ENERGY_STATUS:     /* Power plane 0 (core) */
3366         case MSR_PP1_ENERGY_STATUS:     /* Power plane 1 (graphics uncore) */
3367         case MSR_PKG_ENERGY_STATUS:     /* Total package */
3368         case MSR_DRAM_ENERGY_STATUS:    /* DRAM controller */
3369                 msr_info->data = 0;
3370                 break;
3371         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
3372         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3373         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3374         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3375         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3376                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3377                         return kvm_pmu_get_msr(vcpu, msr_info);
3378                 msr_info->data = 0;
3379                 break;
3380         case MSR_IA32_UCODE_REV:
3381                 msr_info->data = vcpu->arch.microcode_version;
3382                 break;
3383         case MSR_IA32_ARCH_CAPABILITIES:
3384                 if (!msr_info->host_initiated &&
3385                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
3386                         return 1;
3387                 msr_info->data = vcpu->arch.arch_capabilities;
3388                 break;
3389         case MSR_IA32_PERF_CAPABILITIES:
3390                 if (!msr_info->host_initiated &&
3391                     !guest_cpuid_has(vcpu, X86_FEATURE_PDCM))
3392                         return 1;
3393                 msr_info->data = vcpu->arch.perf_capabilities;
3394                 break;
3395         case MSR_IA32_POWER_CTL:
3396                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
3397                 break;
3398         case MSR_IA32_TSC: {
3399                 /*
3400                  * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3401                  * even when not intercepted. AMD manual doesn't explicitly
3402                  * state this but appears to behave the same.
3403                  *
3404                  * On userspace reads and writes, however, we unconditionally
3405                  * return L1's TSC value to ensure backwards-compatible
3406                  * behavior for migration.
3407                  */
3408                 u64 tsc_offset = msr_info->host_initiated ? vcpu->arch.l1_tsc_offset :
3409                                                             vcpu->arch.tsc_offset;
3410
3411                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc()) + tsc_offset;
3412                 break;
3413         }
3414         case MSR_MTRRcap:
3415         case 0x200 ... 0x2ff:
3416                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
3417         case 0xcd: /* fsb frequency */
3418                 msr_info->data = 3;
3419                 break;
3420                 /*
3421                  * MSR_EBC_FREQUENCY_ID
3422                  * Conservative value valid for even the basic CPU models.
3423                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3424                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3425                  * and 266MHz for model 3, or 4. Set Core Clock
3426                  * Frequency to System Bus Frequency Ratio to 1 (bits
3427                  * 31:24) even though these are only valid for CPU
3428                  * models > 2, however guests may end up dividing or
3429                  * multiplying by zero otherwise.
3430                  */
3431         case MSR_EBC_FREQUENCY_ID:
3432                 msr_info->data = 1 << 24;
3433                 break;
3434         case MSR_IA32_APICBASE:
3435                 msr_info->data = kvm_get_apic_base(vcpu);
3436                 break;
3437         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3438                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
3439         case MSR_IA32_TSCDEADLINE:
3440                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
3441                 break;
3442         case MSR_IA32_TSC_ADJUST:
3443                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
3444                 break;
3445         case MSR_IA32_MISC_ENABLE:
3446                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
3447                 break;
3448         case MSR_IA32_SMBASE:
3449                 if (!msr_info->host_initiated)
3450                         return 1;
3451                 msr_info->data = vcpu->arch.smbase;
3452                 break;
3453         case MSR_SMI_COUNT:
3454                 msr_info->data = vcpu->arch.smi_count;
3455                 break;
3456         case MSR_IA32_PERF_STATUS:
3457                 /* TSC increment by tick */
3458                 msr_info->data = 1000ULL;
3459                 /* CPU multiplier */
3460                 msr_info->data |= (((uint64_t)4ULL) << 40);
3461                 break;
3462         case MSR_EFER:
3463                 msr_info->data = vcpu->arch.efer;
3464                 break;
3465         case MSR_KVM_WALL_CLOCK:
3466         case MSR_KVM_WALL_CLOCK_NEW:
3467                 msr_info->data = vcpu->kvm->arch.wall_clock;
3468                 break;
3469         case MSR_KVM_SYSTEM_TIME:
3470         case MSR_KVM_SYSTEM_TIME_NEW:
3471                 msr_info->data = vcpu->arch.time;
3472                 break;
3473         case MSR_KVM_ASYNC_PF_EN:
3474                 msr_info->data = vcpu->arch.apf.msr_en_val;
3475                 break;
3476         case MSR_KVM_ASYNC_PF_INT:
3477                 msr_info->data = vcpu->arch.apf.msr_int_val;
3478                 break;
3479         case MSR_KVM_ASYNC_PF_ACK:
3480                 msr_info->data = 0;
3481                 break;
3482         case MSR_KVM_STEAL_TIME:
3483                 msr_info->data = vcpu->arch.st.msr_val;
3484                 break;
3485         case MSR_KVM_PV_EOI_EN:
3486                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
3487                 break;
3488         case MSR_KVM_POLL_CONTROL:
3489                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
3490                 break;
3491         case MSR_IA32_P5_MC_ADDR:
3492         case MSR_IA32_P5_MC_TYPE:
3493         case MSR_IA32_MCG_CAP:
3494         case MSR_IA32_MCG_CTL:
3495         case MSR_IA32_MCG_STATUS:
3496         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3497                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
3498                                    msr_info->host_initiated);
3499         case MSR_IA32_XSS:
3500                 if (!msr_info->host_initiated &&
3501                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3502                         return 1;
3503                 msr_info->data = vcpu->arch.ia32_xss;
3504                 break;
3505         case MSR_K7_CLK_CTL:
3506                 /*
3507                  * Provide expected ramp-up count for K7. All other
3508                  * are set to zero, indicating minimum divisors for
3509                  * every field.
3510                  *
3511                  * This prevents guest kernels on AMD host with CPU
3512                  * type 6, model 8 and higher from exploding due to
3513                  * the rdmsr failing.
3514                  */
3515                 msr_info->data = 0x20000000;
3516                 break;
3517         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3518         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3519         case HV_X64_MSR_SYNDBG_OPTIONS:
3520         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3521         case HV_X64_MSR_CRASH_CTL:
3522         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3523         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3524         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3525         case HV_X64_MSR_TSC_EMULATION_STATUS:
3526                 return kvm_hv_get_msr_common(vcpu,
3527                                              msr_info->index, &msr_info->data,
3528                                              msr_info->host_initiated);
3529         case MSR_IA32_BBL_CR_CTL3:
3530                 /* This legacy MSR exists but isn't fully documented in current
3531                  * silicon.  It is however accessed by winxp in very narrow
3532                  * scenarios where it sets bit #19, itself documented as
3533                  * a "reserved" bit.  Best effort attempt to source coherent
3534                  * read data here should the balance of the register be
3535                  * interpreted by the guest:
3536                  *
3537                  * L2 cache control register 3: 64GB range, 256KB size,
3538                  * enabled, latency 0x1, configured
3539                  */
3540                 msr_info->data = 0xbe702111;
3541                 break;
3542         case MSR_AMD64_OSVW_ID_LENGTH:
3543                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3544                         return 1;
3545                 msr_info->data = vcpu->arch.osvw.length;
3546                 break;
3547         case MSR_AMD64_OSVW_STATUS:
3548                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3549                         return 1;
3550                 msr_info->data = vcpu->arch.osvw.status;
3551                 break;
3552         case MSR_PLATFORM_INFO:
3553                 if (!msr_info->host_initiated &&
3554                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
3555                         return 1;
3556                 msr_info->data = vcpu->arch.msr_platform_info;
3557                 break;
3558         case MSR_MISC_FEATURES_ENABLES:
3559                 msr_info->data = vcpu->arch.msr_misc_features_enables;
3560                 break;
3561         case MSR_K7_HWCR:
3562                 msr_info->data = vcpu->arch.msr_hwcr;
3563                 break;
3564         default:
3565                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3566                         return kvm_pmu_get_msr(vcpu, msr_info);
3567                 return KVM_MSR_RET_INVALID;
3568         }
3569         return 0;
3570 }
3571 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
3572
3573 /*
3574  * Read or write a bunch of msrs. All parameters are kernel addresses.
3575  *
3576  * @return number of msrs set successfully.
3577  */
3578 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
3579                     struct kvm_msr_entry *entries,
3580                     int (*do_msr)(struct kvm_vcpu *vcpu,
3581                                   unsigned index, u64 *data))
3582 {
3583         int i;
3584
3585         for (i = 0; i < msrs->nmsrs; ++i)
3586                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
3587                         break;
3588
3589         return i;
3590 }
3591
3592 /*
3593  * Read or write a bunch of msrs. Parameters are user addresses.
3594  *
3595  * @return number of msrs set successfully.
3596  */
3597 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
3598                   int (*do_msr)(struct kvm_vcpu *vcpu,
3599                                 unsigned index, u64 *data),
3600                   int writeback)
3601 {
3602         struct kvm_msrs msrs;
3603         struct kvm_msr_entry *entries;
3604         int r, n;
3605         unsigned size;
3606
3607         r = -EFAULT;
3608         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
3609                 goto out;
3610
3611         r = -E2BIG;
3612         if (msrs.nmsrs >= MAX_IO_MSRS)
3613                 goto out;
3614
3615         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
3616         entries = memdup_user(user_msrs->entries, size);
3617         if (IS_ERR(entries)) {
3618                 r = PTR_ERR(entries);
3619                 goto out;
3620         }
3621
3622         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
3623         if (r < 0)
3624                 goto out_free;
3625
3626         r = -EFAULT;
3627         if (writeback && copy_to_user(user_msrs->entries, entries, size))
3628                 goto out_free;
3629
3630         r = n;
3631
3632 out_free:
3633         kfree(entries);
3634 out:
3635         return r;
3636 }
3637
3638 static inline bool kvm_can_mwait_in_guest(void)
3639 {
3640         return boot_cpu_has(X86_FEATURE_MWAIT) &&
3641                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
3642                 boot_cpu_has(X86_FEATURE_ARAT);
3643 }
3644
3645 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
3646 {
3647         int r = 0;
3648
3649         switch (ext) {
3650         case KVM_CAP_IRQCHIP:
3651         case KVM_CAP_HLT:
3652         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
3653         case KVM_CAP_SET_TSS_ADDR:
3654         case KVM_CAP_EXT_CPUID:
3655         case KVM_CAP_EXT_EMUL_CPUID:
3656         case KVM_CAP_CLOCKSOURCE:
3657         case KVM_CAP_PIT:
3658         case KVM_CAP_NOP_IO_DELAY:
3659         case KVM_CAP_MP_STATE:
3660         case KVM_CAP_SYNC_MMU:
3661         case KVM_CAP_USER_NMI:
3662         case KVM_CAP_REINJECT_CONTROL:
3663         case KVM_CAP_IRQ_INJECT_STATUS:
3664         case KVM_CAP_IOEVENTFD:
3665         case KVM_CAP_IOEVENTFD_NO_LENGTH:
3666         case KVM_CAP_PIT2:
3667         case KVM_CAP_PIT_STATE2:
3668         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
3669         case KVM_CAP_XEN_HVM:
3670         case KVM_CAP_VCPU_EVENTS:
3671         case KVM_CAP_HYPERV:
3672         case KVM_CAP_HYPERV_VAPIC:
3673         case KVM_CAP_HYPERV_SPIN:
3674         case KVM_CAP_HYPERV_SYNIC:
3675         case KVM_CAP_HYPERV_SYNIC2:
3676         case KVM_CAP_HYPERV_VP_INDEX:
3677         case KVM_CAP_HYPERV_EVENTFD:
3678         case KVM_CAP_HYPERV_TLBFLUSH:
3679         case KVM_CAP_HYPERV_SEND_IPI:
3680         case KVM_CAP_HYPERV_CPUID:
3681         case KVM_CAP_PCI_SEGMENT:
3682         case KVM_CAP_DEBUGREGS:
3683         case KVM_CAP_X86_ROBUST_SINGLESTEP:
3684         case KVM_CAP_XSAVE:
3685         case KVM_CAP_ASYNC_PF:
3686         case KVM_CAP_ASYNC_PF_INT:
3687         case KVM_CAP_GET_TSC_KHZ:
3688         case KVM_CAP_KVMCLOCK_CTRL:
3689         case KVM_CAP_READONLY_MEM:
3690         case KVM_CAP_HYPERV_TIME:
3691         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
3692         case KVM_CAP_TSC_DEADLINE_TIMER:
3693         case KVM_CAP_DISABLE_QUIRKS:
3694         case KVM_CAP_SET_BOOT_CPU_ID:
3695         case KVM_CAP_SPLIT_IRQCHIP:
3696         case KVM_CAP_IMMEDIATE_EXIT:
3697         case KVM_CAP_PMU_EVENT_FILTER:
3698         case KVM_CAP_GET_MSR_FEATURES:
3699         case KVM_CAP_MSR_PLATFORM_INFO:
3700         case KVM_CAP_EXCEPTION_PAYLOAD:
3701         case KVM_CAP_SET_GUEST_DEBUG:
3702         case KVM_CAP_LAST_CPU:
3703         case KVM_CAP_X86_USER_SPACE_MSR:
3704         case KVM_CAP_X86_MSR_FILTER:
3705         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
3706                 r = 1;
3707                 break;
3708         case KVM_CAP_SYNC_REGS:
3709                 r = KVM_SYNC_X86_VALID_FIELDS;
3710                 break;
3711         case KVM_CAP_ADJUST_CLOCK:
3712                 r = KVM_CLOCK_TSC_STABLE;
3713                 break;
3714         case KVM_CAP_X86_DISABLE_EXITS:
3715                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
3716                       KVM_X86_DISABLE_EXITS_CSTATE;
3717                 if(kvm_can_mwait_in_guest())
3718                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
3719                 break;
3720         case KVM_CAP_X86_SMM:
3721                 /* SMBASE is usually relocated above 1M on modern chipsets,
3722                  * and SMM handlers might indeed rely on 4G segment limits,
3723                  * so do not report SMM to be available if real mode is
3724                  * emulated via vm86 mode.  Still, do not go to great lengths
3725                  * to avoid userspace's usage of the feature, because it is a
3726                  * fringe case that is not enabled except via specific settings
3727                  * of the module parameters.
3728                  */
3729                 r = kvm_x86_ops.has_emulated_msr(MSR_IA32_SMBASE);
3730                 break;
3731         case KVM_CAP_VAPIC:
3732                 r = !kvm_x86_ops.cpu_has_accelerated_tpr();
3733                 break;
3734         case KVM_CAP_NR_VCPUS:
3735                 r = KVM_SOFT_MAX_VCPUS;
3736                 break;
3737         case KVM_CAP_MAX_VCPUS:
3738                 r = KVM_MAX_VCPUS;
3739                 break;
3740         case KVM_CAP_MAX_VCPU_ID:
3741                 r = KVM_MAX_VCPU_ID;
3742                 break;
3743         case KVM_CAP_PV_MMU:    /* obsolete */
3744                 r = 0;
3745                 break;
3746         case KVM_CAP_MCE:
3747                 r = KVM_MAX_MCE_BANKS;
3748                 break;
3749         case KVM_CAP_XCRS:
3750                 r = boot_cpu_has(X86_FEATURE_XSAVE);
3751                 break;
3752         case KVM_CAP_TSC_CONTROL:
3753                 r = kvm_has_tsc_control;
3754                 break;
3755         case KVM_CAP_X2APIC_API:
3756                 r = KVM_X2APIC_API_VALID_FLAGS;
3757                 break;
3758         case KVM_CAP_NESTED_STATE:
3759                 r = kvm_x86_ops.nested_ops->get_state ?
3760                         kvm_x86_ops.nested_ops->get_state(NULL, NULL, 0) : 0;
3761                 break;
3762         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
3763                 r = kvm_x86_ops.enable_direct_tlbflush != NULL;
3764                 break;
3765         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
3766                 r = kvm_x86_ops.nested_ops->enable_evmcs != NULL;
3767                 break;
3768         case KVM_CAP_SMALLER_MAXPHYADDR:
3769                 r = (int) allow_smaller_maxphyaddr;
3770                 break;
3771         case KVM_CAP_STEAL_TIME:
3772                 r = sched_info_on();
3773                 break;
3774         default:
3775                 break;
3776         }
3777         return r;
3778
3779 }
3780
3781 long kvm_arch_dev_ioctl(struct file *filp,
3782                         unsigned int ioctl, unsigned long arg)
3783 {
3784         void __user *argp = (void __user *)arg;
3785         long r;
3786
3787         switch (ioctl) {
3788         case KVM_GET_MSR_INDEX_LIST: {
3789                 struct kvm_msr_list __user *user_msr_list = argp;
3790                 struct kvm_msr_list msr_list;
3791                 unsigned n;
3792
3793                 r = -EFAULT;
3794                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3795                         goto out;
3796                 n = msr_list.nmsrs;
3797                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
3798                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3799                         goto out;
3800                 r = -E2BIG;
3801                 if (n < msr_list.nmsrs)
3802                         goto out;
3803                 r = -EFAULT;
3804                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
3805                                  num_msrs_to_save * sizeof(u32)))
3806                         goto out;
3807                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
3808                                  &emulated_msrs,
3809                                  num_emulated_msrs * sizeof(u32)))
3810                         goto out;
3811                 r = 0;
3812                 break;
3813         }
3814         case KVM_GET_SUPPORTED_CPUID:
3815         case KVM_GET_EMULATED_CPUID: {
3816                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3817                 struct kvm_cpuid2 cpuid;
3818
3819                 r = -EFAULT;
3820                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3821                         goto out;
3822
3823                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
3824                                             ioctl);
3825                 if (r)
3826                         goto out;
3827
3828                 r = -EFAULT;
3829                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3830                         goto out;
3831                 r = 0;
3832                 break;
3833         }
3834         case KVM_X86_GET_MCE_CAP_SUPPORTED:
3835                 r = -EFAULT;
3836                 if (copy_to_user(argp, &kvm_mce_cap_supported,
3837                                  sizeof(kvm_mce_cap_supported)))
3838                         goto out;
3839                 r = 0;
3840                 break;
3841         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
3842                 struct kvm_msr_list __user *user_msr_list = argp;
3843                 struct kvm_msr_list msr_list;
3844                 unsigned int n;
3845
3846                 r = -EFAULT;
3847                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3848                         goto out;
3849                 n = msr_list.nmsrs;
3850                 msr_list.nmsrs = num_msr_based_features;
3851                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3852                         goto out;
3853                 r = -E2BIG;
3854                 if (n < msr_list.nmsrs)
3855                         goto out;
3856                 r = -EFAULT;
3857                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
3858                                  num_msr_based_features * sizeof(u32)))
3859                         goto out;
3860                 r = 0;
3861                 break;
3862         }
3863         case KVM_GET_MSRS:
3864                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
3865                 break;
3866         default:
3867                 r = -EINVAL;
3868                 break;
3869         }
3870 out:
3871         return r;
3872 }
3873
3874 static void wbinvd_ipi(void *garbage)
3875 {
3876         wbinvd();
3877 }
3878
3879 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
3880 {
3881         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
3882 }
3883
3884 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
3885 {
3886         /* Address WBINVD may be executed by guest */
3887         if (need_emulate_wbinvd(vcpu)) {
3888                 if (kvm_x86_ops.has_wbinvd_exit())
3889                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
3890                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
3891                         smp_call_function_single(vcpu->cpu,
3892                                         wbinvd_ipi, NULL, 1);
3893         }
3894
3895         kvm_x86_ops.vcpu_load(vcpu, cpu);
3896
3897         /* Save host pkru register if supported */
3898         vcpu->arch.host_pkru = read_pkru();
3899
3900         /* Apply any externally detected TSC adjustments (due to suspend) */
3901         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
3902                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
3903                 vcpu->arch.tsc_offset_adjustment = 0;
3904                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3905         }
3906
3907         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
3908                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
3909                                 rdtsc() - vcpu->arch.last_host_tsc;
3910                 if (tsc_delta < 0)
3911                         mark_tsc_unstable("KVM discovered backwards TSC");
3912
3913                 if (kvm_check_tsc_unstable()) {
3914                         u64 offset = kvm_compute_tsc_offset(vcpu,
3915                                                 vcpu->arch.last_guest_tsc);
3916                         kvm_vcpu_write_tsc_offset(vcpu, offset);
3917                         vcpu->arch.tsc_catchup = 1;
3918                 }
3919
3920                 if (kvm_lapic_hv_timer_in_use(vcpu))
3921                         kvm_lapic_restart_hv_timer(vcpu);
3922
3923                 /*
3924                  * On a host with synchronized TSC, there is no need to update
3925                  * kvmclock on vcpu->cpu migration
3926                  */
3927                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
3928                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
3929                 if (vcpu->cpu != cpu)
3930                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
3931                 vcpu->cpu = cpu;
3932         }
3933
3934         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3935 }
3936
3937 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
3938 {
3939         struct kvm_host_map map;
3940         struct kvm_steal_time *st;
3941
3942         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3943                 return;
3944
3945         if (vcpu->arch.st.preempted)
3946                 return;
3947
3948         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT, &map,
3949                         &vcpu->arch.st.cache, true))
3950                 return;
3951
3952         st = map.hva +
3953                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
3954
3955         st->preempted = vcpu->arch.st.preempted = KVM_VCPU_PREEMPTED;
3956
3957         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, true);
3958 }
3959
3960 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
3961 {
3962         int idx;
3963
3964         if (vcpu->preempted)
3965                 vcpu->arch.preempted_in_kernel = !kvm_x86_ops.get_cpl(vcpu);
3966
3967         /*
3968          * Disable page faults because we're in atomic context here.
3969          * kvm_write_guest_offset_cached() would call might_fault()
3970          * that relies on pagefault_disable() to tell if there's a
3971          * bug. NOTE: the write to guest memory may not go through if
3972          * during postcopy live migration or if there's heavy guest
3973          * paging.
3974          */
3975         pagefault_disable();
3976         /*
3977          * kvm_memslots() will be called by
3978          * kvm_write_guest_offset_cached() so take the srcu lock.
3979          */
3980         idx = srcu_read_lock(&vcpu->kvm->srcu);
3981         kvm_steal_time_set_preempted(vcpu);
3982         srcu_read_unlock(&vcpu->kvm->srcu, idx);
3983         pagefault_enable();
3984         kvm_x86_ops.vcpu_put(vcpu);
3985         vcpu->arch.last_host_tsc = rdtsc();
3986         /*
3987          * If userspace has set any breakpoints or watchpoints, dr6 is restored
3988          * on every vmexit, but if not, we might have a stale dr6 from the
3989          * guest. do_debug expects dr6 to be cleared after it runs, do the same.
3990          */
3991         set_debugreg(0, 6);
3992 }
3993
3994 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
3995                                     struct kvm_lapic_state *s)
3996 {
3997         if (vcpu->arch.apicv_active)
3998                 kvm_x86_ops.sync_pir_to_irr(vcpu);
3999
4000         return kvm_apic_get_state(vcpu, s);
4001 }
4002
4003 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
4004                                     struct kvm_lapic_state *s)
4005 {
4006         int r;
4007
4008         r = kvm_apic_set_state(vcpu, s);
4009         if (r)
4010                 return r;
4011         update_cr8_intercept(vcpu);
4012
4013         return 0;
4014 }
4015
4016 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
4017 {
4018         return (!lapic_in_kernel(vcpu) ||
4019                 kvm_apic_accept_pic_intr(vcpu));
4020 }
4021
4022 /*
4023  * if userspace requested an interrupt window, check that the
4024  * interrupt window is open.
4025  *
4026  * No need to exit to userspace if we already have an interrupt queued.
4027  */
4028 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
4029 {
4030         return kvm_arch_interrupt_allowed(vcpu) &&
4031                 !kvm_cpu_has_interrupt(vcpu) &&
4032                 !kvm_event_needs_reinjection(vcpu) &&
4033                 kvm_cpu_accept_dm_intr(vcpu);
4034 }
4035
4036 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
4037                                     struct kvm_interrupt *irq)
4038 {
4039         if (irq->irq >= KVM_NR_INTERRUPTS)
4040                 return -EINVAL;
4041
4042         if (!irqchip_in_kernel(vcpu->kvm)) {
4043                 kvm_queue_interrupt(vcpu, irq->irq, false);
4044                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4045                 return 0;
4046         }
4047
4048         /*
4049          * With in-kernel LAPIC, we only use this to inject EXTINT, so
4050          * fail for in-kernel 8259.
4051          */
4052         if (pic_in_kernel(vcpu->kvm))
4053                 return -ENXIO;
4054
4055         if (vcpu->arch.pending_external_vector != -1)
4056                 return -EEXIST;
4057
4058         vcpu->arch.pending_external_vector = irq->irq;
4059         kvm_make_request(KVM_REQ_EVENT, vcpu);
4060         return 0;
4061 }
4062
4063 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
4064 {
4065         kvm_inject_nmi(vcpu);
4066
4067         return 0;
4068 }
4069
4070 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
4071 {
4072         kvm_make_request(KVM_REQ_SMI, vcpu);
4073
4074         return 0;
4075 }
4076
4077 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
4078                                            struct kvm_tpr_access_ctl *tac)
4079 {
4080         if (tac->flags)
4081                 return -EINVAL;
4082         vcpu->arch.tpr_access_reporting = !!tac->enabled;
4083         return 0;
4084 }
4085
4086 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
4087                                         u64 mcg_cap)
4088 {
4089         int r;
4090         unsigned bank_num = mcg_cap & 0xff, bank;
4091
4092         r = -EINVAL;
4093         if (!bank_num || bank_num > KVM_MAX_MCE_BANKS)
4094                 goto out;
4095         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
4096                 goto out;
4097         r = 0;
4098         vcpu->arch.mcg_cap = mcg_cap;
4099         /* Init IA32_MCG_CTL to all 1s */
4100         if (mcg_cap & MCG_CTL_P)
4101                 vcpu->arch.mcg_ctl = ~(u64)0;
4102         /* Init IA32_MCi_CTL to all 1s */
4103         for (bank = 0; bank < bank_num; bank++)
4104                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
4105
4106         kvm_x86_ops.setup_mce(vcpu);
4107 out:
4108         return r;
4109 }
4110
4111 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
4112                                       struct kvm_x86_mce *mce)
4113 {
4114         u64 mcg_cap = vcpu->arch.mcg_cap;
4115         unsigned bank_num = mcg_cap & 0xff;
4116         u64 *banks = vcpu->arch.mce_banks;
4117
4118         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
4119                 return -EINVAL;
4120         /*
4121          * if IA32_MCG_CTL is not all 1s, the uncorrected error
4122          * reporting is disabled
4123          */
4124         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
4125             vcpu->arch.mcg_ctl != ~(u64)0)
4126                 return 0;
4127         banks += 4 * mce->bank;
4128         /*
4129          * if IA32_MCi_CTL is not all 1s, the uncorrected error
4130          * reporting is disabled for the bank
4131          */
4132         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
4133                 return 0;
4134         if (mce->status & MCI_STATUS_UC) {
4135                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
4136                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
4137                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
4138                         return 0;
4139                 }
4140                 if (banks[1] & MCI_STATUS_VAL)
4141                         mce->status |= MCI_STATUS_OVER;
4142                 banks[2] = mce->addr;
4143                 banks[3] = mce->misc;
4144                 vcpu->arch.mcg_status = mce->mcg_status;
4145                 banks[1] = mce->status;
4146                 kvm_queue_exception(vcpu, MC_VECTOR);
4147         } else if (!(banks[1] & MCI_STATUS_VAL)
4148                    || !(banks[1] & MCI_STATUS_UC)) {
4149                 if (banks[1] & MCI_STATUS_VAL)
4150                         mce->status |= MCI_STATUS_OVER;
4151                 banks[2] = mce->addr;
4152                 banks[3] = mce->misc;
4153                 banks[1] = mce->status;
4154         } else
4155                 banks[1] |= MCI_STATUS_OVER;
4156         return 0;
4157 }
4158
4159 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
4160                                                struct kvm_vcpu_events *events)
4161 {
4162         process_nmi(vcpu);
4163
4164         /*
4165          * In guest mode, payload delivery should be deferred,
4166          * so that the L1 hypervisor can intercept #PF before
4167          * CR2 is modified (or intercept #DB before DR6 is
4168          * modified under nVMX). Unless the per-VM capability,
4169          * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4170          * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4171          * opportunistically defer the exception payload, deliver it if the
4172          * capability hasn't been requested before processing a
4173          * KVM_GET_VCPU_EVENTS.
4174          */
4175         if (!vcpu->kvm->arch.exception_payload_enabled &&
4176             vcpu->arch.exception.pending && vcpu->arch.exception.has_payload)
4177                 kvm_deliver_exception_payload(vcpu);
4178
4179         /*
4180          * The API doesn't provide the instruction length for software
4181          * exceptions, so don't report them. As long as the guest RIP
4182          * isn't advanced, we should expect to encounter the exception
4183          * again.
4184          */
4185         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
4186                 events->exception.injected = 0;
4187                 events->exception.pending = 0;
4188         } else {
4189                 events->exception.injected = vcpu->arch.exception.injected;
4190                 events->exception.pending = vcpu->arch.exception.pending;
4191                 /*
4192                  * For ABI compatibility, deliberately conflate
4193                  * pending and injected exceptions when
4194                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4195                  */
4196                 if (!vcpu->kvm->arch.exception_payload_enabled)
4197                         events->exception.injected |=
4198                                 vcpu->arch.exception.pending;
4199         }
4200         events->exception.nr = vcpu->arch.exception.nr;
4201         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
4202         events->exception.error_code = vcpu->arch.exception.error_code;
4203         events->exception_has_payload = vcpu->arch.exception.has_payload;
4204         events->exception_payload = vcpu->arch.exception.payload;
4205
4206         events->interrupt.injected =
4207                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
4208         events->interrupt.nr = vcpu->arch.interrupt.nr;
4209         events->interrupt.soft = 0;
4210         events->interrupt.shadow = kvm_x86_ops.get_interrupt_shadow(vcpu);
4211
4212         events->nmi.injected = vcpu->arch.nmi_injected;
4213         events->nmi.pending = vcpu->arch.nmi_pending != 0;
4214         events->nmi.masked = kvm_x86_ops.get_nmi_mask(vcpu);
4215         events->nmi.pad = 0;
4216
4217         events->sipi_vector = 0; /* never valid when reporting to user space */
4218
4219         events->smi.smm = is_smm(vcpu);
4220         events->smi.pending = vcpu->arch.smi_pending;
4221         events->smi.smm_inside_nmi =
4222                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
4223         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
4224
4225         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
4226                          | KVM_VCPUEVENT_VALID_SHADOW
4227                          | KVM_VCPUEVENT_VALID_SMM);
4228         if (vcpu->kvm->arch.exception_payload_enabled)
4229                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
4230
4231         memset(&events->reserved, 0, sizeof(events->reserved));
4232 }
4233
4234 static void kvm_smm_changed(struct kvm_vcpu *vcpu);
4235
4236 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
4237                                               struct kvm_vcpu_events *events)
4238 {
4239         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4240                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4241                               | KVM_VCPUEVENT_VALID_SHADOW
4242                               | KVM_VCPUEVENT_VALID_SMM
4243                               | KVM_VCPUEVENT_VALID_PAYLOAD))
4244                 return -EINVAL;
4245
4246         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
4247                 if (!vcpu->kvm->arch.exception_payload_enabled)
4248                         return -EINVAL;
4249                 if (events->exception.pending)
4250                         events->exception.injected = 0;
4251                 else
4252                         events->exception_has_payload = 0;
4253         } else {
4254                 events->exception.pending = 0;
4255                 events->exception_has_payload = 0;
4256         }
4257
4258         if ((events->exception.injected || events->exception.pending) &&
4259             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
4260                 return -EINVAL;
4261
4262         /* INITs are latched while in SMM */
4263         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
4264             (events->smi.smm || events->smi.pending) &&
4265             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
4266                 return -EINVAL;
4267
4268         process_nmi(vcpu);
4269         vcpu->arch.exception.injected = events->exception.injected;
4270         vcpu->arch.exception.pending = events->exception.pending;
4271         vcpu->arch.exception.nr = events->exception.nr;
4272         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
4273         vcpu->arch.exception.error_code = events->exception.error_code;
4274         vcpu->arch.exception.has_payload = events->exception_has_payload;
4275         vcpu->arch.exception.payload = events->exception_payload;
4276
4277         vcpu->arch.interrupt.injected = events->interrupt.injected;
4278         vcpu->arch.interrupt.nr = events->interrupt.nr;
4279         vcpu->arch.interrupt.soft = events->interrupt.soft;
4280         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
4281                 kvm_x86_ops.set_interrupt_shadow(vcpu,
4282                                                   events->interrupt.shadow);
4283
4284         vcpu->arch.nmi_injected = events->nmi.injected;
4285         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
4286                 vcpu->arch.nmi_pending = events->nmi.pending;
4287         kvm_x86_ops.set_nmi_mask(vcpu, events->nmi.masked);
4288
4289         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
4290             lapic_in_kernel(vcpu))
4291                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
4292
4293         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
4294                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
4295                         if (events->smi.smm)
4296                                 vcpu->arch.hflags |= HF_SMM_MASK;
4297                         else
4298                                 vcpu->arch.hflags &= ~HF_SMM_MASK;
4299                         kvm_smm_changed(vcpu);
4300                 }
4301
4302                 vcpu->arch.smi_pending = events->smi.pending;
4303
4304                 if (events->smi.smm) {
4305                         if (events->smi.smm_inside_nmi)
4306                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
4307                         else
4308                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
4309                 }
4310
4311                 if (lapic_in_kernel(vcpu)) {
4312                         if (events->smi.latched_init)
4313                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4314                         else
4315                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4316                 }
4317         }
4318
4319         kvm_make_request(KVM_REQ_EVENT, vcpu);
4320
4321         return 0;
4322 }
4323
4324 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
4325                                              struct kvm_debugregs *dbgregs)
4326 {
4327         unsigned long val;
4328
4329         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
4330         kvm_get_dr(vcpu, 6, &val);
4331         dbgregs->dr6 = val;
4332         dbgregs->dr7 = vcpu->arch.dr7;
4333         dbgregs->flags = 0;
4334         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
4335 }
4336
4337 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
4338                                             struct kvm_debugregs *dbgregs)
4339 {
4340         if (dbgregs->flags)
4341                 return -EINVAL;
4342
4343         if (dbgregs->dr6 & ~0xffffffffull)
4344                 return -EINVAL;
4345         if (dbgregs->dr7 & ~0xffffffffull)
4346                 return -EINVAL;
4347
4348         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
4349         kvm_update_dr0123(vcpu);
4350         vcpu->arch.dr6 = dbgregs->dr6;
4351         vcpu->arch.dr7 = dbgregs->dr7;
4352         kvm_update_dr7(vcpu);
4353
4354         return 0;
4355 }
4356
4357 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
4358
4359 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
4360 {
4361         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4362         u64 xstate_bv = xsave->header.xfeatures;
4363         u64 valid;
4364
4365         /*
4366          * Copy legacy XSAVE area, to avoid complications with CPUID
4367          * leaves 0 and 1 in the loop below.
4368          */
4369         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
4370
4371         /* Set XSTATE_BV */
4372         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
4373         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
4374
4375         /*
4376          * Copy each region from the possibly compacted offset to the
4377          * non-compacted offset.
4378          */
4379         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4380         while (valid) {
4381                 u64 xfeature_mask = valid & -valid;
4382                 int xfeature_nr = fls64(xfeature_mask) - 1;
4383                 void *src = get_xsave_addr(xsave, xfeature_nr);
4384
4385                 if (src) {
4386                         u32 size, offset, ecx, edx;
4387                         cpuid_count(XSTATE_CPUID, xfeature_nr,
4388                                     &size, &offset, &ecx, &edx);
4389                         if (xfeature_nr == XFEATURE_PKRU)
4390                                 memcpy(dest + offset, &vcpu->arch.pkru,
4391                                        sizeof(vcpu->arch.pkru));
4392                         else
4393                                 memcpy(dest + offset, src, size);
4394
4395                 }
4396
4397                 valid -= xfeature_mask;
4398         }
4399 }
4400
4401 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
4402 {
4403         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4404         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
4405         u64 valid;
4406
4407         /*
4408          * Copy legacy XSAVE area, to avoid complications with CPUID
4409          * leaves 0 and 1 in the loop below.
4410          */
4411         memcpy(xsave, src, XSAVE_HDR_OFFSET);
4412
4413         /* Set XSTATE_BV and possibly XCOMP_BV.  */
4414         xsave->header.xfeatures = xstate_bv;
4415         if (boot_cpu_has(X86_FEATURE_XSAVES))
4416                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
4417
4418         /*
4419          * Copy each region from the non-compacted offset to the
4420          * possibly compacted offset.
4421          */
4422         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4423         while (valid) {
4424                 u64 xfeature_mask = valid & -valid;
4425                 int xfeature_nr = fls64(xfeature_mask) - 1;
4426                 void *dest = get_xsave_addr(xsave, xfeature_nr);
4427
4428                 if (dest) {
4429                         u32 size, offset, ecx, edx;
4430                         cpuid_count(XSTATE_CPUID, xfeature_nr,
4431                                     &size, &offset, &ecx, &edx);
4432                         if (xfeature_nr == XFEATURE_PKRU)
4433                                 memcpy(&vcpu->arch.pkru, src + offset,
4434                                        sizeof(vcpu->arch.pkru));
4435                         else
4436                                 memcpy(dest, src + offset, size);
4437                 }
4438
4439                 valid -= xfeature_mask;
4440         }
4441 }
4442
4443 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
4444                                          struct kvm_xsave *guest_xsave)
4445 {
4446         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4447                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
4448                 fill_xsave((u8 *) guest_xsave->region, vcpu);
4449         } else {
4450                 memcpy(guest_xsave->region,
4451                         &vcpu->arch.guest_fpu->state.fxsave,
4452                         sizeof(struct fxregs_state));
4453                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
4454                         XFEATURE_MASK_FPSSE;
4455         }
4456 }
4457
4458 #define XSAVE_MXCSR_OFFSET 24
4459
4460 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
4461                                         struct kvm_xsave *guest_xsave)
4462 {
4463         u64 xstate_bv =
4464                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
4465         u32 mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
4466
4467         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4468                 /*
4469                  * Here we allow setting states that are not present in
4470                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
4471                  * with old userspace.
4472                  */
4473                 if (xstate_bv & ~supported_xcr0 || mxcsr & ~mxcsr_feature_mask)
4474                         return -EINVAL;
4475                 load_xsave(vcpu, (u8 *)guest_xsave->region);
4476         } else {
4477                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
4478                         mxcsr & ~mxcsr_feature_mask)
4479                         return -EINVAL;
4480                 memcpy(&vcpu->arch.guest_fpu->state.fxsave,
4481                         guest_xsave->region, sizeof(struct fxregs_state));
4482         }
4483         return 0;
4484 }
4485
4486 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
4487                                         struct kvm_xcrs *guest_xcrs)
4488 {
4489         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
4490                 guest_xcrs->nr_xcrs = 0;
4491                 return;
4492         }
4493
4494         guest_xcrs->nr_xcrs = 1;
4495         guest_xcrs->flags = 0;
4496         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
4497         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
4498 }
4499
4500 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
4501                                        struct kvm_xcrs *guest_xcrs)
4502 {
4503         int i, r = 0;
4504
4505         if (!boot_cpu_has(X86_FEATURE_XSAVE))
4506                 return -EINVAL;
4507
4508         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
4509                 return -EINVAL;
4510
4511         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
4512                 /* Only support XCR0 currently */
4513                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
4514                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
4515                                 guest_xcrs->xcrs[i].value);
4516                         break;
4517                 }
4518         if (r)
4519                 r = -EINVAL;
4520         return r;
4521 }
4522
4523 /*
4524  * kvm_set_guest_paused() indicates to the guest kernel that it has been
4525  * stopped by the hypervisor.  This function will be called from the host only.
4526  * EINVAL is returned when the host attempts to set the flag for a guest that
4527  * does not support pv clocks.
4528  */
4529 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
4530 {
4531         if (!vcpu->arch.pv_time_enabled)
4532                 return -EINVAL;
4533         vcpu->arch.pvclock_set_guest_stopped_request = true;
4534         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4535         return 0;
4536 }
4537
4538 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
4539                                      struct kvm_enable_cap *cap)
4540 {
4541         int r;
4542         uint16_t vmcs_version;
4543         void __user *user_ptr;
4544
4545         if (cap->flags)
4546                 return -EINVAL;
4547
4548         switch (cap->cap) {
4549         case KVM_CAP_HYPERV_SYNIC2:
4550                 if (cap->args[0])
4551                         return -EINVAL;
4552                 fallthrough;
4553
4554         case KVM_CAP_HYPERV_SYNIC:
4555                 if (!irqchip_in_kernel(vcpu->kvm))
4556                         return -EINVAL;
4557                 return kvm_hv_activate_synic(vcpu, cap->cap ==
4558                                              KVM_CAP_HYPERV_SYNIC2);
4559         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4560                 if (!kvm_x86_ops.nested_ops->enable_evmcs)
4561                         return -ENOTTY;
4562                 r = kvm_x86_ops.nested_ops->enable_evmcs(vcpu, &vmcs_version);
4563                 if (!r) {
4564                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
4565                         if (copy_to_user(user_ptr, &vmcs_version,
4566                                          sizeof(vmcs_version)))
4567                                 r = -EFAULT;
4568                 }
4569                 return r;
4570         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4571                 if (!kvm_x86_ops.enable_direct_tlbflush)
4572                         return -ENOTTY;
4573
4574                 return kvm_x86_ops.enable_direct_tlbflush(vcpu);
4575
4576         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4577                 vcpu->arch.pv_cpuid.enforce = cap->args[0];
4578
4579                 return 0;
4580
4581         default:
4582                 return -EINVAL;
4583         }
4584 }
4585
4586 long kvm_arch_vcpu_ioctl(struct file *filp,
4587                          unsigned int ioctl, unsigned long arg)
4588 {
4589         struct kvm_vcpu *vcpu = filp->private_data;
4590         void __user *argp = (void __user *)arg;
4591         int r;
4592         union {
4593                 struct kvm_lapic_state *lapic;
4594                 struct kvm_xsave *xsave;
4595                 struct kvm_xcrs *xcrs;
4596                 void *buffer;
4597         } u;
4598
4599         vcpu_load(vcpu);
4600
4601         u.buffer = NULL;
4602         switch (ioctl) {
4603         case KVM_GET_LAPIC: {
4604                 r = -EINVAL;
4605                 if (!lapic_in_kernel(vcpu))
4606                         goto out;
4607                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
4608                                 GFP_KERNEL_ACCOUNT);
4609
4610                 r = -ENOMEM;
4611                 if (!u.lapic)
4612                         goto out;
4613                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
4614                 if (r)
4615                         goto out;
4616                 r = -EFAULT;
4617                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
4618                         goto out;
4619                 r = 0;
4620                 break;
4621         }
4622         case KVM_SET_LAPIC: {
4623                 r = -EINVAL;
4624                 if (!lapic_in_kernel(vcpu))
4625                         goto out;
4626                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
4627                 if (IS_ERR(u.lapic)) {
4628                         r = PTR_ERR(u.lapic);
4629                         goto out_nofree;
4630                 }
4631
4632                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
4633                 break;
4634         }
4635         case KVM_INTERRUPT: {
4636                 struct kvm_interrupt irq;
4637
4638                 r = -EFAULT;
4639                 if (copy_from_user(&irq, argp, sizeof(irq)))
4640                         goto out;
4641                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
4642                 break;
4643         }
4644         case KVM_NMI: {
4645                 r = kvm_vcpu_ioctl_nmi(vcpu);
4646                 break;
4647         }
4648         case KVM_SMI: {
4649                 r = kvm_vcpu_ioctl_smi(vcpu);
4650                 break;
4651         }
4652         case KVM_SET_CPUID: {
4653                 struct kvm_cpuid __user *cpuid_arg = argp;
4654                 struct kvm_cpuid cpuid;
4655
4656                 r = -EFAULT;
4657                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4658                         goto out;
4659                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4660                 break;
4661         }
4662         case KVM_SET_CPUID2: {
4663                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4664                 struct kvm_cpuid2 cpuid;
4665
4666                 r = -EFAULT;
4667                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4668                         goto out;
4669                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
4670                                               cpuid_arg->entries);
4671                 break;
4672         }
4673         case KVM_GET_CPUID2: {
4674                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4675                 struct kvm_cpuid2 cpuid;
4676
4677                 r = -EFAULT;
4678                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4679                         goto out;
4680                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
4681                                               cpuid_arg->entries);
4682                 if (r)
4683                         goto out;
4684                 r = -EFAULT;
4685                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4686                         goto out;
4687                 r = 0;
4688                 break;
4689         }
4690         case KVM_GET_MSRS: {
4691                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4692                 r = msr_io(vcpu, argp, do_get_msr, 1);
4693                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4694                 break;
4695         }
4696         case KVM_SET_MSRS: {
4697                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4698                 r = msr_io(vcpu, argp, do_set_msr, 0);
4699                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4700                 break;
4701         }
4702         case KVM_TPR_ACCESS_REPORTING: {
4703                 struct kvm_tpr_access_ctl tac;
4704
4705                 r = -EFAULT;
4706                 if (copy_from_user(&tac, argp, sizeof(tac)))
4707                         goto out;
4708                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
4709                 if (r)
4710                         goto out;
4711                 r = -EFAULT;
4712                 if (copy_to_user(argp, &tac, sizeof(tac)))
4713                         goto out;
4714                 r = 0;
4715                 break;
4716         };
4717         case KVM_SET_VAPIC_ADDR: {
4718                 struct kvm_vapic_addr va;
4719                 int idx;
4720
4721                 r = -EINVAL;
4722                 if (!lapic_in_kernel(vcpu))
4723                         goto out;
4724                 r = -EFAULT;
4725                 if (copy_from_user(&va, argp, sizeof(va)))
4726                         goto out;
4727                 idx = srcu_read_lock(&vcpu->kvm->srcu);
4728                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
4729                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4730                 break;
4731         }
4732         case KVM_X86_SETUP_MCE: {
4733                 u64 mcg_cap;
4734
4735                 r = -EFAULT;
4736                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
4737                         goto out;
4738                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
4739                 break;
4740         }
4741         case KVM_X86_SET_MCE: {
4742                 struct kvm_x86_mce mce;
4743
4744                 r = -EFAULT;
4745                 if (copy_from_user(&mce, argp, sizeof(mce)))
4746                         goto out;
4747                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
4748                 break;
4749         }
4750         case KVM_GET_VCPU_EVENTS: {
4751                 struct kvm_vcpu_events events;
4752
4753                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
4754
4755                 r = -EFAULT;
4756                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
4757                         break;
4758                 r = 0;
4759                 break;
4760         }
4761         case KVM_SET_VCPU_EVENTS: {
4762                 struct kvm_vcpu_events events;
4763
4764                 r = -EFAULT;
4765                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
4766                         break;
4767
4768                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
4769                 break;
4770         }
4771         case KVM_GET_DEBUGREGS: {
4772                 struct kvm_debugregs dbgregs;
4773
4774                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
4775
4776                 r = -EFAULT;
4777                 if (copy_to_user(argp, &dbgregs,
4778                                  sizeof(struct kvm_debugregs)))
4779                         break;
4780                 r = 0;
4781                 break;
4782         }
4783         case KVM_SET_DEBUGREGS: {
4784                 struct kvm_debugregs dbgregs;
4785
4786                 r = -EFAULT;
4787                 if (copy_from_user(&dbgregs, argp,
4788                                    sizeof(struct kvm_debugregs)))
4789                         break;
4790
4791                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
4792                 break;
4793         }
4794         case KVM_GET_XSAVE: {
4795                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
4796                 r = -ENOMEM;
4797                 if (!u.xsave)
4798                         break;
4799
4800                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
4801
4802                 r = -EFAULT;
4803                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
4804                         break;
4805                 r = 0;
4806                 break;
4807         }
4808         case KVM_SET_XSAVE: {
4809                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
4810                 if (IS_ERR(u.xsave)) {
4811                         r = PTR_ERR(u.xsave);
4812                         goto out_nofree;
4813                 }
4814
4815                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
4816                 break;
4817         }
4818         case KVM_GET_XCRS: {
4819                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
4820                 r = -ENOMEM;
4821                 if (!u.xcrs)
4822                         break;
4823
4824                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
4825
4826                 r = -EFAULT;
4827                 if (copy_to_user(argp, u.xcrs,
4828                                  sizeof(struct kvm_xcrs)))
4829                         break;
4830                 r = 0;
4831                 break;
4832         }
4833         case KVM_SET_XCRS: {
4834                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
4835                 if (IS_ERR(u.xcrs)) {
4836                         r = PTR_ERR(u.xcrs);
4837                         goto out_nofree;
4838                 }
4839
4840                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
4841                 break;
4842         }
4843         case KVM_SET_TSC_KHZ: {
4844                 u32 user_tsc_khz;
4845
4846                 r = -EINVAL;
4847                 user_tsc_khz = (u32)arg;
4848
4849                 if (kvm_has_tsc_control &&
4850                     user_tsc_khz >= kvm_max_guest_tsc_khz)
4851                         goto out;
4852
4853                 if (user_tsc_khz == 0)
4854                         user_tsc_khz = tsc_khz;
4855
4856                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
4857                         r = 0;
4858
4859                 goto out;
4860         }
4861         case KVM_GET_TSC_KHZ: {
4862                 r = vcpu->arch.virtual_tsc_khz;
4863                 goto out;
4864         }
4865         case KVM_KVMCLOCK_CTRL: {
4866                 r = kvm_set_guest_paused(vcpu);
4867                 goto out;
4868         }
4869         case KVM_ENABLE_CAP: {
4870                 struct kvm_enable_cap cap;
4871
4872                 r = -EFAULT;
4873                 if (copy_from_user(&cap, argp, sizeof(cap)))
4874                         goto out;
4875                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
4876                 break;
4877         }
4878         case KVM_GET_NESTED_STATE: {
4879                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4880                 u32 user_data_size;
4881
4882                 r = -EINVAL;
4883                 if (!kvm_x86_ops.nested_ops->get_state)
4884                         break;
4885
4886                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
4887                 r = -EFAULT;
4888                 if (get_user(user_data_size, &user_kvm_nested_state->size))
4889                         break;
4890
4891                 r = kvm_x86_ops.nested_ops->get_state(vcpu, user_kvm_nested_state,
4892                                                      user_data_size);
4893                 if (r < 0)
4894                         break;
4895
4896                 if (r > user_data_size) {
4897                         if (put_user(r, &user_kvm_nested_state->size))
4898                                 r = -EFAULT;
4899                         else
4900                                 r = -E2BIG;
4901                         break;
4902                 }
4903
4904                 r = 0;
4905                 break;
4906         }
4907         case KVM_SET_NESTED_STATE: {
4908                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4909                 struct kvm_nested_state kvm_state;
4910                 int idx;
4911
4912                 r = -EINVAL;
4913                 if (!kvm_x86_ops.nested_ops->set_state)
4914                         break;
4915
4916                 r = -EFAULT;
4917                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
4918                         break;
4919
4920                 r = -EINVAL;
4921                 if (kvm_state.size < sizeof(kvm_state))
4922                         break;
4923
4924                 if (kvm_state.flags &
4925                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
4926                       | KVM_STATE_NESTED_EVMCS | KVM_STATE_NESTED_MTF_PENDING
4927                       | KVM_STATE_NESTED_GIF_SET))
4928                         break;
4929
4930                 /* nested_run_pending implies guest_mode.  */
4931                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
4932                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
4933                         break;
4934
4935                 idx = srcu_read_lock(&vcpu->kvm->srcu);
4936                 r = kvm_x86_ops.nested_ops->set_state(vcpu, user_kvm_nested_state, &kvm_state);
4937                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4938                 break;
4939         }
4940         case KVM_GET_SUPPORTED_HV_CPUID: {
4941                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4942                 struct kvm_cpuid2 cpuid;
4943
4944                 r = -EFAULT;
4945                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4946                         goto out;
4947
4948                 r = kvm_vcpu_ioctl_get_hv_cpuid(vcpu, &cpuid,
4949                                                 cpuid_arg->entries);
4950                 if (r)
4951                         goto out;
4952
4953                 r = -EFAULT;
4954                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4955                         goto out;
4956                 r = 0;
4957                 break;
4958         }
4959         default:
4960                 r = -EINVAL;
4961         }
4962 out:
4963         kfree(u.buffer);
4964 out_nofree:
4965         vcpu_put(vcpu);
4966         return r;
4967 }
4968
4969 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
4970 {
4971         return VM_FAULT_SIGBUS;
4972 }
4973
4974 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
4975 {
4976         int ret;
4977
4978         if (addr > (unsigned int)(-3 * PAGE_SIZE))
4979                 return -EINVAL;
4980         ret = kvm_x86_ops.set_tss_addr(kvm, addr);
4981         return ret;
4982 }
4983
4984 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
4985                                               u64 ident_addr)
4986 {
4987         return kvm_x86_ops.set_identity_map_addr(kvm, ident_addr);
4988 }
4989
4990 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
4991                                          unsigned long kvm_nr_mmu_pages)
4992 {
4993         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
4994                 return -EINVAL;
4995
4996         mutex_lock(&kvm->slots_lock);
4997
4998         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
4999         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
5000
5001         mutex_unlock(&kvm->slots_lock);
5002         return 0;
5003 }
5004
5005 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
5006 {
5007         return kvm->arch.n_max_mmu_pages;
5008 }
5009
5010 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5011 {
5012         struct kvm_pic *pic = kvm->arch.vpic;
5013         int r;
5014
5015         r = 0;
5016         switch (chip->chip_id) {
5017         case KVM_IRQCHIP_PIC_MASTER:
5018                 memcpy(&chip->chip.pic, &pic->pics[0],
5019                         sizeof(struct kvm_pic_state));
5020                 break;
5021         case KVM_IRQCHIP_PIC_SLAVE:
5022                 memcpy(&chip->chip.pic, &pic->pics[1],
5023                         sizeof(struct kvm_pic_state));
5024                 break;
5025         case KVM_IRQCHIP_IOAPIC:
5026                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
5027                 break;
5028         default:
5029                 r = -EINVAL;
5030                 break;
5031         }
5032         return r;
5033 }
5034
5035 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5036 {
5037         struct kvm_pic *pic = kvm->arch.vpic;
5038         int r;
5039
5040         r = 0;
5041         switch (chip->chip_id) {
5042         case KVM_IRQCHIP_PIC_MASTER:
5043                 spin_lock(&pic->lock);
5044                 memcpy(&pic->pics[0], &chip->chip.pic,
5045                         sizeof(struct kvm_pic_state));
5046                 spin_unlock(&pic->lock);
5047                 break;
5048         case KVM_IRQCHIP_PIC_SLAVE:
5049                 spin_lock(&pic->lock);
5050                 memcpy(&pic->pics[1], &chip->chip.pic,
5051                         sizeof(struct kvm_pic_state));
5052                 spin_unlock(&pic->lock);
5053                 break;
5054         case KVM_IRQCHIP_IOAPIC:
5055                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
5056                 break;
5057         default:
5058                 r = -EINVAL;
5059                 break;
5060         }
5061         kvm_pic_update_irq(pic);
5062         return r;
5063 }
5064
5065 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5066 {
5067         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
5068
5069         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
5070
5071         mutex_lock(&kps->lock);
5072         memcpy(ps, &kps->channels, sizeof(*ps));
5073         mutex_unlock(&kps->lock);
5074         return 0;
5075 }
5076
5077 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5078 {
5079         int i;
5080         struct kvm_pit *pit = kvm->arch.vpit;
5081
5082         mutex_lock(&pit->pit_state.lock);
5083         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
5084         for (i = 0; i < 3; i++)
5085                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
5086         mutex_unlock(&pit->pit_state.lock);
5087         return 0;
5088 }
5089
5090 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5091 {
5092         mutex_lock(&kvm->arch.vpit->pit_state.lock);
5093         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
5094                 sizeof(ps->channels));
5095         ps->flags = kvm->arch.vpit->pit_state.flags;
5096         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
5097         memset(&ps->reserved, 0, sizeof(ps->reserved));
5098         return 0;
5099 }
5100
5101 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5102 {
5103         int start = 0;
5104         int i;
5105         u32 prev_legacy, cur_legacy;
5106         struct kvm_pit *pit = kvm->arch.vpit;
5107
5108         mutex_lock(&pit->pit_state.lock);
5109         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
5110         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
5111         if (!prev_legacy && cur_legacy)
5112                 start = 1;
5113         memcpy(&pit->pit_state.channels, &ps->channels,
5114                sizeof(pit->pit_state.channels));
5115         pit->pit_state.flags = ps->flags;
5116         for (i = 0; i < 3; i++)
5117                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
5118                                    start && i == 0);
5119         mutex_unlock(&pit->pit_state.lock);
5120         return 0;
5121 }
5122
5123 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
5124                                  struct kvm_reinject_control *control)
5125 {
5126         struct kvm_pit *pit = kvm->arch.vpit;
5127
5128         /* pit->pit_state.lock was overloaded to prevent userspace from getting
5129          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5130          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
5131          */
5132         mutex_lock(&pit->pit_state.lock);
5133         kvm_pit_set_reinject(pit, control->pit_reinject);
5134         mutex_unlock(&pit->pit_state.lock);
5135
5136         return 0;
5137 }
5138
5139 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
5140 {
5141         /*
5142          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
5143          */
5144         if (kvm_x86_ops.flush_log_dirty)
5145                 kvm_x86_ops.flush_log_dirty(kvm);
5146 }
5147
5148 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
5149                         bool line_status)
5150 {
5151         if (!irqchip_in_kernel(kvm))
5152                 return -ENXIO;
5153
5154         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
5155                                         irq_event->irq, irq_event->level,
5156                                         line_status);
5157         return 0;
5158 }
5159
5160 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
5161                             struct kvm_enable_cap *cap)
5162 {
5163         int r;
5164
5165         if (cap->flags)
5166                 return -EINVAL;
5167
5168         switch (cap->cap) {
5169         case KVM_CAP_DISABLE_QUIRKS:
5170                 kvm->arch.disabled_quirks = cap->args[0];
5171                 r = 0;
5172                 break;
5173         case KVM_CAP_SPLIT_IRQCHIP: {
5174                 mutex_lock(&kvm->lock);
5175                 r = -EINVAL;
5176                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
5177                         goto split_irqchip_unlock;
5178                 r = -EEXIST;
5179                 if (irqchip_in_kernel(kvm))
5180                         goto split_irqchip_unlock;
5181                 if (kvm->created_vcpus)
5182                         goto split_irqchip_unlock;
5183                 r = kvm_setup_empty_irq_routing(kvm);
5184                 if (r)
5185                         goto split_irqchip_unlock;
5186                 /* Pairs with irqchip_in_kernel. */
5187                 smp_wmb();
5188                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
5189                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
5190                 r = 0;
5191 split_irqchip_unlock:
5192                 mutex_unlock(&kvm->lock);
5193                 break;
5194         }
5195         case KVM_CAP_X2APIC_API:
5196                 r = -EINVAL;
5197                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
5198                         break;
5199
5200                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
5201                         kvm->arch.x2apic_format = true;
5202                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
5203                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
5204
5205                 r = 0;
5206                 break;
5207         case KVM_CAP_X86_DISABLE_EXITS:
5208                 r = -EINVAL;
5209                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
5210                         break;
5211
5212                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
5213                         kvm_can_mwait_in_guest())
5214                         kvm->arch.mwait_in_guest = true;
5215                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
5216                         kvm->arch.hlt_in_guest = true;
5217                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
5218                         kvm->arch.pause_in_guest = true;
5219                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
5220                         kvm->arch.cstate_in_guest = true;
5221                 r = 0;
5222                 break;
5223         case KVM_CAP_MSR_PLATFORM_INFO:
5224                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
5225                 r = 0;
5226                 break;
5227         case KVM_CAP_EXCEPTION_PAYLOAD:
5228                 kvm->arch.exception_payload_enabled = cap->args[0];
5229                 r = 0;
5230                 break;
5231         case KVM_CAP_X86_USER_SPACE_MSR:
5232                 kvm->arch.user_space_msr_mask = cap->args[0];
5233                 r = 0;
5234                 break;
5235         default:
5236                 r = -EINVAL;
5237                 break;
5238         }
5239         return r;
5240 }
5241
5242 static void kvm_clear_msr_filter(struct kvm *kvm)
5243 {
5244         u32 i;
5245         u32 count = kvm->arch.msr_filter.count;
5246         struct msr_bitmap_range ranges[16];
5247
5248         mutex_lock(&kvm->lock);
5249         kvm->arch.msr_filter.count = 0;
5250         memcpy(ranges, kvm->arch.msr_filter.ranges, count * sizeof(ranges[0]));
5251         mutex_unlock(&kvm->lock);
5252         synchronize_srcu(&kvm->srcu);
5253
5254         for (i = 0; i < count; i++)
5255                 kfree(ranges[i].bitmap);
5256 }
5257
5258 static int kvm_add_msr_filter(struct kvm *kvm, struct kvm_msr_filter_range *user_range)
5259 {
5260         struct msr_bitmap_range *ranges = kvm->arch.msr_filter.ranges;
5261         struct msr_bitmap_range range;
5262         unsigned long *bitmap = NULL;
5263         size_t bitmap_size;
5264         int r;
5265
5266         if (!user_range->nmsrs)
5267                 return 0;
5268
5269         bitmap_size = BITS_TO_LONGS(user_range->nmsrs) * sizeof(long);
5270         if (!bitmap_size || bitmap_size > KVM_MSR_FILTER_MAX_BITMAP_SIZE)
5271                 return -EINVAL;
5272
5273         bitmap = memdup_user((__user u8*)user_range->bitmap, bitmap_size);
5274         if (IS_ERR(bitmap))
5275                 return PTR_ERR(bitmap);
5276
5277         range = (struct msr_bitmap_range) {
5278                 .flags = user_range->flags,
5279                 .base = user_range->base,
5280                 .nmsrs = user_range->nmsrs,
5281                 .bitmap = bitmap,
5282         };
5283
5284         if (range.flags & ~(KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE)) {
5285                 r = -EINVAL;
5286                 goto err;
5287         }
5288
5289         if (!range.flags) {
5290                 r = -EINVAL;
5291                 goto err;
5292         }
5293
5294         /* Everything ok, add this range identifier to our global pool */
5295         ranges[kvm->arch.msr_filter.count] = range;
5296         /* Make sure we filled the array before we tell anyone to walk it */
5297         smp_wmb();
5298         kvm->arch.msr_filter.count++;
5299
5300         return 0;
5301 err:
5302         kfree(bitmap);
5303         return r;
5304 }
5305
5306 static int kvm_vm_ioctl_set_msr_filter(struct kvm *kvm, void __user *argp)
5307 {
5308         struct kvm_msr_filter __user *user_msr_filter = argp;
5309         struct kvm_msr_filter filter;
5310         bool default_allow;
5311         int r = 0;
5312         bool empty = true;
5313         u32 i;
5314
5315         if (copy_from_user(&filter, user_msr_filter, sizeof(filter)))
5316                 return -EFAULT;
5317
5318         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++)
5319                 empty &= !filter.ranges[i].nmsrs;
5320
5321         default_allow = !(filter.flags & KVM_MSR_FILTER_DEFAULT_DENY);
5322         if (empty && !default_allow)
5323                 return -EINVAL;
5324
5325         kvm_clear_msr_filter(kvm);
5326
5327         kvm->arch.msr_filter.default_allow = default_allow;
5328
5329         /*
5330          * Protect from concurrent calls to this function that could trigger
5331          * a TOCTOU violation on kvm->arch.msr_filter.count.
5332          */
5333         mutex_lock(&kvm->lock);
5334         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++) {
5335                 r = kvm_add_msr_filter(kvm, &filter.ranges[i]);
5336                 if (r)
5337                         break;
5338         }
5339
5340         kvm_make_all_cpus_request(kvm, KVM_REQ_MSR_FILTER_CHANGED);
5341         mutex_unlock(&kvm->lock);
5342
5343         return r;
5344 }
5345
5346 long kvm_arch_vm_ioctl(struct file *filp,
5347                        unsigned int ioctl, unsigned long arg)
5348 {
5349         struct kvm *kvm = filp->private_data;
5350         void __user *argp = (void __user *)arg;
5351         int r = -ENOTTY;
5352         /*
5353          * This union makes it completely explicit to gcc-3.x
5354          * that these two variables' stack usage should be
5355          * combined, not added together.
5356          */
5357         union {
5358                 struct kvm_pit_state ps;
5359                 struct kvm_pit_state2 ps2;
5360                 struct kvm_pit_config pit_config;
5361         } u;
5362
5363         switch (ioctl) {
5364         case KVM_SET_TSS_ADDR:
5365                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
5366                 break;
5367         case KVM_SET_IDENTITY_MAP_ADDR: {
5368                 u64 ident_addr;
5369
5370                 mutex_lock(&kvm->lock);
5371                 r = -EINVAL;
5372                 if (kvm->created_vcpus)
5373                         goto set_identity_unlock;
5374                 r = -EFAULT;
5375                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
5376                         goto set_identity_unlock;
5377                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
5378 set_identity_unlock:
5379                 mutex_unlock(&kvm->lock);
5380                 break;
5381         }
5382         case KVM_SET_NR_MMU_PAGES:
5383                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
5384                 break;
5385         case KVM_GET_NR_MMU_PAGES:
5386                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
5387                 break;
5388         case KVM_CREATE_IRQCHIP: {
5389                 mutex_lock(&kvm->lock);
5390
5391                 r = -EEXIST;
5392                 if (irqchip_in_kernel(kvm))
5393                         goto create_irqchip_unlock;
5394
5395                 r = -EINVAL;
5396                 if (kvm->created_vcpus)
5397                         goto create_irqchip_unlock;
5398
5399                 r = kvm_pic_init(kvm);
5400                 if (r)
5401                         goto create_irqchip_unlock;
5402
5403                 r = kvm_ioapic_init(kvm);
5404                 if (r) {
5405                         kvm_pic_destroy(kvm);
5406                         goto create_irqchip_unlock;
5407                 }
5408
5409                 r = kvm_setup_default_irq_routing(kvm);
5410                 if (r) {
5411                         kvm_ioapic_destroy(kvm);
5412                         kvm_pic_destroy(kvm);
5413                         goto create_irqchip_unlock;
5414                 }
5415                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
5416                 smp_wmb();
5417                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
5418         create_irqchip_unlock:
5419                 mutex_unlock(&kvm->lock);
5420                 break;
5421         }
5422         case KVM_CREATE_PIT:
5423                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
5424                 goto create_pit;
5425         case KVM_CREATE_PIT2:
5426                 r = -EFAULT;
5427                 if (copy_from_user(&u.pit_config, argp,
5428                                    sizeof(struct kvm_pit_config)))
5429                         goto out;
5430         create_pit:
5431                 mutex_lock(&kvm->lock);
5432                 r = -EEXIST;
5433                 if (kvm->arch.vpit)
5434                         goto create_pit_unlock;
5435                 r = -ENOMEM;
5436                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
5437                 if (kvm->arch.vpit)
5438                         r = 0;
5439         create_pit_unlock:
5440                 mutex_unlock(&kvm->lock);
5441                 break;
5442         case KVM_GET_IRQCHIP: {
5443                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5444                 struct kvm_irqchip *chip;
5445
5446                 chip = memdup_user(argp, sizeof(*chip));
5447                 if (IS_ERR(chip)) {
5448                         r = PTR_ERR(chip);
5449                         goto out;
5450                 }
5451
5452                 r = -ENXIO;
5453                 if (!irqchip_kernel(kvm))
5454                         goto get_irqchip_out;
5455                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
5456                 if (r)
5457                         goto get_irqchip_out;
5458                 r = -EFAULT;
5459                 if (copy_to_user(argp, chip, sizeof(*chip)))
5460                         goto get_irqchip_out;
5461                 r = 0;
5462         get_irqchip_out:
5463                 kfree(chip);
5464                 break;
5465         }
5466         case KVM_SET_IRQCHIP: {
5467                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5468                 struct kvm_irqchip *chip;
5469
5470                 chip = memdup_user(argp, sizeof(*chip));
5471                 if (IS_ERR(chip)) {
5472                         r = PTR_ERR(chip);
5473                         goto out;
5474                 }
5475
5476                 r = -ENXIO;
5477                 if (!irqchip_kernel(kvm))
5478                         goto set_irqchip_out;
5479                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
5480         set_irqchip_out:
5481                 kfree(chip);
5482                 break;
5483         }
5484         case KVM_GET_PIT: {
5485                 r = -EFAULT;
5486                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
5487                         goto out;
5488                 r = -ENXIO;
5489                 if (!kvm->arch.vpit)
5490                         goto out;
5491                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
5492                 if (r)
5493                         goto out;
5494                 r = -EFAULT;
5495                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
5496                         goto out;
5497                 r = 0;
5498                 break;
5499         }
5500         case KVM_SET_PIT: {
5501                 r = -EFAULT;
5502                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
5503                         goto out;
5504                 mutex_lock(&kvm->lock);
5505                 r = -ENXIO;
5506                 if (!kvm->arch.vpit)
5507                         goto set_pit_out;
5508                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
5509 set_pit_out:
5510                 mutex_unlock(&kvm->lock);
5511                 break;
5512         }
5513         case KVM_GET_PIT2: {
5514                 r = -ENXIO;
5515                 if (!kvm->arch.vpit)
5516                         goto out;
5517                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
5518                 if (r)
5519                         goto out;
5520                 r = -EFAULT;
5521                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
5522                         goto out;
5523                 r = 0;
5524                 break;
5525         }
5526         case KVM_SET_PIT2: {
5527                 r = -EFAULT;
5528                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
5529                         goto out;
5530                 mutex_lock(&kvm->lock);
5531                 r = -ENXIO;
5532                 if (!kvm->arch.vpit)
5533                         goto set_pit2_out;
5534                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
5535 set_pit2_out:
5536                 mutex_unlock(&kvm->lock);
5537                 break;
5538         }
5539         case KVM_REINJECT_CONTROL: {
5540                 struct kvm_reinject_control control;
5541                 r =  -EFAULT;
5542                 if (copy_from_user(&control, argp, sizeof(control)))
5543                         goto out;
5544                 r = -ENXIO;
5545                 if (!kvm->arch.vpit)
5546                         goto out;
5547                 r = kvm_vm_ioctl_reinject(kvm, &control);
5548                 break;
5549         }
5550         case KVM_SET_BOOT_CPU_ID:
5551                 r = 0;
5552                 mutex_lock(&kvm->lock);
5553                 if (kvm->created_vcpus)
5554                         r = -EBUSY;
5555                 else
5556                         kvm->arch.bsp_vcpu_id = arg;
5557                 mutex_unlock(&kvm->lock);
5558                 break;
5559         case KVM_XEN_HVM_CONFIG: {
5560                 struct kvm_xen_hvm_config xhc;
5561                 r = -EFAULT;
5562                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
5563                         goto out;
5564                 r = -EINVAL;
5565                 if (xhc.flags)
5566                         goto out;
5567                 memcpy(&kvm->arch.xen_hvm_config, &xhc, sizeof(xhc));
5568                 r = 0;
5569                 break;
5570         }
5571         case KVM_SET_CLOCK: {
5572                 struct kvm_clock_data user_ns;
5573                 u64 now_ns;
5574
5575                 r = -EFAULT;
5576                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
5577                         goto out;
5578
5579                 r = -EINVAL;
5580                 if (user_ns.flags)
5581                         goto out;
5582
5583                 r = 0;
5584                 /*
5585                  * TODO: userspace has to take care of races with VCPU_RUN, so
5586                  * kvm_gen_update_masterclock() can be cut down to locked
5587                  * pvclock_update_vm_gtod_copy().
5588                  */
5589                 kvm_gen_update_masterclock(kvm);
5590                 now_ns = get_kvmclock_ns(kvm);
5591                 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
5592                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
5593                 break;
5594         }
5595         case KVM_GET_CLOCK: {
5596                 struct kvm_clock_data user_ns;
5597                 u64 now_ns;
5598
5599                 now_ns = get_kvmclock_ns(kvm);
5600                 user_ns.clock = now_ns;
5601                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
5602                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
5603
5604                 r = -EFAULT;
5605                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
5606                         goto out;
5607                 r = 0;
5608                 break;
5609         }
5610         case KVM_MEMORY_ENCRYPT_OP: {
5611                 r = -ENOTTY;
5612                 if (kvm_x86_ops.mem_enc_op)
5613                         r = kvm_x86_ops.mem_enc_op(kvm, argp);
5614                 break;
5615         }
5616         case KVM_MEMORY_ENCRYPT_REG_REGION: {
5617                 struct kvm_enc_region region;
5618
5619                 r = -EFAULT;
5620                 if (copy_from_user(&region, argp, sizeof(region)))
5621                         goto out;
5622
5623                 r = -ENOTTY;
5624                 if (kvm_x86_ops.mem_enc_reg_region)
5625                         r = kvm_x86_ops.mem_enc_reg_region(kvm, &region);
5626                 break;
5627         }
5628         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
5629                 struct kvm_enc_region region;
5630
5631                 r = -EFAULT;
5632                 if (copy_from_user(&region, argp, sizeof(region)))
5633                         goto out;
5634
5635                 r = -ENOTTY;
5636                 if (kvm_x86_ops.mem_enc_unreg_region)
5637                         r = kvm_x86_ops.mem_enc_unreg_region(kvm, &region);
5638                 break;
5639         }
5640         case KVM_HYPERV_EVENTFD: {
5641                 struct kvm_hyperv_eventfd hvevfd;
5642
5643                 r = -EFAULT;
5644                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
5645                         goto out;
5646                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
5647                 break;
5648         }
5649         case KVM_SET_PMU_EVENT_FILTER:
5650                 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
5651                 break;
5652         case KVM_X86_SET_MSR_FILTER:
5653                 r = kvm_vm_ioctl_set_msr_filter(kvm, argp);
5654                 break;
5655         default:
5656                 r = -ENOTTY;
5657         }
5658 out:
5659         return r;
5660 }
5661
5662 static void kvm_init_msr_list(void)
5663 {
5664         struct x86_pmu_capability x86_pmu;
5665         u32 dummy[2];
5666         unsigned i;
5667
5668         BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
5669                          "Please update the fixed PMCs in msrs_to_saved_all[]");
5670
5671         perf_get_x86_pmu_capability(&x86_pmu);
5672
5673         num_msrs_to_save = 0;
5674         num_emulated_msrs = 0;
5675         num_msr_based_features = 0;
5676
5677         for (i = 0; i < ARRAY_SIZE(msrs_to_save_all); i++) {
5678                 if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
5679                         continue;
5680
5681                 /*
5682                  * Even MSRs that are valid in the host may not be exposed
5683                  * to the guests in some cases.
5684                  */
5685                 switch (msrs_to_save_all[i]) {
5686                 case MSR_IA32_BNDCFGS:
5687                         if (!kvm_mpx_supported())
5688                                 continue;
5689                         break;
5690                 case MSR_TSC_AUX:
5691                         if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP))
5692                                 continue;
5693                         break;
5694                 case MSR_IA32_UMWAIT_CONTROL:
5695                         if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG))
5696                                 continue;
5697                         break;
5698                 case MSR_IA32_RTIT_CTL:
5699                 case MSR_IA32_RTIT_STATUS:
5700                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT))
5701                                 continue;
5702                         break;
5703                 case MSR_IA32_RTIT_CR3_MATCH:
5704                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
5705                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
5706                                 continue;
5707                         break;
5708                 case MSR_IA32_RTIT_OUTPUT_BASE:
5709                 case MSR_IA32_RTIT_OUTPUT_MASK:
5710                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
5711                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
5712                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
5713                                 continue;
5714                         break;
5715                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
5716                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
5717                                 msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=
5718                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
5719                                 continue;
5720                         break;
5721                 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
5722                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
5723                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
5724                                 continue;
5725                         break;
5726                 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
5727                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
5728                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
5729                                 continue;
5730                         break;
5731                 default:
5732                         break;
5733                 }
5734
5735                 msrs_to_save[num_msrs_to_save++] = msrs_to_save_all[i];
5736         }
5737
5738         for (i = 0; i < ARRAY_SIZE(emulated_msrs_all); i++) {
5739                 if (!kvm_x86_ops.has_emulated_msr(emulated_msrs_all[i]))
5740                         continue;
5741
5742                 emulated_msrs[num_emulated_msrs++] = emulated_msrs_all[i];
5743         }
5744
5745         for (i = 0; i < ARRAY_SIZE(msr_based_features_all); i++) {
5746                 struct kvm_msr_entry msr;
5747
5748                 msr.index = msr_based_features_all[i];
5749                 if (kvm_get_msr_feature(&msr))
5750                         continue;
5751
5752                 msr_based_features[num_msr_based_features++] = msr_based_features_all[i];
5753         }
5754 }
5755
5756 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
5757                            const void *v)
5758 {
5759         int handled = 0;
5760         int n;
5761
5762         do {
5763                 n = min(len, 8);
5764                 if (!(lapic_in_kernel(vcpu) &&
5765                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
5766                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
5767                         break;
5768                 handled += n;
5769                 addr += n;
5770                 len -= n;
5771                 v += n;
5772         } while (len);
5773
5774         return handled;
5775 }
5776
5777 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
5778 {
5779         int handled = 0;
5780         int n;
5781
5782         do {
5783                 n = min(len, 8);
5784                 if (!(lapic_in_kernel(vcpu) &&
5785                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
5786                                          addr, n, v))
5787                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
5788                         break;
5789                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
5790                 handled += n;
5791                 addr += n;
5792                 len -= n;
5793                 v += n;
5794         } while (len);
5795
5796         return handled;
5797 }
5798
5799 static void kvm_set_segment(struct kvm_vcpu *vcpu,
5800                         struct kvm_segment *var, int seg)
5801 {
5802         kvm_x86_ops.set_segment(vcpu, var, seg);
5803 }
5804
5805 void kvm_get_segment(struct kvm_vcpu *vcpu,
5806                      struct kvm_segment *var, int seg)
5807 {
5808         kvm_x86_ops.get_segment(vcpu, var, seg);
5809 }
5810
5811 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
5812                            struct x86_exception *exception)
5813 {
5814         gpa_t t_gpa;
5815
5816         BUG_ON(!mmu_is_nested(vcpu));
5817
5818         /* NPT walks are always user-walks */
5819         access |= PFERR_USER_MASK;
5820         t_gpa  = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
5821
5822         return t_gpa;
5823 }
5824
5825 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
5826                               struct x86_exception *exception)
5827 {
5828         u32 access = (kvm_x86_ops.get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5829         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5830 }
5831
5832  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
5833                                 struct x86_exception *exception)
5834 {
5835         u32 access = (kvm_x86_ops.get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5836         access |= PFERR_FETCH_MASK;
5837         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5838 }
5839
5840 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
5841                                struct x86_exception *exception)
5842 {
5843         u32 access = (kvm_x86_ops.get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5844         access |= PFERR_WRITE_MASK;
5845         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5846 }
5847
5848 /* uses this to access any guest's mapped memory without checking CPL */
5849 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
5850                                 struct x86_exception *exception)
5851 {
5852         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
5853 }
5854
5855 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
5856                                       struct kvm_vcpu *vcpu, u32 access,
5857                                       struct x86_exception *exception)
5858 {
5859         void *data = val;
5860         int r = X86EMUL_CONTINUE;
5861
5862         while (bytes) {
5863                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
5864                                                             exception);
5865                 unsigned offset = addr & (PAGE_SIZE-1);
5866                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
5867                 int ret;
5868
5869                 if (gpa == UNMAPPED_GVA)
5870                         return X86EMUL_PROPAGATE_FAULT;
5871                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
5872                                                offset, toread);
5873                 if (ret < 0) {
5874                         r = X86EMUL_IO_NEEDED;
5875                         goto out;
5876                 }
5877
5878                 bytes -= toread;
5879                 data += toread;
5880                 addr += toread;
5881         }
5882 out:
5883         return r;
5884 }
5885
5886 /* used for instruction fetching */
5887 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
5888                                 gva_t addr, void *val, unsigned int bytes,
5889                                 struct x86_exception *exception)
5890 {
5891         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5892         u32 access = (kvm_x86_ops.get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5893         unsigned offset;
5894         int ret;
5895
5896         /* Inline kvm_read_guest_virt_helper for speed.  */
5897         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
5898                                                     exception);
5899         if (unlikely(gpa == UNMAPPED_GVA))
5900                 return X86EMUL_PROPAGATE_FAULT;
5901
5902         offset = addr & (PAGE_SIZE-1);
5903         if (WARN_ON(offset + bytes > PAGE_SIZE))
5904                 bytes = (unsigned)PAGE_SIZE - offset;
5905         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
5906                                        offset, bytes);
5907         if (unlikely(ret < 0))
5908                 return X86EMUL_IO_NEEDED;
5909
5910         return X86EMUL_CONTINUE;
5911 }
5912
5913 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
5914                                gva_t addr, void *val, unsigned int bytes,
5915                                struct x86_exception *exception)
5916 {
5917         u32 access = (kvm_x86_ops.get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5918
5919         /*
5920          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
5921          * is returned, but our callers are not ready for that and they blindly
5922          * call kvm_inject_page_fault.  Ensure that they at least do not leak
5923          * uninitialized kernel stack memory into cr2 and error code.
5924          */
5925         memset(exception, 0, sizeof(*exception));
5926         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
5927                                           exception);
5928 }
5929 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
5930
5931 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
5932                              gva_t addr, void *val, unsigned int bytes,
5933                              struct x86_exception *exception, bool system)
5934 {
5935         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5936         u32 access = 0;
5937
5938         if (!system && kvm_x86_ops.get_cpl(vcpu) == 3)
5939                 access |= PFERR_USER_MASK;
5940
5941         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
5942 }
5943
5944 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
5945                 unsigned long addr, void *val, unsigned int bytes)
5946 {
5947         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5948         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
5949
5950         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
5951 }
5952
5953 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
5954                                       struct kvm_vcpu *vcpu, u32 access,
5955                                       struct x86_exception *exception)
5956 {
5957         void *data = val;
5958         int r = X86EMUL_CONTINUE;
5959
5960         while (bytes) {
5961                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
5962                                                              access,
5963                                                              exception);
5964                 unsigned offset = addr & (PAGE_SIZE-1);
5965                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
5966                 int ret;
5967
5968                 if (gpa == UNMAPPED_GVA)
5969                         return X86EMUL_PROPAGATE_FAULT;
5970                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
5971                 if (ret < 0) {
5972                         r = X86EMUL_IO_NEEDED;
5973                         goto out;
5974                 }
5975
5976                 bytes -= towrite;
5977                 data += towrite;
5978                 addr += towrite;
5979         }
5980 out:
5981         return r;
5982 }
5983
5984 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
5985                               unsigned int bytes, struct x86_exception *exception,
5986                               bool system)
5987 {
5988         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5989         u32 access = PFERR_WRITE_MASK;
5990
5991         if (!system && kvm_x86_ops.get_cpl(vcpu) == 3)
5992                 access |= PFERR_USER_MASK;
5993
5994         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
5995                                            access, exception);
5996 }
5997
5998 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
5999                                 unsigned int bytes, struct x86_exception *exception)
6000 {
6001         /* kvm_write_guest_virt_system can pull in tons of pages. */
6002         vcpu->arch.l1tf_flush_l1d = true;
6003
6004         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6005                                            PFERR_WRITE_MASK, exception);
6006 }
6007 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
6008
6009 int handle_ud(struct kvm_vcpu *vcpu)
6010 {
6011         static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
6012         int emul_type = EMULTYPE_TRAP_UD;
6013         char sig[5]; /* ud2; .ascii "kvm" */
6014         struct x86_exception e;
6015
6016         if (unlikely(!kvm_x86_ops.can_emulate_instruction(vcpu, NULL, 0)))
6017                 return 1;
6018
6019         if (force_emulation_prefix &&
6020             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
6021                                 sig, sizeof(sig), &e) == 0 &&
6022             memcmp(sig, kvm_emulate_prefix, sizeof(sig)) == 0) {
6023                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
6024                 emul_type = EMULTYPE_TRAP_UD_FORCED;
6025         }
6026
6027         return kvm_emulate_instruction(vcpu, emul_type);
6028 }
6029 EXPORT_SYMBOL_GPL(handle_ud);
6030
6031 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6032                             gpa_t gpa, bool write)
6033 {
6034         /* For APIC access vmexit */
6035         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6036                 return 1;
6037
6038         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
6039                 trace_vcpu_match_mmio(gva, gpa, write, true);
6040                 return 1;
6041         }
6042
6043         return 0;
6044 }
6045
6046 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6047                                 gpa_t *gpa, struct x86_exception *exception,
6048                                 bool write)
6049 {
6050         u32 access = ((kvm_x86_ops.get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
6051                 | (write ? PFERR_WRITE_MASK : 0);
6052
6053         /*
6054          * currently PKRU is only applied to ept enabled guest so
6055          * there is no pkey in EPT page table for L1 guest or EPT
6056          * shadow page table for L2 guest.
6057          */
6058         if (vcpu_match_mmio_gva(vcpu, gva)
6059             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
6060                                  vcpu->arch.mmio_access, 0, access)) {
6061                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
6062                                         (gva & (PAGE_SIZE - 1));
6063                 trace_vcpu_match_mmio(gva, *gpa, write, false);
6064                 return 1;
6065         }
6066
6067         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6068
6069         if (*gpa == UNMAPPED_GVA)
6070                 return -1;
6071
6072         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
6073 }
6074
6075 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
6076                         const void *val, int bytes)
6077 {
6078         int ret;
6079
6080         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
6081         if (ret < 0)
6082                 return 0;
6083         kvm_page_track_write(vcpu, gpa, val, bytes);
6084         return 1;
6085 }
6086
6087 struct read_write_emulator_ops {
6088         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
6089                                   int bytes);
6090         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
6091                                   void *val, int bytes);
6092         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6093                                int bytes, void *val);
6094         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6095                                     void *val, int bytes);
6096         bool write;
6097 };
6098
6099 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
6100 {
6101         if (vcpu->mmio_read_completed) {
6102                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
6103                                vcpu->mmio_fragments[0].gpa, val);
6104                 vcpu->mmio_read_completed = 0;
6105                 return 1;
6106         }
6107
6108         return 0;
6109 }
6110
6111 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6112                         void *val, int bytes)
6113 {
6114         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
6115 }
6116
6117 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6118                          void *val, int bytes)
6119 {
6120         return emulator_write_phys(vcpu, gpa, val, bytes);
6121 }
6122
6123 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
6124 {
6125         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
6126         return vcpu_mmio_write(vcpu, gpa, bytes, val);
6127 }
6128
6129 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6130                           void *val, int bytes)
6131 {
6132         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
6133         return X86EMUL_IO_NEEDED;
6134 }
6135
6136 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6137                            void *val, int bytes)
6138 {
6139         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
6140
6141         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
6142         return X86EMUL_CONTINUE;
6143 }
6144
6145 static const struct read_write_emulator_ops read_emultor = {
6146         .read_write_prepare = read_prepare,
6147         .read_write_emulate = read_emulate,
6148         .read_write_mmio = vcpu_mmio_read,
6149         .read_write_exit_mmio = read_exit_mmio,
6150 };
6151
6152 static const struct read_write_emulator_ops write_emultor = {
6153         .read_write_emulate = write_emulate,
6154         .read_write_mmio = write_mmio,
6155         .read_write_exit_mmio = write_exit_mmio,
6156         .write = true,
6157 };
6158
6159 static int emulator_read_write_onepage(unsigned long addr, void *val,
6160                                        unsigned int bytes,
6161                                        struct x86_exception *exception,
6162                                        struct kvm_vcpu *vcpu,
6163                                        const struct read_write_emulator_ops *ops)
6164 {
6165         gpa_t gpa;
6166         int handled, ret;
6167         bool write = ops->write;
6168         struct kvm_mmio_fragment *frag;
6169         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6170
6171         /*
6172          * If the exit was due to a NPF we may already have a GPA.
6173          * If the GPA is present, use it to avoid the GVA to GPA table walk.
6174          * Note, this cannot be used on string operations since string
6175          * operation using rep will only have the initial GPA from the NPF
6176          * occurred.
6177          */
6178         if (ctxt->gpa_available && emulator_can_use_gpa(ctxt) &&
6179             (addr & ~PAGE_MASK) == (ctxt->gpa_val & ~PAGE_MASK)) {
6180                 gpa = ctxt->gpa_val;
6181                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
6182         } else {
6183                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
6184                 if (ret < 0)
6185                         return X86EMUL_PROPAGATE_FAULT;
6186         }
6187
6188         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
6189                 return X86EMUL_CONTINUE;
6190
6191         /*
6192          * Is this MMIO handled locally?
6193          */
6194         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
6195         if (handled == bytes)
6196                 return X86EMUL_CONTINUE;
6197
6198         gpa += handled;
6199         bytes -= handled;
6200         val += handled;
6201
6202         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
6203         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
6204         frag->gpa = gpa;
6205         frag->data = val;
6206         frag->len = bytes;
6207         return X86EMUL_CONTINUE;
6208 }
6209
6210 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
6211                         unsigned long addr,
6212                         void *val, unsigned int bytes,
6213                         struct x86_exception *exception,
6214                         const struct read_write_emulator_ops *ops)
6215 {
6216         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6217         gpa_t gpa;
6218         int rc;
6219
6220         if (ops->read_write_prepare &&
6221                   ops->read_write_prepare(vcpu, val, bytes))
6222                 return X86EMUL_CONTINUE;
6223
6224         vcpu->mmio_nr_fragments = 0;
6225
6226         /* Crossing a page boundary? */
6227         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
6228                 int now;
6229
6230                 now = -addr & ~PAGE_MASK;
6231                 rc = emulator_read_write_onepage(addr, val, now, exception,
6232                                                  vcpu, ops);
6233
6234                 if (rc != X86EMUL_CONTINUE)
6235                         return rc;
6236                 addr += now;
6237                 if (ctxt->mode != X86EMUL_MODE_PROT64)
6238                         addr = (u32)addr;
6239                 val += now;
6240                 bytes -= now;
6241         }
6242
6243         rc = emulator_read_write_onepage(addr, val, bytes, exception,
6244                                          vcpu, ops);
6245         if (rc != X86EMUL_CONTINUE)
6246                 return rc;
6247
6248         if (!vcpu->mmio_nr_fragments)
6249                 return rc;
6250
6251         gpa = vcpu->mmio_fragments[0].gpa;
6252
6253         vcpu->mmio_needed = 1;
6254         vcpu->mmio_cur_fragment = 0;
6255
6256         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
6257         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
6258         vcpu->run->exit_reason = KVM_EXIT_MMIO;
6259         vcpu->run->mmio.phys_addr = gpa;
6260
6261         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
6262 }
6263
6264 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
6265                                   unsigned long addr,
6266                                   void *val,
6267                                   unsigned int bytes,
6268                                   struct x86_exception *exception)
6269 {
6270         return emulator_read_write(ctxt, addr, val, bytes,
6271                                    exception, &read_emultor);
6272 }
6273
6274 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
6275                             unsigned long addr,
6276                             const void *val,
6277                             unsigned int bytes,
6278                             struct x86_exception *exception)
6279 {
6280         return emulator_read_write(ctxt, addr, (void *)val, bytes,
6281                                    exception, &write_emultor);
6282 }
6283
6284 #define CMPXCHG_TYPE(t, ptr, old, new) \
6285         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
6286
6287 #ifdef CONFIG_X86_64
6288 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
6289 #else
6290 #  define CMPXCHG64(ptr, old, new) \
6291         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
6292 #endif
6293
6294 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
6295                                      unsigned long addr,
6296                                      const void *old,
6297                                      const void *new,
6298                                      unsigned int bytes,
6299                                      struct x86_exception *exception)
6300 {
6301         struct kvm_host_map map;
6302         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6303         u64 page_line_mask;
6304         gpa_t gpa;
6305         char *kaddr;
6306         bool exchanged;
6307
6308         /* guests cmpxchg8b have to be emulated atomically */
6309         if (bytes > 8 || (bytes & (bytes - 1)))
6310                 goto emul_write;
6311
6312         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
6313
6314         if (gpa == UNMAPPED_GVA ||
6315             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6316                 goto emul_write;
6317
6318         /*
6319          * Emulate the atomic as a straight write to avoid #AC if SLD is
6320          * enabled in the host and the access splits a cache line.
6321          */
6322         if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT))
6323                 page_line_mask = ~(cache_line_size() - 1);
6324         else
6325                 page_line_mask = PAGE_MASK;
6326
6327         if (((gpa + bytes - 1) & page_line_mask) != (gpa & page_line_mask))
6328                 goto emul_write;
6329
6330         if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
6331                 goto emul_write;
6332
6333         kaddr = map.hva + offset_in_page(gpa);
6334
6335         switch (bytes) {
6336         case 1:
6337                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
6338                 break;
6339         case 2:
6340                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
6341                 break;
6342         case 4:
6343                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
6344                 break;
6345         case 8:
6346                 exchanged = CMPXCHG64(kaddr, old, new);
6347                 break;
6348         default:
6349                 BUG();
6350         }
6351
6352         kvm_vcpu_unmap(vcpu, &map, true);
6353
6354         if (!exchanged)
6355                 return X86EMUL_CMPXCHG_FAILED;
6356
6357         kvm_page_track_write(vcpu, gpa, new, bytes);
6358
6359         return X86EMUL_CONTINUE;
6360
6361 emul_write:
6362         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
6363
6364         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
6365 }
6366
6367 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
6368 {
6369         int r = 0, i;
6370
6371         for (i = 0; i < vcpu->arch.pio.count; i++) {
6372                 if (vcpu->arch.pio.in)
6373                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
6374                                             vcpu->arch.pio.size, pd);
6375                 else
6376                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
6377                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
6378                                              pd);
6379                 if (r)
6380                         break;
6381                 pd += vcpu->arch.pio.size;
6382         }
6383         return r;
6384 }
6385
6386 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
6387                                unsigned short port, void *val,
6388                                unsigned int count, bool in)
6389 {
6390         vcpu->arch.pio.port = port;
6391         vcpu->arch.pio.in = in;
6392         vcpu->arch.pio.count  = count;
6393         vcpu->arch.pio.size = size;
6394
6395         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
6396                 vcpu->arch.pio.count = 0;
6397                 return 1;
6398         }
6399
6400         vcpu->run->exit_reason = KVM_EXIT_IO;
6401         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
6402         vcpu->run->io.size = size;
6403         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
6404         vcpu->run->io.count = count;
6405         vcpu->run->io.port = port;
6406
6407         return 0;
6408 }
6409
6410 static int emulator_pio_in(struct kvm_vcpu *vcpu, int size,
6411                            unsigned short port, void *val, unsigned int count)
6412 {
6413         int ret;
6414
6415         if (vcpu->arch.pio.count)
6416                 goto data_avail;
6417
6418         memset(vcpu->arch.pio_data, 0, size * count);
6419
6420         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
6421         if (ret) {
6422 data_avail:
6423                 memcpy(val, vcpu->arch.pio_data, size * count);
6424                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
6425                 vcpu->arch.pio.count = 0;
6426                 return 1;
6427         }
6428
6429         return 0;
6430 }
6431
6432 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
6433                                     int size, unsigned short port, void *val,
6434                                     unsigned int count)
6435 {
6436         return emulator_pio_in(emul_to_vcpu(ctxt), size, port, val, count);
6437
6438 }
6439
6440 static int emulator_pio_out(struct kvm_vcpu *vcpu, int size,
6441                             unsigned short port, const void *val,
6442                             unsigned int count)
6443 {
6444         memcpy(vcpu->arch.pio_data, val, size * count);
6445         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
6446         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
6447 }
6448
6449 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
6450                                      int size, unsigned short port,
6451                                      const void *val, unsigned int count)
6452 {
6453         return emulator_pio_out(emul_to_vcpu(ctxt), size, port, val, count);
6454 }
6455
6456 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
6457 {
6458         return kvm_x86_ops.get_segment_base(vcpu, seg);
6459 }
6460
6461 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
6462 {
6463         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
6464 }
6465
6466 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
6467 {
6468         if (!need_emulate_wbinvd(vcpu))
6469                 return X86EMUL_CONTINUE;
6470
6471         if (kvm_x86_ops.has_wbinvd_exit()) {
6472                 int cpu = get_cpu();
6473
6474                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
6475                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
6476                                 wbinvd_ipi, NULL, 1);
6477                 put_cpu();
6478                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
6479         } else
6480                 wbinvd();
6481         return X86EMUL_CONTINUE;
6482 }
6483
6484 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
6485 {
6486         kvm_emulate_wbinvd_noskip(vcpu);
6487         return kvm_skip_emulated_instruction(vcpu);
6488 }
6489 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
6490
6491
6492
6493 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
6494 {
6495         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
6496 }
6497
6498 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
6499                            unsigned long *dest)
6500 {
6501         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
6502 }
6503
6504 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
6505                            unsigned long value)
6506 {
6507
6508         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
6509 }
6510
6511 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
6512 {
6513         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
6514 }
6515
6516 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
6517 {
6518         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6519         unsigned long value;
6520
6521         switch (cr) {
6522         case 0:
6523                 value = kvm_read_cr0(vcpu);
6524                 break;
6525         case 2:
6526                 value = vcpu->arch.cr2;
6527                 break;
6528         case 3:
6529                 value = kvm_read_cr3(vcpu);
6530                 break;
6531         case 4:
6532                 value = kvm_read_cr4(vcpu);
6533                 break;
6534         case 8:
6535                 value = kvm_get_cr8(vcpu);
6536                 break;
6537         default:
6538                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
6539                 return 0;
6540         }
6541
6542         return value;
6543 }
6544
6545 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
6546 {
6547         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6548         int res = 0;
6549
6550         switch (cr) {
6551         case 0:
6552                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
6553                 break;
6554         case 2:
6555                 vcpu->arch.cr2 = val;
6556                 break;
6557         case 3:
6558                 res = kvm_set_cr3(vcpu, val);
6559                 break;
6560         case 4:
6561                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
6562                 break;
6563         case 8:
6564                 res = kvm_set_cr8(vcpu, val);
6565                 break;
6566         default:
6567                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
6568                 res = -1;
6569         }
6570
6571         return res;
6572 }
6573
6574 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
6575 {
6576         return kvm_x86_ops.get_cpl(emul_to_vcpu(ctxt));
6577 }
6578
6579 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6580 {
6581         kvm_x86_ops.get_gdt(emul_to_vcpu(ctxt), dt);
6582 }
6583
6584 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6585 {
6586         kvm_x86_ops.get_idt(emul_to_vcpu(ctxt), dt);
6587 }
6588
6589 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6590 {
6591         kvm_x86_ops.set_gdt(emul_to_vcpu(ctxt), dt);
6592 }
6593
6594 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6595 {
6596         kvm_x86_ops.set_idt(emul_to_vcpu(ctxt), dt);
6597 }
6598
6599 static unsigned long emulator_get_cached_segment_base(
6600         struct x86_emulate_ctxt *ctxt, int seg)
6601 {
6602         return get_segment_base(emul_to_vcpu(ctxt), seg);
6603 }
6604
6605 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
6606                                  struct desc_struct *desc, u32 *base3,
6607                                  int seg)
6608 {
6609         struct kvm_segment var;
6610
6611         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
6612         *selector = var.selector;
6613
6614         if (var.unusable) {
6615                 memset(desc, 0, sizeof(*desc));
6616                 if (base3)
6617                         *base3 = 0;
6618                 return false;
6619         }
6620
6621         if (var.g)
6622                 var.limit >>= 12;
6623         set_desc_limit(desc, var.limit);
6624         set_desc_base(desc, (unsigned long)var.base);
6625 #ifdef CONFIG_X86_64
6626         if (base3)
6627                 *base3 = var.base >> 32;
6628 #endif
6629         desc->type = var.type;
6630         desc->s = var.s;
6631         desc->dpl = var.dpl;
6632         desc->p = var.present;
6633         desc->avl = var.avl;
6634         desc->l = var.l;
6635         desc->d = var.db;
6636         desc->g = var.g;
6637
6638         return true;
6639 }
6640
6641 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
6642                                  struct desc_struct *desc, u32 base3,
6643                                  int seg)
6644 {
6645         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6646         struct kvm_segment var;
6647
6648         var.selector = selector;
6649         var.base = get_desc_base(desc);
6650 #ifdef CONFIG_X86_64
6651         var.base |= ((u64)base3) << 32;
6652 #endif
6653         var.limit = get_desc_limit(desc);
6654         if (desc->g)
6655                 var.limit = (var.limit << 12) | 0xfff;
6656         var.type = desc->type;
6657         var.dpl = desc->dpl;
6658         var.db = desc->d;
6659         var.s = desc->s;
6660         var.l = desc->l;
6661         var.g = desc->g;
6662         var.avl = desc->avl;
6663         var.present = desc->p;
6664         var.unusable = !var.present;
6665         var.padding = 0;
6666
6667         kvm_set_segment(vcpu, &var, seg);
6668         return;
6669 }
6670
6671 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
6672                             u32 msr_index, u64 *pdata)
6673 {
6674         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6675         int r;
6676
6677         r = kvm_get_msr(vcpu, msr_index, pdata);
6678
6679         if (r && kvm_get_msr_user_space(vcpu, msr_index, r)) {
6680                 /* Bounce to user space */
6681                 return X86EMUL_IO_NEEDED;
6682         }
6683
6684         return r;
6685 }
6686
6687 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
6688                             u32 msr_index, u64 data)
6689 {
6690         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6691         int r;
6692
6693         r = kvm_set_msr(vcpu, msr_index, data);
6694
6695         if (r && kvm_set_msr_user_space(vcpu, msr_index, data, r)) {
6696                 /* Bounce to user space */
6697                 return X86EMUL_IO_NEEDED;
6698         }
6699
6700         return r;
6701 }
6702
6703 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
6704 {
6705         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6706
6707         return vcpu->arch.smbase;
6708 }
6709
6710 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
6711 {
6712         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6713
6714         vcpu->arch.smbase = smbase;
6715 }
6716
6717 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
6718                               u32 pmc)
6719 {
6720         return kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt), pmc);
6721 }
6722
6723 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
6724                              u32 pmc, u64 *pdata)
6725 {
6726         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
6727 }
6728
6729 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
6730 {
6731         emul_to_vcpu(ctxt)->arch.halt_request = 1;
6732 }
6733
6734 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
6735                               struct x86_instruction_info *info,
6736                               enum x86_intercept_stage stage)
6737 {
6738         return kvm_x86_ops.check_intercept(emul_to_vcpu(ctxt), info, stage,
6739                                             &ctxt->exception);
6740 }
6741
6742 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
6743                               u32 *eax, u32 *ebx, u32 *ecx, u32 *edx,
6744                               bool exact_only)
6745 {
6746         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, exact_only);
6747 }
6748
6749 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt *ctxt)
6750 {
6751         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_LM);
6752 }
6753
6754 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt *ctxt)
6755 {
6756         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_MOVBE);
6757 }
6758
6759 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)
6760 {
6761         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_FXSR);
6762 }
6763
6764 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
6765 {
6766         return kvm_register_read(emul_to_vcpu(ctxt), reg);
6767 }
6768
6769 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
6770 {
6771         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
6772 }
6773
6774 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
6775 {
6776         kvm_x86_ops.set_nmi_mask(emul_to_vcpu(ctxt), masked);
6777 }
6778
6779 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
6780 {
6781         return emul_to_vcpu(ctxt)->arch.hflags;
6782 }
6783
6784 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
6785 {
6786         emul_to_vcpu(ctxt)->arch.hflags = emul_flags;
6787 }
6788
6789 static int emulator_pre_leave_smm(struct x86_emulate_ctxt *ctxt,
6790                                   const char *smstate)
6791 {
6792         return kvm_x86_ops.pre_leave_smm(emul_to_vcpu(ctxt), smstate);
6793 }
6794
6795 static void emulator_post_leave_smm(struct x86_emulate_ctxt *ctxt)
6796 {
6797         kvm_smm_changed(emul_to_vcpu(ctxt));
6798 }
6799
6800 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
6801 {
6802         return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
6803 }
6804
6805 static const struct x86_emulate_ops emulate_ops = {
6806         .read_gpr            = emulator_read_gpr,
6807         .write_gpr           = emulator_write_gpr,
6808         .read_std            = emulator_read_std,
6809         .write_std           = emulator_write_std,
6810         .read_phys           = kvm_read_guest_phys_system,
6811         .fetch               = kvm_fetch_guest_virt,
6812         .read_emulated       = emulator_read_emulated,
6813         .write_emulated      = emulator_write_emulated,
6814         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
6815         .invlpg              = emulator_invlpg,
6816         .pio_in_emulated     = emulator_pio_in_emulated,
6817         .pio_out_emulated    = emulator_pio_out_emulated,
6818         .get_segment         = emulator_get_segment,
6819         .set_segment         = emulator_set_segment,
6820         .get_cached_segment_base = emulator_get_cached_segment_base,
6821         .get_gdt             = emulator_get_gdt,
6822         .get_idt             = emulator_get_idt,
6823         .set_gdt             = emulator_set_gdt,
6824         .set_idt             = emulator_set_idt,
6825         .get_cr              = emulator_get_cr,
6826         .set_cr              = emulator_set_cr,
6827         .cpl                 = emulator_get_cpl,
6828         .get_dr              = emulator_get_dr,
6829         .set_dr              = emulator_set_dr,
6830         .get_smbase          = emulator_get_smbase,
6831         .set_smbase          = emulator_set_smbase,
6832         .set_msr             = emulator_set_msr,
6833         .get_msr             = emulator_get_msr,
6834         .check_pmc           = emulator_check_pmc,
6835         .read_pmc            = emulator_read_pmc,
6836         .halt                = emulator_halt,
6837         .wbinvd              = emulator_wbinvd,
6838         .fix_hypercall       = emulator_fix_hypercall,
6839         .intercept           = emulator_intercept,
6840         .get_cpuid           = emulator_get_cpuid,
6841         .guest_has_long_mode = emulator_guest_has_long_mode,
6842         .guest_has_movbe     = emulator_guest_has_movbe,
6843         .guest_has_fxsr      = emulator_guest_has_fxsr,
6844         .set_nmi_mask        = emulator_set_nmi_mask,
6845         .get_hflags          = emulator_get_hflags,
6846         .set_hflags          = emulator_set_hflags,
6847         .pre_leave_smm       = emulator_pre_leave_smm,
6848         .post_leave_smm      = emulator_post_leave_smm,
6849         .set_xcr             = emulator_set_xcr,
6850 };
6851
6852 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
6853 {
6854         u32 int_shadow = kvm_x86_ops.get_interrupt_shadow(vcpu);
6855         /*
6856          * an sti; sti; sequence only disable interrupts for the first
6857          * instruction. So, if the last instruction, be it emulated or
6858          * not, left the system with the INT_STI flag enabled, it
6859          * means that the last instruction is an sti. We should not
6860          * leave the flag on in this case. The same goes for mov ss
6861          */
6862         if (int_shadow & mask)
6863                 mask = 0;
6864         if (unlikely(int_shadow || mask)) {
6865                 kvm_x86_ops.set_interrupt_shadow(vcpu, mask);
6866                 if (!mask)
6867                         kvm_make_request(KVM_REQ_EVENT, vcpu);
6868         }
6869 }
6870
6871 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
6872 {
6873         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6874         if (ctxt->exception.vector == PF_VECTOR)
6875                 return kvm_inject_emulated_page_fault(vcpu, &ctxt->exception);
6876
6877         if (ctxt->exception.error_code_valid)
6878                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
6879                                       ctxt->exception.error_code);
6880         else
6881                 kvm_queue_exception(vcpu, ctxt->exception.vector);
6882         return false;
6883 }
6884
6885 static struct x86_emulate_ctxt *alloc_emulate_ctxt(struct kvm_vcpu *vcpu)
6886 {
6887         struct x86_emulate_ctxt *ctxt;
6888
6889         ctxt = kmem_cache_zalloc(x86_emulator_cache, GFP_KERNEL_ACCOUNT);
6890         if (!ctxt) {
6891                 pr_err("kvm: failed to allocate vcpu's emulator\n");
6892                 return NULL;
6893         }
6894
6895         ctxt->vcpu = vcpu;
6896         ctxt->ops = &emulate_ops;
6897         vcpu->arch.emulate_ctxt = ctxt;
6898
6899         return ctxt;
6900 }
6901
6902 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
6903 {
6904         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6905         int cs_db, cs_l;
6906
6907         kvm_x86_ops.get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
6908
6909         ctxt->gpa_available = false;
6910         ctxt->eflags = kvm_get_rflags(vcpu);
6911         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
6912
6913         ctxt->eip = kvm_rip_read(vcpu);
6914         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
6915                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
6916                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
6917                      cs_db                              ? X86EMUL_MODE_PROT32 :
6918                                                           X86EMUL_MODE_PROT16;
6919         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
6920         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
6921         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
6922
6923         init_decode_cache(ctxt);
6924         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
6925 }
6926
6927 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
6928 {
6929         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6930         int ret;
6931
6932         init_emulate_ctxt(vcpu);
6933
6934         ctxt->op_bytes = 2;
6935         ctxt->ad_bytes = 2;
6936         ctxt->_eip = ctxt->eip + inc_eip;
6937         ret = emulate_int_real(ctxt, irq);
6938
6939         if (ret != X86EMUL_CONTINUE) {
6940                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
6941         } else {
6942                 ctxt->eip = ctxt->_eip;
6943                 kvm_rip_write(vcpu, ctxt->eip);
6944                 kvm_set_rflags(vcpu, ctxt->eflags);
6945         }
6946 }
6947 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
6948
6949 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
6950 {
6951         ++vcpu->stat.insn_emulation_fail;
6952         trace_kvm_emulate_insn_failed(vcpu);
6953
6954         if (emulation_type & EMULTYPE_VMWARE_GP) {
6955                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
6956                 return 1;
6957         }
6958
6959         if (emulation_type & EMULTYPE_SKIP) {
6960                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
6961                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
6962                 vcpu->run->internal.ndata = 0;
6963                 return 0;
6964         }
6965
6966         kvm_queue_exception(vcpu, UD_VECTOR);
6967
6968         if (!is_guest_mode(vcpu) && kvm_x86_ops.get_cpl(vcpu) == 0) {
6969                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
6970                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
6971                 vcpu->run->internal.ndata = 0;
6972                 return 0;
6973         }
6974
6975         return 1;
6976 }
6977
6978 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
6979                                   bool write_fault_to_shadow_pgtable,
6980                                   int emulation_type)
6981 {
6982         gpa_t gpa = cr2_or_gpa;
6983         kvm_pfn_t pfn;
6984
6985         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
6986                 return false;
6987
6988         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
6989             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
6990                 return false;
6991
6992         if (!vcpu->arch.mmu->direct_map) {
6993                 /*
6994                  * Write permission should be allowed since only
6995                  * write access need to be emulated.
6996                  */
6997                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
6998
6999                 /*
7000                  * If the mapping is invalid in guest, let cpu retry
7001                  * it to generate fault.
7002                  */
7003                 if (gpa == UNMAPPED_GVA)
7004                         return true;
7005         }
7006
7007         /*
7008          * Do not retry the unhandleable instruction if it faults on the
7009          * readonly host memory, otherwise it will goto a infinite loop:
7010          * retry instruction -> write #PF -> emulation fail -> retry
7011          * instruction -> ...
7012          */
7013         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
7014
7015         /*
7016          * If the instruction failed on the error pfn, it can not be fixed,
7017          * report the error to userspace.
7018          */
7019         if (is_error_noslot_pfn(pfn))
7020                 return false;
7021
7022         kvm_release_pfn_clean(pfn);
7023
7024         /* The instructions are well-emulated on direct mmu. */
7025         if (vcpu->arch.mmu->direct_map) {
7026                 unsigned int indirect_shadow_pages;
7027
7028                 spin_lock(&vcpu->kvm->mmu_lock);
7029                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
7030                 spin_unlock(&vcpu->kvm->mmu_lock);
7031
7032                 if (indirect_shadow_pages)
7033                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7034
7035                 return true;
7036         }
7037
7038         /*
7039          * if emulation was due to access to shadowed page table
7040          * and it failed try to unshadow page and re-enter the
7041          * guest to let CPU execute the instruction.
7042          */
7043         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7044
7045         /*
7046          * If the access faults on its page table, it can not
7047          * be fixed by unprotecting shadow page and it should
7048          * be reported to userspace.
7049          */
7050         return !write_fault_to_shadow_pgtable;
7051 }
7052
7053 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
7054                               gpa_t cr2_or_gpa,  int emulation_type)
7055 {
7056         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7057         unsigned long last_retry_eip, last_retry_addr, gpa = cr2_or_gpa;
7058
7059         last_retry_eip = vcpu->arch.last_retry_eip;
7060         last_retry_addr = vcpu->arch.last_retry_addr;
7061
7062         /*
7063          * If the emulation is caused by #PF and it is non-page_table
7064          * writing instruction, it means the VM-EXIT is caused by shadow
7065          * page protected, we can zap the shadow page and retry this
7066          * instruction directly.
7067          *
7068          * Note: if the guest uses a non-page-table modifying instruction
7069          * on the PDE that points to the instruction, then we will unmap
7070          * the instruction and go to an infinite loop. So, we cache the
7071          * last retried eip and the last fault address, if we meet the eip
7072          * and the address again, we can break out of the potential infinite
7073          * loop.
7074          */
7075         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
7076
7077         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7078                 return false;
7079
7080         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7081             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7082                 return false;
7083
7084         if (x86_page_table_writing_insn(ctxt))
7085                 return false;
7086
7087         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2_or_gpa)
7088                 return false;
7089
7090         vcpu->arch.last_retry_eip = ctxt->eip;
7091         vcpu->arch.last_retry_addr = cr2_or_gpa;
7092
7093         if (!vcpu->arch.mmu->direct_map)
7094                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7095
7096         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7097
7098         return true;
7099 }
7100
7101 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
7102 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
7103
7104 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
7105 {
7106         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
7107                 /* This is a good place to trace that we are exiting SMM.  */
7108                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
7109
7110                 /* Process a latched INIT or SMI, if any.  */
7111                 kvm_make_request(KVM_REQ_EVENT, vcpu);
7112         }
7113
7114         kvm_mmu_reset_context(vcpu);
7115 }
7116
7117 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
7118                                 unsigned long *db)
7119 {
7120         u32 dr6 = 0;
7121         int i;
7122         u32 enable, rwlen;
7123
7124         enable = dr7;
7125         rwlen = dr7 >> 16;
7126         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
7127                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
7128                         dr6 |= (1 << i);
7129         return dr6;
7130 }
7131
7132 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
7133 {
7134         struct kvm_run *kvm_run = vcpu->run;
7135
7136         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
7137                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 | DR6_RTM;
7138                 kvm_run->debug.arch.pc = kvm_get_linear_rip(vcpu);
7139                 kvm_run->debug.arch.exception = DB_VECTOR;
7140                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
7141                 return 0;
7142         }
7143         kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
7144         return 1;
7145 }
7146
7147 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
7148 {
7149         unsigned long rflags = kvm_x86_ops.get_rflags(vcpu);
7150         int r;
7151
7152         r = kvm_x86_ops.skip_emulated_instruction(vcpu);
7153         if (unlikely(!r))
7154                 return 0;
7155
7156         /*
7157          * rflags is the old, "raw" value of the flags.  The new value has
7158          * not been saved yet.
7159          *
7160          * This is correct even for TF set by the guest, because "the
7161          * processor will not generate this exception after the instruction
7162          * that sets the TF flag".
7163          */
7164         if (unlikely(rflags & X86_EFLAGS_TF))
7165                 r = kvm_vcpu_do_singlestep(vcpu);
7166         return r;
7167 }
7168 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
7169
7170 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
7171 {
7172         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
7173             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
7174                 struct kvm_run *kvm_run = vcpu->run;
7175                 unsigned long eip = kvm_get_linear_rip(vcpu);
7176                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7177                                            vcpu->arch.guest_debug_dr7,
7178                                            vcpu->arch.eff_db);
7179
7180                 if (dr6 != 0) {
7181                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
7182                         kvm_run->debug.arch.pc = eip;
7183                         kvm_run->debug.arch.exception = DB_VECTOR;
7184                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
7185                         *r = 0;
7186                         return true;
7187                 }
7188         }
7189
7190         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
7191             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
7192                 unsigned long eip = kvm_get_linear_rip(vcpu);
7193                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7194                                            vcpu->arch.dr7,
7195                                            vcpu->arch.db);
7196
7197                 if (dr6 != 0) {
7198                         kvm_queue_exception_p(vcpu, DB_VECTOR, dr6);
7199                         *r = 1;
7200                         return true;
7201                 }
7202         }
7203
7204         return false;
7205 }
7206
7207 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
7208 {
7209         switch (ctxt->opcode_len) {
7210         case 1:
7211                 switch (ctxt->b) {
7212                 case 0xe4:      /* IN */
7213                 case 0xe5:
7214                 case 0xec:
7215                 case 0xed:
7216                 case 0xe6:      /* OUT */
7217                 case 0xe7:
7218                 case 0xee:
7219                 case 0xef:
7220                 case 0x6c:      /* INS */
7221                 case 0x6d:
7222                 case 0x6e:      /* OUTS */
7223                 case 0x6f:
7224                         return true;
7225                 }
7226                 break;
7227         case 2:
7228                 switch (ctxt->b) {
7229                 case 0x33:      /* RDPMC */
7230                         return true;
7231                 }
7232                 break;
7233         }
7234
7235         return false;
7236 }
7237
7238 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7239                             int emulation_type, void *insn, int insn_len)
7240 {
7241         int r;
7242         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7243         bool writeback = true;
7244         bool write_fault_to_spt;
7245
7246         if (unlikely(!kvm_x86_ops.can_emulate_instruction(vcpu, insn, insn_len)))
7247                 return 1;
7248
7249         vcpu->arch.l1tf_flush_l1d = true;
7250
7251         /*
7252          * Clear write_fault_to_shadow_pgtable here to ensure it is
7253          * never reused.
7254          */
7255         write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
7256         vcpu->arch.write_fault_to_shadow_pgtable = false;
7257         kvm_clear_exception_queue(vcpu);
7258
7259         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
7260                 init_emulate_ctxt(vcpu);
7261
7262                 /*
7263                  * We will reenter on the same instruction since
7264                  * we do not set complete_userspace_io.  This does not
7265                  * handle watchpoints yet, those would be handled in
7266                  * the emulate_ops.
7267                  */
7268                 if (!(emulation_type & EMULTYPE_SKIP) &&
7269                     kvm_vcpu_check_breakpoint(vcpu, &r))
7270                         return r;
7271
7272                 ctxt->interruptibility = 0;
7273                 ctxt->have_exception = false;
7274                 ctxt->exception.vector = -1;
7275                 ctxt->perm_ok = false;
7276
7277                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
7278
7279                 r = x86_decode_insn(ctxt, insn, insn_len);
7280
7281                 trace_kvm_emulate_insn_start(vcpu);
7282                 ++vcpu->stat.insn_emulation;
7283                 if (r != EMULATION_OK)  {
7284                         if ((emulation_type & EMULTYPE_TRAP_UD) ||
7285                             (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
7286                                 kvm_queue_exception(vcpu, UD_VECTOR);
7287                                 return 1;
7288                         }
7289                         if (reexecute_instruction(vcpu, cr2_or_gpa,
7290                                                   write_fault_to_spt,
7291                                                   emulation_type))
7292                                 return 1;
7293                         if (ctxt->have_exception) {
7294                                 /*
7295                                  * #UD should result in just EMULATION_FAILED, and trap-like
7296                                  * exception should not be encountered during decode.
7297                                  */
7298                                 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
7299                                              exception_type(ctxt->exception.vector) == EXCPT_TRAP);
7300                                 inject_emulated_exception(vcpu);
7301                                 return 1;
7302                         }
7303                         return handle_emulation_failure(vcpu, emulation_type);
7304                 }
7305         }
7306
7307         if ((emulation_type & EMULTYPE_VMWARE_GP) &&
7308             !is_vmware_backdoor_opcode(ctxt)) {
7309                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7310                 return 1;
7311         }
7312
7313         /*
7314          * Note, EMULTYPE_SKIP is intended for use *only* by vendor callbacks
7315          * for kvm_skip_emulated_instruction().  The caller is responsible for
7316          * updating interruptibility state and injecting single-step #DBs.
7317          */
7318         if (emulation_type & EMULTYPE_SKIP) {
7319                 kvm_rip_write(vcpu, ctxt->_eip);
7320                 if (ctxt->eflags & X86_EFLAGS_RF)
7321                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
7322                 return 1;
7323         }
7324
7325         if (retry_instruction(ctxt, cr2_or_gpa, emulation_type))
7326                 return 1;
7327
7328         /* this is needed for vmware backdoor interface to work since it
7329            changes registers values  during IO operation */
7330         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
7331                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7332                 emulator_invalidate_register_cache(ctxt);
7333         }
7334
7335 restart:
7336         if (emulation_type & EMULTYPE_PF) {
7337                 /* Save the faulting GPA (cr2) in the address field */
7338                 ctxt->exception.address = cr2_or_gpa;
7339
7340                 /* With shadow page tables, cr2 contains a GVA or nGPA. */
7341                 if (vcpu->arch.mmu->direct_map) {
7342                         ctxt->gpa_available = true;
7343                         ctxt->gpa_val = cr2_or_gpa;
7344                 }
7345         } else {
7346                 /* Sanitize the address out of an abundance of paranoia. */
7347                 ctxt->exception.address = 0;
7348         }
7349
7350         r = x86_emulate_insn(ctxt);
7351
7352         if (r == EMULATION_INTERCEPTED)
7353                 return 1;
7354
7355         if (r == EMULATION_FAILED) {
7356                 if (reexecute_instruction(vcpu, cr2_or_gpa, write_fault_to_spt,
7357                                         emulation_type))
7358                         return 1;
7359
7360                 return handle_emulation_failure(vcpu, emulation_type);
7361         }
7362
7363         if (ctxt->have_exception) {
7364                 r = 1;
7365                 if (inject_emulated_exception(vcpu))
7366                         return r;
7367         } else if (vcpu->arch.pio.count) {
7368                 if (!vcpu->arch.pio.in) {
7369                         /* FIXME: return into emulator if single-stepping.  */
7370                         vcpu->arch.pio.count = 0;
7371                 } else {
7372                         writeback = false;
7373                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
7374                 }
7375                 r = 0;
7376         } else if (vcpu->mmio_needed) {
7377                 ++vcpu->stat.mmio_exits;
7378
7379                 if (!vcpu->mmio_is_write)
7380                         writeback = false;
7381                 r = 0;
7382                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7383         } else if (r == EMULATION_RESTART)
7384                 goto restart;
7385         else
7386                 r = 1;
7387
7388         if (writeback) {
7389                 unsigned long rflags = kvm_x86_ops.get_rflags(vcpu);
7390                 toggle_interruptibility(vcpu, ctxt->interruptibility);
7391                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7392                 if (!ctxt->have_exception ||
7393                     exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
7394                         kvm_rip_write(vcpu, ctxt->eip);
7395                         if (r && (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
7396                                 r = kvm_vcpu_do_singlestep(vcpu);
7397                         if (kvm_x86_ops.update_emulated_instruction)
7398                                 kvm_x86_ops.update_emulated_instruction(vcpu);
7399                         __kvm_set_rflags(vcpu, ctxt->eflags);
7400                 }
7401
7402                 /*
7403                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
7404                  * do nothing, and it will be requested again as soon as
7405                  * the shadow expires.  But we still need to check here,
7406                  * because POPF has no interrupt shadow.
7407                  */
7408                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
7409                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7410         } else
7411                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
7412
7413         return r;
7414 }
7415
7416 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
7417 {
7418         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
7419 }
7420 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
7421
7422 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
7423                                         void *insn, int insn_len)
7424 {
7425         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
7426 }
7427 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
7428
7429 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
7430 {
7431         vcpu->arch.pio.count = 0;
7432         return 1;
7433 }
7434
7435 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
7436 {
7437         vcpu->arch.pio.count = 0;
7438
7439         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
7440                 return 1;
7441
7442         return kvm_skip_emulated_instruction(vcpu);
7443 }
7444
7445 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
7446                             unsigned short port)
7447 {
7448         unsigned long val = kvm_rax_read(vcpu);
7449         int ret = emulator_pio_out(vcpu, size, port, &val, 1);
7450
7451         if (ret)
7452                 return ret;
7453
7454         /*
7455          * Workaround userspace that relies on old KVM behavior of %rip being
7456          * incremented prior to exiting to userspace to handle "OUT 0x7e".
7457          */
7458         if (port == 0x7e &&
7459             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
7460                 vcpu->arch.complete_userspace_io =
7461                         complete_fast_pio_out_port_0x7e;
7462                 kvm_skip_emulated_instruction(vcpu);
7463         } else {
7464                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
7465                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
7466         }
7467         return 0;
7468 }
7469
7470 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
7471 {
7472         unsigned long val;
7473
7474         /* We should only ever be called with arch.pio.count equal to 1 */
7475         BUG_ON(vcpu->arch.pio.count != 1);
7476
7477         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
7478                 vcpu->arch.pio.count = 0;
7479                 return 1;
7480         }
7481
7482         /* For size less than 4 we merge, else we zero extend */
7483         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
7484
7485         /*
7486          * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
7487          * the copy and tracing
7488          */
7489         emulator_pio_in(vcpu, vcpu->arch.pio.size, vcpu->arch.pio.port, &val, 1);
7490         kvm_rax_write(vcpu, val);
7491
7492         return kvm_skip_emulated_instruction(vcpu);
7493 }
7494
7495 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
7496                            unsigned short port)
7497 {
7498         unsigned long val;
7499         int ret;
7500
7501         /* For size less than 4 we merge, else we zero extend */
7502         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
7503
7504         ret = emulator_pio_in(vcpu, size, port, &val, 1);
7505         if (ret) {
7506                 kvm_rax_write(vcpu, val);
7507                 return ret;
7508         }
7509
7510         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
7511         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
7512
7513         return 0;
7514 }
7515
7516 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
7517 {
7518         int ret;
7519
7520         if (in)
7521                 ret = kvm_fast_pio_in(vcpu, size, port);
7522         else
7523                 ret = kvm_fast_pio_out(vcpu, size, port);
7524         return ret && kvm_skip_emulated_instruction(vcpu);
7525 }
7526 EXPORT_SYMBOL_GPL(kvm_fast_pio);
7527
7528 static int kvmclock_cpu_down_prep(unsigned int cpu)
7529 {
7530         __this_cpu_write(cpu_tsc_khz, 0);
7531         return 0;
7532 }
7533
7534 static void tsc_khz_changed(void *data)
7535 {
7536         struct cpufreq_freqs *freq = data;
7537         unsigned long khz = 0;
7538
7539         if (data)
7540                 khz = freq->new;
7541         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
7542                 khz = cpufreq_quick_get(raw_smp_processor_id());
7543         if (!khz)
7544                 khz = tsc_khz;
7545         __this_cpu_write(cpu_tsc_khz, khz);
7546 }
7547
7548 #ifdef CONFIG_X86_64
7549 static void kvm_hyperv_tsc_notifier(void)
7550 {
7551         struct kvm *kvm;
7552         struct kvm_vcpu *vcpu;
7553         int cpu;
7554
7555         mutex_lock(&kvm_lock);
7556         list_for_each_entry(kvm, &vm_list, vm_list)
7557                 kvm_make_mclock_inprogress_request(kvm);
7558
7559         hyperv_stop_tsc_emulation();
7560
7561         /* TSC frequency always matches when on Hyper-V */
7562         for_each_present_cpu(cpu)
7563                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
7564         kvm_max_guest_tsc_khz = tsc_khz;
7565
7566         list_for_each_entry(kvm, &vm_list, vm_list) {
7567                 struct kvm_arch *ka = &kvm->arch;
7568
7569                 spin_lock(&ka->pvclock_gtod_sync_lock);
7570
7571                 pvclock_update_vm_gtod_copy(kvm);
7572
7573                 kvm_for_each_vcpu(cpu, vcpu, kvm)
7574                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7575
7576                 kvm_for_each_vcpu(cpu, vcpu, kvm)
7577                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
7578
7579                 spin_unlock(&ka->pvclock_gtod_sync_lock);
7580         }
7581         mutex_unlock(&kvm_lock);
7582 }
7583 #endif
7584
7585 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
7586 {
7587         struct kvm *kvm;
7588         struct kvm_vcpu *vcpu;
7589         int i, send_ipi = 0;
7590
7591         /*
7592          * We allow guests to temporarily run on slowing clocks,
7593          * provided we notify them after, or to run on accelerating
7594          * clocks, provided we notify them before.  Thus time never
7595          * goes backwards.
7596          *
7597          * However, we have a problem.  We can't atomically update
7598          * the frequency of a given CPU from this function; it is
7599          * merely a notifier, which can be called from any CPU.
7600          * Changing the TSC frequency at arbitrary points in time
7601          * requires a recomputation of local variables related to
7602          * the TSC for each VCPU.  We must flag these local variables
7603          * to be updated and be sure the update takes place with the
7604          * new frequency before any guests proceed.
7605          *
7606          * Unfortunately, the combination of hotplug CPU and frequency
7607          * change creates an intractable locking scenario; the order
7608          * of when these callouts happen is undefined with respect to
7609          * CPU hotplug, and they can race with each other.  As such,
7610          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
7611          * undefined; you can actually have a CPU frequency change take
7612          * place in between the computation of X and the setting of the
7613          * variable.  To protect against this problem, all updates of
7614          * the per_cpu tsc_khz variable are done in an interrupt
7615          * protected IPI, and all callers wishing to update the value
7616          * must wait for a synchronous IPI to complete (which is trivial
7617          * if the caller is on the CPU already).  This establishes the
7618          * necessary total order on variable updates.
7619          *
7620          * Note that because a guest time update may take place
7621          * anytime after the setting of the VCPU's request bit, the
7622          * correct TSC value must be set before the request.  However,
7623          * to ensure the update actually makes it to any guest which
7624          * starts running in hardware virtualization between the set
7625          * and the acquisition of the spinlock, we must also ping the
7626          * CPU after setting the request bit.
7627          *
7628          */
7629
7630         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
7631
7632         mutex_lock(&kvm_lock);
7633         list_for_each_entry(kvm, &vm_list, vm_list) {
7634                 kvm_for_each_vcpu(i, vcpu, kvm) {
7635                         if (vcpu->cpu != cpu)
7636                                 continue;
7637                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7638                         if (vcpu->cpu != raw_smp_processor_id())
7639                                 send_ipi = 1;
7640                 }
7641         }
7642         mutex_unlock(&kvm_lock);
7643
7644         if (freq->old < freq->new && send_ipi) {
7645                 /*
7646                  * We upscale the frequency.  Must make the guest
7647                  * doesn't see old kvmclock values while running with
7648                  * the new frequency, otherwise we risk the guest sees
7649                  * time go backwards.
7650                  *
7651                  * In case we update the frequency for another cpu
7652                  * (which might be in guest context) send an interrupt
7653                  * to kick the cpu out of guest context.  Next time
7654                  * guest context is entered kvmclock will be updated,
7655                  * so the guest will not see stale values.
7656                  */
7657                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
7658         }
7659 }
7660
7661 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
7662                                      void *data)
7663 {
7664         struct cpufreq_freqs *freq = data;
7665         int cpu;
7666
7667         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
7668                 return 0;
7669         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
7670                 return 0;
7671
7672         for_each_cpu(cpu, freq->policy->cpus)
7673                 __kvmclock_cpufreq_notifier(freq, cpu);
7674
7675         return 0;
7676 }
7677
7678 static struct notifier_block kvmclock_cpufreq_notifier_block = {
7679         .notifier_call  = kvmclock_cpufreq_notifier
7680 };
7681
7682 static int kvmclock_cpu_online(unsigned int cpu)
7683 {
7684         tsc_khz_changed(NULL);
7685         return 0;
7686 }
7687
7688 static void kvm_timer_init(void)
7689 {
7690         max_tsc_khz = tsc_khz;
7691
7692         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
7693 #ifdef CONFIG_CPU_FREQ
7694                 struct cpufreq_policy *policy;
7695                 int cpu;
7696
7697                 cpu = get_cpu();
7698                 policy = cpufreq_cpu_get(cpu);
7699                 if (policy) {
7700                         if (policy->cpuinfo.max_freq)
7701                                 max_tsc_khz = policy->cpuinfo.max_freq;
7702                         cpufreq_cpu_put(policy);
7703                 }
7704                 put_cpu();
7705 #endif
7706                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
7707                                           CPUFREQ_TRANSITION_NOTIFIER);
7708         }
7709
7710         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
7711                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
7712 }
7713
7714 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
7715 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
7716
7717 int kvm_is_in_guest(void)
7718 {
7719         return __this_cpu_read(current_vcpu) != NULL;
7720 }
7721
7722 static int kvm_is_user_mode(void)
7723 {
7724         int user_mode = 3;
7725
7726         if (__this_cpu_read(current_vcpu))
7727                 user_mode = kvm_x86_ops.get_cpl(__this_cpu_read(current_vcpu));
7728
7729         return user_mode != 0;
7730 }
7731
7732 static unsigned long kvm_get_guest_ip(void)
7733 {
7734         unsigned long ip = 0;
7735
7736         if (__this_cpu_read(current_vcpu))
7737                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
7738
7739         return ip;
7740 }
7741
7742 static void kvm_handle_intel_pt_intr(void)
7743 {
7744         struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
7745
7746         kvm_make_request(KVM_REQ_PMI, vcpu);
7747         __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
7748                         (unsigned long *)&vcpu->arch.pmu.global_status);
7749 }
7750
7751 static struct perf_guest_info_callbacks kvm_guest_cbs = {
7752         .is_in_guest            = kvm_is_in_guest,
7753         .is_user_mode           = kvm_is_user_mode,
7754         .get_guest_ip           = kvm_get_guest_ip,
7755         .handle_intel_pt_intr   = kvm_handle_intel_pt_intr,
7756 };
7757
7758 #ifdef CONFIG_X86_64
7759 static void pvclock_gtod_update_fn(struct work_struct *work)
7760 {
7761         struct kvm *kvm;
7762
7763         struct kvm_vcpu *vcpu;
7764         int i;
7765
7766         mutex_lock(&kvm_lock);
7767         list_for_each_entry(kvm, &vm_list, vm_list)
7768                 kvm_for_each_vcpu(i, vcpu, kvm)
7769                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7770         atomic_set(&kvm_guest_has_master_clock, 0);
7771         mutex_unlock(&kvm_lock);
7772 }
7773
7774 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
7775
7776 /*
7777  * Notification about pvclock gtod data update.
7778  */
7779 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
7780                                void *priv)
7781 {
7782         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
7783         struct timekeeper *tk = priv;
7784
7785         update_pvclock_gtod(tk);
7786
7787         /* disable master clock if host does not trust, or does not
7788          * use, TSC based clocksource.
7789          */
7790         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
7791             atomic_read(&kvm_guest_has_master_clock) != 0)
7792                 queue_work(system_long_wq, &pvclock_gtod_work);
7793
7794         return 0;
7795 }
7796
7797 static struct notifier_block pvclock_gtod_notifier = {
7798         .notifier_call = pvclock_gtod_notify,
7799 };
7800 #endif
7801
7802 int kvm_arch_init(void *opaque)
7803 {
7804         struct kvm_x86_init_ops *ops = opaque;
7805         int r;
7806
7807         if (kvm_x86_ops.hardware_enable) {
7808                 printk(KERN_ERR "kvm: already loaded the other module\n");
7809                 r = -EEXIST;
7810                 goto out;
7811         }
7812
7813         if (!ops->cpu_has_kvm_support()) {
7814                 pr_err_ratelimited("kvm: no hardware support\n");
7815                 r = -EOPNOTSUPP;
7816                 goto out;
7817         }
7818         if (ops->disabled_by_bios()) {
7819                 pr_err_ratelimited("kvm: disabled by bios\n");
7820                 r = -EOPNOTSUPP;
7821                 goto out;
7822         }
7823
7824         /*
7825          * KVM explicitly assumes that the guest has an FPU and
7826          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
7827          * vCPU's FPU state as a fxregs_state struct.
7828          */
7829         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
7830                 printk(KERN_ERR "kvm: inadequate fpu\n");
7831                 r = -EOPNOTSUPP;
7832                 goto out;
7833         }
7834
7835         r = -ENOMEM;
7836         x86_fpu_cache = kmem_cache_create("x86_fpu", sizeof(struct fpu),
7837                                           __alignof__(struct fpu), SLAB_ACCOUNT,
7838                                           NULL);
7839         if (!x86_fpu_cache) {
7840                 printk(KERN_ERR "kvm: failed to allocate cache for x86 fpu\n");
7841                 goto out;
7842         }
7843
7844         x86_emulator_cache = kvm_alloc_emulator_cache();
7845         if (!x86_emulator_cache) {
7846                 pr_err("kvm: failed to allocate cache for x86 emulator\n");
7847                 goto out_free_x86_fpu_cache;
7848         }
7849
7850         user_return_msrs = alloc_percpu(struct kvm_user_return_msrs);
7851         if (!user_return_msrs) {
7852                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_user_return_msrs\n");
7853                 goto out_free_x86_emulator_cache;
7854         }
7855
7856         r = kvm_mmu_module_init();
7857         if (r)
7858                 goto out_free_percpu;
7859
7860         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
7861                         PT_DIRTY_MASK, PT64_NX_MASK, 0,
7862                         PT_PRESENT_MASK, 0, sme_me_mask);
7863         kvm_timer_init();
7864
7865         perf_register_guest_info_callbacks(&kvm_guest_cbs);
7866
7867         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
7868                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
7869                 supported_xcr0 = host_xcr0 & KVM_SUPPORTED_XCR0;
7870         }
7871
7872         kvm_lapic_init();
7873         if (pi_inject_timer == -1)
7874                 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
7875 #ifdef CONFIG_X86_64
7876         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
7877
7878         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
7879                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
7880 #endif
7881
7882         return 0;
7883
7884 out_free_percpu:
7885         free_percpu(user_return_msrs);
7886 out_free_x86_emulator_cache:
7887         kmem_cache_destroy(x86_emulator_cache);
7888 out_free_x86_fpu_cache:
7889         kmem_cache_destroy(x86_fpu_cache);
7890 out:
7891         return r;
7892 }
7893
7894 void kvm_arch_exit(void)
7895 {
7896 #ifdef CONFIG_X86_64
7897         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
7898                 clear_hv_tscchange_cb();
7899 #endif
7900         kvm_lapic_exit();
7901         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
7902
7903         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
7904                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
7905                                             CPUFREQ_TRANSITION_NOTIFIER);
7906         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
7907 #ifdef CONFIG_X86_64
7908         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
7909 #endif
7910         kvm_x86_ops.hardware_enable = NULL;
7911         kvm_mmu_module_exit();
7912         free_percpu(user_return_msrs);
7913         kmem_cache_destroy(x86_fpu_cache);
7914 }
7915
7916 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
7917 {
7918         ++vcpu->stat.halt_exits;
7919         if (lapic_in_kernel(vcpu)) {
7920                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
7921                 return 1;
7922         } else {
7923                 vcpu->run->exit_reason = KVM_EXIT_HLT;
7924                 return 0;
7925         }
7926 }
7927 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
7928
7929 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
7930 {
7931         int ret = kvm_skip_emulated_instruction(vcpu);
7932         /*
7933          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
7934          * KVM_EXIT_DEBUG here.
7935          */
7936         return kvm_vcpu_halt(vcpu) && ret;
7937 }
7938 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
7939
7940 #ifdef CONFIG_X86_64
7941 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
7942                                 unsigned long clock_type)
7943 {
7944         struct kvm_clock_pairing clock_pairing;
7945         struct timespec64 ts;
7946         u64 cycle;
7947         int ret;
7948
7949         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
7950                 return -KVM_EOPNOTSUPP;
7951
7952         if (kvm_get_walltime_and_clockread(&ts, &cycle) == false)
7953                 return -KVM_EOPNOTSUPP;
7954
7955         clock_pairing.sec = ts.tv_sec;
7956         clock_pairing.nsec = ts.tv_nsec;
7957         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
7958         clock_pairing.flags = 0;
7959         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
7960
7961         ret = 0;
7962         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
7963                             sizeof(struct kvm_clock_pairing)))
7964                 ret = -KVM_EFAULT;
7965
7966         return ret;
7967 }
7968 #endif
7969
7970 /*
7971  * kvm_pv_kick_cpu_op:  Kick a vcpu.
7972  *
7973  * @apicid - apicid of vcpu to be kicked.
7974  */
7975 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
7976 {
7977         struct kvm_lapic_irq lapic_irq;
7978
7979         lapic_irq.shorthand = APIC_DEST_NOSHORT;
7980         lapic_irq.dest_mode = APIC_DEST_PHYSICAL;
7981         lapic_irq.level = 0;
7982         lapic_irq.dest_id = apicid;
7983         lapic_irq.msi_redir_hint = false;
7984
7985         lapic_irq.delivery_mode = APIC_DM_REMRD;
7986         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
7987 }
7988
7989 bool kvm_apicv_activated(struct kvm *kvm)
7990 {
7991         return (READ_ONCE(kvm->arch.apicv_inhibit_reasons) == 0);
7992 }
7993 EXPORT_SYMBOL_GPL(kvm_apicv_activated);
7994
7995 void kvm_apicv_init(struct kvm *kvm, bool enable)
7996 {
7997         if (enable)
7998                 clear_bit(APICV_INHIBIT_REASON_DISABLE,
7999                           &kvm->arch.apicv_inhibit_reasons);
8000         else
8001                 set_bit(APICV_INHIBIT_REASON_DISABLE,
8002                         &kvm->arch.apicv_inhibit_reasons);
8003 }
8004 EXPORT_SYMBOL_GPL(kvm_apicv_init);
8005
8006 static void kvm_sched_yield(struct kvm *kvm, unsigned long dest_id)
8007 {
8008         struct kvm_vcpu *target = NULL;
8009         struct kvm_apic_map *map;
8010
8011         rcu_read_lock();
8012         map = rcu_dereference(kvm->arch.apic_map);
8013
8014         if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
8015                 target = map->phys_map[dest_id]->vcpu;
8016
8017         rcu_read_unlock();
8018
8019         if (target && READ_ONCE(target->ready))
8020                 kvm_vcpu_yield_to(target);
8021 }
8022
8023 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
8024 {
8025         unsigned long nr, a0, a1, a2, a3, ret;
8026         int op_64_bit;
8027
8028         if (kvm_hv_hypercall_enabled(vcpu->kvm))
8029                 return kvm_hv_hypercall(vcpu);
8030
8031         nr = kvm_rax_read(vcpu);
8032         a0 = kvm_rbx_read(vcpu);
8033         a1 = kvm_rcx_read(vcpu);
8034         a2 = kvm_rdx_read(vcpu);
8035         a3 = kvm_rsi_read(vcpu);
8036
8037         trace_kvm_hypercall(nr, a0, a1, a2, a3);
8038
8039         op_64_bit = is_64_bit_mode(vcpu);
8040         if (!op_64_bit) {
8041                 nr &= 0xFFFFFFFF;
8042                 a0 &= 0xFFFFFFFF;
8043                 a1 &= 0xFFFFFFFF;
8044                 a2 &= 0xFFFFFFFF;
8045                 a3 &= 0xFFFFFFFF;
8046         }
8047
8048         if (kvm_x86_ops.get_cpl(vcpu) != 0) {
8049                 ret = -KVM_EPERM;
8050                 goto out;
8051         }
8052
8053         ret = -KVM_ENOSYS;
8054
8055         switch (nr) {
8056         case KVM_HC_VAPIC_POLL_IRQ:
8057                 ret = 0;
8058                 break;
8059         case KVM_HC_KICK_CPU:
8060                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_UNHALT))
8061                         break;
8062
8063                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
8064                 kvm_sched_yield(vcpu->kvm, a1);
8065                 ret = 0;
8066                 break;
8067 #ifdef CONFIG_X86_64
8068         case KVM_HC_CLOCK_PAIRING:
8069                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
8070                 break;
8071 #endif
8072         case KVM_HC_SEND_IPI:
8073                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SEND_IPI))
8074                         break;
8075
8076                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
8077                 break;
8078         case KVM_HC_SCHED_YIELD:
8079                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SCHED_YIELD))
8080                         break;
8081
8082                 kvm_sched_yield(vcpu->kvm, a0);
8083                 ret = 0;
8084                 break;
8085         default:
8086                 ret = -KVM_ENOSYS;
8087                 break;
8088         }
8089 out:
8090         if (!op_64_bit)
8091                 ret = (u32)ret;
8092         kvm_rax_write(vcpu, ret);
8093
8094         ++vcpu->stat.hypercalls;
8095         return kvm_skip_emulated_instruction(vcpu);
8096 }
8097 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
8098
8099 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
8100 {
8101         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
8102         char instruction[3];
8103         unsigned long rip = kvm_rip_read(vcpu);
8104
8105         kvm_x86_ops.patch_hypercall(vcpu, instruction);
8106
8107         return emulator_write_emulated(ctxt, rip, instruction, 3,
8108                 &ctxt->exception);
8109 }
8110
8111 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
8112 {
8113         return vcpu->run->request_interrupt_window &&
8114                 likely(!pic_in_kernel(vcpu->kvm));
8115 }
8116
8117 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
8118 {
8119         struct kvm_run *kvm_run = vcpu->run;
8120
8121         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
8122         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
8123         kvm_run->cr8 = kvm_get_cr8(vcpu);
8124         kvm_run->apic_base = kvm_get_apic_base(vcpu);
8125         kvm_run->ready_for_interrupt_injection =
8126                 pic_in_kernel(vcpu->kvm) ||
8127                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
8128 }
8129
8130 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
8131 {
8132         int max_irr, tpr;
8133
8134         if (!kvm_x86_ops.update_cr8_intercept)
8135                 return;
8136
8137         if (!lapic_in_kernel(vcpu))
8138                 return;
8139
8140         if (vcpu->arch.apicv_active)
8141                 return;
8142
8143         if (!vcpu->arch.apic->vapic_addr)
8144                 max_irr = kvm_lapic_find_highest_irr(vcpu);
8145         else
8146                 max_irr = -1;
8147
8148         if (max_irr != -1)
8149                 max_irr >>= 4;
8150
8151         tpr = kvm_lapic_get_cr8(vcpu);
8152
8153         kvm_x86_ops.update_cr8_intercept(vcpu, tpr, max_irr);
8154 }
8155
8156 static void inject_pending_event(struct kvm_vcpu *vcpu, bool *req_immediate_exit)
8157 {
8158         int r;
8159         bool can_inject = true;
8160
8161         /* try to reinject previous events if any */
8162
8163         if (vcpu->arch.exception.injected) {
8164                 kvm_x86_ops.queue_exception(vcpu);
8165                 can_inject = false;
8166         }
8167         /*
8168          * Do not inject an NMI or interrupt if there is a pending
8169          * exception.  Exceptions and interrupts are recognized at
8170          * instruction boundaries, i.e. the start of an instruction.
8171          * Trap-like exceptions, e.g. #DB, have higher priority than
8172          * NMIs and interrupts, i.e. traps are recognized before an
8173          * NMI/interrupt that's pending on the same instruction.
8174          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
8175          * priority, but are only generated (pended) during instruction
8176          * execution, i.e. a pending fault-like exception means the
8177          * fault occurred on the *previous* instruction and must be
8178          * serviced prior to recognizing any new events in order to
8179          * fully complete the previous instruction.
8180          */
8181         else if (!vcpu->arch.exception.pending) {
8182                 if (vcpu->arch.nmi_injected) {
8183                         kvm_x86_ops.set_nmi(vcpu);
8184                         can_inject = false;
8185                 } else if (vcpu->arch.interrupt.injected) {
8186                         kvm_x86_ops.set_irq(vcpu);
8187                         can_inject = false;
8188                 }
8189         }
8190
8191         WARN_ON_ONCE(vcpu->arch.exception.injected &&
8192                      vcpu->arch.exception.pending);
8193
8194         /*
8195          * Call check_nested_events() even if we reinjected a previous event
8196          * in order for caller to determine if it should require immediate-exit
8197          * from L2 to L1 due to pending L1 events which require exit
8198          * from L2 to L1.
8199          */
8200         if (is_guest_mode(vcpu)) {
8201                 r = kvm_x86_ops.nested_ops->check_events(vcpu);
8202                 if (r < 0)
8203                         goto busy;
8204         }
8205
8206         /* try to inject new event if pending */
8207         if (vcpu->arch.exception.pending) {
8208                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
8209                                         vcpu->arch.exception.has_error_code,
8210                                         vcpu->arch.exception.error_code);
8211
8212                 vcpu->arch.exception.pending = false;
8213                 vcpu->arch.exception.injected = true;
8214
8215                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
8216                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
8217                                              X86_EFLAGS_RF);
8218
8219                 if (vcpu->arch.exception.nr == DB_VECTOR) {
8220                         kvm_deliver_exception_payload(vcpu);
8221                         if (vcpu->arch.dr7 & DR7_GD) {
8222                                 vcpu->arch.dr7 &= ~DR7_GD;
8223                                 kvm_update_dr7(vcpu);
8224                         }
8225                 }
8226
8227                 kvm_x86_ops.queue_exception(vcpu);
8228                 can_inject = false;
8229         }
8230
8231         /*
8232          * Finally, inject interrupt events.  If an event cannot be injected
8233          * due to architectural conditions (e.g. IF=0) a window-open exit
8234          * will re-request KVM_REQ_EVENT.  Sometimes however an event is pending
8235          * and can architecturally be injected, but we cannot do it right now:
8236          * an interrupt could have arrived just now and we have to inject it
8237          * as a vmexit, or there could already an event in the queue, which is
8238          * indicated by can_inject.  In that case we request an immediate exit
8239          * in order to make progress and get back here for another iteration.
8240          * The kvm_x86_ops hooks communicate this by returning -EBUSY.
8241          */
8242         if (vcpu->arch.smi_pending) {
8243                 r = can_inject ? kvm_x86_ops.smi_allowed(vcpu, true) : -EBUSY;
8244                 if (r < 0)
8245                         goto busy;
8246                 if (r) {
8247                         vcpu->arch.smi_pending = false;
8248                         ++vcpu->arch.smi_count;
8249                         enter_smm(vcpu);
8250                         can_inject = false;
8251                 } else
8252                         kvm_x86_ops.enable_smi_window(vcpu);
8253         }
8254
8255         if (vcpu->arch.nmi_pending) {
8256                 r = can_inject ? kvm_x86_ops.nmi_allowed(vcpu, true) : -EBUSY;
8257                 if (r < 0)
8258                         goto busy;
8259                 if (r) {
8260                         --vcpu->arch.nmi_pending;
8261                         vcpu->arch.nmi_injected = true;
8262                         kvm_x86_ops.set_nmi(vcpu);
8263                         can_inject = false;
8264                         WARN_ON(kvm_x86_ops.nmi_allowed(vcpu, true) < 0);
8265                 }
8266                 if (vcpu->arch.nmi_pending)
8267                         kvm_x86_ops.enable_nmi_window(vcpu);
8268         }
8269
8270         if (kvm_cpu_has_injectable_intr(vcpu)) {
8271                 r = can_inject ? kvm_x86_ops.interrupt_allowed(vcpu, true) : -EBUSY;
8272                 if (r < 0)
8273                         goto busy;
8274                 if (r) {
8275                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu), false);
8276                         kvm_x86_ops.set_irq(vcpu);
8277                         WARN_ON(kvm_x86_ops.interrupt_allowed(vcpu, true) < 0);
8278                 }
8279                 if (kvm_cpu_has_injectable_intr(vcpu))
8280                         kvm_x86_ops.enable_irq_window(vcpu);
8281         }
8282
8283         if (is_guest_mode(vcpu) &&
8284             kvm_x86_ops.nested_ops->hv_timer_pending &&
8285             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
8286                 *req_immediate_exit = true;
8287
8288         WARN_ON(vcpu->arch.exception.pending);
8289         return;
8290
8291 busy:
8292         *req_immediate_exit = true;
8293         return;
8294 }
8295
8296 static void process_nmi(struct kvm_vcpu *vcpu)
8297 {
8298         unsigned limit = 2;
8299
8300         /*
8301          * x86 is limited to one NMI running, and one NMI pending after it.
8302          * If an NMI is already in progress, limit further NMIs to just one.
8303          * Otherwise, allow two (and we'll inject the first one immediately).
8304          */
8305         if (kvm_x86_ops.get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
8306                 limit = 1;
8307
8308         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
8309         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
8310         kvm_make_request(KVM_REQ_EVENT, vcpu);
8311 }
8312
8313 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
8314 {
8315         u32 flags = 0;
8316         flags |= seg->g       << 23;
8317         flags |= seg->db      << 22;
8318         flags |= seg->l       << 21;
8319         flags |= seg->avl     << 20;
8320         flags |= seg->present << 15;
8321         flags |= seg->dpl     << 13;
8322         flags |= seg->s       << 12;
8323         flags |= seg->type    << 8;
8324         return flags;
8325 }
8326
8327 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
8328 {
8329         struct kvm_segment seg;
8330         int offset;
8331
8332         kvm_get_segment(vcpu, &seg, n);
8333         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
8334
8335         if (n < 3)
8336                 offset = 0x7f84 + n * 12;
8337         else
8338                 offset = 0x7f2c + (n - 3) * 12;
8339
8340         put_smstate(u32, buf, offset + 8, seg.base);
8341         put_smstate(u32, buf, offset + 4, seg.limit);
8342         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
8343 }
8344
8345 #ifdef CONFIG_X86_64
8346 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
8347 {
8348         struct kvm_segment seg;
8349         int offset;
8350         u16 flags;
8351
8352         kvm_get_segment(vcpu, &seg, n);
8353         offset = 0x7e00 + n * 16;
8354
8355         flags = enter_smm_get_segment_flags(&seg) >> 8;
8356         put_smstate(u16, buf, offset, seg.selector);
8357         put_smstate(u16, buf, offset + 2, flags);
8358         put_smstate(u32, buf, offset + 4, seg.limit);
8359         put_smstate(u64, buf, offset + 8, seg.base);
8360 }
8361 #endif
8362
8363 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
8364 {
8365         struct desc_ptr dt;
8366         struct kvm_segment seg;
8367         unsigned long val;
8368         int i;
8369
8370         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
8371         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
8372         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
8373         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
8374
8375         for (i = 0; i < 8; i++)
8376                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
8377
8378         kvm_get_dr(vcpu, 6, &val);
8379         put_smstate(u32, buf, 0x7fcc, (u32)val);
8380         kvm_get_dr(vcpu, 7, &val);
8381         put_smstate(u32, buf, 0x7fc8, (u32)val);
8382
8383         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
8384         put_smstate(u32, buf, 0x7fc4, seg.selector);
8385         put_smstate(u32, buf, 0x7f64, seg.base);
8386         put_smstate(u32, buf, 0x7f60, seg.limit);
8387         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
8388
8389         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
8390         put_smstate(u32, buf, 0x7fc0, seg.selector);
8391         put_smstate(u32, buf, 0x7f80, seg.base);
8392         put_smstate(u32, buf, 0x7f7c, seg.limit);
8393         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
8394
8395         kvm_x86_ops.get_gdt(vcpu, &dt);
8396         put_smstate(u32, buf, 0x7f74, dt.address);
8397         put_smstate(u32, buf, 0x7f70, dt.size);
8398
8399         kvm_x86_ops.get_idt(vcpu, &dt);
8400         put_smstate(u32, buf, 0x7f58, dt.address);
8401         put_smstate(u32, buf, 0x7f54, dt.size);
8402
8403         for (i = 0; i < 6; i++)
8404                 enter_smm_save_seg_32(vcpu, buf, i);
8405
8406         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
8407
8408         /* revision id */
8409         put_smstate(u32, buf, 0x7efc, 0x00020000);
8410         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
8411 }
8412
8413 #ifdef CONFIG_X86_64
8414 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
8415 {
8416         struct desc_ptr dt;
8417         struct kvm_segment seg;
8418         unsigned long val;
8419         int i;
8420
8421         for (i = 0; i < 16; i++)
8422                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
8423
8424         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
8425         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
8426
8427         kvm_get_dr(vcpu, 6, &val);
8428         put_smstate(u64, buf, 0x7f68, val);
8429         kvm_get_dr(vcpu, 7, &val);
8430         put_smstate(u64, buf, 0x7f60, val);
8431
8432         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
8433         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
8434         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
8435
8436         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
8437
8438         /* revision id */
8439         put_smstate(u32, buf, 0x7efc, 0x00020064);
8440
8441         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
8442
8443         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
8444         put_smstate(u16, buf, 0x7e90, seg.selector);
8445         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
8446         put_smstate(u32, buf, 0x7e94, seg.limit);
8447         put_smstate(u64, buf, 0x7e98, seg.base);
8448
8449         kvm_x86_ops.get_idt(vcpu, &dt);
8450         put_smstate(u32, buf, 0x7e84, dt.size);
8451         put_smstate(u64, buf, 0x7e88, dt.address);
8452
8453         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
8454         put_smstate(u16, buf, 0x7e70, seg.selector);
8455         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
8456         put_smstate(u32, buf, 0x7e74, seg.limit);
8457         put_smstate(u64, buf, 0x7e78, seg.base);
8458
8459         kvm_x86_ops.get_gdt(vcpu, &dt);
8460         put_smstate(u32, buf, 0x7e64, dt.size);
8461         put_smstate(u64, buf, 0x7e68, dt.address);
8462
8463         for (i = 0; i < 6; i++)
8464                 enter_smm_save_seg_64(vcpu, buf, i);
8465 }
8466 #endif
8467
8468 static void enter_smm(struct kvm_vcpu *vcpu)
8469 {
8470         struct kvm_segment cs, ds;
8471         struct desc_ptr dt;
8472         char buf[512];
8473         u32 cr0;
8474
8475         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
8476         memset(buf, 0, 512);
8477 #ifdef CONFIG_X86_64
8478         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
8479                 enter_smm_save_state_64(vcpu, buf);
8480         else
8481 #endif
8482                 enter_smm_save_state_32(vcpu, buf);
8483
8484         /*
8485          * Give pre_enter_smm() a chance to make ISA-specific changes to the
8486          * vCPU state (e.g. leave guest mode) after we've saved the state into
8487          * the SMM state-save area.
8488          */
8489         kvm_x86_ops.pre_enter_smm(vcpu, buf);
8490
8491         vcpu->arch.hflags |= HF_SMM_MASK;
8492         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
8493
8494         if (kvm_x86_ops.get_nmi_mask(vcpu))
8495                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
8496         else
8497                 kvm_x86_ops.set_nmi_mask(vcpu, true);
8498
8499         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
8500         kvm_rip_write(vcpu, 0x8000);
8501
8502         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
8503         kvm_x86_ops.set_cr0(vcpu, cr0);
8504         vcpu->arch.cr0 = cr0;
8505
8506         kvm_x86_ops.set_cr4(vcpu, 0);
8507
8508         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
8509         dt.address = dt.size = 0;
8510         kvm_x86_ops.set_idt(vcpu, &dt);
8511
8512         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
8513
8514         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
8515         cs.base = vcpu->arch.smbase;
8516
8517         ds.selector = 0;
8518         ds.base = 0;
8519
8520         cs.limit    = ds.limit = 0xffffffff;
8521         cs.type     = ds.type = 0x3;
8522         cs.dpl      = ds.dpl = 0;
8523         cs.db       = ds.db = 0;
8524         cs.s        = ds.s = 1;
8525         cs.l        = ds.l = 0;
8526         cs.g        = ds.g = 1;
8527         cs.avl      = ds.avl = 0;
8528         cs.present  = ds.present = 1;
8529         cs.unusable = ds.unusable = 0;
8530         cs.padding  = ds.padding = 0;
8531
8532         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
8533         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
8534         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
8535         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
8536         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
8537         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
8538
8539 #ifdef CONFIG_X86_64
8540         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
8541                 kvm_x86_ops.set_efer(vcpu, 0);
8542 #endif
8543
8544         kvm_update_cpuid_runtime(vcpu);
8545         kvm_mmu_reset_context(vcpu);
8546 }
8547
8548 static void process_smi(struct kvm_vcpu *vcpu)
8549 {
8550         vcpu->arch.smi_pending = true;
8551         kvm_make_request(KVM_REQ_EVENT, vcpu);
8552 }
8553
8554 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
8555                                        unsigned long *vcpu_bitmap)
8556 {
8557         cpumask_var_t cpus;
8558
8559         zalloc_cpumask_var(&cpus, GFP_ATOMIC);
8560
8561         kvm_make_vcpus_request_mask(kvm, KVM_REQ_SCAN_IOAPIC,
8562                                     NULL, vcpu_bitmap, cpus);
8563
8564         free_cpumask_var(cpus);
8565 }
8566
8567 void kvm_make_scan_ioapic_request(struct kvm *kvm)
8568 {
8569         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
8570 }
8571
8572 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
8573 {
8574         if (!lapic_in_kernel(vcpu))
8575                 return;
8576
8577         vcpu->arch.apicv_active = kvm_apicv_activated(vcpu->kvm);
8578         kvm_apic_update_apicv(vcpu);
8579         kvm_x86_ops.refresh_apicv_exec_ctrl(vcpu);
8580 }
8581 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv);
8582
8583 /*
8584  * NOTE: Do not hold any lock prior to calling this.
8585  *
8586  * In particular, kvm_request_apicv_update() expects kvm->srcu not to be
8587  * locked, because it calls __x86_set_memory_region() which does
8588  * synchronize_srcu(&kvm->srcu).
8589  */
8590 void kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
8591 {
8592         struct kvm_vcpu *except;
8593         unsigned long old, new, expected;
8594
8595         if (!kvm_x86_ops.check_apicv_inhibit_reasons ||
8596             !kvm_x86_ops.check_apicv_inhibit_reasons(bit))
8597                 return;
8598
8599         old = READ_ONCE(kvm->arch.apicv_inhibit_reasons);
8600         do {
8601                 expected = new = old;
8602                 if (activate)
8603                         __clear_bit(bit, &new);
8604                 else
8605                         __set_bit(bit, &new);
8606                 if (new == old)
8607                         break;
8608                 old = cmpxchg(&kvm->arch.apicv_inhibit_reasons, expected, new);
8609         } while (old != expected);
8610
8611         if (!!old == !!new)
8612                 return;
8613
8614         trace_kvm_apicv_update_request(activate, bit);
8615         if (kvm_x86_ops.pre_update_apicv_exec_ctrl)
8616                 kvm_x86_ops.pre_update_apicv_exec_ctrl(kvm, activate);
8617
8618         /*
8619          * Sending request to update APICV for all other vcpus,
8620          * while update the calling vcpu immediately instead of
8621          * waiting for another #VMEXIT to handle the request.
8622          */
8623         except = kvm_get_running_vcpu();
8624         kvm_make_all_cpus_request_except(kvm, KVM_REQ_APICV_UPDATE,
8625                                          except);
8626         if (except)
8627                 kvm_vcpu_update_apicv(except);
8628 }
8629 EXPORT_SYMBOL_GPL(kvm_request_apicv_update);
8630
8631 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
8632 {
8633         if (!kvm_apic_present(vcpu))
8634                 return;
8635
8636         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
8637
8638         if (irqchip_split(vcpu->kvm))
8639                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
8640         else {
8641                 if (vcpu->arch.apicv_active)
8642                         kvm_x86_ops.sync_pir_to_irr(vcpu);
8643                 if (ioapic_in_kernel(vcpu->kvm))
8644                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
8645         }
8646
8647         if (is_guest_mode(vcpu))
8648                 vcpu->arch.load_eoi_exitmap_pending = true;
8649         else
8650                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
8651 }
8652
8653 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
8654 {
8655         u64 eoi_exit_bitmap[4];
8656
8657         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
8658                 return;
8659
8660         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
8661                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
8662         kvm_x86_ops.load_eoi_exitmap(vcpu, eoi_exit_bitmap);
8663 }
8664
8665 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
8666                                             unsigned long start, unsigned long end)
8667 {
8668         unsigned long apic_address;
8669
8670         /*
8671          * The physical address of apic access page is stored in the VMCS.
8672          * Update it when it becomes invalid.
8673          */
8674         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
8675         if (start <= apic_address && apic_address < end)
8676                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
8677 }
8678
8679 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
8680 {
8681         if (!lapic_in_kernel(vcpu))
8682                 return;
8683
8684         if (!kvm_x86_ops.set_apic_access_page_addr)
8685                 return;
8686
8687         kvm_x86_ops.set_apic_access_page_addr(vcpu);
8688 }
8689
8690 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
8691 {
8692         smp_send_reschedule(vcpu->cpu);
8693 }
8694 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
8695
8696 /*
8697  * Returns 1 to let vcpu_run() continue the guest execution loop without
8698  * exiting to the userspace.  Otherwise, the value will be returned to the
8699  * userspace.
8700  */
8701 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
8702 {
8703         int r;
8704         bool req_int_win =
8705                 dm_request_for_irq_injection(vcpu) &&
8706                 kvm_cpu_accept_dm_intr(vcpu);
8707         fastpath_t exit_fastpath;
8708
8709         bool req_immediate_exit = false;
8710
8711         if (kvm_request_pending(vcpu)) {
8712                 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu)) {
8713                         if (unlikely(!kvm_x86_ops.nested_ops->get_nested_state_pages(vcpu))) {
8714                                 r = 0;
8715                                 goto out;
8716                         }
8717                 }
8718                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
8719                         kvm_mmu_unload(vcpu);
8720                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
8721                         __kvm_migrate_timers(vcpu);
8722                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
8723                         kvm_gen_update_masterclock(vcpu->kvm);
8724                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
8725                         kvm_gen_kvmclock_update(vcpu);
8726                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
8727                         r = kvm_guest_time_update(vcpu);
8728                         if (unlikely(r))
8729                                 goto out;
8730                 }
8731                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
8732                         kvm_mmu_sync_roots(vcpu);
8733                 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD, vcpu))
8734                         kvm_mmu_load_pgd(vcpu);
8735                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) {
8736                         kvm_vcpu_flush_tlb_all(vcpu);
8737
8738                         /* Flushing all ASIDs flushes the current ASID... */
8739                         kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
8740                 }
8741                 if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu))
8742                         kvm_vcpu_flush_tlb_current(vcpu);
8743                 if (kvm_check_request(KVM_REQ_HV_TLB_FLUSH, vcpu))
8744                         kvm_vcpu_flush_tlb_guest(vcpu);
8745
8746                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
8747                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
8748                         r = 0;
8749                         goto out;
8750                 }
8751                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
8752                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
8753                         vcpu->mmio_needed = 0;
8754                         r = 0;
8755                         goto out;
8756                 }
8757                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
8758                         /* Page is swapped out. Do synthetic halt */
8759                         vcpu->arch.apf.halted = true;
8760                         r = 1;
8761                         goto out;
8762                 }
8763                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
8764                         record_steal_time(vcpu);
8765                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
8766                         process_smi(vcpu);
8767                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
8768                         process_nmi(vcpu);
8769                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
8770                         kvm_pmu_handle_event(vcpu);
8771                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
8772                         kvm_pmu_deliver_pmi(vcpu);
8773                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
8774                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
8775                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
8776                                      vcpu->arch.ioapic_handled_vectors)) {
8777                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
8778                                 vcpu->run->eoi.vector =
8779                                                 vcpu->arch.pending_ioapic_eoi;
8780                                 r = 0;
8781                                 goto out;
8782                         }
8783                 }
8784                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
8785                         vcpu_scan_ioapic(vcpu);
8786                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
8787                         vcpu_load_eoi_exitmap(vcpu);
8788                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
8789                         kvm_vcpu_reload_apic_access_page(vcpu);
8790                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
8791                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
8792                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
8793                         r = 0;
8794                         goto out;
8795                 }
8796                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
8797                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
8798                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
8799                         r = 0;
8800                         goto out;
8801                 }
8802                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
8803                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
8804                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
8805                         r = 0;
8806                         goto out;
8807                 }
8808
8809                 /*
8810                  * KVM_REQ_HV_STIMER has to be processed after
8811                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
8812                  * depend on the guest clock being up-to-date
8813                  */
8814                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
8815                         kvm_hv_process_stimers(vcpu);
8816                 if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu))
8817                         kvm_vcpu_update_apicv(vcpu);
8818                 if (kvm_check_request(KVM_REQ_APF_READY, vcpu))
8819                         kvm_check_async_pf_completion(vcpu);
8820                 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED, vcpu))
8821                         kvm_x86_ops.msr_filter_changed(vcpu);
8822         }
8823
8824         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
8825                 ++vcpu->stat.req_event;
8826                 kvm_apic_accept_events(vcpu);
8827                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
8828                         r = 1;
8829                         goto out;
8830                 }
8831
8832                 inject_pending_event(vcpu, &req_immediate_exit);
8833                 if (req_int_win)
8834                         kvm_x86_ops.enable_irq_window(vcpu);
8835
8836                 if (kvm_lapic_enabled(vcpu)) {
8837                         update_cr8_intercept(vcpu);
8838                         kvm_lapic_sync_to_vapic(vcpu);
8839                 }
8840         }
8841
8842         r = kvm_mmu_reload(vcpu);
8843         if (unlikely(r)) {
8844                 goto cancel_injection;
8845         }
8846
8847         preempt_disable();
8848
8849         kvm_x86_ops.prepare_guest_switch(vcpu);
8850
8851         /*
8852          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
8853          * IPI are then delayed after guest entry, which ensures that they
8854          * result in virtual interrupt delivery.
8855          */
8856         local_irq_disable();
8857         vcpu->mode = IN_GUEST_MODE;
8858
8859         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
8860
8861         /*
8862          * 1) We should set ->mode before checking ->requests.  Please see
8863          * the comment in kvm_vcpu_exiting_guest_mode().
8864          *
8865          * 2) For APICv, we should set ->mode before checking PID.ON. This
8866          * pairs with the memory barrier implicit in pi_test_and_set_on
8867          * (see vmx_deliver_posted_interrupt).
8868          *
8869          * 3) This also orders the write to mode from any reads to the page
8870          * tables done while the VCPU is running.  Please see the comment
8871          * in kvm_flush_remote_tlbs.
8872          */
8873         smp_mb__after_srcu_read_unlock();
8874
8875         /*
8876          * This handles the case where a posted interrupt was
8877          * notified with kvm_vcpu_kick.
8878          */
8879         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
8880                 kvm_x86_ops.sync_pir_to_irr(vcpu);
8881
8882         if (kvm_vcpu_exit_request(vcpu)) {
8883                 vcpu->mode = OUTSIDE_GUEST_MODE;
8884                 smp_wmb();
8885                 local_irq_enable();
8886                 preempt_enable();
8887                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8888                 r = 1;
8889                 goto cancel_injection;
8890         }
8891
8892         if (req_immediate_exit) {
8893                 kvm_make_request(KVM_REQ_EVENT, vcpu);
8894                 kvm_x86_ops.request_immediate_exit(vcpu);
8895         }
8896
8897         trace_kvm_entry(vcpu);
8898
8899         fpregs_assert_state_consistent();
8900         if (test_thread_flag(TIF_NEED_FPU_LOAD))
8901                 switch_fpu_return();
8902
8903         if (unlikely(vcpu->arch.switch_db_regs)) {
8904                 set_debugreg(0, 7);
8905                 set_debugreg(vcpu->arch.eff_db[0], 0);
8906                 set_debugreg(vcpu->arch.eff_db[1], 1);
8907                 set_debugreg(vcpu->arch.eff_db[2], 2);
8908                 set_debugreg(vcpu->arch.eff_db[3], 3);
8909                 set_debugreg(vcpu->arch.dr6, 6);
8910                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
8911         }
8912
8913         exit_fastpath = kvm_x86_ops.run(vcpu);
8914
8915         /*
8916          * Do this here before restoring debug registers on the host.  And
8917          * since we do this before handling the vmexit, a DR access vmexit
8918          * can (a) read the correct value of the debug registers, (b) set
8919          * KVM_DEBUGREG_WONT_EXIT again.
8920          */
8921         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
8922                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
8923                 kvm_x86_ops.sync_dirty_debug_regs(vcpu);
8924                 kvm_update_dr0123(vcpu);
8925                 kvm_update_dr7(vcpu);
8926                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
8927         }
8928
8929         /*
8930          * If the guest has used debug registers, at least dr7
8931          * will be disabled while returning to the host.
8932          * If we don't have active breakpoints in the host, we don't
8933          * care about the messed up debug address registers. But if
8934          * we have some of them active, restore the old state.
8935          */
8936         if (hw_breakpoint_active())
8937                 hw_breakpoint_restore();
8938
8939         vcpu->arch.last_vmentry_cpu = vcpu->cpu;
8940         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
8941
8942         vcpu->mode = OUTSIDE_GUEST_MODE;
8943         smp_wmb();
8944
8945         kvm_x86_ops.handle_exit_irqoff(vcpu);
8946
8947         /*
8948          * Consume any pending interrupts, including the possible source of
8949          * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
8950          * An instruction is required after local_irq_enable() to fully unblock
8951          * interrupts on processors that implement an interrupt shadow, the
8952          * stat.exits increment will do nicely.
8953          */
8954         kvm_before_interrupt(vcpu);
8955         local_irq_enable();
8956         ++vcpu->stat.exits;
8957         local_irq_disable();
8958         kvm_after_interrupt(vcpu);
8959
8960         if (lapic_in_kernel(vcpu)) {
8961                 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
8962                 if (delta != S64_MIN) {
8963                         trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
8964                         vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
8965                 }
8966         }
8967
8968         local_irq_enable();
8969         preempt_enable();
8970
8971         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8972
8973         /*
8974          * Profile KVM exit RIPs:
8975          */
8976         if (unlikely(prof_on == KVM_PROFILING)) {
8977                 unsigned long rip = kvm_rip_read(vcpu);
8978                 profile_hit(KVM_PROFILING, (void *)rip);
8979         }
8980
8981         if (unlikely(vcpu->arch.tsc_always_catchup))
8982                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8983
8984         if (vcpu->arch.apic_attention)
8985                 kvm_lapic_sync_from_vapic(vcpu);
8986
8987         r = kvm_x86_ops.handle_exit(vcpu, exit_fastpath);
8988         return r;
8989
8990 cancel_injection:
8991         if (req_immediate_exit)
8992                 kvm_make_request(KVM_REQ_EVENT, vcpu);
8993         kvm_x86_ops.cancel_injection(vcpu);
8994         if (unlikely(vcpu->arch.apic_attention))
8995                 kvm_lapic_sync_from_vapic(vcpu);
8996 out:
8997         return r;
8998 }
8999
9000 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
9001 {
9002         if (!kvm_arch_vcpu_runnable(vcpu) &&
9003             (!kvm_x86_ops.pre_block || kvm_x86_ops.pre_block(vcpu) == 0)) {
9004                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9005                 kvm_vcpu_block(vcpu);
9006                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9007
9008                 if (kvm_x86_ops.post_block)
9009                         kvm_x86_ops.post_block(vcpu);
9010
9011                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
9012                         return 1;
9013         }
9014
9015         kvm_apic_accept_events(vcpu);
9016         switch(vcpu->arch.mp_state) {
9017         case KVM_MP_STATE_HALTED:
9018                 vcpu->arch.pv.pv_unhalted = false;
9019                 vcpu->arch.mp_state =
9020                         KVM_MP_STATE_RUNNABLE;
9021                 fallthrough;
9022         case KVM_MP_STATE_RUNNABLE:
9023                 vcpu->arch.apf.halted = false;
9024                 break;
9025         case KVM_MP_STATE_INIT_RECEIVED:
9026                 break;
9027         default:
9028                 return -EINTR;
9029         }
9030         return 1;
9031 }
9032
9033 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
9034 {
9035         if (is_guest_mode(vcpu))
9036                 kvm_x86_ops.nested_ops->check_events(vcpu);
9037
9038         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
9039                 !vcpu->arch.apf.halted);
9040 }
9041
9042 static int vcpu_run(struct kvm_vcpu *vcpu)
9043 {
9044         int r;
9045         struct kvm *kvm = vcpu->kvm;
9046
9047         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9048         vcpu->arch.l1tf_flush_l1d = true;
9049
9050         for (;;) {
9051                 if (kvm_vcpu_running(vcpu)) {
9052                         r = vcpu_enter_guest(vcpu);
9053                 } else {
9054                         r = vcpu_block(kvm, vcpu);
9055                 }
9056
9057                 if (r <= 0)
9058                         break;
9059
9060                 kvm_clear_request(KVM_REQ_PENDING_TIMER, vcpu);
9061                 if (kvm_cpu_has_pending_timer(vcpu))
9062                         kvm_inject_pending_timer_irqs(vcpu);
9063
9064                 if (dm_request_for_irq_injection(vcpu) &&
9065                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
9066                         r = 0;
9067                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
9068                         ++vcpu->stat.request_irq_exits;
9069                         break;
9070                 }
9071
9072                 if (__xfer_to_guest_mode_work_pending()) {
9073                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9074                         r = xfer_to_guest_mode_handle_work(vcpu);
9075                         if (r)
9076                                 return r;
9077                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9078                 }
9079         }
9080
9081         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9082
9083         return r;
9084 }
9085
9086 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
9087 {
9088         int r;
9089
9090         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9091         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
9092         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9093         return r;
9094 }
9095
9096 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
9097 {
9098         BUG_ON(!vcpu->arch.pio.count);
9099
9100         return complete_emulated_io(vcpu);
9101 }
9102
9103 /*
9104  * Implements the following, as a state machine:
9105  *
9106  * read:
9107  *   for each fragment
9108  *     for each mmio piece in the fragment
9109  *       write gpa, len
9110  *       exit
9111  *       copy data
9112  *   execute insn
9113  *
9114  * write:
9115  *   for each fragment
9116  *     for each mmio piece in the fragment
9117  *       write gpa, len
9118  *       copy data
9119  *       exit
9120  */
9121 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
9122 {
9123         struct kvm_run *run = vcpu->run;
9124         struct kvm_mmio_fragment *frag;
9125         unsigned len;
9126
9127         BUG_ON(!vcpu->mmio_needed);
9128
9129         /* Complete previous fragment */
9130         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
9131         len = min(8u, frag->len);
9132         if (!vcpu->mmio_is_write)
9133                 memcpy(frag->data, run->mmio.data, len);
9134
9135         if (frag->len <= 8) {
9136                 /* Switch to the next fragment. */
9137                 frag++;
9138                 vcpu->mmio_cur_fragment++;
9139         } else {
9140                 /* Go forward to the next mmio piece. */
9141                 frag->data += len;
9142                 frag->gpa += len;
9143                 frag->len -= len;
9144         }
9145
9146         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
9147                 vcpu->mmio_needed = 0;
9148
9149                 /* FIXME: return into emulator if single-stepping.  */
9150                 if (vcpu->mmio_is_write)
9151                         return 1;
9152                 vcpu->mmio_read_completed = 1;
9153                 return complete_emulated_io(vcpu);
9154         }
9155
9156         run->exit_reason = KVM_EXIT_MMIO;
9157         run->mmio.phys_addr = frag->gpa;
9158         if (vcpu->mmio_is_write)
9159                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
9160         run->mmio.len = min(8u, frag->len);
9161         run->mmio.is_write = vcpu->mmio_is_write;
9162         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
9163         return 0;
9164 }
9165
9166 static void kvm_save_current_fpu(struct fpu *fpu)
9167 {
9168         /*
9169          * If the target FPU state is not resident in the CPU registers, just
9170          * memcpy() from current, else save CPU state directly to the target.
9171          */
9172         if (test_thread_flag(TIF_NEED_FPU_LOAD))
9173                 memcpy(&fpu->state, &current->thread.fpu.state,
9174                        fpu_kernel_xstate_size);
9175         else
9176                 copy_fpregs_to_fpstate(fpu);
9177 }
9178
9179 /* Swap (qemu) user FPU context for the guest FPU context. */
9180 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
9181 {
9182         fpregs_lock();
9183
9184         kvm_save_current_fpu(vcpu->arch.user_fpu);
9185
9186         /* PKRU is separately restored in kvm_x86_ops.run.  */
9187         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu->state,
9188                                 ~XFEATURE_MASK_PKRU);
9189
9190         fpregs_mark_activate();
9191         fpregs_unlock();
9192
9193         trace_kvm_fpu(1);
9194 }
9195
9196 /* When vcpu_run ends, restore user space FPU context. */
9197 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
9198 {
9199         fpregs_lock();
9200
9201         kvm_save_current_fpu(vcpu->arch.guest_fpu);
9202
9203         copy_kernel_to_fpregs(&vcpu->arch.user_fpu->state);
9204
9205         fpregs_mark_activate();
9206         fpregs_unlock();
9207
9208         ++vcpu->stat.fpu_reload;
9209         trace_kvm_fpu(0);
9210 }
9211
9212 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
9213 {
9214         struct kvm_run *kvm_run = vcpu->run;
9215         int r;
9216
9217         vcpu_load(vcpu);
9218         kvm_sigset_activate(vcpu);
9219         kvm_load_guest_fpu(vcpu);
9220
9221         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
9222                 if (kvm_run->immediate_exit) {
9223                         r = -EINTR;
9224                         goto out;
9225                 }
9226                 kvm_vcpu_block(vcpu);
9227                 kvm_apic_accept_events(vcpu);
9228                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
9229                 r = -EAGAIN;
9230                 if (signal_pending(current)) {
9231                         r = -EINTR;
9232                         kvm_run->exit_reason = KVM_EXIT_INTR;
9233                         ++vcpu->stat.signal_exits;
9234                 }
9235                 goto out;
9236         }
9237
9238         if (kvm_run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) {
9239                 r = -EINVAL;
9240                 goto out;
9241         }
9242
9243         if (kvm_run->kvm_dirty_regs) {
9244                 r = sync_regs(vcpu);
9245                 if (r != 0)
9246                         goto out;
9247         }
9248
9249         /* re-sync apic's tpr */
9250         if (!lapic_in_kernel(vcpu)) {
9251                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
9252                         r = -EINVAL;
9253                         goto out;
9254                 }
9255         }
9256
9257         if (unlikely(vcpu->arch.complete_userspace_io)) {
9258                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
9259                 vcpu->arch.complete_userspace_io = NULL;
9260                 r = cui(vcpu);
9261                 if (r <= 0)
9262                         goto out;
9263         } else
9264                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
9265
9266         if (kvm_run->immediate_exit)
9267                 r = -EINTR;
9268         else
9269                 r = vcpu_run(vcpu);
9270
9271 out:
9272         kvm_put_guest_fpu(vcpu);
9273         if (kvm_run->kvm_valid_regs)
9274                 store_regs(vcpu);
9275         post_kvm_run_save(vcpu);
9276         kvm_sigset_deactivate(vcpu);
9277
9278         vcpu_put(vcpu);
9279         return r;
9280 }
9281
9282 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9283 {
9284         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
9285                 /*
9286                  * We are here if userspace calls get_regs() in the middle of
9287                  * instruction emulation. Registers state needs to be copied
9288                  * back from emulation context to vcpu. Userspace shouldn't do
9289                  * that usually, but some bad designed PV devices (vmware
9290                  * backdoor interface) need this to work
9291                  */
9292                 emulator_writeback_register_cache(vcpu->arch.emulate_ctxt);
9293                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
9294         }
9295         regs->rax = kvm_rax_read(vcpu);
9296         regs->rbx = kvm_rbx_read(vcpu);
9297         regs->rcx = kvm_rcx_read(vcpu);
9298         regs->rdx = kvm_rdx_read(vcpu);
9299         regs->rsi = kvm_rsi_read(vcpu);
9300         regs->rdi = kvm_rdi_read(vcpu);
9301         regs->rsp = kvm_rsp_read(vcpu);
9302         regs->rbp = kvm_rbp_read(vcpu);
9303 #ifdef CONFIG_X86_64
9304         regs->r8 = kvm_r8_read(vcpu);
9305         regs->r9 = kvm_r9_read(vcpu);
9306         regs->r10 = kvm_r10_read(vcpu);
9307         regs->r11 = kvm_r11_read(vcpu);
9308         regs->r12 = kvm_r12_read(vcpu);
9309         regs->r13 = kvm_r13_read(vcpu);
9310         regs->r14 = kvm_r14_read(vcpu);
9311         regs->r15 = kvm_r15_read(vcpu);
9312 #endif
9313
9314         regs->rip = kvm_rip_read(vcpu);
9315         regs->rflags = kvm_get_rflags(vcpu);
9316 }
9317
9318 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9319 {
9320         vcpu_load(vcpu);
9321         __get_regs(vcpu, regs);
9322         vcpu_put(vcpu);
9323         return 0;
9324 }
9325
9326 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9327 {
9328         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
9329         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
9330
9331         kvm_rax_write(vcpu, regs->rax);
9332         kvm_rbx_write(vcpu, regs->rbx);
9333         kvm_rcx_write(vcpu, regs->rcx);
9334         kvm_rdx_write(vcpu, regs->rdx);
9335         kvm_rsi_write(vcpu, regs->rsi);
9336         kvm_rdi_write(vcpu, regs->rdi);
9337         kvm_rsp_write(vcpu, regs->rsp);
9338         kvm_rbp_write(vcpu, regs->rbp);
9339 #ifdef CONFIG_X86_64
9340         kvm_r8_write(vcpu, regs->r8);
9341         kvm_r9_write(vcpu, regs->r9);
9342         kvm_r10_write(vcpu, regs->r10);
9343         kvm_r11_write(vcpu, regs->r11);
9344         kvm_r12_write(vcpu, regs->r12);
9345         kvm_r13_write(vcpu, regs->r13);
9346         kvm_r14_write(vcpu, regs->r14);
9347         kvm_r15_write(vcpu, regs->r15);
9348 #endif
9349
9350         kvm_rip_write(vcpu, regs->rip);
9351         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
9352
9353         vcpu->arch.exception.pending = false;
9354
9355         kvm_make_request(KVM_REQ_EVENT, vcpu);
9356 }
9357
9358 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9359 {
9360         vcpu_load(vcpu);
9361         __set_regs(vcpu, regs);
9362         vcpu_put(vcpu);
9363         return 0;
9364 }
9365
9366 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
9367 {
9368         struct kvm_segment cs;
9369
9370         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
9371         *db = cs.db;
9372         *l = cs.l;
9373 }
9374 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
9375
9376 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9377 {
9378         struct desc_ptr dt;
9379
9380         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
9381         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
9382         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
9383         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
9384         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
9385         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
9386
9387         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
9388         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
9389
9390         kvm_x86_ops.get_idt(vcpu, &dt);
9391         sregs->idt.limit = dt.size;
9392         sregs->idt.base = dt.address;
9393         kvm_x86_ops.get_gdt(vcpu, &dt);
9394         sregs->gdt.limit = dt.size;
9395         sregs->gdt.base = dt.address;
9396
9397         sregs->cr0 = kvm_read_cr0(vcpu);
9398         sregs->cr2 = vcpu->arch.cr2;
9399         sregs->cr3 = kvm_read_cr3(vcpu);
9400         sregs->cr4 = kvm_read_cr4(vcpu);
9401         sregs->cr8 = kvm_get_cr8(vcpu);
9402         sregs->efer = vcpu->arch.efer;
9403         sregs->apic_base = kvm_get_apic_base(vcpu);
9404
9405         memset(sregs->interrupt_bitmap, 0, sizeof(sregs->interrupt_bitmap));
9406
9407         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
9408                 set_bit(vcpu->arch.interrupt.nr,
9409                         (unsigned long *)sregs->interrupt_bitmap);
9410 }
9411
9412 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
9413                                   struct kvm_sregs *sregs)
9414 {
9415         vcpu_load(vcpu);
9416         __get_sregs(vcpu, sregs);
9417         vcpu_put(vcpu);
9418         return 0;
9419 }
9420
9421 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
9422                                     struct kvm_mp_state *mp_state)
9423 {
9424         vcpu_load(vcpu);
9425         if (kvm_mpx_supported())
9426                 kvm_load_guest_fpu(vcpu);
9427
9428         kvm_apic_accept_events(vcpu);
9429         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
9430                                         vcpu->arch.pv.pv_unhalted)
9431                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
9432         else
9433                 mp_state->mp_state = vcpu->arch.mp_state;
9434
9435         if (kvm_mpx_supported())
9436                 kvm_put_guest_fpu(vcpu);
9437         vcpu_put(vcpu);
9438         return 0;
9439 }
9440
9441 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
9442                                     struct kvm_mp_state *mp_state)
9443 {
9444         int ret = -EINVAL;
9445
9446         vcpu_load(vcpu);
9447
9448         if (!lapic_in_kernel(vcpu) &&
9449             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
9450                 goto out;
9451
9452         /*
9453          * KVM_MP_STATE_INIT_RECEIVED means the processor is in
9454          * INIT state; latched init should be reported using
9455          * KVM_SET_VCPU_EVENTS, so reject it here.
9456          */
9457         if ((kvm_vcpu_latch_init(vcpu) || vcpu->arch.smi_pending) &&
9458             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
9459              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
9460                 goto out;
9461
9462         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
9463                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
9464                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
9465         } else
9466                 vcpu->arch.mp_state = mp_state->mp_state;
9467         kvm_make_request(KVM_REQ_EVENT, vcpu);
9468
9469         ret = 0;
9470 out:
9471         vcpu_put(vcpu);
9472         return ret;
9473 }
9474
9475 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
9476                     int reason, bool has_error_code, u32 error_code)
9477 {
9478         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
9479         int ret;
9480
9481         init_emulate_ctxt(vcpu);
9482
9483         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
9484                                    has_error_code, error_code);
9485         if (ret) {
9486                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
9487                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
9488                 vcpu->run->internal.ndata = 0;
9489                 return 0;
9490         }
9491
9492         kvm_rip_write(vcpu, ctxt->eip);
9493         kvm_set_rflags(vcpu, ctxt->eflags);
9494         return 1;
9495 }
9496 EXPORT_SYMBOL_GPL(kvm_task_switch);
9497
9498 static int kvm_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9499 {
9500         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
9501                 /*
9502                  * When EFER.LME and CR0.PG are set, the processor is in
9503                  * 64-bit mode (though maybe in a 32-bit code segment).
9504                  * CR4.PAE and EFER.LMA must be set.
9505                  */
9506                 if (!(sregs->cr4 & X86_CR4_PAE)
9507                     || !(sregs->efer & EFER_LMA))
9508                         return -EINVAL;
9509         } else {
9510                 /*
9511                  * Not in 64-bit mode: EFER.LMA is clear and the code
9512                  * segment cannot be 64-bit.
9513                  */
9514                 if (sregs->efer & EFER_LMA || sregs->cs.l)
9515                         return -EINVAL;
9516         }
9517
9518         return kvm_valid_cr4(vcpu, sregs->cr4);
9519 }
9520
9521 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9522 {
9523         struct msr_data apic_base_msr;
9524         int mmu_reset_needed = 0;
9525         int cpuid_update_needed = 0;
9526         int pending_vec, max_bits, idx;
9527         struct desc_ptr dt;
9528         int ret = -EINVAL;
9529
9530         if (kvm_valid_sregs(vcpu, sregs))
9531                 goto out;
9532
9533         apic_base_msr.data = sregs->apic_base;
9534         apic_base_msr.host_initiated = true;
9535         if (kvm_set_apic_base(vcpu, &apic_base_msr))
9536                 goto out;
9537
9538         dt.size = sregs->idt.limit;
9539         dt.address = sregs->idt.base;
9540         kvm_x86_ops.set_idt(vcpu, &dt);
9541         dt.size = sregs->gdt.limit;
9542         dt.address = sregs->gdt.base;
9543         kvm_x86_ops.set_gdt(vcpu, &dt);
9544
9545         vcpu->arch.cr2 = sregs->cr2;
9546         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
9547         vcpu->arch.cr3 = sregs->cr3;
9548         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
9549
9550         kvm_set_cr8(vcpu, sregs->cr8);
9551
9552         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
9553         kvm_x86_ops.set_efer(vcpu, sregs->efer);
9554
9555         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
9556         kvm_x86_ops.set_cr0(vcpu, sregs->cr0);
9557         vcpu->arch.cr0 = sregs->cr0;
9558
9559         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
9560         cpuid_update_needed |= ((kvm_read_cr4(vcpu) ^ sregs->cr4) &
9561                                 (X86_CR4_OSXSAVE | X86_CR4_PKE));
9562         kvm_x86_ops.set_cr4(vcpu, sregs->cr4);
9563         if (cpuid_update_needed)
9564                 kvm_update_cpuid_runtime(vcpu);
9565
9566         idx = srcu_read_lock(&vcpu->kvm->srcu);
9567         if (is_pae_paging(vcpu)) {
9568                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
9569                 mmu_reset_needed = 1;
9570         }
9571         srcu_read_unlock(&vcpu->kvm->srcu, idx);
9572
9573         if (mmu_reset_needed)
9574                 kvm_mmu_reset_context(vcpu);
9575
9576         max_bits = KVM_NR_INTERRUPTS;
9577         pending_vec = find_first_bit(
9578                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
9579         if (pending_vec < max_bits) {
9580                 kvm_queue_interrupt(vcpu, pending_vec, false);
9581                 pr_debug("Set back pending irq %d\n", pending_vec);
9582         }
9583
9584         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
9585         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
9586         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
9587         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
9588         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
9589         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
9590
9591         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
9592         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
9593
9594         update_cr8_intercept(vcpu);
9595
9596         /* Older userspace won't unhalt the vcpu on reset. */
9597         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
9598             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
9599             !is_protmode(vcpu))
9600                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9601
9602         kvm_make_request(KVM_REQ_EVENT, vcpu);
9603
9604         ret = 0;
9605 out:
9606         return ret;
9607 }
9608
9609 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
9610                                   struct kvm_sregs *sregs)
9611 {
9612         int ret;
9613
9614         vcpu_load(vcpu);
9615         ret = __set_sregs(vcpu, sregs);
9616         vcpu_put(vcpu);
9617         return ret;
9618 }
9619
9620 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
9621                                         struct kvm_guest_debug *dbg)
9622 {
9623         unsigned long rflags;
9624         int i, r;
9625
9626         vcpu_load(vcpu);
9627
9628         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
9629                 r = -EBUSY;
9630                 if (vcpu->arch.exception.pending)
9631                         goto out;
9632                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
9633                         kvm_queue_exception(vcpu, DB_VECTOR);
9634                 else
9635                         kvm_queue_exception(vcpu, BP_VECTOR);
9636         }
9637
9638         /*
9639          * Read rflags as long as potentially injected trace flags are still
9640          * filtered out.
9641          */
9642         rflags = kvm_get_rflags(vcpu);
9643
9644         vcpu->guest_debug = dbg->control;
9645         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
9646                 vcpu->guest_debug = 0;
9647
9648         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
9649                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
9650                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
9651                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
9652         } else {
9653                 for (i = 0; i < KVM_NR_DB_REGS; i++)
9654                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
9655         }
9656         kvm_update_dr7(vcpu);
9657
9658         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
9659                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
9660                         get_segment_base(vcpu, VCPU_SREG_CS);
9661
9662         /*
9663          * Trigger an rflags update that will inject or remove the trace
9664          * flags.
9665          */
9666         kvm_set_rflags(vcpu, rflags);
9667
9668         kvm_x86_ops.update_exception_bitmap(vcpu);
9669
9670         r = 0;
9671
9672 out:
9673         vcpu_put(vcpu);
9674         return r;
9675 }
9676
9677 /*
9678  * Translate a guest virtual address to a guest physical address.
9679  */
9680 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
9681                                     struct kvm_translation *tr)
9682 {
9683         unsigned long vaddr = tr->linear_address;
9684         gpa_t gpa;
9685         int idx;
9686
9687         vcpu_load(vcpu);
9688
9689         idx = srcu_read_lock(&vcpu->kvm->srcu);
9690         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
9691         srcu_read_unlock(&vcpu->kvm->srcu, idx);
9692         tr->physical_address = gpa;
9693         tr->valid = gpa != UNMAPPED_GVA;
9694         tr->writeable = 1;
9695         tr->usermode = 0;
9696
9697         vcpu_put(vcpu);
9698         return 0;
9699 }
9700
9701 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
9702 {
9703         struct fxregs_state *fxsave;
9704
9705         vcpu_load(vcpu);
9706
9707         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
9708         memcpy(fpu->fpr, fxsave->st_space, 128);
9709         fpu->fcw = fxsave->cwd;
9710         fpu->fsw = fxsave->swd;
9711         fpu->ftwx = fxsave->twd;
9712         fpu->last_opcode = fxsave->fop;
9713         fpu->last_ip = fxsave->rip;
9714         fpu->last_dp = fxsave->rdp;
9715         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
9716
9717         vcpu_put(vcpu);
9718         return 0;
9719 }
9720
9721 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
9722 {
9723         struct fxregs_state *fxsave;
9724
9725         vcpu_load(vcpu);
9726
9727         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
9728
9729         memcpy(fxsave->st_space, fpu->fpr, 128);
9730         fxsave->cwd = fpu->fcw;
9731         fxsave->swd = fpu->fsw;
9732         fxsave->twd = fpu->ftwx;
9733         fxsave->fop = fpu->last_opcode;
9734         fxsave->rip = fpu->last_ip;
9735         fxsave->rdp = fpu->last_dp;
9736         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
9737
9738         vcpu_put(vcpu);
9739         return 0;
9740 }
9741
9742 static void store_regs(struct kvm_vcpu *vcpu)
9743 {
9744         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
9745
9746         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
9747                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
9748
9749         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
9750                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
9751
9752         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
9753                 kvm_vcpu_ioctl_x86_get_vcpu_events(
9754                                 vcpu, &vcpu->run->s.regs.events);
9755 }
9756
9757 static int sync_regs(struct kvm_vcpu *vcpu)
9758 {
9759         if (vcpu->run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)
9760                 return -EINVAL;
9761
9762         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
9763                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
9764                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
9765         }
9766         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
9767                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
9768                         return -EINVAL;
9769                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
9770         }
9771         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
9772                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
9773                                 vcpu, &vcpu->run->s.regs.events))
9774                         return -EINVAL;
9775                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
9776         }
9777
9778         return 0;
9779 }
9780
9781 static void fx_init(struct kvm_vcpu *vcpu)
9782 {
9783         fpstate_init(&vcpu->arch.guest_fpu->state);
9784         if (boot_cpu_has(X86_FEATURE_XSAVES))
9785                 vcpu->arch.guest_fpu->state.xsave.header.xcomp_bv =
9786                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
9787
9788         /*
9789          * Ensure guest xcr0 is valid for loading
9790          */
9791         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
9792
9793         vcpu->arch.cr0 |= X86_CR0_ET;
9794 }
9795
9796 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
9797 {
9798         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
9799                 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
9800                              "guest TSC will not be reliable\n");
9801
9802         return 0;
9803 }
9804
9805 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
9806 {
9807         struct page *page;
9808         int r;
9809
9810         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
9811                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9812         else
9813                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
9814
9815         kvm_set_tsc_khz(vcpu, max_tsc_khz);
9816
9817         r = kvm_mmu_create(vcpu);
9818         if (r < 0)
9819                 return r;
9820
9821         if (irqchip_in_kernel(vcpu->kvm)) {
9822                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
9823                 if (r < 0)
9824                         goto fail_mmu_destroy;
9825                 if (kvm_apicv_activated(vcpu->kvm))
9826                         vcpu->arch.apicv_active = true;
9827         } else
9828                 static_key_slow_inc(&kvm_no_apic_vcpu);
9829
9830         r = -ENOMEM;
9831
9832         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
9833         if (!page)
9834                 goto fail_free_lapic;
9835         vcpu->arch.pio_data = page_address(page);
9836
9837         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
9838                                        GFP_KERNEL_ACCOUNT);
9839         if (!vcpu->arch.mce_banks)
9840                 goto fail_free_pio_data;
9841         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
9842
9843         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
9844                                 GFP_KERNEL_ACCOUNT))
9845                 goto fail_free_mce_banks;
9846
9847         if (!alloc_emulate_ctxt(vcpu))
9848                 goto free_wbinvd_dirty_mask;
9849
9850         vcpu->arch.user_fpu = kmem_cache_zalloc(x86_fpu_cache,
9851                                                 GFP_KERNEL_ACCOUNT);
9852         if (!vcpu->arch.user_fpu) {
9853                 pr_err("kvm: failed to allocate userspace's fpu\n");
9854                 goto free_emulate_ctxt;
9855         }
9856
9857         vcpu->arch.guest_fpu = kmem_cache_zalloc(x86_fpu_cache,
9858                                                  GFP_KERNEL_ACCOUNT);
9859         if (!vcpu->arch.guest_fpu) {
9860                 pr_err("kvm: failed to allocate vcpu's fpu\n");
9861                 goto free_user_fpu;
9862         }
9863         fx_init(vcpu);
9864
9865         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
9866
9867         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
9868
9869         kvm_async_pf_hash_reset(vcpu);
9870         kvm_pmu_init(vcpu);
9871
9872         vcpu->arch.pending_external_vector = -1;
9873         vcpu->arch.preempted_in_kernel = false;
9874
9875         kvm_hv_vcpu_init(vcpu);
9876
9877         r = kvm_x86_ops.vcpu_create(vcpu);
9878         if (r)
9879                 goto free_guest_fpu;
9880
9881         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
9882         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
9883         kvm_vcpu_mtrr_init(vcpu);
9884         vcpu_load(vcpu);
9885         kvm_vcpu_reset(vcpu, false);
9886         kvm_init_mmu(vcpu, false);
9887         vcpu_put(vcpu);
9888         return 0;
9889
9890 free_guest_fpu:
9891         kmem_cache_free(x86_fpu_cache, vcpu->arch.guest_fpu);
9892 free_user_fpu:
9893         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
9894 free_emulate_ctxt:
9895         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
9896 free_wbinvd_dirty_mask:
9897         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
9898 fail_free_mce_banks:
9899         kfree(vcpu->arch.mce_banks);
9900 fail_free_pio_data:
9901         free_page((unsigned long)vcpu->arch.pio_data);
9902 fail_free_lapic:
9903         kvm_free_lapic(vcpu);
9904 fail_mmu_destroy:
9905         kvm_mmu_destroy(vcpu);
9906         return r;
9907 }
9908
9909 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
9910 {
9911         struct kvm *kvm = vcpu->kvm;
9912
9913         kvm_hv_vcpu_postcreate(vcpu);
9914
9915         if (mutex_lock_killable(&vcpu->mutex))
9916                 return;
9917         vcpu_load(vcpu);
9918         kvm_synchronize_tsc(vcpu, 0);
9919         vcpu_put(vcpu);
9920
9921         /* poll control enabled by default */
9922         vcpu->arch.msr_kvm_poll_control = 1;
9923
9924         mutex_unlock(&vcpu->mutex);
9925
9926         if (kvmclock_periodic_sync && vcpu->vcpu_idx == 0)
9927                 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
9928                                                 KVMCLOCK_SYNC_PERIOD);
9929 }
9930
9931 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
9932 {
9933         struct gfn_to_pfn_cache *cache = &vcpu->arch.st.cache;
9934         int idx;
9935
9936         kvm_release_pfn(cache->pfn, cache->dirty, cache);
9937
9938         kvmclock_reset(vcpu);
9939
9940         kvm_x86_ops.vcpu_free(vcpu);
9941
9942         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
9943         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
9944         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
9945         kmem_cache_free(x86_fpu_cache, vcpu->arch.guest_fpu);
9946
9947         kvm_hv_vcpu_uninit(vcpu);
9948         kvm_pmu_destroy(vcpu);
9949         kfree(vcpu->arch.mce_banks);
9950         kvm_free_lapic(vcpu);
9951         idx = srcu_read_lock(&vcpu->kvm->srcu);
9952         kvm_mmu_destroy(vcpu);
9953         srcu_read_unlock(&vcpu->kvm->srcu, idx);
9954         free_page((unsigned long)vcpu->arch.pio_data);
9955         kvfree(vcpu->arch.cpuid_entries);
9956         if (!lapic_in_kernel(vcpu))
9957                 static_key_slow_dec(&kvm_no_apic_vcpu);
9958 }
9959
9960 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
9961 {
9962         kvm_lapic_reset(vcpu, init_event);
9963
9964         vcpu->arch.hflags = 0;
9965
9966         vcpu->arch.smi_pending = 0;
9967         vcpu->arch.smi_count = 0;
9968         atomic_set(&vcpu->arch.nmi_queued, 0);
9969         vcpu->arch.nmi_pending = 0;
9970         vcpu->arch.nmi_injected = false;
9971         kvm_clear_interrupt_queue(vcpu);
9972         kvm_clear_exception_queue(vcpu);
9973
9974         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
9975         kvm_update_dr0123(vcpu);
9976         vcpu->arch.dr6 = DR6_INIT;
9977         vcpu->arch.dr7 = DR7_FIXED_1;
9978         kvm_update_dr7(vcpu);
9979
9980         vcpu->arch.cr2 = 0;
9981
9982         kvm_make_request(KVM_REQ_EVENT, vcpu);
9983         vcpu->arch.apf.msr_en_val = 0;
9984         vcpu->arch.apf.msr_int_val = 0;
9985         vcpu->arch.st.msr_val = 0;
9986
9987         kvmclock_reset(vcpu);
9988
9989         kvm_clear_async_pf_completion_queue(vcpu);
9990         kvm_async_pf_hash_reset(vcpu);
9991         vcpu->arch.apf.halted = false;
9992
9993         if (kvm_mpx_supported()) {
9994                 void *mpx_state_buffer;
9995
9996                 /*
9997                  * To avoid have the INIT path from kvm_apic_has_events() that be
9998                  * called with loaded FPU and does not let userspace fix the state.
9999                  */
10000                 if (init_event)
10001                         kvm_put_guest_fpu(vcpu);
10002                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10003                                         XFEATURE_BNDREGS);
10004                 if (mpx_state_buffer)
10005                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
10006                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10007                                         XFEATURE_BNDCSR);
10008                 if (mpx_state_buffer)
10009                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
10010                 if (init_event)
10011                         kvm_load_guest_fpu(vcpu);
10012         }
10013
10014         if (!init_event) {
10015                 kvm_pmu_reset(vcpu);
10016                 vcpu->arch.smbase = 0x30000;
10017
10018                 vcpu->arch.msr_misc_features_enables = 0;
10019
10020                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10021         }
10022
10023         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
10024         vcpu->arch.regs_avail = ~0;
10025         vcpu->arch.regs_dirty = ~0;
10026
10027         vcpu->arch.ia32_xss = 0;
10028
10029         kvm_x86_ops.vcpu_reset(vcpu, init_event);
10030 }
10031
10032 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
10033 {
10034         struct kvm_segment cs;
10035
10036         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
10037         cs.selector = vector << 8;
10038         cs.base = vector << 12;
10039         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
10040         kvm_rip_write(vcpu, 0);
10041 }
10042
10043 int kvm_arch_hardware_enable(void)
10044 {
10045         struct kvm *kvm;
10046         struct kvm_vcpu *vcpu;
10047         int i;
10048         int ret;
10049         u64 local_tsc;
10050         u64 max_tsc = 0;
10051         bool stable, backwards_tsc = false;
10052
10053         kvm_user_return_msr_cpu_online();
10054         ret = kvm_x86_ops.hardware_enable();
10055         if (ret != 0)
10056                 return ret;
10057
10058         local_tsc = rdtsc();
10059         stable = !kvm_check_tsc_unstable();
10060         list_for_each_entry(kvm, &vm_list, vm_list) {
10061                 kvm_for_each_vcpu(i, vcpu, kvm) {
10062                         if (!stable && vcpu->cpu == smp_processor_id())
10063                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
10064                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
10065                                 backwards_tsc = true;
10066                                 if (vcpu->arch.last_host_tsc > max_tsc)
10067                                         max_tsc = vcpu->arch.last_host_tsc;
10068                         }
10069                 }
10070         }
10071
10072         /*
10073          * Sometimes, even reliable TSCs go backwards.  This happens on
10074          * platforms that reset TSC during suspend or hibernate actions, but
10075          * maintain synchronization.  We must compensate.  Fortunately, we can
10076          * detect that condition here, which happens early in CPU bringup,
10077          * before any KVM threads can be running.  Unfortunately, we can't
10078          * bring the TSCs fully up to date with real time, as we aren't yet far
10079          * enough into CPU bringup that we know how much real time has actually
10080          * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
10081          * variables that haven't been updated yet.
10082          *
10083          * So we simply find the maximum observed TSC above, then record the
10084          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
10085          * the adjustment will be applied.  Note that we accumulate
10086          * adjustments, in case multiple suspend cycles happen before some VCPU
10087          * gets a chance to run again.  In the event that no KVM threads get a
10088          * chance to run, we will miss the entire elapsed period, as we'll have
10089          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
10090          * loose cycle time.  This isn't too big a deal, since the loss will be
10091          * uniform across all VCPUs (not to mention the scenario is extremely
10092          * unlikely). It is possible that a second hibernate recovery happens
10093          * much faster than a first, causing the observed TSC here to be
10094          * smaller; this would require additional padding adjustment, which is
10095          * why we set last_host_tsc to the local tsc observed here.
10096          *
10097          * N.B. - this code below runs only on platforms with reliable TSC,
10098          * as that is the only way backwards_tsc is set above.  Also note
10099          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
10100          * have the same delta_cyc adjustment applied if backwards_tsc
10101          * is detected.  Note further, this adjustment is only done once,
10102          * as we reset last_host_tsc on all VCPUs to stop this from being
10103          * called multiple times (one for each physical CPU bringup).
10104          *
10105          * Platforms with unreliable TSCs don't have to deal with this, they
10106          * will be compensated by the logic in vcpu_load, which sets the TSC to
10107          * catchup mode.  This will catchup all VCPUs to real time, but cannot
10108          * guarantee that they stay in perfect synchronization.
10109          */
10110         if (backwards_tsc) {
10111                 u64 delta_cyc = max_tsc - local_tsc;
10112                 list_for_each_entry(kvm, &vm_list, vm_list) {
10113                         kvm->arch.backwards_tsc_observed = true;
10114                         kvm_for_each_vcpu(i, vcpu, kvm) {
10115                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
10116                                 vcpu->arch.last_host_tsc = local_tsc;
10117                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
10118                         }
10119
10120                         /*
10121                          * We have to disable TSC offset matching.. if you were
10122                          * booting a VM while issuing an S4 host suspend....
10123                          * you may have some problem.  Solving this issue is
10124                          * left as an exercise to the reader.
10125                          */
10126                         kvm->arch.last_tsc_nsec = 0;
10127                         kvm->arch.last_tsc_write = 0;
10128                 }
10129
10130         }
10131         return 0;
10132 }
10133
10134 void kvm_arch_hardware_disable(void)
10135 {
10136         kvm_x86_ops.hardware_disable();
10137         drop_user_return_notifiers();
10138 }
10139
10140 int kvm_arch_hardware_setup(void *opaque)
10141 {
10142         struct kvm_x86_init_ops *ops = opaque;
10143         int r;
10144
10145         rdmsrl_safe(MSR_EFER, &host_efer);
10146
10147         if (boot_cpu_has(X86_FEATURE_XSAVES))
10148                 rdmsrl(MSR_IA32_XSS, host_xss);
10149
10150         r = ops->hardware_setup();
10151         if (r != 0)
10152                 return r;
10153
10154         memcpy(&kvm_x86_ops, ops->runtime_ops, sizeof(kvm_x86_ops));
10155
10156         if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))
10157                 supported_xss = 0;
10158
10159 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
10160         cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
10161 #undef __kvm_cpu_cap_has
10162
10163         if (kvm_has_tsc_control) {
10164                 /*
10165                  * Make sure the user can only configure tsc_khz values that
10166                  * fit into a signed integer.
10167                  * A min value is not calculated because it will always
10168                  * be 1 on all machines.
10169                  */
10170                 u64 max = min(0x7fffffffULL,
10171                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
10172                 kvm_max_guest_tsc_khz = max;
10173
10174                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
10175         }
10176
10177         kvm_init_msr_list();
10178         return 0;
10179 }
10180
10181 void kvm_arch_hardware_unsetup(void)
10182 {
10183         kvm_x86_ops.hardware_unsetup();
10184 }
10185
10186 int kvm_arch_check_processor_compat(void *opaque)
10187 {
10188         struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
10189         struct kvm_x86_init_ops *ops = opaque;
10190
10191         WARN_ON(!irqs_disabled());
10192
10193         if (__cr4_reserved_bits(cpu_has, c) !=
10194             __cr4_reserved_bits(cpu_has, &boot_cpu_data))
10195                 return -EIO;
10196
10197         return ops->check_processor_compatibility();
10198 }
10199
10200 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
10201 {
10202         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
10203 }
10204 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
10205
10206 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
10207 {
10208         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
10209 }
10210
10211 struct static_key kvm_no_apic_vcpu __read_mostly;
10212 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
10213
10214 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
10215 {
10216         struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
10217
10218         vcpu->arch.l1tf_flush_l1d = true;
10219         if (pmu->version && unlikely(pmu->event_count)) {
10220                 pmu->need_cleanup = true;
10221                 kvm_make_request(KVM_REQ_PMU, vcpu);
10222         }
10223         kvm_x86_ops.sched_in(vcpu, cpu);
10224 }
10225
10226 void kvm_arch_free_vm(struct kvm *kvm)
10227 {
10228         kfree(kvm->arch.hyperv.hv_pa_pg);
10229         vfree(kvm);
10230 }
10231
10232
10233 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
10234 {
10235         if (type)
10236                 return -EINVAL;
10237
10238         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
10239         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
10240         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
10241         INIT_LIST_HEAD(&kvm->arch.lpage_disallowed_mmu_pages);
10242         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
10243         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
10244
10245         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
10246         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
10247         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
10248         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
10249                 &kvm->arch.irq_sources_bitmap);
10250
10251         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
10252         mutex_init(&kvm->arch.apic_map_lock);
10253         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
10254
10255         kvm->arch.kvmclock_offset = -get_kvmclock_base_ns();
10256         pvclock_update_vm_gtod_copy(kvm);
10257
10258         kvm->arch.guest_can_read_msr_platform_info = true;
10259
10260         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
10261         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
10262
10263         kvm_hv_init_vm(kvm);
10264         kvm_page_track_init(kvm);
10265         kvm_mmu_init_vm(kvm);
10266
10267         return kvm_x86_ops.vm_init(kvm);
10268 }
10269
10270 int kvm_arch_post_init_vm(struct kvm *kvm)
10271 {
10272         return kvm_mmu_post_init_vm(kvm);
10273 }
10274
10275 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
10276 {
10277         vcpu_load(vcpu);
10278         kvm_mmu_unload(vcpu);
10279         vcpu_put(vcpu);
10280 }
10281
10282 static void kvm_free_vcpus(struct kvm *kvm)
10283 {
10284         unsigned int i;
10285         struct kvm_vcpu *vcpu;
10286
10287         /*
10288          * Unpin any mmu pages first.
10289          */
10290         kvm_for_each_vcpu(i, vcpu, kvm) {
10291                 kvm_clear_async_pf_completion_queue(vcpu);
10292                 kvm_unload_vcpu_mmu(vcpu);
10293         }
10294         kvm_for_each_vcpu(i, vcpu, kvm)
10295                 kvm_vcpu_destroy(vcpu);
10296
10297         mutex_lock(&kvm->lock);
10298         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
10299                 kvm->vcpus[i] = NULL;
10300
10301         atomic_set(&kvm->online_vcpus, 0);
10302         mutex_unlock(&kvm->lock);
10303 }
10304
10305 void kvm_arch_sync_events(struct kvm *kvm)
10306 {
10307         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
10308         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
10309         kvm_free_pit(kvm);
10310 }
10311
10312 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
10313 {
10314         int i, r;
10315         unsigned long hva, old_npages;
10316         struct kvm_memslots *slots = kvm_memslots(kvm);
10317         struct kvm_memory_slot *slot;
10318
10319         /* Called with kvm->slots_lock held.  */
10320         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
10321                 return -EINVAL;
10322
10323         slot = id_to_memslot(slots, id);
10324         if (size) {
10325                 if (slot && slot->npages)
10326                         return -EEXIST;
10327
10328                 /*
10329                  * MAP_SHARED to prevent internal slot pages from being moved
10330                  * by fork()/COW.
10331                  */
10332                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
10333                               MAP_SHARED | MAP_ANONYMOUS, 0);
10334                 if (IS_ERR((void *)hva))
10335                         return PTR_ERR((void *)hva);
10336         } else {
10337                 if (!slot || !slot->npages)
10338                         return 0;
10339
10340                 old_npages = slot->npages;
10341                 hva = 0;
10342         }
10343
10344         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
10345                 struct kvm_userspace_memory_region m;
10346
10347                 m.slot = id | (i << 16);
10348                 m.flags = 0;
10349                 m.guest_phys_addr = gpa;
10350                 m.userspace_addr = hva;
10351                 m.memory_size = size;
10352                 r = __kvm_set_memory_region(kvm, &m);
10353                 if (r < 0)
10354                         return r;
10355         }
10356
10357         if (!size)
10358                 vm_munmap(hva, old_npages * PAGE_SIZE);
10359
10360         return 0;
10361 }
10362 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
10363
10364 void kvm_arch_pre_destroy_vm(struct kvm *kvm)
10365 {
10366         kvm_mmu_pre_destroy_vm(kvm);
10367 }
10368
10369 void kvm_arch_destroy_vm(struct kvm *kvm)
10370 {
10371         u32 i;
10372
10373         if (current->mm == kvm->mm) {
10374                 /*
10375                  * Free memory regions allocated on behalf of userspace,
10376                  * unless the the memory map has changed due to process exit
10377                  * or fd copying.
10378                  */
10379                 mutex_lock(&kvm->slots_lock);
10380                 __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
10381                                         0, 0);
10382                 __x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT,
10383                                         0, 0);
10384                 __x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
10385                 mutex_unlock(&kvm->slots_lock);
10386         }
10387         if (kvm_x86_ops.vm_destroy)
10388                 kvm_x86_ops.vm_destroy(kvm);
10389         for (i = 0; i < kvm->arch.msr_filter.count; i++)
10390                 kfree(kvm->arch.msr_filter.ranges[i].bitmap);
10391         kvm_pic_destroy(kvm);
10392         kvm_ioapic_destroy(kvm);
10393         kvm_free_vcpus(kvm);
10394         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
10395         kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
10396         kvm_mmu_uninit_vm(kvm);
10397         kvm_page_track_cleanup(kvm);
10398         kvm_hv_destroy_vm(kvm);
10399 }
10400
10401 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
10402 {
10403         int i;
10404
10405         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10406                 kvfree(slot->arch.rmap[i]);
10407                 slot->arch.rmap[i] = NULL;
10408
10409                 if (i == 0)
10410                         continue;
10411
10412                 kvfree(slot->arch.lpage_info[i - 1]);
10413                 slot->arch.lpage_info[i - 1] = NULL;
10414         }
10415
10416         kvm_page_track_free_memslot(slot);
10417 }
10418
10419 static int kvm_alloc_memslot_metadata(struct kvm_memory_slot *slot,
10420                                       unsigned long npages)
10421 {
10422         int i;
10423
10424         /*
10425          * Clear out the previous array pointers for the KVM_MR_MOVE case.  The
10426          * old arrays will be freed by __kvm_set_memory_region() if installing
10427          * the new memslot is successful.
10428          */
10429         memset(&slot->arch, 0, sizeof(slot->arch));
10430
10431         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10432                 struct kvm_lpage_info *linfo;
10433                 unsigned long ugfn;
10434                 int lpages;
10435                 int level = i + 1;
10436
10437                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
10438                                       slot->base_gfn, level) + 1;
10439
10440                 slot->arch.rmap[i] =
10441                         kvcalloc(lpages, sizeof(*slot->arch.rmap[i]),
10442                                  GFP_KERNEL_ACCOUNT);
10443                 if (!slot->arch.rmap[i])
10444                         goto out_free;
10445                 if (i == 0)
10446                         continue;
10447
10448                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
10449                 if (!linfo)
10450                         goto out_free;
10451
10452                 slot->arch.lpage_info[i - 1] = linfo;
10453
10454                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
10455                         linfo[0].disallow_lpage = 1;
10456                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
10457                         linfo[lpages - 1].disallow_lpage = 1;
10458                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
10459                 /*
10460                  * If the gfn and userspace address are not aligned wrt each
10461                  * other, disable large page support for this slot.
10462                  */
10463                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1)) {
10464                         unsigned long j;
10465
10466                         for (j = 0; j < lpages; ++j)
10467                                 linfo[j].disallow_lpage = 1;
10468                 }
10469         }
10470
10471         if (kvm_page_track_create_memslot(slot, npages))
10472                 goto out_free;
10473
10474         return 0;
10475
10476 out_free:
10477         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10478                 kvfree(slot->arch.rmap[i]);
10479                 slot->arch.rmap[i] = NULL;
10480                 if (i == 0)
10481                         continue;
10482
10483                 kvfree(slot->arch.lpage_info[i - 1]);
10484                 slot->arch.lpage_info[i - 1] = NULL;
10485         }
10486         return -ENOMEM;
10487 }
10488
10489 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
10490 {
10491         struct kvm_vcpu *vcpu;
10492         int i;
10493
10494         /*
10495          * memslots->generation has been incremented.
10496          * mmio generation may have reached its maximum value.
10497          */
10498         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
10499
10500         /* Force re-initialization of steal_time cache */
10501         kvm_for_each_vcpu(i, vcpu, kvm)
10502                 kvm_vcpu_kick(vcpu);
10503 }
10504
10505 int kvm_arch_prepare_memory_region(struct kvm *kvm,
10506                                 struct kvm_memory_slot *memslot,
10507                                 const struct kvm_userspace_memory_region *mem,
10508                                 enum kvm_mr_change change)
10509 {
10510         if (change == KVM_MR_CREATE || change == KVM_MR_MOVE)
10511                 return kvm_alloc_memslot_metadata(memslot,
10512                                                   mem->memory_size >> PAGE_SHIFT);
10513         return 0;
10514 }
10515
10516 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
10517                                      struct kvm_memory_slot *old,
10518                                      struct kvm_memory_slot *new,
10519                                      enum kvm_mr_change change)
10520 {
10521         /*
10522          * Nothing to do for RO slots or CREATE/MOVE/DELETE of a slot.
10523          * See comments below.
10524          */
10525         if ((change != KVM_MR_FLAGS_ONLY) || (new->flags & KVM_MEM_READONLY))
10526                 return;
10527
10528         /*
10529          * Dirty logging tracks sptes in 4k granularity, meaning that large
10530          * sptes have to be split.  If live migration is successful, the guest
10531          * in the source machine will be destroyed and large sptes will be
10532          * created in the destination. However, if the guest continues to run
10533          * in the source machine (for example if live migration fails), small
10534          * sptes will remain around and cause bad performance.
10535          *
10536          * Scan sptes if dirty logging has been stopped, dropping those
10537          * which can be collapsed into a single large-page spte.  Later
10538          * page faults will create the large-page sptes.
10539          *
10540          * There is no need to do this in any of the following cases:
10541          * CREATE:      No dirty mappings will already exist.
10542          * MOVE/DELETE: The old mappings will already have been cleaned up by
10543          *              kvm_arch_flush_shadow_memslot()
10544          */
10545         if ((old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
10546             !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
10547                 kvm_mmu_zap_collapsible_sptes(kvm, new);
10548
10549         /*
10550          * Enable or disable dirty logging for the slot.
10551          *
10552          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of the old
10553          * slot have been zapped so no dirty logging updates are needed for
10554          * the old slot.
10555          * For KVM_MR_CREATE and KVM_MR_MOVE, once the new slot is visible
10556          * any mappings that might be created in it will consume the
10557          * properties of the new slot and do not need to be updated here.
10558          *
10559          * When PML is enabled, the kvm_x86_ops dirty logging hooks are
10560          * called to enable/disable dirty logging.
10561          *
10562          * When disabling dirty logging with PML enabled, the D-bit is set
10563          * for sptes in the slot in order to prevent unnecessary GPA
10564          * logging in the PML buffer (and potential PML buffer full VMEXIT).
10565          * This guarantees leaving PML enabled for the guest's lifetime
10566          * won't have any additional overhead from PML when the guest is
10567          * running with dirty logging disabled.
10568          *
10569          * When enabling dirty logging, large sptes are write-protected
10570          * so they can be split on first write.  New large sptes cannot
10571          * be created for this slot until the end of the logging.
10572          * See the comments in fast_page_fault().
10573          * For small sptes, nothing is done if the dirty log is in the
10574          * initial-all-set state.  Otherwise, depending on whether pml
10575          * is enabled the D-bit or the W-bit will be cleared.
10576          */
10577         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
10578                 if (kvm_x86_ops.slot_enable_log_dirty) {
10579                         kvm_x86_ops.slot_enable_log_dirty(kvm, new);
10580                 } else {
10581                         int level =
10582                                 kvm_dirty_log_manual_protect_and_init_set(kvm) ?
10583                                 PG_LEVEL_2M : PG_LEVEL_4K;
10584
10585                         /*
10586                          * If we're with initial-all-set, we don't need
10587                          * to write protect any small page because
10588                          * they're reported as dirty already.  However
10589                          * we still need to write-protect huge pages
10590                          * so that the page split can happen lazily on
10591                          * the first write to the huge page.
10592                          */
10593                         kvm_mmu_slot_remove_write_access(kvm, new, level);
10594                 }
10595         } else {
10596                 if (kvm_x86_ops.slot_disable_log_dirty)
10597                         kvm_x86_ops.slot_disable_log_dirty(kvm, new);
10598         }
10599 }
10600
10601 void kvm_arch_commit_memory_region(struct kvm *kvm,
10602                                 const struct kvm_userspace_memory_region *mem,
10603                                 struct kvm_memory_slot *old,
10604                                 const struct kvm_memory_slot *new,
10605                                 enum kvm_mr_change change)
10606 {
10607         if (!kvm->arch.n_requested_mmu_pages)
10608                 kvm_mmu_change_mmu_pages(kvm,
10609                                 kvm_mmu_calculate_default_mmu_pages(kvm));
10610
10611         /*
10612          * FIXME: const-ify all uses of struct kvm_memory_slot.
10613          */
10614         kvm_mmu_slot_apply_flags(kvm, old, (struct kvm_memory_slot *) new, change);
10615
10616         /* Free the arrays associated with the old memslot. */
10617         if (change == KVM_MR_MOVE)
10618                 kvm_arch_free_memslot(kvm, old);
10619 }
10620
10621 void kvm_arch_flush_shadow_all(struct kvm *kvm)
10622 {
10623         kvm_mmu_zap_all(kvm);
10624 }
10625
10626 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
10627                                    struct kvm_memory_slot *slot)
10628 {
10629         kvm_page_track_flush_slot(kvm, slot);
10630 }
10631
10632 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
10633 {
10634         return (is_guest_mode(vcpu) &&
10635                         kvm_x86_ops.guest_apic_has_interrupt &&
10636                         kvm_x86_ops.guest_apic_has_interrupt(vcpu));
10637 }
10638
10639 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
10640 {
10641         if (!list_empty_careful(&vcpu->async_pf.done))
10642                 return true;
10643
10644         if (kvm_apic_has_events(vcpu))
10645                 return true;
10646
10647         if (vcpu->arch.pv.pv_unhalted)
10648                 return true;
10649
10650         if (vcpu->arch.exception.pending)
10651                 return true;
10652
10653         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
10654             (vcpu->arch.nmi_pending &&
10655              kvm_x86_ops.nmi_allowed(vcpu, false)))
10656                 return true;
10657
10658         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
10659             (vcpu->arch.smi_pending &&
10660              kvm_x86_ops.smi_allowed(vcpu, false)))
10661                 return true;
10662
10663         if (kvm_arch_interrupt_allowed(vcpu) &&
10664             (kvm_cpu_has_interrupt(vcpu) ||
10665             kvm_guest_apic_has_interrupt(vcpu)))
10666                 return true;
10667
10668         if (kvm_hv_has_stimer_pending(vcpu))
10669                 return true;
10670
10671         if (is_guest_mode(vcpu) &&
10672             kvm_x86_ops.nested_ops->hv_timer_pending &&
10673             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
10674                 return true;
10675
10676         return false;
10677 }
10678
10679 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
10680 {
10681         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
10682 }
10683
10684 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
10685 {
10686         if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
10687                 return true;
10688
10689         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
10690                 kvm_test_request(KVM_REQ_SMI, vcpu) ||
10691                  kvm_test_request(KVM_REQ_EVENT, vcpu))
10692                 return true;
10693
10694         if (vcpu->arch.apicv_active && kvm_x86_ops.dy_apicv_has_pending_interrupt(vcpu))
10695                 return true;
10696
10697         return false;
10698 }
10699
10700 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
10701 {
10702         return vcpu->arch.preempted_in_kernel;
10703 }
10704
10705 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
10706 {
10707         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
10708 }
10709
10710 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
10711 {
10712         return kvm_x86_ops.interrupt_allowed(vcpu, false);
10713 }
10714
10715 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
10716 {
10717         if (is_64_bit_mode(vcpu))
10718                 return kvm_rip_read(vcpu);
10719         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
10720                      kvm_rip_read(vcpu));
10721 }
10722 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
10723
10724 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
10725 {
10726         return kvm_get_linear_rip(vcpu) == linear_rip;
10727 }
10728 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
10729
10730 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
10731 {
10732         unsigned long rflags;
10733
10734         rflags = kvm_x86_ops.get_rflags(vcpu);
10735         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
10736                 rflags &= ~X86_EFLAGS_TF;
10737         return rflags;
10738 }
10739 EXPORT_SYMBOL_GPL(kvm_get_rflags);
10740
10741 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
10742 {
10743         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
10744             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
10745                 rflags |= X86_EFLAGS_TF;
10746         kvm_x86_ops.set_rflags(vcpu, rflags);
10747 }
10748
10749 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
10750 {
10751         __kvm_set_rflags(vcpu, rflags);
10752         kvm_make_request(KVM_REQ_EVENT, vcpu);
10753 }
10754 EXPORT_SYMBOL_GPL(kvm_set_rflags);
10755
10756 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
10757 {
10758         int r;
10759
10760         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
10761               work->wakeup_all)
10762                 return;
10763
10764         r = kvm_mmu_reload(vcpu);
10765         if (unlikely(r))
10766                 return;
10767
10768         if (!vcpu->arch.mmu->direct_map &&
10769               work->arch.cr3 != vcpu->arch.mmu->get_guest_pgd(vcpu))
10770                 return;
10771
10772         kvm_mmu_do_page_fault(vcpu, work->cr2_or_gpa, 0, true);
10773 }
10774
10775 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
10776 {
10777         BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU));
10778
10779         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
10780 }
10781
10782 static inline u32 kvm_async_pf_next_probe(u32 key)
10783 {
10784         return (key + 1) & (ASYNC_PF_PER_VCPU - 1);
10785 }
10786
10787 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
10788 {
10789         u32 key = kvm_async_pf_hash_fn(gfn);
10790
10791         while (vcpu->arch.apf.gfns[key] != ~0)
10792                 key = kvm_async_pf_next_probe(key);
10793
10794         vcpu->arch.apf.gfns[key] = gfn;
10795 }
10796
10797 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
10798 {
10799         int i;
10800         u32 key = kvm_async_pf_hash_fn(gfn);
10801
10802         for (i = 0; i < ASYNC_PF_PER_VCPU &&
10803                      (vcpu->arch.apf.gfns[key] != gfn &&
10804                       vcpu->arch.apf.gfns[key] != ~0); i++)
10805                 key = kvm_async_pf_next_probe(key);
10806
10807         return key;
10808 }
10809
10810 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
10811 {
10812         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
10813 }
10814
10815 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
10816 {
10817         u32 i, j, k;
10818
10819         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
10820
10821         if (WARN_ON_ONCE(vcpu->arch.apf.gfns[i] != gfn))
10822                 return;
10823
10824         while (true) {
10825                 vcpu->arch.apf.gfns[i] = ~0;
10826                 do {
10827                         j = kvm_async_pf_next_probe(j);
10828                         if (vcpu->arch.apf.gfns[j] == ~0)
10829                                 return;
10830                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
10831                         /*
10832                          * k lies cyclically in ]i,j]
10833                          * |    i.k.j |
10834                          * |....j i.k.| or  |.k..j i...|
10835                          */
10836                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
10837                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
10838                 i = j;
10839         }
10840 }
10841
10842 static inline int apf_put_user_notpresent(struct kvm_vcpu *vcpu)
10843 {
10844         u32 reason = KVM_PV_REASON_PAGE_NOT_PRESENT;
10845
10846         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &reason,
10847                                       sizeof(reason));
10848 }
10849
10850 static inline int apf_put_user_ready(struct kvm_vcpu *vcpu, u32 token)
10851 {
10852         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
10853
10854         return kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
10855                                              &token, offset, sizeof(token));
10856 }
10857
10858 static inline bool apf_pageready_slot_free(struct kvm_vcpu *vcpu)
10859 {
10860         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
10861         u32 val;
10862
10863         if (kvm_read_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
10864                                          &val, offset, sizeof(val)))
10865                 return false;
10866
10867         return !val;
10868 }
10869
10870 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
10871 {
10872         if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
10873                 return false;
10874
10875         if (!kvm_pv_async_pf_enabled(vcpu) ||
10876             (vcpu->arch.apf.send_user_only && kvm_x86_ops.get_cpl(vcpu) == 0))
10877                 return false;
10878
10879         return true;
10880 }
10881
10882 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
10883 {
10884         if (unlikely(!lapic_in_kernel(vcpu) ||
10885                      kvm_event_needs_reinjection(vcpu) ||
10886                      vcpu->arch.exception.pending))
10887                 return false;
10888
10889         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
10890                 return false;
10891
10892         /*
10893          * If interrupts are off we cannot even use an artificial
10894          * halt state.
10895          */
10896         return kvm_arch_interrupt_allowed(vcpu);
10897 }
10898
10899 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
10900                                      struct kvm_async_pf *work)
10901 {
10902         struct x86_exception fault;
10903
10904         trace_kvm_async_pf_not_present(work->arch.token, work->cr2_or_gpa);
10905         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
10906
10907         if (kvm_can_deliver_async_pf(vcpu) &&
10908             !apf_put_user_notpresent(vcpu)) {
10909                 fault.vector = PF_VECTOR;
10910                 fault.error_code_valid = true;
10911                 fault.error_code = 0;
10912                 fault.nested_page_fault = false;
10913                 fault.address = work->arch.token;
10914                 fault.async_page_fault = true;
10915                 kvm_inject_page_fault(vcpu, &fault);
10916                 return true;
10917         } else {
10918                 /*
10919                  * It is not possible to deliver a paravirtualized asynchronous
10920                  * page fault, but putting the guest in an artificial halt state
10921                  * can be beneficial nevertheless: if an interrupt arrives, we
10922                  * can deliver it timely and perhaps the guest will schedule
10923                  * another process.  When the instruction that triggered a page
10924                  * fault is retried, hopefully the page will be ready in the host.
10925                  */
10926                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
10927                 return false;
10928         }
10929 }
10930
10931 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
10932                                  struct kvm_async_pf *work)
10933 {
10934         struct kvm_lapic_irq irq = {
10935                 .delivery_mode = APIC_DM_FIXED,
10936                 .vector = vcpu->arch.apf.vec
10937         };
10938
10939         if (work->wakeup_all)
10940                 work->arch.token = ~0; /* broadcast wakeup */
10941         else
10942                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
10943         trace_kvm_async_pf_ready(work->arch.token, work->cr2_or_gpa);
10944
10945         if ((work->wakeup_all || work->notpresent_injected) &&
10946             kvm_pv_async_pf_enabled(vcpu) &&
10947             !apf_put_user_ready(vcpu, work->arch.token)) {
10948                 vcpu->arch.apf.pageready_pending = true;
10949                 kvm_apic_set_irq(vcpu, &irq, NULL);
10950         }
10951
10952         vcpu->arch.apf.halted = false;
10953         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10954 }
10955
10956 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu)
10957 {
10958         kvm_make_request(KVM_REQ_APF_READY, vcpu);
10959         if (!vcpu->arch.apf.pageready_pending)
10960                 kvm_vcpu_kick(vcpu);
10961 }
10962
10963 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu)
10964 {
10965         if (!kvm_pv_async_pf_enabled(vcpu))
10966                 return true;
10967         else
10968                 return apf_pageready_slot_free(vcpu);
10969 }
10970
10971 void kvm_arch_start_assignment(struct kvm *kvm)
10972 {
10973         atomic_inc(&kvm->arch.assigned_device_count);
10974 }
10975 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
10976
10977 void kvm_arch_end_assignment(struct kvm *kvm)
10978 {
10979         atomic_dec(&kvm->arch.assigned_device_count);
10980 }
10981 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
10982
10983 bool kvm_arch_has_assigned_device(struct kvm *kvm)
10984 {
10985         return atomic_read(&kvm->arch.assigned_device_count);
10986 }
10987 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
10988
10989 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
10990 {
10991         atomic_inc(&kvm->arch.noncoherent_dma_count);
10992 }
10993 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
10994
10995 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
10996 {
10997         atomic_dec(&kvm->arch.noncoherent_dma_count);
10998 }
10999 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
11000
11001 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
11002 {
11003         return atomic_read(&kvm->arch.noncoherent_dma_count);
11004 }
11005 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
11006
11007 bool kvm_arch_has_irq_bypass(void)
11008 {
11009         return true;
11010 }
11011
11012 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
11013                                       struct irq_bypass_producer *prod)
11014 {
11015         struct kvm_kernel_irqfd *irqfd =
11016                 container_of(cons, struct kvm_kernel_irqfd, consumer);
11017         int ret;
11018
11019         irqfd->producer = prod;
11020         kvm_arch_start_assignment(irqfd->kvm);
11021         ret = kvm_x86_ops.update_pi_irte(irqfd->kvm,
11022                                          prod->irq, irqfd->gsi, 1);
11023
11024         if (ret)
11025                 kvm_arch_end_assignment(irqfd->kvm);
11026
11027         return ret;
11028 }
11029
11030 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
11031                                       struct irq_bypass_producer *prod)
11032 {
11033         int ret;
11034         struct kvm_kernel_irqfd *irqfd =
11035                 container_of(cons, struct kvm_kernel_irqfd, consumer);
11036
11037         WARN_ON(irqfd->producer != prod);
11038         irqfd->producer = NULL;
11039
11040         /*
11041          * When producer of consumer is unregistered, we change back to
11042          * remapped mode, so we can re-use the current implementation
11043          * when the irq is masked/disabled or the consumer side (KVM
11044          * int this case doesn't want to receive the interrupts.
11045         */
11046         ret = kvm_x86_ops.update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
11047         if (ret)
11048                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
11049                        " fails: %d\n", irqfd->consumer.token, ret);
11050
11051         kvm_arch_end_assignment(irqfd->kvm);
11052 }
11053
11054 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
11055                                    uint32_t guest_irq, bool set)
11056 {
11057         return kvm_x86_ops.update_pi_irte(kvm, host_irq, guest_irq, set);
11058 }
11059
11060 bool kvm_vector_hashing_enabled(void)
11061 {
11062         return vector_hashing;
11063 }
11064
11065 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
11066 {
11067         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
11068 }
11069 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
11070
11071
11072 int kvm_spec_ctrl_test_value(u64 value)
11073 {
11074         /*
11075          * test that setting IA32_SPEC_CTRL to given value
11076          * is allowed by the host processor
11077          */
11078
11079         u64 saved_value;
11080         unsigned long flags;
11081         int ret = 0;
11082
11083         local_irq_save(flags);
11084
11085         if (rdmsrl_safe(MSR_IA32_SPEC_CTRL, &saved_value))
11086                 ret = 1;
11087         else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL, value))
11088                 ret = 1;
11089         else
11090                 wrmsrl(MSR_IA32_SPEC_CTRL, saved_value);
11091
11092         local_irq_restore(flags);
11093
11094         return ret;
11095 }
11096 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value);
11097
11098 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code)
11099 {
11100         struct x86_exception fault;
11101         u32 access = error_code &
11102                 (PFERR_WRITE_MASK | PFERR_FETCH_MASK | PFERR_USER_MASK);
11103
11104         if (!(error_code & PFERR_PRESENT_MASK) ||
11105             vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, &fault) != UNMAPPED_GVA) {
11106                 /*
11107                  * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
11108                  * tables probably do not match the TLB.  Just proceed
11109                  * with the error code that the processor gave.
11110                  */
11111                 fault.vector = PF_VECTOR;
11112                 fault.error_code_valid = true;
11113                 fault.error_code = error_code;
11114                 fault.nested_page_fault = false;
11115                 fault.address = gva;
11116         }
11117         vcpu->arch.walk_mmu->inject_page_fault(vcpu, &fault);
11118 }
11119 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error);
11120
11121 /*
11122  * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
11123  * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
11124  * indicates whether exit to userspace is needed.
11125  */
11126 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
11127                               struct x86_exception *e)
11128 {
11129         if (r == X86EMUL_PROPAGATE_FAULT) {
11130                 kvm_inject_emulated_page_fault(vcpu, e);
11131                 return 1;
11132         }
11133
11134         /*
11135          * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
11136          * while handling a VMX instruction KVM could've handled the request
11137          * correctly by exiting to userspace and performing I/O but there
11138          * doesn't seem to be a real use-case behind such requests, just return
11139          * KVM_EXIT_INTERNAL_ERROR for now.
11140          */
11141         vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
11142         vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
11143         vcpu->run->internal.ndata = 0;
11144
11145         return 0;
11146 }
11147 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure);
11148
11149 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva)
11150 {
11151         bool pcid_enabled;
11152         struct x86_exception e;
11153         unsigned i;
11154         unsigned long roots_to_free = 0;
11155         struct {
11156                 u64 pcid;
11157                 u64 gla;
11158         } operand;
11159         int r;
11160
11161         r = kvm_read_guest_virt(vcpu, gva, &operand, sizeof(operand), &e);
11162         if (r != X86EMUL_CONTINUE)
11163                 return kvm_handle_memory_failure(vcpu, r, &e);
11164
11165         if (operand.pcid >> 12 != 0) {
11166                 kvm_inject_gp(vcpu, 0);
11167                 return 1;
11168         }
11169
11170         pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
11171
11172         switch (type) {
11173         case INVPCID_TYPE_INDIV_ADDR:
11174                 if ((!pcid_enabled && (operand.pcid != 0)) ||
11175                     is_noncanonical_address(operand.gla, vcpu)) {
11176                         kvm_inject_gp(vcpu, 0);
11177                         return 1;
11178                 }
11179                 kvm_mmu_invpcid_gva(vcpu, operand.gla, operand.pcid);
11180                 return kvm_skip_emulated_instruction(vcpu);
11181
11182         case INVPCID_TYPE_SINGLE_CTXT:
11183                 if (!pcid_enabled && (operand.pcid != 0)) {
11184                         kvm_inject_gp(vcpu, 0);
11185                         return 1;
11186                 }
11187
11188                 if (kvm_get_active_pcid(vcpu) == operand.pcid) {
11189                         kvm_mmu_sync_roots(vcpu);
11190                         kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
11191                 }
11192
11193                 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
11194                         if (kvm_get_pcid(vcpu, vcpu->arch.mmu->prev_roots[i].pgd)
11195                             == operand.pcid)
11196                                 roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
11197
11198                 kvm_mmu_free_roots(vcpu, vcpu->arch.mmu, roots_to_free);
11199                 /*
11200                  * If neither the current cr3 nor any of the prev_roots use the
11201                  * given PCID, then nothing needs to be done here because a
11202                  * resync will happen anyway before switching to any other CR3.
11203                  */
11204
11205                 return kvm_skip_emulated_instruction(vcpu);
11206
11207         case INVPCID_TYPE_ALL_NON_GLOBAL:
11208                 /*
11209                  * Currently, KVM doesn't mark global entries in the shadow
11210                  * page tables, so a non-global flush just degenerates to a
11211                  * global flush. If needed, we could optimize this later by
11212                  * keeping track of global entries in shadow page tables.
11213                  */
11214
11215                 fallthrough;
11216         case INVPCID_TYPE_ALL_INCL_GLOBAL:
11217                 kvm_mmu_unload(vcpu);
11218                 return kvm_skip_emulated_instruction(vcpu);
11219
11220         default:
11221                 BUG(); /* We have already checked above that type <= 3 */
11222         }
11223 }
11224 EXPORT_SYMBOL_GPL(kvm_handle_invpcid);
11225
11226 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
11227 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
11228 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
11229 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
11230 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
11231 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
11232 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
11233 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
11234 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
11235 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
11236 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
11237 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
11238 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
11239 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
11240 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
11241 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
11242 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
11243 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
11244 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
11245 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);
11246 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log);
11247 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request);