arch/x86/kvm/x86.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * derived from drivers/kvm/kvm_main.c
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  * Copyright (C) 2008 Qumranet, Inc.
   9  * Copyright IBM Corporation, 2008
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *   Yaniv Kamay  <yaniv@qumranet.com>
  15  *   Amit Shah    <amit.shah@qumranet.com>
  16  *   Ben-Ami Yassour <benami@il.ibm.com>
  17  */
  18
  19 #include <linux/kvm_host.h>
  20 #include "irq.h"
  21 #include "ioapic.h"
  22 #include "mmu.h"
  23 #include "i8254.h"
  24 #include "tss.h"
  25 #include "kvm_cache_regs.h"
  26 #include "kvm_emulate.h"
  27 #include "x86.h"
  28 #include "cpuid.h"
  29 #include "pmu.h"
  30 #include "hyperv.h"
  31 #include "lapic.h"
  32
  33 #include <linux/clocksource.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/kvm.h>
  36 #include <linux/fs.h>
  37 #include <linux/vmalloc.h>
  38 #include <linux/export.h>
  39 #include <linux/moduleparam.h>
  40 #include <linux/mman.h>
  41 #include <linux/highmem.h>
  42 #include <linux/iommu.h>
  43 #include <linux/intel-iommu.h>
  44 #include <linux/cpufreq.h>
  45 #include <linux/user-return-notifier.h>
  46 #include <linux/srcu.h>
  47 #include <linux/slab.h>
  48 #include <linux/perf_event.h>
  49 #include <linux/uaccess.h>
  50 #include <linux/hash.h>
  51 #include <linux/pci.h>
  52 #include <linux/timekeeper_internal.h>
  53 #include <linux/pvclock_gtod.h>
  54 #include <linux/kvm_irqfd.h>
  55 #include <linux/irqbypass.h>
  56 #include <linux/sched/stat.h>
  57 #include <linux/sched/isolation.h>
  58 #include <linux/mem_encrypt.h>
  59 #include <linux/entry-kvm.h>
  60
  61 #include <trace/events/kvm.h>
  62
  63 #include <asm/debugreg.h>
  64 #include <asm/msr.h>
  65 #include <asm/desc.h>
  66 #include <asm/mce.h>
  67 #include <linux/kernel_stat.h>
  68 #include <asm/fpu/internal.h> /* Ugh! */
  69 #include <asm/pvclock.h>
  70 #include <asm/div64.h>
  71 #include <asm/irq_remapping.h>
  72 #include <asm/mshyperv.h>
  73 #include <asm/hypervisor.h>
  74 #include <asm/tlbflush.h>
  75 #include <asm/intel_pt.h>
  76 #include <asm/emulate_prefix.h>
  77 #include <clocksource/hyperv_timer.h>
  78
  79 #define CREATE_TRACE_POINTS
  80 #include "trace.h"
  81
  82 #define MAX_IO_MSRS 256
  83 #define KVM_MAX_MCE_BANKS 32
  84 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  85 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  86
  87 #define emul_to_vcpu(ctxt) \
  88         ((struct kvm_vcpu *)(ctxt)->vcpu)
  89
  90 /* EFER defaults:
  91  * - enable syscall per default because its emulated by KVM
  92  * - enable LME and LMA per default on 64 bit KVM
  93  */
  94 #ifdef CONFIG_X86_64
  95 static
  96 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  97 #else
  98 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  99 #endif
 100
 101 static u64 __read_mostly cr4_reserved_bits = CR4_RESERVED_BITS;
 102
 103 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
 104                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 105
 106 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 107 static void process_nmi(struct kvm_vcpu *vcpu);
 108 static void enter_smm(struct kvm_vcpu *vcpu);
 109 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 110 static void store_regs(struct kvm_vcpu *vcpu);
 111 static int sync_regs(struct kvm_vcpu *vcpu);
 112
 113 struct kvm_x86_ops kvm_x86_ops __read_mostly;
 114 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 115
 116 static bool __read_mostly ignore_msrs = 0;
 117 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 118
 119 static bool __read_mostly report_ignored_msrs = true;
 120 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 121
 122 unsigned int min_timer_period_us = 200;
 123 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 124
 125 static bool __read_mostly kvmclock_periodic_sync = true;
 126 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 127
 128 bool __read_mostly kvm_has_tsc_control;
 129 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 130 u32  __read_mostly kvm_max_guest_tsc_khz;
 131 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 132 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 133 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 134 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 135 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 136 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 137 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 138
 139 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 140 static u32 __read_mostly tsc_tolerance_ppm = 250;
 141 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 142
 143 /*
 144  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 145  * adaptive tuning starting from default advancment of 1000ns.  '0' disables
 146  * advancement entirely.  Any other value is used as-is and disables adaptive
 147  * tuning, i.e. allows priveleged userspace to set an exact advancement time.
 148  */
 149 static int __read_mostly lapic_timer_advance_ns = -1;
 150 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 151
 152 static bool __read_mostly vector_hashing = true;
 153 module_param(vector_hashing, bool, S_IRUGO);
 154
 155 bool __read_mostly enable_vmware_backdoor = false;
 156 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 157 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 158
 159 static bool __read_mostly force_emulation_prefix = false;
 160 module_param(force_emulation_prefix, bool, S_IRUGO);
 161
 162 int __read_mostly pi_inject_timer = -1;
 163 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
 164
 165 /*
 166  * Restoring the host value for MSRs that are only consumed when running in
 167  * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
 168  * returns to userspace, i.e. the kernel can run with the guest's value.
 169  */
 170 #define KVM_MAX_NR_USER_RETURN_MSRS 16
 171
 172 struct kvm_user_return_msrs_global {
 173         int nr;
 174         u32 msrs[KVM_MAX_NR_USER_RETURN_MSRS];
 175 };
 176
 177 struct kvm_user_return_msrs {
 178         struct user_return_notifier urn;
 179         bool registered;
 180         struct kvm_user_return_msr_values {
 181                 u64 host;
 182                 u64 curr;
 183         } values[KVM_MAX_NR_USER_RETURN_MSRS];
 184 };
 185
 186 static struct kvm_user_return_msrs_global __read_mostly user_return_msrs_global;
 187 static struct kvm_user_return_msrs __percpu *user_return_msrs;
 188
 189 #define KVM_SUPPORTED_XCR0     (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
 190                                 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
 191                                 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
 192                                 | XFEATURE_MASK_PKRU)
 193
 194 u64 __read_mostly host_efer;
 195 EXPORT_SYMBOL_GPL(host_efer);
 196
 197 bool __read_mostly allow_smaller_maxphyaddr = 0;
 198 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr);
 199
 200 static u64 __read_mostly host_xss;
 201 u64 __read_mostly supported_xss;
 202 EXPORT_SYMBOL_GPL(supported_xss);
 203
 204 struct kvm_stats_debugfs_item debugfs_entries[] = {
 205         VCPU_STAT("pf_fixed", pf_fixed),
 206         VCPU_STAT("pf_guest", pf_guest),
 207         VCPU_STAT("tlb_flush", tlb_flush),
 208         VCPU_STAT("invlpg", invlpg),
 209         VCPU_STAT("exits", exits),
 210         VCPU_STAT("io_exits", io_exits),
 211         VCPU_STAT("mmio_exits", mmio_exits),
 212         VCPU_STAT("signal_exits", signal_exits),
 213         VCPU_STAT("irq_window", irq_window_exits),
 214         VCPU_STAT("nmi_window", nmi_window_exits),
 215         VCPU_STAT("halt_exits", halt_exits),
 216         VCPU_STAT("halt_successful_poll", halt_successful_poll),
 217         VCPU_STAT("halt_attempted_poll", halt_attempted_poll),
 218         VCPU_STAT("halt_poll_invalid", halt_poll_invalid),
 219         VCPU_STAT("halt_wakeup", halt_wakeup),
 220         VCPU_STAT("hypercalls", hypercalls),
 221         VCPU_STAT("request_irq", request_irq_exits),
 222         VCPU_STAT("irq_exits", irq_exits),
 223         VCPU_STAT("host_state_reload", host_state_reload),
 224         VCPU_STAT("fpu_reload", fpu_reload),
 225         VCPU_STAT("insn_emulation", insn_emulation),
 226         VCPU_STAT("insn_emulation_fail", insn_emulation_fail),
 227         VCPU_STAT("irq_injections", irq_injections),
 228         VCPU_STAT("nmi_injections", nmi_injections),
 229         VCPU_STAT("req_event", req_event),
 230         VCPU_STAT("l1d_flush", l1d_flush),
 231         VCPU_STAT("halt_poll_success_ns", halt_poll_success_ns),
 232         VCPU_STAT("halt_poll_fail_ns", halt_poll_fail_ns),
 233         VM_STAT("mmu_shadow_zapped", mmu_shadow_zapped),
 234         VM_STAT("mmu_pte_write", mmu_pte_write),
 235         VM_STAT("mmu_pte_updated", mmu_pte_updated),
 236         VM_STAT("mmu_pde_zapped", mmu_pde_zapped),
 237         VM_STAT("mmu_flooded", mmu_flooded),
 238         VM_STAT("mmu_recycled", mmu_recycled),
 239         VM_STAT("mmu_cache_miss", mmu_cache_miss),
 240         VM_STAT("mmu_unsync", mmu_unsync),
 241         VM_STAT("remote_tlb_flush", remote_tlb_flush),
 242         VM_STAT("largepages", lpages, .mode = 0444),
 243         VM_STAT("nx_largepages_splitted", nx_lpage_splits, .mode = 0444),
 244         VM_STAT("max_mmu_page_hash_collisions", max_mmu_page_hash_collisions),
 245         { NULL }
 246 };
 247
 248 u64 __read_mostly host_xcr0;
 249 u64 __read_mostly supported_xcr0;
 250 EXPORT_SYMBOL_GPL(supported_xcr0);
 251
 252 static struct kmem_cache *x86_fpu_cache;
 253
 254 static struct kmem_cache *x86_emulator_cache;
 255
 256 /*
 257  * When called, it means the previous get/set msr reached an invalid msr.
 258  * Return true if we want to ignore/silent this failed msr access.
 259  */
 260 static bool kvm_msr_ignored_check(struct kvm_vcpu *vcpu, u32 msr,
 261                                   u64 data, bool write)
 262 {
 263         const char *op = write ? "wrmsr" : "rdmsr";
 264
 265         if (ignore_msrs) {
 266                 if (report_ignored_msrs)
 267                         kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
 268                                       op, msr, data);
 269                 /* Mask the error */
 270                 return true;
 271         } else {
 272                 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
 273                                       op, msr, data);
 274                 return false;
 275         }
 276 }
 277
 278 static struct kmem_cache *kvm_alloc_emulator_cache(void)
 279 {
 280         unsigned int useroffset = offsetof(struct x86_emulate_ctxt, src);
 281         unsigned int size = sizeof(struct x86_emulate_ctxt);
 282
 283         return kmem_cache_create_usercopy("x86_emulator", size,
 284                                           __alignof__(struct x86_emulate_ctxt),
 285                                           SLAB_ACCOUNT, useroffset,
 286                                           size - useroffset, NULL);
 287 }
 288
 289 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 290
 291 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 292 {
 293         int i;
 294         for (i = 0; i < ASYNC_PF_PER_VCPU; i++)
 295                 vcpu->arch.apf.gfns[i] = ~0;
 296 }
 297
 298 static void kvm_on_user_return(struct user_return_notifier *urn)
 299 {
 300         unsigned slot;
 301         struct kvm_user_return_msrs *msrs
 302                 = container_of(urn, struct kvm_user_return_msrs, urn);
 303         struct kvm_user_return_msr_values *values;
 304         unsigned long flags;
 305
 306         /*
 307          * Disabling irqs at this point since the following code could be
 308          * interrupted and executed through kvm_arch_hardware_disable()
 309          */
 310         local_irq_save(flags);
 311         if (msrs->registered) {
 312                 msrs->registered = false;
 313                 user_return_notifier_unregister(urn);
 314         }
 315         local_irq_restore(flags);
 316         for (slot = 0; slot < user_return_msrs_global.nr; ++slot) {
 317                 values = &msrs->values[slot];
 318                 if (values->host != values->curr) {
 319                         wrmsrl(user_return_msrs_global.msrs[slot], values->host);
 320                         values->curr = values->host;
 321                 }
 322         }
 323 }
 324
 325 void kvm_define_user_return_msr(unsigned slot, u32 msr)
 326 {
 327         BUG_ON(slot >= KVM_MAX_NR_USER_RETURN_MSRS);
 328         user_return_msrs_global.msrs[slot] = msr;
 329         if (slot >= user_return_msrs_global.nr)
 330                 user_return_msrs_global.nr = slot + 1;
 331 }
 332 EXPORT_SYMBOL_GPL(kvm_define_user_return_msr);
 333
 334 static void kvm_user_return_msr_cpu_online(void)
 335 {
 336         unsigned int cpu = smp_processor_id();
 337         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 338         u64 value;
 339         int i;
 340
 341         for (i = 0; i < user_return_msrs_global.nr; ++i) {
 342                 rdmsrl_safe(user_return_msrs_global.msrs[i], &value);
 343                 msrs->values[i].host = value;
 344                 msrs->values[i].curr = value;
 345         }
 346 }
 347
 348 int kvm_set_user_return_msr(unsigned slot, u64 value, u64 mask)
 349 {
 350         unsigned int cpu = smp_processor_id();
 351         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 352         int err;
 353
 354         value = (value & mask) | (msrs->values[slot].host & ~mask);
 355         if (value == msrs->values[slot].curr)
 356                 return 0;
 357         err = wrmsrl_safe(user_return_msrs_global.msrs[slot], value);
 358         if (err)
 359                 return 1;
 360
 361         msrs->values[slot].curr = value;
 362         if (!msrs->registered) {
 363                 msrs->urn.on_user_return = kvm_on_user_return;
 364                 user_return_notifier_register(&msrs->urn);
 365                 msrs->registered = true;
 366         }
 367         return 0;
 368 }
 369 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr);
 370
 371 static void drop_user_return_notifiers(void)
 372 {
 373         unsigned int cpu = smp_processor_id();
 374         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 375
 376         if (msrs->registered)
 377                 kvm_on_user_return(&msrs->urn);
 378 }
 379
 380 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 381 {
 382         return vcpu->arch.apic_base;
 383 }
 384 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 385
 386 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 387 {
 388         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 389 }
 390 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 391
 392 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 393 {
 394         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 395         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 396         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) | 0x2ff |
 397                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 398
 399         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 400                 return 1;
 401         if (!msr_info->host_initiated) {
 402                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 403                         return 1;
 404                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 405                         return 1;
 406         }
 407
 408         kvm_lapic_set_base(vcpu, msr_info->data);
 409         kvm_recalculate_apic_map(vcpu->kvm);
 410         return 0;
 411 }
 412 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 413
 414 asmlinkage __visible noinstr void kvm_spurious_fault(void)
 415 {
 416         /* Fault while not rebooting.  We want the trace. */
 417         BUG_ON(!kvm_rebooting);
 418 }
 419 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 420
 421 #define EXCPT_BENIGN            0
 422 #define EXCPT_CONTRIBUTORY      1
 423 #define EXCPT_PF                2
 424
 425 static int exception_class(int vector)
 426 {
 427         switch (vector) {
 428         case PF_VECTOR:
 429                 return EXCPT_PF;
 430         case DE_VECTOR:
 431         case TS_VECTOR:
 432         case NP_VECTOR:
 433         case SS_VECTOR:
 434         case GP_VECTOR:
 435                 return EXCPT_CONTRIBUTORY;
 436         default:
 437                 break;
 438         }
 439         return EXCPT_BENIGN;
 440 }
 441
 442 #define EXCPT_FAULT             0
 443 #define EXCPT_TRAP              1
 444 #define EXCPT_ABORT             2
 445 #define EXCPT_INTERRUPT         3
 446
 447 static int exception_type(int vector)
 448 {
 449         unsigned int mask;
 450
 451         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 452                 return EXCPT_INTERRUPT;
 453
 454         mask = 1 << vector;
 455
 456         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 457         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 458                 return EXCPT_TRAP;
 459
 460         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 461                 return EXCPT_ABORT;
 462
 463         /* Reserved exceptions will result in fault */
 464         return EXCPT_FAULT;
 465 }
 466
 467 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 468 {
 469         unsigned nr = vcpu->arch.exception.nr;
 470         bool has_payload = vcpu->arch.exception.has_payload;
 471         unsigned long payload = vcpu->arch.exception.payload;
 472
 473         if (!has_payload)
 474                 return;
 475
 476         switch (nr) {
 477         case DB_VECTOR:
 478                 /*
 479                  * "Certain debug exceptions may clear bit 0-3.  The
 480                  * remaining contents of the DR6 register are never
 481                  * cleared by the processor".
 482                  */
 483                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 484                 /*
 485                  * DR6.RTM is set by all #DB exceptions that don't clear it.
 486                  */
 487                 vcpu->arch.dr6 |= DR6_RTM;
 488                 vcpu->arch.dr6 |= payload;
 489                 /*
 490                  * Bit 16 should be set in the payload whenever the #DB
 491                  * exception should clear DR6.RTM. This makes the payload
 492                  * compatible with the pending debug exceptions under VMX.
 493                  * Though not currently documented in the SDM, this also
 494                  * makes the payload compatible with the exit qualification
 495                  * for #DB exceptions under VMX.
 496                  */
 497                 vcpu->arch.dr6 ^= payload & DR6_RTM;
 498
 499                 /*
 500                  * The #DB payload is defined as compatible with the 'pending
 501                  * debug exceptions' field under VMX, not DR6. While bit 12 is
 502                  * defined in the 'pending debug exceptions' field (enabled
 503                  * breakpoint), it is reserved and must be zero in DR6.
 504                  */
 505                 vcpu->arch.dr6 &= ~BIT(12);
 506                 break;
 507         case PF_VECTOR:
 508                 vcpu->arch.cr2 = payload;
 509                 break;
 510         }
 511
 512         vcpu->arch.exception.has_payload = false;
 513         vcpu->arch.exception.payload = 0;
 514 }
 515 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 516
 517 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 518                 unsigned nr, bool has_error, u32 error_code,
 519                 bool has_payload, unsigned long payload, bool reinject)
 520 {
 521         u32 prev_nr;
 522         int class1, class2;
 523
 524         kvm_make_request(KVM_REQ_EVENT, vcpu);
 525
 526         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 527         queue:
 528                 if (has_error && !is_protmode(vcpu))
 529                         has_error = false;
 530                 if (reinject) {
 531                         /*
 532                          * On vmentry, vcpu->arch.exception.pending is only
 533                          * true if an event injection was blocked by
 534                          * nested_run_pending.  In that case, however,
 535                          * vcpu_enter_guest requests an immediate exit,
 536                          * and the guest shouldn't proceed far enough to
 537                          * need reinjection.
 538                          */
 539                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 540                         vcpu->arch.exception.injected = true;
 541                         if (WARN_ON_ONCE(has_payload)) {
 542                                 /*
 543                                  * A reinjected event has already
 544                                  * delivered its payload.
 545                                  */
 546                                 has_payload = false;
 547                                 payload = 0;
 548                         }
 549                 } else {
 550                         vcpu->arch.exception.pending = true;
 551                         vcpu->arch.exception.injected = false;
 552                 }
 553                 vcpu->arch.exception.has_error_code = has_error;
 554                 vcpu->arch.exception.nr = nr;
 555                 vcpu->arch.exception.error_code = error_code;
 556                 vcpu->arch.exception.has_payload = has_payload;
 557                 vcpu->arch.exception.payload = payload;
 558                 if (!is_guest_mode(vcpu))
 559                         kvm_deliver_exception_payload(vcpu);
 560                 return;
 561         }
 562
 563         /* to check exception */
 564         prev_nr = vcpu->arch.exception.nr;
 565         if (prev_nr == DF_VECTOR) {
 566                 /* triple fault -> shutdown */
 567                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 568                 return;
 569         }
 570         class1 = exception_class(prev_nr);
 571         class2 = exception_class(nr);
 572         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 573                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 574                 /*
 575                  * Generate double fault per SDM Table 5-5.  Set
 576                  * exception.pending = true so that the double fault
 577                  * can trigger a nested vmexit.
 578                  */
 579                 vcpu->arch.exception.pending = true;
 580                 vcpu->arch.exception.injected = false;
 581                 vcpu->arch.exception.has_error_code = true;
 582                 vcpu->arch.exception.nr = DF_VECTOR;
 583                 vcpu->arch.exception.error_code = 0;
 584                 vcpu->arch.exception.has_payload = false;
 585                 vcpu->arch.exception.payload = 0;
 586         } else
 587                 /* replace previous exception with a new one in a hope
 588                    that instruction re-execution will regenerate lost
 589                    exception */
 590                 goto queue;
 591 }
 592
 593 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 594 {
 595         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 596 }
 597 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 598
 599 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 600 {
 601         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 602 }
 603 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 604
 605 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 606                            unsigned long payload)
 607 {
 608         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 609 }
 610 EXPORT_SYMBOL_GPL(kvm_queue_exception_p);
 611
 612 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 613                                     u32 error_code, unsigned long payload)
 614 {
 615         kvm_multiple_exception(vcpu, nr, true, error_code,
 616                                true, payload, false);
 617 }
 618
 619 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 620 {
 621         if (err)
 622                 kvm_inject_gp(vcpu, 0);
 623         else
 624                 return kvm_skip_emulated_instruction(vcpu);
 625
 626         return 1;
 627 }
 628 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 629
 630 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 631 {
 632         ++vcpu->stat.pf_guest;
 633         vcpu->arch.exception.nested_apf =
 634                 is_guest_mode(vcpu) && fault->async_page_fault;
 635         if (vcpu->arch.exception.nested_apf) {
 636                 vcpu->arch.apf.nested_apf_token = fault->address;
 637                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 638         } else {
 639                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 640                                         fault->address);
 641         }
 642 }
 643 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 644
 645 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
 646                                     struct x86_exception *fault)
 647 {
 648         struct kvm_mmu *fault_mmu;
 649         WARN_ON_ONCE(fault->vector != PF_VECTOR);
 650
 651         fault_mmu = fault->nested_page_fault ? vcpu->arch.mmu :
 652                                                vcpu->arch.walk_mmu;
 653
 654         /*
 655          * Invalidate the TLB entry for the faulting address, if it exists,
 656          * else the access will fault indefinitely (and to emulate hardware).
 657          */
 658         if ((fault->error_code & PFERR_PRESENT_MASK) &&
 659             !(fault->error_code & PFERR_RSVD_MASK))
 660                 kvm_mmu_invalidate_gva(vcpu, fault_mmu, fault->address,
 661                                        fault_mmu->root_hpa);
 662
 663         fault_mmu->inject_page_fault(vcpu, fault);
 664         return fault->nested_page_fault;
 665 }
 666 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault);
 667
 668 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 669 {
 670         atomic_inc(&vcpu->arch.nmi_queued);
 671         kvm_make_request(KVM_REQ_NMI, vcpu);
 672 }
 673 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 674
 675 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 676 {
 677         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 678 }
 679 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 680
 681 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 682 {
 683         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 684 }
 685 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 686
 687 /*
 688  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 689  * a #GP and return false.
 690  */
 691 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 692 {
 693         if (kvm_x86_ops.get_cpl(vcpu) <= required_cpl)
 694                 return true;
 695         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 696         return false;
 697 }
 698 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 699
 700 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 701 {
 702         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 703                 return true;
 704
 705         kvm_queue_exception(vcpu, UD_VECTOR);
 706         return false;
 707 }
 708 EXPORT_SYMBOL_GPL(kvm_require_dr);
 709
 710 /*
 711  * This function will be used to read from the physical memory of the currently
 712  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 713  * can read from guest physical or from the guest's guest physical memory.
 714  */
 715 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 716                             gfn_t ngfn, void *data, int offset, int len,
 717                             u32 access)
 718 {
 719         struct x86_exception exception;
 720         gfn_t real_gfn;
 721         gpa_t ngpa;
 722
 723         ngpa     = gfn_to_gpa(ngfn);
 724         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 725         if (real_gfn == UNMAPPED_GVA)
 726                 return -EFAULT;
 727
 728         real_gfn = gpa_to_gfn(real_gfn);
 729
 730         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 731 }
 732 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 733
 734 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 735                                void *data, int offset, int len, u32 access)
 736 {
 737         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 738                                        data, offset, len, access);
 739 }
 740
 741 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
 742 {
 743         return rsvd_bits(cpuid_maxphyaddr(vcpu), 63) | rsvd_bits(5, 8) |
 744                rsvd_bits(1, 2);
 745 }
 746
 747 /*
 748  * Load the pae pdptrs.  Return 1 if they are all valid, 0 otherwise.
 749  */
 750 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 751 {
 752         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 753         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 754         int i;
 755         int ret;
 756         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 757
 758         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 759                                       offset * sizeof(u64), sizeof(pdpte),
 760                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 761         if (ret < 0) {
 762                 ret = 0;
 763                 goto out;
 764         }
 765         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 766                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 767                     (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
 768                         ret = 0;
 769                         goto out;
 770                 }
 771         }
 772         ret = 1;
 773
 774         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 775         kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
 776
 777 out:
 778
 779         return ret;
 780 }
 781 EXPORT_SYMBOL_GPL(load_pdptrs);
 782
 783 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 784 {
 785         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 786         int offset;
 787         gfn_t gfn;
 788         int r;
 789
 790         if (!is_pae_paging(vcpu))
 791                 return false;
 792
 793         if (!kvm_register_is_available(vcpu, VCPU_EXREG_PDPTR))
 794                 return true;
 795
 796         gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
 797         offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
 798         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 799                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 800         if (r < 0)
 801                 return true;
 802
 803         return memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 804 }
 805 EXPORT_SYMBOL_GPL(pdptrs_changed);
 806
 807 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 808 {
 809         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 810         unsigned long pdptr_bits = X86_CR0_CD | X86_CR0_NW | X86_CR0_PG;
 811         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 812
 813         cr0 |= X86_CR0_ET;
 814
 815 #ifdef CONFIG_X86_64
 816         if (cr0 & 0xffffffff00000000UL)
 817                 return 1;
 818 #endif
 819
 820         cr0 &= ~CR0_RESERVED_BITS;
 821
 822         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 823                 return 1;
 824
 825         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 826                 return 1;
 827
 828 #ifdef CONFIG_X86_64
 829         if ((vcpu->arch.efer & EFER_LME) && !is_paging(vcpu) &&
 830             (cr0 & X86_CR0_PG)) {
 831                 int cs_db, cs_l;
 832
 833                 if (!is_pae(vcpu))
 834                         return 1;
 835                 kvm_x86_ops.get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 836                 if (cs_l)
 837                         return 1;
 838         }
 839 #endif
 840         if (!(vcpu->arch.efer & EFER_LME) && (cr0 & X86_CR0_PG) &&
 841             is_pae(vcpu) && ((cr0 ^ old_cr0) & pdptr_bits) &&
 842             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu)))
 843                 return 1;
 844
 845         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 846                 return 1;
 847
 848         kvm_x86_ops.set_cr0(vcpu, cr0);
 849
 850         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 851                 kvm_clear_async_pf_completion_queue(vcpu);
 852                 kvm_async_pf_hash_reset(vcpu);
 853         }
 854
 855         if ((cr0 ^ old_cr0) & update_bits)
 856                 kvm_mmu_reset_context(vcpu);
 857
 858         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 859             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 860             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 861                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 862
 863         return 0;
 864 }
 865 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 866
 867 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 868 {
 869         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 870 }
 871 EXPORT_SYMBOL_GPL(kvm_lmsw);
 872
 873 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu)
 874 {
 875         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 876
 877                 if (vcpu->arch.xcr0 != host_xcr0)
 878                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 879
 880                 if (vcpu->arch.xsaves_enabled &&
 881                     vcpu->arch.ia32_xss != host_xss)
 882                         wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss);
 883         }
 884
 885         if (static_cpu_has(X86_FEATURE_PKU) &&
 886             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 887              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU)) &&
 888             vcpu->arch.pkru != vcpu->arch.host_pkru)
 889                 __write_pkru(vcpu->arch.pkru);
 890 }
 891 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);
 892
 893 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)
 894 {
 895         if (static_cpu_has(X86_FEATURE_PKU) &&
 896             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 897              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU))) {
 898                 vcpu->arch.pkru = rdpkru();
 899                 if (vcpu->arch.pkru != vcpu->arch.host_pkru)
 900                         __write_pkru(vcpu->arch.host_pkru);
 901         }
 902
 903         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 904
 905                 if (vcpu->arch.xcr0 != host_xcr0)
 906                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 907
 908                 if (vcpu->arch.xsaves_enabled &&
 909                     vcpu->arch.ia32_xss != host_xss)
 910                         wrmsrl(MSR_IA32_XSS, host_xss);
 911         }
 912
 913 }
 914 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state);
 915
 916 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 917 {
 918         u64 xcr0 = xcr;
 919         u64 old_xcr0 = vcpu->arch.xcr0;
 920         u64 valid_bits;
 921
 922         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 923         if (index != XCR_XFEATURE_ENABLED_MASK)
 924                 return 1;
 925         if (!(xcr0 & XFEATURE_MASK_FP))
 926                 return 1;
 927         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 928                 return 1;
 929
 930         /*
 931          * Do not allow the guest to set bits that we do not support
 932          * saving.  However, xcr0 bit 0 is always set, even if the
 933          * emulated CPU does not support XSAVE (see fx_init).
 934          */
 935         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 936         if (xcr0 & ~valid_bits)
 937                 return 1;
 938
 939         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 940             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 941                 return 1;
 942
 943         if (xcr0 & XFEATURE_MASK_AVX512) {
 944                 if (!(xcr0 & XFEATURE_MASK_YMM))
 945                         return 1;
 946                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 947                         return 1;
 948         }
 949         vcpu->arch.xcr0 = xcr0;
 950
 951         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 952                 kvm_update_cpuid_runtime(vcpu);
 953         return 0;
 954 }
 955
 956 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 957 {
 958         if (kvm_x86_ops.get_cpl(vcpu) != 0 ||
 959             __kvm_set_xcr(vcpu, index, xcr)) {
 960                 kvm_inject_gp(vcpu, 0);
 961                 return 1;
 962         }
 963         return 0;
 964 }
 965 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 966
 967 int kvm_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 968 {
 969         if (cr4 & cr4_reserved_bits)
 970                 return -EINVAL;
 971
 972         if (cr4 & vcpu->arch.cr4_guest_rsvd_bits)
 973                 return -EINVAL;
 974
 975         return 0;
 976 }
 977 EXPORT_SYMBOL_GPL(kvm_valid_cr4);
 978
 979 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 980 {
 981         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 982         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 983                                    X86_CR4_SMEP;
 984         unsigned long mmu_role_bits = pdptr_bits | X86_CR4_SMAP | X86_CR4_PKE;
 985
 986         if (kvm_valid_cr4(vcpu, cr4))
 987                 return 1;
 988
 989         if (is_long_mode(vcpu)) {
 990                 if (!(cr4 & X86_CR4_PAE))
 991                         return 1;
 992                 if ((cr4 ^ old_cr4) & X86_CR4_LA57)
 993                         return 1;
 994         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 995                    && ((cr4 ^ old_cr4) & pdptr_bits)
 996                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 997                                    kvm_read_cr3(vcpu)))
 998                 return 1;
 999
1000         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
1001                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
1002                         return 1;
1003
1004                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1005                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
1006                         return 1;
1007         }
1008
1009         if (kvm_x86_ops.set_cr4(vcpu, cr4))
1010                 return 1;
1011
1012         if (((cr4 ^ old_cr4) & mmu_role_bits) ||
1013             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
1014                 kvm_mmu_reset_context(vcpu);
1015
1016         if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
1017                 kvm_update_cpuid_runtime(vcpu);
1018
1019         return 0;
1020 }
1021 EXPORT_SYMBOL_GPL(kvm_set_cr4);
1022
1023 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1024 {
1025         bool skip_tlb_flush = false;
1026 #ifdef CONFIG_X86_64
1027         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
1028
1029         if (pcid_enabled) {
1030                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
1031                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
1032         }
1033 #endif
1034
1035         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
1036                 if (!skip_tlb_flush) {
1037                         kvm_mmu_sync_roots(vcpu);
1038                         kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1039                 }
1040                 return 0;
1041         }
1042
1043         if (is_long_mode(vcpu) &&
1044             (cr3 & rsvd_bits(cpuid_maxphyaddr(vcpu), 63)))
1045                 return 1;
1046         else if (is_pae_paging(vcpu) &&
1047                  !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
1048                 return 1;
1049
1050         kvm_mmu_new_pgd(vcpu, cr3, skip_tlb_flush, skip_tlb_flush);
1051         vcpu->arch.cr3 = cr3;
1052         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
1053
1054         return 0;
1055 }
1056 EXPORT_SYMBOL_GPL(kvm_set_cr3);
1057
1058 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
1059 {
1060         if (cr8 & CR8_RESERVED_BITS)
1061                 return 1;
1062         if (lapic_in_kernel(vcpu))
1063                 kvm_lapic_set_tpr(vcpu, cr8);
1064         else
1065                 vcpu->arch.cr8 = cr8;
1066         return 0;
1067 }
1068 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1069
1070 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1071 {
1072         if (lapic_in_kernel(vcpu))
1073                 return kvm_lapic_get_cr8(vcpu);
1074         else
1075                 return vcpu->arch.cr8;
1076 }
1077 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1078
1079 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1080 {
1081         int i;
1082
1083         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1084                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1085                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1086                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
1087         }
1088 }
1089
1090 void kvm_update_dr7(struct kvm_vcpu *vcpu)
1091 {
1092         unsigned long dr7;
1093
1094         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1095                 dr7 = vcpu->arch.guest_debug_dr7;
1096         else
1097                 dr7 = vcpu->arch.dr7;
1098         kvm_x86_ops.set_dr7(vcpu, dr7);
1099         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1100         if (dr7 & DR7_BP_EN_MASK)
1101                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1102 }
1103 EXPORT_SYMBOL_GPL(kvm_update_dr7);
1104
1105 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1106 {
1107         u64 fixed = DR6_FIXED_1;
1108
1109         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1110                 fixed |= DR6_RTM;
1111         return fixed;
1112 }
1113
1114 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1115 {
1116         size_t size = ARRAY_SIZE(vcpu->arch.db);
1117
1118         switch (dr) {
1119         case 0 ... 3:
1120                 vcpu->arch.db[array_index_nospec(dr, size)] = val;
1121                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1122                         vcpu->arch.eff_db[dr] = val;
1123                 break;
1124         case 4:
1125         case 6:
1126                 if (!kvm_dr6_valid(val))
1127                         return -1; /* #GP */
1128                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1129                 break;
1130         case 5:
1131         default: /* 7 */
1132                 if (!kvm_dr7_valid(val))
1133                         return -1; /* #GP */
1134                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1135                 kvm_update_dr7(vcpu);
1136                 break;
1137         }
1138
1139         return 0;
1140 }
1141
1142 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1143 {
1144         if (__kvm_set_dr(vcpu, dr, val)) {
1145                 kvm_inject_gp(vcpu, 0);
1146                 return 1;
1147         }
1148         return 0;
1149 }
1150 EXPORT_SYMBOL_GPL(kvm_set_dr);
1151
1152 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1153 {
1154         size_t size = ARRAY_SIZE(vcpu->arch.db);
1155
1156         switch (dr) {
1157         case 0 ... 3:
1158                 *val = vcpu->arch.db[array_index_nospec(dr, size)];
1159                 break;
1160         case 4:
1161         case 6:
1162                 *val = vcpu->arch.dr6;
1163                 break;
1164         case 5:
1165         default: /* 7 */
1166                 *val = vcpu->arch.dr7;
1167                 break;
1168         }
1169         return 0;
1170 }
1171 EXPORT_SYMBOL_GPL(kvm_get_dr);
1172
1173 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
1174 {
1175         u32 ecx = kvm_rcx_read(vcpu);
1176         u64 data;
1177         int err;
1178
1179         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
1180         if (err)
1181                 return err;
1182         kvm_rax_write(vcpu, (u32)data);
1183         kvm_rdx_write(vcpu, data >> 32);
1184         return err;
1185 }
1186 EXPORT_SYMBOL_GPL(kvm_rdpmc);
1187
1188 /*
1189  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1190  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1191  *
1192  * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1193  * extract the supported MSRs from the related const lists.
1194  * msrs_to_save is selected from the msrs_to_save_all to reflect the
1195  * capabilities of the host cpu. This capabilities test skips MSRs that are
1196  * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1197  * may depend on host virtualization features rather than host cpu features.
1198  */
1199
1200 static const u32 msrs_to_save_all[] = {
1201         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1202         MSR_STAR,
1203 #ifdef CONFIG_X86_64
1204         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1205 #endif
1206         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1207         MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1208         MSR_IA32_SPEC_CTRL,
1209         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1210         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1211         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1212         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1213         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1214         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1215         MSR_IA32_UMWAIT_CONTROL,
1216
1217         MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1218         MSR_ARCH_PERFMON_FIXED_CTR0 + 2, MSR_ARCH_PERFMON_FIXED_CTR0 + 3,
1219         MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1220         MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1221         MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1222         MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1223         MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1224         MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1225         MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1226         MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1227         MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1228         MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1229         MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1230         MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1231         MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1232         MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1233         MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1234         MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1235         MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1236         MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1237         MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1238         MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1239 };
1240
1241 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
1242 static unsigned num_msrs_to_save;
1243
1244 static const u32 emulated_msrs_all[] = {
1245         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1246         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1247         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1248         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1249         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1250         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1251         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1252         HV_X64_MSR_RESET,
1253         HV_X64_MSR_VP_INDEX,
1254         HV_X64_MSR_VP_RUNTIME,
1255         HV_X64_MSR_SCONTROL,
1256         HV_X64_MSR_STIMER0_CONFIG,
1257         HV_X64_MSR_VP_ASSIST_PAGE,
1258         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1259         HV_X64_MSR_TSC_EMULATION_STATUS,
1260         HV_X64_MSR_SYNDBG_OPTIONS,
1261         HV_X64_MSR_SYNDBG_CONTROL, HV_X64_MSR_SYNDBG_STATUS,
1262         HV_X64_MSR_SYNDBG_SEND_BUFFER, HV_X64_MSR_SYNDBG_RECV_BUFFER,
1263         HV_X64_MSR_SYNDBG_PENDING_BUFFER,
1264
1265         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1266         MSR_KVM_PV_EOI_EN, MSR_KVM_ASYNC_PF_INT, MSR_KVM_ASYNC_PF_ACK,
1267
1268         MSR_IA32_TSC_ADJUST,
1269         MSR_IA32_TSCDEADLINE,
1270         MSR_IA32_ARCH_CAPABILITIES,
1271         MSR_IA32_PERF_CAPABILITIES,
1272         MSR_IA32_MISC_ENABLE,
1273         MSR_IA32_MCG_STATUS,
1274         MSR_IA32_MCG_CTL,
1275         MSR_IA32_MCG_EXT_CTL,
1276         MSR_IA32_SMBASE,
1277         MSR_SMI_COUNT,
1278         MSR_PLATFORM_INFO,
1279         MSR_MISC_FEATURES_ENABLES,
1280         MSR_AMD64_VIRT_SPEC_CTRL,
1281         MSR_IA32_POWER_CTL,
1282         MSR_IA32_UCODE_REV,
1283
1284         /*
1285          * The following list leaves out MSRs whose values are determined
1286          * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1287          * We always support the "true" VMX control MSRs, even if the host
1288          * processor does not, so I am putting these registers here rather
1289          * than in msrs_to_save_all.
1290          */
1291         MSR_IA32_VMX_BASIC,
1292         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1293         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1294         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1295         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1296         MSR_IA32_VMX_MISC,
1297         MSR_IA32_VMX_CR0_FIXED0,
1298         MSR_IA32_VMX_CR4_FIXED0,
1299         MSR_IA32_VMX_VMCS_ENUM,
1300         MSR_IA32_VMX_PROCBASED_CTLS2,
1301         MSR_IA32_VMX_EPT_VPID_CAP,
1302         MSR_IA32_VMX_VMFUNC,
1303
1304         MSR_K7_HWCR,
1305         MSR_KVM_POLL_CONTROL,
1306 };
1307
1308 static u32 emulated_msrs[ARRAY_SIZE(emulated_msrs_all)];
1309 static unsigned num_emulated_msrs;
1310
1311 /*
1312  * List of msr numbers which are used to expose MSR-based features that
1313  * can be used by a hypervisor to validate requested CPU features.
1314  */
1315 static const u32 msr_based_features_all[] = {
1316         MSR_IA32_VMX_BASIC,
1317         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1318         MSR_IA32_VMX_PINBASED_CTLS,
1319         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1320         MSR_IA32_VMX_PROCBASED_CTLS,
1321         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1322         MSR_IA32_VMX_EXIT_CTLS,
1323         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1324         MSR_IA32_VMX_ENTRY_CTLS,
1325         MSR_IA32_VMX_MISC,
1326         MSR_IA32_VMX_CR0_FIXED0,
1327         MSR_IA32_VMX_CR0_FIXED1,
1328         MSR_IA32_VMX_CR4_FIXED0,
1329         MSR_IA32_VMX_CR4_FIXED1,
1330         MSR_IA32_VMX_VMCS_ENUM,
1331         MSR_IA32_VMX_PROCBASED_CTLS2,
1332         MSR_IA32_VMX_EPT_VPID_CAP,
1333         MSR_IA32_VMX_VMFUNC,
1334
1335         MSR_F10H_DECFG,
1336         MSR_IA32_UCODE_REV,
1337         MSR_IA32_ARCH_CAPABILITIES,
1338         MSR_IA32_PERF_CAPABILITIES,
1339 };
1340
1341 static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all)];
1342 static unsigned int num_msr_based_features;
1343
1344 static u64 kvm_get_arch_capabilities(void)
1345 {
1346         u64 data = 0;
1347
1348         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1349                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1350
1351         /*
1352          * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1353          * the nested hypervisor runs with NX huge pages.  If it is not,
1354          * L1 is anyway vulnerable to ITLB_MULTIHIT explots from other
1355          * L1 guests, so it need not worry about its own (L2) guests.
1356          */
1357         data |= ARCH_CAP_PSCHANGE_MC_NO;
1358
1359         /*
1360          * If we're doing cache flushes (either "always" or "cond")
1361          * we will do one whenever the guest does a vmlaunch/vmresume.
1362          * If an outer hypervisor is doing the cache flush for us
1363          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1364          * capability to the guest too, and if EPT is disabled we're not
1365          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1366          * require a nested hypervisor to do a flush of its own.
1367          */
1368         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1369                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1370
1371         if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1372                 data |= ARCH_CAP_RDCL_NO;
1373         if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1374                 data |= ARCH_CAP_SSB_NO;
1375         if (!boot_cpu_has_bug(X86_BUG_MDS))
1376                 data |= ARCH_CAP_MDS_NO;
1377
1378         /*
1379          * On TAA affected systems:
1380          *      - nothing to do if TSX is disabled on the host.
1381          *      - we emulate TSX_CTRL if present on the host.
1382          *        This lets the guest use VERW to clear CPU buffers.
1383          */
1384         if (!boot_cpu_has(X86_FEATURE_RTM))
1385                 data &= ~(ARCH_CAP_TAA_NO | ARCH_CAP_TSX_CTRL_MSR);
1386         else if (!boot_cpu_has_bug(X86_BUG_TAA))
1387                 data |= ARCH_CAP_TAA_NO;
1388
1389         return data;
1390 }
1391
1392 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1393 {
1394         switch (msr->index) {
1395         case MSR_IA32_ARCH_CAPABILITIES:
1396                 msr->data = kvm_get_arch_capabilities();
1397                 break;
1398         case MSR_IA32_UCODE_REV:
1399                 rdmsrl_safe(msr->index, &msr->data);
1400                 break;
1401         default:
1402                 return kvm_x86_ops.get_msr_feature(msr);
1403         }
1404         return 0;
1405 }
1406
1407 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1408 {
1409         struct kvm_msr_entry msr;
1410         int r;
1411
1412         msr.index = index;
1413         r = kvm_get_msr_feature(&msr);
1414
1415         if (r == KVM_MSR_RET_INVALID) {
1416                 /* Unconditionally clear the output for simplicity */
1417                 *data = 0;
1418                 if (kvm_msr_ignored_check(vcpu, index, 0, false))
1419                         r = 0;
1420         }
1421
1422         if (r)
1423                 return r;
1424
1425         *data = msr.data;
1426
1427         return 0;
1428 }
1429
1430 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1431 {
1432         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1433                 return false;
1434
1435         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1436                 return false;
1437
1438         if (efer & (EFER_LME | EFER_LMA) &&
1439             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1440                 return false;
1441
1442         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1443                 return false;
1444
1445         return true;
1446
1447 }
1448 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1449 {
1450         if (efer & efer_reserved_bits)
1451                 return false;
1452
1453         return __kvm_valid_efer(vcpu, efer);
1454 }
1455 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1456
1457 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1458 {
1459         u64 old_efer = vcpu->arch.efer;
1460         u64 efer = msr_info->data;
1461         int r;
1462
1463         if (efer & efer_reserved_bits)
1464                 return 1;
1465
1466         if (!msr_info->host_initiated) {
1467                 if (!__kvm_valid_efer(vcpu, efer))
1468                         return 1;
1469
1470                 if (is_paging(vcpu) &&
1471                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1472                         return 1;
1473         }
1474
1475         efer &= ~EFER_LMA;
1476         efer |= vcpu->arch.efer & EFER_LMA;
1477
1478         r = kvm_x86_ops.set_efer(vcpu, efer);
1479         if (r) {
1480                 WARN_ON(r > 0);
1481                 return r;
1482         }
1483
1484         /* Update reserved bits */
1485         if ((efer ^ old_efer) & EFER_NX)
1486                 kvm_mmu_reset_context(vcpu);
1487
1488         return 0;
1489 }
1490
1491 void kvm_enable_efer_bits(u64 mask)
1492 {
1493        efer_reserved_bits &= ~mask;
1494 }
1495 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1496
1497 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type)
1498 {
1499         struct kvm *kvm = vcpu->kvm;
1500         struct msr_bitmap_range *ranges = kvm->arch.msr_filter.ranges;
1501         u32 count = kvm->arch.msr_filter.count;
1502         u32 i;
1503         bool r = kvm->arch.msr_filter.default_allow;
1504         int idx;
1505
1506         /* MSR filtering not set up or x2APIC enabled, allow everything */
1507         if (!count || (index >= 0x800 && index <= 0x8ff))
1508                 return true;
1509
1510         /* Prevent collision with set_msr_filter */
1511         idx = srcu_read_lock(&kvm->srcu);
1512
1513         for (i = 0; i < count; i++) {
1514                 u32 start = ranges[i].base;
1515                 u32 end = start + ranges[i].nmsrs;
1516                 u32 flags = ranges[i].flags;
1517                 unsigned long *bitmap = ranges[i].bitmap;
1518
1519                 if ((index >= start) && (index < end) && (flags & type)) {
1520                         r = !!test_bit(index - start, bitmap);
1521                         break;
1522                 }
1523         }
1524
1525         srcu_read_unlock(&kvm->srcu, idx);
1526
1527         return r;
1528 }
1529 EXPORT_SYMBOL_GPL(kvm_msr_allowed);
1530
1531 /*
1532  * Write @data into the MSR specified by @index.  Select MSR specific fault
1533  * checks are bypassed if @host_initiated is %true.
1534  * Returns 0 on success, non-0 otherwise.
1535  * Assumes vcpu_load() was already called.
1536  */
1537 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1538                          bool host_initiated)
1539 {
1540         struct msr_data msr;
1541
1542         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_WRITE))
1543                 return KVM_MSR_RET_FILTERED;
1544
1545         switch (index) {
1546         case MSR_FS_BASE:
1547         case MSR_GS_BASE:
1548         case MSR_KERNEL_GS_BASE:
1549         case MSR_CSTAR:
1550         case MSR_LSTAR:
1551                 if (is_noncanonical_address(data, vcpu))
1552                         return 1;
1553                 break;
1554         case MSR_IA32_SYSENTER_EIP:
1555         case MSR_IA32_SYSENTER_ESP:
1556                 /*
1557                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1558                  * non-canonical address is written on Intel but not on
1559                  * AMD (which ignores the top 32-bits, because it does
1560                  * not implement 64-bit SYSENTER).
1561                  *
1562                  * 64-bit code should hence be able to write a non-canonical
1563                  * value on AMD.  Making the address canonical ensures that
1564                  * vmentry does not fail on Intel after writing a non-canonical
1565                  * value, and that something deterministic happens if the guest
1566                  * invokes 64-bit SYSENTER.
1567                  */
1568                 data = get_canonical(data, vcpu_virt_addr_bits(vcpu));
1569         }
1570
1571         msr.data = data;
1572         msr.index = index;
1573         msr.host_initiated = host_initiated;
1574
1575         return kvm_x86_ops.set_msr(vcpu, &msr);
1576 }
1577
1578 static int kvm_set_msr_ignored_check(struct kvm_vcpu *vcpu,
1579                                      u32 index, u64 data, bool host_initiated)
1580 {
1581         int ret = __kvm_set_msr(vcpu, index, data, host_initiated);
1582
1583         if (ret == KVM_MSR_RET_INVALID)
1584                 if (kvm_msr_ignored_check(vcpu, index, data, true))
1585                         ret = 0;
1586
1587         return ret;
1588 }
1589
1590 /*
1591  * Read the MSR specified by @index into @data.  Select MSR specific fault
1592  * checks are bypassed if @host_initiated is %true.
1593  * Returns 0 on success, non-0 otherwise.
1594  * Assumes vcpu_load() was already called.
1595  */
1596 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1597                   bool host_initiated)
1598 {
1599         struct msr_data msr;
1600         int ret;
1601
1602         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_READ))
1603                 return KVM_MSR_RET_FILTERED;
1604
1605         msr.index = index;
1606         msr.host_initiated = host_initiated;
1607
1608         ret = kvm_x86_ops.get_msr(vcpu, &msr);
1609         if (!ret)
1610                 *data = msr.data;
1611         return ret;
1612 }
1613
1614 static int kvm_get_msr_ignored_check(struct kvm_vcpu *vcpu,
1615                                      u32 index, u64 *data, bool host_initiated)
1616 {
1617         int ret = __kvm_get_msr(vcpu, index, data, host_initiated);
1618
1619         if (ret == KVM_MSR_RET_INVALID) {
1620                 /* Unconditionally clear *data for simplicity */
1621                 *data = 0;
1622                 if (kvm_msr_ignored_check(vcpu, index, 0, false))
1623                         ret = 0;
1624         }
1625
1626         return ret;
1627 }
1628
1629 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1630 {
1631         return kvm_get_msr_ignored_check(vcpu, index, data, false);
1632 }
1633 EXPORT_SYMBOL_GPL(kvm_get_msr);
1634
1635 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1636 {
1637         return kvm_set_msr_ignored_check(vcpu, index, data, false);
1638 }
1639 EXPORT_SYMBOL_GPL(kvm_set_msr);
1640
1641 static int complete_emulated_msr(struct kvm_vcpu *vcpu, bool is_read)
1642 {
1643         if (vcpu->run->msr.error) {
1644                 kvm_inject_gp(vcpu, 0);
1645                 return 1;
1646         } else if (is_read) {
1647                 kvm_rax_write(vcpu, (u32)vcpu->run->msr.data);
1648                 kvm_rdx_write(vcpu, vcpu->run->msr.data >> 32);
1649         }
1650
1651         return kvm_skip_emulated_instruction(vcpu);
1652 }
1653
1654 static int complete_emulated_rdmsr(struct kvm_vcpu *vcpu)
1655 {
1656         return complete_emulated_msr(vcpu, true);
1657 }
1658
1659 static int complete_emulated_wrmsr(struct kvm_vcpu *vcpu)
1660 {
1661         return complete_emulated_msr(vcpu, false);
1662 }
1663
1664 static u64 kvm_msr_reason(int r)
1665 {
1666         switch (r) {
1667         case KVM_MSR_RET_INVALID:
1668                 return KVM_MSR_EXIT_REASON_UNKNOWN;
1669         case KVM_MSR_RET_FILTERED:
1670                 return KVM_MSR_EXIT_REASON_FILTER;
1671         default:
1672                 return KVM_MSR_EXIT_REASON_INVAL;
1673         }
1674 }
1675
1676 static int kvm_msr_user_space(struct kvm_vcpu *vcpu, u32 index,
1677                               u32 exit_reason, u64 data,
1678                               int (*completion)(struct kvm_vcpu *vcpu),
1679                               int r)
1680 {
1681         u64 msr_reason = kvm_msr_reason(r);
1682
1683         /* Check if the user wanted to know about this MSR fault */
1684         if (!(vcpu->kvm->arch.user_space_msr_mask & msr_reason))
1685                 return 0;
1686
1687         vcpu->run->exit_reason = exit_reason;
1688         vcpu->run->msr.error = 0;
1689         memset(vcpu->run->msr.pad, 0, sizeof(vcpu->run->msr.pad));
1690         vcpu->run->msr.reason = msr_reason;
1691         vcpu->run->msr.index = index;
1692         vcpu->run->msr.data = data;
1693         vcpu->arch.complete_userspace_io = completion;
1694
1695         return 1;
1696 }
1697
1698 static int kvm_get_msr_user_space(struct kvm_vcpu *vcpu, u32 index, int r)
1699 {
1700         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_RDMSR, 0,
1701                                    complete_emulated_rdmsr, r);
1702 }
1703
1704 static int kvm_set_msr_user_space(struct kvm_vcpu *vcpu, u32 index, u64 data, int r)
1705 {
1706         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_WRMSR, data,
1707                                    complete_emulated_wrmsr, r);
1708 }
1709
1710 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1711 {
1712         u32 ecx = kvm_rcx_read(vcpu);
1713         u64 data;
1714         int r;
1715
1716         r = kvm_get_msr(vcpu, ecx, &data);
1717
1718         /* MSR read failed? See if we should ask user space */
1719         if (r && kvm_get_msr_user_space(vcpu, ecx, r)) {
1720                 /* Bounce to user space */
1721                 return 0;
1722         }
1723
1724         /* MSR read failed? Inject a #GP */
1725         if (r) {
1726                 trace_kvm_msr_read_ex(ecx);
1727                 kvm_inject_gp(vcpu, 0);
1728                 return 1;
1729         }
1730
1731         trace_kvm_msr_read(ecx, data);
1732
1733         kvm_rax_write(vcpu, data & -1u);
1734         kvm_rdx_write(vcpu, (data >> 32) & -1u);
1735         return kvm_skip_emulated_instruction(vcpu);
1736 }
1737 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
1738
1739 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
1740 {
1741         u32 ecx = kvm_rcx_read(vcpu);
1742         u64 data = kvm_read_edx_eax(vcpu);
1743         int r;
1744
1745         r = kvm_set_msr(vcpu, ecx, data);
1746
1747         /* MSR write failed? See if we should ask user space */
1748         if (r && kvm_set_msr_user_space(vcpu, ecx, data, r))
1749                 /* Bounce to user space */
1750                 return 0;
1751
1752         /* Signal all other negative errors to userspace */
1753         if (r < 0)
1754                 return r;
1755
1756         /* MSR write failed? Inject a #GP */
1757         if (r > 0) {
1758                 trace_kvm_msr_write_ex(ecx, data);
1759                 kvm_inject_gp(vcpu, 0);
1760                 return 1;
1761         }
1762
1763         trace_kvm_msr_write(ecx, data);
1764         return kvm_skip_emulated_instruction(vcpu);
1765 }
1766 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
1767
1768 bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu)
1769 {
1770         return vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu) ||
1771                 xfer_to_guest_mode_work_pending();
1772 }
1773 EXPORT_SYMBOL_GPL(kvm_vcpu_exit_request);
1774
1775 /*
1776  * The fast path for frequent and performance sensitive wrmsr emulation,
1777  * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
1778  * the latency of virtual IPI by avoiding the expensive bits of transitioning
1779  * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
1780  * other cases which must be called after interrupts are enabled on the host.
1781  */
1782 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data)
1783 {
1784         if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(vcpu->arch.apic))
1785                 return 1;
1786
1787         if (((data & APIC_SHORT_MASK) == APIC_DEST_NOSHORT) &&
1788                 ((data & APIC_DEST_MASK) == APIC_DEST_PHYSICAL) &&
1789                 ((data & APIC_MODE_MASK) == APIC_DM_FIXED) &&
1790                 ((u32)(data >> 32) != X2APIC_BROADCAST)) {
1791
1792                 data &= ~(1 << 12);
1793                 kvm_apic_send_ipi(vcpu->arch.apic, (u32)data, (u32)(data >> 32));
1794                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR2, (u32)(data >> 32));
1795                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR, (u32)data);
1796                 trace_kvm_apic_write(APIC_ICR, (u32)data);
1797                 return 0;
1798         }
1799
1800         return 1;
1801 }
1802
1803 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu *vcpu, u64 data)
1804 {
1805         if (!kvm_can_use_hv_timer(vcpu))
1806                 return 1;
1807
1808         kvm_set_lapic_tscdeadline_msr(vcpu, data);
1809         return 0;
1810 }
1811
1812 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
1813 {
1814         u32 msr = kvm_rcx_read(vcpu);
1815         u64 data;
1816         fastpath_t ret = EXIT_FASTPATH_NONE;
1817
1818         switch (msr) {
1819         case APIC_BASE_MSR + (APIC_ICR >> 4):
1820                 data = kvm_read_edx_eax(vcpu);
1821                 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu, data)) {
1822                         kvm_skip_emulated_instruction(vcpu);
1823                         ret = EXIT_FASTPATH_EXIT_HANDLED;
1824                 }
1825                 break;
1826         case MSR_IA32_TSCDEADLINE:
1827                 data = kvm_read_edx_eax(vcpu);
1828                 if (!handle_fastpath_set_tscdeadline(vcpu, data)) {
1829                         kvm_skip_emulated_instruction(vcpu);
1830                         ret = EXIT_FASTPATH_REENTER_GUEST;
1831                 }
1832                 break;
1833         default:
1834                 break;
1835         }
1836
1837         if (ret != EXIT_FASTPATH_NONE)
1838                 trace_kvm_msr_write(msr, data);
1839
1840         return ret;
1841 }
1842 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff);
1843
1844 /*
1845  * Adapt set_msr() to msr_io()'s calling convention
1846  */
1847 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1848 {
1849         return kvm_get_msr_ignored_check(vcpu, index, data, true);
1850 }
1851
1852 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1853 {
1854         return kvm_set_msr_ignored_check(vcpu, index, *data, true);
1855 }
1856
1857 #ifdef CONFIG_X86_64
1858 struct pvclock_clock {
1859         int vclock_mode;
1860         u64 cycle_last;
1861         u64 mask;
1862         u32 mult;
1863         u32 shift;
1864         u64 base_cycles;
1865         u64 offset;
1866 };
1867
1868 struct pvclock_gtod_data {
1869         seqcount_t      seq;
1870
1871         struct pvclock_clock clock; /* extract of a clocksource struct */
1872         struct pvclock_clock raw_clock; /* extract of a clocksource struct */
1873
1874         ktime_t         offs_boot;
1875         u64             wall_time_sec;
1876 };
1877
1878 static struct pvclock_gtod_data pvclock_gtod_data;
1879
1880 static void update_pvclock_gtod(struct timekeeper *tk)
1881 {
1882         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1883
1884         write_seqcount_begin(&vdata->seq);
1885
1886         /* copy pvclock gtod data */
1887         vdata->clock.vclock_mode        = tk->tkr_mono.clock->vdso_clock_mode;
1888         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1889         vdata->clock.mask               = tk->tkr_mono.mask;
1890         vdata->clock.mult               = tk->tkr_mono.mult;
1891         vdata->clock.shift              = tk->tkr_mono.shift;
1892         vdata->clock.base_cycles        = tk->tkr_mono.xtime_nsec;
1893         vdata->clock.offset             = tk->tkr_mono.base;
1894
1895         vdata->raw_clock.vclock_mode    = tk->tkr_raw.clock->vdso_clock_mode;
1896         vdata->raw_clock.cycle_last     = tk->tkr_raw.cycle_last;
1897         vdata->raw_clock.mask           = tk->tkr_raw.mask;
1898         vdata->raw_clock.mult           = tk->tkr_raw.mult;
1899         vdata->raw_clock.shift          = tk->tkr_raw.shift;
1900         vdata->raw_clock.base_cycles    = tk->tkr_raw.xtime_nsec;
1901         vdata->raw_clock.offset         = tk->tkr_raw.base;
1902
1903         vdata->wall_time_sec            = tk->xtime_sec;
1904
1905         vdata->offs_boot                = tk->offs_boot;
1906
1907         write_seqcount_end(&vdata->seq);
1908 }
1909
1910 static s64 get_kvmclock_base_ns(void)
1911 {
1912         /* Count up from boot time, but with the frequency of the raw clock.  */
1913         return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data.offs_boot));
1914 }
1915 #else
1916 static s64 get_kvmclock_base_ns(void)
1917 {
1918         /* Master clock not used, so we can just use CLOCK_BOOTTIME.  */
1919         return ktime_get_boottime_ns();
1920 }
1921 #endif
1922
1923 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1924 {
1925         int version;
1926         int r;
1927         struct pvclock_wall_clock wc;
1928         u64 wall_nsec;
1929
1930         kvm->arch.wall_clock = wall_clock;
1931
1932         if (!wall_clock)
1933                 return;
1934
1935         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1936         if (r)
1937                 return;
1938
1939         if (version & 1)
1940                 ++version;  /* first time write, random junk */
1941
1942         ++version;
1943
1944         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1945                 return;
1946
1947         /*
1948          * The guest calculates current wall clock time by adding
1949          * system time (updated by kvm_guest_time_update below) to the
1950          * wall clock specified here.  We do the reverse here.
1951          */
1952         wall_nsec = ktime_get_real_ns() - get_kvmclock_ns(kvm);
1953
1954         wc.nsec = do_div(wall_nsec, 1000000000);
1955         wc.sec = (u32)wall_nsec; /* overflow in 2106 guest time */
1956         wc.version = version;
1957
1958         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1959
1960         version++;
1961         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1962 }
1963
1964 static void kvm_write_system_time(struct kvm_vcpu *vcpu, gpa_t system_time,
1965                                   bool old_msr, bool host_initiated)
1966 {
1967         struct kvm_arch *ka = &vcpu->kvm->arch;
1968
1969         if (vcpu->vcpu_id == 0 && !host_initiated) {
1970                 if (ka->boot_vcpu_runs_old_kvmclock && old_msr)
1971                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1972
1973                 ka->boot_vcpu_runs_old_kvmclock = old_msr;
1974         }
1975
1976         vcpu->arch.time = system_time;
1977         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
1978
1979         /* we verify if the enable bit is set... */
1980         vcpu->arch.pv_time_enabled = false;
1981         if (!(system_time & 1))
1982                 return;
1983
1984         if (!kvm_gfn_to_hva_cache_init(vcpu->kvm,
1985                                        &vcpu->arch.pv_time, system_time & ~1ULL,
1986                                        sizeof(struct pvclock_vcpu_time_info)))
1987                 vcpu->arch.pv_time_enabled = true;
1988
1989         return;
1990 }
1991
1992 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1993 {
1994         do_shl32_div32(dividend, divisor);
1995         return dividend;
1996 }
1997
1998 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1999                                s8 *pshift, u32 *pmultiplier)
2000 {
2001         uint64_t scaled64;
2002         int32_t  shift = 0;
2003         uint64_t tps64;
2004         uint32_t tps32;
2005
2006         tps64 = base_hz;
2007         scaled64 = scaled_hz;
2008         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
2009                 tps64 >>= 1;
2010                 shift--;
2011         }
2012
2013         tps32 = (uint32_t)tps64;
2014         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
2015                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
2016                         scaled64 >>= 1;
2017                 else
2018                         tps32 <<= 1;
2019                 shift++;
2020         }
2021
2022         *pshift = shift;
2023         *pmultiplier = div_frac(scaled64, tps32);
2024 }
2025
2026 #ifdef CONFIG_X86_64
2027 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
2028 #endif
2029
2030 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
2031 static unsigned long max_tsc_khz;
2032
2033 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
2034 {
2035         u64 v = (u64)khz * (1000000 + ppm);
2036         do_div(v, 1000000);
2037         return v;
2038 }
2039
2040 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
2041 {
2042         u64 ratio;
2043
2044         /* Guest TSC same frequency as host TSC? */
2045         if (!scale) {
2046                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
2047                 return 0;
2048         }
2049
2050         /* TSC scaling supported? */
2051         if (!kvm_has_tsc_control) {
2052                 if (user_tsc_khz > tsc_khz) {
2053                         vcpu->arch.tsc_catchup = 1;
2054                         vcpu->arch.tsc_always_catchup = 1;
2055                         return 0;
2056                 } else {
2057                         pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2058                         return -1;
2059                 }
2060         }
2061
2062         /* TSC scaling required  - calculate ratio */
2063         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
2064                                 user_tsc_khz, tsc_khz);
2065
2066         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
2067                 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2068                                     user_tsc_khz);
2069                 return -1;
2070         }
2071
2072         vcpu->arch.tsc_scaling_ratio = ratio;
2073         return 0;
2074 }
2075
2076 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
2077 {
2078         u32 thresh_lo, thresh_hi;
2079         int use_scaling = 0;
2080
2081         /* tsc_khz can be zero if TSC calibration fails */
2082         if (user_tsc_khz == 0) {
2083                 /* set tsc_scaling_ratio to a safe value */
2084                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
2085                 return -1;
2086         }
2087
2088         /* Compute a scale to convert nanoseconds in TSC cycles */
2089         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
2090                            &vcpu->arch.virtual_tsc_shift,
2091                            &vcpu->arch.virtual_tsc_mult);
2092         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
2093
2094         /*
2095          * Compute the variation in TSC rate which is acceptable
2096          * within the range of tolerance and decide if the
2097          * rate being applied is within that bounds of the hardware
2098          * rate.  If so, no scaling or compensation need be done.
2099          */
2100         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
2101         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
2102         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
2103                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
2104                 use_scaling = 1;
2105         }
2106         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
2107 }
2108
2109 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
2110 {
2111         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
2112                                       vcpu->arch.virtual_tsc_mult,
2113                                       vcpu->arch.virtual_tsc_shift);
2114         tsc += vcpu->arch.this_tsc_write;
2115         return tsc;
2116 }
2117
2118 static inline int gtod_is_based_on_tsc(int mode)
2119 {
2120         return mode == VDSO_CLOCKMODE_TSC || mode == VDSO_CLOCKMODE_HVCLOCK;
2121 }
2122
2123 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
2124 {
2125 #ifdef CONFIG_X86_64
2126         bool vcpus_matched;
2127         struct kvm_arch *ka = &vcpu->kvm->arch;
2128         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2129
2130         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2131                          atomic_read(&vcpu->kvm->online_vcpus));
2132
2133         /*
2134          * Once the masterclock is enabled, always perform request in
2135          * order to update it.
2136          *
2137          * In order to enable masterclock, the host clocksource must be TSC
2138          * and the vcpus need to have matched TSCs.  When that happens,
2139          * perform request to enable masterclock.
2140          */
2141         if (ka->use_master_clock ||
2142             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
2143                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2144
2145         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
2146                             atomic_read(&vcpu->kvm->online_vcpus),
2147                             ka->use_master_clock, gtod->clock.vclock_mode);
2148 #endif
2149 }
2150
2151 /*
2152  * Multiply tsc by a fixed point number represented by ratio.
2153  *
2154  * The most significant 64-N bits (mult) of ratio represent the
2155  * integral part of the fixed point number; the remaining N bits
2156  * (frac) represent the fractional part, ie. ratio represents a fixed
2157  * point number (mult + frac * 2^(-N)).
2158  *
2159  * N equals to kvm_tsc_scaling_ratio_frac_bits.
2160  */
2161 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
2162 {
2163         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
2164 }
2165
2166 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
2167 {
2168         u64 _tsc = tsc;
2169         u64 ratio = vcpu->arch.tsc_scaling_ratio;
2170
2171         if (ratio != kvm_default_tsc_scaling_ratio)
2172                 _tsc = __scale_tsc(ratio, tsc);
2173
2174         return _tsc;
2175 }
2176 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
2177
2178 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
2179 {
2180         u64 tsc;
2181
2182         tsc = kvm_scale_tsc(vcpu, rdtsc());
2183
2184         return target_tsc - tsc;
2185 }
2186
2187 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
2188 {
2189         return vcpu->arch.l1_tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
2190 }
2191 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
2192
2193 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
2194 {
2195         vcpu->arch.l1_tsc_offset = offset;
2196         vcpu->arch.tsc_offset = kvm_x86_ops.write_l1_tsc_offset(vcpu, offset);
2197 }
2198
2199 static inline bool kvm_check_tsc_unstable(void)
2200 {
2201 #ifdef CONFIG_X86_64
2202         /*
2203          * TSC is marked unstable when we're running on Hyper-V,
2204          * 'TSC page' clocksource is good.
2205          */
2206         if (pvclock_gtod_data.clock.vclock_mode == VDSO_CLOCKMODE_HVCLOCK)
2207                 return false;
2208 #endif
2209         return check_tsc_unstable();
2210 }
2211
2212 static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 data)
2213 {
2214         struct kvm *kvm = vcpu->kvm;
2215         u64 offset, ns, elapsed;
2216         unsigned long flags;
2217         bool matched;
2218         bool already_matched;
2219         bool synchronizing = false;
2220
2221         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
2222         offset = kvm_compute_tsc_offset(vcpu, data);
2223         ns = get_kvmclock_base_ns();
2224         elapsed = ns - kvm->arch.last_tsc_nsec;
2225
2226         if (vcpu->arch.virtual_tsc_khz) {
2227                 if (data == 0) {
2228                         /*
2229                          * detection of vcpu initialization -- need to sync
2230                          * with other vCPUs. This particularly helps to keep
2231                          * kvm_clock stable after CPU hotplug
2232                          */
2233                         synchronizing = true;
2234                 } else {
2235                         u64 tsc_exp = kvm->arch.last_tsc_write +
2236                                                 nsec_to_cycles(vcpu, elapsed);
2237                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
2238                         /*
2239                          * Special case: TSC write with a small delta (1 second)
2240                          * of virtual cycle time against real time is
2241                          * interpreted as an attempt to synchronize the CPU.
2242                          */
2243                         synchronizing = data < tsc_exp + tsc_hz &&
2244                                         data + tsc_hz > tsc_exp;
2245                 }
2246         }
2247
2248         /*
2249          * For a reliable TSC, we can match TSC offsets, and for an unstable
2250          * TSC, we add elapsed time in this computation.  We could let the
2251          * compensation code attempt to catch up if we fall behind, but
2252          * it's better to try to match offsets from the beginning.
2253          */
2254         if (synchronizing &&
2255             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
2256                 if (!kvm_check_tsc_unstable()) {
2257                         offset = kvm->arch.cur_tsc_offset;
2258                 } else {
2259                         u64 delta = nsec_to_cycles(vcpu, elapsed);
2260                         data += delta;
2261                         offset = kvm_compute_tsc_offset(vcpu, data);
2262                 }
2263                 matched = true;
2264                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
2265         } else {
2266                 /*
2267                  * We split periods of matched TSC writes into generations.
2268                  * For each generation, we track the original measured
2269                  * nanosecond time, offset, and write, so if TSCs are in
2270                  * sync, we can match exact offset, and if not, we can match
2271                  * exact software computation in compute_guest_tsc()
2272                  *
2273                  * These values are tracked in kvm->arch.cur_xxx variables.
2274                  */
2275                 kvm->arch.cur_tsc_generation++;
2276                 kvm->arch.cur_tsc_nsec = ns;
2277                 kvm->arch.cur_tsc_write = data;
2278                 kvm->arch.cur_tsc_offset = offset;
2279                 matched = false;
2280         }
2281
2282         /*
2283          * We also track th most recent recorded KHZ, write and time to
2284          * allow the matching interval to be extended at each write.
2285          */
2286         kvm->arch.last_tsc_nsec = ns;
2287         kvm->arch.last_tsc_write = data;
2288         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
2289
2290         vcpu->arch.last_guest_tsc = data;
2291
2292         /* Keep track of which generation this VCPU has synchronized to */
2293         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
2294         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
2295         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
2296
2297         kvm_vcpu_write_tsc_offset(vcpu, offset);
2298         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
2299
2300         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
2301         if (!matched) {
2302                 kvm->arch.nr_vcpus_matched_tsc = 0;
2303         } else if (!already_matched) {
2304                 kvm->arch.nr_vcpus_matched_tsc++;
2305         }
2306
2307         kvm_track_tsc_matching(vcpu);
2308         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
2309 }
2310
2311 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
2312                                            s64 adjustment)
2313 {
2314         u64 tsc_offset = vcpu->arch.l1_tsc_offset;
2315         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
2316 }
2317
2318 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
2319 {
2320         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
2321                 WARN_ON(adjustment < 0);
2322         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
2323         adjust_tsc_offset_guest(vcpu, adjustment);
2324 }
2325
2326 #ifdef CONFIG_X86_64
2327
2328 static u64 read_tsc(void)
2329 {
2330         u64 ret = (u64)rdtsc_ordered();
2331         u64 last = pvclock_gtod_data.clock.cycle_last;
2332
2333         if (likely(ret >= last))
2334                 return ret;
2335
2336         /*
2337          * GCC likes to generate cmov here, but this branch is extremely
2338          * predictable (it's just a function of time and the likely is
2339          * very likely) and there's a data dependence, so force GCC
2340          * to generate a branch instead.  I don't barrier() because
2341          * we don't actually need a barrier, and if this function
2342          * ever gets inlined it will generate worse code.
2343          */
2344         asm volatile ("");
2345         return last;
2346 }
2347
2348 static inline u64 vgettsc(struct pvclock_clock *clock, u64 *tsc_timestamp,
2349                           int *mode)
2350 {
2351         long v;
2352         u64 tsc_pg_val;
2353
2354         switch (clock->vclock_mode) {
2355         case VDSO_CLOCKMODE_HVCLOCK:
2356                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2357                                                   tsc_timestamp);
2358                 if (tsc_pg_val != U64_MAX) {
2359                         /* TSC page valid */
2360                         *mode = VDSO_CLOCKMODE_HVCLOCK;
2361                         v = (tsc_pg_val - clock->cycle_last) &
2362                                 clock->mask;
2363                 } else {
2364                         /* TSC page invalid */
2365                         *mode = VDSO_CLOCKMODE_NONE;
2366                 }
2367                 break;
2368         case VDSO_CLOCKMODE_TSC:
2369                 *mode = VDSO_CLOCKMODE_TSC;
2370                 *tsc_timestamp = read_tsc();
2371                 v = (*tsc_timestamp - clock->cycle_last) &
2372                         clock->mask;
2373                 break;
2374         default:
2375                 *mode = VDSO_CLOCKMODE_NONE;
2376         }
2377
2378         if (*mode == VDSO_CLOCKMODE_NONE)
2379                 *tsc_timestamp = v = 0;
2380
2381         return v * clock->mult;
2382 }
2383
2384 static int do_monotonic_raw(s64 *t, u64 *tsc_timestamp)
2385 {
2386         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2387         unsigned long seq;
2388         int mode;
2389         u64 ns;
2390
2391         do {
2392                 seq = read_seqcount_begin(&gtod->seq);
2393                 ns = gtod->raw_clock.base_cycles;
2394                 ns += vgettsc(&gtod->raw_clock, tsc_timestamp, &mode);
2395                 ns >>= gtod->raw_clock.shift;
2396                 ns += ktime_to_ns(ktime_add(gtod->raw_clock.offset, gtod->offs_boot));
2397         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2398         *t = ns;
2399
2400         return mode;
2401 }
2402
2403 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2404 {
2405         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2406         unsigned long seq;
2407         int mode;
2408         u64 ns;
2409
2410         do {
2411                 seq = read_seqcount_begin(&gtod->seq);
2412                 ts->tv_sec = gtod->wall_time_sec;
2413                 ns = gtod->clock.base_cycles;
2414                 ns += vgettsc(&gtod->clock, tsc_timestamp, &mode);
2415                 ns >>= gtod->clock.shift;
2416         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2417
2418         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2419         ts->tv_nsec = ns;
2420
2421         return mode;
2422 }
2423
2424 /* returns true if host is using TSC based clocksource */
2425 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2426 {
2427         /* checked again under seqlock below */
2428         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2429                 return false;
2430
2431         return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns,
2432                                                       tsc_timestamp));
2433 }
2434
2435 /* returns true if host is using TSC based clocksource */
2436 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2437                                            u64 *tsc_timestamp)
2438 {
2439         /* checked again under seqlock below */
2440         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2441                 return false;
2442
2443         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2444 }
2445 #endif
2446
2447 /*
2448  *
2449  * Assuming a stable TSC across physical CPUS, and a stable TSC
2450  * across virtual CPUs, the following condition is possible.
2451  * Each numbered line represents an event visible to both
2452  * CPUs at the next numbered event.
2453  *
2454  * "timespecX" represents host monotonic time. "tscX" represents
2455  * RDTSC value.
2456  *
2457  *              VCPU0 on CPU0           |       VCPU1 on CPU1
2458  *
2459  * 1.  read timespec0,tsc0
2460  * 2.                                   | timespec1 = timespec0 + N
2461  *                                      | tsc1 = tsc0 + M
2462  * 3. transition to guest               | transition to guest
2463  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2464  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
2465  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2466  *
2467  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2468  *
2469  *      - ret0 < ret1
2470  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2471  *              ...
2472  *      - 0 < N - M => M < N
2473  *
2474  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2475  * always the case (the difference between two distinct xtime instances
2476  * might be smaller then the difference between corresponding TSC reads,
2477  * when updating guest vcpus pvclock areas).
2478  *
2479  * To avoid that problem, do not allow visibility of distinct
2480  * system_timestamp/tsc_timestamp values simultaneously: use a master
2481  * copy of host monotonic time values. Update that master copy
2482  * in lockstep.
2483  *
2484  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2485  *
2486  */
2487
2488 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2489 {
2490 #ifdef CONFIG_X86_64
2491         struct kvm_arch *ka = &kvm->arch;
2492         int vclock_mode;
2493         bool host_tsc_clocksource, vcpus_matched;
2494
2495         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2496                         atomic_read(&kvm->online_vcpus));
2497
2498         /*
2499          * If the host uses TSC clock, then passthrough TSC as stable
2500          * to the guest.
2501          */
2502         host_tsc_clocksource = kvm_get_time_and_clockread(
2503                                         &ka->master_kernel_ns,
2504                                         &ka->master_cycle_now);
2505
2506         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2507                                 && !ka->backwards_tsc_observed
2508                                 && !ka->boot_vcpu_runs_old_kvmclock;
2509
2510         if (ka->use_master_clock)
2511                 atomic_set(&kvm_guest_has_master_clock, 1);
2512
2513         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2514         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2515                                         vcpus_matched);
2516 #endif
2517 }
2518
2519 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2520 {
2521         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2522 }
2523
2524 static void kvm_gen_update_masterclock(struct kvm *kvm)
2525 {
2526 #ifdef CONFIG_X86_64
2527         int i;
2528         struct kvm_vcpu *vcpu;
2529         struct kvm_arch *ka = &kvm->arch;
2530
2531         spin_lock(&ka->pvclock_gtod_sync_lock);
2532         kvm_make_mclock_inprogress_request(kvm);
2533         /* no guest entries from this point */
2534         pvclock_update_vm_gtod_copy(kvm);
2535
2536         kvm_for_each_vcpu(i, vcpu, kvm)
2537                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2538
2539         /* guest entries allowed */
2540         kvm_for_each_vcpu(i, vcpu, kvm)
2541                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2542
2543         spin_unlock(&ka->pvclock_gtod_sync_lock);
2544 #endif
2545 }
2546
2547 u64 get_kvmclock_ns(struct kvm *kvm)
2548 {
2549         struct kvm_arch *ka = &kvm->arch;
2550         struct pvclock_vcpu_time_info hv_clock;
2551         u64 ret;
2552
2553         spin_lock(&ka->pvclock_gtod_sync_lock);
2554         if (!ka->use_master_clock) {
2555                 spin_unlock(&ka->pvclock_gtod_sync_lock);
2556                 return get_kvmclock_base_ns() + ka->kvmclock_offset;
2557         }
2558
2559         hv_clock.tsc_timestamp = ka->master_cycle_now;
2560         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2561         spin_unlock(&ka->pvclock_gtod_sync_lock);
2562
2563         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2564         get_cpu();
2565
2566         if (__this_cpu_read(cpu_tsc_khz)) {
2567                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2568                                    &hv_clock.tsc_shift,
2569                                    &hv_clock.tsc_to_system_mul);
2570                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2571         } else
2572                 ret = get_kvmclock_base_ns() + ka->kvmclock_offset;
2573
2574         put_cpu();
2575
2576         return ret;
2577 }
2578
2579 static void kvm_setup_pvclock_page(struct kvm_vcpu *v)
2580 {
2581         struct kvm_vcpu_arch *vcpu = &v->arch;
2582         struct pvclock_vcpu_time_info guest_hv_clock;
2583
2584         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
2585                 &guest_hv_clock, sizeof(guest_hv_clock))))
2586                 return;
2587
2588         /* This VCPU is paused, but it's legal for a guest to read another
2589          * VCPU's kvmclock, so we really have to follow the specification where
2590          * it says that version is odd if data is being modified, and even after
2591          * it is consistent.
2592          *
2593          * Version field updates must be kept separate.  This is because
2594          * kvm_write_guest_cached might use a "rep movs" instruction, and
2595          * writes within a string instruction are weakly ordered.  So there
2596          * are three writes overall.
2597          *
2598          * As a small optimization, only write the version field in the first
2599          * and third write.  The vcpu->pv_time cache is still valid, because the
2600          * version field is the first in the struct.
2601          */
2602         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2603
2604         if (guest_hv_clock.version & 1)
2605                 ++guest_hv_clock.version;  /* first time write, random junk */
2606
2607         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2608         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2609                                 &vcpu->hv_clock,
2610                                 sizeof(vcpu->hv_clock.version));
2611
2612         smp_wmb();
2613
2614         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2615         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2616
2617         if (vcpu->pvclock_set_guest_stopped_request) {
2618                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2619                 vcpu->pvclock_set_guest_stopped_request = false;
2620         }
2621
2622         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2623
2624         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2625                                 &vcpu->hv_clock,
2626                                 sizeof(vcpu->hv_clock));
2627
2628         smp_wmb();
2629
2630         vcpu->hv_clock.version++;
2631         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2632                                 &vcpu->hv_clock,
2633                                 sizeof(vcpu->hv_clock.version));
2634 }
2635
2636 static int kvm_guest_time_update(struct kvm_vcpu *v)
2637 {
2638         unsigned long flags, tgt_tsc_khz;
2639         struct kvm_vcpu_arch *vcpu = &v->arch;
2640         struct kvm_arch *ka = &v->kvm->arch;
2641         s64 kernel_ns;
2642         u64 tsc_timestamp, host_tsc;
2643         u8 pvclock_flags;
2644         bool use_master_clock;
2645
2646         kernel_ns = 0;
2647         host_tsc = 0;
2648
2649         /*
2650          * If the host uses TSC clock, then passthrough TSC as stable
2651          * to the guest.
2652          */
2653         spin_lock(&ka->pvclock_gtod_sync_lock);
2654         use_master_clock = ka->use_master_clock;
2655         if (use_master_clock) {
2656                 host_tsc = ka->master_cycle_now;
2657                 kernel_ns = ka->master_kernel_ns;
2658         }
2659         spin_unlock(&ka->pvclock_gtod_sync_lock);
2660
2661         /* Keep irq disabled to prevent changes to the clock */
2662         local_irq_save(flags);
2663         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2664         if (unlikely(tgt_tsc_khz == 0)) {
2665                 local_irq_restore(flags);
2666                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2667                 return 1;
2668         }
2669         if (!use_master_clock) {
2670                 host_tsc = rdtsc();
2671                 kernel_ns = get_kvmclock_base_ns();
2672         }
2673
2674         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2675
2676         /*
2677          * We may have to catch up the TSC to match elapsed wall clock
2678          * time for two reasons, even if kvmclock is used.
2679          *   1) CPU could have been running below the maximum TSC rate
2680          *   2) Broken TSC compensation resets the base at each VCPU
2681          *      entry to avoid unknown leaps of TSC even when running
2682          *      again on the same CPU.  This may cause apparent elapsed
2683          *      time to disappear, and the guest to stand still or run
2684          *      very slowly.
2685          */
2686         if (vcpu->tsc_catchup) {
2687                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2688                 if (tsc > tsc_timestamp) {
2689                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2690                         tsc_timestamp = tsc;
2691                 }
2692         }
2693
2694         local_irq_restore(flags);
2695
2696         /* With all the info we got, fill in the values */
2697
2698         if (kvm_has_tsc_control)
2699                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
2700
2701         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2702                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2703                                    &vcpu->hv_clock.tsc_shift,
2704                                    &vcpu->hv_clock.tsc_to_system_mul);
2705                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2706         }
2707
2708         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2709         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2710         vcpu->last_guest_tsc = tsc_timestamp;
2711
2712         /* If the host uses TSC clocksource, then it is stable */
2713         pvclock_flags = 0;
2714         if (use_master_clock)
2715                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2716
2717         vcpu->hv_clock.flags = pvclock_flags;
2718
2719         if (vcpu->pv_time_enabled)
2720                 kvm_setup_pvclock_page(v);
2721         if (v == kvm_get_vcpu(v->kvm, 0))
2722                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2723         return 0;
2724 }
2725
2726 /*
2727  * kvmclock updates which are isolated to a given vcpu, such as
2728  * vcpu->cpu migration, should not allow system_timestamp from
2729  * the rest of the vcpus to remain static. Otherwise ntp frequency
2730  * correction applies to one vcpu's system_timestamp but not
2731  * the others.
2732  *
2733  * So in those cases, request a kvmclock update for all vcpus.
2734  * We need to rate-limit these requests though, as they can
2735  * considerably slow guests that have a large number of vcpus.
2736  * The time for a remote vcpu to update its kvmclock is bound
2737  * by the delay we use to rate-limit the updates.
2738  */
2739
2740 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2741
2742 static void kvmclock_update_fn(struct work_struct *work)
2743 {
2744         int i;
2745         struct delayed_work *dwork = to_delayed_work(work);
2746         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2747                                            kvmclock_update_work);
2748         struct kvm *kvm = container_of(ka, struct kvm, arch);
2749         struct kvm_vcpu *vcpu;
2750
2751         kvm_for_each_vcpu(i, vcpu, kvm) {
2752                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2753                 kvm_vcpu_kick(vcpu);
2754         }
2755 }
2756
2757 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2758 {
2759         struct kvm *kvm = v->kvm;
2760
2761         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2762         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2763                                         KVMCLOCK_UPDATE_DELAY);
2764 }
2765
2766 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2767
2768 static void kvmclock_sync_fn(struct work_struct *work)
2769 {
2770         struct delayed_work *dwork = to_delayed_work(work);
2771         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2772                                            kvmclock_sync_work);
2773         struct kvm *kvm = container_of(ka, struct kvm, arch);
2774
2775         if (!kvmclock_periodic_sync)
2776                 return;
2777
2778         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2779         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2780                                         KVMCLOCK_SYNC_PERIOD);
2781 }
2782
2783 /*
2784  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
2785  */
2786 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
2787 {
2788         /* McStatusWrEn enabled? */
2789         if (guest_cpuid_is_amd_or_hygon(vcpu))
2790                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
2791
2792         return false;
2793 }
2794
2795 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2796 {
2797         u64 mcg_cap = vcpu->arch.mcg_cap;
2798         unsigned bank_num = mcg_cap & 0xff;
2799         u32 msr = msr_info->index;
2800         u64 data = msr_info->data;
2801
2802         switch (msr) {
2803         case MSR_IA32_MCG_STATUS:
2804                 vcpu->arch.mcg_status = data;
2805                 break;
2806         case MSR_IA32_MCG_CTL:
2807                 if (!(mcg_cap & MCG_CTL_P) &&
2808                     (data || !msr_info->host_initiated))
2809                         return 1;
2810                 if (data != 0 && data != ~(u64)0)
2811                         return 1;
2812                 vcpu->arch.mcg_ctl = data;
2813                 break;
2814         default:
2815                 if (msr >= MSR_IA32_MC0_CTL &&
2816                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2817                         u32 offset = array_index_nospec(
2818                                 msr - MSR_IA32_MC0_CTL,
2819                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
2820
2821                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2822                          * some Linux kernels though clear bit 10 in bank 4 to
2823                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2824                          * this to avoid an uncatched #GP in the guest
2825                          */
2826                         if ((offset & 0x3) == 0 &&
2827                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2828                                 return -1;
2829
2830                         /* MCi_STATUS */
2831                         if (!msr_info->host_initiated &&
2832                             (offset & 0x3) == 1 && data != 0) {
2833                                 if (!can_set_mci_status(vcpu))
2834                                         return -1;
2835                         }
2836
2837                         vcpu->arch.mce_banks[offset] = data;
2838                         break;
2839                 }
2840                 return 1;
2841         }
2842         return 0;
2843 }
2844
2845 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
2846 {
2847         struct kvm *kvm = vcpu->kvm;
2848         int lm = is_long_mode(vcpu);
2849         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
2850                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
2851         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
2852                 : kvm->arch.xen_hvm_config.blob_size_32;
2853         u32 page_num = data & ~PAGE_MASK;
2854         u64 page_addr = data & PAGE_MASK;
2855         u8 *page;
2856
2857         if (page_num >= blob_size)
2858                 return 1;
2859
2860         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
2861         if (IS_ERR(page))
2862                 return PTR_ERR(page);
2863
2864         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE)) {
2865                 kfree(page);
2866                 return 1;
2867         }
2868         return 0;
2869 }
2870
2871 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu *vcpu)
2872 {
2873         u64 mask = KVM_ASYNC_PF_ENABLED | KVM_ASYNC_PF_DELIVERY_AS_INT;
2874
2875         return (vcpu->arch.apf.msr_en_val & mask) == mask;
2876 }
2877
2878 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2879 {
2880         gpa_t gpa = data & ~0x3f;
2881
2882         /* Bits 4:5 are reserved, Should be zero */
2883         if (data & 0x30)
2884                 return 1;
2885
2886         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_VMEXIT) &&
2887             (data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT))
2888                 return 1;
2889
2890         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT) &&
2891             (data & KVM_ASYNC_PF_DELIVERY_AS_INT))
2892                 return 1;
2893
2894         if (!lapic_in_kernel(vcpu))
2895                 return data ? 1 : 0;
2896
2897         vcpu->arch.apf.msr_en_val = data;
2898
2899         if (!kvm_pv_async_pf_enabled(vcpu)) {
2900                 kvm_clear_async_pf_completion_queue(vcpu);
2901                 kvm_async_pf_hash_reset(vcpu);
2902                 return 0;
2903         }
2904
2905         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2906                                         sizeof(u64)))
2907                 return 1;
2908
2909         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2910         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
2911
2912         kvm_async_pf_wakeup_all(vcpu);
2913
2914         return 0;
2915 }
2916
2917 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu *vcpu, u64 data)
2918 {
2919         /* Bits 8-63 are reserved */
2920         if (data >> 8)
2921                 return 1;
2922
2923         if (!lapic_in_kernel(vcpu))
2924                 return 1;
2925
2926         vcpu->arch.apf.msr_int_val = data;
2927
2928         vcpu->arch.apf.vec = data & KVM_ASYNC_PF_VEC_MASK;
2929
2930         return 0;
2931 }
2932
2933 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2934 {
2935         vcpu->arch.pv_time_enabled = false;
2936         vcpu->arch.time = 0;
2937 }
2938
2939 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu *vcpu)
2940 {
2941         ++vcpu->stat.tlb_flush;
2942         kvm_x86_ops.tlb_flush_all(vcpu);
2943 }
2944
2945 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu *vcpu)
2946 {
2947         ++vcpu->stat.tlb_flush;
2948         kvm_x86_ops.tlb_flush_guest(vcpu);
2949 }
2950
2951 static void record_steal_time(struct kvm_vcpu *vcpu)
2952 {
2953         struct kvm_host_map map;
2954         struct kvm_steal_time *st;
2955
2956         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2957                 return;
2958
2959         /* -EAGAIN is returned in atomic context so we can just return. */
2960         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT,
2961                         &map, &vcpu->arch.st.cache, false))
2962                 return;
2963
2964         st = map.hva +
2965                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
2966
2967         /*
2968          * Doing a TLB flush here, on the guest's behalf, can avoid
2969          * expensive IPIs.
2970          */
2971         if (guest_pv_has(vcpu, KVM_FEATURE_PV_TLB_FLUSH)) {
2972                 trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
2973                                        st->preempted & KVM_VCPU_FLUSH_TLB);
2974                 if (xchg(&st->preempted, 0) & KVM_VCPU_FLUSH_TLB)
2975                         kvm_vcpu_flush_tlb_guest(vcpu);
2976         }
2977
2978         vcpu->arch.st.preempted = 0;
2979
2980         if (st->version & 1)
2981                 st->version += 1;  /* first time write, random junk */
2982
2983         st->version += 1;
2984
2985         smp_wmb();
2986
2987         st->steal += current->sched_info.run_delay -
2988                 vcpu->arch.st.last_steal;
2989         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2990
2991         smp_wmb();
2992
2993         st->version += 1;
2994
2995         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, false);
2996 }
2997
2998 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2999 {
3000         bool pr = false;
3001         u32 msr = msr_info->index;
3002         u64 data = msr_info->data;
3003
3004         switch (msr) {
3005         case MSR_AMD64_NB_CFG:
3006         case MSR_IA32_UCODE_WRITE:
3007         case MSR_VM_HSAVE_PA:
3008         case MSR_AMD64_PATCH_LOADER:
3009         case MSR_AMD64_BU_CFG2:
3010         case MSR_AMD64_DC_CFG:
3011         case MSR_F15H_EX_CFG:
3012                 break;
3013
3014         case MSR_IA32_UCODE_REV:
3015                 if (msr_info->host_initiated)
3016                         vcpu->arch.microcode_version = data;
3017                 break;
3018         case MSR_IA32_ARCH_CAPABILITIES:
3019                 if (!msr_info->host_initiated)
3020                         return 1;
3021                 vcpu->arch.arch_capabilities = data;
3022                 break;
3023         case MSR_IA32_PERF_CAPABILITIES: {
3024                 struct kvm_msr_entry msr_ent = {.index = msr, .data = 0};
3025
3026                 if (!msr_info->host_initiated)
3027                         return 1;
3028                 if (guest_cpuid_has(vcpu, X86_FEATURE_PDCM) && kvm_get_msr_feature(&msr_ent))
3029                         return 1;
3030                 if (data & ~msr_ent.data)
3031                         return 1;
3032
3033                 vcpu->arch.perf_capabilities = data;
3034
3035                 return 0;
3036                 }
3037         case MSR_EFER:
3038                 return set_efer(vcpu, msr_info);
3039         case MSR_K7_HWCR:
3040                 data &= ~(u64)0x40;     /* ignore flush filter disable */
3041                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
3042                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
3043
3044                 /* Handle McStatusWrEn */
3045                 if (data == BIT_ULL(18)) {
3046                         vcpu->arch.msr_hwcr = data;
3047                 } else if (data != 0) {
3048                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
3049                                     data);
3050                         return 1;
3051                 }
3052                 break;
3053         case MSR_FAM10H_MMIO_CONF_BASE:
3054                 if (data != 0) {
3055                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
3056                                     "0x%llx\n", data);
3057                         return 1;
3058                 }
3059                 break;
3060         case MSR_IA32_DEBUGCTLMSR:
3061                 if (!data) {
3062                         /* We support the non-activated case already */
3063                         break;
3064                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
3065                         /* Values other than LBR and BTF are vendor-specific,
3066                            thus reserved and should throw a #GP */
3067                         return 1;
3068                 }
3069                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
3070                             __func__, data);
3071                 break;
3072         case 0x200 ... 0x2ff:
3073                 return kvm_mtrr_set_msr(vcpu, msr, data);
3074         case MSR_IA32_APICBASE:
3075                 return kvm_set_apic_base(vcpu, msr_info);
3076         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3077                 return kvm_x2apic_msr_write(vcpu, msr, data);
3078         case MSR_IA32_TSCDEADLINE:
3079                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
3080                 break;
3081         case MSR_IA32_TSC_ADJUST:
3082                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
3083                         if (!msr_info->host_initiated) {
3084                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
3085                                 adjust_tsc_offset_guest(vcpu, adj);
3086                         }
3087                         vcpu->arch.ia32_tsc_adjust_msr = data;
3088                 }
3089                 break;
3090         case MSR_IA32_MISC_ENABLE:
3091                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
3092                     ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
3093                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
3094                                 return 1;
3095                         vcpu->arch.ia32_misc_enable_msr = data;
3096                         kvm_update_cpuid_runtime(vcpu);
3097                 } else {
3098                         vcpu->arch.ia32_misc_enable_msr = data;
3099                 }
3100                 break;
3101         case MSR_IA32_SMBASE:
3102                 if (!msr_info->host_initiated)
3103                         return 1;
3104                 vcpu->arch.smbase = data;
3105                 break;
3106         case MSR_IA32_POWER_CTL:
3107                 vcpu->arch.msr_ia32_power_ctl = data;
3108                 break;
3109         case MSR_IA32_TSC:
3110                 if (msr_info->host_initiated) {
3111                         kvm_synchronize_tsc(vcpu, data);
3112                 } else {
3113                         u64 adj = kvm_compute_tsc_offset(vcpu, data) - vcpu->arch.l1_tsc_offset;
3114                         adjust_tsc_offset_guest(vcpu, adj);
3115                         vcpu->arch.ia32_tsc_adjust_msr += adj;
3116                 }
3117                 break;
3118         case MSR_IA32_XSS:
3119                 if (!msr_info->host_initiated &&
3120                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3121                         return 1;
3122                 /*
3123                  * KVM supports exposing PT to the guest, but does not support
3124                  * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3125                  * XSAVES/XRSTORS to save/restore PT MSRs.
3126                  */
3127                 if (data & ~supported_xss)
3128                         return 1;
3129                 vcpu->arch.ia32_xss = data;
3130                 break;
3131         case MSR_SMI_COUNT:
3132                 if (!msr_info->host_initiated)
3133                         return 1;
3134                 vcpu->arch.smi_count = data;
3135                 break;
3136         case MSR_KVM_WALL_CLOCK_NEW:
3137                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3138                         return 1;
3139
3140                 kvm_write_wall_clock(vcpu->kvm, data);
3141                 break;
3142         case MSR_KVM_WALL_CLOCK:
3143                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3144                         return 1;
3145
3146                 kvm_write_wall_clock(vcpu->kvm, data);
3147                 break;
3148         case MSR_KVM_SYSTEM_TIME_NEW:
3149                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3150                         return 1;
3151
3152                 kvm_write_system_time(vcpu, data, false, msr_info->host_initiated);
3153                 break;
3154         case MSR_KVM_SYSTEM_TIME:
3155                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3156                         return 1;
3157
3158                 kvm_write_system_time(vcpu, data, true,  msr_info->host_initiated);
3159                 break;
3160         case MSR_KVM_ASYNC_PF_EN:
3161                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3162                         return 1;
3163
3164                 if (kvm_pv_enable_async_pf(vcpu, data))
3165                         return 1;
3166                 break;
3167         case MSR_KVM_ASYNC_PF_INT:
3168                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3169                         return 1;
3170
3171                 if (kvm_pv_enable_async_pf_int(vcpu, data))
3172                         return 1;
3173                 break;
3174         case MSR_KVM_ASYNC_PF_ACK:
3175                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3176                         return 1;
3177                 if (data & 0x1) {
3178                         vcpu->arch.apf.pageready_pending = false;
3179                         kvm_check_async_pf_completion(vcpu);
3180                 }
3181                 break;
3182         case MSR_KVM_STEAL_TIME:
3183                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3184                         return 1;
3185
3186                 if (unlikely(!sched_info_on()))
3187                         return 1;
3188
3189                 if (data & KVM_STEAL_RESERVED_MASK)
3190                         return 1;
3191
3192                 vcpu->arch.st.msr_val = data;
3193
3194                 if (!(data & KVM_MSR_ENABLED))
3195                         break;
3196
3197                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3198
3199                 break;
3200         case MSR_KVM_PV_EOI_EN:
3201                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3202                         return 1;
3203
3204                 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
3205                         return 1;
3206                 break;
3207
3208         case MSR_KVM_POLL_CONTROL:
3209                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3210                         return 1;
3211
3212                 /* only enable bit supported */
3213                 if (data & (-1ULL << 1))
3214                         return 1;
3215
3216                 vcpu->arch.msr_kvm_poll_control = data;
3217                 break;
3218
3219         case MSR_IA32_MCG_CTL:
3220         case MSR_IA32_MCG_STATUS:
3221         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3222                 return set_msr_mce(vcpu, msr_info);
3223
3224         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3225         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3226                 pr = true;
3227                 fallthrough;
3228         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3229         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3230                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3231                         return kvm_pmu_set_msr(vcpu, msr_info);
3232
3233                 if (pr || data != 0)
3234                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
3235                                     "0x%x data 0x%llx\n", msr, data);
3236                 break;
3237         case MSR_K7_CLK_CTL:
3238                 /*
3239                  * Ignore all writes to this no longer documented MSR.
3240                  * Writes are only relevant for old K7 processors,
3241                  * all pre-dating SVM, but a recommended workaround from
3242                  * AMD for these chips. It is possible to specify the
3243                  * affected processor models on the command line, hence
3244                  * the need to ignore the workaround.
3245                  */
3246                 break;
3247         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3248         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3249         case HV_X64_MSR_SYNDBG_OPTIONS:
3250         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3251         case HV_X64_MSR_CRASH_CTL:
3252         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3253         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3254         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3255         case HV_X64_MSR_TSC_EMULATION_STATUS:
3256                 return kvm_hv_set_msr_common(vcpu, msr, data,
3257                                              msr_info->host_initiated);
3258         case MSR_IA32_BBL_CR_CTL3:
3259                 /* Drop writes to this legacy MSR -- see rdmsr
3260                  * counterpart for further detail.
3261                  */
3262                 if (report_ignored_msrs)
3263                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
3264                                 msr, data);
3265                 break;
3266         case MSR_AMD64_OSVW_ID_LENGTH:
3267                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3268                         return 1;
3269                 vcpu->arch.osvw.length = data;
3270                 break;
3271         case MSR_AMD64_OSVW_STATUS:
3272                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3273                         return 1;
3274                 vcpu->arch.osvw.status = data;
3275                 break;
3276         case MSR_PLATFORM_INFO:
3277                 if (!msr_info->host_initiated ||
3278                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
3279                      cpuid_fault_enabled(vcpu)))
3280                         return 1;
3281                 vcpu->arch.msr_platform_info = data;
3282                 break;
3283         case MSR_MISC_FEATURES_ENABLES:
3284                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
3285                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
3286                      !supports_cpuid_fault(vcpu)))
3287                         return 1;
3288                 vcpu->arch.msr_misc_features_enables = data;
3289                 break;
3290         default:
3291                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
3292                         return xen_hvm_config(vcpu, data);
3293                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3294                         return kvm_pmu_set_msr(vcpu, msr_info);
3295                 return KVM_MSR_RET_INVALID;
3296         }
3297         return 0;
3298 }
3299 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
3300
3301 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
3302 {
3303         u64 data;
3304         u64 mcg_cap = vcpu->arch.mcg_cap;
3305         unsigned bank_num = mcg_cap & 0xff;
3306
3307         switch (msr) {
3308         case MSR_IA32_P5_MC_ADDR:
3309         case MSR_IA32_P5_MC_TYPE:
3310                 data = 0;
3311                 break;
3312         case MSR_IA32_MCG_CAP:
3313                 data = vcpu->arch.mcg_cap;
3314                 break;
3315         case MSR_IA32_MCG_CTL:
3316                 if (!(mcg_cap & MCG_CTL_P) && !host)
3317                         return 1;
3318                 data = vcpu->arch.mcg_ctl;
3319                 break;
3320         case MSR_IA32_MCG_STATUS:
3321                 data = vcpu->arch.mcg_status;
3322                 break;
3323         default:
3324                 if (msr >= MSR_IA32_MC0_CTL &&
3325                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3326                         u32 offset = array_index_nospec(
3327                                 msr - MSR_IA32_MC0_CTL,
3328                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3329
3330                         data = vcpu->arch.mce_banks[offset];
3331                         break;
3332                 }
3333                 return 1;
3334         }
3335         *pdata = data;
3336         return 0;
3337 }
3338
3339 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3340 {
3341         switch (msr_info->index) {
3342         case MSR_IA32_PLATFORM_ID:
3343         case MSR_IA32_EBL_CR_POWERON:
3344         case MSR_IA32_DEBUGCTLMSR:
3345         case MSR_IA32_LASTBRANCHFROMIP:
3346         case MSR_IA32_LASTBRANCHTOIP:
3347         case MSR_IA32_LASTINTFROMIP:
3348         case MSR_IA32_LASTINTTOIP:
3349         case MSR_K8_SYSCFG:
3350         case MSR_K8_TSEG_ADDR:
3351         case MSR_K8_TSEG_MASK:
3352         case MSR_VM_HSAVE_PA:
3353         case MSR_K8_INT_PENDING_MSG:
3354         case MSR_AMD64_NB_CFG:
3355         case MSR_FAM10H_MMIO_CONF_BASE:
3356         case MSR_AMD64_BU_CFG2:
3357         case MSR_IA32_PERF_CTL:
3358         case MSR_AMD64_DC_CFG:
3359         case MSR_F15H_EX_CFG:
3360         /*
3361          * Intel Sandy Bridge CPUs must support the RAPL (running average power
3362          * limit) MSRs. Just return 0, as we do not want to expose the host
3363          * data here. Do not conditionalize this on CPUID, as KVM does not do
3364          * so for existing CPU-specific MSRs.
3365          */
3366         case MSR_RAPL_POWER_UNIT:
3367         case MSR_PP0_ENERGY_STATUS:     /* Power plane 0 (core) */
3368         case MSR_PP1_ENERGY_STATUS:     /* Power plane 1 (graphics uncore) */
3369         case MSR_PKG_ENERGY_STATUS:     /* Total package */
3370         case MSR_DRAM_ENERGY_STATUS:    /* DRAM controller */
3371                 msr_info->data = 0;
3372                 break;
3373         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
3374         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3375         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3376         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3377         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3378                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3379                         return kvm_pmu_get_msr(vcpu, msr_info);
3380                 msr_info->data = 0;
3381                 break;
3382         case MSR_IA32_UCODE_REV:
3383                 msr_info->data = vcpu->arch.microcode_version;
3384                 break;
3385         case MSR_IA32_ARCH_CAPABILITIES:
3386                 if (!msr_info->host_initiated &&
3387                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
3388                         return 1;
3389                 msr_info->data = vcpu->arch.arch_capabilities;
3390                 break;
3391         case MSR_IA32_PERF_CAPABILITIES:
3392                 if (!msr_info->host_initiated &&
3393                     !guest_cpuid_has(vcpu, X86_FEATURE_PDCM))
3394                         return 1;
3395                 msr_info->data = vcpu->arch.perf_capabilities;
3396                 break;
3397         case MSR_IA32_POWER_CTL:
3398                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
3399                 break;
3400         case MSR_IA32_TSC: {
3401                 /*
3402                  * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3403                  * even when not intercepted. AMD manual doesn't explicitly
3404                  * state this but appears to behave the same.
3405                  *
3406                  * On userspace reads and writes, however, we unconditionally
3407                  * return L1's TSC value to ensure backwards-compatible
3408                  * behavior for migration.
3409                  */
3410                 u64 tsc_offset = msr_info->host_initiated ? vcpu->arch.l1_tsc_offset :
3411                                                             vcpu->arch.tsc_offset;
3412
3413                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc()) + tsc_offset;
3414                 break;
3415         }
3416         case MSR_MTRRcap:
3417         case 0x200 ... 0x2ff:
3418                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
3419         case 0xcd: /* fsb frequency */
3420                 msr_info->data = 3;
3421                 break;
3422                 /*
3423                  * MSR_EBC_FREQUENCY_ID
3424                  * Conservative value valid for even the basic CPU models.
3425                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3426                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3427                  * and 266MHz for model 3, or 4. Set Core Clock
3428                  * Frequency to System Bus Frequency Ratio to 1 (bits
3429                  * 31:24) even though these are only valid for CPU
3430                  * models > 2, however guests may end up dividing or
3431                  * multiplying by zero otherwise.
3432                  */
3433         case MSR_EBC_FREQUENCY_ID:
3434                 msr_info->data = 1 << 24;
3435                 break;
3436         case MSR_IA32_APICBASE:
3437                 msr_info->data = kvm_get_apic_base(vcpu);
3438                 break;
3439         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3440                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
3441         case MSR_IA32_TSCDEADLINE:
3442                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
3443                 break;
3444         case MSR_IA32_TSC_ADJUST:
3445                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
3446                 break;
3447         case MSR_IA32_MISC_ENABLE:
3448                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
3449                 break;
3450         case MSR_IA32_SMBASE:
3451                 if (!msr_info->host_initiated)
3452                         return 1;
3453                 msr_info->data = vcpu->arch.smbase;
3454                 break;
3455         case MSR_SMI_COUNT:
3456                 msr_info->data = vcpu->arch.smi_count;
3457                 break;
3458         case MSR_IA32_PERF_STATUS:
3459                 /* TSC increment by tick */
3460                 msr_info->data = 1000ULL;
3461                 /* CPU multiplier */
3462                 msr_info->data |= (((uint64_t)4ULL) << 40);
3463                 break;
3464         case MSR_EFER:
3465                 msr_info->data = vcpu->arch.efer;
3466                 break;
3467         case MSR_KVM_WALL_CLOCK:
3468                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3469                         return 1;
3470
3471                 msr_info->data = vcpu->kvm->arch.wall_clock;
3472                 break;
3473         case MSR_KVM_WALL_CLOCK_NEW:
3474                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3475                         return 1;
3476
3477                 msr_info->data = vcpu->kvm->arch.wall_clock;
3478                 break;
3479         case MSR_KVM_SYSTEM_TIME:
3480                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3481                         return 1;
3482
3483                 msr_info->data = vcpu->arch.time;
3484                 break;
3485         case MSR_KVM_SYSTEM_TIME_NEW:
3486                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3487                         return 1;
3488
3489                 msr_info->data = vcpu->arch.time;
3490                 break;
3491         case MSR_KVM_ASYNC_PF_EN:
3492                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3493                         return 1;
3494
3495                 msr_info->data = vcpu->arch.apf.msr_en_val;
3496                 break;
3497         case MSR_KVM_ASYNC_PF_INT:
3498                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3499                         return 1;
3500
3501                 msr_info->data = vcpu->arch.apf.msr_int_val;
3502                 break;
3503         case MSR_KVM_ASYNC_PF_ACK:
3504                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3505                         return 1;
3506
3507                 msr_info->data = 0;
3508                 break;
3509         case MSR_KVM_STEAL_TIME:
3510                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3511                         return 1;
3512
3513                 msr_info->data = vcpu->arch.st.msr_val;
3514                 break;
3515         case MSR_KVM_PV_EOI_EN:
3516                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3517                         return 1;
3518
3519                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
3520                 break;
3521         case MSR_KVM_POLL_CONTROL:
3522                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3523                         return 1;
3524
3525                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
3526                 break;
3527         case MSR_IA32_P5_MC_ADDR:
3528         case MSR_IA32_P5_MC_TYPE:
3529         case MSR_IA32_MCG_CAP:
3530         case MSR_IA32_MCG_CTL:
3531         case MSR_IA32_MCG_STATUS:
3532         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3533                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
3534                                    msr_info->host_initiated);
3535         case MSR_IA32_XSS:
3536                 if (!msr_info->host_initiated &&
3537                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3538                         return 1;
3539                 msr_info->data = vcpu->arch.ia32_xss;
3540                 break;
3541         case MSR_K7_CLK_CTL:
3542                 /*
3543                  * Provide expected ramp-up count for K7. All other
3544                  * are set to zero, indicating minimum divisors for
3545                  * every field.
3546                  *
3547                  * This prevents guest kernels on AMD host with CPU
3548                  * type 6, model 8 and higher from exploding due to
3549                  * the rdmsr failing.
3550                  */
3551                 msr_info->data = 0x20000000;
3552                 break;
3553         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3554         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3555         case HV_X64_MSR_SYNDBG_OPTIONS:
3556         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3557         case HV_X64_MSR_CRASH_CTL:
3558         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3559         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3560         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3561         case HV_X64_MSR_TSC_EMULATION_STATUS:
3562                 return kvm_hv_get_msr_common(vcpu,
3563                                              msr_info->index, &msr_info->data,
3564                                              msr_info->host_initiated);
3565         case MSR_IA32_BBL_CR_CTL3:
3566                 /* This legacy MSR exists but isn't fully documented in current
3567                  * silicon.  It is however accessed by winxp in very narrow
3568                  * scenarios where it sets bit #19, itself documented as
3569                  * a "reserved" bit.  Best effort attempt to source coherent
3570                  * read data here should the balance of the register be
3571                  * interpreted by the guest:
3572                  *
3573                  * L2 cache control register 3: 64GB range, 256KB size,
3574                  * enabled, latency 0x1, configured
3575                  */
3576                 msr_info->data = 0xbe702111;
3577                 break;
3578         case MSR_AMD64_OSVW_ID_LENGTH:
3579                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3580                         return 1;
3581                 msr_info->data = vcpu->arch.osvw.length;
3582                 break;
3583         case MSR_AMD64_OSVW_STATUS:
3584                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3585                         return 1;
3586                 msr_info->data = vcpu->arch.osvw.status;
3587                 break;
3588         case MSR_PLATFORM_INFO:
3589                 if (!msr_info->host_initiated &&
3590                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
3591                         return 1;
3592                 msr_info->data = vcpu->arch.msr_platform_info;
3593                 break;
3594         case MSR_MISC_FEATURES_ENABLES:
3595                 msr_info->data = vcpu->arch.msr_misc_features_enables;
3596                 break;
3597         case MSR_K7_HWCR:
3598                 msr_info->data = vcpu->arch.msr_hwcr;
3599                 break;
3600         default:
3601                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3602                         return kvm_pmu_get_msr(vcpu, msr_info);
3603                 return KVM_MSR_RET_INVALID;
3604         }
3605         return 0;
3606 }
3607 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
3608
3609 /*
3610  * Read or write a bunch of msrs. All parameters are kernel addresses.
3611  *
3612  * @return number of msrs set successfully.
3613  */
3614 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
3615                     struct kvm_msr_entry *entries,
3616                     int (*do_msr)(struct kvm_vcpu *vcpu,
3617                                   unsigned index, u64 *data))
3618 {
3619         int i;
3620
3621         for (i = 0; i < msrs->nmsrs; ++i)
3622                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
3623                         break;
3624
3625         return i;
3626 }
3627
3628 /*
3629  * Read or write a bunch of msrs. Parameters are user addresses.
3630  *
3631  * @return number of msrs set successfully.
3632  */
3633 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
3634                   int (*do_msr)(struct kvm_vcpu *vcpu,
3635                                 unsigned index, u64 *data),
3636                   int writeback)
3637 {
3638         struct kvm_msrs msrs;
3639         struct kvm_msr_entry *entries;
3640         int r, n;
3641         unsigned size;
3642
3643         r = -EFAULT;
3644         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
3645                 goto out;
3646
3647         r = -E2BIG;
3648         if (msrs.nmsrs >= MAX_IO_MSRS)
3649                 goto out;
3650
3651         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
3652         entries = memdup_user(user_msrs->entries, size);
3653         if (IS_ERR(entries)) {
3654                 r = PTR_ERR(entries);
3655                 goto out;
3656         }
3657
3658         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
3659         if (r < 0)
3660                 goto out_free;
3661
3662         r = -EFAULT;
3663         if (writeback && copy_to_user(user_msrs->entries, entries, size))
3664                 goto out_free;
3665
3666         r = n;
3667
3668 out_free:
3669         kfree(entries);
3670 out:
3671         return r;
3672 }
3673
3674 static inline bool kvm_can_mwait_in_guest(void)
3675 {
3676         return boot_cpu_has(X86_FEATURE_MWAIT) &&
3677                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
3678                 boot_cpu_has(X86_FEATURE_ARAT);
3679 }
3680
3681 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
3682 {
3683         int r = 0;
3684
3685         switch (ext) {
3686         case KVM_CAP_IRQCHIP:
3687         case KVM_CAP_HLT:
3688         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
3689         case KVM_CAP_SET_TSS_ADDR:
3690         case KVM_CAP_EXT_CPUID:
3691         case KVM_CAP_EXT_EMUL_CPUID:
3692         case KVM_CAP_CLOCKSOURCE:
3693         case KVM_CAP_PIT:
3694         case KVM_CAP_NOP_IO_DELAY:
3695         case KVM_CAP_MP_STATE:
3696         case KVM_CAP_SYNC_MMU:
3697         case KVM_CAP_USER_NMI:
3698         case KVM_CAP_REINJECT_CONTROL:
3699         case KVM_CAP_IRQ_INJECT_STATUS:
3700         case KVM_CAP_IOEVENTFD:
3701         case KVM_CAP_IOEVENTFD_NO_LENGTH:
3702         case KVM_CAP_PIT2:
3703         case KVM_CAP_PIT_STATE2:
3704         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
3705         case KVM_CAP_XEN_HVM:
3706         case KVM_CAP_VCPU_EVENTS:
3707         case KVM_CAP_HYPERV:
3708         case KVM_CAP_HYPERV_VAPIC:
3709         case KVM_CAP_HYPERV_SPIN:
3710         case KVM_CAP_HYPERV_SYNIC:
3711         case KVM_CAP_HYPERV_SYNIC2:
3712         case KVM_CAP_HYPERV_VP_INDEX:
3713         case KVM_CAP_HYPERV_EVENTFD:
3714         case KVM_CAP_HYPERV_TLBFLUSH:
3715         case KVM_CAP_HYPERV_SEND_IPI:
3716         case KVM_CAP_HYPERV_CPUID:
3717         case KVM_CAP_PCI_SEGMENT:
3718         case KVM_CAP_DEBUGREGS:
3719         case KVM_CAP_X86_ROBUST_SINGLESTEP:
3720         case KVM_CAP_XSAVE:
3721         case KVM_CAP_ASYNC_PF:
3722         case KVM_CAP_ASYNC_PF_INT:
3723         case KVM_CAP_GET_TSC_KHZ:
3724         case KVM_CAP_KVMCLOCK_CTRL:
3725         case KVM_CAP_READONLY_MEM:
3726         case KVM_CAP_HYPERV_TIME:
3727         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
3728         case KVM_CAP_TSC_DEADLINE_TIMER:
3729         case KVM_CAP_DISABLE_QUIRKS:
3730         case KVM_CAP_SET_BOOT_CPU_ID:
3731         case KVM_CAP_SPLIT_IRQCHIP:
3732         case KVM_CAP_IMMEDIATE_EXIT:
3733         case KVM_CAP_PMU_EVENT_FILTER:
3734         case KVM_CAP_GET_MSR_FEATURES:
3735         case KVM_CAP_MSR_PLATFORM_INFO:
3736         case KVM_CAP_EXCEPTION_PAYLOAD:
3737         case KVM_CAP_SET_GUEST_DEBUG:
3738         case KVM_CAP_LAST_CPU:
3739         case KVM_CAP_X86_USER_SPACE_MSR:
3740         case KVM_CAP_X86_MSR_FILTER:
3741         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
3742                 r = 1;
3743                 break;
3744         case KVM_CAP_SYNC_REGS:
3745                 r = KVM_SYNC_X86_VALID_FIELDS;
3746                 break;
3747         case KVM_CAP_ADJUST_CLOCK:
3748                 r = KVM_CLOCK_TSC_STABLE;
3749                 break;
3750         case KVM_CAP_X86_DISABLE_EXITS:
3751                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
3752                       KVM_X86_DISABLE_EXITS_CSTATE;
3753                 if(kvm_can_mwait_in_guest())
3754                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
3755                 break;
3756         case KVM_CAP_X86_SMM:
3757                 /* SMBASE is usually relocated above 1M on modern chipsets,
3758                  * and SMM handlers might indeed rely on 4G segment limits,
3759                  * so do not report SMM to be available if real mode is
3760                  * emulated via vm86 mode.  Still, do not go to great lengths
3761                  * to avoid userspace's usage of the feature, because it is a
3762                  * fringe case that is not enabled except via specific settings
3763                  * of the module parameters.
3764                  */
3765                 r = kvm_x86_ops.has_emulated_msr(MSR_IA32_SMBASE);
3766                 break;
3767         case KVM_CAP_VAPIC:
3768                 r = !kvm_x86_ops.cpu_has_accelerated_tpr();
3769                 break;
3770         case KVM_CAP_NR_VCPUS:
3771                 r = KVM_SOFT_MAX_VCPUS;
3772                 break;
3773         case KVM_CAP_MAX_VCPUS:
3774                 r = KVM_MAX_VCPUS;
3775                 break;
3776         case KVM_CAP_MAX_VCPU_ID:
3777                 r = KVM_MAX_VCPU_ID;
3778                 break;
3779         case KVM_CAP_PV_MMU:    /* obsolete */
3780                 r = 0;
3781                 break;
3782         case KVM_CAP_MCE:
3783                 r = KVM_MAX_MCE_BANKS;
3784                 break;
3785         case KVM_CAP_XCRS:
3786                 r = boot_cpu_has(X86_FEATURE_XSAVE);
3787                 break;
3788         case KVM_CAP_TSC_CONTROL:
3789                 r = kvm_has_tsc_control;
3790                 break;
3791         case KVM_CAP_X2APIC_API:
3792                 r = KVM_X2APIC_API_VALID_FLAGS;
3793                 break;
3794         case KVM_CAP_NESTED_STATE:
3795                 r = kvm_x86_ops.nested_ops->get_state ?
3796                         kvm_x86_ops.nested_ops->get_state(NULL, NULL, 0) : 0;
3797                 break;
3798         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
3799                 r = kvm_x86_ops.enable_direct_tlbflush != NULL;
3800                 break;
3801         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
3802                 r = kvm_x86_ops.nested_ops->enable_evmcs != NULL;
3803                 break;
3804         case KVM_CAP_SMALLER_MAXPHYADDR:
3805                 r = (int) allow_smaller_maxphyaddr;
3806                 break;
3807         case KVM_CAP_STEAL_TIME:
3808                 r = sched_info_on();
3809                 break;
3810         default:
3811                 break;
3812         }
3813         return r;
3814
3815 }
3816
3817 long kvm_arch_dev_ioctl(struct file *filp,
3818                         unsigned int ioctl, unsigned long arg)
3819 {
3820         void __user *argp = (void __user *)arg;
3821         long r;
3822
3823         switch (ioctl) {
3824         case KVM_GET_MSR_INDEX_LIST: {
3825                 struct kvm_msr_list __user *user_msr_list = argp;
3826                 struct kvm_msr_list msr_list;
3827                 unsigned n;
3828
3829                 r = -EFAULT;
3830                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3831                         goto out;
3832                 n = msr_list.nmsrs;
3833                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
3834                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3835                         goto out;
3836                 r = -E2BIG;
3837                 if (n < msr_list.nmsrs)
3838                         goto out;
3839                 r = -EFAULT;
3840                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
3841                                  num_msrs_to_save * sizeof(u32)))
3842                         goto out;
3843                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
3844                                  &emulated_msrs,
3845                                  num_emulated_msrs * sizeof(u32)))
3846                         goto out;
3847                 r = 0;
3848                 break;
3849         }
3850         case KVM_GET_SUPPORTED_CPUID:
3851         case KVM_GET_EMULATED_CPUID: {
3852                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3853                 struct kvm_cpuid2 cpuid;
3854
3855                 r = -EFAULT;
3856                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3857                         goto out;
3858
3859                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
3860                                             ioctl);
3861                 if (r)
3862                         goto out;
3863
3864                 r = -EFAULT;
3865                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3866                         goto out;
3867                 r = 0;
3868                 break;
3869         }
3870         case KVM_X86_GET_MCE_CAP_SUPPORTED:
3871                 r = -EFAULT;
3872                 if (copy_to_user(argp, &kvm_mce_cap_supported,
3873                                  sizeof(kvm_mce_cap_supported)))
3874                         goto out;
3875                 r = 0;
3876                 break;
3877         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
3878                 struct kvm_msr_list __user *user_msr_list = argp;
3879                 struct kvm_msr_list msr_list;
3880                 unsigned int n;
3881
3882                 r = -EFAULT;
3883                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3884                         goto out;
3885                 n = msr_list.nmsrs;
3886                 msr_list.nmsrs = num_msr_based_features;
3887                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3888                         goto out;
3889                 r = -E2BIG;
3890                 if (n < msr_list.nmsrs)
3891                         goto out;
3892                 r = -EFAULT;
3893                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
3894                                  num_msr_based_features * sizeof(u32)))
3895                         goto out;
3896                 r = 0;
3897                 break;
3898         }
3899         case KVM_GET_MSRS:
3900                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
3901                 break;
3902         default:
3903                 r = -EINVAL;
3904                 break;
3905         }
3906 out:
3907         return r;
3908 }
3909
3910 static void wbinvd_ipi(void *garbage)
3911 {
3912         wbinvd();
3913 }
3914
3915 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
3916 {
3917         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
3918 }
3919
3920 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
3921 {
3922         /* Address WBINVD may be executed by guest */
3923         if (need_emulate_wbinvd(vcpu)) {
3924                 if (kvm_x86_ops.has_wbinvd_exit())
3925                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
3926                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
3927                         smp_call_function_single(vcpu->cpu,
3928                                         wbinvd_ipi, NULL, 1);
3929         }
3930
3931         kvm_x86_ops.vcpu_load(vcpu, cpu);
3932
3933         /* Save host pkru register if supported */
3934         vcpu->arch.host_pkru = read_pkru();
3935
3936         /* Apply any externally detected TSC adjustments (due to suspend) */
3937         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
3938                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
3939                 vcpu->arch.tsc_offset_adjustment = 0;
3940                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3941         }
3942
3943         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
3944                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
3945                                 rdtsc() - vcpu->arch.last_host_tsc;
3946                 if (tsc_delta < 0)
3947                         mark_tsc_unstable("KVM discovered backwards TSC");
3948
3949                 if (kvm_check_tsc_unstable()) {
3950                         u64 offset = kvm_compute_tsc_offset(vcpu,
3951                                                 vcpu->arch.last_guest_tsc);
3952                         kvm_vcpu_write_tsc_offset(vcpu, offset);
3953                         vcpu->arch.tsc_catchup = 1;
3954                 }
3955
3956                 if (kvm_lapic_hv_timer_in_use(vcpu))
3957                         kvm_lapic_restart_hv_timer(vcpu);
3958
3959                 /*
3960                  * On a host with synchronized TSC, there is no need to update
3961                  * kvmclock on vcpu->cpu migration
3962                  */
3963                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
3964                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
3965                 if (vcpu->cpu != cpu)
3966                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
3967                 vcpu->cpu = cpu;
3968         }
3969
3970         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3971 }
3972
3973 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
3974 {
3975         struct kvm_host_map map;
3976         struct kvm_steal_time *st;
3977
3978         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3979                 return;
3980
3981         if (vcpu->arch.st.preempted)
3982                 return;
3983
3984         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT, &map,
3985                         &vcpu->arch.st.cache, true))
3986                 return;
3987
3988         st = map.hva +
3989                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
3990
3991         st->preempted = vcpu->arch.st.preempted = KVM_VCPU_PREEMPTED;
3992
3993         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, true);
3994 }
3995
3996 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
3997 {
3998         int idx;
3999
4000         if (vcpu->preempted)
4001                 vcpu->arch.preempted_in_kernel = !kvm_x86_ops.get_cpl(vcpu);
4002
4003         /*
4004          * Disable page faults because we're in atomic context here.
4005          * kvm_write_guest_offset_cached() would call might_fault()
4006          * that relies on pagefault_disable() to tell if there's a
4007          * bug. NOTE: the write to guest memory may not go through if
4008          * during postcopy live migration or if there's heavy guest
4009          * paging.
4010          */
4011         pagefault_disable();
4012         /*
4013          * kvm_memslots() will be called by
4014          * kvm_write_guest_offset_cached() so take the srcu lock.
4015          */
4016         idx = srcu_read_lock(&vcpu->kvm->srcu);
4017         kvm_steal_time_set_preempted(vcpu);
4018         srcu_read_unlock(&vcpu->kvm->srcu, idx);
4019         pagefault_enable();
4020         kvm_x86_ops.vcpu_put(vcpu);
4021         vcpu->arch.last_host_tsc = rdtsc();
4022         /*
4023          * If userspace has set any breakpoints or watchpoints, dr6 is restored
4024          * on every vmexit, but if not, we might have a stale dr6 from the
4025          * guest. do_debug expects dr6 to be cleared after it runs, do the same.
4026          */
4027         set_debugreg(0, 6);
4028 }
4029
4030 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
4031                                     struct kvm_lapic_state *s)
4032 {
4033         if (vcpu->arch.apicv_active)
4034                 kvm_x86_ops.sync_pir_to_irr(vcpu);
4035
4036         return kvm_apic_get_state(vcpu, s);
4037 }
4038
4039 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
4040                                     struct kvm_lapic_state *s)
4041 {
4042         int r;
4043
4044         r = kvm_apic_set_state(vcpu, s);
4045         if (r)
4046                 return r;
4047         update_cr8_intercept(vcpu);
4048
4049         return 0;
4050 }
4051
4052 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
4053 {
4054         return (!lapic_in_kernel(vcpu) ||
4055                 kvm_apic_accept_pic_intr(vcpu));
4056 }
4057
4058 /*
4059  * if userspace requested an interrupt window, check that the
4060  * interrupt window is open.
4061  *
4062  * No need to exit to userspace if we already have an interrupt queued.
4063  */
4064 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
4065 {
4066         return kvm_arch_interrupt_allowed(vcpu) &&
4067                 !kvm_cpu_has_interrupt(vcpu) &&
4068                 !kvm_event_needs_reinjection(vcpu) &&
4069                 kvm_cpu_accept_dm_intr(vcpu);
4070 }
4071
4072 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
4073                                     struct kvm_interrupt *irq)
4074 {
4075         if (irq->irq >= KVM_NR_INTERRUPTS)
4076                 return -EINVAL;
4077
4078         if (!irqchip_in_kernel(vcpu->kvm)) {
4079                 kvm_queue_interrupt(vcpu, irq->irq, false);
4080                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4081                 return 0;
4082         }
4083
4084         /*
4085          * With in-kernel LAPIC, we only use this to inject EXTINT, so
4086          * fail for in-kernel 8259.
4087          */
4088         if (pic_in_kernel(vcpu->kvm))
4089                 return -ENXIO;
4090
4091         if (vcpu->arch.pending_external_vector != -1)
4092                 return -EEXIST;
4093
4094         vcpu->arch.pending_external_vector = irq->irq;
4095         kvm_make_request(KVM_REQ_EVENT, vcpu);
4096         return 0;
4097 }
4098
4099 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
4100 {
4101         kvm_inject_nmi(vcpu);
4102
4103         return 0;
4104 }
4105
4106 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
4107 {
4108         kvm_make_request(KVM_REQ_SMI, vcpu);
4109
4110         return 0;
4111 }
4112
4113 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
4114                                            struct kvm_tpr_access_ctl *tac)
4115 {
4116         if (tac->flags)
4117                 return -EINVAL;
4118         vcpu->arch.tpr_access_reporting = !!tac->enabled;
4119         return 0;
4120 }
4121
4122 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
4123                                         u64 mcg_cap)
4124 {
4125         int r;
4126         unsigned bank_num = mcg_cap & 0xff, bank;
4127
4128         r = -EINVAL;
4129         if (!bank_num || bank_num > KVM_MAX_MCE_BANKS)
4130                 goto out;
4131         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
4132                 goto out;
4133         r = 0;
4134         vcpu->arch.mcg_cap = mcg_cap;
4135         /* Init IA32_MCG_CTL to all 1s */
4136         if (mcg_cap & MCG_CTL_P)
4137                 vcpu->arch.mcg_ctl = ~(u64)0;
4138         /* Init IA32_MCi_CTL to all 1s */
4139         for (bank = 0; bank < bank_num; bank++)
4140                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
4141
4142         kvm_x86_ops.setup_mce(vcpu);
4143 out:
4144         return r;
4145 }
4146
4147 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
4148                                       struct kvm_x86_mce *mce)
4149 {
4150         u64 mcg_cap = vcpu->arch.mcg_cap;
4151         unsigned bank_num = mcg_cap & 0xff;
4152         u64 *banks = vcpu->arch.mce_banks;
4153
4154         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
4155                 return -EINVAL;
4156         /*
4157          * if IA32_MCG_CTL is not all 1s, the uncorrected error
4158          * reporting is disabled
4159          */
4160         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
4161             vcpu->arch.mcg_ctl != ~(u64)0)
4162                 return 0;
4163         banks += 4 * mce->bank;
4164         /*
4165          * if IA32_MCi_CTL is not all 1s, the uncorrected error
4166          * reporting is disabled for the bank
4167          */
4168         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
4169                 return 0;
4170         if (mce->status & MCI_STATUS_UC) {
4171                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
4172                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
4173                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
4174                         return 0;
4175                 }
4176                 if (banks[1] & MCI_STATUS_VAL)
4177                         mce->status |= MCI_STATUS_OVER;
4178                 banks[2] = mce->addr;
4179                 banks[3] = mce->misc;
4180                 vcpu->arch.mcg_status = mce->mcg_status;
4181                 banks[1] = mce->status;
4182                 kvm_queue_exception(vcpu, MC_VECTOR);
4183         } else if (!(banks[1] & MCI_STATUS_VAL)
4184                    || !(banks[1] & MCI_STATUS_UC)) {
4185                 if (banks[1] & MCI_STATUS_VAL)
4186                         mce->status |= MCI_STATUS_OVER;
4187                 banks[2] = mce->addr;
4188                 banks[3] = mce->misc;
4189                 banks[1] = mce->status;
4190         } else
4191                 banks[1] |= MCI_STATUS_OVER;
4192         return 0;
4193 }
4194
4195 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
4196                                                struct kvm_vcpu_events *events)
4197 {
4198         process_nmi(vcpu);
4199
4200         /*
4201          * In guest mode, payload delivery should be deferred,
4202          * so that the L1 hypervisor can intercept #PF before
4203          * CR2 is modified (or intercept #DB before DR6 is
4204          * modified under nVMX). Unless the per-VM capability,
4205          * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4206          * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4207          * opportunistically defer the exception payload, deliver it if the
4208          * capability hasn't been requested before processing a
4209          * KVM_GET_VCPU_EVENTS.
4210          */
4211         if (!vcpu->kvm->arch.exception_payload_enabled &&
4212             vcpu->arch.exception.pending && vcpu->arch.exception.has_payload)
4213                 kvm_deliver_exception_payload(vcpu);
4214
4215         /*
4216          * The API doesn't provide the instruction length for software
4217          * exceptions, so don't report them. As long as the guest RIP
4218          * isn't advanced, we should expect to encounter the exception
4219          * again.
4220          */
4221         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
4222                 events->exception.injected = 0;
4223                 events->exception.pending = 0;
4224         } else {
4225                 events->exception.injected = vcpu->arch.exception.injected;
4226                 events->exception.pending = vcpu->arch.exception.pending;
4227                 /*
4228                  * For ABI compatibility, deliberately conflate
4229                  * pending and injected exceptions when
4230                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4231                  */
4232                 if (!vcpu->kvm->arch.exception_payload_enabled)
4233                         events->exception.injected |=
4234                                 vcpu->arch.exception.pending;
4235         }
4236         events->exception.nr = vcpu->arch.exception.nr;
4237         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
4238         events->exception.error_code = vcpu->arch.exception.error_code;
4239         events->exception_has_payload = vcpu->arch.exception.has_payload;
4240         events->exception_payload = vcpu->arch.exception.payload;
4241
4242         events->interrupt.injected =
4243                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
4244         events->interrupt.nr = vcpu->arch.interrupt.nr;
4245         events->interrupt.soft = 0;
4246         events->interrupt.shadow = kvm_x86_ops.get_interrupt_shadow(vcpu);
4247
4248         events->nmi.injected = vcpu->arch.nmi_injected;
4249         events->nmi.pending = vcpu->arch.nmi_pending != 0;
4250         events->nmi.masked = kvm_x86_ops.get_nmi_mask(vcpu);
4251         events->nmi.pad = 0;
4252
4253         events->sipi_vector = 0; /* never valid when reporting to user space */
4254
4255         events->smi.smm = is_smm(vcpu);
4256         events->smi.pending = vcpu->arch.smi_pending;
4257         events->smi.smm_inside_nmi =
4258                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
4259         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
4260
4261         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
4262                          | KVM_VCPUEVENT_VALID_SHADOW
4263                          | KVM_VCPUEVENT_VALID_SMM);
4264         if (vcpu->kvm->arch.exception_payload_enabled)
4265                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
4266
4267         memset(&events->reserved, 0, sizeof(events->reserved));
4268 }
4269
4270 static void kvm_smm_changed(struct kvm_vcpu *vcpu);
4271
4272 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
4273                                               struct kvm_vcpu_events *events)
4274 {
4275         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4276                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4277                               | KVM_VCPUEVENT_VALID_SHADOW
4278                               | KVM_VCPUEVENT_VALID_SMM
4279                               | KVM_VCPUEVENT_VALID_PAYLOAD))
4280                 return -EINVAL;
4281
4282         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
4283                 if (!vcpu->kvm->arch.exception_payload_enabled)
4284                         return -EINVAL;
4285                 if (events->exception.pending)
4286                         events->exception.injected = 0;
4287                 else
4288                         events->exception_has_payload = 0;
4289         } else {
4290                 events->exception.pending = 0;
4291                 events->exception_has_payload = 0;
4292         }
4293
4294         if ((events->exception.injected || events->exception.pending) &&
4295             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
4296                 return -EINVAL;
4297
4298         /* INITs are latched while in SMM */
4299         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
4300             (events->smi.smm || events->smi.pending) &&
4301             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
4302                 return -EINVAL;
4303
4304         process_nmi(vcpu);
4305         vcpu->arch.exception.injected = events->exception.injected;
4306         vcpu->arch.exception.pending = events->exception.pending;
4307         vcpu->arch.exception.nr = events->exception.nr;
4308         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
4309         vcpu->arch.exception.error_code = events->exception.error_code;
4310         vcpu->arch.exception.has_payload = events->exception_has_payload;
4311         vcpu->arch.exception.payload = events->exception_payload;
4312
4313         vcpu->arch.interrupt.injected = events->interrupt.injected;
4314         vcpu->arch.interrupt.nr = events->interrupt.nr;
4315         vcpu->arch.interrupt.soft = events->interrupt.soft;
4316         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
4317                 kvm_x86_ops.set_interrupt_shadow(vcpu,
4318                                                   events->interrupt.shadow);
4319
4320         vcpu->arch.nmi_injected = events->nmi.injected;
4321         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
4322                 vcpu->arch.nmi_pending = events->nmi.pending;
4323         kvm_x86_ops.set_nmi_mask(vcpu, events->nmi.masked);
4324
4325         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
4326             lapic_in_kernel(vcpu))
4327                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
4328
4329         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
4330                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
4331                         if (events->smi.smm)
4332                                 vcpu->arch.hflags |= HF_SMM_MASK;
4333                         else
4334                                 vcpu->arch.hflags &= ~HF_SMM_MASK;
4335                         kvm_smm_changed(vcpu);
4336                 }
4337
4338                 vcpu->arch.smi_pending = events->smi.pending;
4339
4340                 if (events->smi.smm) {
4341                         if (events->smi.smm_inside_nmi)
4342                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
4343                         else
4344                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
4345                 }
4346
4347                 if (lapic_in_kernel(vcpu)) {
4348                         if (events->smi.latched_init)
4349                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4350                         else
4351                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4352                 }
4353         }
4354
4355         kvm_make_request(KVM_REQ_EVENT, vcpu);
4356
4357         return 0;
4358 }
4359
4360 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
4361                                              struct kvm_debugregs *dbgregs)
4362 {
4363         unsigned long val;
4364
4365         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
4366         kvm_get_dr(vcpu, 6, &val);
4367         dbgregs->dr6 = val;
4368         dbgregs->dr7 = vcpu->arch.dr7;
4369         dbgregs->flags = 0;
4370         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
4371 }
4372
4373 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
4374                                             struct kvm_debugregs *dbgregs)
4375 {
4376         if (dbgregs->flags)
4377                 return -EINVAL;
4378
4379         if (dbgregs->dr6 & ~0xffffffffull)
4380                 return -EINVAL;
4381         if (dbgregs->dr7 & ~0xffffffffull)
4382                 return -EINVAL;
4383
4384         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
4385         kvm_update_dr0123(vcpu);
4386         vcpu->arch.dr6 = dbgregs->dr6;
4387         vcpu->arch.dr7 = dbgregs->dr7;
4388         kvm_update_dr7(vcpu);
4389
4390         return 0;
4391 }
4392
4393 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
4394
4395 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
4396 {
4397         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4398         u64 xstate_bv = xsave->header.xfeatures;
4399         u64 valid;
4400
4401         /*
4402          * Copy legacy XSAVE area, to avoid complications with CPUID
4403          * leaves 0 and 1 in the loop below.
4404          */
4405         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
4406
4407         /* Set XSTATE_BV */
4408         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
4409         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
4410
4411         /*
4412          * Copy each region from the possibly compacted offset to the
4413          * non-compacted offset.
4414          */
4415         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4416         while (valid) {
4417                 u64 xfeature_mask = valid & -valid;
4418                 int xfeature_nr = fls64(xfeature_mask) - 1;
4419                 void *src = get_xsave_addr(xsave, xfeature_nr);
4420
4421                 if (src) {
4422                         u32 size, offset, ecx, edx;
4423                         cpuid_count(XSTATE_CPUID, xfeature_nr,
4424                                     &size, &offset, &ecx, &edx);
4425                         if (xfeature_nr == XFEATURE_PKRU)
4426                                 memcpy(dest + offset, &vcpu->arch.pkru,
4427                                        sizeof(vcpu->arch.pkru));
4428                         else
4429                                 memcpy(dest + offset, src, size);
4430
4431                 }
4432
4433                 valid -= xfeature_mask;
4434         }
4435 }
4436
4437 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
4438 {
4439         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4440         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
4441         u64 valid;
4442
4443         /*
4444          * Copy legacy XSAVE area, to avoid complications with CPUID
4445          * leaves 0 and 1 in the loop below.
4446          */
4447         memcpy(xsave, src, XSAVE_HDR_OFFSET);
4448
4449         /* Set XSTATE_BV and possibly XCOMP_BV.  */
4450         xsave->header.xfeatures = xstate_bv;
4451         if (boot_cpu_has(X86_FEATURE_XSAVES))
4452                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
4453
4454         /*
4455          * Copy each region from the non-compacted offset to the
4456          * possibly compacted offset.
4457          */
4458         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4459         while (valid) {
4460                 u64 xfeature_mask = valid & -valid;
4461                 int xfeature_nr = fls64(xfeature_mask) - 1;
4462                 void *dest = get_xsave_addr(xsave, xfeature_nr);
4463
4464                 if (dest) {
4465                         u32 size, offset, ecx, edx;
4466                         cpuid_count(XSTATE_CPUID, xfeature_nr,
4467                                     &size, &offset, &ecx, &edx);
4468                         if (xfeature_nr == XFEATURE_PKRU)
4469                                 memcpy(&vcpu->arch.pkru, src + offset,
4470                                        sizeof(vcpu->arch.pkru));
4471                         else
4472                                 memcpy(dest, src + offset, size);
4473                 }
4474
4475                 valid -= xfeature_mask;
4476         }
4477 }
4478
4479 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
4480                                          struct kvm_xsave *guest_xsave)
4481 {
4482         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4483                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
4484                 fill_xsave((u8 *) guest_xsave->region, vcpu);
4485         } else {
4486                 memcpy(guest_xsave->region,
4487                         &vcpu->arch.guest_fpu->state.fxsave,
4488                         sizeof(struct fxregs_state));
4489                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
4490                         XFEATURE_MASK_FPSSE;
4491         }
4492 }
4493
4494 #define XSAVE_MXCSR_OFFSET 24
4495
4496 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
4497                                         struct kvm_xsave *guest_xsave)
4498 {
4499         u64 xstate_bv =
4500                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
4501         u32 mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
4502
4503         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4504                 /*
4505                  * Here we allow setting states that are not present in
4506                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
4507                  * with old userspace.
4508                  */
4509                 if (xstate_bv & ~supported_xcr0 || mxcsr & ~mxcsr_feature_mask)
4510                         return -EINVAL;
4511                 load_xsave(vcpu, (u8 *)guest_xsave->region);
4512         } else {
4513                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
4514                         mxcsr & ~mxcsr_feature_mask)
4515                         return -EINVAL;
4516                 memcpy(&vcpu->arch.guest_fpu->state.fxsave,
4517                         guest_xsave->region, sizeof(struct fxregs_state));
4518         }
4519         return 0;
4520 }
4521
4522 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
4523                                         struct kvm_xcrs *guest_xcrs)
4524 {
4525         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
4526                 guest_xcrs->nr_xcrs = 0;
4527                 return;
4528         }
4529
4530         guest_xcrs->nr_xcrs = 1;
4531         guest_xcrs->flags = 0;
4532         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
4533         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
4534 }
4535
4536 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
4537                                        struct kvm_xcrs *guest_xcrs)
4538 {
4539         int i, r = 0;
4540
4541         if (!boot_cpu_has(X86_FEATURE_XSAVE))
4542                 return -EINVAL;
4543
4544         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
4545                 return -EINVAL;
4546
4547         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
4548                 /* Only support XCR0 currently */
4549                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
4550                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
4551                                 guest_xcrs->xcrs[i].value);
4552                         break;
4553                 }
4554         if (r)
4555                 r = -EINVAL;
4556         return r;
4557 }
4558
4559 /*
4560  * kvm_set_guest_paused() indicates to the guest kernel that it has been
4561  * stopped by the hypervisor.  This function will be called from the host only.
4562  * EINVAL is returned when the host attempts to set the flag for a guest that
4563  * does not support pv clocks.
4564  */
4565 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
4566 {
4567         if (!vcpu->arch.pv_time_enabled)
4568                 return -EINVAL;
4569         vcpu->arch.pvclock_set_guest_stopped_request = true;
4570         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4571         return 0;
4572 }
4573
4574 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
4575                                      struct kvm_enable_cap *cap)
4576 {
4577         int r;
4578         uint16_t vmcs_version;
4579         void __user *user_ptr;
4580
4581         if (cap->flags)
4582                 return -EINVAL;
4583
4584         switch (cap->cap) {
4585         case KVM_CAP_HYPERV_SYNIC2:
4586                 if (cap->args[0])
4587                         return -EINVAL;
4588                 fallthrough;
4589
4590         case KVM_CAP_HYPERV_SYNIC:
4591                 if (!irqchip_in_kernel(vcpu->kvm))
4592                         return -EINVAL;
4593                 return kvm_hv_activate_synic(vcpu, cap->cap ==
4594                                              KVM_CAP_HYPERV_SYNIC2);
4595         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4596                 if (!kvm_x86_ops.nested_ops->enable_evmcs)
4597                         return -ENOTTY;
4598                 r = kvm_x86_ops.nested_ops->enable_evmcs(vcpu, &vmcs_version);
4599                 if (!r) {
4600                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
4601                         if (copy_to_user(user_ptr, &vmcs_version,
4602                                          sizeof(vmcs_version)))
4603                                 r = -EFAULT;
4604                 }
4605                 return r;
4606         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4607                 if (!kvm_x86_ops.enable_direct_tlbflush)
4608                         return -ENOTTY;
4609
4610                 return kvm_x86_ops.enable_direct_tlbflush(vcpu);
4611
4612         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4613                 vcpu->arch.pv_cpuid.enforce = cap->args[0];
4614
4615                 return 0;
4616
4617         default:
4618                 return -EINVAL;
4619         }
4620 }
4621
4622 long kvm_arch_vcpu_ioctl(struct file *filp,
4623                          unsigned int ioctl, unsigned long arg)
4624 {
4625         struct kvm_vcpu *vcpu = filp->private_data;
4626         void __user *argp = (void __user *)arg;
4627         int r;
4628         union {
4629                 struct kvm_lapic_state *lapic;
4630                 struct kvm_xsave *xsave;
4631                 struct kvm_xcrs *xcrs;
4632                 void *buffer;
4633         } u;
4634
4635         vcpu_load(vcpu);
4636
4637         u.buffer = NULL;
4638         switch (ioctl) {
4639         case KVM_GET_LAPIC: {
4640                 r = -EINVAL;
4641                 if (!lapic_in_kernel(vcpu))
4642                         goto out;
4643                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
4644                                 GFP_KERNEL_ACCOUNT);
4645
4646                 r = -ENOMEM;
4647                 if (!u.lapic)
4648                         goto out;
4649                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
4650                 if (r)
4651                         goto out;
4652                 r = -EFAULT;
4653                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
4654                         goto out;
4655                 r = 0;
4656                 break;
4657         }
4658         case KVM_SET_LAPIC: {
4659                 r = -EINVAL;
4660                 if (!lapic_in_kernel(vcpu))
4661                         goto out;
4662                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
4663                 if (IS_ERR(u.lapic)) {
4664                         r = PTR_ERR(u.lapic);
4665                         goto out_nofree;
4666                 }
4667
4668                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
4669                 break;
4670         }
4671         case KVM_INTERRUPT: {
4672                 struct kvm_interrupt irq;
4673
4674                 r = -EFAULT;
4675                 if (copy_from_user(&irq, argp, sizeof(irq)))
4676                         goto out;
4677                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
4678                 break;
4679         }
4680         case KVM_NMI: {
4681                 r = kvm_vcpu_ioctl_nmi(vcpu);
4682                 break;
4683         }
4684         case KVM_SMI: {
4685                 r = kvm_vcpu_ioctl_smi(vcpu);
4686                 break;
4687         }
4688         case KVM_SET_CPUID: {
4689                 struct kvm_cpuid __user *cpuid_arg = argp;
4690                 struct kvm_cpuid cpuid;
4691
4692                 r = -EFAULT;
4693                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4694                         goto out;
4695                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4696                 break;
4697         }
4698         case KVM_SET_CPUID2: {
4699                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4700                 struct kvm_cpuid2 cpuid;
4701
4702                 r = -EFAULT;
4703                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4704                         goto out;
4705                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
4706                                               cpuid_arg->entries);
4707                 break;
4708         }
4709         case KVM_GET_CPUID2: {
4710                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4711                 struct kvm_cpuid2 cpuid;
4712
4713                 r = -EFAULT;
4714                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4715                         goto out;
4716                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
4717                                               cpuid_arg->entries);
4718                 if (r)
4719                         goto out;
4720                 r = -EFAULT;
4721                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4722                         goto out;
4723                 r = 0;
4724                 break;
4725         }
4726         case KVM_GET_MSRS: {
4727                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4728                 r = msr_io(vcpu, argp, do_get_msr, 1);
4729                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4730                 break;
4731         }
4732         case KVM_SET_MSRS: {
4733                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4734                 r = msr_io(vcpu, argp, do_set_msr, 0);
4735                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4736                 break;
4737         }
4738         case KVM_TPR_ACCESS_REPORTING: {
4739                 struct kvm_tpr_access_ctl tac;
4740
4741                 r = -EFAULT;
4742                 if (copy_from_user(&tac, argp, sizeof(tac)))
4743                         goto out;
4744                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
4745                 if (r)
4746                         goto out;
4747                 r = -EFAULT;
4748                 if (copy_to_user(argp, &tac, sizeof(tac)))
4749                         goto out;
4750                 r = 0;
4751                 break;
4752         };
4753         case KVM_SET_VAPIC_ADDR: {
4754                 struct kvm_vapic_addr va;
4755                 int idx;
4756
4757                 r = -EINVAL;
4758                 if (!lapic_in_kernel(vcpu))
4759                         goto out;
4760                 r = -EFAULT;
4761                 if (copy_from_user(&va, argp, sizeof(va)))
4762                         goto out;
4763                 idx = srcu_read_lock(&vcpu->kvm->srcu);
4764                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
4765                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4766                 break;
4767         }
4768         case KVM_X86_SETUP_MCE: {
4769                 u64 mcg_cap;
4770
4771                 r = -EFAULT;
4772                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
4773                         goto out;
4774                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
4775                 break;
4776         }
4777         case KVM_X86_SET_MCE: {
4778                 struct kvm_x86_mce mce;
4779
4780                 r = -EFAULT;
4781                 if (copy_from_user(&mce, argp, sizeof(mce)))
4782                         goto out;
4783                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
4784                 break;
4785         }
4786         case KVM_GET_VCPU_EVENTS: {
4787                 struct kvm_vcpu_events events;
4788
4789                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
4790
4791                 r = -EFAULT;
4792                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
4793                         break;
4794                 r = 0;
4795                 break;
4796         }
4797         case KVM_SET_VCPU_EVENTS: {
4798                 struct kvm_vcpu_events events;
4799
4800                 r = -EFAULT;
4801                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
4802                         break;
4803
4804                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
4805                 break;
4806         }
4807         case KVM_GET_DEBUGREGS: {
4808                 struct kvm_debugregs dbgregs;
4809
4810                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
4811
4812                 r = -EFAULT;
4813                 if (copy_to_user(argp, &dbgregs,
4814                                  sizeof(struct kvm_debugregs)))
4815                         break;
4816                 r = 0;
4817                 break;
4818         }
4819         case KVM_SET_DEBUGREGS: {
4820                 struct kvm_debugregs dbgregs;
4821
4822                 r = -EFAULT;
4823                 if (copy_from_user(&dbgregs, argp,
4824                                    sizeof(struct kvm_debugregs)))
4825                         break;
4826
4827                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
4828                 break;
4829         }
4830         case KVM_GET_XSAVE: {
4831                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
4832                 r = -ENOMEM;
4833                 if (!u.xsave)
4834                         break;
4835
4836                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
4837
4838                 r = -EFAULT;
4839                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
4840                         break;
4841                 r = 0;
4842                 break;
4843         }
4844         case KVM_SET_XSAVE: {
4845                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
4846                 if (IS_ERR(u.xsave)) {
4847                         r = PTR_ERR(u.xsave);
4848                         goto out_nofree;
4849                 }
4850
4851                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
4852                 break;
4853         }
4854         case KVM_GET_XCRS: {
4855                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
4856                 r = -ENOMEM;
4857                 if (!u.xcrs)
4858                         break;
4859
4860                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
4861
4862                 r = -EFAULT;
4863                 if (copy_to_user(argp, u.xcrs,
4864                                  sizeof(struct kvm_xcrs)))
4865                         break;
4866                 r = 0;
4867                 break;
4868         }
4869         case KVM_SET_XCRS: {
4870                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
4871                 if (IS_ERR(u.xcrs)) {
4872                         r = PTR_ERR(u.xcrs);
4873                         goto out_nofree;
4874                 }
4875
4876                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
4877                 break;
4878         }
4879         case KVM_SET_TSC_KHZ: {
4880                 u32 user_tsc_khz;
4881
4882                 r = -EINVAL;
4883                 user_tsc_khz = (u32)arg;
4884
4885                 if (kvm_has_tsc_control &&
4886                     user_tsc_khz >= kvm_max_guest_tsc_khz)
4887                         goto out;
4888
4889                 if (user_tsc_khz == 0)
4890                         user_tsc_khz = tsc_khz;
4891
4892                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
4893                         r = 0;
4894
4895                 goto out;
4896         }
4897         case KVM_GET_TSC_KHZ: {
4898                 r = vcpu->arch.virtual_tsc_khz;
4899                 goto out;
4900         }
4901         case KVM_KVMCLOCK_CTRL: {
4902                 r = kvm_set_guest_paused(vcpu);
4903                 goto out;
4904         }
4905         case KVM_ENABLE_CAP: {
4906                 struct kvm_enable_cap cap;
4907
4908                 r = -EFAULT;
4909                 if (copy_from_user(&cap, argp, sizeof(cap)))
4910                         goto out;
4911                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
4912                 break;
4913         }
4914         case KVM_GET_NESTED_STATE: {
4915                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4916                 u32 user_data_size;
4917
4918                 r = -EINVAL;
4919                 if (!kvm_x86_ops.nested_ops->get_state)
4920                         break;
4921
4922                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
4923                 r = -EFAULT;
4924                 if (get_user(user_data_size, &user_kvm_nested_state->size))
4925                         break;
4926
4927                 r = kvm_x86_ops.nested_ops->get_state(vcpu, user_kvm_nested_state,
4928                                                      user_data_size);
4929                 if (r < 0)
4930                         break;
4931
4932                 if (r > user_data_size) {
4933                         if (put_user(r, &user_kvm_nested_state->size))
4934                                 r = -EFAULT;
4935                         else
4936                                 r = -E2BIG;
4937                         break;
4938                 }
4939
4940                 r = 0;
4941                 break;
4942         }
4943         case KVM_SET_NESTED_STATE: {
4944                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4945                 struct kvm_nested_state kvm_state;
4946                 int idx;
4947
4948                 r = -EINVAL;
4949                 if (!kvm_x86_ops.nested_ops->set_state)
4950                         break;
4951
4952                 r = -EFAULT;
4953                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
4954                         break;
4955
4956                 r = -EINVAL;
4957                 if (kvm_state.size < sizeof(kvm_state))
4958                         break;
4959
4960                 if (kvm_state.flags &
4961                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
4962                       | KVM_STATE_NESTED_EVMCS | KVM_STATE_NESTED_MTF_PENDING
4963                       | KVM_STATE_NESTED_GIF_SET))
4964                         break;
4965
4966                 /* nested_run_pending implies guest_mode.  */
4967                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
4968                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
4969                         break;
4970
4971                 idx = srcu_read_lock(&vcpu->kvm->srcu);
4972                 r = kvm_x86_ops.nested_ops->set_state(vcpu, user_kvm_nested_state, &kvm_state);
4973                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4974                 break;
4975         }
4976         case KVM_GET_SUPPORTED_HV_CPUID: {
4977                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4978                 struct kvm_cpuid2 cpuid;
4979
4980                 r = -EFAULT;
4981                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4982                         goto out;
4983
4984                 r = kvm_vcpu_ioctl_get_hv_cpuid(vcpu, &cpuid,
4985                                                 cpuid_arg->entries);
4986                 if (r)
4987                         goto out;
4988
4989                 r = -EFAULT;
4990                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4991                         goto out;
4992                 r = 0;
4993                 break;
4994         }
4995         default:
4996                 r = -EINVAL;
4997         }
4998 out:
4999         kfree(u.buffer);
5000 out_nofree:
5001         vcpu_put(vcpu);
5002         return r;
5003 }
5004
5005 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
5006 {
5007         return VM_FAULT_SIGBUS;
5008 }
5009
5010 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
5011 {
5012         int ret;
5013
5014         if (addr > (unsigned int)(-3 * PAGE_SIZE))
5015                 return -EINVAL;
5016         ret = kvm_x86_ops.set_tss_addr(kvm, addr);
5017         return ret;
5018 }
5019
5020 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
5021                                               u64 ident_addr)
5022 {
5023         return kvm_x86_ops.set_identity_map_addr(kvm, ident_addr);
5024 }
5025
5026 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
5027                                          unsigned long kvm_nr_mmu_pages)
5028 {
5029         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
5030                 return -EINVAL;
5031
5032         mutex_lock(&kvm->slots_lock);
5033
5034         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
5035         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
5036
5037         mutex_unlock(&kvm->slots_lock);
5038         return 0;
5039 }
5040
5041 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
5042 {
5043         return kvm->arch.n_max_mmu_pages;
5044 }
5045
5046 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5047 {
5048         struct kvm_pic *pic = kvm->arch.vpic;
5049         int r;
5050
5051         r = 0;
5052         switch (chip->chip_id) {
5053         case KVM_IRQCHIP_PIC_MASTER:
5054                 memcpy(&chip->chip.pic, &pic->pics[0],
5055                         sizeof(struct kvm_pic_state));
5056                 break;
5057         case KVM_IRQCHIP_PIC_SLAVE:
5058                 memcpy(&chip->chip.pic, &pic->pics[1],
5059                         sizeof(struct kvm_pic_state));
5060                 break;
5061         case KVM_IRQCHIP_IOAPIC:
5062                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
5063                 break;
5064         default:
5065                 r = -EINVAL;
5066                 break;
5067         }
5068         return r;
5069 }
5070
5071 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5072 {
5073         struct kvm_pic *pic = kvm->arch.vpic;
5074         int r;
5075
5076         r = 0;
5077         switch (chip->chip_id) {
5078         case KVM_IRQCHIP_PIC_MASTER:
5079                 spin_lock(&pic->lock);
5080                 memcpy(&pic->pics[0], &chip->chip.pic,
5081                         sizeof(struct kvm_pic_state));
5082                 spin_unlock(&pic->lock);
5083                 break;
5084         case KVM_IRQCHIP_PIC_SLAVE:
5085                 spin_lock(&pic->lock);
5086                 memcpy(&pic->pics[1], &chip->chip.pic,
5087                         sizeof(struct kvm_pic_state));
5088                 spin_unlock(&pic->lock);
5089                 break;
5090         case KVM_IRQCHIP_IOAPIC:
5091                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
5092                 break;
5093         default:
5094                 r = -EINVAL;
5095                 break;
5096         }
5097         kvm_pic_update_irq(pic);
5098         return r;
5099 }
5100
5101 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5102 {
5103         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
5104
5105         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
5106
5107         mutex_lock(&kps->lock);
5108         memcpy(ps, &kps->channels, sizeof(*ps));
5109         mutex_unlock(&kps->lock);
5110         return 0;
5111 }
5112
5113 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5114 {
5115         int i;
5116         struct kvm_pit *pit = kvm->arch.vpit;
5117
5118         mutex_lock(&pit->pit_state.lock);
5119         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
5120         for (i = 0; i < 3; i++)
5121                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
5122         mutex_unlock(&pit->pit_state.lock);
5123         return 0;
5124 }
5125
5126 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5127 {
5128         mutex_lock(&kvm->arch.vpit->pit_state.lock);
5129         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
5130                 sizeof(ps->channels));
5131         ps->flags = kvm->arch.vpit->pit_state.flags;
5132         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
5133         memset(&ps->reserved, 0, sizeof(ps->reserved));
5134         return 0;
5135 }
5136
5137 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5138 {
5139         int start = 0;
5140         int i;
5141         u32 prev_legacy, cur_legacy;
5142         struct kvm_pit *pit = kvm->arch.vpit;
5143
5144         mutex_lock(&pit->pit_state.lock);
5145         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
5146         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
5147         if (!prev_legacy && cur_legacy)
5148                 start = 1;
5149         memcpy(&pit->pit_state.channels, &ps->channels,
5150                sizeof(pit->pit_state.channels));
5151         pit->pit_state.flags = ps->flags;
5152         for (i = 0; i < 3; i++)
5153                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
5154                                    start && i == 0);
5155         mutex_unlock(&pit->pit_state.lock);
5156         return 0;
5157 }
5158
5159 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
5160                                  struct kvm_reinject_control *control)
5161 {
5162         struct kvm_pit *pit = kvm->arch.vpit;
5163
5164         /* pit->pit_state.lock was overloaded to prevent userspace from getting
5165          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5166          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
5167          */
5168         mutex_lock(&pit->pit_state.lock);
5169         kvm_pit_set_reinject(pit, control->pit_reinject);
5170         mutex_unlock(&pit->pit_state.lock);
5171
5172         return 0;
5173 }
5174
5175 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
5176 {
5177         /*
5178          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
5179          */
5180         if (kvm_x86_ops.flush_log_dirty)
5181                 kvm_x86_ops.flush_log_dirty(kvm);
5182 }
5183
5184 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
5185                         bool line_status)
5186 {
5187         if (!irqchip_in_kernel(kvm))
5188                 return -ENXIO;
5189
5190         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
5191                                         irq_event->irq, irq_event->level,
5192                                         line_status);
5193         return 0;
5194 }
5195
5196 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
5197                             struct kvm_enable_cap *cap)
5198 {
5199         int r;
5200
5201         if (cap->flags)
5202                 return -EINVAL;
5203
5204         switch (cap->cap) {
5205         case KVM_CAP_DISABLE_QUIRKS:
5206                 kvm->arch.disabled_quirks = cap->args[0];
5207                 r = 0;
5208                 break;
5209         case KVM_CAP_SPLIT_IRQCHIP: {
5210                 mutex_lock(&kvm->lock);
5211                 r = -EINVAL;
5212                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
5213                         goto split_irqchip_unlock;
5214                 r = -EEXIST;
5215                 if (irqchip_in_kernel(kvm))
5216                         goto split_irqchip_unlock;
5217                 if (kvm->created_vcpus)
5218                         goto split_irqchip_unlock;
5219                 r = kvm_setup_empty_irq_routing(kvm);
5220                 if (r)
5221                         goto split_irqchip_unlock;
5222                 /* Pairs with irqchip_in_kernel. */
5223                 smp_wmb();
5224                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
5225                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
5226                 r = 0;
5227 split_irqchip_unlock:
5228                 mutex_unlock(&kvm->lock);
5229                 break;
5230         }
5231         case KVM_CAP_X2APIC_API:
5232                 r = -EINVAL;
5233                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
5234                         break;
5235
5236                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
5237                         kvm->arch.x2apic_format = true;
5238                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
5239                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
5240
5241                 r = 0;
5242                 break;
5243         case KVM_CAP_X86_DISABLE_EXITS:
5244                 r = -EINVAL;
5245                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
5246                         break;
5247
5248                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
5249                         kvm_can_mwait_in_guest())
5250                         kvm->arch.mwait_in_guest = true;
5251                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
5252                         kvm->arch.hlt_in_guest = true;
5253                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
5254                         kvm->arch.pause_in_guest = true;
5255                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
5256                         kvm->arch.cstate_in_guest = true;
5257                 r = 0;
5258                 break;
5259         case KVM_CAP_MSR_PLATFORM_INFO:
5260                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
5261                 r = 0;
5262                 break;
5263         case KVM_CAP_EXCEPTION_PAYLOAD:
5264                 kvm->arch.exception_payload_enabled = cap->args[0];
5265                 r = 0;
5266                 break;
5267         case KVM_CAP_X86_USER_SPACE_MSR:
5268                 kvm->arch.user_space_msr_mask = cap->args[0];
5269                 r = 0;
5270                 break;
5271         default:
5272                 r = -EINVAL;
5273                 break;
5274         }
5275         return r;
5276 }
5277
5278 static void kvm_clear_msr_filter(struct kvm *kvm)
5279 {
5280         u32 i;
5281         u32 count = kvm->arch.msr_filter.count;
5282         struct msr_bitmap_range ranges[16];
5283
5284         mutex_lock(&kvm->lock);
5285         kvm->arch.msr_filter.count = 0;
5286         memcpy(ranges, kvm->arch.msr_filter.ranges, count * sizeof(ranges[0]));
5287         mutex_unlock(&kvm->lock);
5288         synchronize_srcu(&kvm->srcu);
5289
5290         for (i = 0; i < count; i++)
5291                 kfree(ranges[i].bitmap);
5292 }
5293
5294 static int kvm_add_msr_filter(struct kvm *kvm, struct kvm_msr_filter_range *user_range)
5295 {
5296         struct msr_bitmap_range *ranges = kvm->arch.msr_filter.ranges;
5297         struct msr_bitmap_range range;
5298         unsigned long *bitmap = NULL;
5299         size_t bitmap_size;
5300         int r;
5301
5302         if (!user_range->nmsrs)
5303                 return 0;
5304
5305         bitmap_size = BITS_TO_LONGS(user_range->nmsrs) * sizeof(long);
5306         if (!bitmap_size || bitmap_size > KVM_MSR_FILTER_MAX_BITMAP_SIZE)
5307                 return -EINVAL;
5308
5309         bitmap = memdup_user((__user u8*)user_range->bitmap, bitmap_size);
5310         if (IS_ERR(bitmap))
5311                 return PTR_ERR(bitmap);
5312
5313         range = (struct msr_bitmap_range) {
5314                 .flags = user_range->flags,
5315                 .base = user_range->base,
5316                 .nmsrs = user_range->nmsrs,
5317                 .bitmap = bitmap,
5318         };
5319
5320         if (range.flags & ~(KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE)) {
5321                 r = -EINVAL;
5322                 goto err;
5323         }
5324
5325         if (!range.flags) {
5326                 r = -EINVAL;
5327                 goto err;
5328         }
5329
5330         /* Everything ok, add this range identifier to our global pool */
5331         ranges[kvm->arch.msr_filter.count] = range;
5332         /* Make sure we filled the array before we tell anyone to walk it */
5333         smp_wmb();
5334         kvm->arch.msr_filter.count++;
5335
5336         return 0;
5337 err:
5338         kfree(bitmap);
5339         return r;
5340 }
5341
5342 static int kvm_vm_ioctl_set_msr_filter(struct kvm *kvm, void __user *argp)
5343 {
5344         struct kvm_msr_filter __user *user_msr_filter = argp;
5345         struct kvm_msr_filter filter;
5346         bool default_allow;
5347         int r = 0;
5348         bool empty = true;
5349         u32 i;
5350
5351         if (copy_from_user(&filter, user_msr_filter, sizeof(filter)))
5352                 return -EFAULT;
5353
5354         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++)
5355                 empty &= !filter.ranges[i].nmsrs;
5356
5357         default_allow = !(filter.flags & KVM_MSR_FILTER_DEFAULT_DENY);
5358         if (empty && !default_allow)
5359                 return -EINVAL;
5360
5361         kvm_clear_msr_filter(kvm);
5362
5363         kvm->arch.msr_filter.default_allow = default_allow;
5364
5365         /*
5366          * Protect from concurrent calls to this function that could trigger
5367          * a TOCTOU violation on kvm->arch.msr_filter.count.
5368          */
5369         mutex_lock(&kvm->lock);
5370         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++) {
5371                 r = kvm_add_msr_filter(kvm, &filter.ranges[i]);
5372                 if (r)
5373                         break;
5374         }
5375
5376         kvm_make_all_cpus_request(kvm, KVM_REQ_MSR_FILTER_CHANGED);
5377         mutex_unlock(&kvm->lock);
5378
5379         return r;
5380 }
5381
5382 long kvm_arch_vm_ioctl(struct file *filp,
5383                        unsigned int ioctl, unsigned long arg)
5384 {
5385         struct kvm *kvm = filp->private_data;
5386         void __user *argp = (void __user *)arg;
5387         int r = -ENOTTY;
5388         /*
5389          * This union makes it completely explicit to gcc-3.x
5390          * that these two variables' stack usage should be
5391          * combined, not added together.
5392          */
5393         union {
5394                 struct kvm_pit_state ps;
5395                 struct kvm_pit_state2 ps2;
5396                 struct kvm_pit_config pit_config;
5397         } u;
5398
5399         switch (ioctl) {
5400         case KVM_SET_TSS_ADDR:
5401                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
5402                 break;
5403         case KVM_SET_IDENTITY_MAP_ADDR: {
5404                 u64 ident_addr;
5405
5406                 mutex_lock(&kvm->lock);
5407                 r = -EINVAL;
5408                 if (kvm->created_vcpus)
5409                         goto set_identity_unlock;
5410                 r = -EFAULT;
5411                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
5412                         goto set_identity_unlock;
5413                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
5414 set_identity_unlock:
5415                 mutex_unlock(&kvm->lock);
5416                 break;
5417         }
5418         case KVM_SET_NR_MMU_PAGES:
5419                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
5420                 break;
5421         case KVM_GET_NR_MMU_PAGES:
5422                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
5423                 break;
5424         case KVM_CREATE_IRQCHIP: {
5425                 mutex_lock(&kvm->lock);
5426
5427                 r = -EEXIST;
5428                 if (irqchip_in_kernel(kvm))
5429                         goto create_irqchip_unlock;
5430
5431                 r = -EINVAL;
5432                 if (kvm->created_vcpus)
5433                         goto create_irqchip_unlock;
5434
5435                 r = kvm_pic_init(kvm);
5436                 if (r)
5437                         goto create_irqchip_unlock;
5438
5439                 r = kvm_ioapic_init(kvm);
5440                 if (r) {
5441                         kvm_pic_destroy(kvm);
5442                         goto create_irqchip_unlock;
5443                 }
5444
5445                 r = kvm_setup_default_irq_routing(kvm);
5446                 if (r) {
5447                         kvm_ioapic_destroy(kvm);
5448                         kvm_pic_destroy(kvm);
5449                         goto create_irqchip_unlock;
5450                 }
5451                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
5452                 smp_wmb();
5453                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
5454         create_irqchip_unlock:
5455                 mutex_unlock(&kvm->lock);
5456                 break;
5457         }
5458         case KVM_CREATE_PIT:
5459                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
5460                 goto create_pit;
5461         case KVM_CREATE_PIT2:
5462                 r = -EFAULT;
5463                 if (copy_from_user(&u.pit_config, argp,
5464                                    sizeof(struct kvm_pit_config)))
5465                         goto out;
5466         create_pit:
5467                 mutex_lock(&kvm->lock);
5468                 r = -EEXIST;
5469                 if (kvm->arch.vpit)
5470                         goto create_pit_unlock;
5471                 r = -ENOMEM;
5472                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
5473                 if (kvm->arch.vpit)
5474                         r = 0;
5475         create_pit_unlock:
5476                 mutex_unlock(&kvm->lock);
5477                 break;
5478         case KVM_GET_IRQCHIP: {
5479                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5480                 struct kvm_irqchip *chip;
5481
5482                 chip = memdup_user(argp, sizeof(*chip));
5483                 if (IS_ERR(chip)) {
5484                         r = PTR_ERR(chip);
5485                         goto out;
5486                 }
5487
5488                 r = -ENXIO;
5489                 if (!irqchip_kernel(kvm))
5490                         goto get_irqchip_out;
5491                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
5492                 if (r)
5493                         goto get_irqchip_out;
5494                 r = -EFAULT;
5495                 if (copy_to_user(argp, chip, sizeof(*chip)))
5496                         goto get_irqchip_out;
5497                 r = 0;
5498         get_irqchip_out:
5499                 kfree(chip);
5500                 break;
5501         }
5502         case KVM_SET_IRQCHIP: {
5503                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5504                 struct kvm_irqchip *chip;
5505
5506                 chip = memdup_user(argp, sizeof(*chip));
5507                 if (IS_ERR(chip)) {
5508                         r = PTR_ERR(chip);
5509                         goto out;
5510                 }
5511
5512                 r = -ENXIO;
5513                 if (!irqchip_kernel(kvm))
5514                         goto set_irqchip_out;
5515                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
5516         set_irqchip_out:
5517                 kfree(chip);
5518                 break;
5519         }
5520         case KVM_GET_PIT: {
5521                 r = -EFAULT;
5522                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
5523                         goto out;
5524                 r = -ENXIO;
5525                 if (!kvm->arch.vpit)
5526                         goto out;
5527                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
5528                 if (r)
5529                         goto out;
5530                 r = -EFAULT;
5531                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
5532                         goto out;
5533                 r = 0;
5534                 break;
5535         }
5536         case KVM_SET_PIT: {
5537                 r = -EFAULT;
5538                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
5539                         goto out;
5540                 mutex_lock(&kvm->lock);
5541                 r = -ENXIO;
5542                 if (!kvm->arch.vpit)
5543                         goto set_pit_out;
5544                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
5545 set_pit_out:
5546                 mutex_unlock(&kvm->lock);
5547                 break;
5548         }
5549         case KVM_GET_PIT2: {
5550                 r = -ENXIO;
5551                 if (!kvm->arch.vpit)
5552                         goto out;
5553                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
5554                 if (r)
5555                         goto out;
5556                 r = -EFAULT;
5557                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
5558                         goto out;
5559                 r = 0;
5560                 break;
5561         }
5562         case KVM_SET_PIT2: {
5563                 r = -EFAULT;
5564                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
5565                         goto out;
5566                 mutex_lock(&kvm->lock);
5567                 r = -ENXIO;
5568                 if (!kvm->arch.vpit)
5569                         goto set_pit2_out;
5570                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
5571 set_pit2_out:
5572                 mutex_unlock(&kvm->lock);
5573                 break;
5574         }
5575         case KVM_REINJECT_CONTROL: {
5576                 struct kvm_reinject_control control;
5577                 r =  -EFAULT;
5578                 if (copy_from_user(&control, argp, sizeof(control)))
5579                         goto out;
5580                 r = -ENXIO;
5581                 if (!kvm->arch.vpit)
5582                         goto out;
5583                 r = kvm_vm_ioctl_reinject(kvm, &control);
5584                 break;
5585         }
5586         case KVM_SET_BOOT_CPU_ID:
5587                 r = 0;
5588                 mutex_lock(&kvm->lock);
5589                 if (kvm->created_vcpus)
5590                         r = -EBUSY;
5591                 else
5592                         kvm->arch.bsp_vcpu_id = arg;
5593                 mutex_unlock(&kvm->lock);
5594                 break;
5595         case KVM_XEN_HVM_CONFIG: {
5596                 struct kvm_xen_hvm_config xhc;
5597                 r = -EFAULT;
5598                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
5599                         goto out;
5600                 r = -EINVAL;
5601                 if (xhc.flags)
5602                         goto out;
5603                 memcpy(&kvm->arch.xen_hvm_config, &xhc, sizeof(xhc));
5604                 r = 0;
5605                 break;
5606         }
5607         case KVM_SET_CLOCK: {
5608                 struct kvm_clock_data user_ns;
5609                 u64 now_ns;
5610
5611                 r = -EFAULT;
5612                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
5613                         goto out;
5614
5615                 r = -EINVAL;
5616                 if (user_ns.flags)
5617                         goto out;
5618
5619                 r = 0;
5620                 /*
5621                  * TODO: userspace has to take care of races with VCPU_RUN, so
5622                  * kvm_gen_update_masterclock() can be cut down to locked
5623                  * pvclock_update_vm_gtod_copy().
5624                  */
5625                 kvm_gen_update_masterclock(kvm);
5626                 now_ns = get_kvmclock_ns(kvm);
5627                 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
5628                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
5629                 break;
5630         }
5631         case KVM_GET_CLOCK: {
5632                 struct kvm_clock_data user_ns;
5633                 u64 now_ns;
5634
5635                 now_ns = get_kvmclock_ns(kvm);
5636                 user_ns.clock = now_ns;
5637                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
5638                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
5639
5640                 r = -EFAULT;
5641                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
5642                         goto out;
5643                 r = 0;
5644                 break;
5645         }
5646         case KVM_MEMORY_ENCRYPT_OP: {
5647                 r = -ENOTTY;
5648                 if (kvm_x86_ops.mem_enc_op)
5649                         r = kvm_x86_ops.mem_enc_op(kvm, argp);
5650                 break;
5651         }
5652         case KVM_MEMORY_ENCRYPT_REG_REGION: {
5653                 struct kvm_enc_region region;
5654
5655                 r = -EFAULT;
5656                 if (copy_from_user(&region, argp, sizeof(region)))
5657                         goto out;
5658
5659                 r = -ENOTTY;
5660                 if (kvm_x86_ops.mem_enc_reg_region)
5661                         r = kvm_x86_ops.mem_enc_reg_region(kvm, &region);
5662                 break;
5663         }
5664         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
5665                 struct kvm_enc_region region;
5666
5667                 r = -EFAULT;
5668                 if (copy_from_user(&region, argp, sizeof(region)))
5669                         goto out;
5670
5671                 r = -ENOTTY;
5672                 if (kvm_x86_ops.mem_enc_unreg_region)
5673                         r = kvm_x86_ops.mem_enc_unreg_region(kvm, &region);
5674                 break;
5675         }
5676         case KVM_HYPERV_EVENTFD: {
5677                 struct kvm_hyperv_eventfd hvevfd;
5678
5679                 r = -EFAULT;
5680                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
5681                         goto out;
5682                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
5683                 break;
5684         }
5685         case KVM_SET_PMU_EVENT_FILTER:
5686                 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
5687                 break;
5688         case KVM_X86_SET_MSR_FILTER:
5689                 r = kvm_vm_ioctl_set_msr_filter(kvm, argp);
5690                 break;
5691         default:
5692                 r = -ENOTTY;
5693         }
5694 out:
5695         return r;
5696 }
5697
5698 static void kvm_init_msr_list(void)
5699 {
5700         struct x86_pmu_capability x86_pmu;
5701         u32 dummy[2];
5702         unsigned i;
5703
5704         BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
5705                          "Please update the fixed PMCs in msrs_to_saved_all[]");
5706
5707         perf_get_x86_pmu_capability(&x86_pmu);
5708
5709         num_msrs_to_save = 0;
5710         num_emulated_msrs = 0;
5711         num_msr_based_features = 0;
5712
5713         for (i = 0; i < ARRAY_SIZE(msrs_to_save_all); i++) {
5714                 if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
5715                         continue;
5716
5717                 /*
5718                  * Even MSRs that are valid in the host may not be exposed
5719                  * to the guests in some cases.
5720                  */
5721                 switch (msrs_to_save_all[i]) {
5722                 case MSR_IA32_BNDCFGS:
5723                         if (!kvm_mpx_supported())
5724                                 continue;
5725                         break;
5726                 case MSR_TSC_AUX:
5727                         if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP))
5728                                 continue;
5729                         break;
5730                 case MSR_IA32_UMWAIT_CONTROL:
5731                         if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG))
5732                                 continue;
5733                         break;
5734                 case MSR_IA32_RTIT_CTL:
5735                 case MSR_IA32_RTIT_STATUS:
5736                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT))
5737                                 continue;
5738                         break;
5739                 case MSR_IA32_RTIT_CR3_MATCH:
5740                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
5741                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
5742                                 continue;
5743                         break;
5744                 case MSR_IA32_RTIT_OUTPUT_BASE:
5745                 case MSR_IA32_RTIT_OUTPUT_MASK:
5746                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
5747                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
5748                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
5749                                 continue;
5750                         break;
5751                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
5752                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
5753                                 msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=
5754                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
5755                                 continue;
5756                         break;
5757                 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
5758                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
5759                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
5760                                 continue;
5761                         break;
5762                 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
5763                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
5764                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
5765                                 continue;
5766                         break;
5767                 default:
5768                         break;
5769                 }
5770
5771                 msrs_to_save[num_msrs_to_save++] = msrs_to_save_all[i];
5772         }
5773
5774         for (i = 0; i < ARRAY_SIZE(emulated_msrs_all); i++) {
5775                 if (!kvm_x86_ops.has_emulated_msr(emulated_msrs_all[i]))
5776                         continue;
5777
5778                 emulated_msrs[num_emulated_msrs++] = emulated_msrs_all[i];
5779         }
5780
5781         for (i = 0; i < ARRAY_SIZE(msr_based_features_all); i++) {
5782                 struct kvm_msr_entry msr;
5783
5784                 msr.index = msr_based_features_all[i];
5785                 if (kvm_get_msr_feature(&msr))
5786                         continue;
5787
5788                 msr_based_features[num_msr_based_features++] = msr_based_features_all[i];
5789         }
5790 }
5791
5792 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
5793                            const void *v)
5794 {
5795         int handled = 0;
5796         int n;
5797
5798         do {
5799                 n = min(len, 8);
5800                 if (!(lapic_in_kernel(vcpu) &&
5801                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
5802                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
5803                         break;
5804                 handled += n;
5805                 addr += n;
5806                 len -= n;
5807                 v += n;
5808         } while (len);
5809
5810         return handled;
5811 }
5812
5813 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
5814 {
5815         int handled = 0;
5816         int n;
5817
5818         do {
5819                 n = min(len, 8);
5820                 if (!(lapic_in_kernel(vcpu) &&
5821                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
5822                                          addr, n, v))
5823                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
5824                         break;
5825                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
5826                 handled += n;
5827                 addr += n;
5828                 len -= n;
5829                 v += n;
5830         } while (len);
5831
5832         return handled;
5833 }
5834
5835 static void kvm_set_segment(struct kvm_vcpu *vcpu,
5836                         struct kvm_segment *var, int seg)
5837 {
5838         kvm_x86_ops.set_segment(vcpu, var, seg);
5839 }
5840
5841 void kvm_get_segment(struct kvm_vcpu *vcpu,
5842                      struct kvm_segment *var, int seg)
5843 {
5844         kvm_x86_ops.get_segment(vcpu, var, seg);
5845 }
5846
5847 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
5848                            struct x86_exception *exception)
5849 {
5850         gpa_t t_gpa;
5851
5852         BUG_ON(!mmu_is_nested(vcpu));
5853
5854         /* NPT walks are always user-walks */
5855         access |= PFERR_USER_MASK;
5856         t_gpa  = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
5857
5858         return t_gpa;
5859 }
5860
5861 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
5862                               struct x86_exception *exception)
5863 {
5864         u32 access = (kvm_x86_ops.get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5865         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5866 }
5867
5868  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
5869                                 struct x86_exception *exception)
5870 {
5871         u32 access = (kvm_x86_ops.get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5872         access |= PFERR_FETCH_MASK;
5873         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5874 }
5875
5876 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
5877                                struct x86_exception *exception)
5878 {
5879         u32 access = (kvm_x86_ops.get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5880         access |= PFERR_WRITE_MASK;
5881         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5882 }
5883
5884 /* uses this to access any guest's mapped memory without checking CPL */
5885 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
5886                                 struct x86_exception *exception)
5887 {
5888         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
5889 }
5890
5891 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
5892                                       struct kvm_vcpu *vcpu, u32 access,
5893                                       struct x86_exception *exception)
5894 {
5895         void *data = val;
5896         int r = X86EMUL_CONTINUE;
5897
5898         while (bytes) {
5899                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
5900                                                             exception);
5901                 unsigned offset = addr & (PAGE_SIZE-1);
5902                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
5903                 int ret;
5904
5905                 if (gpa == UNMAPPED_GVA)
5906                         return X86EMUL_PROPAGATE_FAULT;
5907                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
5908                                                offset, toread);
5909                 if (ret < 0) {
5910                         r = X86EMUL_IO_NEEDED;
5911                         goto out;
5912                 }
5913
5914                 bytes -= toread;
5915                 data += toread;
5916                 addr += toread;
5917         }
5918 out:
5919         return r;
5920 }
5921
5922 /* used for instruction fetching */
5923 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
5924                                 gva_t addr, void *val, unsigned int bytes,
5925                                 struct x86_exception *exception)
5926 {
5927         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5928         u32 access = (kvm_x86_ops.get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5929         unsigned offset;
5930         int ret;
5931
5932         /* Inline kvm_read_guest_virt_helper for speed.  */
5933         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
5934                                                     exception);
5935         if (unlikely(gpa == UNMAPPED_GVA))
5936                 return X86EMUL_PROPAGATE_FAULT;
5937
5938         offset = addr & (PAGE_SIZE-1);
5939         if (WARN_ON(offset + bytes > PAGE_SIZE))
5940                 bytes = (unsigned)PAGE_SIZE - offset;
5941         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
5942                                        offset, bytes);
5943         if (unlikely(ret < 0))
5944                 return X86EMUL_IO_NEEDED;
5945
5946         return X86EMUL_CONTINUE;
5947 }
5948
5949 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
5950                                gva_t addr, void *val, unsigned int bytes,
5951                                struct x86_exception *exception)
5952 {
5953         u32 access = (kvm_x86_ops.get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5954
5955         /*
5956          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
5957          * is returned, but our callers are not ready for that and they blindly
5958          * call kvm_inject_page_fault.  Ensure that they at least do not leak
5959          * uninitialized kernel stack memory into cr2 and error code.
5960          */
5961         memset(exception, 0, sizeof(*exception));
5962         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
5963                                           exception);
5964 }
5965 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
5966
5967 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
5968                              gva_t addr, void *val, unsigned int bytes,
5969                              struct x86_exception *exception, bool system)
5970 {
5971         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5972         u32 access = 0;
5973
5974         if (!system && kvm_x86_ops.get_cpl(vcpu) == 3)
5975                 access |= PFERR_USER_MASK;
5976
5977         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
5978 }
5979
5980 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
5981                 unsigned long addr, void *val, unsigned int bytes)
5982 {
5983         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5984         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
5985
5986         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
5987 }
5988
5989 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
5990                                       struct kvm_vcpu *vcpu, u32 access,
5991                                       struct x86_exception *exception)
5992 {
5993         void *data = val;
5994         int r = X86EMUL_CONTINUE;
5995
5996         while (bytes) {
5997                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
5998                                                              access,
5999                                                              exception);
6000                 unsigned offset = addr & (PAGE_SIZE-1);
6001                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
6002                 int ret;
6003
6004                 if (gpa == UNMAPPED_GVA)
6005                         return X86EMUL_PROPAGATE_FAULT;
6006                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
6007                 if (ret < 0) {
6008                         r = X86EMUL_IO_NEEDED;
6009                         goto out;
6010                 }
6011
6012                 bytes -= towrite;
6013                 data += towrite;
6014                 addr += towrite;
6015         }
6016 out:
6017         return r;
6018 }
6019
6020 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
6021                               unsigned int bytes, struct x86_exception *exception,
6022                               bool system)
6023 {
6024         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6025         u32 access = PFERR_WRITE_MASK;
6026
6027         if (!system && kvm_x86_ops.get_cpl(vcpu) == 3)
6028                 access |= PFERR_USER_MASK;
6029
6030         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6031                                            access, exception);
6032 }
6033
6034 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
6035                                 unsigned int bytes, struct x86_exception *exception)
6036 {
6037         /* kvm_write_guest_virt_system can pull in tons of pages. */
6038         vcpu->arch.l1tf_flush_l1d = true;
6039
6040         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6041                                            PFERR_WRITE_MASK, exception);
6042 }
6043 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
6044
6045 int handle_ud(struct kvm_vcpu *vcpu)
6046 {
6047         static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
6048         int emul_type = EMULTYPE_TRAP_UD;
6049         char sig[5]; /* ud2; .ascii "kvm" */
6050         struct x86_exception e;
6051
6052         if (unlikely(!kvm_x86_ops.can_emulate_instruction(vcpu, NULL, 0)))
6053                 return 1;
6054
6055         if (force_emulation_prefix &&
6056             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
6057                                 sig, sizeof(sig), &e) == 0 &&
6058             memcmp(sig, kvm_emulate_prefix, sizeof(sig)) == 0) {
6059                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
6060                 emul_type = EMULTYPE_TRAP_UD_FORCED;
6061         }
6062
6063         return kvm_emulate_instruction(vcpu, emul_type);
6064 }
6065 EXPORT_SYMBOL_GPL(handle_ud);
6066
6067 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6068                             gpa_t gpa, bool write)
6069 {
6070         /* For APIC access vmexit */
6071         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6072                 return 1;
6073
6074         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
6075                 trace_vcpu_match_mmio(gva, gpa, write, true);
6076                 return 1;
6077         }
6078
6079         return 0;
6080 }
6081
6082 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6083                                 gpa_t *gpa, struct x86_exception *exception,
6084                                 bool write)
6085 {
6086         u32 access = ((kvm_x86_ops.get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
6087                 | (write ? PFERR_WRITE_MASK : 0);
6088
6089         /*
6090          * currently PKRU is only applied to ept enabled guest so
6091          * there is no pkey in EPT page table for L1 guest or EPT
6092          * shadow page table for L2 guest.
6093          */
6094         if (vcpu_match_mmio_gva(vcpu, gva)
6095             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
6096                                  vcpu->arch.mmio_access, 0, access)) {
6097                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
6098                                         (gva & (PAGE_SIZE - 1));
6099                 trace_vcpu_match_mmio(gva, *gpa, write, false);
6100                 return 1;
6101         }
6102
6103         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6104
6105         if (*gpa == UNMAPPED_GVA)
6106                 return -1;
6107
6108         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
6109 }
6110
6111 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
6112                         const void *val, int bytes)
6113 {
6114         int ret;
6115
6116         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
6117         if (ret < 0)
6118                 return 0;
6119         kvm_page_track_write(vcpu, gpa, val, bytes);
6120         return 1;
6121 }
6122
6123 struct read_write_emulator_ops {
6124         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
6125                                   int bytes);
6126         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
6127                                   void *val, int bytes);
6128         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6129                                int bytes, void *val);
6130         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6131                                     void *val, int bytes);
6132         bool write;
6133 };
6134
6135 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
6136 {
6137         if (vcpu->mmio_read_completed) {
6138                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
6139                                vcpu->mmio_fragments[0].gpa, val);
6140                 vcpu->mmio_read_completed = 0;
6141                 return 1;
6142         }
6143
6144         return 0;
6145 }
6146
6147 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6148                         void *val, int bytes)
6149 {
6150         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
6151 }
6152
6153 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6154                          void *val, int bytes)
6155 {
6156         return emulator_write_phys(vcpu, gpa, val, bytes);
6157 }
6158
6159 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
6160 {
6161         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
6162         return vcpu_mmio_write(vcpu, gpa, bytes, val);
6163 }
6164
6165 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6166                           void *val, int bytes)
6167 {
6168         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
6169         return X86EMUL_IO_NEEDED;
6170 }
6171
6172 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6173                            void *val, int bytes)
6174 {
6175         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
6176
6177         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
6178         return X86EMUL_CONTINUE;
6179 }
6180
6181 static const struct read_write_emulator_ops read_emultor = {
6182         .read_write_prepare = read_prepare,
6183         .read_write_emulate = read_emulate,
6184         .read_write_mmio = vcpu_mmio_read,
6185         .read_write_exit_mmio = read_exit_mmio,
6186 };
6187
6188 static const struct read_write_emulator_ops write_emultor = {
6189         .read_write_emulate = write_emulate,
6190         .read_write_mmio = write_mmio,
6191         .read_write_exit_mmio = write_exit_mmio,
6192         .write = true,
6193 };
6194
6195 static int emulator_read_write_onepage(unsigned long addr, void *val,
6196                                        unsigned int bytes,
6197                                        struct x86_exception *exception,
6198                                        struct kvm_vcpu *vcpu,
6199                                        const struct read_write_emulator_ops *ops)
6200 {
6201         gpa_t gpa;
6202         int handled, ret;
6203         bool write = ops->write;
6204         struct kvm_mmio_fragment *frag;
6205         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6206
6207         /*
6208          * If the exit was due to a NPF we may already have a GPA.
6209          * If the GPA is present, use it to avoid the GVA to GPA table walk.
6210          * Note, this cannot be used on string operations since string
6211          * operation using rep will only have the initial GPA from the NPF
6212          * occurred.
6213          */
6214         if (ctxt->gpa_available && emulator_can_use_gpa(ctxt) &&
6215             (addr & ~PAGE_MASK) == (ctxt->gpa_val & ~PAGE_MASK)) {
6216                 gpa = ctxt->gpa_val;
6217                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
6218         } else {
6219                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
6220                 if (ret < 0)
6221                         return X86EMUL_PROPAGATE_FAULT;
6222         }
6223
6224         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
6225                 return X86EMUL_CONTINUE;
6226
6227         /*
6228          * Is this MMIO handled locally?
6229          */
6230         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
6231         if (handled == bytes)
6232                 return X86EMUL_CONTINUE;
6233
6234         gpa += handled;
6235         bytes -= handled;
6236         val += handled;
6237
6238         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
6239         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
6240         frag->gpa = gpa;
6241         frag->data = val;
6242         frag->len = bytes;
6243         return X86EMUL_CONTINUE;
6244 }
6245
6246 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
6247                         unsigned long addr,
6248                         void *val, unsigned int bytes,
6249                         struct x86_exception *exception,
6250                         const struct read_write_emulator_ops *ops)
6251 {
6252         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6253         gpa_t gpa;
6254         int rc;
6255
6256         if (ops->read_write_prepare &&
6257                   ops->read_write_prepare(vcpu, val, bytes))
6258                 return X86EMUL_CONTINUE;
6259
6260         vcpu->mmio_nr_fragments = 0;
6261
6262         /* Crossing a page boundary? */
6263         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
6264                 int now;
6265
6266                 now = -addr & ~PAGE_MASK;
6267                 rc = emulator_read_write_onepage(addr, val, now, exception,
6268                                                  vcpu, ops);
6269
6270                 if (rc != X86EMUL_CONTINUE)
6271                         return rc;
6272                 addr += now;
6273                 if (ctxt->mode != X86EMUL_MODE_PROT64)
6274                         addr = (u32)addr;
6275                 val += now;
6276                 bytes -= now;
6277         }
6278
6279         rc = emulator_read_write_onepage(addr, val, bytes, exception,
6280                                          vcpu, ops);
6281         if (rc != X86EMUL_CONTINUE)
6282                 return rc;
6283
6284         if (!vcpu->mmio_nr_fragments)
6285                 return rc;
6286
6287         gpa = vcpu->mmio_fragments[0].gpa;
6288
6289         vcpu->mmio_needed = 1;
6290         vcpu->mmio_cur_fragment = 0;
6291
6292         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
6293         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
6294         vcpu->run->exit_reason = KVM_EXIT_MMIO;
6295         vcpu->run->mmio.phys_addr = gpa;
6296
6297         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
6298 }
6299
6300 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
6301                                   unsigned long addr,
6302                                   void *val,
6303                                   unsigned int bytes,
6304                                   struct x86_exception *exception)
6305 {
6306         return emulator_read_write(ctxt, addr, val, bytes,
6307                                    exception, &read_emultor);
6308 }
6309
6310 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
6311                             unsigned long addr,
6312                             const void *val,
6313                             unsigned int bytes,
6314                             struct x86_exception *exception)
6315 {
6316         return emulator_read_write(ctxt, addr, (void *)val, bytes,
6317                                    exception, &write_emultor);
6318 }
6319
6320 #define CMPXCHG_TYPE(t, ptr, old, new) \
6321         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
6322
6323 #ifdef CONFIG_X86_64
6324 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
6325 #else
6326 #  define CMPXCHG64(ptr, old, new) \
6327         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
6328 #endif
6329
6330 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
6331                                      unsigned long addr,
6332                                      const void *old,
6333                                      const void *new,
6334                                      unsigned int bytes,
6335                                      struct x86_exception *exception)
6336 {
6337         struct kvm_host_map map;
6338         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6339         u64 page_line_mask;
6340         gpa_t gpa;
6341         char *kaddr;
6342         bool exchanged;
6343
6344         /* guests cmpxchg8b have to be emulated atomically */
6345         if (bytes > 8 || (bytes & (bytes - 1)))
6346                 goto emul_write;
6347
6348         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
6349
6350         if (gpa == UNMAPPED_GVA ||
6351             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6352                 goto emul_write;
6353
6354         /*
6355          * Emulate the atomic as a straight write to avoid #AC if SLD is
6356          * enabled in the host and the access splits a cache line.
6357          */
6358         if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT))
6359                 page_line_mask = ~(cache_line_size() - 1);
6360         else
6361                 page_line_mask = PAGE_MASK;
6362
6363         if (((gpa + bytes - 1) & page_line_mask) != (gpa & page_line_mask))
6364                 goto emul_write;
6365
6366         if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
6367                 goto emul_write;
6368
6369         kaddr = map.hva + offset_in_page(gpa);
6370
6371         switch (bytes) {
6372         case 1:
6373                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
6374                 break;
6375         case 2:
6376                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
6377                 break;
6378         case 4:
6379                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
6380                 break;
6381         case 8:
6382                 exchanged = CMPXCHG64(kaddr, old, new);
6383                 break;
6384         default:
6385                 BUG();
6386         }
6387
6388         kvm_vcpu_unmap(vcpu, &map, true);
6389
6390         if (!exchanged)
6391                 return X86EMUL_CMPXCHG_FAILED;
6392
6393         kvm_page_track_write(vcpu, gpa, new, bytes);
6394
6395         return X86EMUL_CONTINUE;
6396
6397 emul_write:
6398         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
6399
6400         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
6401 }
6402
6403 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
6404 {
6405         int r = 0, i;
6406
6407         for (i = 0; i < vcpu->arch.pio.count; i++) {
6408                 if (vcpu->arch.pio.in)
6409                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
6410                                             vcpu->arch.pio.size, pd);
6411                 else
6412                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
6413                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
6414                                              pd);
6415                 if (r)
6416                         break;
6417                 pd += vcpu->arch.pio.size;
6418         }
6419         return r;
6420 }
6421
6422 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
6423                                unsigned short port, void *val,
6424                                unsigned int count, bool in)
6425 {
6426         vcpu->arch.pio.port = port;
6427         vcpu->arch.pio.in = in;
6428         vcpu->arch.pio.count  = count;
6429         vcpu->arch.pio.size = size;
6430
6431         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
6432                 vcpu->arch.pio.count = 0;
6433                 return 1;
6434         }
6435
6436         vcpu->run->exit_reason = KVM_EXIT_IO;
6437         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
6438         vcpu->run->io.size = size;
6439         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
6440         vcpu->run->io.count = count;
6441         vcpu->run->io.port = port;
6442
6443         return 0;
6444 }
6445
6446 static int emulator_pio_in(struct kvm_vcpu *vcpu, int size,
6447                            unsigned short port, void *val, unsigned int count)
6448 {
6449         int ret;
6450
6451         if (vcpu->arch.pio.count)
6452                 goto data_avail;
6453
6454         memset(vcpu->arch.pio_data, 0, size * count);
6455
6456         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
6457         if (ret) {
6458 data_avail:
6459                 memcpy(val, vcpu->arch.pio_data, size * count);
6460                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
6461                 vcpu->arch.pio.count = 0;
6462                 return 1;
6463         }
6464
6465         return 0;
6466 }
6467
6468 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
6469                                     int size, unsigned short port, void *val,
6470                                     unsigned int count)
6471 {
6472         return emulator_pio_in(emul_to_vcpu(ctxt), size, port, val, count);
6473
6474 }
6475
6476 static int emulator_pio_out(struct kvm_vcpu *vcpu, int size,
6477                             unsigned short port, const void *val,
6478                             unsigned int count)
6479 {
6480         memcpy(vcpu->arch.pio_data, val, size * count);
6481         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
6482         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
6483 }
6484
6485 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
6486                                      int size, unsigned short port,
6487                                      const void *val, unsigned int count)
6488 {
6489         return emulator_pio_out(emul_to_vcpu(ctxt), size, port, val, count);
6490 }
6491
6492 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
6493 {
6494         return kvm_x86_ops.get_segment_base(vcpu, seg);
6495 }
6496
6497 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
6498 {
6499         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
6500 }
6501
6502 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
6503 {
6504         if (!need_emulate_wbinvd(vcpu))
6505                 return X86EMUL_CONTINUE;
6506
6507         if (kvm_x86_ops.has_wbinvd_exit()) {
6508                 int cpu = get_cpu();
6509
6510                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
6511                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
6512                                 wbinvd_ipi, NULL, 1);
6513                 put_cpu();
6514                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
6515         } else
6516                 wbinvd();
6517         return X86EMUL_CONTINUE;
6518 }
6519
6520 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
6521 {
6522         kvm_emulate_wbinvd_noskip(vcpu);
6523         return kvm_skip_emulated_instruction(vcpu);
6524 }
6525 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
6526
6527
6528
6529 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
6530 {
6531         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
6532 }
6533
6534 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
6535                            unsigned long *dest)
6536 {
6537         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
6538 }
6539
6540 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
6541                            unsigned long value)
6542 {
6543
6544         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
6545 }
6546
6547 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
6548 {
6549         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
6550 }
6551
6552 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
6553 {
6554         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6555         unsigned long value;
6556
6557         switch (cr) {
6558         case 0:
6559                 value = kvm_read_cr0(vcpu);
6560                 break;
6561         case 2:
6562                 value = vcpu->arch.cr2;
6563                 break;
6564         case 3:
6565                 value = kvm_read_cr3(vcpu);
6566                 break;
6567         case 4:
6568                 value = kvm_read_cr4(vcpu);
6569                 break;
6570         case 8:
6571                 value = kvm_get_cr8(vcpu);
6572                 break;
6573         default:
6574                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
6575                 return 0;
6576         }
6577
6578         return value;
6579 }
6580
6581 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
6582 {
6583         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6584         int res = 0;
6585
6586         switch (cr) {
6587         case 0:
6588                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
6589                 break;
6590         case 2:
6591                 vcpu->arch.cr2 = val;
6592                 break;
6593         case 3:
6594                 res = kvm_set_cr3(vcpu, val);
6595                 break;
6596         case 4:
6597                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
6598                 break;
6599         case 8:
6600                 res = kvm_set_cr8(vcpu, val);
6601                 break;
6602         default:
6603                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
6604                 res = -1;
6605         }
6606
6607         return res;
6608 }
6609
6610 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
6611 {
6612         return kvm_x86_ops.get_cpl(emul_to_vcpu(ctxt));
6613 }
6614
6615 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6616 {
6617         kvm_x86_ops.get_gdt(emul_to_vcpu(ctxt), dt);
6618 }
6619
6620 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6621 {
6622         kvm_x86_ops.get_idt(emul_to_vcpu(ctxt), dt);
6623 }
6624
6625 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6626 {
6627         kvm_x86_ops.set_gdt(emul_to_vcpu(ctxt), dt);
6628 }
6629
6630 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6631 {
6632         kvm_x86_ops.set_idt(emul_to_vcpu(ctxt), dt);
6633 }
6634
6635 static unsigned long emulator_get_cached_segment_base(
6636         struct x86_emulate_ctxt *ctxt, int seg)
6637 {
6638         return get_segment_base(emul_to_vcpu(ctxt), seg);
6639 }
6640
6641 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
6642                                  struct desc_struct *desc, u32 *base3,
6643                                  int seg)
6644 {
6645         struct kvm_segment var;
6646
6647         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
6648         *selector = var.selector;
6649
6650         if (var.unusable) {
6651                 memset(desc, 0, sizeof(*desc));
6652                 if (base3)
6653                         *base3 = 0;
6654                 return false;
6655         }
6656
6657         if (var.g)
6658                 var.limit >>= 12;
6659         set_desc_limit(desc, var.limit);
6660         set_desc_base(desc, (unsigned long)var.base);
6661 #ifdef CONFIG_X86_64
6662         if (base3)
6663                 *base3 = var.base >> 32;
6664 #endif
6665         desc->type = var.type;
6666         desc->s = var.s;
6667         desc->dpl = var.dpl;
6668         desc->p = var.present;
6669         desc->avl = var.avl;
6670         desc->l = var.l;
6671         desc->d = var.db;
6672         desc->g = var.g;
6673
6674         return true;
6675 }
6676
6677 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
6678                                  struct desc_struct *desc, u32 base3,
6679                                  int seg)
6680 {
6681         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6682         struct kvm_segment var;
6683
6684         var.selector = selector;
6685         var.base = get_desc_base(desc);
6686 #ifdef CONFIG_X86_64
6687         var.base |= ((u64)base3) << 32;
6688 #endif
6689         var.limit = get_desc_limit(desc);
6690         if (desc->g)
6691                 var.limit = (var.limit << 12) | 0xfff;
6692         var.type = desc->type;
6693         var.dpl = desc->dpl;
6694         var.db = desc->d;
6695         var.s = desc->s;
6696         var.l = desc->l;
6697         var.g = desc->g;
6698         var.avl = desc->avl;
6699         var.present = desc->p;
6700         var.unusable = !var.present;
6701         var.padding = 0;
6702
6703         kvm_set_segment(vcpu, &var, seg);
6704         return;
6705 }
6706
6707 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
6708                             u32 msr_index, u64 *pdata)
6709 {
6710         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6711         int r;
6712
6713         r = kvm_get_msr(vcpu, msr_index, pdata);
6714
6715         if (r && kvm_get_msr_user_space(vcpu, msr_index, r)) {
6716                 /* Bounce to user space */
6717                 return X86EMUL_IO_NEEDED;
6718         }
6719
6720         return r;
6721 }
6722
6723 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
6724                             u32 msr_index, u64 data)
6725 {
6726         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6727         int r;
6728
6729         r = kvm_set_msr(vcpu, msr_index, data);
6730
6731         if (r && kvm_set_msr_user_space(vcpu, msr_index, data, r)) {
6732                 /* Bounce to user space */
6733                 return X86EMUL_IO_NEEDED;
6734         }
6735
6736         return r;
6737 }
6738
6739 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
6740 {
6741         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6742
6743         return vcpu->arch.smbase;
6744 }
6745
6746 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
6747 {
6748         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6749
6750         vcpu->arch.smbase = smbase;
6751 }
6752
6753 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
6754                               u32 pmc)
6755 {
6756         return kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt), pmc);
6757 }
6758
6759 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
6760                              u32 pmc, u64 *pdata)
6761 {
6762         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
6763 }
6764
6765 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
6766 {
6767         emul_to_vcpu(ctxt)->arch.halt_request = 1;
6768 }
6769
6770 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
6771                               struct x86_instruction_info *info,
6772                               enum x86_intercept_stage stage)
6773 {
6774         return kvm_x86_ops.check_intercept(emul_to_vcpu(ctxt), info, stage,
6775                                             &ctxt->exception);
6776 }
6777
6778 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
6779                               u32 *eax, u32 *ebx, u32 *ecx, u32 *edx,
6780                               bool exact_only)
6781 {
6782         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, exact_only);
6783 }
6784
6785 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt *ctxt)
6786 {
6787         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_LM);
6788 }
6789
6790 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt *ctxt)
6791 {
6792         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_MOVBE);
6793 }
6794
6795 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)
6796 {
6797         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_FXSR);
6798 }
6799
6800 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
6801 {
6802         return kvm_register_read(emul_to_vcpu(ctxt), reg);
6803 }
6804
6805 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
6806 {
6807         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
6808 }
6809
6810 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
6811 {
6812         kvm_x86_ops.set_nmi_mask(emul_to_vcpu(ctxt), masked);
6813 }
6814
6815 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
6816 {
6817         return emul_to_vcpu(ctxt)->arch.hflags;
6818 }
6819
6820 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
6821 {
6822         emul_to_vcpu(ctxt)->arch.hflags = emul_flags;
6823 }
6824
6825 static int emulator_pre_leave_smm(struct x86_emulate_ctxt *ctxt,
6826                                   const char *smstate)
6827 {
6828         return kvm_x86_ops.pre_leave_smm(emul_to_vcpu(ctxt), smstate);
6829 }
6830
6831 static void emulator_post_leave_smm(struct x86_emulate_ctxt *ctxt)
6832 {
6833         kvm_smm_changed(emul_to_vcpu(ctxt));
6834 }
6835
6836 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
6837 {
6838         return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
6839 }
6840
6841 static const struct x86_emulate_ops emulate_ops = {
6842         .read_gpr            = emulator_read_gpr,
6843         .write_gpr           = emulator_write_gpr,
6844         .read_std            = emulator_read_std,
6845         .write_std           = emulator_write_std,
6846         .read_phys           = kvm_read_guest_phys_system,
6847         .fetch               = kvm_fetch_guest_virt,
6848         .read_emulated       = emulator_read_emulated,
6849         .write_emulated      = emulator_write_emulated,
6850         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
6851         .invlpg              = emulator_invlpg,
6852         .pio_in_emulated     = emulator_pio_in_emulated,
6853         .pio_out_emulated    = emulator_pio_out_emulated,
6854         .get_segment         = emulator_get_segment,
6855         .set_segment         = emulator_set_segment,
6856         .get_cached_segment_base = emulator_get_cached_segment_base,
6857         .get_gdt             = emulator_get_gdt,
6858         .get_idt             = emulator_get_idt,
6859         .set_gdt             = emulator_set_gdt,
6860         .set_idt             = emulator_set_idt,
6861         .get_cr              = emulator_get_cr,
6862         .set_cr              = emulator_set_cr,
6863         .cpl                 = emulator_get_cpl,
6864         .get_dr              = emulator_get_dr,
6865         .set_dr              = emulator_set_dr,
6866         .get_smbase          = emulator_get_smbase,
6867         .set_smbase          = emulator_set_smbase,
6868         .set_msr             = emulator_set_msr,
6869         .get_msr             = emulator_get_msr,
6870         .check_pmc           = emulator_check_pmc,
6871         .read_pmc            = emulator_read_pmc,
6872         .halt                = emulator_halt,
6873         .wbinvd              = emulator_wbinvd,
6874         .fix_hypercall       = emulator_fix_hypercall,
6875         .intercept           = emulator_intercept,
6876         .get_cpuid           = emulator_get_cpuid,
6877         .guest_has_long_mode = emulator_guest_has_long_mode,
6878         .guest_has_movbe     = emulator_guest_has_movbe,
6879         .guest_has_fxsr      = emulator_guest_has_fxsr,
6880         .set_nmi_mask        = emulator_set_nmi_mask,
6881         .get_hflags          = emulator_get_hflags,
6882         .set_hflags          = emulator_set_hflags,
6883         .pre_leave_smm       = emulator_pre_leave_smm,
6884         .post_leave_smm      = emulator_post_leave_smm,
6885         .set_xcr             = emulator_set_xcr,
6886 };
6887
6888 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
6889 {
6890         u32 int_shadow = kvm_x86_ops.get_interrupt_shadow(vcpu);
6891         /*
6892          * an sti; sti; sequence only disable interrupts for the first
6893          * instruction. So, if the last instruction, be it emulated or
6894          * not, left the system with the INT_STI flag enabled, it
6895          * means that the last instruction is an sti. We should not
6896          * leave the flag on in this case. The same goes for mov ss
6897          */
6898         if (int_shadow & mask)
6899                 mask = 0;
6900         if (unlikely(int_shadow || mask)) {
6901                 kvm_x86_ops.set_interrupt_shadow(vcpu, mask);
6902                 if (!mask)
6903                         kvm_make_request(KVM_REQ_EVENT, vcpu);
6904         }
6905 }
6906
6907 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
6908 {
6909         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6910         if (ctxt->exception.vector == PF_VECTOR)
6911                 return kvm_inject_emulated_page_fault(vcpu, &ctxt->exception);
6912
6913         if (ctxt->exception.error_code_valid)
6914                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
6915                                       ctxt->exception.error_code);
6916         else
6917                 kvm_queue_exception(vcpu, ctxt->exception.vector);
6918         return false;
6919 }
6920
6921 static struct x86_emulate_ctxt *alloc_emulate_ctxt(struct kvm_vcpu *vcpu)
6922 {
6923         struct x86_emulate_ctxt *ctxt;
6924
6925         ctxt = kmem_cache_zalloc(x86_emulator_cache, GFP_KERNEL_ACCOUNT);
6926         if (!ctxt) {
6927                 pr_err("kvm: failed to allocate vcpu's emulator\n");
6928                 return NULL;
6929         }
6930
6931         ctxt->vcpu = vcpu;
6932         ctxt->ops = &emulate_ops;
6933         vcpu->arch.emulate_ctxt = ctxt;
6934
6935         return ctxt;
6936 }
6937
6938 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
6939 {
6940         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6941         int cs_db, cs_l;
6942
6943         kvm_x86_ops.get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
6944
6945         ctxt->gpa_available = false;
6946         ctxt->eflags = kvm_get_rflags(vcpu);
6947         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
6948
6949         ctxt->eip = kvm_rip_read(vcpu);
6950         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
6951                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
6952                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
6953                      cs_db                              ? X86EMUL_MODE_PROT32 :
6954                                                           X86EMUL_MODE_PROT16;
6955         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
6956         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
6957         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
6958
6959         init_decode_cache(ctxt);
6960         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
6961 }
6962
6963 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
6964 {
6965         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6966         int ret;
6967
6968         init_emulate_ctxt(vcpu);
6969
6970         ctxt->op_bytes = 2;
6971         ctxt->ad_bytes = 2;
6972         ctxt->_eip = ctxt->eip + inc_eip;
6973         ret = emulate_int_real(ctxt, irq);
6974
6975         if (ret != X86EMUL_CONTINUE) {
6976                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
6977         } else {
6978                 ctxt->eip = ctxt->_eip;
6979                 kvm_rip_write(vcpu, ctxt->eip);
6980                 kvm_set_rflags(vcpu, ctxt->eflags);
6981         }
6982 }
6983 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
6984
6985 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
6986 {
6987         ++vcpu->stat.insn_emulation_fail;
6988         trace_kvm_emulate_insn_failed(vcpu);
6989
6990         if (emulation_type & EMULTYPE_VMWARE_GP) {
6991                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
6992                 return 1;
6993         }
6994
6995         if (emulation_type & EMULTYPE_SKIP) {
6996                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
6997                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
6998                 vcpu->run->internal.ndata = 0;
6999                 return 0;
7000         }
7001
7002         kvm_queue_exception(vcpu, UD_VECTOR);
7003
7004         if (!is_guest_mode(vcpu) && kvm_x86_ops.get_cpl(vcpu) == 0) {
7005                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7006                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
7007                 vcpu->run->internal.ndata = 0;
7008                 return 0;
7009         }
7010
7011         return 1;
7012 }
7013
7014 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7015                                   bool write_fault_to_shadow_pgtable,
7016                                   int emulation_type)
7017 {
7018         gpa_t gpa = cr2_or_gpa;
7019         kvm_pfn_t pfn;
7020
7021         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7022                 return false;
7023
7024         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7025             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7026                 return false;
7027
7028         if (!vcpu->arch.mmu->direct_map) {
7029                 /*
7030                  * Write permission should be allowed since only
7031                  * write access need to be emulated.
7032                  */
7033                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7034
7035                 /*
7036                  * If the mapping is invalid in guest, let cpu retry
7037                  * it to generate fault.
7038                  */
7039                 if (gpa == UNMAPPED_GVA)
7040                         return true;
7041         }
7042
7043         /*
7044          * Do not retry the unhandleable instruction if it faults on the
7045          * readonly host memory, otherwise it will goto a infinite loop:
7046          * retry instruction -> write #PF -> emulation fail -> retry
7047          * instruction -> ...
7048          */
7049         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
7050
7051         /*
7052          * If the instruction failed on the error pfn, it can not be fixed,
7053          * report the error to userspace.
7054          */
7055         if (is_error_noslot_pfn(pfn))
7056                 return false;
7057
7058         kvm_release_pfn_clean(pfn);
7059
7060         /* The instructions are well-emulated on direct mmu. */
7061         if (vcpu->arch.mmu->direct_map) {
7062                 unsigned int indirect_shadow_pages;
7063
7064                 spin_lock(&vcpu->kvm->mmu_lock);
7065                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
7066                 spin_unlock(&vcpu->kvm->mmu_lock);
7067
7068                 if (indirect_shadow_pages)
7069                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7070
7071                 return true;
7072         }
7073
7074         /*
7075          * if emulation was due to access to shadowed page table
7076          * and it failed try to unshadow page and re-enter the
7077          * guest to let CPU execute the instruction.
7078          */
7079         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7080
7081         /*
7082          * If the access faults on its page table, it can not
7083          * be fixed by unprotecting shadow page and it should
7084          * be reported to userspace.
7085          */
7086         return !write_fault_to_shadow_pgtable;
7087 }
7088
7089 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
7090                               gpa_t cr2_or_gpa,  int emulation_type)
7091 {
7092         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7093         unsigned long last_retry_eip, last_retry_addr, gpa = cr2_or_gpa;
7094
7095         last_retry_eip = vcpu->arch.last_retry_eip;
7096         last_retry_addr = vcpu->arch.last_retry_addr;
7097
7098         /*
7099          * If the emulation is caused by #PF and it is non-page_table
7100          * writing instruction, it means the VM-EXIT is caused by shadow
7101          * page protected, we can zap the shadow page and retry this
7102          * instruction directly.
7103          *
7104          * Note: if the guest uses a non-page-table modifying instruction
7105          * on the PDE that points to the instruction, then we will unmap
7106          * the instruction and go to an infinite loop. So, we cache the
7107          * last retried eip and the last fault address, if we meet the eip
7108          * and the address again, we can break out of the potential infinite
7109          * loop.
7110          */
7111         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
7112
7113         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7114                 return false;
7115
7116         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7117             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7118                 return false;
7119
7120         if (x86_page_table_writing_insn(ctxt))
7121                 return false;
7122
7123         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2_or_gpa)
7124                 return false;
7125
7126         vcpu->arch.last_retry_eip = ctxt->eip;
7127         vcpu->arch.last_retry_addr = cr2_or_gpa;
7128
7129         if (!vcpu->arch.mmu->direct_map)
7130                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7131
7132         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7133
7134         return true;
7135 }
7136
7137 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
7138 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
7139
7140 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
7141 {
7142         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
7143                 /* This is a good place to trace that we are exiting SMM.  */
7144                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
7145
7146                 /* Process a latched INIT or SMI, if any.  */
7147                 kvm_make_request(KVM_REQ_EVENT, vcpu);
7148         }
7149
7150         kvm_mmu_reset_context(vcpu);
7151 }
7152
7153 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
7154                                 unsigned long *db)
7155 {
7156         u32 dr6 = 0;
7157         int i;
7158         u32 enable, rwlen;
7159
7160         enable = dr7;
7161         rwlen = dr7 >> 16;
7162         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
7163                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
7164                         dr6 |= (1 << i);
7165         return dr6;
7166 }
7167
7168 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
7169 {
7170         struct kvm_run *kvm_run = vcpu->run;
7171
7172         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
7173                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 | DR6_RTM;
7174                 kvm_run->debug.arch.pc = kvm_get_linear_rip(vcpu);
7175                 kvm_run->debug.arch.exception = DB_VECTOR;
7176                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
7177                 return 0;
7178         }
7179         kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
7180         return 1;
7181 }
7182
7183 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
7184 {
7185         unsigned long rflags = kvm_x86_ops.get_rflags(vcpu);
7186         int r;
7187
7188         r = kvm_x86_ops.skip_emulated_instruction(vcpu);
7189         if (unlikely(!r))
7190                 return 0;
7191
7192         /*
7193          * rflags is the old, "raw" value of the flags.  The new value has
7194          * not been saved yet.
7195          *
7196          * This is correct even for TF set by the guest, because "the
7197          * processor will not generate this exception after the instruction
7198          * that sets the TF flag".
7199          */
7200         if (unlikely(rflags & X86_EFLAGS_TF))
7201                 r = kvm_vcpu_do_singlestep(vcpu);
7202         return r;
7203 }
7204 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
7205
7206 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
7207 {
7208         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
7209             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
7210                 struct kvm_run *kvm_run = vcpu->run;
7211                 unsigned long eip = kvm_get_linear_rip(vcpu);
7212                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7213                                            vcpu->arch.guest_debug_dr7,
7214                                            vcpu->arch.eff_db);
7215
7216                 if (dr6 != 0) {
7217                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
7218                         kvm_run->debug.arch.pc = eip;
7219                         kvm_run->debug.arch.exception = DB_VECTOR;
7220                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
7221                         *r = 0;
7222                         return true;
7223                 }
7224         }
7225
7226         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
7227             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
7228                 unsigned long eip = kvm_get_linear_rip(vcpu);
7229                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7230                                            vcpu->arch.dr7,
7231                                            vcpu->arch.db);
7232
7233                 if (dr6 != 0) {
7234                         kvm_queue_exception_p(vcpu, DB_VECTOR, dr6);
7235                         *r = 1;
7236                         return true;
7237                 }
7238         }
7239
7240         return false;
7241 }
7242
7243 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
7244 {
7245         switch (ctxt->opcode_len) {
7246         case 1:
7247                 switch (ctxt->b) {
7248                 case 0xe4:      /* IN */
7249                 case 0xe5:
7250                 case 0xec:
7251                 case 0xed:
7252                 case 0xe6:      /* OUT */
7253                 case 0xe7:
7254                 case 0xee:
7255                 case 0xef:
7256                 case 0x6c:      /* INS */
7257                 case 0x6d:
7258                 case 0x6e:      /* OUTS */
7259                 case 0x6f:
7260                         return true;
7261                 }
7262                 break;
7263         case 2:
7264                 switch (ctxt->b) {
7265                 case 0x33:      /* RDPMC */
7266                         return true;
7267                 }
7268                 break;
7269         }
7270
7271         return false;
7272 }
7273
7274 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7275                             int emulation_type, void *insn, int insn_len)
7276 {
7277         int r;
7278         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7279         bool writeback = true;
7280         bool write_fault_to_spt;
7281
7282         if (unlikely(!kvm_x86_ops.can_emulate_instruction(vcpu, insn, insn_len)))
7283                 return 1;
7284
7285         vcpu->arch.l1tf_flush_l1d = true;
7286
7287         /*
7288          * Clear write_fault_to_shadow_pgtable here to ensure it is
7289          * never reused.
7290          */
7291         write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
7292         vcpu->arch.write_fault_to_shadow_pgtable = false;
7293         kvm_clear_exception_queue(vcpu);
7294
7295         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
7296                 init_emulate_ctxt(vcpu);
7297
7298                 /*
7299                  * We will reenter on the same instruction since
7300                  * we do not set complete_userspace_io.  This does not
7301                  * handle watchpoints yet, those would be handled in
7302                  * the emulate_ops.
7303                  */
7304                 if (!(emulation_type & EMULTYPE_SKIP) &&
7305                     kvm_vcpu_check_breakpoint(vcpu, &r))
7306                         return r;
7307
7308                 ctxt->interruptibility = 0;
7309                 ctxt->have_exception = false;
7310                 ctxt->exception.vector = -1;
7311                 ctxt->perm_ok = false;
7312
7313                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
7314
7315                 r = x86_decode_insn(ctxt, insn, insn_len);
7316
7317                 trace_kvm_emulate_insn_start(vcpu);
7318                 ++vcpu->stat.insn_emulation;
7319                 if (r != EMULATION_OK)  {
7320                         if ((emulation_type & EMULTYPE_TRAP_UD) ||
7321                             (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
7322                                 kvm_queue_exception(vcpu, UD_VECTOR);
7323                                 return 1;
7324                         }
7325                         if (reexecute_instruction(vcpu, cr2_or_gpa,
7326                                                   write_fault_to_spt,
7327                                                   emulation_type))
7328                                 return 1;
7329                         if (ctxt->have_exception) {
7330                                 /*
7331                                  * #UD should result in just EMULATION_FAILED, and trap-like
7332                                  * exception should not be encountered during decode.
7333                                  */
7334                                 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
7335                                              exception_type(ctxt->exception.vector) == EXCPT_TRAP);
7336                                 inject_emulated_exception(vcpu);
7337                                 return 1;
7338                         }
7339                         return handle_emulation_failure(vcpu, emulation_type);
7340                 }
7341         }
7342
7343         if ((emulation_type & EMULTYPE_VMWARE_GP) &&
7344             !is_vmware_backdoor_opcode(ctxt)) {
7345                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7346                 return 1;
7347         }
7348
7349         /*
7350          * Note, EMULTYPE_SKIP is intended for use *only* by vendor callbacks
7351          * for kvm_skip_emulated_instruction().  The caller is responsible for
7352          * updating interruptibility state and injecting single-step #DBs.
7353          */
7354         if (emulation_type & EMULTYPE_SKIP) {
7355                 kvm_rip_write(vcpu, ctxt->_eip);
7356                 if (ctxt->eflags & X86_EFLAGS_RF)
7357                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
7358                 return 1;
7359         }
7360
7361         if (retry_instruction(ctxt, cr2_or_gpa, emulation_type))
7362                 return 1;
7363
7364         /* this is needed for vmware backdoor interface to work since it
7365            changes registers values  during IO operation */
7366         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
7367                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7368                 emulator_invalidate_register_cache(ctxt);
7369         }
7370
7371 restart:
7372         if (emulation_type & EMULTYPE_PF) {
7373                 /* Save the faulting GPA (cr2) in the address field */
7374                 ctxt->exception.address = cr2_or_gpa;
7375
7376                 /* With shadow page tables, cr2 contains a GVA or nGPA. */
7377                 if (vcpu->arch.mmu->direct_map) {
7378                         ctxt->gpa_available = true;
7379                         ctxt->gpa_val = cr2_or_gpa;
7380                 }
7381         } else {
7382                 /* Sanitize the address out of an abundance of paranoia. */
7383                 ctxt->exception.address = 0;
7384         }
7385
7386         r = x86_emulate_insn(ctxt);
7387
7388         if (r == EMULATION_INTERCEPTED)
7389                 return 1;
7390
7391         if (r == EMULATION_FAILED) {
7392                 if (reexecute_instruction(vcpu, cr2_or_gpa, write_fault_to_spt,
7393                                         emulation_type))
7394                         return 1;
7395
7396                 return handle_emulation_failure(vcpu, emulation_type);
7397         }
7398
7399         if (ctxt->have_exception) {
7400                 r = 1;
7401                 if (inject_emulated_exception(vcpu))
7402                         return r;
7403         } else if (vcpu->arch.pio.count) {
7404                 if (!vcpu->arch.pio.in) {
7405                         /* FIXME: return into emulator if single-stepping.  */
7406                         vcpu->arch.pio.count = 0;
7407                 } else {
7408                         writeback = false;
7409                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
7410                 }
7411                 r = 0;
7412         } else if (vcpu->mmio_needed) {
7413                 ++vcpu->stat.mmio_exits;
7414
7415                 if (!vcpu->mmio_is_write)
7416                         writeback = false;
7417                 r = 0;
7418                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7419         } else if (r == EMULATION_RESTART)
7420                 goto restart;
7421         else
7422                 r = 1;
7423
7424         if (writeback) {
7425                 unsigned long rflags = kvm_x86_ops.get_rflags(vcpu);
7426                 toggle_interruptibility(vcpu, ctxt->interruptibility);
7427                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7428                 if (!ctxt->have_exception ||
7429                     exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
7430                         kvm_rip_write(vcpu, ctxt->eip);
7431                         if (r && (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
7432                                 r = kvm_vcpu_do_singlestep(vcpu);
7433                         if (kvm_x86_ops.update_emulated_instruction)
7434                                 kvm_x86_ops.update_emulated_instruction(vcpu);
7435                         __kvm_set_rflags(vcpu, ctxt->eflags);
7436                 }
7437
7438                 /*
7439                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
7440                  * do nothing, and it will be requested again as soon as
7441                  * the shadow expires.  But we still need to check here,
7442                  * because POPF has no interrupt shadow.
7443                  */
7444                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
7445                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7446         } else
7447                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
7448
7449         return r;
7450 }
7451
7452 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
7453 {
7454         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
7455 }
7456 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
7457
7458 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
7459                                         void *insn, int insn_len)
7460 {
7461         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
7462 }
7463 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
7464
7465 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
7466 {
7467         vcpu->arch.pio.count = 0;
7468         return 1;
7469 }
7470
7471 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
7472 {
7473         vcpu->arch.pio.count = 0;
7474
7475         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
7476                 return 1;
7477
7478         return kvm_skip_emulated_instruction(vcpu);
7479 }
7480
7481 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
7482                             unsigned short port)
7483 {
7484         unsigned long val = kvm_rax_read(vcpu);
7485         int ret = emulator_pio_out(vcpu, size, port, &val, 1);
7486
7487         if (ret)
7488                 return ret;
7489
7490         /*
7491          * Workaround userspace that relies on old KVM behavior of %rip being
7492          * incremented prior to exiting to userspace to handle "OUT 0x7e".
7493          */
7494         if (port == 0x7e &&
7495             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
7496                 vcpu->arch.complete_userspace_io =
7497                         complete_fast_pio_out_port_0x7e;
7498                 kvm_skip_emulated_instruction(vcpu);
7499         } else {
7500                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
7501                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
7502         }
7503         return 0;
7504 }
7505
7506 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
7507 {
7508         unsigned long val;
7509
7510         /* We should only ever be called with arch.pio.count equal to 1 */
7511         BUG_ON(vcpu->arch.pio.count != 1);
7512
7513         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
7514                 vcpu->arch.pio.count = 0;
7515                 return 1;
7516         }
7517
7518         /* For size less than 4 we merge, else we zero extend */
7519         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
7520
7521         /*
7522          * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
7523          * the copy and tracing
7524          */
7525         emulator_pio_in(vcpu, vcpu->arch.pio.size, vcpu->arch.pio.port, &val, 1);
7526         kvm_rax_write(vcpu, val);
7527
7528         return kvm_skip_emulated_instruction(vcpu);
7529 }
7530
7531 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
7532                            unsigned short port)
7533 {
7534         unsigned long val;
7535         int ret;
7536
7537         /* For size less than 4 we merge, else we zero extend */
7538         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
7539
7540         ret = emulator_pio_in(vcpu, size, port, &val, 1);
7541         if (ret) {
7542                 kvm_rax_write(vcpu, val);
7543                 return ret;
7544         }
7545
7546         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
7547         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
7548
7549         return 0;
7550 }
7551
7552 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
7553 {
7554         int ret;
7555
7556         if (in)
7557                 ret = kvm_fast_pio_in(vcpu, size, port);
7558         else
7559                 ret = kvm_fast_pio_out(vcpu, size, port);
7560         return ret && kvm_skip_emulated_instruction(vcpu);
7561 }
7562 EXPORT_SYMBOL_GPL(kvm_fast_pio);
7563
7564 static int kvmclock_cpu_down_prep(unsigned int cpu)
7565 {
7566         __this_cpu_write(cpu_tsc_khz, 0);
7567         return 0;
7568 }
7569
7570 static void tsc_khz_changed(void *data)
7571 {
7572         struct cpufreq_freqs *freq = data;
7573         unsigned long khz = 0;
7574
7575         if (data)
7576                 khz = freq->new;
7577         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
7578                 khz = cpufreq_quick_get(raw_smp_processor_id());
7579         if (!khz)
7580                 khz = tsc_khz;
7581         __this_cpu_write(cpu_tsc_khz, khz);
7582 }
7583
7584 #ifdef CONFIG_X86_64
7585 static void kvm_hyperv_tsc_notifier(void)
7586 {
7587         struct kvm *kvm;
7588         struct kvm_vcpu *vcpu;
7589         int cpu;
7590
7591         mutex_lock(&kvm_lock);
7592         list_for_each_entry(kvm, &vm_list, vm_list)
7593                 kvm_make_mclock_inprogress_request(kvm);
7594
7595         hyperv_stop_tsc_emulation();
7596
7597         /* TSC frequency always matches when on Hyper-V */
7598         for_each_present_cpu(cpu)
7599                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
7600         kvm_max_guest_tsc_khz = tsc_khz;
7601
7602         list_for_each_entry(kvm, &vm_list, vm_list) {
7603                 struct kvm_arch *ka = &kvm->arch;
7604
7605                 spin_lock(&ka->pvclock_gtod_sync_lock);
7606
7607                 pvclock_update_vm_gtod_copy(kvm);
7608
7609                 kvm_for_each_vcpu(cpu, vcpu, kvm)
7610                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7611
7612                 kvm_for_each_vcpu(cpu, vcpu, kvm)
7613                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
7614
7615                 spin_unlock(&ka->pvclock_gtod_sync_lock);
7616         }
7617         mutex_unlock(&kvm_lock);
7618 }
7619 #endif
7620
7621 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
7622 {
7623         struct kvm *kvm;
7624         struct kvm_vcpu *vcpu;
7625         int i, send_ipi = 0;
7626
7627         /*
7628          * We allow guests to temporarily run on slowing clocks,
7629          * provided we notify them after, or to run on accelerating
7630          * clocks, provided we notify them before.  Thus time never
7631          * goes backwards.
7632          *
7633          * However, we have a problem.  We can't atomically update
7634          * the frequency of a given CPU from this function; it is
7635          * merely a notifier, which can be called from any CPU.
7636          * Changing the TSC frequency at arbitrary points in time
7637          * requires a recomputation of local variables related to
7638          * the TSC for each VCPU.  We must flag these local variables
7639          * to be updated and be sure the update takes place with the
7640          * new frequency before any guests proceed.
7641          *
7642          * Unfortunately, the combination of hotplug CPU and frequency
7643          * change creates an intractable locking scenario; the order
7644          * of when these callouts happen is undefined with respect to
7645          * CPU hotplug, and they can race with each other.  As such,
7646          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
7647          * undefined; you can actually have a CPU frequency change take
7648          * place in between the computation of X and the setting of the
7649          * variable.  To protect against this problem, all updates of
7650          * the per_cpu tsc_khz variable are done in an interrupt
7651          * protected IPI, and all callers wishing to update the value
7652          * must wait for a synchronous IPI to complete (which is trivial
7653          * if the caller is on the CPU already).  This establishes the
7654          * necessary total order on variable updates.
7655          *
7656          * Note that because a guest time update may take place
7657          * anytime after the setting of the VCPU's request bit, the
7658          * correct TSC value must be set before the request.  However,
7659          * to ensure the update actually makes it to any guest which
7660          * starts running in hardware virtualization between the set
7661          * and the acquisition of the spinlock, we must also ping the
7662          * CPU after setting the request bit.
7663          *
7664          */
7665
7666         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
7667
7668         mutex_lock(&kvm_lock);
7669         list_for_each_entry(kvm, &vm_list, vm_list) {
7670                 kvm_for_each_vcpu(i, vcpu, kvm) {
7671                         if (vcpu->cpu != cpu)
7672                                 continue;
7673                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7674                         if (vcpu->cpu != raw_smp_processor_id())
7675                                 send_ipi = 1;
7676                 }
7677         }
7678         mutex_unlock(&kvm_lock);
7679
7680         if (freq->old < freq->new && send_ipi) {
7681                 /*
7682                  * We upscale the frequency.  Must make the guest
7683                  * doesn't see old kvmclock values while running with
7684                  * the new frequency, otherwise we risk the guest sees
7685                  * time go backwards.
7686                  *
7687                  * In case we update the frequency for another cpu
7688                  * (which might be in guest context) send an interrupt
7689                  * to kick the cpu out of guest context.  Next time
7690                  * guest context is entered kvmclock will be updated,
7691                  * so the guest will not see stale values.
7692                  */
7693                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
7694         }
7695 }
7696
7697 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
7698                                      void *data)
7699 {
7700         struct cpufreq_freqs *freq = data;
7701         int cpu;
7702
7703         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
7704                 return 0;
7705         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
7706                 return 0;
7707
7708         for_each_cpu(cpu, freq->policy->cpus)
7709                 __kvmclock_cpufreq_notifier(freq, cpu);
7710
7711         return 0;
7712 }
7713
7714 static struct notifier_block kvmclock_cpufreq_notifier_block = {
7715         .notifier_call  = kvmclock_cpufreq_notifier
7716 };
7717
7718 static int kvmclock_cpu_online(unsigned int cpu)
7719 {
7720         tsc_khz_changed(NULL);
7721         return 0;
7722 }
7723
7724 static void kvm_timer_init(void)
7725 {
7726         max_tsc_khz = tsc_khz;
7727
7728         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
7729 #ifdef CONFIG_CPU_FREQ
7730                 struct cpufreq_policy *policy;
7731                 int cpu;
7732
7733                 cpu = get_cpu();
7734                 policy = cpufreq_cpu_get(cpu);
7735                 if (policy) {
7736                         if (policy->cpuinfo.max_freq)
7737                                 max_tsc_khz = policy->cpuinfo.max_freq;
7738                         cpufreq_cpu_put(policy);
7739                 }
7740                 put_cpu();
7741 #endif
7742                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
7743                                           CPUFREQ_TRANSITION_NOTIFIER);
7744         }
7745
7746         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
7747                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
7748 }
7749
7750 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
7751 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
7752
7753 int kvm_is_in_guest(void)
7754 {
7755         return __this_cpu_read(current_vcpu) != NULL;
7756 }
7757
7758 static int kvm_is_user_mode(void)
7759 {
7760         int user_mode = 3;
7761
7762         if (__this_cpu_read(current_vcpu))
7763                 user_mode = kvm_x86_ops.get_cpl(__this_cpu_read(current_vcpu));
7764
7765         return user_mode != 0;
7766 }
7767
7768 static unsigned long kvm_get_guest_ip(void)
7769 {
7770         unsigned long ip = 0;
7771
7772         if (__this_cpu_read(current_vcpu))
7773                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
7774
7775         return ip;
7776 }
7777
7778 static void kvm_handle_intel_pt_intr(void)
7779 {
7780         struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
7781
7782         kvm_make_request(KVM_REQ_PMI, vcpu);
7783         __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
7784                         (unsigned long *)&vcpu->arch.pmu.global_status);
7785 }
7786
7787 static struct perf_guest_info_callbacks kvm_guest_cbs = {
7788         .is_in_guest            = kvm_is_in_guest,
7789         .is_user_mode           = kvm_is_user_mode,
7790         .get_guest_ip           = kvm_get_guest_ip,
7791         .handle_intel_pt_intr   = kvm_handle_intel_pt_intr,
7792 };
7793
7794 #ifdef CONFIG_X86_64
7795 static void pvclock_gtod_update_fn(struct work_struct *work)
7796 {
7797         struct kvm *kvm;
7798
7799         struct kvm_vcpu *vcpu;
7800         int i;
7801
7802         mutex_lock(&kvm_lock);
7803         list_for_each_entry(kvm, &vm_list, vm_list)
7804                 kvm_for_each_vcpu(i, vcpu, kvm)
7805                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7806         atomic_set(&kvm_guest_has_master_clock, 0);
7807         mutex_unlock(&kvm_lock);
7808 }
7809
7810 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
7811
7812 /*
7813  * Notification about pvclock gtod data update.
7814  */
7815 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
7816                                void *priv)
7817 {
7818         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
7819         struct timekeeper *tk = priv;
7820
7821         update_pvclock_gtod(tk);
7822
7823         /* disable master clock if host does not trust, or does not
7824          * use, TSC based clocksource.
7825          */
7826         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
7827             atomic_read(&kvm_guest_has_master_clock) != 0)
7828                 queue_work(system_long_wq, &pvclock_gtod_work);
7829
7830         return 0;
7831 }
7832
7833 static struct notifier_block pvclock_gtod_notifier = {
7834         .notifier_call = pvclock_gtod_notify,
7835 };
7836 #endif
7837
7838 int kvm_arch_init(void *opaque)
7839 {
7840         struct kvm_x86_init_ops *ops = opaque;
7841         int r;
7842
7843         if (kvm_x86_ops.hardware_enable) {
7844                 printk(KERN_ERR "kvm: already loaded the other module\n");
7845                 r = -EEXIST;
7846                 goto out;
7847         }
7848
7849         if (!ops->cpu_has_kvm_support()) {
7850                 pr_err_ratelimited("kvm: no hardware support\n");
7851                 r = -EOPNOTSUPP;
7852                 goto out;
7853         }
7854         if (ops->disabled_by_bios()) {
7855                 pr_err_ratelimited("kvm: disabled by bios\n");
7856                 r = -EOPNOTSUPP;
7857                 goto out;
7858         }
7859
7860         /*
7861          * KVM explicitly assumes that the guest has an FPU and
7862          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
7863          * vCPU's FPU state as a fxregs_state struct.
7864          */
7865         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
7866                 printk(KERN_ERR "kvm: inadequate fpu\n");
7867                 r = -EOPNOTSUPP;
7868                 goto out;
7869         }
7870
7871         r = -ENOMEM;
7872         x86_fpu_cache = kmem_cache_create("x86_fpu", sizeof(struct fpu),
7873                                           __alignof__(struct fpu), SLAB_ACCOUNT,
7874                                           NULL);
7875         if (!x86_fpu_cache) {
7876                 printk(KERN_ERR "kvm: failed to allocate cache for x86 fpu\n");
7877                 goto out;
7878         }
7879
7880         x86_emulator_cache = kvm_alloc_emulator_cache();
7881         if (!x86_emulator_cache) {
7882                 pr_err("kvm: failed to allocate cache for x86 emulator\n");
7883                 goto out_free_x86_fpu_cache;
7884         }
7885
7886         user_return_msrs = alloc_percpu(struct kvm_user_return_msrs);
7887         if (!user_return_msrs) {
7888                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_user_return_msrs\n");
7889                 goto out_free_x86_emulator_cache;
7890         }
7891
7892         r = kvm_mmu_module_init();
7893         if (r)
7894                 goto out_free_percpu;
7895
7896         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
7897                         PT_DIRTY_MASK, PT64_NX_MASK, 0,
7898                         PT_PRESENT_MASK, 0, sme_me_mask);
7899         kvm_timer_init();
7900
7901         perf_register_guest_info_callbacks(&kvm_guest_cbs);
7902
7903         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
7904                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
7905                 supported_xcr0 = host_xcr0 & KVM_SUPPORTED_XCR0;
7906         }
7907
7908         kvm_lapic_init();
7909         if (pi_inject_timer == -1)
7910                 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
7911 #ifdef CONFIG_X86_64
7912         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
7913
7914         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
7915                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
7916 #endif
7917
7918         return 0;
7919
7920 out_free_percpu:
7921         free_percpu(user_return_msrs);
7922 out_free_x86_emulator_cache:
7923         kmem_cache_destroy(x86_emulator_cache);
7924 out_free_x86_fpu_cache:
7925         kmem_cache_destroy(x86_fpu_cache);
7926 out:
7927         return r;
7928 }
7929
7930 void kvm_arch_exit(void)
7931 {
7932 #ifdef CONFIG_X86_64
7933         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
7934                 clear_hv_tscchange_cb();
7935 #endif
7936         kvm_lapic_exit();
7937         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
7938
7939         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
7940                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
7941                                             CPUFREQ_TRANSITION_NOTIFIER);
7942         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
7943 #ifdef CONFIG_X86_64
7944         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
7945 #endif
7946         kvm_x86_ops.hardware_enable = NULL;
7947         kvm_mmu_module_exit();
7948         free_percpu(user_return_msrs);
7949         kmem_cache_destroy(x86_fpu_cache);
7950 }
7951
7952 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
7953 {
7954         ++vcpu->stat.halt_exits;
7955         if (lapic_in_kernel(vcpu)) {
7956                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
7957                 return 1;
7958         } else {
7959                 vcpu->run->exit_reason = KVM_EXIT_HLT;
7960                 return 0;
7961         }
7962 }
7963 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
7964
7965 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
7966 {
7967         int ret = kvm_skip_emulated_instruction(vcpu);
7968         /*
7969          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
7970          * KVM_EXIT_DEBUG here.
7971          */
7972         return kvm_vcpu_halt(vcpu) && ret;
7973 }
7974 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
7975
7976 #ifdef CONFIG_X86_64
7977 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
7978                                 unsigned long clock_type)
7979 {
7980         struct kvm_clock_pairing clock_pairing;
7981         struct timespec64 ts;
7982         u64 cycle;
7983         int ret;
7984
7985         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
7986                 return -KVM_EOPNOTSUPP;
7987
7988         if (kvm_get_walltime_and_clockread(&ts, &cycle) == false)
7989                 return -KVM_EOPNOTSUPP;
7990
7991         clock_pairing.sec = ts.tv_sec;
7992         clock_pairing.nsec = ts.tv_nsec;
7993         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
7994         clock_pairing.flags = 0;
7995         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
7996
7997         ret = 0;
7998         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
7999                             sizeof(struct kvm_clock_pairing)))
8000                 ret = -KVM_EFAULT;
8001
8002         return ret;
8003 }
8004 #endif
8005
8006 /*
8007  * kvm_pv_kick_cpu_op:  Kick a vcpu.
8008  *
8009  * @apicid - apicid of vcpu to be kicked.
8010  */
8011 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
8012 {
8013         struct kvm_lapic_irq lapic_irq;
8014
8015         lapic_irq.shorthand = APIC_DEST_NOSHORT;
8016         lapic_irq.dest_mode = APIC_DEST_PHYSICAL;
8017         lapic_irq.level = 0;
8018         lapic_irq.dest_id = apicid;
8019         lapic_irq.msi_redir_hint = false;
8020
8021         lapic_irq.delivery_mode = APIC_DM_REMRD;
8022         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
8023 }
8024
8025 bool kvm_apicv_activated(struct kvm *kvm)
8026 {
8027         return (READ_ONCE(kvm->arch.apicv_inhibit_reasons) == 0);
8028 }
8029 EXPORT_SYMBOL_GPL(kvm_apicv_activated);
8030
8031 void kvm_apicv_init(struct kvm *kvm, bool enable)
8032 {
8033         if (enable)
8034                 clear_bit(APICV_INHIBIT_REASON_DISABLE,
8035                           &kvm->arch.apicv_inhibit_reasons);
8036         else
8037                 set_bit(APICV_INHIBIT_REASON_DISABLE,
8038                         &kvm->arch.apicv_inhibit_reasons);
8039 }
8040 EXPORT_SYMBOL_GPL(kvm_apicv_init);
8041
8042 static void kvm_sched_yield(struct kvm *kvm, unsigned long dest_id)
8043 {
8044         struct kvm_vcpu *target = NULL;
8045         struct kvm_apic_map *map;
8046
8047         rcu_read_lock();
8048         map = rcu_dereference(kvm->arch.apic_map);
8049
8050         if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
8051                 target = map->phys_map[dest_id]->vcpu;
8052
8053         rcu_read_unlock();
8054
8055         if (target && READ_ONCE(target->ready))
8056                 kvm_vcpu_yield_to(target);
8057 }
8058
8059 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
8060 {
8061         unsigned long nr, a0, a1, a2, a3, ret;
8062         int op_64_bit;
8063
8064         if (kvm_hv_hypercall_enabled(vcpu->kvm))
8065                 return kvm_hv_hypercall(vcpu);
8066
8067         nr = kvm_rax_read(vcpu);
8068         a0 = kvm_rbx_read(vcpu);
8069         a1 = kvm_rcx_read(vcpu);
8070         a2 = kvm_rdx_read(vcpu);
8071         a3 = kvm_rsi_read(vcpu);
8072
8073         trace_kvm_hypercall(nr, a0, a1, a2, a3);
8074
8075         op_64_bit = is_64_bit_mode(vcpu);
8076         if (!op_64_bit) {
8077                 nr &= 0xFFFFFFFF;
8078                 a0 &= 0xFFFFFFFF;
8079                 a1 &= 0xFFFFFFFF;
8080                 a2 &= 0xFFFFFFFF;
8081                 a3 &= 0xFFFFFFFF;
8082         }
8083
8084         if (kvm_x86_ops.get_cpl(vcpu) != 0) {
8085                 ret = -KVM_EPERM;
8086                 goto out;
8087         }
8088
8089         ret = -KVM_ENOSYS;
8090
8091         switch (nr) {
8092         case KVM_HC_VAPIC_POLL_IRQ:
8093                 ret = 0;
8094                 break;
8095         case KVM_HC_KICK_CPU:
8096                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_UNHALT))
8097                         break;
8098
8099                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
8100                 kvm_sched_yield(vcpu->kvm, a1);
8101                 ret = 0;
8102                 break;
8103 #ifdef CONFIG_X86_64
8104         case KVM_HC_CLOCK_PAIRING:
8105                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
8106                 break;
8107 #endif
8108         case KVM_HC_SEND_IPI:
8109                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SEND_IPI))
8110                         break;
8111
8112                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
8113                 break;
8114         case KVM_HC_SCHED_YIELD:
8115                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SCHED_YIELD))
8116                         break;
8117
8118                 kvm_sched_yield(vcpu->kvm, a0);
8119                 ret = 0;
8120                 break;
8121         default:
8122                 ret = -KVM_ENOSYS;
8123                 break;
8124         }
8125 out:
8126         if (!op_64_bit)
8127                 ret = (u32)ret;
8128         kvm_rax_write(vcpu, ret);
8129
8130         ++vcpu->stat.hypercalls;
8131         return kvm_skip_emulated_instruction(vcpu);
8132 }
8133 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
8134
8135 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
8136 {
8137         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
8138         char instruction[3];
8139         unsigned long rip = kvm_rip_read(vcpu);
8140
8141         kvm_x86_ops.patch_hypercall(vcpu, instruction);
8142
8143         return emulator_write_emulated(ctxt, rip, instruction, 3,
8144                 &ctxt->exception);
8145 }
8146
8147 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
8148 {
8149         return vcpu->run->request_interrupt_window &&
8150                 likely(!pic_in_kernel(vcpu->kvm));
8151 }
8152
8153 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
8154 {
8155         struct kvm_run *kvm_run = vcpu->run;
8156
8157         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
8158         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
8159         kvm_run->cr8 = kvm_get_cr8(vcpu);
8160         kvm_run->apic_base = kvm_get_apic_base(vcpu);
8161         kvm_run->ready_for_interrupt_injection =
8162                 pic_in_kernel(vcpu->kvm) ||
8163                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
8164 }
8165
8166 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
8167 {
8168         int max_irr, tpr;
8169
8170         if (!kvm_x86_ops.update_cr8_intercept)
8171                 return;
8172
8173         if (!lapic_in_kernel(vcpu))
8174                 return;
8175
8176         if (vcpu->arch.apicv_active)
8177                 return;
8178
8179         if (!vcpu->arch.apic->vapic_addr)
8180                 max_irr = kvm_lapic_find_highest_irr(vcpu);
8181         else
8182                 max_irr = -1;
8183
8184         if (max_irr != -1)
8185                 max_irr >>= 4;
8186
8187         tpr = kvm_lapic_get_cr8(vcpu);
8188
8189         kvm_x86_ops.update_cr8_intercept(vcpu, tpr, max_irr);
8190 }
8191
8192 static void inject_pending_event(struct kvm_vcpu *vcpu, bool *req_immediate_exit)
8193 {
8194         int r;
8195         bool can_inject = true;
8196
8197         /* try to reinject previous events if any */
8198
8199         if (vcpu->arch.exception.injected) {
8200                 kvm_x86_ops.queue_exception(vcpu);
8201                 can_inject = false;
8202         }
8203         /*
8204          * Do not inject an NMI or interrupt if there is a pending
8205          * exception.  Exceptions and interrupts are recognized at
8206          * instruction boundaries, i.e. the start of an instruction.
8207          * Trap-like exceptions, e.g. #DB, have higher priority than
8208          * NMIs and interrupts, i.e. traps are recognized before an
8209          * NMI/interrupt that's pending on the same instruction.
8210          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
8211          * priority, but are only generated (pended) during instruction
8212          * execution, i.e. a pending fault-like exception means the
8213          * fault occurred on the *previous* instruction and must be
8214          * serviced prior to recognizing any new events in order to
8215          * fully complete the previous instruction.
8216          */
8217         else if (!vcpu->arch.exception.pending) {
8218                 if (vcpu->arch.nmi_injected) {
8219                         kvm_x86_ops.set_nmi(vcpu);
8220                         can_inject = false;
8221                 } else if (vcpu->arch.interrupt.injected) {
8222                         kvm_x86_ops.set_irq(vcpu);
8223                         can_inject = false;
8224                 }
8225         }
8226
8227         WARN_ON_ONCE(vcpu->arch.exception.injected &&
8228                      vcpu->arch.exception.pending);
8229
8230         /*
8231          * Call check_nested_events() even if we reinjected a previous event
8232          * in order for caller to determine if it should require immediate-exit
8233          * from L2 to L1 due to pending L1 events which require exit
8234          * from L2 to L1.
8235          */
8236         if (is_guest_mode(vcpu)) {
8237                 r = kvm_x86_ops.nested_ops->check_events(vcpu);
8238                 if (r < 0)
8239                         goto busy;
8240         }
8241
8242         /* try to inject new event if pending */
8243         if (vcpu->arch.exception.pending) {
8244                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
8245                                         vcpu->arch.exception.has_error_code,
8246                                         vcpu->arch.exception.error_code);
8247
8248                 vcpu->arch.exception.pending = false;
8249                 vcpu->arch.exception.injected = true;
8250
8251                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
8252                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
8253                                              X86_EFLAGS_RF);
8254
8255                 if (vcpu->arch.exception.nr == DB_VECTOR) {
8256                         kvm_deliver_exception_payload(vcpu);
8257                         if (vcpu->arch.dr7 & DR7_GD) {
8258                                 vcpu->arch.dr7 &= ~DR7_GD;
8259                                 kvm_update_dr7(vcpu);
8260                         }
8261                 }
8262
8263                 kvm_x86_ops.queue_exception(vcpu);
8264                 can_inject = false;
8265         }
8266
8267         /*
8268          * Finally, inject interrupt events.  If an event cannot be injected
8269          * due to architectural conditions (e.g. IF=0) a window-open exit
8270          * will re-request KVM_REQ_EVENT.  Sometimes however an event is pending
8271          * and can architecturally be injected, but we cannot do it right now:
8272          * an interrupt could have arrived just now and we have to inject it
8273          * as a vmexit, or there could already an event in the queue, which is
8274          * indicated by can_inject.  In that case we request an immediate exit
8275          * in order to make progress and get back here for another iteration.
8276          * The kvm_x86_ops hooks communicate this by returning -EBUSY.
8277          */
8278         if (vcpu->arch.smi_pending) {
8279                 r = can_inject ? kvm_x86_ops.smi_allowed(vcpu, true) : -EBUSY;
8280                 if (r < 0)
8281                         goto busy;
8282                 if (r) {
8283                         vcpu->arch.smi_pending = false;
8284                         ++vcpu->arch.smi_count;
8285                         enter_smm(vcpu);
8286                         can_inject = false;
8287                 } else
8288                         kvm_x86_ops.enable_smi_window(vcpu);
8289         }
8290
8291         if (vcpu->arch.nmi_pending) {
8292                 r = can_inject ? kvm_x86_ops.nmi_allowed(vcpu, true) : -EBUSY;
8293                 if (r < 0)
8294                         goto busy;
8295                 if (r) {
8296                         --vcpu->arch.nmi_pending;
8297                         vcpu->arch.nmi_injected = true;
8298                         kvm_x86_ops.set_nmi(vcpu);
8299                         can_inject = false;
8300                         WARN_ON(kvm_x86_ops.nmi_allowed(vcpu, true) < 0);
8301                 }
8302                 if (vcpu->arch.nmi_pending)
8303                         kvm_x86_ops.enable_nmi_window(vcpu);
8304         }
8305
8306         if (kvm_cpu_has_injectable_intr(vcpu)) {
8307                 r = can_inject ? kvm_x86_ops.interrupt_allowed(vcpu, true) : -EBUSY;
8308                 if (r < 0)
8309                         goto busy;
8310                 if (r) {
8311                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu), false);
8312                         kvm_x86_ops.set_irq(vcpu);
8313                         WARN_ON(kvm_x86_ops.interrupt_allowed(vcpu, true) < 0);
8314                 }
8315                 if (kvm_cpu_has_injectable_intr(vcpu))
8316                         kvm_x86_ops.enable_irq_window(vcpu);
8317         }
8318
8319         if (is_guest_mode(vcpu) &&
8320             kvm_x86_ops.nested_ops->hv_timer_pending &&
8321             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
8322                 *req_immediate_exit = true;
8323
8324         WARN_ON(vcpu->arch.exception.pending);
8325         return;
8326
8327 busy:
8328         *req_immediate_exit = true;
8329         return;
8330 }
8331
8332 static void process_nmi(struct kvm_vcpu *vcpu)
8333 {
8334         unsigned limit = 2;
8335
8336         /*
8337          * x86 is limited to one NMI running, and one NMI pending after it.
8338          * If an NMI is already in progress, limit further NMIs to just one.
8339          * Otherwise, allow two (and we'll inject the first one immediately).
8340          */
8341         if (kvm_x86_ops.get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
8342                 limit = 1;
8343
8344         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
8345         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
8346         kvm_make_request(KVM_REQ_EVENT, vcpu);
8347 }
8348
8349 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
8350 {
8351         u32 flags = 0;
8352         flags |= seg->g       << 23;
8353         flags |= seg->db      << 22;
8354         flags |= seg->l       << 21;
8355         flags |= seg->avl     << 20;
8356         flags |= seg->present << 15;
8357         flags |= seg->dpl     << 13;
8358         flags |= seg->s       << 12;
8359         flags |= seg->type    << 8;
8360         return flags;
8361 }
8362
8363 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
8364 {
8365         struct kvm_segment seg;
8366         int offset;
8367
8368         kvm_get_segment(vcpu, &seg, n);
8369         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
8370
8371         if (n < 3)
8372                 offset = 0x7f84 + n * 12;
8373         else
8374                 offset = 0x7f2c + (n - 3) * 12;
8375
8376         put_smstate(u32, buf, offset + 8, seg.base);
8377         put_smstate(u32, buf, offset + 4, seg.limit);
8378         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
8379 }
8380
8381 #ifdef CONFIG_X86_64
8382 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
8383 {
8384         struct kvm_segment seg;
8385         int offset;
8386         u16 flags;
8387
8388         kvm_get_segment(vcpu, &seg, n);
8389         offset = 0x7e00 + n * 16;
8390
8391         flags = enter_smm_get_segment_flags(&seg) >> 8;
8392         put_smstate(u16, buf, offset, seg.selector);
8393         put_smstate(u16, buf, offset + 2, flags);
8394         put_smstate(u32, buf, offset + 4, seg.limit);
8395         put_smstate(u64, buf, offset + 8, seg.base);
8396 }
8397 #endif
8398
8399 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
8400 {
8401         struct desc_ptr dt;
8402         struct kvm_segment seg;
8403         unsigned long val;
8404         int i;
8405
8406         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
8407         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
8408         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
8409         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
8410
8411         for (i = 0; i < 8; i++)
8412                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
8413
8414         kvm_get_dr(vcpu, 6, &val);
8415         put_smstate(u32, buf, 0x7fcc, (u32)val);
8416         kvm_get_dr(vcpu, 7, &val);
8417         put_smstate(u32, buf, 0x7fc8, (u32)val);
8418
8419         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
8420         put_smstate(u32, buf, 0x7fc4, seg.selector);
8421         put_smstate(u32, buf, 0x7f64, seg.base);
8422         put_smstate(u32, buf, 0x7f60, seg.limit);
8423         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
8424
8425         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
8426         put_smstate(u32, buf, 0x7fc0, seg.selector);
8427         put_smstate(u32, buf, 0x7f80, seg.base);
8428         put_smstate(u32, buf, 0x7f7c, seg.limit);
8429         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
8430
8431         kvm_x86_ops.get_gdt(vcpu, &dt);
8432         put_smstate(u32, buf, 0x7f74, dt.address);
8433         put_smstate(u32, buf, 0x7f70, dt.size);
8434
8435         kvm_x86_ops.get_idt(vcpu, &dt);
8436         put_smstate(u32, buf, 0x7f58, dt.address);
8437         put_smstate(u32, buf, 0x7f54, dt.size);
8438
8439         for (i = 0; i < 6; i++)
8440                 enter_smm_save_seg_32(vcpu, buf, i);
8441
8442         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
8443
8444         /* revision id */
8445         put_smstate(u32, buf, 0x7efc, 0x00020000);
8446         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
8447 }
8448
8449 #ifdef CONFIG_X86_64
8450 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
8451 {
8452         struct desc_ptr dt;
8453         struct kvm_segment seg;
8454         unsigned long val;
8455         int i;
8456
8457         for (i = 0; i < 16; i++)
8458                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
8459
8460         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
8461         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
8462
8463         kvm_get_dr(vcpu, 6, &val);
8464         put_smstate(u64, buf, 0x7f68, val);
8465         kvm_get_dr(vcpu, 7, &val);
8466         put_smstate(u64, buf, 0x7f60, val);
8467
8468         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
8469         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
8470         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
8471
8472         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
8473
8474         /* revision id */
8475         put_smstate(u32, buf, 0x7efc, 0x00020064);
8476
8477         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
8478
8479         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
8480         put_smstate(u16, buf, 0x7e90, seg.selector);
8481         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
8482         put_smstate(u32, buf, 0x7e94, seg.limit);
8483         put_smstate(u64, buf, 0x7e98, seg.base);
8484
8485         kvm_x86_ops.get_idt(vcpu, &dt);
8486         put_smstate(u32, buf, 0x7e84, dt.size);
8487         put_smstate(u64, buf, 0x7e88, dt.address);
8488
8489         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
8490         put_smstate(u16, buf, 0x7e70, seg.selector);
8491         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
8492         put_smstate(u32, buf, 0x7e74, seg.limit);
8493         put_smstate(u64, buf, 0x7e78, seg.base);
8494
8495         kvm_x86_ops.get_gdt(vcpu, &dt);
8496         put_smstate(u32, buf, 0x7e64, dt.size);
8497         put_smstate(u64, buf, 0x7e68, dt.address);
8498
8499         for (i = 0; i < 6; i++)
8500                 enter_smm_save_seg_64(vcpu, buf, i);
8501 }
8502 #endif
8503
8504 static void enter_smm(struct kvm_vcpu *vcpu)
8505 {
8506         struct kvm_segment cs, ds;
8507         struct desc_ptr dt;
8508         char buf[512];
8509         u32 cr0;
8510
8511         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
8512         memset(buf, 0, 512);
8513 #ifdef CONFIG_X86_64
8514         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
8515                 enter_smm_save_state_64(vcpu, buf);
8516         else
8517 #endif
8518                 enter_smm_save_state_32(vcpu, buf);
8519
8520         /*
8521          * Give pre_enter_smm() a chance to make ISA-specific changes to the
8522          * vCPU state (e.g. leave guest mode) after we've saved the state into
8523          * the SMM state-save area.
8524          */
8525         kvm_x86_ops.pre_enter_smm(vcpu, buf);
8526
8527         vcpu->arch.hflags |= HF_SMM_MASK;
8528         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
8529
8530         if (kvm_x86_ops.get_nmi_mask(vcpu))
8531                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
8532         else
8533                 kvm_x86_ops.set_nmi_mask(vcpu, true);
8534
8535         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
8536         kvm_rip_write(vcpu, 0x8000);
8537
8538         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
8539         kvm_x86_ops.set_cr0(vcpu, cr0);
8540         vcpu->arch.cr0 = cr0;
8541
8542         kvm_x86_ops.set_cr4(vcpu, 0);
8543
8544         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
8545         dt.address = dt.size = 0;
8546         kvm_x86_ops.set_idt(vcpu, &dt);
8547
8548         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
8549
8550         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
8551         cs.base = vcpu->arch.smbase;
8552
8553         ds.selector = 0;
8554         ds.base = 0;
8555
8556         cs.limit    = ds.limit = 0xffffffff;
8557         cs.type     = ds.type = 0x3;
8558         cs.dpl      = ds.dpl = 0;
8559         cs.db       = ds.db = 0;
8560         cs.s        = ds.s = 1;
8561         cs.l        = ds.l = 0;
8562         cs.g        = ds.g = 1;
8563         cs.avl      = ds.avl = 0;
8564         cs.present  = ds.present = 1;
8565         cs.unusable = ds.unusable = 0;
8566         cs.padding  = ds.padding = 0;
8567
8568         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
8569         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
8570         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
8571         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
8572         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
8573         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
8574
8575 #ifdef CONFIG_X86_64
8576         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
8577                 kvm_x86_ops.set_efer(vcpu, 0);
8578 #endif
8579
8580         kvm_update_cpuid_runtime(vcpu);
8581         kvm_mmu_reset_context(vcpu);
8582 }
8583
8584 static void process_smi(struct kvm_vcpu *vcpu)
8585 {
8586         vcpu->arch.smi_pending = true;
8587         kvm_make_request(KVM_REQ_EVENT, vcpu);
8588 }
8589
8590 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
8591                                        unsigned long *vcpu_bitmap)
8592 {
8593         cpumask_var_t cpus;
8594
8595         zalloc_cpumask_var(&cpus, GFP_ATOMIC);
8596
8597         kvm_make_vcpus_request_mask(kvm, KVM_REQ_SCAN_IOAPIC,
8598                                     NULL, vcpu_bitmap, cpus);
8599
8600         free_cpumask_var(cpus);
8601 }
8602
8603 void kvm_make_scan_ioapic_request(struct kvm *kvm)
8604 {
8605         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
8606 }
8607
8608 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
8609 {
8610         if (!lapic_in_kernel(vcpu))
8611                 return;
8612
8613         vcpu->arch.apicv_active = kvm_apicv_activated(vcpu->kvm);
8614         kvm_apic_update_apicv(vcpu);
8615         kvm_x86_ops.refresh_apicv_exec_ctrl(vcpu);
8616 }
8617 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv);
8618
8619 /*
8620  * NOTE: Do not hold any lock prior to calling this.
8621  *
8622  * In particular, kvm_request_apicv_update() expects kvm->srcu not to be
8623  * locked, because it calls __x86_set_memory_region() which does
8624  * synchronize_srcu(&kvm->srcu).
8625  */
8626 void kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
8627 {
8628         struct kvm_vcpu *except;
8629         unsigned long old, new, expected;
8630
8631         if (!kvm_x86_ops.check_apicv_inhibit_reasons ||
8632             !kvm_x86_ops.check_apicv_inhibit_reasons(bit))
8633                 return;
8634
8635         old = READ_ONCE(kvm->arch.apicv_inhibit_reasons);
8636         do {
8637                 expected = new = old;
8638                 if (activate)
8639                         __clear_bit(bit, &new);
8640                 else
8641                         __set_bit(bit, &new);
8642                 if (new == old)
8643                         break;
8644                 old = cmpxchg(&kvm->arch.apicv_inhibit_reasons, expected, new);
8645         } while (old != expected);
8646
8647         if (!!old == !!new)
8648                 return;
8649
8650         trace_kvm_apicv_update_request(activate, bit);
8651         if (kvm_x86_ops.pre_update_apicv_exec_ctrl)
8652                 kvm_x86_ops.pre_update_apicv_exec_ctrl(kvm, activate);
8653
8654         /*
8655          * Sending request to update APICV for all other vcpus,
8656          * while update the calling vcpu immediately instead of
8657          * waiting for another #VMEXIT to handle the request.
8658          */
8659         except = kvm_get_running_vcpu();
8660         kvm_make_all_cpus_request_except(kvm, KVM_REQ_APICV_UPDATE,
8661                                          except);
8662         if (except)
8663                 kvm_vcpu_update_apicv(except);
8664 }
8665 EXPORT_SYMBOL_GPL(kvm_request_apicv_update);
8666
8667 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
8668 {
8669         if (!kvm_apic_present(vcpu))
8670                 return;
8671
8672         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
8673
8674         if (irqchip_split(vcpu->kvm))
8675                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
8676         else {
8677                 if (vcpu->arch.apicv_active)
8678                         kvm_x86_ops.sync_pir_to_irr(vcpu);
8679                 if (ioapic_in_kernel(vcpu->kvm))
8680                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
8681         }
8682
8683         if (is_guest_mode(vcpu))
8684                 vcpu->arch.load_eoi_exitmap_pending = true;
8685         else
8686                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
8687 }
8688
8689 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
8690 {
8691         u64 eoi_exit_bitmap[4];
8692
8693         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
8694                 return;
8695
8696         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
8697                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
8698         kvm_x86_ops.load_eoi_exitmap(vcpu, eoi_exit_bitmap);
8699 }
8700
8701 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
8702                                             unsigned long start, unsigned long end)
8703 {
8704         unsigned long apic_address;
8705
8706         /*
8707          * The physical address of apic access page is stored in the VMCS.
8708          * Update it when it becomes invalid.
8709          */
8710         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
8711         if (start <= apic_address && apic_address < end)
8712                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
8713 }
8714
8715 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
8716 {
8717         if (!lapic_in_kernel(vcpu))
8718                 return;
8719
8720         if (!kvm_x86_ops.set_apic_access_page_addr)
8721                 return;
8722
8723         kvm_x86_ops.set_apic_access_page_addr(vcpu);
8724 }
8725
8726 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
8727 {
8728         smp_send_reschedule(vcpu->cpu);
8729 }
8730 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
8731
8732 /*
8733  * Returns 1 to let vcpu_run() continue the guest execution loop without
8734  * exiting to the userspace.  Otherwise, the value will be returned to the
8735  * userspace.
8736  */
8737 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
8738 {
8739         int r;
8740         bool req_int_win =
8741                 dm_request_for_irq_injection(vcpu) &&
8742                 kvm_cpu_accept_dm_intr(vcpu);
8743         fastpath_t exit_fastpath;
8744
8745         bool req_immediate_exit = false;
8746
8747         if (kvm_request_pending(vcpu)) {
8748                 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu)) {
8749                         if (unlikely(!kvm_x86_ops.nested_ops->get_nested_state_pages(vcpu))) {
8750                                 r = 0;
8751                                 goto out;
8752                         }
8753                 }
8754                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
8755                         kvm_mmu_unload(vcpu);
8756                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
8757                         __kvm_migrate_timers(vcpu);
8758                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
8759                         kvm_gen_update_masterclock(vcpu->kvm);
8760                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
8761                         kvm_gen_kvmclock_update(vcpu);
8762                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
8763                         r = kvm_guest_time_update(vcpu);
8764                         if (unlikely(r))
8765                                 goto out;
8766                 }
8767                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
8768                         kvm_mmu_sync_roots(vcpu);
8769                 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD, vcpu))
8770                         kvm_mmu_load_pgd(vcpu);
8771                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) {
8772                         kvm_vcpu_flush_tlb_all(vcpu);
8773
8774                         /* Flushing all ASIDs flushes the current ASID... */
8775                         kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
8776                 }
8777                 if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu))
8778                         kvm_vcpu_flush_tlb_current(vcpu);
8779                 if (kvm_check_request(KVM_REQ_HV_TLB_FLUSH, vcpu))
8780                         kvm_vcpu_flush_tlb_guest(vcpu);
8781
8782                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
8783                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
8784                         r = 0;
8785                         goto out;
8786                 }
8787                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
8788                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
8789                         vcpu->mmio_needed = 0;
8790                         r = 0;
8791                         goto out;
8792                 }
8793                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
8794                         /* Page is swapped out. Do synthetic halt */
8795                         vcpu->arch.apf.halted = true;
8796                         r = 1;
8797                         goto out;
8798                 }
8799                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
8800                         record_steal_time(vcpu);
8801                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
8802                         process_smi(vcpu);
8803                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
8804                         process_nmi(vcpu);
8805                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
8806                         kvm_pmu_handle_event(vcpu);
8807                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
8808                         kvm_pmu_deliver_pmi(vcpu);
8809                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
8810                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
8811                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
8812                                      vcpu->arch.ioapic_handled_vectors)) {
8813                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
8814                                 vcpu->run->eoi.vector =
8815                                                 vcpu->arch.pending_ioapic_eoi;
8816                                 r = 0;
8817                                 goto out;
8818                         }
8819                 }
8820                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
8821                         vcpu_scan_ioapic(vcpu);
8822                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
8823                         vcpu_load_eoi_exitmap(vcpu);
8824                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
8825                         kvm_vcpu_reload_apic_access_page(vcpu);
8826                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
8827                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
8828                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
8829                         r = 0;
8830                         goto out;
8831                 }
8832                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
8833                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
8834                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
8835                         r = 0;
8836                         goto out;
8837                 }
8838                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
8839                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
8840                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
8841                         r = 0;
8842                         goto out;
8843                 }
8844
8845                 /*
8846                  * KVM_REQ_HV_STIMER has to be processed after
8847                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
8848                  * depend on the guest clock being up-to-date
8849                  */
8850                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
8851                         kvm_hv_process_stimers(vcpu);
8852                 if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu))
8853                         kvm_vcpu_update_apicv(vcpu);
8854                 if (kvm_check_request(KVM_REQ_APF_READY, vcpu))
8855                         kvm_check_async_pf_completion(vcpu);
8856                 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED, vcpu))
8857                         kvm_x86_ops.msr_filter_changed(vcpu);
8858         }
8859
8860         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
8861                 ++vcpu->stat.req_event;
8862                 kvm_apic_accept_events(vcpu);
8863                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
8864                         r = 1;
8865                         goto out;
8866                 }
8867
8868                 inject_pending_event(vcpu, &req_immediate_exit);
8869                 if (req_int_win)
8870                         kvm_x86_ops.enable_irq_window(vcpu);
8871
8872                 if (kvm_lapic_enabled(vcpu)) {
8873                         update_cr8_intercept(vcpu);
8874                         kvm_lapic_sync_to_vapic(vcpu);
8875                 }
8876         }
8877
8878         r = kvm_mmu_reload(vcpu);
8879         if (unlikely(r)) {
8880                 goto cancel_injection;
8881         }
8882
8883         preempt_disable();
8884
8885         kvm_x86_ops.prepare_guest_switch(vcpu);
8886
8887         /*
8888          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
8889          * IPI are then delayed after guest entry, which ensures that they
8890          * result in virtual interrupt delivery.
8891          */
8892         local_irq_disable();
8893         vcpu->mode = IN_GUEST_MODE;
8894
8895         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
8896
8897         /*
8898          * 1) We should set ->mode before checking ->requests.  Please see
8899          * the comment in kvm_vcpu_exiting_guest_mode().
8900          *
8901          * 2) For APICv, we should set ->mode before checking PID.ON. This
8902          * pairs with the memory barrier implicit in pi_test_and_set_on
8903          * (see vmx_deliver_posted_interrupt).
8904          *
8905          * 3) This also orders the write to mode from any reads to the page
8906          * tables done while the VCPU is running.  Please see the comment
8907          * in kvm_flush_remote_tlbs.
8908          */
8909         smp_mb__after_srcu_read_unlock();
8910
8911         /*
8912          * This handles the case where a posted interrupt was
8913          * notified with kvm_vcpu_kick.
8914          */
8915         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
8916                 kvm_x86_ops.sync_pir_to_irr(vcpu);
8917
8918         if (kvm_vcpu_exit_request(vcpu)) {
8919                 vcpu->mode = OUTSIDE_GUEST_MODE;
8920                 smp_wmb();
8921                 local_irq_enable();
8922                 preempt_enable();
8923                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8924                 r = 1;
8925                 goto cancel_injection;
8926         }
8927
8928         if (req_immediate_exit) {
8929                 kvm_make_request(KVM_REQ_EVENT, vcpu);
8930                 kvm_x86_ops.request_immediate_exit(vcpu);
8931         }
8932
8933         trace_kvm_entry(vcpu);
8934
8935         fpregs_assert_state_consistent();
8936         if (test_thread_flag(TIF_NEED_FPU_LOAD))
8937                 switch_fpu_return();
8938
8939         if (unlikely(vcpu->arch.switch_db_regs)) {
8940                 set_debugreg(0, 7);
8941                 set_debugreg(vcpu->arch.eff_db[0], 0);
8942                 set_debugreg(vcpu->arch.eff_db[1], 1);
8943                 set_debugreg(vcpu->arch.eff_db[2], 2);
8944                 set_debugreg(vcpu->arch.eff_db[3], 3);
8945                 set_debugreg(vcpu->arch.dr6, 6);
8946                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
8947         }
8948
8949         exit_fastpath = kvm_x86_ops.run(vcpu);
8950
8951         /*
8952          * Do this here before restoring debug registers on the host.  And
8953          * since we do this before handling the vmexit, a DR access vmexit
8954          * can (a) read the correct value of the debug registers, (b) set
8955          * KVM_DEBUGREG_WONT_EXIT again.
8956          */
8957         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
8958                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
8959                 kvm_x86_ops.sync_dirty_debug_regs(vcpu);
8960                 kvm_update_dr0123(vcpu);
8961                 kvm_update_dr7(vcpu);
8962                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
8963         }
8964
8965         /*
8966          * If the guest has used debug registers, at least dr7
8967          * will be disabled while returning to the host.
8968          * If we don't have active breakpoints in the host, we don't
8969          * care about the messed up debug address registers. But if
8970          * we have some of them active, restore the old state.
8971          */
8972         if (hw_breakpoint_active())
8973                 hw_breakpoint_restore();
8974
8975         vcpu->arch.last_vmentry_cpu = vcpu->cpu;
8976         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
8977
8978         vcpu->mode = OUTSIDE_GUEST_MODE;
8979         smp_wmb();
8980
8981         kvm_x86_ops.handle_exit_irqoff(vcpu);
8982
8983         /*
8984          * Consume any pending interrupts, including the possible source of
8985          * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
8986          * An instruction is required after local_irq_enable() to fully unblock
8987          * interrupts on processors that implement an interrupt shadow, the
8988          * stat.exits increment will do nicely.
8989          */
8990         kvm_before_interrupt(vcpu);
8991         local_irq_enable();
8992         ++vcpu->stat.exits;
8993         local_irq_disable();
8994         kvm_after_interrupt(vcpu);
8995
8996         if (lapic_in_kernel(vcpu)) {
8997                 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
8998                 if (delta != S64_MIN) {
8999                         trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
9000                         vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
9001                 }
9002         }
9003
9004         local_irq_enable();
9005         preempt_enable();
9006
9007         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9008
9009         /*
9010          * Profile KVM exit RIPs:
9011          */
9012         if (unlikely(prof_on == KVM_PROFILING)) {
9013                 unsigned long rip = kvm_rip_read(vcpu);
9014                 profile_hit(KVM_PROFILING, (void *)rip);
9015         }
9016
9017         if (unlikely(vcpu->arch.tsc_always_catchup))
9018                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
9019
9020         if (vcpu->arch.apic_attention)
9021                 kvm_lapic_sync_from_vapic(vcpu);
9022
9023         r = kvm_x86_ops.handle_exit(vcpu, exit_fastpath);
9024         return r;
9025
9026 cancel_injection:
9027         if (req_immediate_exit)
9028                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9029         kvm_x86_ops.cancel_injection(vcpu);
9030         if (unlikely(vcpu->arch.apic_attention))
9031                 kvm_lapic_sync_from_vapic(vcpu);
9032 out:
9033         return r;
9034 }
9035
9036 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
9037 {
9038         if (!kvm_arch_vcpu_runnable(vcpu) &&
9039             (!kvm_x86_ops.pre_block || kvm_x86_ops.pre_block(vcpu) == 0)) {
9040                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9041                 kvm_vcpu_block(vcpu);
9042                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9043
9044                 if (kvm_x86_ops.post_block)
9045                         kvm_x86_ops.post_block(vcpu);
9046
9047                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
9048                         return 1;
9049         }
9050
9051         kvm_apic_accept_events(vcpu);
9052         switch(vcpu->arch.mp_state) {
9053         case KVM_MP_STATE_HALTED:
9054                 vcpu->arch.pv.pv_unhalted = false;
9055                 vcpu->arch.mp_state =
9056                         KVM_MP_STATE_RUNNABLE;
9057                 fallthrough;
9058         case KVM_MP_STATE_RUNNABLE:
9059                 vcpu->arch.apf.halted = false;
9060                 break;
9061         case KVM_MP_STATE_INIT_RECEIVED:
9062                 break;
9063         default:
9064                 return -EINTR;
9065         }
9066         return 1;
9067 }
9068
9069 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
9070 {
9071         if (is_guest_mode(vcpu))
9072                 kvm_x86_ops.nested_ops->check_events(vcpu);
9073
9074         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
9075                 !vcpu->arch.apf.halted);
9076 }
9077
9078 static int vcpu_run(struct kvm_vcpu *vcpu)
9079 {
9080         int r;
9081         struct kvm *kvm = vcpu->kvm;
9082
9083         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9084         vcpu->arch.l1tf_flush_l1d = true;
9085
9086         for (;;) {
9087                 if (kvm_vcpu_running(vcpu)) {
9088                         r = vcpu_enter_guest(vcpu);
9089                 } else {
9090                         r = vcpu_block(kvm, vcpu);
9091                 }
9092
9093                 if (r <= 0)
9094                         break;
9095
9096                 kvm_clear_request(KVM_REQ_PENDING_TIMER, vcpu);
9097                 if (kvm_cpu_has_pending_timer(vcpu))
9098                         kvm_inject_pending_timer_irqs(vcpu);
9099
9100                 if (dm_request_for_irq_injection(vcpu) &&
9101                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
9102                         r = 0;
9103                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
9104                         ++vcpu->stat.request_irq_exits;
9105                         break;
9106                 }
9107
9108                 if (__xfer_to_guest_mode_work_pending()) {
9109                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9110                         r = xfer_to_guest_mode_handle_work(vcpu);
9111                         if (r)
9112                                 return r;
9113                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9114                 }
9115         }
9116
9117         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9118
9119         return r;
9120 }
9121
9122 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
9123 {
9124         int r;
9125
9126         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9127         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
9128         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9129         return r;
9130 }
9131
9132 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
9133 {
9134         BUG_ON(!vcpu->arch.pio.count);
9135
9136         return complete_emulated_io(vcpu);
9137 }
9138
9139 /*
9140  * Implements the following, as a state machine:
9141  *
9142  * read:
9143  *   for each fragment
9144  *     for each mmio piece in the fragment
9145  *       write gpa, len
9146  *       exit
9147  *       copy data
9148  *   execute insn
9149  *
9150  * write:
9151  *   for each fragment
9152  *     for each mmio piece in the fragment
9153  *       write gpa, len
9154  *       copy data
9155  *       exit
9156  */
9157 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
9158 {
9159         struct kvm_run *run = vcpu->run;
9160         struct kvm_mmio_fragment *frag;
9161         unsigned len;
9162
9163         BUG_ON(!vcpu->mmio_needed);
9164
9165         /* Complete previous fragment */
9166         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
9167         len = min(8u, frag->len);
9168         if (!vcpu->mmio_is_write)
9169                 memcpy(frag->data, run->mmio.data, len);
9170
9171         if (frag->len <= 8) {
9172                 /* Switch to the next fragment. */
9173                 frag++;
9174                 vcpu->mmio_cur_fragment++;
9175         } else {
9176                 /* Go forward to the next mmio piece. */
9177                 frag->data += len;
9178                 frag->gpa += len;
9179                 frag->len -= len;
9180         }
9181
9182         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
9183                 vcpu->mmio_needed = 0;
9184
9185                 /* FIXME: return into emulator if single-stepping.  */
9186                 if (vcpu->mmio_is_write)
9187                         return 1;
9188                 vcpu->mmio_read_completed = 1;
9189                 return complete_emulated_io(vcpu);
9190         }
9191
9192         run->exit_reason = KVM_EXIT_MMIO;
9193         run->mmio.phys_addr = frag->gpa;
9194         if (vcpu->mmio_is_write)
9195                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
9196         run->mmio.len = min(8u, frag->len);
9197         run->mmio.is_write = vcpu->mmio_is_write;
9198         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
9199         return 0;
9200 }
9201
9202 static void kvm_save_current_fpu(struct fpu *fpu)
9203 {
9204         /*
9205          * If the target FPU state is not resident in the CPU registers, just
9206          * memcpy() from current, else save CPU state directly to the target.
9207          */
9208         if (test_thread_flag(TIF_NEED_FPU_LOAD))
9209                 memcpy(&fpu->state, &current->thread.fpu.state,
9210                        fpu_kernel_xstate_size);
9211         else
9212                 copy_fpregs_to_fpstate(fpu);
9213 }
9214
9215 /* Swap (qemu) user FPU context for the guest FPU context. */
9216 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
9217 {
9218         fpregs_lock();
9219
9220         kvm_save_current_fpu(vcpu->arch.user_fpu);
9221
9222         /* PKRU is separately restored in kvm_x86_ops.run.  */
9223         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu->state,
9224                                 ~XFEATURE_MASK_PKRU);
9225
9226         fpregs_mark_activate();
9227         fpregs_unlock();
9228
9229         trace_kvm_fpu(1);
9230 }
9231
9232 /* When vcpu_run ends, restore user space FPU context. */
9233 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
9234 {
9235         fpregs_lock();
9236
9237         kvm_save_current_fpu(vcpu->arch.guest_fpu);
9238
9239         copy_kernel_to_fpregs(&vcpu->arch.user_fpu->state);
9240
9241         fpregs_mark_activate();
9242         fpregs_unlock();
9243
9244         ++vcpu->stat.fpu_reload;
9245         trace_kvm_fpu(0);
9246 }
9247
9248 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
9249 {
9250         struct kvm_run *kvm_run = vcpu->run;
9251         int r;
9252
9253         vcpu_load(vcpu);
9254         kvm_sigset_activate(vcpu);
9255         kvm_load_guest_fpu(vcpu);
9256
9257         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
9258                 if (kvm_run->immediate_exit) {
9259                         r = -EINTR;
9260                         goto out;
9261                 }
9262                 kvm_vcpu_block(vcpu);
9263                 kvm_apic_accept_events(vcpu);
9264                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
9265                 r = -EAGAIN;
9266                 if (signal_pending(current)) {
9267                         r = -EINTR;
9268                         kvm_run->exit_reason = KVM_EXIT_INTR;
9269                         ++vcpu->stat.signal_exits;
9270                 }
9271                 goto out;
9272         }
9273
9274         if (kvm_run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) {
9275                 r = -EINVAL;
9276                 goto out;
9277         }
9278
9279         if (kvm_run->kvm_dirty_regs) {
9280                 r = sync_regs(vcpu);
9281                 if (r != 0)
9282                         goto out;
9283         }
9284
9285         /* re-sync apic's tpr */
9286         if (!lapic_in_kernel(vcpu)) {
9287                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
9288                         r = -EINVAL;
9289                         goto out;
9290                 }
9291         }
9292
9293         if (unlikely(vcpu->arch.complete_userspace_io)) {
9294                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
9295                 vcpu->arch.complete_userspace_io = NULL;
9296                 r = cui(vcpu);
9297                 if (r <= 0)
9298                         goto out;
9299         } else
9300                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
9301
9302         if (kvm_run->immediate_exit)
9303                 r = -EINTR;
9304         else
9305                 r = vcpu_run(vcpu);
9306
9307 out:
9308         kvm_put_guest_fpu(vcpu);
9309         if (kvm_run->kvm_valid_regs)
9310                 store_regs(vcpu);
9311         post_kvm_run_save(vcpu);
9312         kvm_sigset_deactivate(vcpu);
9313
9314         vcpu_put(vcpu);
9315         return r;
9316 }
9317
9318 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9319 {
9320         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
9321                 /*
9322                  * We are here if userspace calls get_regs() in the middle of
9323                  * instruction emulation. Registers state needs to be copied
9324                  * back from emulation context to vcpu. Userspace shouldn't do
9325                  * that usually, but some bad designed PV devices (vmware
9326                  * backdoor interface) need this to work
9327                  */
9328                 emulator_writeback_register_cache(vcpu->arch.emulate_ctxt);
9329                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
9330         }
9331         regs->rax = kvm_rax_read(vcpu);
9332         regs->rbx = kvm_rbx_read(vcpu);
9333         regs->rcx = kvm_rcx_read(vcpu);
9334         regs->rdx = kvm_rdx_read(vcpu);
9335         regs->rsi = kvm_rsi_read(vcpu);
9336         regs->rdi = kvm_rdi_read(vcpu);
9337         regs->rsp = kvm_rsp_read(vcpu);
9338         regs->rbp = kvm_rbp_read(vcpu);
9339 #ifdef CONFIG_X86_64
9340         regs->r8 = kvm_r8_read(vcpu);
9341         regs->r9 = kvm_r9_read(vcpu);
9342         regs->r10 = kvm_r10_read(vcpu);
9343         regs->r11 = kvm_r11_read(vcpu);
9344         regs->r12 = kvm_r12_read(vcpu);
9345         regs->r13 = kvm_r13_read(vcpu);
9346         regs->r14 = kvm_r14_read(vcpu);
9347         regs->r15 = kvm_r15_read(vcpu);
9348 #endif
9349
9350         regs->rip = kvm_rip_read(vcpu);
9351         regs->rflags = kvm_get_rflags(vcpu);
9352 }
9353
9354 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9355 {
9356         vcpu_load(vcpu);
9357         __get_regs(vcpu, regs);
9358         vcpu_put(vcpu);
9359         return 0;
9360 }
9361
9362 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9363 {
9364         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
9365         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
9366
9367         kvm_rax_write(vcpu, regs->rax);
9368         kvm_rbx_write(vcpu, regs->rbx);
9369         kvm_rcx_write(vcpu, regs->rcx);
9370         kvm_rdx_write(vcpu, regs->rdx);
9371         kvm_rsi_write(vcpu, regs->rsi);
9372         kvm_rdi_write(vcpu, regs->rdi);
9373         kvm_rsp_write(vcpu, regs->rsp);
9374         kvm_rbp_write(vcpu, regs->rbp);
9375 #ifdef CONFIG_X86_64
9376         kvm_r8_write(vcpu, regs->r8);
9377         kvm_r9_write(vcpu, regs->r9);
9378         kvm_r10_write(vcpu, regs->r10);
9379         kvm_r11_write(vcpu, regs->r11);
9380         kvm_r12_write(vcpu, regs->r12);
9381         kvm_r13_write(vcpu, regs->r13);
9382         kvm_r14_write(vcpu, regs->r14);
9383         kvm_r15_write(vcpu, regs->r15);
9384 #endif
9385
9386         kvm_rip_write(vcpu, regs->rip);
9387         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
9388
9389         vcpu->arch.exception.pending = false;
9390
9391         kvm_make_request(KVM_REQ_EVENT, vcpu);
9392 }
9393
9394 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9395 {
9396         vcpu_load(vcpu);
9397         __set_regs(vcpu, regs);
9398         vcpu_put(vcpu);
9399         return 0;
9400 }
9401
9402 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
9403 {
9404         struct kvm_segment cs;
9405
9406         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
9407         *db = cs.db;
9408         *l = cs.l;
9409 }
9410 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
9411
9412 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9413 {
9414         struct desc_ptr dt;
9415
9416         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
9417         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
9418         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
9419         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
9420         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
9421         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
9422
9423         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
9424         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
9425
9426         kvm_x86_ops.get_idt(vcpu, &dt);
9427         sregs->idt.limit = dt.size;
9428         sregs->idt.base = dt.address;
9429         kvm_x86_ops.get_gdt(vcpu, &dt);
9430         sregs->gdt.limit = dt.size;
9431         sregs->gdt.base = dt.address;
9432
9433         sregs->cr0 = kvm_read_cr0(vcpu);
9434         sregs->cr2 = vcpu->arch.cr2;
9435         sregs->cr3 = kvm_read_cr3(vcpu);
9436         sregs->cr4 = kvm_read_cr4(vcpu);
9437         sregs->cr8 = kvm_get_cr8(vcpu);
9438         sregs->efer = vcpu->arch.efer;
9439         sregs->apic_base = kvm_get_apic_base(vcpu);
9440
9441         memset(sregs->interrupt_bitmap, 0, sizeof(sregs->interrupt_bitmap));
9442
9443         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
9444                 set_bit(vcpu->arch.interrupt.nr,
9445                         (unsigned long *)sregs->interrupt_bitmap);
9446 }
9447
9448 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
9449                                   struct kvm_sregs *sregs)
9450 {
9451         vcpu_load(vcpu);
9452         __get_sregs(vcpu, sregs);
9453         vcpu_put(vcpu);
9454         return 0;
9455 }
9456
9457 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
9458                                     struct kvm_mp_state *mp_state)
9459 {
9460         vcpu_load(vcpu);
9461         if (kvm_mpx_supported())
9462                 kvm_load_guest_fpu(vcpu);
9463
9464         kvm_apic_accept_events(vcpu);
9465         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
9466                                         vcpu->arch.pv.pv_unhalted)
9467                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
9468         else
9469                 mp_state->mp_state = vcpu->arch.mp_state;
9470
9471         if (kvm_mpx_supported())
9472                 kvm_put_guest_fpu(vcpu);
9473         vcpu_put(vcpu);
9474         return 0;
9475 }
9476
9477 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
9478                                     struct kvm_mp_state *mp_state)
9479 {
9480         int ret = -EINVAL;
9481
9482         vcpu_load(vcpu);
9483
9484         if (!lapic_in_kernel(vcpu) &&
9485             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
9486                 goto out;
9487
9488         /*
9489          * KVM_MP_STATE_INIT_RECEIVED means the processor is in
9490          * INIT state; latched init should be reported using
9491          * KVM_SET_VCPU_EVENTS, so reject it here.
9492          */
9493         if ((kvm_vcpu_latch_init(vcpu) || vcpu->arch.smi_pending) &&
9494             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
9495              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
9496                 goto out;
9497
9498         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
9499                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
9500                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
9501         } else
9502                 vcpu->arch.mp_state = mp_state->mp_state;
9503         kvm_make_request(KVM_REQ_EVENT, vcpu);
9504
9505         ret = 0;
9506 out:
9507         vcpu_put(vcpu);
9508         return ret;
9509 }
9510
9511 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
9512                     int reason, bool has_error_code, u32 error_code)
9513 {
9514         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
9515         int ret;
9516
9517         init_emulate_ctxt(vcpu);
9518
9519         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
9520                                    has_error_code, error_code);
9521         if (ret) {
9522                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
9523                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
9524                 vcpu->run->internal.ndata = 0;
9525                 return 0;
9526         }
9527
9528         kvm_rip_write(vcpu, ctxt->eip);
9529         kvm_set_rflags(vcpu, ctxt->eflags);
9530         return 1;
9531 }
9532 EXPORT_SYMBOL_GPL(kvm_task_switch);
9533
9534 static int kvm_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9535 {
9536         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
9537                 /*
9538                  * When EFER.LME and CR0.PG are set, the processor is in
9539                  * 64-bit mode (though maybe in a 32-bit code segment).
9540                  * CR4.PAE and EFER.LMA must be set.
9541                  */
9542                 if (!(sregs->cr4 & X86_CR4_PAE)
9543                     || !(sregs->efer & EFER_LMA))
9544                         return -EINVAL;
9545         } else {
9546                 /*
9547                  * Not in 64-bit mode: EFER.LMA is clear and the code
9548                  * segment cannot be 64-bit.
9549                  */
9550                 if (sregs->efer & EFER_LMA || sregs->cs.l)
9551                         return -EINVAL;
9552         }
9553
9554         return kvm_valid_cr4(vcpu, sregs->cr4);
9555 }
9556
9557 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9558 {
9559         struct msr_data apic_base_msr;
9560         int mmu_reset_needed = 0;
9561         int cpuid_update_needed = 0;
9562         int pending_vec, max_bits, idx;
9563         struct desc_ptr dt;
9564         int ret = -EINVAL;
9565
9566         if (kvm_valid_sregs(vcpu, sregs))
9567                 goto out;
9568
9569         apic_base_msr.data = sregs->apic_base;
9570         apic_base_msr.host_initiated = true;
9571         if (kvm_set_apic_base(vcpu, &apic_base_msr))
9572                 goto out;
9573
9574         dt.size = sregs->idt.limit;
9575         dt.address = sregs->idt.base;
9576         kvm_x86_ops.set_idt(vcpu, &dt);
9577         dt.size = sregs->gdt.limit;
9578         dt.address = sregs->gdt.base;
9579         kvm_x86_ops.set_gdt(vcpu, &dt);
9580
9581         vcpu->arch.cr2 = sregs->cr2;
9582         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
9583         vcpu->arch.cr3 = sregs->cr3;
9584         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
9585
9586         kvm_set_cr8(vcpu, sregs->cr8);
9587
9588         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
9589         kvm_x86_ops.set_efer(vcpu, sregs->efer);
9590
9591         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
9592         kvm_x86_ops.set_cr0(vcpu, sregs->cr0);
9593         vcpu->arch.cr0 = sregs->cr0;
9594
9595         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
9596         cpuid_update_needed |= ((kvm_read_cr4(vcpu) ^ sregs->cr4) &
9597                                 (X86_CR4_OSXSAVE | X86_CR4_PKE));
9598         kvm_x86_ops.set_cr4(vcpu, sregs->cr4);
9599         if (cpuid_update_needed)
9600                 kvm_update_cpuid_runtime(vcpu);
9601
9602         idx = srcu_read_lock(&vcpu->kvm->srcu);
9603         if (is_pae_paging(vcpu)) {
9604                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
9605                 mmu_reset_needed = 1;
9606         }
9607         srcu_read_unlock(&vcpu->kvm->srcu, idx);
9608
9609         if (mmu_reset_needed)
9610                 kvm_mmu_reset_context(vcpu);
9611
9612         max_bits = KVM_NR_INTERRUPTS;
9613         pending_vec = find_first_bit(
9614                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
9615         if (pending_vec < max_bits) {
9616                 kvm_queue_interrupt(vcpu, pending_vec, false);
9617                 pr_debug("Set back pending irq %d\n", pending_vec);
9618         }
9619
9620         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
9621         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
9622         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
9623         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
9624         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
9625         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
9626
9627         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
9628         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
9629
9630         update_cr8_intercept(vcpu);
9631
9632         /* Older userspace won't unhalt the vcpu on reset. */
9633         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
9634             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
9635             !is_protmode(vcpu))
9636                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9637
9638         kvm_make_request(KVM_REQ_EVENT, vcpu);
9639
9640         ret = 0;
9641 out:
9642         return ret;
9643 }
9644
9645 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
9646                                   struct kvm_sregs *sregs)
9647 {
9648         int ret;
9649
9650         vcpu_load(vcpu);
9651         ret = __set_sregs(vcpu, sregs);
9652         vcpu_put(vcpu);
9653         return ret;
9654 }
9655
9656 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
9657                                         struct kvm_guest_debug *dbg)
9658 {
9659         unsigned long rflags;
9660         int i, r;
9661
9662         vcpu_load(vcpu);
9663
9664         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
9665                 r = -EBUSY;
9666                 if (vcpu->arch.exception.pending)
9667                         goto out;
9668                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
9669                         kvm_queue_exception(vcpu, DB_VECTOR);
9670                 else
9671                         kvm_queue_exception(vcpu, BP_VECTOR);
9672         }
9673
9674         /*
9675          * Read rflags as long as potentially injected trace flags are still
9676          * filtered out.
9677          */
9678         rflags = kvm_get_rflags(vcpu);
9679
9680         vcpu->guest_debug = dbg->control;
9681         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
9682                 vcpu->guest_debug = 0;
9683
9684         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
9685                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
9686                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
9687                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
9688         } else {
9689                 for (i = 0; i < KVM_NR_DB_REGS; i++)
9690                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
9691         }
9692         kvm_update_dr7(vcpu);
9693
9694         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
9695                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
9696                         get_segment_base(vcpu, VCPU_SREG_CS);
9697
9698         /*
9699          * Trigger an rflags update that will inject or remove the trace
9700          * flags.
9701          */
9702         kvm_set_rflags(vcpu, rflags);
9703
9704         kvm_x86_ops.update_exception_bitmap(vcpu);
9705
9706         r = 0;
9707
9708 out:
9709         vcpu_put(vcpu);
9710         return r;
9711 }
9712
9713 /*
9714  * Translate a guest virtual address to a guest physical address.
9715  */
9716 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
9717                                     struct kvm_translation *tr)
9718 {
9719         unsigned long vaddr = tr->linear_address;
9720         gpa_t gpa;
9721         int idx;
9722
9723         vcpu_load(vcpu);
9724
9725         idx = srcu_read_lock(&vcpu->kvm->srcu);
9726         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
9727         srcu_read_unlock(&vcpu->kvm->srcu, idx);
9728         tr->physical_address = gpa;
9729         tr->valid = gpa != UNMAPPED_GVA;
9730         tr->writeable = 1;
9731         tr->usermode = 0;
9732
9733         vcpu_put(vcpu);
9734         return 0;
9735 }
9736
9737 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
9738 {
9739         struct fxregs_state *fxsave;
9740
9741         vcpu_load(vcpu);
9742
9743         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
9744         memcpy(fpu->fpr, fxsave->st_space, 128);
9745         fpu->fcw = fxsave->cwd;
9746         fpu->fsw = fxsave->swd;
9747         fpu->ftwx = fxsave->twd;
9748         fpu->last_opcode = fxsave->fop;
9749         fpu->last_ip = fxsave->rip;
9750         fpu->last_dp = fxsave->rdp;
9751         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
9752
9753         vcpu_put(vcpu);
9754         return 0;
9755 }
9756
9757 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
9758 {
9759         struct fxregs_state *fxsave;
9760
9761         vcpu_load(vcpu);
9762
9763         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
9764
9765         memcpy(fxsave->st_space, fpu->fpr, 128);
9766         fxsave->cwd = fpu->fcw;
9767         fxsave->swd = fpu->fsw;
9768         fxsave->twd = fpu->ftwx;
9769         fxsave->fop = fpu->last_opcode;
9770         fxsave->rip = fpu->last_ip;
9771         fxsave->rdp = fpu->last_dp;
9772         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
9773
9774         vcpu_put(vcpu);
9775         return 0;
9776 }
9777
9778 static void store_regs(struct kvm_vcpu *vcpu)
9779 {
9780         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
9781
9782         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
9783                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
9784
9785         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
9786                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
9787
9788         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
9789                 kvm_vcpu_ioctl_x86_get_vcpu_events(
9790                                 vcpu, &vcpu->run->s.regs.events);
9791 }
9792
9793 static int sync_regs(struct kvm_vcpu *vcpu)
9794 {
9795         if (vcpu->run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)
9796                 return -EINVAL;
9797
9798         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
9799                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
9800                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
9801         }
9802         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
9803                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
9804                         return -EINVAL;
9805                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
9806         }
9807         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
9808                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
9809                                 vcpu, &vcpu->run->s.regs.events))
9810                         return -EINVAL;
9811                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
9812         }
9813
9814         return 0;
9815 }
9816
9817 static void fx_init(struct kvm_vcpu *vcpu)
9818 {
9819         fpstate_init(&vcpu->arch.guest_fpu->state);
9820         if (boot_cpu_has(X86_FEATURE_XSAVES))
9821                 vcpu->arch.guest_fpu->state.xsave.header.xcomp_bv =
9822                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
9823
9824         /*
9825          * Ensure guest xcr0 is valid for loading
9826          */
9827         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
9828
9829         vcpu->arch.cr0 |= X86_CR0_ET;
9830 }
9831
9832 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
9833 {
9834         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
9835                 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
9836                              "guest TSC will not be reliable\n");
9837
9838         return 0;
9839 }
9840
9841 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
9842 {
9843         struct page *page;
9844         int r;
9845
9846         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
9847                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9848         else
9849                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
9850
9851         kvm_set_tsc_khz(vcpu, max_tsc_khz);
9852
9853         r = kvm_mmu_create(vcpu);
9854         if (r < 0)
9855                 return r;
9856
9857         if (irqchip_in_kernel(vcpu->kvm)) {
9858                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
9859                 if (r < 0)
9860                         goto fail_mmu_destroy;
9861                 if (kvm_apicv_activated(vcpu->kvm))
9862                         vcpu->arch.apicv_active = true;
9863         } else
9864                 static_key_slow_inc(&kvm_no_apic_vcpu);
9865
9866         r = -ENOMEM;
9867
9868         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
9869         if (!page)
9870                 goto fail_free_lapic;
9871         vcpu->arch.pio_data = page_address(page);
9872
9873         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
9874                                        GFP_KERNEL_ACCOUNT);
9875         if (!vcpu->arch.mce_banks)
9876                 goto fail_free_pio_data;
9877         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
9878
9879         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
9880                                 GFP_KERNEL_ACCOUNT))
9881                 goto fail_free_mce_banks;
9882
9883         if (!alloc_emulate_ctxt(vcpu))
9884                 goto free_wbinvd_dirty_mask;
9885
9886         vcpu->arch.user_fpu = kmem_cache_zalloc(x86_fpu_cache,
9887                                                 GFP_KERNEL_ACCOUNT);
9888         if (!vcpu->arch.user_fpu) {
9889                 pr_err("kvm: failed to allocate userspace's fpu\n");
9890                 goto free_emulate_ctxt;
9891         }
9892
9893         vcpu->arch.guest_fpu = kmem_cache_zalloc(x86_fpu_cache,
9894                                                  GFP_KERNEL_ACCOUNT);
9895         if (!vcpu->arch.guest_fpu) {
9896                 pr_err("kvm: failed to allocate vcpu's fpu\n");
9897                 goto free_user_fpu;
9898         }
9899         fx_init(vcpu);
9900
9901         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
9902
9903         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
9904
9905         kvm_async_pf_hash_reset(vcpu);
9906         kvm_pmu_init(vcpu);
9907
9908         vcpu->arch.pending_external_vector = -1;
9909         vcpu->arch.preempted_in_kernel = false;
9910
9911         kvm_hv_vcpu_init(vcpu);
9912
9913         r = kvm_x86_ops.vcpu_create(vcpu);
9914         if (r)
9915                 goto free_guest_fpu;
9916
9917         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
9918         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
9919         kvm_vcpu_mtrr_init(vcpu);
9920         vcpu_load(vcpu);
9921         kvm_vcpu_reset(vcpu, false);
9922         kvm_init_mmu(vcpu, false);
9923         vcpu_put(vcpu);
9924         return 0;
9925
9926 free_guest_fpu:
9927         kmem_cache_free(x86_fpu_cache, vcpu->arch.guest_fpu);
9928 free_user_fpu:
9929         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
9930 free_emulate_ctxt:
9931         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
9932 free_wbinvd_dirty_mask:
9933         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
9934 fail_free_mce_banks:
9935         kfree(vcpu->arch.mce_banks);
9936 fail_free_pio_data:
9937         free_page((unsigned long)vcpu->arch.pio_data);
9938 fail_free_lapic:
9939         kvm_free_lapic(vcpu);
9940 fail_mmu_destroy:
9941         kvm_mmu_destroy(vcpu);
9942         return r;
9943 }
9944
9945 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
9946 {
9947         struct kvm *kvm = vcpu->kvm;
9948
9949         kvm_hv_vcpu_postcreate(vcpu);
9950
9951         if (mutex_lock_killable(&vcpu->mutex))
9952                 return;
9953         vcpu_load(vcpu);
9954         kvm_synchronize_tsc(vcpu, 0);
9955         vcpu_put(vcpu);
9956
9957         /* poll control enabled by default */
9958         vcpu->arch.msr_kvm_poll_control = 1;
9959
9960         mutex_unlock(&vcpu->mutex);
9961
9962         if (kvmclock_periodic_sync && vcpu->vcpu_idx == 0)
9963                 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
9964                                                 KVMCLOCK_SYNC_PERIOD);
9965 }
9966
9967 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
9968 {
9969         struct gfn_to_pfn_cache *cache = &vcpu->arch.st.cache;
9970         int idx;
9971
9972         kvm_release_pfn(cache->pfn, cache->dirty, cache);
9973
9974         kvmclock_reset(vcpu);
9975
9976         kvm_x86_ops.vcpu_free(vcpu);
9977
9978         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
9979         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
9980         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
9981         kmem_cache_free(x86_fpu_cache, vcpu->arch.guest_fpu);
9982
9983         kvm_hv_vcpu_uninit(vcpu);
9984         kvm_pmu_destroy(vcpu);
9985         kfree(vcpu->arch.mce_banks);
9986         kvm_free_lapic(vcpu);
9987         idx = srcu_read_lock(&vcpu->kvm->srcu);
9988         kvm_mmu_destroy(vcpu);
9989         srcu_read_unlock(&vcpu->kvm->srcu, idx);
9990         free_page((unsigned long)vcpu->arch.pio_data);
9991         kvfree(vcpu->arch.cpuid_entries);
9992         if (!lapic_in_kernel(vcpu))
9993                 static_key_slow_dec(&kvm_no_apic_vcpu);
9994 }
9995
9996 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
9997 {
9998         kvm_lapic_reset(vcpu, init_event);
9999
10000         vcpu->arch.hflags = 0;
10001
10002         vcpu->arch.smi_pending = 0;
10003         vcpu->arch.smi_count = 0;
10004         atomic_set(&vcpu->arch.nmi_queued, 0);
10005         vcpu->arch.nmi_pending = 0;
10006         vcpu->arch.nmi_injected = false;
10007         kvm_clear_interrupt_queue(vcpu);
10008         kvm_clear_exception_queue(vcpu);
10009
10010         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
10011         kvm_update_dr0123(vcpu);
10012         vcpu->arch.dr6 = DR6_INIT;
10013         vcpu->arch.dr7 = DR7_FIXED_1;
10014         kvm_update_dr7(vcpu);
10015
10016         vcpu->arch.cr2 = 0;
10017
10018         kvm_make_request(KVM_REQ_EVENT, vcpu);
10019         vcpu->arch.apf.msr_en_val = 0;
10020         vcpu->arch.apf.msr_int_val = 0;
10021         vcpu->arch.st.msr_val = 0;
10022
10023         kvmclock_reset(vcpu);
10024
10025         kvm_clear_async_pf_completion_queue(vcpu);
10026         kvm_async_pf_hash_reset(vcpu);
10027         vcpu->arch.apf.halted = false;
10028
10029         if (kvm_mpx_supported()) {
10030                 void *mpx_state_buffer;
10031
10032                 /*
10033                  * To avoid have the INIT path from kvm_apic_has_events() that be
10034                  * called with loaded FPU and does not let userspace fix the state.
10035                  */
10036                 if (init_event)
10037                         kvm_put_guest_fpu(vcpu);
10038                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10039                                         XFEATURE_BNDREGS);
10040                 if (mpx_state_buffer)
10041                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
10042                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10043                                         XFEATURE_BNDCSR);
10044                 if (mpx_state_buffer)
10045                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
10046                 if (init_event)
10047                         kvm_load_guest_fpu(vcpu);
10048         }
10049
10050         if (!init_event) {
10051                 kvm_pmu_reset(vcpu);
10052                 vcpu->arch.smbase = 0x30000;
10053
10054                 vcpu->arch.msr_misc_features_enables = 0;
10055
10056                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10057         }
10058
10059         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
10060         vcpu->arch.regs_avail = ~0;
10061         vcpu->arch.regs_dirty = ~0;
10062
10063         vcpu->arch.ia32_xss = 0;
10064
10065         kvm_x86_ops.vcpu_reset(vcpu, init_event);
10066 }
10067
10068 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
10069 {
10070         struct kvm_segment cs;
10071
10072         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
10073         cs.selector = vector << 8;
10074         cs.base = vector << 12;
10075         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
10076         kvm_rip_write(vcpu, 0);
10077 }
10078
10079 int kvm_arch_hardware_enable(void)
10080 {
10081         struct kvm *kvm;
10082         struct kvm_vcpu *vcpu;
10083         int i;
10084         int ret;
10085         u64 local_tsc;
10086         u64 max_tsc = 0;
10087         bool stable, backwards_tsc = false;
10088
10089         kvm_user_return_msr_cpu_online();
10090         ret = kvm_x86_ops.hardware_enable();
10091         if (ret != 0)
10092                 return ret;
10093
10094         local_tsc = rdtsc();
10095         stable = !kvm_check_tsc_unstable();
10096         list_for_each_entry(kvm, &vm_list, vm_list) {
10097                 kvm_for_each_vcpu(i, vcpu, kvm) {
10098                         if (!stable && vcpu->cpu == smp_processor_id())
10099                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
10100                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
10101                                 backwards_tsc = true;
10102                                 if (vcpu->arch.last_host_tsc > max_tsc)
10103                                         max_tsc = vcpu->arch.last_host_tsc;
10104                         }
10105                 }
10106         }
10107
10108         /*
10109          * Sometimes, even reliable TSCs go backwards.  This happens on
10110          * platforms that reset TSC during suspend or hibernate actions, but
10111          * maintain synchronization.  We must compensate.  Fortunately, we can
10112          * detect that condition here, which happens early in CPU bringup,
10113          * before any KVM threads can be running.  Unfortunately, we can't
10114          * bring the TSCs fully up to date with real time, as we aren't yet far
10115          * enough into CPU bringup that we know how much real time has actually
10116          * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
10117          * variables that haven't been updated yet.
10118          *
10119          * So we simply find the maximum observed TSC above, then record the
10120          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
10121          * the adjustment will be applied.  Note that we accumulate
10122          * adjustments, in case multiple suspend cycles happen before some VCPU
10123          * gets a chance to run again.  In the event that no KVM threads get a
10124          * chance to run, we will miss the entire elapsed period, as we'll have
10125          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
10126          * loose cycle time.  This isn't too big a deal, since the loss will be
10127          * uniform across all VCPUs (not to mention the scenario is extremely
10128          * unlikely). It is possible that a second hibernate recovery happens
10129          * much faster than a first, causing the observed TSC here to be
10130          * smaller; this would require additional padding adjustment, which is
10131          * why we set last_host_tsc to the local tsc observed here.
10132          *
10133          * N.B. - this code below runs only on platforms with reliable TSC,
10134          * as that is the only way backwards_tsc is set above.  Also note
10135          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
10136          * have the same delta_cyc adjustment applied if backwards_tsc
10137          * is detected.  Note further, this adjustment is only done once,
10138          * as we reset last_host_tsc on all VCPUs to stop this from being
10139          * called multiple times (one for each physical CPU bringup).
10140          *
10141          * Platforms with unreliable TSCs don't have to deal with this, they
10142          * will be compensated by the logic in vcpu_load, which sets the TSC to
10143          * catchup mode.  This will catchup all VCPUs to real time, but cannot
10144          * guarantee that they stay in perfect synchronization.
10145          */
10146         if (backwards_tsc) {
10147                 u64 delta_cyc = max_tsc - local_tsc;
10148                 list_for_each_entry(kvm, &vm_list, vm_list) {
10149                         kvm->arch.backwards_tsc_observed = true;
10150                         kvm_for_each_vcpu(i, vcpu, kvm) {
10151                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
10152                                 vcpu->arch.last_host_tsc = local_tsc;
10153                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
10154                         }
10155
10156                         /*
10157                          * We have to disable TSC offset matching.. if you were
10158                          * booting a VM while issuing an S4 host suspend....
10159                          * you may have some problem.  Solving this issue is
10160                          * left as an exercise to the reader.
10161                          */
10162                         kvm->arch.last_tsc_nsec = 0;
10163                         kvm->arch.last_tsc_write = 0;
10164                 }
10165
10166         }
10167         return 0;
10168 }
10169
10170 void kvm_arch_hardware_disable(void)
10171 {
10172         kvm_x86_ops.hardware_disable();
10173         drop_user_return_notifiers();
10174 }
10175
10176 int kvm_arch_hardware_setup(void *opaque)
10177 {
10178         struct kvm_x86_init_ops *ops = opaque;
10179         int r;
10180
10181         rdmsrl_safe(MSR_EFER, &host_efer);
10182
10183         if (boot_cpu_has(X86_FEATURE_XSAVES))
10184                 rdmsrl(MSR_IA32_XSS, host_xss);
10185
10186         r = ops->hardware_setup();
10187         if (r != 0)
10188                 return r;
10189
10190         memcpy(&kvm_x86_ops, ops->runtime_ops, sizeof(kvm_x86_ops));
10191
10192         if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))
10193                 supported_xss = 0;
10194
10195 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
10196         cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
10197 #undef __kvm_cpu_cap_has
10198
10199         if (kvm_has_tsc_control) {
10200                 /*
10201                  * Make sure the user can only configure tsc_khz values that
10202                  * fit into a signed integer.
10203                  * A min value is not calculated because it will always
10204                  * be 1 on all machines.
10205                  */
10206                 u64 max = min(0x7fffffffULL,
10207                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
10208                 kvm_max_guest_tsc_khz = max;
10209
10210                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
10211         }
10212
10213         kvm_init_msr_list();
10214         return 0;
10215 }
10216
10217 void kvm_arch_hardware_unsetup(void)
10218 {
10219         kvm_x86_ops.hardware_unsetup();
10220 }
10221
10222 int kvm_arch_check_processor_compat(void *opaque)
10223 {
10224         struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
10225         struct kvm_x86_init_ops *ops = opaque;
10226
10227         WARN_ON(!irqs_disabled());
10228
10229         if (__cr4_reserved_bits(cpu_has, c) !=
10230             __cr4_reserved_bits(cpu_has, &boot_cpu_data))
10231                 return -EIO;
10232
10233         return ops->check_processor_compatibility();
10234 }
10235
10236 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
10237 {
10238         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
10239 }
10240 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
10241
10242 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
10243 {
10244         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
10245 }
10246
10247 struct static_key kvm_no_apic_vcpu __read_mostly;
10248 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
10249
10250 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
10251 {
10252         struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
10253
10254         vcpu->arch.l1tf_flush_l1d = true;
10255         if (pmu->version && unlikely(pmu->event_count)) {
10256                 pmu->need_cleanup = true;
10257                 kvm_make_request(KVM_REQ_PMU, vcpu);
10258         }
10259         kvm_x86_ops.sched_in(vcpu, cpu);
10260 }
10261
10262 void kvm_arch_free_vm(struct kvm *kvm)
10263 {
10264         kfree(kvm->arch.hyperv.hv_pa_pg);
10265         vfree(kvm);
10266 }
10267
10268
10269 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
10270 {
10271         if (type)
10272                 return -EINVAL;
10273
10274         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
10275         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
10276         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
10277         INIT_LIST_HEAD(&kvm->arch.lpage_disallowed_mmu_pages);
10278         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
10279         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
10280
10281         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
10282         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
10283         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
10284         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
10285                 &kvm->arch.irq_sources_bitmap);
10286
10287         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
10288         mutex_init(&kvm->arch.apic_map_lock);
10289         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
10290
10291         kvm->arch.kvmclock_offset = -get_kvmclock_base_ns();
10292         pvclock_update_vm_gtod_copy(kvm);
10293
10294         kvm->arch.guest_can_read_msr_platform_info = true;
10295
10296         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
10297         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
10298
10299         kvm_hv_init_vm(kvm);
10300         kvm_page_track_init(kvm);
10301         kvm_mmu_init_vm(kvm);
10302
10303         return kvm_x86_ops.vm_init(kvm);
10304 }
10305
10306 int kvm_arch_post_init_vm(struct kvm *kvm)
10307 {
10308         return kvm_mmu_post_init_vm(kvm);
10309 }
10310
10311 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
10312 {
10313         vcpu_load(vcpu);
10314         kvm_mmu_unload(vcpu);
10315         vcpu_put(vcpu);
10316 }
10317
10318 static void kvm_free_vcpus(struct kvm *kvm)
10319 {
10320         unsigned int i;
10321         struct kvm_vcpu *vcpu;
10322
10323         /*
10324          * Unpin any mmu pages first.
10325          */
10326         kvm_for_each_vcpu(i, vcpu, kvm) {
10327                 kvm_clear_async_pf_completion_queue(vcpu);
10328                 kvm_unload_vcpu_mmu(vcpu);
10329         }
10330         kvm_for_each_vcpu(i, vcpu, kvm)
10331                 kvm_vcpu_destroy(vcpu);
10332
10333         mutex_lock(&kvm->lock);
10334         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
10335                 kvm->vcpus[i] = NULL;
10336
10337         atomic_set(&kvm->online_vcpus, 0);
10338         mutex_unlock(&kvm->lock);
10339 }
10340
10341 void kvm_arch_sync_events(struct kvm *kvm)
10342 {
10343         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
10344         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
10345         kvm_free_pit(kvm);
10346 }
10347
10348 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
10349 {
10350         int i, r;
10351         unsigned long hva, old_npages;
10352         struct kvm_memslots *slots = kvm_memslots(kvm);
10353         struct kvm_memory_slot *slot;
10354
10355         /* Called with kvm->slots_lock held.  */
10356         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
10357                 return -EINVAL;
10358
10359         slot = id_to_memslot(slots, id);
10360         if (size) {
10361                 if (slot && slot->npages)
10362                         return -EEXIST;
10363
10364                 /*
10365                  * MAP_SHARED to prevent internal slot pages from being moved
10366                  * by fork()/COW.
10367                  */
10368                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
10369                               MAP_SHARED | MAP_ANONYMOUS, 0);
10370                 if (IS_ERR((void *)hva))
10371                         return PTR_ERR((void *)hva);
10372         } else {
10373                 if (!slot || !slot->npages)
10374                         return 0;
10375
10376                 old_npages = slot->npages;
10377                 hva = 0;
10378         }
10379
10380         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
10381                 struct kvm_userspace_memory_region m;
10382
10383                 m.slot = id | (i << 16);
10384                 m.flags = 0;
10385                 m.guest_phys_addr = gpa;
10386                 m.userspace_addr = hva;
10387                 m.memory_size = size;
10388                 r = __kvm_set_memory_region(kvm, &m);
10389                 if (r < 0)
10390                         return r;
10391         }
10392
10393         if (!size)
10394                 vm_munmap(hva, old_npages * PAGE_SIZE);
10395
10396         return 0;
10397 }
10398 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
10399
10400 void kvm_arch_pre_destroy_vm(struct kvm *kvm)
10401 {
10402         kvm_mmu_pre_destroy_vm(kvm);
10403 }
10404
10405 void kvm_arch_destroy_vm(struct kvm *kvm)
10406 {
10407         u32 i;
10408
10409         if (current->mm == kvm->mm) {
10410                 /*
10411                  * Free memory regions allocated on behalf of userspace,
10412                  * unless the the memory map has changed due to process exit
10413                  * or fd copying.
10414                  */
10415                 mutex_lock(&kvm->slots_lock);
10416                 __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
10417                                         0, 0);
10418                 __x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT,
10419                                         0, 0);
10420                 __x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
10421                 mutex_unlock(&kvm->slots_lock);
10422         }
10423         if (kvm_x86_ops.vm_destroy)
10424                 kvm_x86_ops.vm_destroy(kvm);
10425         for (i = 0; i < kvm->arch.msr_filter.count; i++)
10426                 kfree(kvm->arch.msr_filter.ranges[i].bitmap);
10427         kvm_pic_destroy(kvm);
10428         kvm_ioapic_destroy(kvm);
10429         kvm_free_vcpus(kvm);
10430         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
10431         kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
10432         kvm_mmu_uninit_vm(kvm);
10433         kvm_page_track_cleanup(kvm);
10434         kvm_hv_destroy_vm(kvm);
10435 }
10436
10437 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
10438 {
10439         int i;
10440
10441         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10442                 kvfree(slot->arch.rmap[i]);
10443                 slot->arch.rmap[i] = NULL;
10444
10445                 if (i == 0)
10446                         continue;
10447
10448                 kvfree(slot->arch.lpage_info[i - 1]);
10449                 slot->arch.lpage_info[i - 1] = NULL;
10450         }
10451
10452         kvm_page_track_free_memslot(slot);
10453 }
10454
10455 static int kvm_alloc_memslot_metadata(struct kvm_memory_slot *slot,
10456                                       unsigned long npages)
10457 {
10458         int i;
10459
10460         /*
10461          * Clear out the previous array pointers for the KVM_MR_MOVE case.  The
10462          * old arrays will be freed by __kvm_set_memory_region() if installing
10463          * the new memslot is successful.
10464          */
10465         memset(&slot->arch, 0, sizeof(slot->arch));
10466
10467         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10468                 struct kvm_lpage_info *linfo;
10469                 unsigned long ugfn;
10470                 int lpages;
10471                 int level = i + 1;
10472
10473                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
10474                                       slot->base_gfn, level) + 1;
10475
10476                 slot->arch.rmap[i] =
10477                         kvcalloc(lpages, sizeof(*slot->arch.rmap[i]),
10478                                  GFP_KERNEL_ACCOUNT);
10479                 if (!slot->arch.rmap[i])
10480                         goto out_free;
10481                 if (i == 0)
10482                         continue;
10483
10484                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
10485                 if (!linfo)
10486                         goto out_free;
10487
10488                 slot->arch.lpage_info[i - 1] = linfo;
10489
10490                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
10491                         linfo[0].disallow_lpage = 1;
10492                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
10493                         linfo[lpages - 1].disallow_lpage = 1;
10494                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
10495                 /*
10496                  * If the gfn and userspace address are not aligned wrt each
10497                  * other, disable large page support for this slot.
10498                  */
10499                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1)) {
10500                         unsigned long j;
10501
10502                         for (j = 0; j < lpages; ++j)
10503                                 linfo[j].disallow_lpage = 1;
10504                 }
10505         }
10506
10507         if (kvm_page_track_create_memslot(slot, npages))
10508                 goto out_free;
10509
10510         return 0;
10511
10512 out_free:
10513         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10514                 kvfree(slot->arch.rmap[i]);
10515                 slot->arch.rmap[i] = NULL;
10516                 if (i == 0)
10517                         continue;
10518
10519                 kvfree(slot->arch.lpage_info[i - 1]);
10520                 slot->arch.lpage_info[i - 1] = NULL;
10521         }
10522         return -ENOMEM;
10523 }
10524
10525 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
10526 {
10527         struct kvm_vcpu *vcpu;
10528         int i;
10529
10530         /*
10531          * memslots->generation has been incremented.
10532          * mmio generation may have reached its maximum value.
10533          */
10534         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
10535
10536         /* Force re-initialization of steal_time cache */
10537         kvm_for_each_vcpu(i, vcpu, kvm)
10538                 kvm_vcpu_kick(vcpu);
10539 }
10540
10541 int kvm_arch_prepare_memory_region(struct kvm *kvm,
10542                                 struct kvm_memory_slot *memslot,
10543                                 const struct kvm_userspace_memory_region *mem,
10544                                 enum kvm_mr_change change)
10545 {
10546         if (change == KVM_MR_CREATE || change == KVM_MR_MOVE)
10547                 return kvm_alloc_memslot_metadata(memslot,
10548                                                   mem->memory_size >> PAGE_SHIFT);
10549         return 0;
10550 }
10551
10552 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
10553                                      struct kvm_memory_slot *old,
10554                                      struct kvm_memory_slot *new,
10555                                      enum kvm_mr_change change)
10556 {
10557         /*
10558          * Nothing to do for RO slots or CREATE/MOVE/DELETE of a slot.
10559          * See comments below.
10560          */
10561         if ((change != KVM_MR_FLAGS_ONLY) || (new->flags & KVM_MEM_READONLY))
10562                 return;
10563
10564         /*
10565          * Dirty logging tracks sptes in 4k granularity, meaning that large
10566          * sptes have to be split.  If live migration is successful, the guest
10567          * in the source machine will be destroyed and large sptes will be
10568          * created in the destination. However, if the guest continues to run
10569          * in the source machine (for example if live migration fails), small
10570          * sptes will remain around and cause bad performance.
10571          *
10572          * Scan sptes if dirty logging has been stopped, dropping those
10573          * which can be collapsed into a single large-page spte.  Later
10574          * page faults will create the large-page sptes.
10575          *
10576          * There is no need to do this in any of the following cases:
10577          * CREATE:      No dirty mappings will already exist.
10578          * MOVE/DELETE: The old mappings will already have been cleaned up by
10579          *              kvm_arch_flush_shadow_memslot()
10580          */
10581         if ((old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
10582             !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
10583                 kvm_mmu_zap_collapsible_sptes(kvm, new);
10584
10585         /*
10586          * Enable or disable dirty logging for the slot.
10587          *
10588          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of the old
10589          * slot have been zapped so no dirty logging updates are needed for
10590          * the old slot.
10591          * For KVM_MR_CREATE and KVM_MR_MOVE, once the new slot is visible
10592          * any mappings that might be created in it will consume the
10593          * properties of the new slot and do not need to be updated here.
10594          *
10595          * When PML is enabled, the kvm_x86_ops dirty logging hooks are
10596          * called to enable/disable dirty logging.
10597          *
10598          * When disabling dirty logging with PML enabled, the D-bit is set
10599          * for sptes in the slot in order to prevent unnecessary GPA
10600          * logging in the PML buffer (and potential PML buffer full VMEXIT).
10601          * This guarantees leaving PML enabled for the guest's lifetime
10602          * won't have any additional overhead from PML when the guest is
10603          * running with dirty logging disabled.
10604          *
10605          * When enabling dirty logging, large sptes are write-protected
10606          * so they can be split on first write.  New large sptes cannot
10607          * be created for this slot until the end of the logging.
10608          * See the comments in fast_page_fault().
10609          * For small sptes, nothing is done if the dirty log is in the
10610          * initial-all-set state.  Otherwise, depending on whether pml
10611          * is enabled the D-bit or the W-bit will be cleared.
10612          */
10613         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
10614                 if (kvm_x86_ops.slot_enable_log_dirty) {
10615                         kvm_x86_ops.slot_enable_log_dirty(kvm, new);
10616                 } else {
10617                         int level =
10618                                 kvm_dirty_log_manual_protect_and_init_set(kvm) ?
10619                                 PG_LEVEL_2M : PG_LEVEL_4K;
10620
10621                         /*
10622                          * If we're with initial-all-set, we don't need
10623                          * to write protect any small page because
10624                          * they're reported as dirty already.  However
10625                          * we still need to write-protect huge pages
10626                          * so that the page split can happen lazily on
10627                          * the first write to the huge page.
10628                          */
10629                         kvm_mmu_slot_remove_write_access(kvm, new, level);
10630                 }
10631         } else {
10632                 if (kvm_x86_ops.slot_disable_log_dirty)
10633                         kvm_x86_ops.slot_disable_log_dirty(kvm, new);
10634         }
10635 }
10636
10637 void kvm_arch_commit_memory_region(struct kvm *kvm,
10638                                 const struct kvm_userspace_memory_region *mem,
10639                                 struct kvm_memory_slot *old,
10640                                 const struct kvm_memory_slot *new,
10641                                 enum kvm_mr_change change)
10642 {
10643         if (!kvm->arch.n_requested_mmu_pages)
10644                 kvm_mmu_change_mmu_pages(kvm,
10645                                 kvm_mmu_calculate_default_mmu_pages(kvm));
10646
10647         /*
10648          * FIXME: const-ify all uses of struct kvm_memory_slot.
10649          */
10650         kvm_mmu_slot_apply_flags(kvm, old, (struct kvm_memory_slot *) new, change);
10651
10652         /* Free the arrays associated with the old memslot. */
10653         if (change == KVM_MR_MOVE)
10654                 kvm_arch_free_memslot(kvm, old);
10655 }
10656
10657 void kvm_arch_flush_shadow_all(struct kvm *kvm)
10658 {
10659         kvm_mmu_zap_all(kvm);
10660 }
10661
10662 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
10663                                    struct kvm_memory_slot *slot)
10664 {
10665         kvm_page_track_flush_slot(kvm, slot);
10666 }
10667
10668 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
10669 {
10670         return (is_guest_mode(vcpu) &&
10671                         kvm_x86_ops.guest_apic_has_interrupt &&
10672                         kvm_x86_ops.guest_apic_has_interrupt(vcpu));
10673 }
10674
10675 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
10676 {
10677         if (!list_empty_careful(&vcpu->async_pf.done))
10678                 return true;
10679
10680         if (kvm_apic_has_events(vcpu))
10681                 return true;
10682
10683         if (vcpu->arch.pv.pv_unhalted)
10684                 return true;
10685
10686         if (vcpu->arch.exception.pending)
10687                 return true;
10688
10689         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
10690             (vcpu->arch.nmi_pending &&
10691              kvm_x86_ops.nmi_allowed(vcpu, false)))
10692                 return true;
10693
10694         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
10695             (vcpu->arch.smi_pending &&
10696              kvm_x86_ops.smi_allowed(vcpu, false)))
10697                 return true;
10698
10699         if (kvm_arch_interrupt_allowed(vcpu) &&
10700             (kvm_cpu_has_interrupt(vcpu) ||
10701             kvm_guest_apic_has_interrupt(vcpu)))
10702                 return true;
10703
10704         if (kvm_hv_has_stimer_pending(vcpu))
10705                 return true;
10706
10707         if (is_guest_mode(vcpu) &&
10708             kvm_x86_ops.nested_ops->hv_timer_pending &&
10709             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
10710                 return true;
10711
10712         return false;
10713 }
10714
10715 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
10716 {
10717         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
10718 }
10719
10720 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
10721 {
10722         if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
10723                 return true;
10724
10725         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
10726                 kvm_test_request(KVM_REQ_SMI, vcpu) ||
10727                  kvm_test_request(KVM_REQ_EVENT, vcpu))
10728                 return true;
10729
10730         if (vcpu->arch.apicv_active && kvm_x86_ops.dy_apicv_has_pending_interrupt(vcpu))
10731                 return true;
10732
10733         return false;
10734 }
10735
10736 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
10737 {
10738         return vcpu->arch.preempted_in_kernel;
10739 }
10740
10741 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
10742 {
10743         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
10744 }
10745
10746 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
10747 {
10748         return kvm_x86_ops.interrupt_allowed(vcpu, false);
10749 }
10750
10751 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
10752 {
10753         if (is_64_bit_mode(vcpu))
10754                 return kvm_rip_read(vcpu);
10755         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
10756                      kvm_rip_read(vcpu));
10757 }
10758 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
10759
10760 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
10761 {
10762         return kvm_get_linear_rip(vcpu) == linear_rip;
10763 }
10764 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
10765
10766 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
10767 {
10768         unsigned long rflags;
10769
10770         rflags = kvm_x86_ops.get_rflags(vcpu);
10771         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
10772                 rflags &= ~X86_EFLAGS_TF;
10773         return rflags;
10774 }
10775 EXPORT_SYMBOL_GPL(kvm_get_rflags);
10776
10777 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
10778 {
10779         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
10780             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
10781                 rflags |= X86_EFLAGS_TF;
10782         kvm_x86_ops.set_rflags(vcpu, rflags);
10783 }
10784
10785 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
10786 {
10787         __kvm_set_rflags(vcpu, rflags);
10788         kvm_make_request(KVM_REQ_EVENT, vcpu);
10789 }
10790 EXPORT_SYMBOL_GPL(kvm_set_rflags);
10791
10792 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
10793 {
10794         int r;
10795
10796         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
10797               work->wakeup_all)
10798                 return;
10799
10800         r = kvm_mmu_reload(vcpu);
10801         if (unlikely(r))
10802                 return;
10803
10804         if (!vcpu->arch.mmu->direct_map &&
10805               work->arch.cr3 != vcpu->arch.mmu->get_guest_pgd(vcpu))
10806                 return;
10807
10808         kvm_mmu_do_page_fault(vcpu, work->cr2_or_gpa, 0, true);
10809 }
10810
10811 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
10812 {
10813         BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU));
10814
10815         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
10816 }
10817
10818 static inline u32 kvm_async_pf_next_probe(u32 key)
10819 {
10820         return (key + 1) & (ASYNC_PF_PER_VCPU - 1);
10821 }
10822
10823 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
10824 {
10825         u32 key = kvm_async_pf_hash_fn(gfn);
10826
10827         while (vcpu->arch.apf.gfns[key] != ~0)
10828                 key = kvm_async_pf_next_probe(key);
10829
10830         vcpu->arch.apf.gfns[key] = gfn;
10831 }
10832
10833 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
10834 {
10835         int i;
10836         u32 key = kvm_async_pf_hash_fn(gfn);
10837
10838         for (i = 0; i < ASYNC_PF_PER_VCPU &&
10839                      (vcpu->arch.apf.gfns[key] != gfn &&
10840                       vcpu->arch.apf.gfns[key] != ~0); i++)
10841                 key = kvm_async_pf_next_probe(key);
10842
10843         return key;
10844 }
10845
10846 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
10847 {
10848         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
10849 }
10850
10851 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
10852 {
10853         u32 i, j, k;
10854
10855         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
10856
10857         if (WARN_ON_ONCE(vcpu->arch.apf.gfns[i] != gfn))
10858                 return;
10859
10860         while (true) {
10861                 vcpu->arch.apf.gfns[i] = ~0;
10862                 do {
10863                         j = kvm_async_pf_next_probe(j);
10864                         if (vcpu->arch.apf.gfns[j] == ~0)
10865                                 return;
10866                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
10867                         /*
10868                          * k lies cyclically in ]i,j]
10869                          * |    i.k.j |
10870                          * |....j i.k.| or  |.k..j i...|
10871                          */
10872                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
10873                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
10874                 i = j;
10875         }
10876 }
10877
10878 static inline int apf_put_user_notpresent(struct kvm_vcpu *vcpu)
10879 {
10880         u32 reason = KVM_PV_REASON_PAGE_NOT_PRESENT;
10881
10882         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &reason,
10883                                       sizeof(reason));
10884 }
10885
10886 static inline int apf_put_user_ready(struct kvm_vcpu *vcpu, u32 token)
10887 {
10888         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
10889
10890         return kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
10891                                              &token, offset, sizeof(token));
10892 }
10893
10894 static inline bool apf_pageready_slot_free(struct kvm_vcpu *vcpu)
10895 {
10896         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
10897         u32 val;
10898
10899         if (kvm_read_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
10900                                          &val, offset, sizeof(val)))
10901                 return false;
10902
10903         return !val;
10904 }
10905
10906 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
10907 {
10908         if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
10909                 return false;
10910
10911         if (!kvm_pv_async_pf_enabled(vcpu) ||
10912             (vcpu->arch.apf.send_user_only && kvm_x86_ops.get_cpl(vcpu) == 0))
10913                 return false;
10914
10915         return true;
10916 }
10917
10918 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
10919 {
10920         if (unlikely(!lapic_in_kernel(vcpu) ||
10921                      kvm_event_needs_reinjection(vcpu) ||
10922                      vcpu->arch.exception.pending))
10923                 return false;
10924
10925         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
10926                 return false;
10927
10928         /*
10929          * If interrupts are off we cannot even use an artificial
10930          * halt state.
10931          */
10932         return kvm_arch_interrupt_allowed(vcpu);
10933 }
10934
10935 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
10936                                      struct kvm_async_pf *work)
10937 {
10938         struct x86_exception fault;
10939
10940         trace_kvm_async_pf_not_present(work->arch.token, work->cr2_or_gpa);
10941         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
10942
10943         if (kvm_can_deliver_async_pf(vcpu) &&
10944             !apf_put_user_notpresent(vcpu)) {
10945                 fault.vector = PF_VECTOR;
10946                 fault.error_code_valid = true;
10947                 fault.error_code = 0;
10948                 fault.nested_page_fault = false;
10949                 fault.address = work->arch.token;
10950                 fault.async_page_fault = true;
10951                 kvm_inject_page_fault(vcpu, &fault);
10952                 return true;
10953         } else {
10954                 /*
10955                  * It is not possible to deliver a paravirtualized asynchronous
10956                  * page fault, but putting the guest in an artificial halt state
10957                  * can be beneficial nevertheless: if an interrupt arrives, we
10958                  * can deliver it timely and perhaps the guest will schedule
10959                  * another process.  When the instruction that triggered a page
10960                  * fault is retried, hopefully the page will be ready in the host.
10961                  */
10962                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
10963                 return false;
10964         }
10965 }
10966
10967 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
10968                                  struct kvm_async_pf *work)
10969 {
10970         struct kvm_lapic_irq irq = {
10971                 .delivery_mode = APIC_DM_FIXED,
10972                 .vector = vcpu->arch.apf.vec
10973         };
10974
10975         if (work->wakeup_all)
10976                 work->arch.token = ~0; /* broadcast wakeup */
10977         else
10978                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
10979         trace_kvm_async_pf_ready(work->arch.token, work->cr2_or_gpa);
10980
10981         if ((work->wakeup_all || work->notpresent_injected) &&
10982             kvm_pv_async_pf_enabled(vcpu) &&
10983             !apf_put_user_ready(vcpu, work->arch.token)) {
10984                 vcpu->arch.apf.pageready_pending = true;
10985                 kvm_apic_set_irq(vcpu, &irq, NULL);
10986         }
10987
10988         vcpu->arch.apf.halted = false;
10989         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10990 }
10991
10992 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu)
10993 {
10994         kvm_make_request(KVM_REQ_APF_READY, vcpu);
10995         if (!vcpu->arch.apf.pageready_pending)
10996                 kvm_vcpu_kick(vcpu);
10997 }
10998
10999 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu)
11000 {
11001         if (!kvm_pv_async_pf_enabled(vcpu))
11002                 return true;
11003         else
11004                 return apf_pageready_slot_free(vcpu);
11005 }
11006
11007 void kvm_arch_start_assignment(struct kvm *kvm)
11008 {
11009         atomic_inc(&kvm->arch.assigned_device_count);
11010 }
11011 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
11012
11013 void kvm_arch_end_assignment(struct kvm *kvm)
11014 {
11015         atomic_dec(&kvm->arch.assigned_device_count);
11016 }
11017 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
11018
11019 bool kvm_arch_has_assigned_device(struct kvm *kvm)
11020 {
11021         return atomic_read(&kvm->arch.assigned_device_count);
11022 }
11023 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
11024
11025 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
11026 {
11027         atomic_inc(&kvm->arch.noncoherent_dma_count);
11028 }
11029 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
11030
11031 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
11032 {
11033         atomic_dec(&kvm->arch.noncoherent_dma_count);
11034 }
11035 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
11036
11037 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
11038 {
11039         return atomic_read(&kvm->arch.noncoherent_dma_count);
11040 }
11041 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
11042
11043 bool kvm_arch_has_irq_bypass(void)
11044 {
11045         return true;
11046 }
11047
11048 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
11049                                       struct irq_bypass_producer *prod)
11050 {
11051         struct kvm_kernel_irqfd *irqfd =
11052                 container_of(cons, struct kvm_kernel_irqfd, consumer);
11053         int ret;
11054
11055         irqfd->producer = prod;
11056         kvm_arch_start_assignment(irqfd->kvm);
11057         ret = kvm_x86_ops.update_pi_irte(irqfd->kvm,
11058                                          prod->irq, irqfd->gsi, 1);
11059
11060         if (ret)
11061                 kvm_arch_end_assignment(irqfd->kvm);
11062
11063         return ret;
11064 }
11065
11066 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
11067                                       struct irq_bypass_producer *prod)
11068 {
11069         int ret;
11070         struct kvm_kernel_irqfd *irqfd =
11071                 container_of(cons, struct kvm_kernel_irqfd, consumer);
11072
11073         WARN_ON(irqfd->producer != prod);
11074         irqfd->producer = NULL;
11075
11076         /*
11077          * When producer of consumer is unregistered, we change back to
11078          * remapped mode, so we can re-use the current implementation
11079          * when the irq is masked/disabled or the consumer side (KVM
11080          * int this case doesn't want to receive the interrupts.
11081         */
11082         ret = kvm_x86_ops.update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
11083         if (ret)
11084                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
11085                        " fails: %d\n", irqfd->consumer.token, ret);
11086
11087         kvm_arch_end_assignment(irqfd->kvm);
11088 }
11089
11090 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
11091                                    uint32_t guest_irq, bool set)
11092 {
11093         return kvm_x86_ops.update_pi_irte(kvm, host_irq, guest_irq, set);
11094 }
11095
11096 bool kvm_vector_hashing_enabled(void)
11097 {
11098         return vector_hashing;
11099 }
11100
11101 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
11102 {
11103         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
11104 }
11105 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
11106
11107
11108 int kvm_spec_ctrl_test_value(u64 value)
11109 {
11110         /*
11111          * test that setting IA32_SPEC_CTRL to given value
11112          * is allowed by the host processor
11113          */
11114
11115         u64 saved_value;
11116         unsigned long flags;
11117         int ret = 0;
11118
11119         local_irq_save(flags);
11120
11121         if (rdmsrl_safe(MSR_IA32_SPEC_CTRL, &saved_value))
11122                 ret = 1;
11123         else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL, value))
11124                 ret = 1;
11125         else
11126                 wrmsrl(MSR_IA32_SPEC_CTRL, saved_value);
11127
11128         local_irq_restore(flags);
11129
11130         return ret;
11131 }
11132 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value);
11133
11134 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code)
11135 {
11136         struct x86_exception fault;
11137         u32 access = error_code &
11138                 (PFERR_WRITE_MASK | PFERR_FETCH_MASK | PFERR_USER_MASK);
11139
11140         if (!(error_code & PFERR_PRESENT_MASK) ||
11141             vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, &fault) != UNMAPPED_GVA) {
11142                 /*
11143                  * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
11144                  * tables probably do not match the TLB.  Just proceed
11145                  * with the error code that the processor gave.
11146                  */
11147                 fault.vector = PF_VECTOR;
11148                 fault.error_code_valid = true;
11149                 fault.error_code = error_code;
11150                 fault.nested_page_fault = false;
11151                 fault.address = gva;
11152         }
11153         vcpu->arch.walk_mmu->inject_page_fault(vcpu, &fault);
11154 }
11155 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error);
11156
11157 /*
11158  * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
11159  * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
11160  * indicates whether exit to userspace is needed.
11161  */
11162 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
11163                               struct x86_exception *e)
11164 {
11165         if (r == X86EMUL_PROPAGATE_FAULT) {
11166                 kvm_inject_emulated_page_fault(vcpu, e);
11167                 return 1;
11168         }
11169
11170         /*
11171          * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
11172          * while handling a VMX instruction KVM could've handled the request
11173          * correctly by exiting to userspace and performing I/O but there
11174          * doesn't seem to be a real use-case behind such requests, just return
11175          * KVM_EXIT_INTERNAL_ERROR for now.
11176          */
11177         vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
11178         vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
11179         vcpu->run->internal.ndata = 0;
11180
11181         return 0;
11182 }
11183 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure);
11184
11185 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva)
11186 {
11187         bool pcid_enabled;
11188         struct x86_exception e;
11189         unsigned i;
11190         unsigned long roots_to_free = 0;
11191         struct {
11192                 u64 pcid;
11193                 u64 gla;
11194         } operand;
11195         int r;
11196
11197         r = kvm_read_guest_virt(vcpu, gva, &operand, sizeof(operand), &e);
11198         if (r != X86EMUL_CONTINUE)
11199                 return kvm_handle_memory_failure(vcpu, r, &e);
11200
11201         if (operand.pcid >> 12 != 0) {
11202                 kvm_inject_gp(vcpu, 0);
11203                 return 1;
11204         }
11205
11206         pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
11207
11208         switch (type) {
11209         case INVPCID_TYPE_INDIV_ADDR:
11210                 if ((!pcid_enabled && (operand.pcid != 0)) ||
11211                     is_noncanonical_address(operand.gla, vcpu)) {
11212                         kvm_inject_gp(vcpu, 0);
11213                         return 1;
11214                 }
11215                 kvm_mmu_invpcid_gva(vcpu, operand.gla, operand.pcid);
11216                 return kvm_skip_emulated_instruction(vcpu);
11217
11218         case INVPCID_TYPE_SINGLE_CTXT:
11219                 if (!pcid_enabled && (operand.pcid != 0)) {
11220                         kvm_inject_gp(vcpu, 0);
11221                         return 1;
11222                 }
11223
11224                 if (kvm_get_active_pcid(vcpu) == operand.pcid) {
11225                         kvm_mmu_sync_roots(vcpu);
11226                         kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
11227                 }
11228
11229                 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
11230                         if (kvm_get_pcid(vcpu, vcpu->arch.mmu->prev_roots[i].pgd)
11231                             == operand.pcid)
11232                                 roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
11233
11234                 kvm_mmu_free_roots(vcpu, vcpu->arch.mmu, roots_to_free);
11235                 /*
11236                  * If neither the current cr3 nor any of the prev_roots use the
11237                  * given PCID, then nothing needs to be done here because a
11238                  * resync will happen anyway before switching to any other CR3.
11239                  */
11240
11241                 return kvm_skip_emulated_instruction(vcpu);
11242
11243         case INVPCID_TYPE_ALL_NON_GLOBAL:
11244                 /*
11245                  * Currently, KVM doesn't mark global entries in the shadow
11246                  * page tables, so a non-global flush just degenerates to a
11247                  * global flush. If needed, we could optimize this later by
11248                  * keeping track of global entries in shadow page tables.
11249                  */
11250
11251                 fallthrough;
11252         case INVPCID_TYPE_ALL_INCL_GLOBAL:
11253                 kvm_mmu_unload(vcpu);
11254                 return kvm_skip_emulated_instruction(vcpu);
11255
11256         default:
11257                 BUG(); /* We have already checked above that type <= 3 */
11258         }
11259 }
11260 EXPORT_SYMBOL_GPL(kvm_handle_invpcid);
11261
11262 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
11263 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
11264 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
11265 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
11266 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
11267 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
11268 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
11269 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
11270 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
11271 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
11272 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
11273 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
11274 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
11275 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
11276 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
11277 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
11278 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
11279 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
11280 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
11281 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);
11282 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log);
11283 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request);