arch/x86/kvm/x86.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * derived from drivers/kvm/kvm_main.c
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  * Copyright (C) 2008 Qumranet, Inc.
   9  * Copyright IBM Corporation, 2008
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *   Yaniv Kamay  <yaniv@qumranet.com>
  15  *   Amit Shah    <amit.shah@qumranet.com>
  16  *   Ben-Ami Yassour <benami@il.ibm.com>
  17  */
  18
  19 #include <linux/kvm_host.h>
  20 #include "irq.h"
  21 #include "ioapic.h"
  22 #include "mmu.h"
  23 #include "i8254.h"
  24 #include "tss.h"
  25 #include "kvm_cache_regs.h"
  26 #include "kvm_emulate.h"
  27 #include "x86.h"
  28 #include "cpuid.h"
  29 #include "pmu.h"
  30 #include "hyperv.h"
  31 #include "lapic.h"
  32 #include "xen.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/export.h>
  40 #include <linux/moduleparam.h>
  41 #include <linux/mman.h>
  42 #include <linux/highmem.h>
  43 #include <linux/iommu.h>
  44 #include <linux/intel-iommu.h>
  45 #include <linux/cpufreq.h>
  46 #include <linux/user-return-notifier.h>
  47 #include <linux/srcu.h>
  48 #include <linux/slab.h>
  49 #include <linux/perf_event.h>
  50 #include <linux/uaccess.h>
  51 #include <linux/hash.h>
  52 #include <linux/pci.h>
  53 #include <linux/timekeeper_internal.h>
  54 #include <linux/pvclock_gtod.h>
  55 #include <linux/kvm_irqfd.h>
  56 #include <linux/irqbypass.h>
  57 #include <linux/sched/stat.h>
  58 #include <linux/sched/isolation.h>
  59 #include <linux/mem_encrypt.h>
  60 #include <linux/entry-kvm.h>
  61 #include <linux/suspend.h>
  62
  63 #include <trace/events/kvm.h>
  64
  65 #include <asm/debugreg.h>
  66 #include <asm/msr.h>
  67 #include <asm/desc.h>
  68 #include <asm/mce.h>
  69 #include <asm/pkru.h>
  70 #include <linux/kernel_stat.h>
  71 #include <asm/fpu/internal.h> /* Ugh! */
  72 #include <asm/pvclock.h>
  73 #include <asm/div64.h>
  74 #include <asm/irq_remapping.h>
  75 #include <asm/mshyperv.h>
  76 #include <asm/hypervisor.h>
  77 #include <asm/tlbflush.h>
  78 #include <asm/intel_pt.h>
  79 #include <asm/emulate_prefix.h>
  80 #include <asm/sgx.h>
  81 #include <clocksource/hyperv_timer.h>
  82
  83 #define CREATE_TRACE_POINTS
  84 #include "trace.h"
  85
  86 #define MAX_IO_MSRS 256
  87 #define KVM_MAX_MCE_BANKS 32
  88 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  89 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  90
  91 #define emul_to_vcpu(ctxt) \
  92         ((struct kvm_vcpu *)(ctxt)->vcpu)
  93
  94 /* EFER defaults:
  95  * - enable syscall per default because its emulated by KVM
  96  * - enable LME and LMA per default on 64 bit KVM
  97  */
  98 #ifdef CONFIG_X86_64
  99 static
 100 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
 101 #else
 102 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
 103 #endif
 104
 105 static u64 __read_mostly cr4_reserved_bits = CR4_RESERVED_BITS;
 106
 107 #define KVM_EXIT_HYPERCALL_VALID_MASK (1 << KVM_HC_MAP_GPA_RANGE)
 108
 109 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
 110                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 111
 112 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 113 static void process_nmi(struct kvm_vcpu *vcpu);
 114 static void process_smi(struct kvm_vcpu *vcpu);
 115 static void enter_smm(struct kvm_vcpu *vcpu);
 116 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 117 static void store_regs(struct kvm_vcpu *vcpu);
 118 static int sync_regs(struct kvm_vcpu *vcpu);
 119
 120 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
 121 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
 122
 123 struct kvm_x86_ops kvm_x86_ops __read_mostly;
 124 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 125
 126 #define KVM_X86_OP(func)                                             \
 127         DEFINE_STATIC_CALL_NULL(kvm_x86_##func,                      \
 128                                 *(((struct kvm_x86_ops *)0)->func));
 129 #define KVM_X86_OP_NULL KVM_X86_OP
 130 #include <asm/kvm-x86-ops.h>
 131 EXPORT_STATIC_CALL_GPL(kvm_x86_get_cs_db_l_bits);
 132 EXPORT_STATIC_CALL_GPL(kvm_x86_cache_reg);
 133 EXPORT_STATIC_CALL_GPL(kvm_x86_tlb_flush_current);
 134
 135 static bool __read_mostly ignore_msrs = 0;
 136 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 137
 138 bool __read_mostly report_ignored_msrs = true;
 139 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 140 EXPORT_SYMBOL_GPL(report_ignored_msrs);
 141
 142 unsigned int min_timer_period_us = 200;
 143 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 144
 145 static bool __read_mostly kvmclock_periodic_sync = true;
 146 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 147
 148 bool __read_mostly kvm_has_tsc_control;
 149 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 150 u32  __read_mostly kvm_max_guest_tsc_khz;
 151 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 152 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 153 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 154 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 155 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 156 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 157 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 158 bool __read_mostly kvm_has_bus_lock_exit;
 159 EXPORT_SYMBOL_GPL(kvm_has_bus_lock_exit);
 160
 161 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 162 static u32 __read_mostly tsc_tolerance_ppm = 250;
 163 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 164
 165 /*
 166  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 167  * adaptive tuning starting from default advancement of 1000ns.  '0' disables
 168  * advancement entirely.  Any other value is used as-is and disables adaptive
 169  * tuning, i.e. allows privileged userspace to set an exact advancement time.
 170  */
 171 static int __read_mostly lapic_timer_advance_ns = -1;
 172 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 173
 174 static bool __read_mostly vector_hashing = true;
 175 module_param(vector_hashing, bool, S_IRUGO);
 176
 177 bool __read_mostly enable_vmware_backdoor = false;
 178 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 179 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 180
 181 static bool __read_mostly force_emulation_prefix = false;
 182 module_param(force_emulation_prefix, bool, S_IRUGO);
 183
 184 int __read_mostly pi_inject_timer = -1;
 185 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
 186
 187 /*
 188  * Restoring the host value for MSRs that are only consumed when running in
 189  * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
 190  * returns to userspace, i.e. the kernel can run with the guest's value.
 191  */
 192 #define KVM_MAX_NR_USER_RETURN_MSRS 16
 193
 194 struct kvm_user_return_msrs {
 195         struct user_return_notifier urn;
 196         bool registered;
 197         struct kvm_user_return_msr_values {
 198                 u64 host;
 199                 u64 curr;
 200         } values[KVM_MAX_NR_USER_RETURN_MSRS];
 201 };
 202
 203 u32 __read_mostly kvm_nr_uret_msrs;
 204 EXPORT_SYMBOL_GPL(kvm_nr_uret_msrs);
 205 static u32 __read_mostly kvm_uret_msrs_list[KVM_MAX_NR_USER_RETURN_MSRS];
 206 static struct kvm_user_return_msrs __percpu *user_return_msrs;
 207
 208 #define KVM_SUPPORTED_XCR0     (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
 209                                 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
 210                                 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
 211                                 | XFEATURE_MASK_PKRU)
 212
 213 u64 __read_mostly host_efer;
 214 EXPORT_SYMBOL_GPL(host_efer);
 215
 216 bool __read_mostly allow_smaller_maxphyaddr = 0;
 217 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr);
 218
 219 bool __read_mostly enable_apicv = true;
 220 EXPORT_SYMBOL_GPL(enable_apicv);
 221
 222 u64 __read_mostly host_xss;
 223 EXPORT_SYMBOL_GPL(host_xss);
 224 u64 __read_mostly supported_xss;
 225 EXPORT_SYMBOL_GPL(supported_xss);
 226
 227 const struct _kvm_stats_desc kvm_vm_stats_desc[] = {
 228         KVM_GENERIC_VM_STATS(),
 229         STATS_DESC_COUNTER(VM, mmu_shadow_zapped),
 230         STATS_DESC_COUNTER(VM, mmu_pte_write),
 231         STATS_DESC_COUNTER(VM, mmu_pde_zapped),
 232         STATS_DESC_COUNTER(VM, mmu_flooded),
 233         STATS_DESC_COUNTER(VM, mmu_recycled),
 234         STATS_DESC_COUNTER(VM, mmu_cache_miss),
 235         STATS_DESC_ICOUNTER(VM, mmu_unsync),
 236         STATS_DESC_ICOUNTER(VM, lpages),
 237         STATS_DESC_ICOUNTER(VM, nx_lpage_splits),
 238         STATS_DESC_PCOUNTER(VM, max_mmu_rmap_size),
 239         STATS_DESC_PCOUNTER(VM, max_mmu_page_hash_collisions)
 240 };
 241
 242 const struct kvm_stats_header kvm_vm_stats_header = {
 243         .name_size = KVM_STATS_NAME_SIZE,
 244         .num_desc = ARRAY_SIZE(kvm_vm_stats_desc),
 245         .id_offset = sizeof(struct kvm_stats_header),
 246         .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
 247         .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
 248                        sizeof(kvm_vm_stats_desc),
 249 };
 250
 251 const struct _kvm_stats_desc kvm_vcpu_stats_desc[] = {
 252         KVM_GENERIC_VCPU_STATS(),
 253         STATS_DESC_COUNTER(VCPU, pf_fixed),
 254         STATS_DESC_COUNTER(VCPU, pf_guest),
 255         STATS_DESC_COUNTER(VCPU, tlb_flush),
 256         STATS_DESC_COUNTER(VCPU, invlpg),
 257         STATS_DESC_COUNTER(VCPU, exits),
 258         STATS_DESC_COUNTER(VCPU, io_exits),
 259         STATS_DESC_COUNTER(VCPU, mmio_exits),
 260         STATS_DESC_COUNTER(VCPU, signal_exits),
 261         STATS_DESC_COUNTER(VCPU, irq_window_exits),
 262         STATS_DESC_COUNTER(VCPU, nmi_window_exits),
 263         STATS_DESC_COUNTER(VCPU, l1d_flush),
 264         STATS_DESC_COUNTER(VCPU, halt_exits),
 265         STATS_DESC_COUNTER(VCPU, request_irq_exits),
 266         STATS_DESC_COUNTER(VCPU, irq_exits),
 267         STATS_DESC_COUNTER(VCPU, host_state_reload),
 268         STATS_DESC_COUNTER(VCPU, fpu_reload),
 269         STATS_DESC_COUNTER(VCPU, insn_emulation),
 270         STATS_DESC_COUNTER(VCPU, insn_emulation_fail),
 271         STATS_DESC_COUNTER(VCPU, hypercalls),
 272         STATS_DESC_COUNTER(VCPU, irq_injections),
 273         STATS_DESC_COUNTER(VCPU, nmi_injections),
 274         STATS_DESC_COUNTER(VCPU, req_event),
 275         STATS_DESC_COUNTER(VCPU, nested_run),
 276         STATS_DESC_COUNTER(VCPU, directed_yield_attempted),
 277         STATS_DESC_COUNTER(VCPU, directed_yield_successful),
 278         STATS_DESC_ICOUNTER(VCPU, guest_mode)
 279 };
 280
 281 const struct kvm_stats_header kvm_vcpu_stats_header = {
 282         .name_size = KVM_STATS_NAME_SIZE,
 283         .num_desc = ARRAY_SIZE(kvm_vcpu_stats_desc),
 284         .id_offset = sizeof(struct kvm_stats_header),
 285         .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
 286         .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
 287                        sizeof(kvm_vcpu_stats_desc),
 288 };
 289
 290 u64 __read_mostly host_xcr0;
 291 u64 __read_mostly supported_xcr0;
 292 EXPORT_SYMBOL_GPL(supported_xcr0);
 293
 294 static struct kmem_cache *x86_fpu_cache;
 295
 296 static struct kmem_cache *x86_emulator_cache;
 297
 298 /*
 299  * When called, it means the previous get/set msr reached an invalid msr.
 300  * Return true if we want to ignore/silent this failed msr access.
 301  */
 302 static bool kvm_msr_ignored_check(u32 msr, u64 data, bool write)
 303 {
 304         const char *op = write ? "wrmsr" : "rdmsr";
 305
 306         if (ignore_msrs) {
 307                 if (report_ignored_msrs)
 308                         kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
 309                                       op, msr, data);
 310                 /* Mask the error */
 311                 return true;
 312         } else {
 313                 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
 314                                       op, msr, data);
 315                 return false;
 316         }
 317 }
 318
 319 static struct kmem_cache *kvm_alloc_emulator_cache(void)
 320 {
 321         unsigned int useroffset = offsetof(struct x86_emulate_ctxt, src);
 322         unsigned int size = sizeof(struct x86_emulate_ctxt);
 323
 324         return kmem_cache_create_usercopy("x86_emulator", size,
 325                                           __alignof__(struct x86_emulate_ctxt),
 326                                           SLAB_ACCOUNT, useroffset,
 327                                           size - useroffset, NULL);
 328 }
 329
 330 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 331
 332 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 333 {
 334         int i;
 335         for (i = 0; i < ASYNC_PF_PER_VCPU; i++)
 336                 vcpu->arch.apf.gfns[i] = ~0;
 337 }
 338
 339 static void kvm_on_user_return(struct user_return_notifier *urn)
 340 {
 341         unsigned slot;
 342         struct kvm_user_return_msrs *msrs
 343                 = container_of(urn, struct kvm_user_return_msrs, urn);
 344         struct kvm_user_return_msr_values *values;
 345         unsigned long flags;
 346
 347         /*
 348          * Disabling irqs at this point since the following code could be
 349          * interrupted and executed through kvm_arch_hardware_disable()
 350          */
 351         local_irq_save(flags);
 352         if (msrs->registered) {
 353                 msrs->registered = false;
 354                 user_return_notifier_unregister(urn);
 355         }
 356         local_irq_restore(flags);
 357         for (slot = 0; slot < kvm_nr_uret_msrs; ++slot) {
 358                 values = &msrs->values[slot];
 359                 if (values->host != values->curr) {
 360                         wrmsrl(kvm_uret_msrs_list[slot], values->host);
 361                         values->curr = values->host;
 362                 }
 363         }
 364 }
 365
 366 static int kvm_probe_user_return_msr(u32 msr)
 367 {
 368         u64 val;
 369         int ret;
 370
 371         preempt_disable();
 372         ret = rdmsrl_safe(msr, &val);
 373         if (ret)
 374                 goto out;
 375         ret = wrmsrl_safe(msr, val);
 376 out:
 377         preempt_enable();
 378         return ret;
 379 }
 380
 381 int kvm_add_user_return_msr(u32 msr)
 382 {
 383         BUG_ON(kvm_nr_uret_msrs >= KVM_MAX_NR_USER_RETURN_MSRS);
 384
 385         if (kvm_probe_user_return_msr(msr))
 386                 return -1;
 387
 388         kvm_uret_msrs_list[kvm_nr_uret_msrs] = msr;
 389         return kvm_nr_uret_msrs++;
 390 }
 391 EXPORT_SYMBOL_GPL(kvm_add_user_return_msr);
 392
 393 int kvm_find_user_return_msr(u32 msr)
 394 {
 395         int i;
 396
 397         for (i = 0; i < kvm_nr_uret_msrs; ++i) {
 398                 if (kvm_uret_msrs_list[i] == msr)
 399                         return i;
 400         }
 401         return -1;
 402 }
 403 EXPORT_SYMBOL_GPL(kvm_find_user_return_msr);
 404
 405 static void kvm_user_return_msr_cpu_online(void)
 406 {
 407         unsigned int cpu = smp_processor_id();
 408         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 409         u64 value;
 410         int i;
 411
 412         for (i = 0; i < kvm_nr_uret_msrs; ++i) {
 413                 rdmsrl_safe(kvm_uret_msrs_list[i], &value);
 414                 msrs->values[i].host = value;
 415                 msrs->values[i].curr = value;
 416         }
 417 }
 418
 419 int kvm_set_user_return_msr(unsigned slot, u64 value, u64 mask)
 420 {
 421         unsigned int cpu = smp_processor_id();
 422         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 423         int err;
 424
 425         value = (value & mask) | (msrs->values[slot].host & ~mask);
 426         if (value == msrs->values[slot].curr)
 427                 return 0;
 428         err = wrmsrl_safe(kvm_uret_msrs_list[slot], value);
 429         if (err)
 430                 return 1;
 431
 432         msrs->values[slot].curr = value;
 433         if (!msrs->registered) {
 434                 msrs->urn.on_user_return = kvm_on_user_return;
 435                 user_return_notifier_register(&msrs->urn);
 436                 msrs->registered = true;
 437         }
 438         return 0;
 439 }
 440 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr);
 441
 442 static void drop_user_return_notifiers(void)
 443 {
 444         unsigned int cpu = smp_processor_id();
 445         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 446
 447         if (msrs->registered)
 448                 kvm_on_user_return(&msrs->urn);
 449 }
 450
 451 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 452 {
 453         return vcpu->arch.apic_base;
 454 }
 455 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 456
 457 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 458 {
 459         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 460 }
 461 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 462
 463 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 464 {
 465         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 466         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 467         u64 reserved_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu) | 0x2ff |
 468                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 469
 470         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 471                 return 1;
 472         if (!msr_info->host_initiated) {
 473                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 474                         return 1;
 475                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 476                         return 1;
 477         }
 478
 479         kvm_lapic_set_base(vcpu, msr_info->data);
 480         kvm_recalculate_apic_map(vcpu->kvm);
 481         return 0;
 482 }
 483 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 484
 485 /*
 486  * Handle a fault on a hardware virtualization (VMX or SVM) instruction.
 487  *
 488  * Hardware virtualization extension instructions may fault if a reboot turns
 489  * off virtualization while processes are running.  Usually after catching the
 490  * fault we just panic; during reboot instead the instruction is ignored.
 491  */
 492 noinstr void kvm_spurious_fault(void)
 493 {
 494         /* Fault while not rebooting.  We want the trace. */
 495         BUG_ON(!kvm_rebooting);
 496 }
 497 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 498
 499 #define EXCPT_BENIGN            0
 500 #define EXCPT_CONTRIBUTORY      1
 501 #define EXCPT_PF                2
 502
 503 static int exception_class(int vector)
 504 {
 505         switch (vector) {
 506         case PF_VECTOR:
 507                 return EXCPT_PF;
 508         case DE_VECTOR:
 509         case TS_VECTOR:
 510         case NP_VECTOR:
 511         case SS_VECTOR:
 512         case GP_VECTOR:
 513                 return EXCPT_CONTRIBUTORY;
 514         default:
 515                 break;
 516         }
 517         return EXCPT_BENIGN;
 518 }
 519
 520 #define EXCPT_FAULT             0
 521 #define EXCPT_TRAP              1
 522 #define EXCPT_ABORT             2
 523 #define EXCPT_INTERRUPT         3
 524
 525 static int exception_type(int vector)
 526 {
 527         unsigned int mask;
 528
 529         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 530                 return EXCPT_INTERRUPT;
 531
 532         mask = 1 << vector;
 533
 534         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 535         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 536                 return EXCPT_TRAP;
 537
 538         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 539                 return EXCPT_ABORT;
 540
 541         /* Reserved exceptions will result in fault */
 542         return EXCPT_FAULT;
 543 }
 544
 545 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 546 {
 547         unsigned nr = vcpu->arch.exception.nr;
 548         bool has_payload = vcpu->arch.exception.has_payload;
 549         unsigned long payload = vcpu->arch.exception.payload;
 550
 551         if (!has_payload)
 552                 return;
 553
 554         switch (nr) {
 555         case DB_VECTOR:
 556                 /*
 557                  * "Certain debug exceptions may clear bit 0-3.  The
 558                  * remaining contents of the DR6 register are never
 559                  * cleared by the processor".
 560                  */
 561                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 562                 /*
 563                  * In order to reflect the #DB exception payload in guest
 564                  * dr6, three components need to be considered: active low
 565                  * bit, FIXED_1 bits and active high bits (e.g. DR6_BD,
 566                  * DR6_BS and DR6_BT)
 567                  * DR6_ACTIVE_LOW contains the FIXED_1 and active low bits.
 568                  * In the target guest dr6:
 569                  * FIXED_1 bits should always be set.
 570                  * Active low bits should be cleared if 1-setting in payload.
 571                  * Active high bits should be set if 1-setting in payload.
 572                  *
 573                  * Note, the payload is compatible with the pending debug
 574                  * exceptions/exit qualification under VMX, that active_low bits
 575                  * are active high in payload.
 576                  * So they need to be flipped for DR6.
 577                  */
 578                 vcpu->arch.dr6 |= DR6_ACTIVE_LOW;
 579                 vcpu->arch.dr6 |= payload;
 580                 vcpu->arch.dr6 ^= payload & DR6_ACTIVE_LOW;
 581
 582                 /*
 583                  * The #DB payload is defined as compatible with the 'pending
 584                  * debug exceptions' field under VMX, not DR6. While bit 12 is
 585                  * defined in the 'pending debug exceptions' field (enabled
 586                  * breakpoint), it is reserved and must be zero in DR6.
 587                  */
 588                 vcpu->arch.dr6 &= ~BIT(12);
 589                 break;
 590         case PF_VECTOR:
 591                 vcpu->arch.cr2 = payload;
 592                 break;
 593         }
 594
 595         vcpu->arch.exception.has_payload = false;
 596         vcpu->arch.exception.payload = 0;
 597 }
 598 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 599
 600 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 601                 unsigned nr, bool has_error, u32 error_code,
 602                 bool has_payload, unsigned long payload, bool reinject)
 603 {
 604         u32 prev_nr;
 605         int class1, class2;
 606
 607         kvm_make_request(KVM_REQ_EVENT, vcpu);
 608
 609         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 610         queue:
 611                 if (reinject) {
 612                         /*
 613                          * On vmentry, vcpu->arch.exception.pending is only
 614                          * true if an event injection was blocked by
 615                          * nested_run_pending.  In that case, however,
 616                          * vcpu_enter_guest requests an immediate exit,
 617                          * and the guest shouldn't proceed far enough to
 618                          * need reinjection.
 619                          */
 620                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 621                         vcpu->arch.exception.injected = true;
 622                         if (WARN_ON_ONCE(has_payload)) {
 623                                 /*
 624                                  * A reinjected event has already
 625                                  * delivered its payload.
 626                                  */
 627                                 has_payload = false;
 628                                 payload = 0;
 629                         }
 630                 } else {
 631                         vcpu->arch.exception.pending = true;
 632                         vcpu->arch.exception.injected = false;
 633                 }
 634                 vcpu->arch.exception.has_error_code = has_error;
 635                 vcpu->arch.exception.nr = nr;
 636                 vcpu->arch.exception.error_code = error_code;
 637                 vcpu->arch.exception.has_payload = has_payload;
 638                 vcpu->arch.exception.payload = payload;
 639                 if (!is_guest_mode(vcpu))
 640                         kvm_deliver_exception_payload(vcpu);
 641                 return;
 642         }
 643
 644         /* to check exception */
 645         prev_nr = vcpu->arch.exception.nr;
 646         if (prev_nr == DF_VECTOR) {
 647                 /* triple fault -> shutdown */
 648                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 649                 return;
 650         }
 651         class1 = exception_class(prev_nr);
 652         class2 = exception_class(nr);
 653         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 654                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 655                 /*
 656                  * Generate double fault per SDM Table 5-5.  Set
 657                  * exception.pending = true so that the double fault
 658                  * can trigger a nested vmexit.
 659                  */
 660                 vcpu->arch.exception.pending = true;
 661                 vcpu->arch.exception.injected = false;
 662                 vcpu->arch.exception.has_error_code = true;
 663                 vcpu->arch.exception.nr = DF_VECTOR;
 664                 vcpu->arch.exception.error_code = 0;
 665                 vcpu->arch.exception.has_payload = false;
 666                 vcpu->arch.exception.payload = 0;
 667         } else
 668                 /* replace previous exception with a new one in a hope
 669                    that instruction re-execution will regenerate lost
 670                    exception */
 671                 goto queue;
 672 }
 673
 674 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 675 {
 676         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 677 }
 678 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 679
 680 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 681 {
 682         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 683 }
 684 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 685
 686 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 687                            unsigned long payload)
 688 {
 689         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 690 }
 691 EXPORT_SYMBOL_GPL(kvm_queue_exception_p);
 692
 693 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 694                                     u32 error_code, unsigned long payload)
 695 {
 696         kvm_multiple_exception(vcpu, nr, true, error_code,
 697                                true, payload, false);
 698 }
 699
 700 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 701 {
 702         if (err)
 703                 kvm_inject_gp(vcpu, 0);
 704         else
 705                 return kvm_skip_emulated_instruction(vcpu);
 706
 707         return 1;
 708 }
 709 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 710
 711 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 712 {
 713         ++vcpu->stat.pf_guest;
 714         vcpu->arch.exception.nested_apf =
 715                 is_guest_mode(vcpu) && fault->async_page_fault;
 716         if (vcpu->arch.exception.nested_apf) {
 717                 vcpu->arch.apf.nested_apf_token = fault->address;
 718                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 719         } else {
 720                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 721                                         fault->address);
 722         }
 723 }
 724 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 725
 726 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
 727                                     struct x86_exception *fault)
 728 {
 729         struct kvm_mmu *fault_mmu;
 730         WARN_ON_ONCE(fault->vector != PF_VECTOR);
 731
 732         fault_mmu = fault->nested_page_fault ? vcpu->arch.mmu :
 733                                                vcpu->arch.walk_mmu;
 734
 735         /*
 736          * Invalidate the TLB entry for the faulting address, if it exists,
 737          * else the access will fault indefinitely (and to emulate hardware).
 738          */
 739         if ((fault->error_code & PFERR_PRESENT_MASK) &&
 740             !(fault->error_code & PFERR_RSVD_MASK))
 741                 kvm_mmu_invalidate_gva(vcpu, fault_mmu, fault->address,
 742                                        fault_mmu->root_hpa);
 743
 744         fault_mmu->inject_page_fault(vcpu, fault);
 745         return fault->nested_page_fault;
 746 }
 747 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault);
 748
 749 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 750 {
 751         atomic_inc(&vcpu->arch.nmi_queued);
 752         kvm_make_request(KVM_REQ_NMI, vcpu);
 753 }
 754 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 755
 756 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 757 {
 758         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 759 }
 760 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 761
 762 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 763 {
 764         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 765 }
 766 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 767
 768 /*
 769  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 770  * a #GP and return false.
 771  */
 772 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 773 {
 774         if (static_call(kvm_x86_get_cpl)(vcpu) <= required_cpl)
 775                 return true;
 776         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 777         return false;
 778 }
 779 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 780
 781 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 782 {
 783         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 784                 return true;
 785
 786         kvm_queue_exception(vcpu, UD_VECTOR);
 787         return false;
 788 }
 789 EXPORT_SYMBOL_GPL(kvm_require_dr);
 790
 791 /*
 792  * This function will be used to read from the physical memory of the currently
 793  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 794  * can read from guest physical or from the guest's guest physical memory.
 795  */
 796 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 797                             gfn_t ngfn, void *data, int offset, int len,
 798                             u32 access)
 799 {
 800         struct x86_exception exception;
 801         gfn_t real_gfn;
 802         gpa_t ngpa;
 803
 804         ngpa     = gfn_to_gpa(ngfn);
 805         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 806         if (real_gfn == UNMAPPED_GVA)
 807                 return -EFAULT;
 808
 809         real_gfn = gpa_to_gfn(real_gfn);
 810
 811         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 812 }
 813 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 814
 815 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
 816 {
 817         return vcpu->arch.reserved_gpa_bits | rsvd_bits(5, 8) | rsvd_bits(1, 2);
 818 }
 819
 820 /*
 821  * Load the pae pdptrs.  Return 1 if they are all valid, 0 otherwise.
 822  */
 823 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 824 {
 825         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 826         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 827         int i;
 828         int ret;
 829         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 830
 831         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 832                                       offset * sizeof(u64), sizeof(pdpte),
 833                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 834         if (ret < 0) {
 835                 ret = 0;
 836                 goto out;
 837         }
 838         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 839                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 840                     (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
 841                         ret = 0;
 842                         goto out;
 843                 }
 844         }
 845         ret = 1;
 846
 847         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 848         kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
 849         vcpu->arch.pdptrs_from_userspace = false;
 850
 851 out:
 852
 853         return ret;
 854 }
 855 EXPORT_SYMBOL_GPL(load_pdptrs);
 856
 857 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0)
 858 {
 859         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 860                 kvm_clear_async_pf_completion_queue(vcpu);
 861                 kvm_async_pf_hash_reset(vcpu);
 862         }
 863
 864         if ((cr0 ^ old_cr0) & KVM_MMU_CR0_ROLE_BITS)
 865                 kvm_mmu_reset_context(vcpu);
 866
 867         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 868             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 869             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 870                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 871 }
 872 EXPORT_SYMBOL_GPL(kvm_post_set_cr0);
 873
 874 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 875 {
 876         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 877         unsigned long pdptr_bits = X86_CR0_CD | X86_CR0_NW | X86_CR0_PG;
 878
 879         cr0 |= X86_CR0_ET;
 880
 881 #ifdef CONFIG_X86_64
 882         if (cr0 & 0xffffffff00000000UL)
 883                 return 1;
 884 #endif
 885
 886         cr0 &= ~CR0_RESERVED_BITS;
 887
 888         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 889                 return 1;
 890
 891         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 892                 return 1;
 893
 894 #ifdef CONFIG_X86_64
 895         if ((vcpu->arch.efer & EFER_LME) && !is_paging(vcpu) &&
 896             (cr0 & X86_CR0_PG)) {
 897                 int cs_db, cs_l;
 898
 899                 if (!is_pae(vcpu))
 900                         return 1;
 901                 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
 902                 if (cs_l)
 903                         return 1;
 904         }
 905 #endif
 906         if (!(vcpu->arch.efer & EFER_LME) && (cr0 & X86_CR0_PG) &&
 907             is_pae(vcpu) && ((cr0 ^ old_cr0) & pdptr_bits) &&
 908             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu)))
 909                 return 1;
 910
 911         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 912                 return 1;
 913
 914         static_call(kvm_x86_set_cr0)(vcpu, cr0);
 915
 916         kvm_post_set_cr0(vcpu, old_cr0, cr0);
 917
 918         return 0;
 919 }
 920 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 921
 922 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 923 {
 924         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 925 }
 926 EXPORT_SYMBOL_GPL(kvm_lmsw);
 927
 928 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu)
 929 {
 930         if (vcpu->arch.guest_state_protected)
 931                 return;
 932
 933         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 934
 935                 if (vcpu->arch.xcr0 != host_xcr0)
 936                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 937
 938                 if (vcpu->arch.xsaves_enabled &&
 939                     vcpu->arch.ia32_xss != host_xss)
 940                         wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss);
 941         }
 942
 943         if (static_cpu_has(X86_FEATURE_PKU) &&
 944             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 945              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU)) &&
 946             vcpu->arch.pkru != vcpu->arch.host_pkru)
 947                 write_pkru(vcpu->arch.pkru);
 948 }
 949 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);
 950
 951 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)
 952 {
 953         if (vcpu->arch.guest_state_protected)
 954                 return;
 955
 956         if (static_cpu_has(X86_FEATURE_PKU) &&
 957             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 958              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU))) {
 959                 vcpu->arch.pkru = rdpkru();
 960                 if (vcpu->arch.pkru != vcpu->arch.host_pkru)
 961                         write_pkru(vcpu->arch.host_pkru);
 962         }
 963
 964         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 965
 966                 if (vcpu->arch.xcr0 != host_xcr0)
 967                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 968
 969                 if (vcpu->arch.xsaves_enabled &&
 970                     vcpu->arch.ia32_xss != host_xss)
 971                         wrmsrl(MSR_IA32_XSS, host_xss);
 972         }
 973
 974 }
 975 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state);
 976
 977 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 978 {
 979         u64 xcr0 = xcr;
 980         u64 old_xcr0 = vcpu->arch.xcr0;
 981         u64 valid_bits;
 982
 983         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 984         if (index != XCR_XFEATURE_ENABLED_MASK)
 985                 return 1;
 986         if (!(xcr0 & XFEATURE_MASK_FP))
 987                 return 1;
 988         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 989                 return 1;
 990
 991         /*
 992          * Do not allow the guest to set bits that we do not support
 993          * saving.  However, xcr0 bit 0 is always set, even if the
 994          * emulated CPU does not support XSAVE (see fx_init).
 995          */
 996         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 997         if (xcr0 & ~valid_bits)
 998                 return 1;
 999
1000         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
1001             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
1002                 return 1;
1003
1004         if (xcr0 & XFEATURE_MASK_AVX512) {
1005                 if (!(xcr0 & XFEATURE_MASK_YMM))
1006                         return 1;
1007                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
1008                         return 1;
1009         }
1010         vcpu->arch.xcr0 = xcr0;
1011
1012         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
1013                 kvm_update_cpuid_runtime(vcpu);
1014         return 0;
1015 }
1016
1017 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu)
1018 {
1019         if (static_call(kvm_x86_get_cpl)(vcpu) != 0 ||
1020             __kvm_set_xcr(vcpu, kvm_rcx_read(vcpu), kvm_read_edx_eax(vcpu))) {
1021                 kvm_inject_gp(vcpu, 0);
1022                 return 1;
1023         }
1024
1025         return kvm_skip_emulated_instruction(vcpu);
1026 }
1027 EXPORT_SYMBOL_GPL(kvm_emulate_xsetbv);
1028
1029 bool kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1030 {
1031         if (cr4 & cr4_reserved_bits)
1032                 return false;
1033
1034         if (cr4 & vcpu->arch.cr4_guest_rsvd_bits)
1035                 return false;
1036
1037         return static_call(kvm_x86_is_valid_cr4)(vcpu, cr4);
1038 }
1039 EXPORT_SYMBOL_GPL(kvm_is_valid_cr4);
1040
1041 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4)
1042 {
1043         if (((cr4 ^ old_cr4) & KVM_MMU_CR4_ROLE_BITS) ||
1044             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
1045                 kvm_mmu_reset_context(vcpu);
1046 }
1047 EXPORT_SYMBOL_GPL(kvm_post_set_cr4);
1048
1049 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1050 {
1051         unsigned long old_cr4 = kvm_read_cr4(vcpu);
1052         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
1053                                    X86_CR4_SMEP;
1054
1055         if (!kvm_is_valid_cr4(vcpu, cr4))
1056                 return 1;
1057
1058         if (is_long_mode(vcpu)) {
1059                 if (!(cr4 & X86_CR4_PAE))
1060                         return 1;
1061                 if ((cr4 ^ old_cr4) & X86_CR4_LA57)
1062                         return 1;
1063         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
1064                    && ((cr4 ^ old_cr4) & pdptr_bits)
1065                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
1066                                    kvm_read_cr3(vcpu)))
1067                 return 1;
1068
1069         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
1070                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
1071                         return 1;
1072
1073                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1074                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
1075                         return 1;
1076         }
1077
1078         static_call(kvm_x86_set_cr4)(vcpu, cr4);
1079
1080         kvm_post_set_cr4(vcpu, old_cr4, cr4);
1081
1082         return 0;
1083 }
1084 EXPORT_SYMBOL_GPL(kvm_set_cr4);
1085
1086 static void kvm_invalidate_pcid(struct kvm_vcpu *vcpu, unsigned long pcid)
1087 {
1088         struct kvm_mmu *mmu = vcpu->arch.mmu;
1089         unsigned long roots_to_free = 0;
1090         int i;
1091
1092         /*
1093          * If neither the current CR3 nor any of the prev_roots use the given
1094          * PCID, then nothing needs to be done here because a resync will
1095          * happen anyway before switching to any other CR3.
1096          */
1097         if (kvm_get_active_pcid(vcpu) == pcid) {
1098                 kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
1099                 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1100         }
1101
1102         for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
1103                 if (kvm_get_pcid(vcpu, mmu->prev_roots[i].pgd) == pcid)
1104                         roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
1105
1106         kvm_mmu_free_roots(vcpu, mmu, roots_to_free);
1107 }
1108
1109 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1110 {
1111         bool skip_tlb_flush = false;
1112         unsigned long pcid = 0;
1113 #ifdef CONFIG_X86_64
1114         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
1115
1116         if (pcid_enabled) {
1117                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
1118                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
1119                 pcid = cr3 & X86_CR3_PCID_MASK;
1120         }
1121 #endif
1122
1123         /* PDPTRs are always reloaded for PAE paging. */
1124         if (cr3 == kvm_read_cr3(vcpu) && !is_pae_paging(vcpu))
1125                 goto handle_tlb_flush;
1126
1127         /*
1128          * Do not condition the GPA check on long mode, this helper is used to
1129          * stuff CR3, e.g. for RSM emulation, and there is no guarantee that
1130          * the current vCPU mode is accurate.
1131          */
1132         if (kvm_vcpu_is_illegal_gpa(vcpu, cr3))
1133                 return 1;
1134
1135         if (is_pae_paging(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
1136                 return 1;
1137
1138         if (cr3 != kvm_read_cr3(vcpu))
1139                 kvm_mmu_new_pgd(vcpu, cr3);
1140
1141         vcpu->arch.cr3 = cr3;
1142         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
1143
1144 handle_tlb_flush:
1145         /*
1146          * A load of CR3 that flushes the TLB flushes only the current PCID,
1147          * even if PCID is disabled, in which case PCID=0 is flushed.  It's a
1148          * moot point in the end because _disabling_ PCID will flush all PCIDs,
1149          * and it's impossible to use a non-zero PCID when PCID is disabled,
1150          * i.e. only PCID=0 can be relevant.
1151          */
1152         if (!skip_tlb_flush)
1153                 kvm_invalidate_pcid(vcpu, pcid);
1154
1155         return 0;
1156 }
1157 EXPORT_SYMBOL_GPL(kvm_set_cr3);
1158
1159 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
1160 {
1161         if (cr8 & CR8_RESERVED_BITS)
1162                 return 1;
1163         if (lapic_in_kernel(vcpu))
1164                 kvm_lapic_set_tpr(vcpu, cr8);
1165         else
1166                 vcpu->arch.cr8 = cr8;
1167         return 0;
1168 }
1169 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1170
1171 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1172 {
1173         if (lapic_in_kernel(vcpu))
1174                 return kvm_lapic_get_cr8(vcpu);
1175         else
1176                 return vcpu->arch.cr8;
1177 }
1178 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1179
1180 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1181 {
1182         int i;
1183
1184         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1185                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1186                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1187         }
1188 }
1189
1190 void kvm_update_dr7(struct kvm_vcpu *vcpu)
1191 {
1192         unsigned long dr7;
1193
1194         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1195                 dr7 = vcpu->arch.guest_debug_dr7;
1196         else
1197                 dr7 = vcpu->arch.dr7;
1198         static_call(kvm_x86_set_dr7)(vcpu, dr7);
1199         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1200         if (dr7 & DR7_BP_EN_MASK)
1201                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1202 }
1203 EXPORT_SYMBOL_GPL(kvm_update_dr7);
1204
1205 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1206 {
1207         u64 fixed = DR6_FIXED_1;
1208
1209         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1210                 fixed |= DR6_RTM;
1211
1212         if (!guest_cpuid_has(vcpu, X86_FEATURE_BUS_LOCK_DETECT))
1213                 fixed |= DR6_BUS_LOCK;
1214         return fixed;
1215 }
1216
1217 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1218 {
1219         size_t size = ARRAY_SIZE(vcpu->arch.db);
1220
1221         switch (dr) {
1222         case 0 ... 3:
1223                 vcpu->arch.db[array_index_nospec(dr, size)] = val;
1224                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1225                         vcpu->arch.eff_db[dr] = val;
1226                 break;
1227         case 4:
1228         case 6:
1229                 if (!kvm_dr6_valid(val))
1230                         return 1; /* #GP */
1231                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1232                 break;
1233         case 5:
1234         default: /* 7 */
1235                 if (!kvm_dr7_valid(val))
1236                         return 1; /* #GP */
1237                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1238                 kvm_update_dr7(vcpu);
1239                 break;
1240         }
1241
1242         return 0;
1243 }
1244 EXPORT_SYMBOL_GPL(kvm_set_dr);
1245
1246 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1247 {
1248         size_t size = ARRAY_SIZE(vcpu->arch.db);
1249
1250         switch (dr) {
1251         case 0 ... 3:
1252                 *val = vcpu->arch.db[array_index_nospec(dr, size)];
1253                 break;
1254         case 4:
1255         case 6:
1256                 *val = vcpu->arch.dr6;
1257                 break;
1258         case 5:
1259         default: /* 7 */
1260                 *val = vcpu->arch.dr7;
1261                 break;
1262         }
1263 }
1264 EXPORT_SYMBOL_GPL(kvm_get_dr);
1265
1266 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu)
1267 {
1268         u32 ecx = kvm_rcx_read(vcpu);
1269         u64 data;
1270
1271         if (kvm_pmu_rdpmc(vcpu, ecx, &data)) {
1272                 kvm_inject_gp(vcpu, 0);
1273                 return 1;
1274         }
1275
1276         kvm_rax_write(vcpu, (u32)data);
1277         kvm_rdx_write(vcpu, data >> 32);
1278         return kvm_skip_emulated_instruction(vcpu);
1279 }
1280 EXPORT_SYMBOL_GPL(kvm_emulate_rdpmc);
1281
1282 /*
1283  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1284  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1285  *
1286  * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1287  * extract the supported MSRs from the related const lists.
1288  * msrs_to_save is selected from the msrs_to_save_all to reflect the
1289  * capabilities of the host cpu. This capabilities test skips MSRs that are
1290  * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1291  * may depend on host virtualization features rather than host cpu features.
1292  */
1293
1294 static const u32 msrs_to_save_all[] = {
1295         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1296         MSR_STAR,
1297 #ifdef CONFIG_X86_64
1298         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1299 #endif
1300         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1301         MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1302         MSR_IA32_SPEC_CTRL,
1303         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1304         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1305         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1306         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1307         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1308         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1309         MSR_IA32_UMWAIT_CONTROL,
1310
1311         MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1312         MSR_ARCH_PERFMON_FIXED_CTR0 + 2, MSR_ARCH_PERFMON_FIXED_CTR0 + 3,
1313         MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1314         MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1315         MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1316         MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1317         MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1318         MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1319         MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1320         MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1321         MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1322         MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1323         MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1324         MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1325         MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1326         MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1327         MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1328         MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1329         MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1330         MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1331         MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1332         MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1333 };
1334
1335 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
1336 static unsigned num_msrs_to_save;
1337
1338 static const u32 emulated_msrs_all[] = {
1339         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1340         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1341         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1342         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1343         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1344         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1345         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1346         HV_X64_MSR_RESET,
1347         HV_X64_MSR_VP_INDEX,
1348         HV_X64_MSR_VP_RUNTIME,
1349         HV_X64_MSR_SCONTROL,
1350         HV_X64_MSR_STIMER0_CONFIG,
1351         HV_X64_MSR_VP_ASSIST_PAGE,
1352         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1353         HV_X64_MSR_TSC_EMULATION_STATUS,
1354         HV_X64_MSR_SYNDBG_OPTIONS,
1355         HV_X64_MSR_SYNDBG_CONTROL, HV_X64_MSR_SYNDBG_STATUS,
1356         HV_X64_MSR_SYNDBG_SEND_BUFFER, HV_X64_MSR_SYNDBG_RECV_BUFFER,
1357         HV_X64_MSR_SYNDBG_PENDING_BUFFER,
1358
1359         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1360         MSR_KVM_PV_EOI_EN, MSR_KVM_ASYNC_PF_INT, MSR_KVM_ASYNC_PF_ACK,
1361
1362         MSR_IA32_TSC_ADJUST,
1363         MSR_IA32_TSC_DEADLINE,
1364         MSR_IA32_ARCH_CAPABILITIES,
1365         MSR_IA32_PERF_CAPABILITIES,
1366         MSR_IA32_MISC_ENABLE,
1367         MSR_IA32_MCG_STATUS,
1368         MSR_IA32_MCG_CTL,
1369         MSR_IA32_MCG_EXT_CTL,
1370         MSR_IA32_SMBASE,
1371         MSR_SMI_COUNT,
1372         MSR_PLATFORM_INFO,
1373         MSR_MISC_FEATURES_ENABLES,
1374         MSR_AMD64_VIRT_SPEC_CTRL,
1375         MSR_IA32_POWER_CTL,
1376         MSR_IA32_UCODE_REV,
1377
1378         /*
1379          * The following list leaves out MSRs whose values are determined
1380          * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1381          * We always support the "true" VMX control MSRs, even if the host
1382          * processor does not, so I am putting these registers here rather
1383          * than in msrs_to_save_all.
1384          */
1385         MSR_IA32_VMX_BASIC,
1386         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1387         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1388         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1389         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1390         MSR_IA32_VMX_MISC,
1391         MSR_IA32_VMX_CR0_FIXED0,
1392         MSR_IA32_VMX_CR4_FIXED0,
1393         MSR_IA32_VMX_VMCS_ENUM,
1394         MSR_IA32_VMX_PROCBASED_CTLS2,
1395         MSR_IA32_VMX_EPT_VPID_CAP,
1396         MSR_IA32_VMX_VMFUNC,
1397
1398         MSR_K7_HWCR,
1399         MSR_KVM_POLL_CONTROL,
1400 };
1401
1402 static u32 emulated_msrs[ARRAY_SIZE(emulated_msrs_all)];
1403 static unsigned num_emulated_msrs;
1404
1405 /*
1406  * List of msr numbers which are used to expose MSR-based features that
1407  * can be used by a hypervisor to validate requested CPU features.
1408  */
1409 static const u32 msr_based_features_all[] = {
1410         MSR_IA32_VMX_BASIC,
1411         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1412         MSR_IA32_VMX_PINBASED_CTLS,
1413         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1414         MSR_IA32_VMX_PROCBASED_CTLS,
1415         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1416         MSR_IA32_VMX_EXIT_CTLS,
1417         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1418         MSR_IA32_VMX_ENTRY_CTLS,
1419         MSR_IA32_VMX_MISC,
1420         MSR_IA32_VMX_CR0_FIXED0,
1421         MSR_IA32_VMX_CR0_FIXED1,
1422         MSR_IA32_VMX_CR4_FIXED0,
1423         MSR_IA32_VMX_CR4_FIXED1,
1424         MSR_IA32_VMX_VMCS_ENUM,
1425         MSR_IA32_VMX_PROCBASED_CTLS2,
1426         MSR_IA32_VMX_EPT_VPID_CAP,
1427         MSR_IA32_VMX_VMFUNC,
1428
1429         MSR_F10H_DECFG,
1430         MSR_IA32_UCODE_REV,
1431         MSR_IA32_ARCH_CAPABILITIES,
1432         MSR_IA32_PERF_CAPABILITIES,
1433 };
1434
1435 static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all)];
1436 static unsigned int num_msr_based_features;
1437
1438 static u64 kvm_get_arch_capabilities(void)
1439 {
1440         u64 data = 0;
1441
1442         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1443                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1444
1445         /*
1446          * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1447          * the nested hypervisor runs with NX huge pages.  If it is not,
1448          * L1 is anyway vulnerable to ITLB_MULTIHIT exploits from other
1449          * L1 guests, so it need not worry about its own (L2) guests.
1450          */
1451         data |= ARCH_CAP_PSCHANGE_MC_NO;
1452
1453         /*
1454          * If we're doing cache flushes (either "always" or "cond")
1455          * we will do one whenever the guest does a vmlaunch/vmresume.
1456          * If an outer hypervisor is doing the cache flush for us
1457          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1458          * capability to the guest too, and if EPT is disabled we're not
1459          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1460          * require a nested hypervisor to do a flush of its own.
1461          */
1462         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1463                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1464
1465         if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1466                 data |= ARCH_CAP_RDCL_NO;
1467         if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1468                 data |= ARCH_CAP_SSB_NO;
1469         if (!boot_cpu_has_bug(X86_BUG_MDS))
1470                 data |= ARCH_CAP_MDS_NO;
1471
1472         if (!boot_cpu_has(X86_FEATURE_RTM)) {
1473                 /*
1474                  * If RTM=0 because the kernel has disabled TSX, the host might
1475                  * have TAA_NO or TSX_CTRL.  Clear TAA_NO (the guest sees RTM=0
1476                  * and therefore knows that there cannot be TAA) but keep
1477                  * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1478                  * and we want to allow migrating those guests to tsx=off hosts.
1479                  */
1480                 data &= ~ARCH_CAP_TAA_NO;
1481         } else if (!boot_cpu_has_bug(X86_BUG_TAA)) {
1482                 data |= ARCH_CAP_TAA_NO;
1483         } else {
1484                 /*
1485                  * Nothing to do here; we emulate TSX_CTRL if present on the
1486                  * host so the guest can choose between disabling TSX or
1487                  * using VERW to clear CPU buffers.
1488                  */
1489         }
1490
1491         return data;
1492 }
1493
1494 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1495 {
1496         switch (msr->index) {
1497         case MSR_IA32_ARCH_CAPABILITIES:
1498                 msr->data = kvm_get_arch_capabilities();
1499                 break;
1500         case MSR_IA32_UCODE_REV:
1501                 rdmsrl_safe(msr->index, &msr->data);
1502                 break;
1503         default:
1504                 return static_call(kvm_x86_get_msr_feature)(msr);
1505         }
1506         return 0;
1507 }
1508
1509 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1510 {
1511         struct kvm_msr_entry msr;
1512         int r;
1513
1514         msr.index = index;
1515         r = kvm_get_msr_feature(&msr);
1516
1517         if (r == KVM_MSR_RET_INVALID) {
1518                 /* Unconditionally clear the output for simplicity */
1519                 *data = 0;
1520                 if (kvm_msr_ignored_check(index, 0, false))
1521                         r = 0;
1522         }
1523
1524         if (r)
1525                 return r;
1526
1527         *data = msr.data;
1528
1529         return 0;
1530 }
1531
1532 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1533 {
1534         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1535                 return false;
1536
1537         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1538                 return false;
1539
1540         if (efer & (EFER_LME | EFER_LMA) &&
1541             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1542                 return false;
1543
1544         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1545                 return false;
1546
1547         return true;
1548
1549 }
1550 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1551 {
1552         if (efer & efer_reserved_bits)
1553                 return false;
1554
1555         return __kvm_valid_efer(vcpu, efer);
1556 }
1557 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1558
1559 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1560 {
1561         u64 old_efer = vcpu->arch.efer;
1562         u64 efer = msr_info->data;
1563         int r;
1564
1565         if (efer & efer_reserved_bits)
1566                 return 1;
1567
1568         if (!msr_info->host_initiated) {
1569                 if (!__kvm_valid_efer(vcpu, efer))
1570                         return 1;
1571
1572                 if (is_paging(vcpu) &&
1573                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1574                         return 1;
1575         }
1576
1577         efer &= ~EFER_LMA;
1578         efer |= vcpu->arch.efer & EFER_LMA;
1579
1580         r = static_call(kvm_x86_set_efer)(vcpu, efer);
1581         if (r) {
1582                 WARN_ON(r > 0);
1583                 return r;
1584         }
1585
1586         /* Update reserved bits */
1587         if ((efer ^ old_efer) & EFER_NX)
1588                 kvm_mmu_reset_context(vcpu);
1589
1590         return 0;
1591 }
1592
1593 void kvm_enable_efer_bits(u64 mask)
1594 {
1595        efer_reserved_bits &= ~mask;
1596 }
1597 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1598
1599 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type)
1600 {
1601         struct kvm_x86_msr_filter *msr_filter;
1602         struct msr_bitmap_range *ranges;
1603         struct kvm *kvm = vcpu->kvm;
1604         bool allowed;
1605         int idx;
1606         u32 i;
1607
1608         /* x2APIC MSRs do not support filtering. */
1609         if (index >= 0x800 && index <= 0x8ff)
1610                 return true;
1611
1612         idx = srcu_read_lock(&kvm->srcu);
1613
1614         msr_filter = srcu_dereference(kvm->arch.msr_filter, &kvm->srcu);
1615         if (!msr_filter) {
1616                 allowed = true;
1617                 goto out;
1618         }
1619
1620         allowed = msr_filter->default_allow;
1621         ranges = msr_filter->ranges;
1622
1623         for (i = 0; i < msr_filter->count; i++) {
1624                 u32 start = ranges[i].base;
1625                 u32 end = start + ranges[i].nmsrs;
1626                 u32 flags = ranges[i].flags;
1627                 unsigned long *bitmap = ranges[i].bitmap;
1628
1629                 if ((index >= start) && (index < end) && (flags & type)) {
1630                         allowed = !!test_bit(index - start, bitmap);
1631                         break;
1632                 }
1633         }
1634
1635 out:
1636         srcu_read_unlock(&kvm->srcu, idx);
1637
1638         return allowed;
1639 }
1640 EXPORT_SYMBOL_GPL(kvm_msr_allowed);
1641
1642 /*
1643  * Write @data into the MSR specified by @index.  Select MSR specific fault
1644  * checks are bypassed if @host_initiated is %true.
1645  * Returns 0 on success, non-0 otherwise.
1646  * Assumes vcpu_load() was already called.
1647  */
1648 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1649                          bool host_initiated)
1650 {
1651         struct msr_data msr;
1652
1653         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_WRITE))
1654                 return KVM_MSR_RET_FILTERED;
1655
1656         switch (index) {
1657         case MSR_FS_BASE:
1658         case MSR_GS_BASE:
1659         case MSR_KERNEL_GS_BASE:
1660         case MSR_CSTAR:
1661         case MSR_LSTAR:
1662                 if (is_noncanonical_address(data, vcpu))
1663                         return 1;
1664                 break;
1665         case MSR_IA32_SYSENTER_EIP:
1666         case MSR_IA32_SYSENTER_ESP:
1667                 /*
1668                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1669                  * non-canonical address is written on Intel but not on
1670                  * AMD (which ignores the top 32-bits, because it does
1671                  * not implement 64-bit SYSENTER).
1672                  *
1673                  * 64-bit code should hence be able to write a non-canonical
1674                  * value on AMD.  Making the address canonical ensures that
1675                  * vmentry does not fail on Intel after writing a non-canonical
1676                  * value, and that something deterministic happens if the guest
1677                  * invokes 64-bit SYSENTER.
1678                  */
1679                 data = get_canonical(data, vcpu_virt_addr_bits(vcpu));
1680                 break;
1681         case MSR_TSC_AUX:
1682                 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1683                         return 1;
1684
1685                 if (!host_initiated &&
1686                     !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1687                     !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1688                         return 1;
1689
1690                 /*
1691                  * Per Intel's SDM, bits 63:32 are reserved, but AMD's APM has
1692                  * incomplete and conflicting architectural behavior.  Current
1693                  * AMD CPUs completely ignore bits 63:32, i.e. they aren't
1694                  * reserved and always read as zeros.  Enforce Intel's reserved
1695                  * bits check if and only if the guest CPU is Intel, and clear
1696                  * the bits in all other cases.  This ensures cross-vendor
1697                  * migration will provide consistent behavior for the guest.
1698                  */
1699                 if (guest_cpuid_is_intel(vcpu) && (data >> 32) != 0)
1700                         return 1;
1701
1702                 data = (u32)data;
1703                 break;
1704         }
1705
1706         msr.data = data;
1707         msr.index = index;
1708         msr.host_initiated = host_initiated;
1709
1710         return static_call(kvm_x86_set_msr)(vcpu, &msr);
1711 }
1712
1713 static int kvm_set_msr_ignored_check(struct kvm_vcpu *vcpu,
1714                                      u32 index, u64 data, bool host_initiated)
1715 {
1716         int ret = __kvm_set_msr(vcpu, index, data, host_initiated);
1717
1718         if (ret == KVM_MSR_RET_INVALID)
1719                 if (kvm_msr_ignored_check(index, data, true))
1720                         ret = 0;
1721
1722         return ret;
1723 }
1724
1725 /*
1726  * Read the MSR specified by @index into @data.  Select MSR specific fault
1727  * checks are bypassed if @host_initiated is %true.
1728  * Returns 0 on success, non-0 otherwise.
1729  * Assumes vcpu_load() was already called.
1730  */
1731 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1732                   bool host_initiated)
1733 {
1734         struct msr_data msr;
1735         int ret;
1736
1737         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_READ))
1738                 return KVM_MSR_RET_FILTERED;
1739
1740         switch (index) {
1741         case MSR_TSC_AUX:
1742                 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1743                         return 1;
1744
1745                 if (!host_initiated &&
1746                     !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1747                     !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1748                         return 1;
1749                 break;
1750         }
1751
1752         msr.index = index;
1753         msr.host_initiated = host_initiated;
1754
1755         ret = static_call(kvm_x86_get_msr)(vcpu, &msr);
1756         if (!ret)
1757                 *data = msr.data;
1758         return ret;
1759 }
1760
1761 static int kvm_get_msr_ignored_check(struct kvm_vcpu *vcpu,
1762                                      u32 index, u64 *data, bool host_initiated)
1763 {
1764         int ret = __kvm_get_msr(vcpu, index, data, host_initiated);
1765
1766         if (ret == KVM_MSR_RET_INVALID) {
1767                 /* Unconditionally clear *data for simplicity */
1768                 *data = 0;
1769                 if (kvm_msr_ignored_check(index, 0, false))
1770                         ret = 0;
1771         }
1772
1773         return ret;
1774 }
1775
1776 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1777 {
1778         return kvm_get_msr_ignored_check(vcpu, index, data, false);
1779 }
1780 EXPORT_SYMBOL_GPL(kvm_get_msr);
1781
1782 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1783 {
1784         return kvm_set_msr_ignored_check(vcpu, index, data, false);
1785 }
1786 EXPORT_SYMBOL_GPL(kvm_set_msr);
1787
1788 static int complete_emulated_rdmsr(struct kvm_vcpu *vcpu)
1789 {
1790         int err = vcpu->run->msr.error;
1791         if (!err) {
1792                 kvm_rax_write(vcpu, (u32)vcpu->run->msr.data);
1793                 kvm_rdx_write(vcpu, vcpu->run->msr.data >> 32);
1794         }
1795
1796         return static_call(kvm_x86_complete_emulated_msr)(vcpu, err);
1797 }
1798
1799 static int complete_emulated_wrmsr(struct kvm_vcpu *vcpu)
1800 {
1801         return static_call(kvm_x86_complete_emulated_msr)(vcpu, vcpu->run->msr.error);
1802 }
1803
1804 static u64 kvm_msr_reason(int r)
1805 {
1806         switch (r) {
1807         case KVM_MSR_RET_INVALID:
1808                 return KVM_MSR_EXIT_REASON_UNKNOWN;
1809         case KVM_MSR_RET_FILTERED:
1810                 return KVM_MSR_EXIT_REASON_FILTER;
1811         default:
1812                 return KVM_MSR_EXIT_REASON_INVAL;
1813         }
1814 }
1815
1816 static int kvm_msr_user_space(struct kvm_vcpu *vcpu, u32 index,
1817                               u32 exit_reason, u64 data,
1818                               int (*completion)(struct kvm_vcpu *vcpu),
1819                               int r)
1820 {
1821         u64 msr_reason = kvm_msr_reason(r);
1822
1823         /* Check if the user wanted to know about this MSR fault */
1824         if (!(vcpu->kvm->arch.user_space_msr_mask & msr_reason))
1825                 return 0;
1826
1827         vcpu->run->exit_reason = exit_reason;
1828         vcpu->run->msr.error = 0;
1829         memset(vcpu->run->msr.pad, 0, sizeof(vcpu->run->msr.pad));
1830         vcpu->run->msr.reason = msr_reason;
1831         vcpu->run->msr.index = index;
1832         vcpu->run->msr.data = data;
1833         vcpu->arch.complete_userspace_io = completion;
1834
1835         return 1;
1836 }
1837
1838 static int kvm_get_msr_user_space(struct kvm_vcpu *vcpu, u32 index, int r)
1839 {
1840         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_RDMSR, 0,
1841                                    complete_emulated_rdmsr, r);
1842 }
1843
1844 static int kvm_set_msr_user_space(struct kvm_vcpu *vcpu, u32 index, u64 data, int r)
1845 {
1846         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_WRMSR, data,
1847                                    complete_emulated_wrmsr, r);
1848 }
1849
1850 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1851 {
1852         u32 ecx = kvm_rcx_read(vcpu);
1853         u64 data;
1854         int r;
1855
1856         r = kvm_get_msr(vcpu, ecx, &data);
1857
1858         /* MSR read failed? See if we should ask user space */
1859         if (r && kvm_get_msr_user_space(vcpu, ecx, r)) {
1860                 /* Bounce to user space */
1861                 return 0;
1862         }
1863
1864         if (!r) {
1865                 trace_kvm_msr_read(ecx, data);
1866
1867                 kvm_rax_write(vcpu, data & -1u);
1868                 kvm_rdx_write(vcpu, (data >> 32) & -1u);
1869         } else {
1870                 trace_kvm_msr_read_ex(ecx);
1871         }
1872
1873         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1874 }
1875 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
1876
1877 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
1878 {
1879         u32 ecx = kvm_rcx_read(vcpu);
1880         u64 data = kvm_read_edx_eax(vcpu);
1881         int r;
1882
1883         r = kvm_set_msr(vcpu, ecx, data);
1884
1885         /* MSR write failed? See if we should ask user space */
1886         if (r && kvm_set_msr_user_space(vcpu, ecx, data, r))
1887                 /* Bounce to user space */
1888                 return 0;
1889
1890         /* Signal all other negative errors to userspace */
1891         if (r < 0)
1892                 return r;
1893
1894         if (!r)
1895                 trace_kvm_msr_write(ecx, data);
1896         else
1897                 trace_kvm_msr_write_ex(ecx, data);
1898
1899         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1900 }
1901 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
1902
1903 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu)
1904 {
1905         return kvm_skip_emulated_instruction(vcpu);
1906 }
1907 EXPORT_SYMBOL_GPL(kvm_emulate_as_nop);
1908
1909 int kvm_emulate_invd(struct kvm_vcpu *vcpu)
1910 {
1911         /* Treat an INVD instruction as a NOP and just skip it. */
1912         return kvm_emulate_as_nop(vcpu);
1913 }
1914 EXPORT_SYMBOL_GPL(kvm_emulate_invd);
1915
1916 int kvm_emulate_mwait(struct kvm_vcpu *vcpu)
1917 {
1918         pr_warn_once("kvm: MWAIT instruction emulated as NOP!\n");
1919         return kvm_emulate_as_nop(vcpu);
1920 }
1921 EXPORT_SYMBOL_GPL(kvm_emulate_mwait);
1922
1923 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu)
1924 {
1925         kvm_queue_exception(vcpu, UD_VECTOR);
1926         return 1;
1927 }
1928 EXPORT_SYMBOL_GPL(kvm_handle_invalid_op);
1929
1930 int kvm_emulate_monitor(struct kvm_vcpu *vcpu)
1931 {
1932         pr_warn_once("kvm: MONITOR instruction emulated as NOP!\n");
1933         return kvm_emulate_as_nop(vcpu);
1934 }
1935 EXPORT_SYMBOL_GPL(kvm_emulate_monitor);
1936
1937 static inline bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu)
1938 {
1939         xfer_to_guest_mode_prepare();
1940         return vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu) ||
1941                 xfer_to_guest_mode_work_pending();
1942 }
1943
1944 /*
1945  * The fast path for frequent and performance sensitive wrmsr emulation,
1946  * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
1947  * the latency of virtual IPI by avoiding the expensive bits of transitioning
1948  * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
1949  * other cases which must be called after interrupts are enabled on the host.
1950  */
1951 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data)
1952 {
1953         if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(vcpu->arch.apic))
1954                 return 1;
1955
1956         if (((data & APIC_SHORT_MASK) == APIC_DEST_NOSHORT) &&
1957                 ((data & APIC_DEST_MASK) == APIC_DEST_PHYSICAL) &&
1958                 ((data & APIC_MODE_MASK) == APIC_DM_FIXED) &&
1959                 ((u32)(data >> 32) != X2APIC_BROADCAST)) {
1960
1961                 data &= ~(1 << 12);
1962                 kvm_apic_send_ipi(vcpu->arch.apic, (u32)data, (u32)(data >> 32));
1963                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR2, (u32)(data >> 32));
1964                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR, (u32)data);
1965                 trace_kvm_apic_write(APIC_ICR, (u32)data);
1966                 return 0;
1967         }
1968
1969         return 1;
1970 }
1971
1972 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu *vcpu, u64 data)
1973 {
1974         if (!kvm_can_use_hv_timer(vcpu))
1975                 return 1;
1976
1977         kvm_set_lapic_tscdeadline_msr(vcpu, data);
1978         return 0;
1979 }
1980
1981 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
1982 {
1983         u32 msr = kvm_rcx_read(vcpu);
1984         u64 data;
1985         fastpath_t ret = EXIT_FASTPATH_NONE;
1986
1987         switch (msr) {
1988         case APIC_BASE_MSR + (APIC_ICR >> 4):
1989                 data = kvm_read_edx_eax(vcpu);
1990                 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu, data)) {
1991                         kvm_skip_emulated_instruction(vcpu);
1992                         ret = EXIT_FASTPATH_EXIT_HANDLED;
1993                 }
1994                 break;
1995         case MSR_IA32_TSC_DEADLINE:
1996                 data = kvm_read_edx_eax(vcpu);
1997                 if (!handle_fastpath_set_tscdeadline(vcpu, data)) {
1998                         kvm_skip_emulated_instruction(vcpu);
1999                         ret = EXIT_FASTPATH_REENTER_GUEST;
2000                 }
2001                 break;
2002         default:
2003                 break;
2004         }
2005
2006         if (ret != EXIT_FASTPATH_NONE)
2007                 trace_kvm_msr_write(msr, data);
2008
2009         return ret;
2010 }
2011 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff);
2012
2013 /*
2014  * Adapt set_msr() to msr_io()'s calling convention
2015  */
2016 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
2017 {
2018         return kvm_get_msr_ignored_check(vcpu, index, data, true);
2019 }
2020
2021 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
2022 {
2023         return kvm_set_msr_ignored_check(vcpu, index, *data, true);
2024 }
2025
2026 #ifdef CONFIG_X86_64
2027 struct pvclock_clock {
2028         int vclock_mode;
2029         u64 cycle_last;
2030         u64 mask;
2031         u32 mult;
2032         u32 shift;
2033         u64 base_cycles;
2034         u64 offset;
2035 };
2036
2037 struct pvclock_gtod_data {
2038         seqcount_t      seq;
2039
2040         struct pvclock_clock clock; /* extract of a clocksource struct */
2041         struct pvclock_clock raw_clock; /* extract of a clocksource struct */
2042
2043         ktime_t         offs_boot;
2044         u64             wall_time_sec;
2045 };
2046
2047 static struct pvclock_gtod_data pvclock_gtod_data;
2048
2049 static void update_pvclock_gtod(struct timekeeper *tk)
2050 {
2051         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
2052
2053         write_seqcount_begin(&vdata->seq);
2054
2055         /* copy pvclock gtod data */
2056         vdata->clock.vclock_mode        = tk->tkr_mono.clock->vdso_clock_mode;
2057         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
2058         vdata->clock.mask               = tk->tkr_mono.mask;
2059         vdata->clock.mult               = tk->tkr_mono.mult;
2060         vdata->clock.shift              = tk->tkr_mono.shift;
2061         vdata->clock.base_cycles        = tk->tkr_mono.xtime_nsec;
2062         vdata->clock.offset             = tk->tkr_mono.base;
2063
2064         vdata->raw_clock.vclock_mode    = tk->tkr_raw.clock->vdso_clock_mode;
2065         vdata->raw_clock.cycle_last     = tk->tkr_raw.cycle_last;
2066         vdata->raw_clock.mask           = tk->tkr_raw.mask;
2067         vdata->raw_clock.mult           = tk->tkr_raw.mult;
2068         vdata->raw_clock.shift          = tk->tkr_raw.shift;
2069         vdata->raw_clock.base_cycles    = tk->tkr_raw.xtime_nsec;
2070         vdata->raw_clock.offset         = tk->tkr_raw.base;
2071
2072         vdata->wall_time_sec            = tk->xtime_sec;
2073
2074         vdata->offs_boot                = tk->offs_boot;
2075
2076         write_seqcount_end(&vdata->seq);
2077 }
2078
2079 static s64 get_kvmclock_base_ns(void)
2080 {
2081         /* Count up from boot time, but with the frequency of the raw clock.  */
2082         return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data.offs_boot));
2083 }
2084 #else
2085 static s64 get_kvmclock_base_ns(void)
2086 {
2087         /* Master clock not used, so we can just use CLOCK_BOOTTIME.  */
2088         return ktime_get_boottime_ns();
2089 }
2090 #endif
2091
2092 void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock, int sec_hi_ofs)
2093 {
2094         int version;
2095         int r;
2096         struct pvclock_wall_clock wc;
2097         u32 wc_sec_hi;
2098         u64 wall_nsec;
2099
2100         if (!wall_clock)
2101                 return;
2102
2103         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
2104         if (r)
2105                 return;
2106
2107         if (version & 1)
2108                 ++version;  /* first time write, random junk */
2109
2110         ++version;
2111
2112         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
2113                 return;
2114
2115         /*
2116          * The guest calculates current wall clock time by adding
2117          * system time (updated by kvm_guest_time_update below) to the
2118          * wall clock specified here.  We do the reverse here.
2119          */
2120         wall_nsec = ktime_get_real_ns() - get_kvmclock_ns(kvm);
2121
2122         wc.nsec = do_div(wall_nsec, 1000000000);
2123         wc.sec = (u32)wall_nsec; /* overflow in 2106 guest time */
2124         wc.version = version;
2125
2126         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
2127
2128         if (sec_hi_ofs) {
2129                 wc_sec_hi = wall_nsec >> 32;
2130                 kvm_write_guest(kvm, wall_clock + sec_hi_ofs,
2131                                 &wc_sec_hi, sizeof(wc_sec_hi));
2132         }
2133
2134         version++;
2135         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
2136 }
2137
2138 static void kvm_write_system_time(struct kvm_vcpu *vcpu, gpa_t system_time,
2139                                   bool old_msr, bool host_initiated)
2140 {
2141         struct kvm_arch *ka = &vcpu->kvm->arch;
2142
2143         if (vcpu->vcpu_id == 0 && !host_initiated) {
2144                 if (ka->boot_vcpu_runs_old_kvmclock != old_msr)
2145                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2146
2147                 ka->boot_vcpu_runs_old_kvmclock = old_msr;
2148         }
2149
2150         vcpu->arch.time = system_time;
2151         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2152
2153         /* we verify if the enable bit is set... */
2154         vcpu->arch.pv_time_enabled = false;
2155         if (!(system_time & 1))
2156                 return;
2157
2158         if (!kvm_gfn_to_hva_cache_init(vcpu->kvm,
2159                                        &vcpu->arch.pv_time, system_time & ~1ULL,
2160                                        sizeof(struct pvclock_vcpu_time_info)))
2161                 vcpu->arch.pv_time_enabled = true;
2162
2163         return;
2164 }
2165
2166 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
2167 {
2168         do_shl32_div32(dividend, divisor);
2169         return dividend;
2170 }
2171
2172 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
2173                                s8 *pshift, u32 *pmultiplier)
2174 {
2175         uint64_t scaled64;
2176         int32_t  shift = 0;
2177         uint64_t tps64;
2178         uint32_t tps32;
2179
2180         tps64 = base_hz;
2181         scaled64 = scaled_hz;
2182         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
2183                 tps64 >>= 1;
2184                 shift--;
2185         }
2186
2187         tps32 = (uint32_t)tps64;
2188         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
2189                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
2190                         scaled64 >>= 1;
2191                 else
2192                         tps32 <<= 1;
2193                 shift++;
2194         }
2195
2196         *pshift = shift;
2197         *pmultiplier = div_frac(scaled64, tps32);
2198 }
2199
2200 #ifdef CONFIG_X86_64
2201 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
2202 #endif
2203
2204 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
2205 static unsigned long max_tsc_khz;
2206
2207 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
2208 {
2209         u64 v = (u64)khz * (1000000 + ppm);
2210         do_div(v, 1000000);
2211         return v;
2212 }
2213
2214 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier);
2215
2216 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
2217 {
2218         u64 ratio;
2219
2220         /* Guest TSC same frequency as host TSC? */
2221         if (!scale) {
2222                 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2223                 return 0;
2224         }
2225
2226         /* TSC scaling supported? */
2227         if (!kvm_has_tsc_control) {
2228                 if (user_tsc_khz > tsc_khz) {
2229                         vcpu->arch.tsc_catchup = 1;
2230                         vcpu->arch.tsc_always_catchup = 1;
2231                         return 0;
2232                 } else {
2233                         pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2234                         return -1;
2235                 }
2236         }
2237
2238         /* TSC scaling required  - calculate ratio */
2239         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
2240                                 user_tsc_khz, tsc_khz);
2241
2242         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
2243                 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2244                                     user_tsc_khz);
2245                 return -1;
2246         }
2247
2248         kvm_vcpu_write_tsc_multiplier(vcpu, ratio);
2249         return 0;
2250 }
2251
2252 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
2253 {
2254         u32 thresh_lo, thresh_hi;
2255         int use_scaling = 0;
2256
2257         /* tsc_khz can be zero if TSC calibration fails */
2258         if (user_tsc_khz == 0) {
2259                 /* set tsc_scaling_ratio to a safe value */
2260                 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2261                 return -1;
2262         }
2263
2264         /* Compute a scale to convert nanoseconds in TSC cycles */
2265         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
2266                            &vcpu->arch.virtual_tsc_shift,
2267                            &vcpu->arch.virtual_tsc_mult);
2268         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
2269
2270         /*
2271          * Compute the variation in TSC rate which is acceptable
2272          * within the range of tolerance and decide if the
2273          * rate being applied is within that bounds of the hardware
2274          * rate.  If so, no scaling or compensation need be done.
2275          */
2276         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
2277         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
2278         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
2279                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
2280                 use_scaling = 1;
2281         }
2282         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
2283 }
2284
2285 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
2286 {
2287         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
2288                                       vcpu->arch.virtual_tsc_mult,
2289                                       vcpu->arch.virtual_tsc_shift);
2290         tsc += vcpu->arch.this_tsc_write;
2291         return tsc;
2292 }
2293
2294 static inline int gtod_is_based_on_tsc(int mode)
2295 {
2296         return mode == VDSO_CLOCKMODE_TSC || mode == VDSO_CLOCKMODE_HVCLOCK;
2297 }
2298
2299 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
2300 {
2301 #ifdef CONFIG_X86_64
2302         bool vcpus_matched;
2303         struct kvm_arch *ka = &vcpu->kvm->arch;
2304         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2305
2306         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2307                          atomic_read(&vcpu->kvm->online_vcpus));
2308
2309         /*
2310          * Once the masterclock is enabled, always perform request in
2311          * order to update it.
2312          *
2313          * In order to enable masterclock, the host clocksource must be TSC
2314          * and the vcpus need to have matched TSCs.  When that happens,
2315          * perform request to enable masterclock.
2316          */
2317         if (ka->use_master_clock ||
2318             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
2319                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2320
2321         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
2322                             atomic_read(&vcpu->kvm->online_vcpus),
2323                             ka->use_master_clock, gtod->clock.vclock_mode);
2324 #endif
2325 }
2326
2327 /*
2328  * Multiply tsc by a fixed point number represented by ratio.
2329  *
2330  * The most significant 64-N bits (mult) of ratio represent the
2331  * integral part of the fixed point number; the remaining N bits
2332  * (frac) represent the fractional part, ie. ratio represents a fixed
2333  * point number (mult + frac * 2^(-N)).
2334  *
2335  * N equals to kvm_tsc_scaling_ratio_frac_bits.
2336  */
2337 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
2338 {
2339         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
2340 }
2341
2342 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc, u64 ratio)
2343 {
2344         u64 _tsc = tsc;
2345
2346         if (ratio != kvm_default_tsc_scaling_ratio)
2347                 _tsc = __scale_tsc(ratio, tsc);
2348
2349         return _tsc;
2350 }
2351 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
2352
2353 static u64 kvm_compute_l1_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
2354 {
2355         u64 tsc;
2356
2357         tsc = kvm_scale_tsc(vcpu, rdtsc(), vcpu->arch.l1_tsc_scaling_ratio);
2358
2359         return target_tsc - tsc;
2360 }
2361
2362 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
2363 {
2364         return vcpu->arch.l1_tsc_offset +
2365                 kvm_scale_tsc(vcpu, host_tsc, vcpu->arch.l1_tsc_scaling_ratio);
2366 }
2367 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
2368
2369 u64 kvm_calc_nested_tsc_offset(u64 l1_offset, u64 l2_offset, u64 l2_multiplier)
2370 {
2371         u64 nested_offset;
2372
2373         if (l2_multiplier == kvm_default_tsc_scaling_ratio)
2374                 nested_offset = l1_offset;
2375         else
2376                 nested_offset = mul_s64_u64_shr((s64) l1_offset, l2_multiplier,
2377                                                 kvm_tsc_scaling_ratio_frac_bits);
2378
2379         nested_offset += l2_offset;
2380         return nested_offset;
2381 }
2382 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_offset);
2383
2384 u64 kvm_calc_nested_tsc_multiplier(u64 l1_multiplier, u64 l2_multiplier)
2385 {
2386         if (l2_multiplier != kvm_default_tsc_scaling_ratio)
2387                 return mul_u64_u64_shr(l1_multiplier, l2_multiplier,
2388                                        kvm_tsc_scaling_ratio_frac_bits);
2389
2390         return l1_multiplier;
2391 }
2392 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_multiplier);
2393
2394 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 l1_offset)
2395 {
2396         trace_kvm_write_tsc_offset(vcpu->vcpu_id,
2397                                    vcpu->arch.l1_tsc_offset,
2398                                    l1_offset);
2399
2400         vcpu->arch.l1_tsc_offset = l1_offset;
2401
2402         /*
2403          * If we are here because L1 chose not to trap WRMSR to TSC then
2404          * according to the spec this should set L1's TSC (as opposed to
2405          * setting L1's offset for L2).
2406          */
2407         if (is_guest_mode(vcpu))
2408                 vcpu->arch.tsc_offset = kvm_calc_nested_tsc_offset(
2409                         l1_offset,
2410                         static_call(kvm_x86_get_l2_tsc_offset)(vcpu),
2411                         static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2412         else
2413                 vcpu->arch.tsc_offset = l1_offset;
2414
2415         static_call(kvm_x86_write_tsc_offset)(vcpu, vcpu->arch.tsc_offset);
2416 }
2417
2418 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier)
2419 {
2420         vcpu->arch.l1_tsc_scaling_ratio = l1_multiplier;
2421
2422         /* Userspace is changing the multiplier while L2 is active */
2423         if (is_guest_mode(vcpu))
2424                 vcpu->arch.tsc_scaling_ratio = kvm_calc_nested_tsc_multiplier(
2425                         l1_multiplier,
2426                         static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2427         else
2428                 vcpu->arch.tsc_scaling_ratio = l1_multiplier;
2429
2430         if (kvm_has_tsc_control)
2431                 static_call(kvm_x86_write_tsc_multiplier)(
2432                         vcpu, vcpu->arch.tsc_scaling_ratio);
2433 }
2434
2435 static inline bool kvm_check_tsc_unstable(void)
2436 {
2437 #ifdef CONFIG_X86_64
2438         /*
2439          * TSC is marked unstable when we're running on Hyper-V,
2440          * 'TSC page' clocksource is good.
2441          */
2442         if (pvclock_gtod_data.clock.vclock_mode == VDSO_CLOCKMODE_HVCLOCK)
2443                 return false;
2444 #endif
2445         return check_tsc_unstable();
2446 }
2447
2448 static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 data)
2449 {
2450         struct kvm *kvm = vcpu->kvm;
2451         u64 offset, ns, elapsed;
2452         unsigned long flags;
2453         bool matched;
2454         bool already_matched;
2455         bool synchronizing = false;
2456
2457         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
2458         offset = kvm_compute_l1_tsc_offset(vcpu, data);
2459         ns = get_kvmclock_base_ns();
2460         elapsed = ns - kvm->arch.last_tsc_nsec;
2461
2462         if (vcpu->arch.virtual_tsc_khz) {
2463                 if (data == 0) {
2464                         /*
2465                          * detection of vcpu initialization -- need to sync
2466                          * with other vCPUs. This particularly helps to keep
2467                          * kvm_clock stable after CPU hotplug
2468                          */
2469                         synchronizing = true;
2470                 } else {
2471                         u64 tsc_exp = kvm->arch.last_tsc_write +
2472                                                 nsec_to_cycles(vcpu, elapsed);
2473                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
2474                         /*
2475                          * Special case: TSC write with a small delta (1 second)
2476                          * of virtual cycle time against real time is
2477                          * interpreted as an attempt to synchronize the CPU.
2478                          */
2479                         synchronizing = data < tsc_exp + tsc_hz &&
2480                                         data + tsc_hz > tsc_exp;
2481                 }
2482         }
2483
2484         /*
2485          * For a reliable TSC, we can match TSC offsets, and for an unstable
2486          * TSC, we add elapsed time in this computation.  We could let the
2487          * compensation code attempt to catch up if we fall behind, but
2488          * it's better to try to match offsets from the beginning.
2489          */
2490         if (synchronizing &&
2491             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
2492                 if (!kvm_check_tsc_unstable()) {
2493                         offset = kvm->arch.cur_tsc_offset;
2494                 } else {
2495                         u64 delta = nsec_to_cycles(vcpu, elapsed);
2496                         data += delta;
2497                         offset = kvm_compute_l1_tsc_offset(vcpu, data);
2498                 }
2499                 matched = true;
2500                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
2501         } else {
2502                 /*
2503                  * We split periods of matched TSC writes into generations.
2504                  * For each generation, we track the original measured
2505                  * nanosecond time, offset, and write, so if TSCs are in
2506                  * sync, we can match exact offset, and if not, we can match
2507                  * exact software computation in compute_guest_tsc()
2508                  *
2509                  * These values are tracked in kvm->arch.cur_xxx variables.
2510                  */
2511                 kvm->arch.cur_tsc_generation++;
2512                 kvm->arch.cur_tsc_nsec = ns;
2513                 kvm->arch.cur_tsc_write = data;
2514                 kvm->arch.cur_tsc_offset = offset;
2515                 matched = false;
2516         }
2517
2518         /*
2519          * We also track th most recent recorded KHZ, write and time to
2520          * allow the matching interval to be extended at each write.
2521          */
2522         kvm->arch.last_tsc_nsec = ns;
2523         kvm->arch.last_tsc_write = data;
2524         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
2525
2526         vcpu->arch.last_guest_tsc = data;
2527
2528         /* Keep track of which generation this VCPU has synchronized to */
2529         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
2530         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
2531         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
2532
2533         kvm_vcpu_write_tsc_offset(vcpu, offset);
2534         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
2535
2536         spin_lock_irqsave(&kvm->arch.pvclock_gtod_sync_lock, flags);
2537         if (!matched) {
2538                 kvm->arch.nr_vcpus_matched_tsc = 0;
2539         } else if (!already_matched) {
2540                 kvm->arch.nr_vcpus_matched_tsc++;
2541         }
2542
2543         kvm_track_tsc_matching(vcpu);
2544         spin_unlock_irqrestore(&kvm->arch.pvclock_gtod_sync_lock, flags);
2545 }
2546
2547 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
2548                                            s64 adjustment)
2549 {
2550         u64 tsc_offset = vcpu->arch.l1_tsc_offset;
2551         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
2552 }
2553
2554 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
2555 {
2556         if (vcpu->arch.l1_tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
2557                 WARN_ON(adjustment < 0);
2558         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment,
2559                                    vcpu->arch.l1_tsc_scaling_ratio);
2560         adjust_tsc_offset_guest(vcpu, adjustment);
2561 }
2562
2563 #ifdef CONFIG_X86_64
2564
2565 static u64 read_tsc(void)
2566 {
2567         u64 ret = (u64)rdtsc_ordered();
2568         u64 last = pvclock_gtod_data.clock.cycle_last;
2569
2570         if (likely(ret >= last))
2571                 return ret;
2572
2573         /*
2574          * GCC likes to generate cmov here, but this branch is extremely
2575          * predictable (it's just a function of time and the likely is
2576          * very likely) and there's a data dependence, so force GCC
2577          * to generate a branch instead.  I don't barrier() because
2578          * we don't actually need a barrier, and if this function
2579          * ever gets inlined it will generate worse code.
2580          */
2581         asm volatile ("");
2582         return last;
2583 }
2584
2585 static inline u64 vgettsc(struct pvclock_clock *clock, u64 *tsc_timestamp,
2586                           int *mode)
2587 {
2588         long v;
2589         u64 tsc_pg_val;
2590
2591         switch (clock->vclock_mode) {
2592         case VDSO_CLOCKMODE_HVCLOCK:
2593                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2594                                                   tsc_timestamp);
2595                 if (tsc_pg_val != U64_MAX) {
2596                         /* TSC page valid */
2597                         *mode = VDSO_CLOCKMODE_HVCLOCK;
2598                         v = (tsc_pg_val - clock->cycle_last) &
2599                                 clock->mask;
2600                 } else {
2601                         /* TSC page invalid */
2602                         *mode = VDSO_CLOCKMODE_NONE;
2603                 }
2604                 break;
2605         case VDSO_CLOCKMODE_TSC:
2606                 *mode = VDSO_CLOCKMODE_TSC;
2607                 *tsc_timestamp = read_tsc();
2608                 v = (*tsc_timestamp - clock->cycle_last) &
2609                         clock->mask;
2610                 break;
2611         default:
2612                 *mode = VDSO_CLOCKMODE_NONE;
2613         }
2614
2615         if (*mode == VDSO_CLOCKMODE_NONE)
2616                 *tsc_timestamp = v = 0;
2617
2618         return v * clock->mult;
2619 }
2620
2621 static int do_monotonic_raw(s64 *t, u64 *tsc_timestamp)
2622 {
2623         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2624         unsigned long seq;
2625         int mode;
2626         u64 ns;
2627
2628         do {
2629                 seq = read_seqcount_begin(&gtod->seq);
2630                 ns = gtod->raw_clock.base_cycles;
2631                 ns += vgettsc(&gtod->raw_clock, tsc_timestamp, &mode);
2632                 ns >>= gtod->raw_clock.shift;
2633                 ns += ktime_to_ns(ktime_add(gtod->raw_clock.offset, gtod->offs_boot));
2634         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2635         *t = ns;
2636
2637         return mode;
2638 }
2639
2640 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2641 {
2642         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2643         unsigned long seq;
2644         int mode;
2645         u64 ns;
2646
2647         do {
2648                 seq = read_seqcount_begin(&gtod->seq);
2649                 ts->tv_sec = gtod->wall_time_sec;
2650                 ns = gtod->clock.base_cycles;
2651                 ns += vgettsc(&gtod->clock, tsc_timestamp, &mode);
2652                 ns >>= gtod->clock.shift;
2653         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2654
2655         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2656         ts->tv_nsec = ns;
2657
2658         return mode;
2659 }
2660
2661 /* returns true if host is using TSC based clocksource */
2662 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2663 {
2664         /* checked again under seqlock below */
2665         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2666                 return false;
2667
2668         return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns,
2669                                                       tsc_timestamp));
2670 }
2671
2672 /* returns true if host is using TSC based clocksource */
2673 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2674                                            u64 *tsc_timestamp)
2675 {
2676         /* checked again under seqlock below */
2677         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2678                 return false;
2679
2680         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2681 }
2682 #endif
2683
2684 /*
2685  *
2686  * Assuming a stable TSC across physical CPUS, and a stable TSC
2687  * across virtual CPUs, the following condition is possible.
2688  * Each numbered line represents an event visible to both
2689  * CPUs at the next numbered event.
2690  *
2691  * "timespecX" represents host monotonic time. "tscX" represents
2692  * RDTSC value.
2693  *
2694  *              VCPU0 on CPU0           |       VCPU1 on CPU1
2695  *
2696  * 1.  read timespec0,tsc0
2697  * 2.                                   | timespec1 = timespec0 + N
2698  *                                      | tsc1 = tsc0 + M
2699  * 3. transition to guest               | transition to guest
2700  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2701  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
2702  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2703  *
2704  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2705  *
2706  *      - ret0 < ret1
2707  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2708  *              ...
2709  *      - 0 < N - M => M < N
2710  *
2711  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2712  * always the case (the difference between two distinct xtime instances
2713  * might be smaller then the difference between corresponding TSC reads,
2714  * when updating guest vcpus pvclock areas).
2715  *
2716  * To avoid that problem, do not allow visibility of distinct
2717  * system_timestamp/tsc_timestamp values simultaneously: use a master
2718  * copy of host monotonic time values. Update that master copy
2719  * in lockstep.
2720  *
2721  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2722  *
2723  */
2724
2725 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2726 {
2727 #ifdef CONFIG_X86_64
2728         struct kvm_arch *ka = &kvm->arch;
2729         int vclock_mode;
2730         bool host_tsc_clocksource, vcpus_matched;
2731
2732         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2733                         atomic_read(&kvm->online_vcpus));
2734
2735         /*
2736          * If the host uses TSC clock, then passthrough TSC as stable
2737          * to the guest.
2738          */
2739         host_tsc_clocksource = kvm_get_time_and_clockread(
2740                                         &ka->master_kernel_ns,
2741                                         &ka->master_cycle_now);
2742
2743         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2744                                 && !ka->backwards_tsc_observed
2745                                 && !ka->boot_vcpu_runs_old_kvmclock;
2746
2747         if (ka->use_master_clock)
2748                 atomic_set(&kvm_guest_has_master_clock, 1);
2749
2750         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2751         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2752                                         vcpus_matched);
2753 #endif
2754 }
2755
2756 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2757 {
2758         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2759 }
2760
2761 static void kvm_gen_update_masterclock(struct kvm *kvm)
2762 {
2763 #ifdef CONFIG_X86_64
2764         int i;
2765         struct kvm_vcpu *vcpu;
2766         struct kvm_arch *ka = &kvm->arch;
2767         unsigned long flags;
2768
2769         kvm_hv_invalidate_tsc_page(kvm);
2770
2771         kvm_make_mclock_inprogress_request(kvm);
2772
2773         /* no guest entries from this point */
2774         spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2775         pvclock_update_vm_gtod_copy(kvm);
2776         spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2777
2778         kvm_for_each_vcpu(i, vcpu, kvm)
2779                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2780
2781         /* guest entries allowed */
2782         kvm_for_each_vcpu(i, vcpu, kvm)
2783                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2784 #endif
2785 }
2786
2787 u64 get_kvmclock_ns(struct kvm *kvm)
2788 {
2789         struct kvm_arch *ka = &kvm->arch;
2790         struct pvclock_vcpu_time_info hv_clock;
2791         unsigned long flags;
2792         u64 ret;
2793
2794         spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2795         if (!ka->use_master_clock) {
2796                 spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2797                 return get_kvmclock_base_ns() + ka->kvmclock_offset;
2798         }
2799
2800         hv_clock.tsc_timestamp = ka->master_cycle_now;
2801         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2802         spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2803
2804         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2805         get_cpu();
2806
2807         if (__this_cpu_read(cpu_tsc_khz)) {
2808                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2809                                    &hv_clock.tsc_shift,
2810                                    &hv_clock.tsc_to_system_mul);
2811                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2812         } else
2813                 ret = get_kvmclock_base_ns() + ka->kvmclock_offset;
2814
2815         put_cpu();
2816
2817         return ret;
2818 }
2819
2820 static void kvm_setup_pvclock_page(struct kvm_vcpu *v,
2821                                    struct gfn_to_hva_cache *cache,
2822                                    unsigned int offset)
2823 {
2824         struct kvm_vcpu_arch *vcpu = &v->arch;
2825         struct pvclock_vcpu_time_info guest_hv_clock;
2826
2827         if (unlikely(kvm_read_guest_offset_cached(v->kvm, cache,
2828                 &guest_hv_clock, offset, sizeof(guest_hv_clock))))
2829                 return;
2830
2831         /* This VCPU is paused, but it's legal for a guest to read another
2832          * VCPU's kvmclock, so we really have to follow the specification where
2833          * it says that version is odd if data is being modified, and even after
2834          * it is consistent.
2835          *
2836          * Version field updates must be kept separate.  This is because
2837          * kvm_write_guest_cached might use a "rep movs" instruction, and
2838          * writes within a string instruction are weakly ordered.  So there
2839          * are three writes overall.
2840          *
2841          * As a small optimization, only write the version field in the first
2842          * and third write.  The vcpu->pv_time cache is still valid, because the
2843          * version field is the first in the struct.
2844          */
2845         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2846
2847         if (guest_hv_clock.version & 1)
2848                 ++guest_hv_clock.version;  /* first time write, random junk */
2849
2850         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2851         kvm_write_guest_offset_cached(v->kvm, cache,
2852                                       &vcpu->hv_clock, offset,
2853                                       sizeof(vcpu->hv_clock.version));
2854
2855         smp_wmb();
2856
2857         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2858         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2859
2860         if (vcpu->pvclock_set_guest_stopped_request) {
2861                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2862                 vcpu->pvclock_set_guest_stopped_request = false;
2863         }
2864
2865         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2866
2867         kvm_write_guest_offset_cached(v->kvm, cache,
2868                                       &vcpu->hv_clock, offset,
2869                                       sizeof(vcpu->hv_clock));
2870
2871         smp_wmb();
2872
2873         vcpu->hv_clock.version++;
2874         kvm_write_guest_offset_cached(v->kvm, cache,
2875                                      &vcpu->hv_clock, offset,
2876                                      sizeof(vcpu->hv_clock.version));
2877 }
2878
2879 static int kvm_guest_time_update(struct kvm_vcpu *v)
2880 {
2881         unsigned long flags, tgt_tsc_khz;
2882         struct kvm_vcpu_arch *vcpu = &v->arch;
2883         struct kvm_arch *ka = &v->kvm->arch;
2884         s64 kernel_ns;
2885         u64 tsc_timestamp, host_tsc;
2886         u8 pvclock_flags;
2887         bool use_master_clock;
2888
2889         kernel_ns = 0;
2890         host_tsc = 0;
2891
2892         /*
2893          * If the host uses TSC clock, then passthrough TSC as stable
2894          * to the guest.
2895          */
2896         spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2897         use_master_clock = ka->use_master_clock;
2898         if (use_master_clock) {
2899                 host_tsc = ka->master_cycle_now;
2900                 kernel_ns = ka->master_kernel_ns;
2901         }
2902         spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2903
2904         /* Keep irq disabled to prevent changes to the clock */
2905         local_irq_save(flags);
2906         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2907         if (unlikely(tgt_tsc_khz == 0)) {
2908                 local_irq_restore(flags);
2909                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2910                 return 1;
2911         }
2912         if (!use_master_clock) {
2913                 host_tsc = rdtsc();
2914                 kernel_ns = get_kvmclock_base_ns();
2915         }
2916
2917         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2918
2919         /*
2920          * We may have to catch up the TSC to match elapsed wall clock
2921          * time for two reasons, even if kvmclock is used.
2922          *   1) CPU could have been running below the maximum TSC rate
2923          *   2) Broken TSC compensation resets the base at each VCPU
2924          *      entry to avoid unknown leaps of TSC even when running
2925          *      again on the same CPU.  This may cause apparent elapsed
2926          *      time to disappear, and the guest to stand still or run
2927          *      very slowly.
2928          */
2929         if (vcpu->tsc_catchup) {
2930                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2931                 if (tsc > tsc_timestamp) {
2932                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2933                         tsc_timestamp = tsc;
2934                 }
2935         }
2936
2937         local_irq_restore(flags);
2938
2939         /* With all the info we got, fill in the values */
2940
2941         if (kvm_has_tsc_control)
2942                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz,
2943                                             v->arch.l1_tsc_scaling_ratio);
2944
2945         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2946                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2947                                    &vcpu->hv_clock.tsc_shift,
2948                                    &vcpu->hv_clock.tsc_to_system_mul);
2949                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2950         }
2951
2952         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2953         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2954         vcpu->last_guest_tsc = tsc_timestamp;
2955
2956         /* If the host uses TSC clocksource, then it is stable */
2957         pvclock_flags = 0;
2958         if (use_master_clock)
2959                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2960
2961         vcpu->hv_clock.flags = pvclock_flags;
2962
2963         if (vcpu->pv_time_enabled)
2964                 kvm_setup_pvclock_page(v, &vcpu->pv_time, 0);
2965         if (vcpu->xen.vcpu_info_set)
2966                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_info_cache,
2967                                        offsetof(struct compat_vcpu_info, time));
2968         if (vcpu->xen.vcpu_time_info_set)
2969                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_time_info_cache, 0);
2970         if (v == kvm_get_vcpu(v->kvm, 0))
2971                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2972         return 0;
2973 }
2974
2975 /*
2976  * kvmclock updates which are isolated to a given vcpu, such as
2977  * vcpu->cpu migration, should not allow system_timestamp from
2978  * the rest of the vcpus to remain static. Otherwise ntp frequency
2979  * correction applies to one vcpu's system_timestamp but not
2980  * the others.
2981  *
2982  * So in those cases, request a kvmclock update for all vcpus.
2983  * We need to rate-limit these requests though, as they can
2984  * considerably slow guests that have a large number of vcpus.
2985  * The time for a remote vcpu to update its kvmclock is bound
2986  * by the delay we use to rate-limit the updates.
2987  */
2988
2989 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2990
2991 static void kvmclock_update_fn(struct work_struct *work)
2992 {
2993         int i;
2994         struct delayed_work *dwork = to_delayed_work(work);
2995         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2996                                            kvmclock_update_work);
2997         struct kvm *kvm = container_of(ka, struct kvm, arch);
2998         struct kvm_vcpu *vcpu;
2999
3000         kvm_for_each_vcpu(i, vcpu, kvm) {
3001                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3002                 kvm_vcpu_kick(vcpu);
3003         }
3004 }
3005
3006 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
3007 {
3008         struct kvm *kvm = v->kvm;
3009
3010         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
3011         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
3012                                         KVMCLOCK_UPDATE_DELAY);
3013 }
3014
3015 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
3016
3017 static void kvmclock_sync_fn(struct work_struct *work)
3018 {
3019         struct delayed_work *dwork = to_delayed_work(work);
3020         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
3021                                            kvmclock_sync_work);
3022         struct kvm *kvm = container_of(ka, struct kvm, arch);
3023
3024         if (!kvmclock_periodic_sync)
3025                 return;
3026
3027         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
3028         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
3029                                         KVMCLOCK_SYNC_PERIOD);
3030 }
3031
3032 /*
3033  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
3034  */
3035 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
3036 {
3037         /* McStatusWrEn enabled? */
3038         if (guest_cpuid_is_amd_or_hygon(vcpu))
3039                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
3040
3041         return false;
3042 }
3043
3044 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3045 {
3046         u64 mcg_cap = vcpu->arch.mcg_cap;
3047         unsigned bank_num = mcg_cap & 0xff;
3048         u32 msr = msr_info->index;
3049         u64 data = msr_info->data;
3050
3051         switch (msr) {
3052         case MSR_IA32_MCG_STATUS:
3053                 vcpu->arch.mcg_status = data;
3054                 break;
3055         case MSR_IA32_MCG_CTL:
3056                 if (!(mcg_cap & MCG_CTL_P) &&
3057                     (data || !msr_info->host_initiated))
3058                         return 1;
3059                 if (data != 0 && data != ~(u64)0)
3060                         return 1;
3061                 vcpu->arch.mcg_ctl = data;
3062                 break;
3063         default:
3064                 if (msr >= MSR_IA32_MC0_CTL &&
3065                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3066                         u32 offset = array_index_nospec(
3067                                 msr - MSR_IA32_MC0_CTL,
3068                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3069
3070                         /* only 0 or all 1s can be written to IA32_MCi_CTL
3071                          * some Linux kernels though clear bit 10 in bank 4 to
3072                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
3073                          * this to avoid an uncatched #GP in the guest
3074                          */
3075                         if ((offset & 0x3) == 0 &&
3076                             data != 0 && (data | (1 << 10)) != ~(u64)0)
3077                                 return -1;
3078
3079                         /* MCi_STATUS */
3080                         if (!msr_info->host_initiated &&
3081                             (offset & 0x3) == 1 && data != 0) {
3082                                 if (!can_set_mci_status(vcpu))
3083                                         return -1;
3084                         }
3085
3086                         vcpu->arch.mce_banks[offset] = data;
3087                         break;
3088                 }
3089                 return 1;
3090         }
3091         return 0;
3092 }
3093
3094 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu *vcpu)
3095 {
3096         u64 mask = KVM_ASYNC_PF_ENABLED | KVM_ASYNC_PF_DELIVERY_AS_INT;
3097
3098         return (vcpu->arch.apf.msr_en_val & mask) == mask;
3099 }
3100
3101 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
3102 {
3103         gpa_t gpa = data & ~0x3f;
3104
3105         /* Bits 4:5 are reserved, Should be zero */
3106         if (data & 0x30)
3107                 return 1;
3108
3109         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_VMEXIT) &&
3110             (data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT))
3111                 return 1;
3112
3113         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT) &&
3114             (data & KVM_ASYNC_PF_DELIVERY_AS_INT))
3115                 return 1;
3116
3117         if (!lapic_in_kernel(vcpu))
3118                 return data ? 1 : 0;
3119
3120         vcpu->arch.apf.msr_en_val = data;
3121
3122         if (!kvm_pv_async_pf_enabled(vcpu)) {
3123                 kvm_clear_async_pf_completion_queue(vcpu);
3124                 kvm_async_pf_hash_reset(vcpu);
3125                 return 0;
3126         }
3127
3128         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
3129                                         sizeof(u64)))
3130                 return 1;
3131
3132         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
3133         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
3134
3135         kvm_async_pf_wakeup_all(vcpu);
3136
3137         return 0;
3138 }
3139
3140 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu *vcpu, u64 data)
3141 {
3142         /* Bits 8-63 are reserved */
3143         if (data >> 8)
3144                 return 1;
3145
3146         if (!lapic_in_kernel(vcpu))
3147                 return 1;
3148
3149         vcpu->arch.apf.msr_int_val = data;
3150
3151         vcpu->arch.apf.vec = data & KVM_ASYNC_PF_VEC_MASK;
3152
3153         return 0;
3154 }
3155
3156 static void kvmclock_reset(struct kvm_vcpu *vcpu)
3157 {
3158         vcpu->arch.pv_time_enabled = false;
3159         vcpu->arch.time = 0;
3160 }
3161
3162 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu *vcpu)
3163 {
3164         ++vcpu->stat.tlb_flush;
3165         static_call(kvm_x86_tlb_flush_all)(vcpu);
3166 }
3167
3168 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu *vcpu)
3169 {
3170         ++vcpu->stat.tlb_flush;
3171
3172         if (!tdp_enabled) {
3173                /*
3174                  * A TLB flush on behalf of the guest is equivalent to
3175                  * INVPCID(all), toggling CR4.PGE, etc., which requires
3176                  * a forced sync of the shadow page tables.  Unload the
3177                  * entire MMU here and the subsequent load will sync the
3178                  * shadow page tables, and also flush the TLB.
3179                  */
3180                 kvm_mmu_unload(vcpu);
3181                 return;
3182         }
3183
3184         static_call(kvm_x86_tlb_flush_guest)(vcpu);
3185 }
3186
3187 static void record_steal_time(struct kvm_vcpu *vcpu)
3188 {
3189         struct kvm_host_map map;
3190         struct kvm_steal_time *st;
3191
3192         if (kvm_xen_msr_enabled(vcpu->kvm)) {
3193                 kvm_xen_runstate_set_running(vcpu);
3194                 return;
3195         }
3196
3197         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3198                 return;
3199
3200         /* -EAGAIN is returned in atomic context so we can just return. */
3201         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT,
3202                         &map, &vcpu->arch.st.cache, false))
3203                 return;
3204
3205         st = map.hva +
3206                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
3207
3208         /*
3209          * Doing a TLB flush here, on the guest's behalf, can avoid
3210          * expensive IPIs.
3211          */
3212         if (guest_pv_has(vcpu, KVM_FEATURE_PV_TLB_FLUSH)) {
3213                 u8 st_preempted = xchg(&st->preempted, 0);
3214
3215                 trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
3216                                        st_preempted & KVM_VCPU_FLUSH_TLB);
3217                 if (st_preempted & KVM_VCPU_FLUSH_TLB)
3218                         kvm_vcpu_flush_tlb_guest(vcpu);
3219         } else {
3220                 st->preempted = 0;
3221         }
3222
3223         vcpu->arch.st.preempted = 0;
3224
3225         if (st->version & 1)
3226                 st->version += 1;  /* first time write, random junk */
3227
3228         st->version += 1;
3229
3230         smp_wmb();
3231
3232         st->steal += current->sched_info.run_delay -
3233                 vcpu->arch.st.last_steal;
3234         vcpu->arch.st.last_steal = current->sched_info.run_delay;
3235
3236         smp_wmb();
3237
3238         st->version += 1;
3239
3240         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, false);
3241 }
3242
3243 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3244 {
3245         bool pr = false;
3246         u32 msr = msr_info->index;
3247         u64 data = msr_info->data;
3248
3249         if (msr && msr == vcpu->kvm->arch.xen_hvm_config.msr)
3250                 return kvm_xen_write_hypercall_page(vcpu, data);
3251
3252         switch (msr) {
3253         case MSR_AMD64_NB_CFG:
3254         case MSR_IA32_UCODE_WRITE:
3255         case MSR_VM_HSAVE_PA:
3256         case MSR_AMD64_PATCH_LOADER:
3257         case MSR_AMD64_BU_CFG2:
3258         case MSR_AMD64_DC_CFG:
3259         case MSR_F15H_EX_CFG:
3260                 break;
3261
3262         case MSR_IA32_UCODE_REV:
3263                 if (msr_info->host_initiated)
3264                         vcpu->arch.microcode_version = data;
3265                 break;
3266         case MSR_IA32_ARCH_CAPABILITIES:
3267                 if (!msr_info->host_initiated)
3268                         return 1;
3269                 vcpu->arch.arch_capabilities = data;
3270                 break;
3271         case MSR_IA32_PERF_CAPABILITIES: {
3272                 struct kvm_msr_entry msr_ent = {.index = msr, .data = 0};
3273
3274                 if (!msr_info->host_initiated)
3275                         return 1;
3276                 if (guest_cpuid_has(vcpu, X86_FEATURE_PDCM) && kvm_get_msr_feature(&msr_ent))
3277                         return 1;
3278                 if (data & ~msr_ent.data)
3279                         return 1;
3280
3281                 vcpu->arch.perf_capabilities = data;
3282
3283                 return 0;
3284                 }
3285         case MSR_EFER:
3286                 return set_efer(vcpu, msr_info);
3287         case MSR_K7_HWCR:
3288                 data &= ~(u64)0x40;     /* ignore flush filter disable */
3289                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
3290                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
3291
3292                 /* Handle McStatusWrEn */
3293                 if (data == BIT_ULL(18)) {
3294                         vcpu->arch.msr_hwcr = data;
3295                 } else if (data != 0) {
3296                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
3297                                     data);
3298                         return 1;
3299                 }
3300                 break;
3301         case MSR_FAM10H_MMIO_CONF_BASE:
3302                 if (data != 0) {
3303                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
3304                                     "0x%llx\n", data);
3305                         return 1;
3306                 }
3307                 break;
3308         case 0x200 ... 0x2ff:
3309                 return kvm_mtrr_set_msr(vcpu, msr, data);
3310         case MSR_IA32_APICBASE:
3311                 return kvm_set_apic_base(vcpu, msr_info);
3312         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3313                 return kvm_x2apic_msr_write(vcpu, msr, data);
3314         case MSR_IA32_TSC_DEADLINE:
3315                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
3316                 break;
3317         case MSR_IA32_TSC_ADJUST:
3318                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
3319                         if (!msr_info->host_initiated) {
3320                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
3321                                 adjust_tsc_offset_guest(vcpu, adj);
3322                         }
3323                         vcpu->arch.ia32_tsc_adjust_msr = data;
3324                 }
3325                 break;
3326         case MSR_IA32_MISC_ENABLE:
3327                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
3328                     ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
3329                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
3330                                 return 1;
3331                         vcpu->arch.ia32_misc_enable_msr = data;
3332                         kvm_update_cpuid_runtime(vcpu);
3333                 } else {
3334                         vcpu->arch.ia32_misc_enable_msr = data;
3335                 }
3336                 break;
3337         case MSR_IA32_SMBASE:
3338                 if (!msr_info->host_initiated)
3339                         return 1;
3340                 vcpu->arch.smbase = data;
3341                 break;
3342         case MSR_IA32_POWER_CTL:
3343                 vcpu->arch.msr_ia32_power_ctl = data;
3344                 break;
3345         case MSR_IA32_TSC:
3346                 if (msr_info->host_initiated) {
3347                         kvm_synchronize_tsc(vcpu, data);
3348                 } else {
3349                         u64 adj = kvm_compute_l1_tsc_offset(vcpu, data) - vcpu->arch.l1_tsc_offset;
3350                         adjust_tsc_offset_guest(vcpu, adj);
3351                         vcpu->arch.ia32_tsc_adjust_msr += adj;
3352                 }
3353                 break;
3354         case MSR_IA32_XSS:
3355                 if (!msr_info->host_initiated &&
3356                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3357                         return 1;
3358                 /*
3359                  * KVM supports exposing PT to the guest, but does not support
3360                  * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3361                  * XSAVES/XRSTORS to save/restore PT MSRs.
3362                  */
3363                 if (data & ~supported_xss)
3364                         return 1;
3365                 vcpu->arch.ia32_xss = data;
3366                 break;
3367         case MSR_SMI_COUNT:
3368                 if (!msr_info->host_initiated)
3369                         return 1;
3370                 vcpu->arch.smi_count = data;
3371                 break;
3372         case MSR_KVM_WALL_CLOCK_NEW:
3373                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3374                         return 1;
3375
3376                 vcpu->kvm->arch.wall_clock = data;
3377                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3378                 break;
3379         case MSR_KVM_WALL_CLOCK:
3380                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3381                         return 1;
3382
3383                 vcpu->kvm->arch.wall_clock = data;
3384                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3385                 break;
3386         case MSR_KVM_SYSTEM_TIME_NEW:
3387                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3388                         return 1;
3389
3390                 kvm_write_system_time(vcpu, data, false, msr_info->host_initiated);
3391                 break;
3392         case MSR_KVM_SYSTEM_TIME:
3393                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3394                         return 1;
3395
3396                 kvm_write_system_time(vcpu, data, true,  msr_info->host_initiated);
3397                 break;
3398         case MSR_KVM_ASYNC_PF_EN:
3399                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3400                         return 1;
3401
3402                 if (kvm_pv_enable_async_pf(vcpu, data))
3403                         return 1;
3404                 break;
3405         case MSR_KVM_ASYNC_PF_INT:
3406                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3407                         return 1;
3408
3409                 if (kvm_pv_enable_async_pf_int(vcpu, data))
3410                         return 1;
3411                 break;
3412         case MSR_KVM_ASYNC_PF_ACK:
3413                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3414                         return 1;
3415                 if (data & 0x1) {
3416                         vcpu->arch.apf.pageready_pending = false;
3417                         kvm_check_async_pf_completion(vcpu);
3418                 }
3419                 break;
3420         case MSR_KVM_STEAL_TIME:
3421                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3422                         return 1;
3423
3424                 if (unlikely(!sched_info_on()))
3425                         return 1;
3426
3427                 if (data & KVM_STEAL_RESERVED_MASK)
3428                         return 1;
3429
3430                 vcpu->arch.st.msr_val = data;
3431
3432                 if (!(data & KVM_MSR_ENABLED))
3433                         break;
3434
3435                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3436
3437                 break;
3438         case MSR_KVM_PV_EOI_EN:
3439                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3440                         return 1;
3441
3442                 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
3443                         return 1;
3444                 break;
3445
3446         case MSR_KVM_POLL_CONTROL:
3447                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3448                         return 1;
3449
3450                 /* only enable bit supported */
3451                 if (data & (-1ULL << 1))
3452                         return 1;
3453
3454                 vcpu->arch.msr_kvm_poll_control = data;
3455                 break;
3456
3457         case MSR_IA32_MCG_CTL:
3458         case MSR_IA32_MCG_STATUS:
3459         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3460                 return set_msr_mce(vcpu, msr_info);
3461
3462         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3463         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3464                 pr = true;
3465                 fallthrough;
3466         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3467         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3468                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3469                         return kvm_pmu_set_msr(vcpu, msr_info);
3470
3471                 if (pr || data != 0)
3472                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
3473                                     "0x%x data 0x%llx\n", msr, data);
3474                 break;
3475         case MSR_K7_CLK_CTL:
3476                 /*
3477                  * Ignore all writes to this no longer documented MSR.
3478                  * Writes are only relevant for old K7 processors,
3479                  * all pre-dating SVM, but a recommended workaround from
3480                  * AMD for these chips. It is possible to specify the
3481                  * affected processor models on the command line, hence
3482                  * the need to ignore the workaround.
3483                  */
3484                 break;
3485         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3486         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3487         case HV_X64_MSR_SYNDBG_OPTIONS:
3488         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3489         case HV_X64_MSR_CRASH_CTL:
3490         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3491         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3492         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3493         case HV_X64_MSR_TSC_EMULATION_STATUS:
3494                 return kvm_hv_set_msr_common(vcpu, msr, data,
3495                                              msr_info->host_initiated);
3496         case MSR_IA32_BBL_CR_CTL3:
3497                 /* Drop writes to this legacy MSR -- see rdmsr
3498                  * counterpart for further detail.
3499                  */
3500                 if (report_ignored_msrs)
3501                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
3502                                 msr, data);
3503                 break;
3504         case MSR_AMD64_OSVW_ID_LENGTH:
3505                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3506                         return 1;
3507                 vcpu->arch.osvw.length = data;
3508                 break;
3509         case MSR_AMD64_OSVW_STATUS:
3510                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3511                         return 1;
3512                 vcpu->arch.osvw.status = data;
3513                 break;
3514         case MSR_PLATFORM_INFO:
3515                 if (!msr_info->host_initiated ||
3516                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
3517                      cpuid_fault_enabled(vcpu)))
3518                         return 1;
3519                 vcpu->arch.msr_platform_info = data;
3520                 break;
3521         case MSR_MISC_FEATURES_ENABLES:
3522                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
3523                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
3524                      !supports_cpuid_fault(vcpu)))
3525                         return 1;
3526                 vcpu->arch.msr_misc_features_enables = data;
3527                 break;
3528         default:
3529                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3530                         return kvm_pmu_set_msr(vcpu, msr_info);
3531                 return KVM_MSR_RET_INVALID;
3532         }
3533         return 0;
3534 }
3535 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
3536
3537 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
3538 {
3539         u64 data;
3540         u64 mcg_cap = vcpu->arch.mcg_cap;
3541         unsigned bank_num = mcg_cap & 0xff;
3542
3543         switch (msr) {
3544         case MSR_IA32_P5_MC_ADDR:
3545         case MSR_IA32_P5_MC_TYPE:
3546                 data = 0;
3547                 break;
3548         case MSR_IA32_MCG_CAP:
3549                 data = vcpu->arch.mcg_cap;
3550                 break;
3551         case MSR_IA32_MCG_CTL:
3552                 if (!(mcg_cap & MCG_CTL_P) && !host)
3553                         return 1;
3554                 data = vcpu->arch.mcg_ctl;
3555                 break;
3556         case MSR_IA32_MCG_STATUS:
3557                 data = vcpu->arch.mcg_status;
3558                 break;
3559         default:
3560                 if (msr >= MSR_IA32_MC0_CTL &&
3561                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3562                         u32 offset = array_index_nospec(
3563                                 msr - MSR_IA32_MC0_CTL,
3564                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3565
3566                         data = vcpu->arch.mce_banks[offset];
3567                         break;
3568                 }
3569                 return 1;
3570         }
3571         *pdata = data;
3572         return 0;
3573 }
3574
3575 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3576 {
3577         switch (msr_info->index) {
3578         case MSR_IA32_PLATFORM_ID:
3579         case MSR_IA32_EBL_CR_POWERON:
3580         case MSR_IA32_LASTBRANCHFROMIP:
3581         case MSR_IA32_LASTBRANCHTOIP:
3582         case MSR_IA32_LASTINTFROMIP:
3583         case MSR_IA32_LASTINTTOIP:
3584         case MSR_AMD64_SYSCFG:
3585         case MSR_K8_TSEG_ADDR:
3586         case MSR_K8_TSEG_MASK:
3587         case MSR_VM_HSAVE_PA:
3588         case MSR_K8_INT_PENDING_MSG:
3589         case MSR_AMD64_NB_CFG:
3590         case MSR_FAM10H_MMIO_CONF_BASE:
3591         case MSR_AMD64_BU_CFG2:
3592         case MSR_IA32_PERF_CTL:
3593         case MSR_AMD64_DC_CFG:
3594         case MSR_F15H_EX_CFG:
3595         /*
3596          * Intel Sandy Bridge CPUs must support the RAPL (running average power
3597          * limit) MSRs. Just return 0, as we do not want to expose the host
3598          * data here. Do not conditionalize this on CPUID, as KVM does not do
3599          * so for existing CPU-specific MSRs.
3600          */
3601         case MSR_RAPL_POWER_UNIT:
3602         case MSR_PP0_ENERGY_STATUS:     /* Power plane 0 (core) */
3603         case MSR_PP1_ENERGY_STATUS:     /* Power plane 1 (graphics uncore) */
3604         case MSR_PKG_ENERGY_STATUS:     /* Total package */
3605         case MSR_DRAM_ENERGY_STATUS:    /* DRAM controller */
3606                 msr_info->data = 0;
3607                 break;
3608         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
3609                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3610                         return kvm_pmu_get_msr(vcpu, msr_info);
3611                 if (!msr_info->host_initiated)
3612                         return 1;
3613                 msr_info->data = 0;
3614                 break;
3615         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3616         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3617         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3618         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3619                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3620                         return kvm_pmu_get_msr(vcpu, msr_info);
3621                 msr_info->data = 0;
3622                 break;
3623         case MSR_IA32_UCODE_REV:
3624                 msr_info->data = vcpu->arch.microcode_version;
3625                 break;
3626         case MSR_IA32_ARCH_CAPABILITIES:
3627                 if (!msr_info->host_initiated &&
3628                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
3629                         return 1;
3630                 msr_info->data = vcpu->arch.arch_capabilities;
3631                 break;
3632         case MSR_IA32_PERF_CAPABILITIES:
3633                 if (!msr_info->host_initiated &&
3634                     !guest_cpuid_has(vcpu, X86_FEATURE_PDCM))
3635                         return 1;
3636                 msr_info->data = vcpu->arch.perf_capabilities;
3637                 break;
3638         case MSR_IA32_POWER_CTL:
3639                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
3640                 break;
3641         case MSR_IA32_TSC: {
3642                 /*
3643                  * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3644                  * even when not intercepted. AMD manual doesn't explicitly
3645                  * state this but appears to behave the same.
3646                  *
3647                  * On userspace reads and writes, however, we unconditionally
3648                  * return L1's TSC value to ensure backwards-compatible
3649                  * behavior for migration.
3650                  */
3651                 u64 offset, ratio;
3652
3653                 if (msr_info->host_initiated) {
3654                         offset = vcpu->arch.l1_tsc_offset;
3655                         ratio = vcpu->arch.l1_tsc_scaling_ratio;
3656                 } else {
3657                         offset = vcpu->arch.tsc_offset;
3658                         ratio = vcpu->arch.tsc_scaling_ratio;
3659                 }
3660
3661                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc(), ratio) + offset;
3662                 break;
3663         }
3664         case MSR_MTRRcap:
3665         case 0x200 ... 0x2ff:
3666                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
3667         case 0xcd: /* fsb frequency */
3668                 msr_info->data = 3;
3669                 break;
3670                 /*
3671                  * MSR_EBC_FREQUENCY_ID
3672                  * Conservative value valid for even the basic CPU models.
3673                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3674                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3675                  * and 266MHz for model 3, or 4. Set Core Clock
3676                  * Frequency to System Bus Frequency Ratio to 1 (bits
3677                  * 31:24) even though these are only valid for CPU
3678                  * models > 2, however guests may end up dividing or
3679                  * multiplying by zero otherwise.
3680                  */
3681         case MSR_EBC_FREQUENCY_ID:
3682                 msr_info->data = 1 << 24;
3683                 break;
3684         case MSR_IA32_APICBASE:
3685                 msr_info->data = kvm_get_apic_base(vcpu);
3686                 break;
3687         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3688                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
3689         case MSR_IA32_TSC_DEADLINE:
3690                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
3691                 break;
3692         case MSR_IA32_TSC_ADJUST:
3693                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
3694                 break;
3695         case MSR_IA32_MISC_ENABLE:
3696                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
3697                 break;
3698         case MSR_IA32_SMBASE:
3699                 if (!msr_info->host_initiated)
3700                         return 1;
3701                 msr_info->data = vcpu->arch.smbase;
3702                 break;
3703         case MSR_SMI_COUNT:
3704                 msr_info->data = vcpu->arch.smi_count;
3705                 break;
3706         case MSR_IA32_PERF_STATUS:
3707                 /* TSC increment by tick */
3708                 msr_info->data = 1000ULL;
3709                 /* CPU multiplier */
3710                 msr_info->data |= (((uint64_t)4ULL) << 40);
3711                 break;
3712         case MSR_EFER:
3713                 msr_info->data = vcpu->arch.efer;
3714                 break;
3715         case MSR_KVM_WALL_CLOCK:
3716                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3717                         return 1;
3718
3719                 msr_info->data = vcpu->kvm->arch.wall_clock;
3720                 break;
3721         case MSR_KVM_WALL_CLOCK_NEW:
3722                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3723                         return 1;
3724
3725                 msr_info->data = vcpu->kvm->arch.wall_clock;
3726                 break;
3727         case MSR_KVM_SYSTEM_TIME:
3728                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3729                         return 1;
3730
3731                 msr_info->data = vcpu->arch.time;
3732                 break;
3733         case MSR_KVM_SYSTEM_TIME_NEW:
3734                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3735                         return 1;
3736
3737                 msr_info->data = vcpu->arch.time;
3738                 break;
3739         case MSR_KVM_ASYNC_PF_EN:
3740                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3741                         return 1;
3742
3743                 msr_info->data = vcpu->arch.apf.msr_en_val;
3744                 break;
3745         case MSR_KVM_ASYNC_PF_INT:
3746                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3747                         return 1;
3748
3749                 msr_info->data = vcpu->arch.apf.msr_int_val;
3750                 break;
3751         case MSR_KVM_ASYNC_PF_ACK:
3752                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3753                         return 1;
3754
3755                 msr_info->data = 0;
3756                 break;
3757         case MSR_KVM_STEAL_TIME:
3758                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3759                         return 1;
3760
3761                 msr_info->data = vcpu->arch.st.msr_val;
3762                 break;
3763         case MSR_KVM_PV_EOI_EN:
3764                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3765                         return 1;
3766
3767                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
3768                 break;
3769         case MSR_KVM_POLL_CONTROL:
3770                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3771                         return 1;
3772
3773                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
3774                 break;
3775         case MSR_IA32_P5_MC_ADDR:
3776         case MSR_IA32_P5_MC_TYPE:
3777         case MSR_IA32_MCG_CAP:
3778         case MSR_IA32_MCG_CTL:
3779         case MSR_IA32_MCG_STATUS:
3780         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3781                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
3782                                    msr_info->host_initiated);
3783         case MSR_IA32_XSS:
3784                 if (!msr_info->host_initiated &&
3785                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3786                         return 1;
3787                 msr_info->data = vcpu->arch.ia32_xss;
3788                 break;
3789         case MSR_K7_CLK_CTL:
3790                 /*
3791                  * Provide expected ramp-up count for K7. All other
3792                  * are set to zero, indicating minimum divisors for
3793                  * every field.
3794                  *
3795                  * This prevents guest kernels on AMD host with CPU
3796                  * type 6, model 8 and higher from exploding due to
3797                  * the rdmsr failing.
3798                  */
3799                 msr_info->data = 0x20000000;
3800                 break;
3801         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3802         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3803         case HV_X64_MSR_SYNDBG_OPTIONS:
3804         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3805         case HV_X64_MSR_CRASH_CTL:
3806         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3807         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3808         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3809         case HV_X64_MSR_TSC_EMULATION_STATUS:
3810                 return kvm_hv_get_msr_common(vcpu,
3811                                              msr_info->index, &msr_info->data,
3812                                              msr_info->host_initiated);
3813         case MSR_IA32_BBL_CR_CTL3:
3814                 /* This legacy MSR exists but isn't fully documented in current
3815                  * silicon.  It is however accessed by winxp in very narrow
3816                  * scenarios where it sets bit #19, itself documented as
3817                  * a "reserved" bit.  Best effort attempt to source coherent
3818                  * read data here should the balance of the register be
3819                  * interpreted by the guest:
3820                  *
3821                  * L2 cache control register 3: 64GB range, 256KB size,
3822                  * enabled, latency 0x1, configured
3823                  */
3824                 msr_info->data = 0xbe702111;
3825                 break;
3826         case MSR_AMD64_OSVW_ID_LENGTH:
3827                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3828                         return 1;
3829                 msr_info->data = vcpu->arch.osvw.length;
3830                 break;
3831         case MSR_AMD64_OSVW_STATUS:
3832                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3833                         return 1;
3834                 msr_info->data = vcpu->arch.osvw.status;
3835                 break;
3836         case MSR_PLATFORM_INFO:
3837                 if (!msr_info->host_initiated &&
3838                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
3839                         return 1;
3840                 msr_info->data = vcpu->arch.msr_platform_info;
3841                 break;
3842         case MSR_MISC_FEATURES_ENABLES:
3843                 msr_info->data = vcpu->arch.msr_misc_features_enables;
3844                 break;
3845         case MSR_K7_HWCR:
3846                 msr_info->data = vcpu->arch.msr_hwcr;
3847                 break;
3848         default:
3849                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3850                         return kvm_pmu_get_msr(vcpu, msr_info);
3851                 return KVM_MSR_RET_INVALID;
3852         }
3853         return 0;
3854 }
3855 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
3856
3857 /*
3858  * Read or write a bunch of msrs. All parameters are kernel addresses.
3859  *
3860  * @return number of msrs set successfully.
3861  */
3862 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
3863                     struct kvm_msr_entry *entries,
3864                     int (*do_msr)(struct kvm_vcpu *vcpu,
3865                                   unsigned index, u64 *data))
3866 {
3867         int i;
3868
3869         for (i = 0; i < msrs->nmsrs; ++i)
3870                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
3871                         break;
3872
3873         return i;
3874 }
3875
3876 /*
3877  * Read or write a bunch of msrs. Parameters are user addresses.
3878  *
3879  * @return number of msrs set successfully.
3880  */
3881 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
3882                   int (*do_msr)(struct kvm_vcpu *vcpu,
3883                                 unsigned index, u64 *data),
3884                   int writeback)
3885 {
3886         struct kvm_msrs msrs;
3887         struct kvm_msr_entry *entries;
3888         int r, n;
3889         unsigned size;
3890
3891         r = -EFAULT;
3892         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
3893                 goto out;
3894
3895         r = -E2BIG;
3896         if (msrs.nmsrs >= MAX_IO_MSRS)
3897                 goto out;
3898
3899         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
3900         entries = memdup_user(user_msrs->entries, size);
3901         if (IS_ERR(entries)) {
3902                 r = PTR_ERR(entries);
3903                 goto out;
3904         }
3905
3906         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
3907         if (r < 0)
3908                 goto out_free;
3909
3910         r = -EFAULT;
3911         if (writeback && copy_to_user(user_msrs->entries, entries, size))
3912                 goto out_free;
3913
3914         r = n;
3915
3916 out_free:
3917         kfree(entries);
3918 out:
3919         return r;
3920 }
3921
3922 static inline bool kvm_can_mwait_in_guest(void)
3923 {
3924         return boot_cpu_has(X86_FEATURE_MWAIT) &&
3925                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
3926                 boot_cpu_has(X86_FEATURE_ARAT);
3927 }
3928
3929 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu *vcpu,
3930                                             struct kvm_cpuid2 __user *cpuid_arg)
3931 {
3932         struct kvm_cpuid2 cpuid;
3933         int r;
3934
3935         r = -EFAULT;
3936         if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3937                 return r;
3938
3939         r = kvm_get_hv_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3940         if (r)
3941                 return r;
3942
3943         r = -EFAULT;
3944         if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3945                 return r;
3946
3947         return 0;
3948 }
3949
3950 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
3951 {
3952         int r = 0;
3953
3954         switch (ext) {
3955         case KVM_CAP_IRQCHIP:
3956         case KVM_CAP_HLT:
3957         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
3958         case KVM_CAP_SET_TSS_ADDR:
3959         case KVM_CAP_EXT_CPUID:
3960         case KVM_CAP_EXT_EMUL_CPUID:
3961         case KVM_CAP_CLOCKSOURCE:
3962         case KVM_CAP_PIT:
3963         case KVM_CAP_NOP_IO_DELAY:
3964         case KVM_CAP_MP_STATE:
3965         case KVM_CAP_SYNC_MMU:
3966         case KVM_CAP_USER_NMI:
3967         case KVM_CAP_REINJECT_CONTROL:
3968         case KVM_CAP_IRQ_INJECT_STATUS:
3969         case KVM_CAP_IOEVENTFD:
3970         case KVM_CAP_IOEVENTFD_NO_LENGTH:
3971         case KVM_CAP_PIT2:
3972         case KVM_CAP_PIT_STATE2:
3973         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
3974         case KVM_CAP_VCPU_EVENTS:
3975         case KVM_CAP_HYPERV:
3976         case KVM_CAP_HYPERV_VAPIC:
3977         case KVM_CAP_HYPERV_SPIN:
3978         case KVM_CAP_HYPERV_SYNIC:
3979         case KVM_CAP_HYPERV_SYNIC2:
3980         case KVM_CAP_HYPERV_VP_INDEX:
3981         case KVM_CAP_HYPERV_EVENTFD:
3982         case KVM_CAP_HYPERV_TLBFLUSH:
3983         case KVM_CAP_HYPERV_SEND_IPI:
3984         case KVM_CAP_HYPERV_CPUID:
3985         case KVM_CAP_HYPERV_ENFORCE_CPUID:
3986         case KVM_CAP_SYS_HYPERV_CPUID:
3987         case KVM_CAP_PCI_SEGMENT:
3988         case KVM_CAP_DEBUGREGS:
3989         case KVM_CAP_X86_ROBUST_SINGLESTEP:
3990         case KVM_CAP_XSAVE:
3991         case KVM_CAP_ASYNC_PF:
3992         case KVM_CAP_ASYNC_PF_INT:
3993         case KVM_CAP_GET_TSC_KHZ:
3994         case KVM_CAP_KVMCLOCK_CTRL:
3995         case KVM_CAP_READONLY_MEM:
3996         case KVM_CAP_HYPERV_TIME:
3997         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
3998         case KVM_CAP_TSC_DEADLINE_TIMER:
3999         case KVM_CAP_DISABLE_QUIRKS:
4000         case KVM_CAP_SET_BOOT_CPU_ID:
4001         case KVM_CAP_SPLIT_IRQCHIP:
4002         case KVM_CAP_IMMEDIATE_EXIT:
4003         case KVM_CAP_PMU_EVENT_FILTER:
4004         case KVM_CAP_GET_MSR_FEATURES:
4005         case KVM_CAP_MSR_PLATFORM_INFO:
4006         case KVM_CAP_EXCEPTION_PAYLOAD:
4007         case KVM_CAP_SET_GUEST_DEBUG:
4008         case KVM_CAP_LAST_CPU:
4009         case KVM_CAP_X86_USER_SPACE_MSR:
4010         case KVM_CAP_X86_MSR_FILTER:
4011         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4012 #ifdef CONFIG_X86_SGX_KVM
4013         case KVM_CAP_SGX_ATTRIBUTE:
4014 #endif
4015         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
4016         case KVM_CAP_SREGS2:
4017         case KVM_CAP_EXIT_ON_EMULATION_FAILURE:
4018                 r = 1;
4019                 break;
4020         case KVM_CAP_EXIT_HYPERCALL:
4021                 r = KVM_EXIT_HYPERCALL_VALID_MASK;
4022                 break;
4023         case KVM_CAP_SET_GUEST_DEBUG2:
4024                 return KVM_GUESTDBG_VALID_MASK;
4025 #ifdef CONFIG_KVM_XEN
4026         case KVM_CAP_XEN_HVM:
4027                 r = KVM_XEN_HVM_CONFIG_HYPERCALL_MSR |
4028                     KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL |
4029                     KVM_XEN_HVM_CONFIG_SHARED_INFO;
4030                 if (sched_info_on())
4031                         r |= KVM_XEN_HVM_CONFIG_RUNSTATE;
4032                 break;
4033 #endif
4034         case KVM_CAP_SYNC_REGS:
4035                 r = KVM_SYNC_X86_VALID_FIELDS;
4036                 break;
4037         case KVM_CAP_ADJUST_CLOCK:
4038                 r = KVM_CLOCK_TSC_STABLE;
4039                 break;
4040         case KVM_CAP_X86_DISABLE_EXITS:
4041                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
4042                       KVM_X86_DISABLE_EXITS_CSTATE;
4043                 if(kvm_can_mwait_in_guest())
4044                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
4045                 break;
4046         case KVM_CAP_X86_SMM:
4047                 /* SMBASE is usually relocated above 1M on modern chipsets,
4048                  * and SMM handlers might indeed rely on 4G segment limits,
4049                  * so do not report SMM to be available if real mode is
4050                  * emulated via vm86 mode.  Still, do not go to great lengths
4051                  * to avoid userspace's usage of the feature, because it is a
4052                  * fringe case that is not enabled except via specific settings
4053                  * of the module parameters.
4054                  */
4055                 r = static_call(kvm_x86_has_emulated_msr)(kvm, MSR_IA32_SMBASE);
4056                 break;
4057         case KVM_CAP_VAPIC:
4058                 r = !static_call(kvm_x86_cpu_has_accelerated_tpr)();
4059                 break;
4060         case KVM_CAP_NR_VCPUS:
4061                 r = KVM_SOFT_MAX_VCPUS;
4062                 break;
4063         case KVM_CAP_MAX_VCPUS:
4064                 r = KVM_MAX_VCPUS;
4065                 break;
4066         case KVM_CAP_MAX_VCPU_ID:
4067                 r = KVM_MAX_VCPU_ID;
4068                 break;
4069         case KVM_CAP_PV_MMU:    /* obsolete */
4070                 r = 0;
4071                 break;
4072         case KVM_CAP_MCE:
4073                 r = KVM_MAX_MCE_BANKS;
4074                 break;
4075         case KVM_CAP_XCRS:
4076                 r = boot_cpu_has(X86_FEATURE_XSAVE);
4077                 break;
4078         case KVM_CAP_TSC_CONTROL:
4079                 r = kvm_has_tsc_control;
4080                 break;
4081         case KVM_CAP_X2APIC_API:
4082                 r = KVM_X2APIC_API_VALID_FLAGS;
4083                 break;
4084         case KVM_CAP_NESTED_STATE:
4085                 r = kvm_x86_ops.nested_ops->get_state ?
4086                         kvm_x86_ops.nested_ops->get_state(NULL, NULL, 0) : 0;
4087                 break;
4088         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4089                 r = kvm_x86_ops.enable_direct_tlbflush != NULL;
4090                 break;
4091         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4092                 r = kvm_x86_ops.nested_ops->enable_evmcs != NULL;
4093                 break;
4094         case KVM_CAP_SMALLER_MAXPHYADDR:
4095                 r = (int) allow_smaller_maxphyaddr;
4096                 break;
4097         case KVM_CAP_STEAL_TIME:
4098                 r = sched_info_on();
4099                 break;
4100         case KVM_CAP_X86_BUS_LOCK_EXIT:
4101                 if (kvm_has_bus_lock_exit)
4102                         r = KVM_BUS_LOCK_DETECTION_OFF |
4103                             KVM_BUS_LOCK_DETECTION_EXIT;
4104                 else
4105                         r = 0;
4106                 break;
4107         default:
4108                 break;
4109         }
4110         return r;
4111
4112 }
4113
4114 long kvm_arch_dev_ioctl(struct file *filp,
4115                         unsigned int ioctl, unsigned long arg)
4116 {
4117         void __user *argp = (void __user *)arg;
4118         long r;
4119
4120         switch (ioctl) {
4121         case KVM_GET_MSR_INDEX_LIST: {
4122                 struct kvm_msr_list __user *user_msr_list = argp;
4123                 struct kvm_msr_list msr_list;
4124                 unsigned n;
4125
4126                 r = -EFAULT;
4127                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4128                         goto out;
4129                 n = msr_list.nmsrs;
4130                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
4131                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4132                         goto out;
4133                 r = -E2BIG;
4134                 if (n < msr_list.nmsrs)
4135                         goto out;
4136                 r = -EFAULT;
4137                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
4138                                  num_msrs_to_save * sizeof(u32)))
4139                         goto out;
4140                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
4141                                  &emulated_msrs,
4142                                  num_emulated_msrs * sizeof(u32)))
4143                         goto out;
4144                 r = 0;
4145                 break;
4146         }
4147         case KVM_GET_SUPPORTED_CPUID:
4148         case KVM_GET_EMULATED_CPUID: {
4149                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4150                 struct kvm_cpuid2 cpuid;
4151
4152                 r = -EFAULT;
4153                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4154                         goto out;
4155
4156                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
4157                                             ioctl);
4158                 if (r)
4159                         goto out;
4160
4161                 r = -EFAULT;
4162                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4163                         goto out;
4164                 r = 0;
4165                 break;
4166         }
4167         case KVM_X86_GET_MCE_CAP_SUPPORTED:
4168                 r = -EFAULT;
4169                 if (copy_to_user(argp, &kvm_mce_cap_supported,
4170                                  sizeof(kvm_mce_cap_supported)))
4171                         goto out;
4172                 r = 0;
4173                 break;
4174         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
4175                 struct kvm_msr_list __user *user_msr_list = argp;
4176                 struct kvm_msr_list msr_list;
4177                 unsigned int n;
4178
4179                 r = -EFAULT;
4180                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4181                         goto out;
4182                 n = msr_list.nmsrs;
4183                 msr_list.nmsrs = num_msr_based_features;
4184                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4185                         goto out;
4186                 r = -E2BIG;
4187                 if (n < msr_list.nmsrs)
4188                         goto out;
4189                 r = -EFAULT;
4190                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
4191                                  num_msr_based_features * sizeof(u32)))
4192                         goto out;
4193                 r = 0;
4194                 break;
4195         }
4196         case KVM_GET_MSRS:
4197                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
4198                 break;
4199         case KVM_GET_SUPPORTED_HV_CPUID:
4200                 r = kvm_ioctl_get_supported_hv_cpuid(NULL, argp);
4201                 break;
4202         default:
4203                 r = -EINVAL;
4204                 break;
4205         }
4206 out:
4207         return r;
4208 }
4209
4210 static void wbinvd_ipi(void *garbage)
4211 {
4212         wbinvd();
4213 }
4214
4215 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
4216 {
4217         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
4218 }
4219
4220 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
4221 {
4222         /* Address WBINVD may be executed by guest */
4223         if (need_emulate_wbinvd(vcpu)) {
4224                 if (static_call(kvm_x86_has_wbinvd_exit)())
4225                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4226                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
4227                         smp_call_function_single(vcpu->cpu,
4228                                         wbinvd_ipi, NULL, 1);
4229         }
4230
4231         static_call(kvm_x86_vcpu_load)(vcpu, cpu);
4232
4233         /* Save host pkru register if supported */
4234         vcpu->arch.host_pkru = read_pkru();
4235
4236         /* Apply any externally detected TSC adjustments (due to suspend) */
4237         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
4238                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
4239                 vcpu->arch.tsc_offset_adjustment = 0;
4240                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4241         }
4242
4243         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
4244                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
4245                                 rdtsc() - vcpu->arch.last_host_tsc;
4246                 if (tsc_delta < 0)
4247                         mark_tsc_unstable("KVM discovered backwards TSC");
4248
4249                 if (kvm_check_tsc_unstable()) {
4250                         u64 offset = kvm_compute_l1_tsc_offset(vcpu,
4251                                                 vcpu->arch.last_guest_tsc);
4252                         kvm_vcpu_write_tsc_offset(vcpu, offset);
4253                         vcpu->arch.tsc_catchup = 1;
4254                 }
4255
4256                 if (kvm_lapic_hv_timer_in_use(vcpu))
4257                         kvm_lapic_restart_hv_timer(vcpu);
4258
4259                 /*
4260                  * On a host with synchronized TSC, there is no need to update
4261                  * kvmclock on vcpu->cpu migration
4262                  */
4263                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
4264                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
4265                 if (vcpu->cpu != cpu)
4266                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
4267                 vcpu->cpu = cpu;
4268         }
4269
4270         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
4271 }
4272
4273 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
4274 {
4275         struct kvm_host_map map;
4276         struct kvm_steal_time *st;
4277
4278         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
4279                 return;
4280
4281         if (vcpu->arch.st.preempted)
4282                 return;
4283
4284         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT, &map,
4285                         &vcpu->arch.st.cache, true))
4286                 return;
4287
4288         st = map.hva +
4289                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
4290
4291         st->preempted = vcpu->arch.st.preempted = KVM_VCPU_PREEMPTED;
4292
4293         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, true);
4294 }
4295
4296 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
4297 {
4298         int idx;
4299
4300         if (vcpu->preempted && !vcpu->arch.guest_state_protected)
4301                 vcpu->arch.preempted_in_kernel = !static_call(kvm_x86_get_cpl)(vcpu);
4302
4303         /*
4304          * Take the srcu lock as memslots will be accessed to check the gfn
4305          * cache generation against the memslots generation.
4306          */
4307         idx = srcu_read_lock(&vcpu->kvm->srcu);
4308         if (kvm_xen_msr_enabled(vcpu->kvm))
4309                 kvm_xen_runstate_set_preempted(vcpu);
4310         else
4311                 kvm_steal_time_set_preempted(vcpu);
4312         srcu_read_unlock(&vcpu->kvm->srcu, idx);
4313
4314         static_call(kvm_x86_vcpu_put)(vcpu);
4315         vcpu->arch.last_host_tsc = rdtsc();
4316 }
4317
4318 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
4319                                     struct kvm_lapic_state *s)
4320 {
4321         if (vcpu->arch.apicv_active)
4322                 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
4323
4324         return kvm_apic_get_state(vcpu, s);
4325 }
4326
4327 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
4328                                     struct kvm_lapic_state *s)
4329 {
4330         int r;
4331
4332         r = kvm_apic_set_state(vcpu, s);
4333         if (r)
4334                 return r;
4335         update_cr8_intercept(vcpu);
4336
4337         return 0;
4338 }
4339
4340 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
4341 {
4342         /*
4343          * We can accept userspace's request for interrupt injection
4344          * as long as we have a place to store the interrupt number.
4345          * The actual injection will happen when the CPU is able to
4346          * deliver the interrupt.
4347          */
4348         if (kvm_cpu_has_extint(vcpu))
4349                 return false;
4350
4351         /* Acknowledging ExtINT does not happen if LINT0 is masked.  */
4352         return (!lapic_in_kernel(vcpu) ||
4353                 kvm_apic_accept_pic_intr(vcpu));
4354 }
4355
4356 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
4357 {
4358         /*
4359          * Do not cause an interrupt window exit if an exception
4360          * is pending or an event needs reinjection; userspace
4361          * might want to inject the interrupt manually using KVM_SET_REGS
4362          * or KVM_SET_SREGS.  For that to work, we must be at an
4363          * instruction boundary and with no events half-injected.
4364          */
4365         return (kvm_arch_interrupt_allowed(vcpu) &&
4366                 kvm_cpu_accept_dm_intr(vcpu) &&
4367                 !kvm_event_needs_reinjection(vcpu) &&
4368                 !vcpu->arch.exception.pending);
4369 }
4370
4371 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
4372                                     struct kvm_interrupt *irq)
4373 {
4374         if (irq->irq >= KVM_NR_INTERRUPTS)
4375                 return -EINVAL;
4376
4377         if (!irqchip_in_kernel(vcpu->kvm)) {
4378                 kvm_queue_interrupt(vcpu, irq->irq, false);
4379                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4380                 return 0;
4381         }
4382
4383         /*
4384          * With in-kernel LAPIC, we only use this to inject EXTINT, so
4385          * fail for in-kernel 8259.
4386          */
4387         if (pic_in_kernel(vcpu->kvm))
4388                 return -ENXIO;
4389
4390         if (vcpu->arch.pending_external_vector != -1)
4391                 return -EEXIST;
4392
4393         vcpu->arch.pending_external_vector = irq->irq;
4394         kvm_make_request(KVM_REQ_EVENT, vcpu);
4395         return 0;
4396 }
4397
4398 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
4399 {
4400         kvm_inject_nmi(vcpu);
4401
4402         return 0;
4403 }
4404
4405 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
4406 {
4407         kvm_make_request(KVM_REQ_SMI, vcpu);
4408
4409         return 0;
4410 }
4411
4412 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
4413                                            struct kvm_tpr_access_ctl *tac)
4414 {
4415         if (tac->flags)
4416                 return -EINVAL;
4417         vcpu->arch.tpr_access_reporting = !!tac->enabled;
4418         return 0;
4419 }
4420
4421 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
4422                                         u64 mcg_cap)
4423 {
4424         int r;
4425         unsigned bank_num = mcg_cap & 0xff, bank;
4426
4427         r = -EINVAL;
4428         if (!bank_num || bank_num > KVM_MAX_MCE_BANKS)
4429                 goto out;
4430         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
4431                 goto out;
4432         r = 0;
4433         vcpu->arch.mcg_cap = mcg_cap;
4434         /* Init IA32_MCG_CTL to all 1s */
4435         if (mcg_cap & MCG_CTL_P)
4436                 vcpu->arch.mcg_ctl = ~(u64)0;
4437         /* Init IA32_MCi_CTL to all 1s */
4438         for (bank = 0; bank < bank_num; bank++)
4439                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
4440
4441         static_call(kvm_x86_setup_mce)(vcpu);
4442 out:
4443         return r;
4444 }
4445
4446 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
4447                                       struct kvm_x86_mce *mce)
4448 {
4449         u64 mcg_cap = vcpu->arch.mcg_cap;
4450         unsigned bank_num = mcg_cap & 0xff;
4451         u64 *banks = vcpu->arch.mce_banks;
4452
4453         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
4454                 return -EINVAL;
4455         /*
4456          * if IA32_MCG_CTL is not all 1s, the uncorrected error
4457          * reporting is disabled
4458          */
4459         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
4460             vcpu->arch.mcg_ctl != ~(u64)0)
4461                 return 0;
4462         banks += 4 * mce->bank;
4463         /*
4464          * if IA32_MCi_CTL is not all 1s, the uncorrected error
4465          * reporting is disabled for the bank
4466          */
4467         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
4468                 return 0;
4469         if (mce->status & MCI_STATUS_UC) {
4470                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
4471                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
4472                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
4473                         return 0;
4474                 }
4475                 if (banks[1] & MCI_STATUS_VAL)
4476                         mce->status |= MCI_STATUS_OVER;
4477                 banks[2] = mce->addr;
4478                 banks[3] = mce->misc;
4479                 vcpu->arch.mcg_status = mce->mcg_status;
4480                 banks[1] = mce->status;
4481                 kvm_queue_exception(vcpu, MC_VECTOR);
4482         } else if (!(banks[1] & MCI_STATUS_VAL)
4483                    || !(banks[1] & MCI_STATUS_UC)) {
4484                 if (banks[1] & MCI_STATUS_VAL)
4485                         mce->status |= MCI_STATUS_OVER;
4486                 banks[2] = mce->addr;
4487                 banks[3] = mce->misc;
4488                 banks[1] = mce->status;
4489         } else
4490                 banks[1] |= MCI_STATUS_OVER;
4491         return 0;
4492 }
4493
4494 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
4495                                                struct kvm_vcpu_events *events)
4496 {
4497         process_nmi(vcpu);
4498
4499         if (kvm_check_request(KVM_REQ_SMI, vcpu))
4500                 process_smi(vcpu);
4501
4502         /*
4503          * In guest mode, payload delivery should be deferred,
4504          * so that the L1 hypervisor can intercept #PF before
4505          * CR2 is modified (or intercept #DB before DR6 is
4506          * modified under nVMX). Unless the per-VM capability,
4507          * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4508          * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4509          * opportunistically defer the exception payload, deliver it if the
4510          * capability hasn't been requested before processing a
4511          * KVM_GET_VCPU_EVENTS.
4512          */
4513         if (!vcpu->kvm->arch.exception_payload_enabled &&
4514             vcpu->arch.exception.pending && vcpu->arch.exception.has_payload)
4515                 kvm_deliver_exception_payload(vcpu);
4516
4517         /*
4518          * The API doesn't provide the instruction length for software
4519          * exceptions, so don't report them. As long as the guest RIP
4520          * isn't advanced, we should expect to encounter the exception
4521          * again.
4522          */
4523         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
4524                 events->exception.injected = 0;
4525                 events->exception.pending = 0;
4526         } else {
4527                 events->exception.injected = vcpu->arch.exception.injected;
4528                 events->exception.pending = vcpu->arch.exception.pending;
4529                 /*
4530                  * For ABI compatibility, deliberately conflate
4531                  * pending and injected exceptions when
4532                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4533                  */
4534                 if (!vcpu->kvm->arch.exception_payload_enabled)
4535                         events->exception.injected |=
4536                                 vcpu->arch.exception.pending;
4537         }
4538         events->exception.nr = vcpu->arch.exception.nr;
4539         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
4540         events->exception.error_code = vcpu->arch.exception.error_code;
4541         events->exception_has_payload = vcpu->arch.exception.has_payload;
4542         events->exception_payload = vcpu->arch.exception.payload;
4543
4544         events->interrupt.injected =
4545                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
4546         events->interrupt.nr = vcpu->arch.interrupt.nr;
4547         events->interrupt.soft = 0;
4548         events->interrupt.shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
4549
4550         events->nmi.injected = vcpu->arch.nmi_injected;
4551         events->nmi.pending = vcpu->arch.nmi_pending != 0;
4552         events->nmi.masked = static_call(kvm_x86_get_nmi_mask)(vcpu);
4553         events->nmi.pad = 0;
4554
4555         events->sipi_vector = 0; /* never valid when reporting to user space */
4556
4557         events->smi.smm = is_smm(vcpu);
4558         events->smi.pending = vcpu->arch.smi_pending;
4559         events->smi.smm_inside_nmi =
4560                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
4561         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
4562
4563         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
4564                          | KVM_VCPUEVENT_VALID_SHADOW
4565                          | KVM_VCPUEVENT_VALID_SMM);
4566         if (vcpu->kvm->arch.exception_payload_enabled)
4567                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
4568
4569         memset(&events->reserved, 0, sizeof(events->reserved));
4570 }
4571
4572 static void kvm_smm_changed(struct kvm_vcpu *vcpu, bool entering_smm);
4573
4574 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
4575                                               struct kvm_vcpu_events *events)
4576 {
4577         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4578                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4579                               | KVM_VCPUEVENT_VALID_SHADOW
4580                               | KVM_VCPUEVENT_VALID_SMM
4581                               | KVM_VCPUEVENT_VALID_PAYLOAD))
4582                 return -EINVAL;
4583
4584         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
4585                 if (!vcpu->kvm->arch.exception_payload_enabled)
4586                         return -EINVAL;
4587                 if (events->exception.pending)
4588                         events->exception.injected = 0;
4589                 else
4590                         events->exception_has_payload = 0;
4591         } else {
4592                 events->exception.pending = 0;
4593                 events->exception_has_payload = 0;
4594         }
4595
4596         if ((events->exception.injected || events->exception.pending) &&
4597             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
4598                 return -EINVAL;
4599
4600         /* INITs are latched while in SMM */
4601         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
4602             (events->smi.smm || events->smi.pending) &&
4603             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
4604                 return -EINVAL;
4605
4606         process_nmi(vcpu);
4607         vcpu->arch.exception.injected = events->exception.injected;
4608         vcpu->arch.exception.pending = events->exception.pending;
4609         vcpu->arch.exception.nr = events->exception.nr;
4610         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
4611         vcpu->arch.exception.error_code = events->exception.error_code;
4612         vcpu->arch.exception.has_payload = events->exception_has_payload;
4613         vcpu->arch.exception.payload = events->exception_payload;
4614
4615         vcpu->arch.interrupt.injected = events->interrupt.injected;
4616         vcpu->arch.interrupt.nr = events->interrupt.nr;
4617         vcpu->arch.interrupt.soft = events->interrupt.soft;
4618         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
4619                 static_call(kvm_x86_set_interrupt_shadow)(vcpu,
4620                                                 events->interrupt.shadow);
4621
4622         vcpu->arch.nmi_injected = events->nmi.injected;
4623         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
4624                 vcpu->arch.nmi_pending = events->nmi.pending;
4625         static_call(kvm_x86_set_nmi_mask)(vcpu, events->nmi.masked);
4626
4627         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
4628             lapic_in_kernel(vcpu))
4629                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
4630
4631         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
4632                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm)
4633                         kvm_smm_changed(vcpu, events->smi.smm);
4634
4635                 vcpu->arch.smi_pending = events->smi.pending;
4636
4637                 if (events->smi.smm) {
4638                         if (events->smi.smm_inside_nmi)
4639                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
4640                         else
4641                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
4642                 }
4643
4644                 if (lapic_in_kernel(vcpu)) {
4645                         if (events->smi.latched_init)
4646                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4647                         else
4648                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4649                 }
4650         }
4651
4652         kvm_make_request(KVM_REQ_EVENT, vcpu);
4653
4654         return 0;
4655 }
4656
4657 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
4658                                              struct kvm_debugregs *dbgregs)
4659 {
4660         unsigned long val;
4661
4662         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
4663         kvm_get_dr(vcpu, 6, &val);
4664         dbgregs->dr6 = val;
4665         dbgregs->dr7 = vcpu->arch.dr7;
4666         dbgregs->flags = 0;
4667         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
4668 }
4669
4670 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
4671                                             struct kvm_debugregs *dbgregs)
4672 {
4673         if (dbgregs->flags)
4674                 return -EINVAL;
4675
4676         if (!kvm_dr6_valid(dbgregs->dr6))
4677                 return -EINVAL;
4678         if (!kvm_dr7_valid(dbgregs->dr7))
4679                 return -EINVAL;
4680
4681         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
4682         kvm_update_dr0123(vcpu);
4683         vcpu->arch.dr6 = dbgregs->dr6;
4684         vcpu->arch.dr7 = dbgregs->dr7;
4685         kvm_update_dr7(vcpu);
4686
4687         return 0;
4688 }
4689
4690 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
4691
4692 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
4693 {
4694         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4695         u64 xstate_bv = xsave->header.xfeatures;
4696         u64 valid;
4697
4698         /*
4699          * Copy legacy XSAVE area, to avoid complications with CPUID
4700          * leaves 0 and 1 in the loop below.
4701          */
4702         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
4703
4704         /* Set XSTATE_BV */
4705         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
4706         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
4707
4708         /*
4709          * Copy each region from the possibly compacted offset to the
4710          * non-compacted offset.
4711          */
4712         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4713         while (valid) {
4714                 u32 size, offset, ecx, edx;
4715                 u64 xfeature_mask = valid & -valid;
4716                 int xfeature_nr = fls64(xfeature_mask) - 1;
4717                 void *src;
4718
4719                 cpuid_count(XSTATE_CPUID, xfeature_nr,
4720                             &size, &offset, &ecx, &edx);
4721
4722                 if (xfeature_nr == XFEATURE_PKRU) {
4723                         memcpy(dest + offset, &vcpu->arch.pkru,
4724                                sizeof(vcpu->arch.pkru));
4725                 } else {
4726                         src = get_xsave_addr(xsave, xfeature_nr);
4727                         if (src)
4728                                 memcpy(dest + offset, src, size);
4729                 }
4730
4731                 valid -= xfeature_mask;
4732         }
4733 }
4734
4735 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
4736 {
4737         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4738         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
4739         u64 valid;
4740
4741         /*
4742          * Copy legacy XSAVE area, to avoid complications with CPUID
4743          * leaves 0 and 1 in the loop below.
4744          */
4745         memcpy(xsave, src, XSAVE_HDR_OFFSET);
4746
4747         /* Set XSTATE_BV and possibly XCOMP_BV.  */
4748         xsave->header.xfeatures = xstate_bv;
4749         if (boot_cpu_has(X86_FEATURE_XSAVES))
4750                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
4751
4752         /*
4753          * Copy each region from the non-compacted offset to the
4754          * possibly compacted offset.
4755          */
4756         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4757         while (valid) {
4758                 u32 size, offset, ecx, edx;
4759                 u64 xfeature_mask = valid & -valid;
4760                 int xfeature_nr = fls64(xfeature_mask) - 1;
4761
4762                 cpuid_count(XSTATE_CPUID, xfeature_nr,
4763                             &size, &offset, &ecx, &edx);
4764
4765                 if (xfeature_nr == XFEATURE_PKRU) {
4766                         memcpy(&vcpu->arch.pkru, src + offset,
4767                                sizeof(vcpu->arch.pkru));
4768                 } else {
4769                         void *dest = get_xsave_addr(xsave, xfeature_nr);
4770
4771                         if (dest)
4772                                 memcpy(dest, src + offset, size);
4773                 }
4774
4775                 valid -= xfeature_mask;
4776         }
4777 }
4778
4779 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
4780                                          struct kvm_xsave *guest_xsave)
4781 {
4782         if (!vcpu->arch.guest_fpu)
4783                 return;
4784
4785         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4786                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
4787                 fill_xsave((u8 *) guest_xsave->region, vcpu);
4788         } else {
4789                 memcpy(guest_xsave->region,
4790                         &vcpu->arch.guest_fpu->state.fxsave,
4791                         sizeof(struct fxregs_state));
4792                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
4793                         XFEATURE_MASK_FPSSE;
4794         }
4795 }
4796
4797 #define XSAVE_MXCSR_OFFSET 24
4798
4799 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
4800                                         struct kvm_xsave *guest_xsave)
4801 {
4802         u64 xstate_bv;
4803         u32 mxcsr;
4804
4805         if (!vcpu->arch.guest_fpu)
4806                 return 0;
4807
4808         xstate_bv = *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
4809         mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
4810
4811         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4812                 /*
4813                  * Here we allow setting states that are not present in
4814                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
4815                  * with old userspace.
4816                  */
4817                 if (xstate_bv & ~supported_xcr0 || mxcsr & ~mxcsr_feature_mask)
4818                         return -EINVAL;
4819                 load_xsave(vcpu, (u8 *)guest_xsave->region);
4820         } else {
4821                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
4822                         mxcsr & ~mxcsr_feature_mask)
4823                         return -EINVAL;
4824                 memcpy(&vcpu->arch.guest_fpu->state.fxsave,
4825                         guest_xsave->region, sizeof(struct fxregs_state));
4826         }
4827         return 0;
4828 }
4829
4830 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
4831                                         struct kvm_xcrs *guest_xcrs)
4832 {
4833         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
4834                 guest_xcrs->nr_xcrs = 0;
4835                 return;
4836         }
4837
4838         guest_xcrs->nr_xcrs = 1;
4839         guest_xcrs->flags = 0;
4840         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
4841         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
4842 }
4843
4844 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
4845                                        struct kvm_xcrs *guest_xcrs)
4846 {
4847         int i, r = 0;
4848
4849         if (!boot_cpu_has(X86_FEATURE_XSAVE))
4850                 return -EINVAL;
4851
4852         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
4853                 return -EINVAL;
4854
4855         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
4856                 /* Only support XCR0 currently */
4857                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
4858                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
4859                                 guest_xcrs->xcrs[i].value);
4860                         break;
4861                 }
4862         if (r)
4863                 r = -EINVAL;
4864         return r;
4865 }
4866
4867 /*
4868  * kvm_set_guest_paused() indicates to the guest kernel that it has been
4869  * stopped by the hypervisor.  This function will be called from the host only.
4870  * EINVAL is returned when the host attempts to set the flag for a guest that
4871  * does not support pv clocks.
4872  */
4873 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
4874 {
4875         if (!vcpu->arch.pv_time_enabled)
4876                 return -EINVAL;
4877         vcpu->arch.pvclock_set_guest_stopped_request = true;
4878         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4879         return 0;
4880 }
4881
4882 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
4883                                      struct kvm_enable_cap *cap)
4884 {
4885         int r;
4886         uint16_t vmcs_version;
4887         void __user *user_ptr;
4888
4889         if (cap->flags)
4890                 return -EINVAL;
4891
4892         switch (cap->cap) {
4893         case KVM_CAP_HYPERV_SYNIC2:
4894                 if (cap->args[0])
4895                         return -EINVAL;
4896                 fallthrough;
4897
4898         case KVM_CAP_HYPERV_SYNIC:
4899                 if (!irqchip_in_kernel(vcpu->kvm))
4900                         return -EINVAL;
4901                 return kvm_hv_activate_synic(vcpu, cap->cap ==
4902                                              KVM_CAP_HYPERV_SYNIC2);
4903         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4904                 if (!kvm_x86_ops.nested_ops->enable_evmcs)
4905                         return -ENOTTY;
4906                 r = kvm_x86_ops.nested_ops->enable_evmcs(vcpu, &vmcs_version);
4907                 if (!r) {
4908                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
4909                         if (copy_to_user(user_ptr, &vmcs_version,
4910                                          sizeof(vmcs_version)))
4911                                 r = -EFAULT;
4912                 }
4913                 return r;
4914         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4915                 if (!kvm_x86_ops.enable_direct_tlbflush)
4916                         return -ENOTTY;
4917
4918                 return static_call(kvm_x86_enable_direct_tlbflush)(vcpu);
4919
4920         case KVM_CAP_HYPERV_ENFORCE_CPUID:
4921                 return kvm_hv_set_enforce_cpuid(vcpu, cap->args[0]);
4922
4923         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4924                 vcpu->arch.pv_cpuid.enforce = cap->args[0];
4925                 if (vcpu->arch.pv_cpuid.enforce)
4926                         kvm_update_pv_runtime(vcpu);
4927
4928                 return 0;
4929         default:
4930                 return -EINVAL;
4931         }
4932 }
4933
4934 long kvm_arch_vcpu_ioctl(struct file *filp,
4935                          unsigned int ioctl, unsigned long arg)
4936 {
4937         struct kvm_vcpu *vcpu = filp->private_data;
4938         void __user *argp = (void __user *)arg;
4939         int r;
4940         union {
4941                 struct kvm_sregs2 *sregs2;
4942                 struct kvm_lapic_state *lapic;
4943                 struct kvm_xsave *xsave;
4944                 struct kvm_xcrs *xcrs;
4945                 void *buffer;
4946         } u;
4947
4948         vcpu_load(vcpu);
4949
4950         u.buffer = NULL;
4951         switch (ioctl) {
4952         case KVM_GET_LAPIC: {
4953                 r = -EINVAL;
4954                 if (!lapic_in_kernel(vcpu))
4955                         goto out;
4956                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
4957                                 GFP_KERNEL_ACCOUNT);
4958
4959                 r = -ENOMEM;
4960                 if (!u.lapic)
4961                         goto out;
4962                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
4963                 if (r)
4964                         goto out;
4965                 r = -EFAULT;
4966                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
4967                         goto out;
4968                 r = 0;
4969                 break;
4970         }
4971         case KVM_SET_LAPIC: {
4972                 r = -EINVAL;
4973                 if (!lapic_in_kernel(vcpu))
4974                         goto out;
4975                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
4976                 if (IS_ERR(u.lapic)) {
4977                         r = PTR_ERR(u.lapic);
4978                         goto out_nofree;
4979                 }
4980
4981                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
4982                 break;
4983         }
4984         case KVM_INTERRUPT: {
4985                 struct kvm_interrupt irq;
4986
4987                 r = -EFAULT;
4988                 if (copy_from_user(&irq, argp, sizeof(irq)))
4989                         goto out;
4990                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
4991                 break;
4992         }
4993         case KVM_NMI: {
4994                 r = kvm_vcpu_ioctl_nmi(vcpu);
4995                 break;
4996         }
4997         case KVM_SMI: {
4998                 r = kvm_vcpu_ioctl_smi(vcpu);
4999                 break;
5000         }
5001         case KVM_SET_CPUID: {
5002                 struct kvm_cpuid __user *cpuid_arg = argp;
5003                 struct kvm_cpuid cpuid;
5004
5005                 r = -EFAULT;
5006                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5007                         goto out;
5008                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
5009                 break;
5010         }
5011         case KVM_SET_CPUID2: {
5012                 struct kvm_cpuid2 __user *cpuid_arg = argp;
5013                 struct kvm_cpuid2 cpuid;
5014
5015                 r = -EFAULT;
5016                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5017                         goto out;
5018                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
5019                                               cpuid_arg->entries);
5020                 break;
5021         }
5022         case KVM_GET_CPUID2: {
5023                 struct kvm_cpuid2 __user *cpuid_arg = argp;
5024                 struct kvm_cpuid2 cpuid;
5025
5026                 r = -EFAULT;
5027                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5028                         goto out;
5029                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
5030                                               cpuid_arg->entries);
5031                 if (r)
5032                         goto out;
5033                 r = -EFAULT;
5034                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
5035                         goto out;
5036                 r = 0;
5037                 break;
5038         }
5039         case KVM_GET_MSRS: {
5040                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5041                 r = msr_io(vcpu, argp, do_get_msr, 1);
5042                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5043                 break;
5044         }
5045         case KVM_SET_MSRS: {
5046                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5047                 r = msr_io(vcpu, argp, do_set_msr, 0);
5048                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5049                 break;
5050         }
5051         case KVM_TPR_ACCESS_REPORTING: {
5052                 struct kvm_tpr_access_ctl tac;
5053
5054                 r = -EFAULT;
5055                 if (copy_from_user(&tac, argp, sizeof(tac)))
5056                         goto out;
5057                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
5058                 if (r)
5059                         goto out;
5060                 r = -EFAULT;
5061                 if (copy_to_user(argp, &tac, sizeof(tac)))
5062                         goto out;
5063                 r = 0;
5064                 break;
5065         };
5066         case KVM_SET_VAPIC_ADDR: {
5067                 struct kvm_vapic_addr va;
5068                 int idx;
5069
5070                 r = -EINVAL;
5071                 if (!lapic_in_kernel(vcpu))
5072                         goto out;
5073                 r = -EFAULT;
5074                 if (copy_from_user(&va, argp, sizeof(va)))
5075                         goto out;
5076                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5077                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
5078                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5079                 break;
5080         }
5081         case KVM_X86_SETUP_MCE: {
5082                 u64 mcg_cap;
5083
5084                 r = -EFAULT;
5085                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
5086                         goto out;
5087                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
5088                 break;
5089         }
5090         case KVM_X86_SET_MCE: {
5091                 struct kvm_x86_mce mce;
5092
5093                 r = -EFAULT;
5094                 if (copy_from_user(&mce, argp, sizeof(mce)))
5095                         goto out;
5096                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
5097                 break;
5098         }
5099         case KVM_GET_VCPU_EVENTS: {
5100                 struct kvm_vcpu_events events;
5101
5102                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
5103
5104                 r = -EFAULT;
5105                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
5106                         break;
5107                 r = 0;
5108                 break;
5109         }
5110         case KVM_SET_VCPU_EVENTS: {
5111                 struct kvm_vcpu_events events;
5112
5113                 r = -EFAULT;
5114                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
5115                         break;
5116
5117                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
5118                 break;
5119         }
5120         case KVM_GET_DEBUGREGS: {
5121                 struct kvm_debugregs dbgregs;
5122
5123                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
5124
5125                 r = -EFAULT;
5126                 if (copy_to_user(argp, &dbgregs,
5127                                  sizeof(struct kvm_debugregs)))
5128                         break;
5129                 r = 0;
5130                 break;
5131         }
5132         case KVM_SET_DEBUGREGS: {
5133                 struct kvm_debugregs dbgregs;
5134
5135                 r = -EFAULT;
5136                 if (copy_from_user(&dbgregs, argp,
5137                                    sizeof(struct kvm_debugregs)))
5138                         break;
5139
5140                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
5141                 break;
5142         }
5143         case KVM_GET_XSAVE: {
5144                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
5145                 r = -ENOMEM;
5146                 if (!u.xsave)
5147                         break;
5148
5149                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
5150
5151                 r = -EFAULT;
5152                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
5153                         break;
5154                 r = 0;
5155                 break;
5156         }
5157         case KVM_SET_XSAVE: {
5158                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
5159                 if (IS_ERR(u.xsave)) {
5160                         r = PTR_ERR(u.xsave);
5161                         goto out_nofree;
5162                 }
5163
5164                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
5165                 break;
5166         }
5167         case KVM_GET_XCRS: {
5168                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
5169                 r = -ENOMEM;
5170                 if (!u.xcrs)
5171                         break;
5172
5173                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
5174
5175                 r = -EFAULT;
5176                 if (copy_to_user(argp, u.xcrs,
5177                                  sizeof(struct kvm_xcrs)))
5178                         break;
5179                 r = 0;
5180                 break;
5181         }
5182         case KVM_SET_XCRS: {
5183                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
5184                 if (IS_ERR(u.xcrs)) {
5185                         r = PTR_ERR(u.xcrs);
5186                         goto out_nofree;
5187                 }
5188
5189                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
5190                 break;
5191         }
5192         case KVM_SET_TSC_KHZ: {
5193                 u32 user_tsc_khz;
5194
5195                 r = -EINVAL;
5196                 user_tsc_khz = (u32)arg;
5197
5198                 if (kvm_has_tsc_control &&
5199                     user_tsc_khz >= kvm_max_guest_tsc_khz)
5200                         goto out;
5201
5202                 if (user_tsc_khz == 0)
5203                         user_tsc_khz = tsc_khz;
5204
5205                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
5206                         r = 0;
5207
5208                 goto out;
5209         }
5210         case KVM_GET_TSC_KHZ: {
5211                 r = vcpu->arch.virtual_tsc_khz;
5212                 goto out;
5213         }
5214         case KVM_KVMCLOCK_CTRL: {
5215                 r = kvm_set_guest_paused(vcpu);
5216                 goto out;
5217         }
5218         case KVM_ENABLE_CAP: {
5219                 struct kvm_enable_cap cap;
5220
5221                 r = -EFAULT;
5222                 if (copy_from_user(&cap, argp, sizeof(cap)))
5223                         goto out;
5224                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
5225                 break;
5226         }
5227         case KVM_GET_NESTED_STATE: {
5228                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5229                 u32 user_data_size;
5230
5231                 r = -EINVAL;
5232                 if (!kvm_x86_ops.nested_ops->get_state)
5233                         break;
5234
5235                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
5236                 r = -EFAULT;
5237                 if (get_user(user_data_size, &user_kvm_nested_state->size))
5238                         break;
5239
5240                 r = kvm_x86_ops.nested_ops->get_state(vcpu, user_kvm_nested_state,
5241                                                      user_data_size);
5242                 if (r < 0)
5243                         break;
5244
5245                 if (r > user_data_size) {
5246                         if (put_user(r, &user_kvm_nested_state->size))
5247                                 r = -EFAULT;
5248                         else
5249                                 r = -E2BIG;
5250                         break;
5251                 }
5252
5253                 r = 0;
5254                 break;
5255         }
5256         case KVM_SET_NESTED_STATE: {
5257                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5258                 struct kvm_nested_state kvm_state;
5259                 int idx;
5260
5261                 r = -EINVAL;
5262                 if (!kvm_x86_ops.nested_ops->set_state)
5263                         break;
5264
5265                 r = -EFAULT;
5266                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
5267                         break;
5268
5269                 r = -EINVAL;
5270                 if (kvm_state.size < sizeof(kvm_state))
5271                         break;
5272
5273                 if (kvm_state.flags &
5274                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
5275                       | KVM_STATE_NESTED_EVMCS | KVM_STATE_NESTED_MTF_PENDING
5276                       | KVM_STATE_NESTED_GIF_SET))
5277                         break;
5278
5279                 /* nested_run_pending implies guest_mode.  */
5280                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
5281                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
5282                         break;
5283
5284                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5285                 r = kvm_x86_ops.nested_ops->set_state(vcpu, user_kvm_nested_state, &kvm_state);
5286                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5287                 break;
5288         }
5289         case KVM_GET_SUPPORTED_HV_CPUID:
5290                 r = kvm_ioctl_get_supported_hv_cpuid(vcpu, argp);
5291                 break;
5292 #ifdef CONFIG_KVM_XEN
5293         case KVM_XEN_VCPU_GET_ATTR: {
5294                 struct kvm_xen_vcpu_attr xva;
5295
5296                 r = -EFAULT;
5297                 if (copy_from_user(&xva, argp, sizeof(xva)))
5298                         goto out;
5299                 r = kvm_xen_vcpu_get_attr(vcpu, &xva);
5300                 if (!r && copy_to_user(argp, &xva, sizeof(xva)))
5301                         r = -EFAULT;
5302                 break;
5303         }
5304         case KVM_XEN_VCPU_SET_ATTR: {
5305                 struct kvm_xen_vcpu_attr xva;
5306
5307                 r = -EFAULT;
5308                 if (copy_from_user(&xva, argp, sizeof(xva)))
5309                         goto out;
5310                 r = kvm_xen_vcpu_set_attr(vcpu, &xva);
5311                 break;
5312         }
5313 #endif
5314         case KVM_GET_SREGS2: {
5315                 u.sregs2 = kzalloc(sizeof(struct kvm_sregs2), GFP_KERNEL);
5316                 r = -ENOMEM;
5317                 if (!u.sregs2)
5318                         goto out;
5319                 __get_sregs2(vcpu, u.sregs2);
5320                 r = -EFAULT;
5321                 if (copy_to_user(argp, u.sregs2, sizeof(struct kvm_sregs2)))
5322                         goto out;
5323                 r = 0;
5324                 break;
5325         }
5326         case KVM_SET_SREGS2: {
5327                 u.sregs2 = memdup_user(argp, sizeof(struct kvm_sregs2));
5328                 if (IS_ERR(u.sregs2)) {
5329                         r = PTR_ERR(u.sregs2);
5330                         u.sregs2 = NULL;
5331                         goto out;
5332                 }
5333                 r = __set_sregs2(vcpu, u.sregs2);
5334                 break;
5335         }
5336         default:
5337                 r = -EINVAL;
5338         }
5339 out:
5340         kfree(u.buffer);
5341 out_nofree:
5342         vcpu_put(vcpu);
5343         return r;
5344 }
5345
5346 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
5347 {
5348         return VM_FAULT_SIGBUS;
5349 }
5350
5351 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
5352 {
5353         int ret;
5354
5355         if (addr > (unsigned int)(-3 * PAGE_SIZE))
5356                 return -EINVAL;
5357         ret = static_call(kvm_x86_set_tss_addr)(kvm, addr);
5358         return ret;
5359 }
5360
5361 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
5362                                               u64 ident_addr)
5363 {
5364         return static_call(kvm_x86_set_identity_map_addr)(kvm, ident_addr);
5365 }
5366
5367 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
5368                                          unsigned long kvm_nr_mmu_pages)
5369 {
5370         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
5371                 return -EINVAL;
5372
5373         mutex_lock(&kvm->slots_lock);
5374
5375         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
5376         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
5377
5378         mutex_unlock(&kvm->slots_lock);
5379         return 0;
5380 }
5381
5382 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
5383 {
5384         return kvm->arch.n_max_mmu_pages;
5385 }
5386
5387 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5388 {
5389         struct kvm_pic *pic = kvm->arch.vpic;
5390         int r;
5391
5392         r = 0;
5393         switch (chip->chip_id) {
5394         case KVM_IRQCHIP_PIC_MASTER:
5395                 memcpy(&chip->chip.pic, &pic->pics[0],
5396                         sizeof(struct kvm_pic_state));
5397                 break;
5398         case KVM_IRQCHIP_PIC_SLAVE:
5399                 memcpy(&chip->chip.pic, &pic->pics[1],
5400                         sizeof(struct kvm_pic_state));
5401                 break;
5402         case KVM_IRQCHIP_IOAPIC:
5403                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
5404                 break;
5405         default:
5406                 r = -EINVAL;
5407                 break;
5408         }
5409         return r;
5410 }
5411
5412 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5413 {
5414         struct kvm_pic *pic = kvm->arch.vpic;
5415         int r;
5416
5417         r = 0;
5418         switch (chip->chip_id) {
5419         case KVM_IRQCHIP_PIC_MASTER:
5420                 spin_lock(&pic->lock);
5421                 memcpy(&pic->pics[0], &chip->chip.pic,
5422                         sizeof(struct kvm_pic_state));
5423                 spin_unlock(&pic->lock);
5424                 break;
5425         case KVM_IRQCHIP_PIC_SLAVE:
5426                 spin_lock(&pic->lock);
5427                 memcpy(&pic->pics[1], &chip->chip.pic,
5428                         sizeof(struct kvm_pic_state));
5429                 spin_unlock(&pic->lock);
5430                 break;
5431         case KVM_IRQCHIP_IOAPIC:
5432                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
5433                 break;
5434         default:
5435                 r = -EINVAL;
5436                 break;
5437         }
5438         kvm_pic_update_irq(pic);
5439         return r;
5440 }
5441
5442 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5443 {
5444         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
5445
5446         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
5447
5448         mutex_lock(&kps->lock);
5449         memcpy(ps, &kps->channels, sizeof(*ps));
5450         mutex_unlock(&kps->lock);
5451         return 0;
5452 }
5453
5454 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5455 {
5456         int i;
5457         struct kvm_pit *pit = kvm->arch.vpit;
5458
5459         mutex_lock(&pit->pit_state.lock);
5460         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
5461         for (i = 0; i < 3; i++)
5462                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
5463         mutex_unlock(&pit->pit_state.lock);
5464         return 0;
5465 }
5466
5467 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5468 {
5469         mutex_lock(&kvm->arch.vpit->pit_state.lock);
5470         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
5471                 sizeof(ps->channels));
5472         ps->flags = kvm->arch.vpit->pit_state.flags;
5473         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
5474         memset(&ps->reserved, 0, sizeof(ps->reserved));
5475         return 0;
5476 }
5477
5478 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5479 {
5480         int start = 0;
5481         int i;
5482         u32 prev_legacy, cur_legacy;
5483         struct kvm_pit *pit = kvm->arch.vpit;
5484
5485         mutex_lock(&pit->pit_state.lock);
5486         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
5487         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
5488         if (!prev_legacy && cur_legacy)
5489                 start = 1;
5490         memcpy(&pit->pit_state.channels, &ps->channels,
5491                sizeof(pit->pit_state.channels));
5492         pit->pit_state.flags = ps->flags;
5493         for (i = 0; i < 3; i++)
5494                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
5495                                    start && i == 0);
5496         mutex_unlock(&pit->pit_state.lock);
5497         return 0;
5498 }
5499
5500 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
5501                                  struct kvm_reinject_control *control)
5502 {
5503         struct kvm_pit *pit = kvm->arch.vpit;
5504
5505         /* pit->pit_state.lock was overloaded to prevent userspace from getting
5506          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5507          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
5508          */
5509         mutex_lock(&pit->pit_state.lock);
5510         kvm_pit_set_reinject(pit, control->pit_reinject);
5511         mutex_unlock(&pit->pit_state.lock);
5512
5513         return 0;
5514 }
5515
5516 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
5517 {
5518
5519         /*
5520          * Flush all CPUs' dirty log buffers to the  dirty_bitmap.  Called
5521          * before reporting dirty_bitmap to userspace.  KVM flushes the buffers
5522          * on all VM-Exits, thus we only need to kick running vCPUs to force a
5523          * VM-Exit.
5524          */
5525         struct kvm_vcpu *vcpu;
5526         int i;
5527
5528         kvm_for_each_vcpu(i, vcpu, kvm)
5529                 kvm_vcpu_kick(vcpu);
5530 }
5531
5532 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
5533                         bool line_status)
5534 {
5535         if (!irqchip_in_kernel(kvm))
5536                 return -ENXIO;
5537
5538         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
5539                                         irq_event->irq, irq_event->level,
5540                                         line_status);
5541         return 0;
5542 }
5543
5544 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
5545                             struct kvm_enable_cap *cap)
5546 {
5547         int r;
5548
5549         if (cap->flags)
5550                 return -EINVAL;
5551
5552         switch (cap->cap) {
5553         case KVM_CAP_DISABLE_QUIRKS:
5554                 kvm->arch.disabled_quirks = cap->args[0];
5555                 r = 0;
5556                 break;
5557         case KVM_CAP_SPLIT_IRQCHIP: {
5558                 mutex_lock(&kvm->lock);
5559                 r = -EINVAL;
5560                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
5561                         goto split_irqchip_unlock;
5562                 r = -EEXIST;
5563                 if (irqchip_in_kernel(kvm))
5564                         goto split_irqchip_unlock;
5565                 if (kvm->created_vcpus)
5566                         goto split_irqchip_unlock;
5567                 r = kvm_setup_empty_irq_routing(kvm);
5568                 if (r)
5569                         goto split_irqchip_unlock;
5570                 /* Pairs with irqchip_in_kernel. */
5571                 smp_wmb();
5572                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
5573                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
5574                 r = 0;
5575 split_irqchip_unlock:
5576                 mutex_unlock(&kvm->lock);
5577                 break;
5578         }
5579         case KVM_CAP_X2APIC_API:
5580                 r = -EINVAL;
5581                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
5582                         break;
5583
5584                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
5585                         kvm->arch.x2apic_format = true;
5586                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
5587                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
5588
5589                 r = 0;
5590                 break;
5591         case KVM_CAP_X86_DISABLE_EXITS:
5592                 r = -EINVAL;
5593                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
5594                         break;
5595
5596                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
5597                         kvm_can_mwait_in_guest())
5598                         kvm->arch.mwait_in_guest = true;
5599                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
5600                         kvm->arch.hlt_in_guest = true;
5601                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
5602                         kvm->arch.pause_in_guest = true;
5603                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
5604                         kvm->arch.cstate_in_guest = true;
5605                 r = 0;
5606                 break;
5607         case KVM_CAP_MSR_PLATFORM_INFO:
5608                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
5609                 r = 0;
5610                 break;
5611         case KVM_CAP_EXCEPTION_PAYLOAD:
5612                 kvm->arch.exception_payload_enabled = cap->args[0];
5613                 r = 0;
5614                 break;
5615         case KVM_CAP_X86_USER_SPACE_MSR:
5616                 kvm->arch.user_space_msr_mask = cap->args[0];
5617                 r = 0;
5618                 break;
5619         case KVM_CAP_X86_BUS_LOCK_EXIT:
5620                 r = -EINVAL;
5621                 if (cap->args[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE)
5622                         break;
5623
5624                 if ((cap->args[0] & KVM_BUS_LOCK_DETECTION_OFF) &&
5625                     (cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT))
5626                         break;
5627
5628                 if (kvm_has_bus_lock_exit &&
5629                     cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT)
5630                         kvm->arch.bus_lock_detection_enabled = true;
5631                 r = 0;
5632                 break;
5633 #ifdef CONFIG_X86_SGX_KVM
5634         case KVM_CAP_SGX_ATTRIBUTE: {
5635                 unsigned long allowed_attributes = 0;
5636
5637                 r = sgx_set_attribute(&allowed_attributes, cap->args[0]);
5638                 if (r)
5639                         break;
5640
5641                 /* KVM only supports the PROVISIONKEY privileged attribute. */
5642                 if ((allowed_attributes & SGX_ATTR_PROVISIONKEY) &&
5643                     !(allowed_attributes & ~SGX_ATTR_PROVISIONKEY))
5644                         kvm->arch.sgx_provisioning_allowed = true;
5645                 else
5646                         r = -EINVAL;
5647                 break;
5648         }
5649 #endif
5650         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
5651                 r = -EINVAL;
5652                 if (kvm_x86_ops.vm_copy_enc_context_from)
5653                         r = kvm_x86_ops.vm_copy_enc_context_from(kvm, cap->args[0]);
5654                 return r;
5655         case KVM_CAP_EXIT_HYPERCALL:
5656                 if (cap->args[0] & ~KVM_EXIT_HYPERCALL_VALID_MASK) {
5657                         r = -EINVAL;
5658                         break;
5659                 }
5660                 kvm->arch.hypercall_exit_enabled = cap->args[0];
5661                 r = 0;
5662                 break;
5663         case KVM_CAP_EXIT_ON_EMULATION_FAILURE:
5664                 r = -EINVAL;
5665                 if (cap->args[0] & ~1)
5666                         break;
5667                 kvm->arch.exit_on_emulation_error = cap->args[0];
5668                 r = 0;
5669                 break;
5670         default:
5671                 r = -EINVAL;
5672                 break;
5673         }
5674         return r;
5675 }
5676
5677 static struct kvm_x86_msr_filter *kvm_alloc_msr_filter(bool default_allow)
5678 {
5679         struct kvm_x86_msr_filter *msr_filter;
5680
5681         msr_filter = kzalloc(sizeof(*msr_filter), GFP_KERNEL_ACCOUNT);
5682         if (!msr_filter)
5683                 return NULL;
5684
5685         msr_filter->default_allow = default_allow;
5686         return msr_filter;
5687 }
5688
5689 static void kvm_free_msr_filter(struct kvm_x86_msr_filter *msr_filter)
5690 {
5691         u32 i;
5692
5693         if (!msr_filter)
5694                 return;
5695
5696         for (i = 0; i < msr_filter->count; i++)
5697                 kfree(msr_filter->ranges[i].bitmap);
5698
5699         kfree(msr_filter);
5700 }
5701
5702 static int kvm_add_msr_filter(struct kvm_x86_msr_filter *msr_filter,
5703                               struct kvm_msr_filter_range *user_range)
5704 {
5705         unsigned long *bitmap = NULL;
5706         size_t bitmap_size;
5707
5708         if (!user_range->nmsrs)
5709                 return 0;
5710
5711         if (user_range->flags & ~(KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE))
5712                 return -EINVAL;
5713
5714         if (!user_range->flags)
5715                 return -EINVAL;
5716
5717         bitmap_size = BITS_TO_LONGS(user_range->nmsrs) * sizeof(long);
5718         if (!bitmap_size || bitmap_size > KVM_MSR_FILTER_MAX_BITMAP_SIZE)
5719                 return -EINVAL;
5720
5721         bitmap = memdup_user((__user u8*)user_range->bitmap, bitmap_size);
5722         if (IS_ERR(bitmap))
5723                 return PTR_ERR(bitmap);
5724
5725         msr_filter->ranges[msr_filter->count] = (struct msr_bitmap_range) {
5726                 .flags = user_range->flags,
5727                 .base = user_range->base,
5728                 .nmsrs = user_range->nmsrs,
5729                 .bitmap = bitmap,
5730         };
5731
5732         msr_filter->count++;
5733         return 0;
5734 }
5735
5736 static int kvm_vm_ioctl_set_msr_filter(struct kvm *kvm, void __user *argp)
5737 {
5738         struct kvm_msr_filter __user *user_msr_filter = argp;
5739         struct kvm_x86_msr_filter *new_filter, *old_filter;
5740         struct kvm_msr_filter filter;
5741         bool default_allow;
5742         bool empty = true;
5743         int r = 0;
5744         u32 i;
5745
5746         if (copy_from_user(&filter, user_msr_filter, sizeof(filter)))
5747                 return -EFAULT;
5748
5749         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++)
5750                 empty &= !filter.ranges[i].nmsrs;
5751
5752         default_allow = !(filter.flags & KVM_MSR_FILTER_DEFAULT_DENY);
5753         if (empty && !default_allow)
5754                 return -EINVAL;
5755
5756         new_filter = kvm_alloc_msr_filter(default_allow);
5757         if (!new_filter)
5758                 return -ENOMEM;
5759
5760         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++) {
5761                 r = kvm_add_msr_filter(new_filter, &filter.ranges[i]);
5762                 if (r) {
5763                         kvm_free_msr_filter(new_filter);
5764                         return r;
5765                 }
5766         }
5767
5768         mutex_lock(&kvm->lock);
5769
5770         /* The per-VM filter is protected by kvm->lock... */
5771         old_filter = srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1);
5772
5773         rcu_assign_pointer(kvm->arch.msr_filter, new_filter);
5774         synchronize_srcu(&kvm->srcu);
5775
5776         kvm_free_msr_filter(old_filter);
5777
5778         kvm_make_all_cpus_request(kvm, KVM_REQ_MSR_FILTER_CHANGED);
5779         mutex_unlock(&kvm->lock);
5780
5781         return 0;
5782 }
5783
5784 #ifdef CONFIG_HAVE_KVM_PM_NOTIFIER
5785 static int kvm_arch_suspend_notifier(struct kvm *kvm)
5786 {
5787         struct kvm_vcpu *vcpu;
5788         int i, ret = 0;
5789
5790         mutex_lock(&kvm->lock);
5791         kvm_for_each_vcpu(i, vcpu, kvm) {
5792                 if (!vcpu->arch.pv_time_enabled)
5793                         continue;
5794
5795                 ret = kvm_set_guest_paused(vcpu);
5796                 if (ret) {
5797                         kvm_err("Failed to pause guest VCPU%d: %d\n",
5798                                 vcpu->vcpu_id, ret);
5799                         break;
5800                 }
5801         }
5802         mutex_unlock(&kvm->lock);
5803
5804         return ret ? NOTIFY_BAD : NOTIFY_DONE;
5805 }
5806
5807 int kvm_arch_pm_notifier(struct kvm *kvm, unsigned long state)
5808 {
5809         switch (state) {
5810         case PM_HIBERNATION_PREPARE:
5811         case PM_SUSPEND_PREPARE:
5812                 return kvm_arch_suspend_notifier(kvm);
5813         }
5814
5815         return NOTIFY_DONE;
5816 }
5817 #endif /* CONFIG_HAVE_KVM_PM_NOTIFIER */
5818
5819 long kvm_arch_vm_ioctl(struct file *filp,
5820                        unsigned int ioctl, unsigned long arg)
5821 {
5822         struct kvm *kvm = filp->private_data;
5823         void __user *argp = (void __user *)arg;
5824         int r = -ENOTTY;
5825         /*
5826          * This union makes it completely explicit to gcc-3.x
5827          * that these two variables' stack usage should be
5828          * combined, not added together.
5829          */
5830         union {
5831                 struct kvm_pit_state ps;
5832                 struct kvm_pit_state2 ps2;
5833                 struct kvm_pit_config pit_config;
5834         } u;
5835
5836         switch (ioctl) {
5837         case KVM_SET_TSS_ADDR:
5838                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
5839                 break;
5840         case KVM_SET_IDENTITY_MAP_ADDR: {
5841                 u64 ident_addr;
5842
5843                 mutex_lock(&kvm->lock);
5844                 r = -EINVAL;
5845                 if (kvm->created_vcpus)
5846                         goto set_identity_unlock;
5847                 r = -EFAULT;
5848                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
5849                         goto set_identity_unlock;
5850                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
5851 set_identity_unlock:
5852                 mutex_unlock(&kvm->lock);
5853                 break;
5854         }
5855         case KVM_SET_NR_MMU_PAGES:
5856                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
5857                 break;
5858         case KVM_GET_NR_MMU_PAGES:
5859                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
5860                 break;
5861         case KVM_CREATE_IRQCHIP: {
5862                 mutex_lock(&kvm->lock);
5863
5864                 r = -EEXIST;
5865                 if (irqchip_in_kernel(kvm))
5866                         goto create_irqchip_unlock;
5867
5868                 r = -EINVAL;
5869                 if (kvm->created_vcpus)
5870                         goto create_irqchip_unlock;
5871
5872                 r = kvm_pic_init(kvm);
5873                 if (r)
5874                         goto create_irqchip_unlock;
5875
5876                 r = kvm_ioapic_init(kvm);
5877                 if (r) {
5878                         kvm_pic_destroy(kvm);
5879                         goto create_irqchip_unlock;
5880                 }
5881
5882                 r = kvm_setup_default_irq_routing(kvm);
5883                 if (r) {
5884                         kvm_ioapic_destroy(kvm);
5885                         kvm_pic_destroy(kvm);
5886                         goto create_irqchip_unlock;
5887                 }
5888                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
5889                 smp_wmb();
5890                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
5891         create_irqchip_unlock:
5892                 mutex_unlock(&kvm->lock);
5893                 break;
5894         }
5895         case KVM_CREATE_PIT:
5896                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
5897                 goto create_pit;
5898         case KVM_CREATE_PIT2:
5899                 r = -EFAULT;
5900                 if (copy_from_user(&u.pit_config, argp,
5901                                    sizeof(struct kvm_pit_config)))
5902                         goto out;
5903         create_pit:
5904                 mutex_lock(&kvm->lock);
5905                 r = -EEXIST;
5906                 if (kvm->arch.vpit)
5907                         goto create_pit_unlock;
5908                 r = -ENOMEM;
5909                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
5910                 if (kvm->arch.vpit)
5911                         r = 0;
5912         create_pit_unlock:
5913                 mutex_unlock(&kvm->lock);
5914                 break;
5915         case KVM_GET_IRQCHIP: {
5916                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5917                 struct kvm_irqchip *chip;
5918
5919                 chip = memdup_user(argp, sizeof(*chip));
5920                 if (IS_ERR(chip)) {
5921                         r = PTR_ERR(chip);
5922                         goto out;
5923                 }
5924
5925                 r = -ENXIO;
5926                 if (!irqchip_kernel(kvm))
5927                         goto get_irqchip_out;
5928                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
5929                 if (r)
5930                         goto get_irqchip_out;
5931                 r = -EFAULT;
5932                 if (copy_to_user(argp, chip, sizeof(*chip)))
5933                         goto get_irqchip_out;
5934                 r = 0;
5935         get_irqchip_out:
5936                 kfree(chip);
5937                 break;
5938         }
5939         case KVM_SET_IRQCHIP: {
5940                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5941                 struct kvm_irqchip *chip;
5942
5943                 chip = memdup_user(argp, sizeof(*chip));
5944                 if (IS_ERR(chip)) {
5945                         r = PTR_ERR(chip);
5946                         goto out;
5947                 }
5948
5949                 r = -ENXIO;
5950                 if (!irqchip_kernel(kvm))
5951                         goto set_irqchip_out;
5952                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
5953         set_irqchip_out:
5954                 kfree(chip);
5955                 break;
5956         }
5957         case KVM_GET_PIT: {
5958                 r = -EFAULT;
5959                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
5960                         goto out;
5961                 r = -ENXIO;
5962                 if (!kvm->arch.vpit)
5963                         goto out;
5964                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
5965                 if (r)
5966                         goto out;
5967                 r = -EFAULT;
5968                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
5969                         goto out;
5970                 r = 0;
5971                 break;
5972         }
5973         case KVM_SET_PIT: {
5974                 r = -EFAULT;
5975                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
5976                         goto out;
5977                 mutex_lock(&kvm->lock);
5978                 r = -ENXIO;
5979                 if (!kvm->arch.vpit)
5980                         goto set_pit_out;
5981                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
5982 set_pit_out:
5983                 mutex_unlock(&kvm->lock);
5984                 break;
5985         }
5986         case KVM_GET_PIT2: {
5987                 r = -ENXIO;
5988                 if (!kvm->arch.vpit)
5989                         goto out;
5990                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
5991                 if (r)
5992                         goto out;
5993                 r = -EFAULT;
5994                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
5995                         goto out;
5996                 r = 0;
5997                 break;
5998         }
5999         case KVM_SET_PIT2: {
6000                 r = -EFAULT;
6001                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
6002                         goto out;
6003                 mutex_lock(&kvm->lock);
6004                 r = -ENXIO;
6005                 if (!kvm->arch.vpit)
6006                         goto set_pit2_out;
6007                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
6008 set_pit2_out:
6009                 mutex_unlock(&kvm->lock);
6010                 break;
6011         }
6012         case KVM_REINJECT_CONTROL: {
6013                 struct kvm_reinject_control control;
6014                 r =  -EFAULT;
6015                 if (copy_from_user(&control, argp, sizeof(control)))
6016                         goto out;
6017                 r = -ENXIO;
6018                 if (!kvm->arch.vpit)
6019                         goto out;
6020                 r = kvm_vm_ioctl_reinject(kvm, &control);
6021                 break;
6022         }
6023         case KVM_SET_BOOT_CPU_ID:
6024                 r = 0;
6025                 mutex_lock(&kvm->lock);
6026                 if (kvm->created_vcpus)
6027                         r = -EBUSY;
6028                 else
6029                         kvm->arch.bsp_vcpu_id = arg;
6030                 mutex_unlock(&kvm->lock);
6031                 break;
6032 #ifdef CONFIG_KVM_XEN
6033         case KVM_XEN_HVM_CONFIG: {
6034                 struct kvm_xen_hvm_config xhc;
6035                 r = -EFAULT;
6036                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
6037                         goto out;
6038                 r = kvm_xen_hvm_config(kvm, &xhc);
6039                 break;
6040         }
6041         case KVM_XEN_HVM_GET_ATTR: {
6042                 struct kvm_xen_hvm_attr xha;
6043
6044                 r = -EFAULT;
6045                 if (copy_from_user(&xha, argp, sizeof(xha)))
6046                         goto out;
6047                 r = kvm_xen_hvm_get_attr(kvm, &xha);
6048                 if (!r && copy_to_user(argp, &xha, sizeof(xha)))
6049                         r = -EFAULT;
6050                 break;
6051         }
6052         case KVM_XEN_HVM_SET_ATTR: {
6053                 struct kvm_xen_hvm_attr xha;
6054
6055                 r = -EFAULT;
6056                 if (copy_from_user(&xha, argp, sizeof(xha)))
6057                         goto out;
6058                 r = kvm_xen_hvm_set_attr(kvm, &xha);
6059                 break;
6060         }
6061 #endif
6062         case KVM_SET_CLOCK: {
6063                 struct kvm_arch *ka = &kvm->arch;
6064                 struct kvm_clock_data user_ns;
6065                 u64 now_ns;
6066
6067                 r = -EFAULT;
6068                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
6069                         goto out;
6070
6071                 r = -EINVAL;
6072                 if (user_ns.flags)
6073                         goto out;
6074
6075                 r = 0;
6076                 /*
6077                  * TODO: userspace has to take care of races with VCPU_RUN, so
6078                  * kvm_gen_update_masterclock() can be cut down to locked
6079                  * pvclock_update_vm_gtod_copy().
6080                  */
6081                 kvm_gen_update_masterclock(kvm);
6082
6083                 /*
6084                  * This pairs with kvm_guest_time_update(): when masterclock is
6085                  * in use, we use master_kernel_ns + kvmclock_offset to set
6086                  * unsigned 'system_time' so if we use get_kvmclock_ns() (which
6087                  * is slightly ahead) here we risk going negative on unsigned
6088                  * 'system_time' when 'user_ns.clock' is very small.
6089                  */
6090                 spin_lock_irq(&ka->pvclock_gtod_sync_lock);
6091                 if (kvm->arch.use_master_clock)
6092                         now_ns = ka->master_kernel_ns;
6093                 else
6094                         now_ns = get_kvmclock_base_ns();
6095                 ka->kvmclock_offset = user_ns.clock - now_ns;
6096                 spin_unlock_irq(&ka->pvclock_gtod_sync_lock);
6097
6098                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
6099                 break;
6100         }
6101         case KVM_GET_CLOCK: {
6102                 struct kvm_clock_data user_ns;
6103                 u64 now_ns;
6104
6105                 now_ns = get_kvmclock_ns(kvm);
6106                 user_ns.clock = now_ns;
6107                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
6108                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
6109
6110                 r = -EFAULT;
6111                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
6112                         goto out;
6113                 r = 0;
6114                 break;
6115         }
6116         case KVM_MEMORY_ENCRYPT_OP: {
6117                 r = -ENOTTY;
6118                 if (kvm_x86_ops.mem_enc_op)
6119                         r = static_call(kvm_x86_mem_enc_op)(kvm, argp);
6120                 break;
6121         }
6122         case KVM_MEMORY_ENCRYPT_REG_REGION: {
6123                 struct kvm_enc_region region;
6124
6125                 r = -EFAULT;
6126                 if (copy_from_user(&region, argp, sizeof(region)))
6127                         goto out;
6128
6129                 r = -ENOTTY;
6130                 if (kvm_x86_ops.mem_enc_reg_region)
6131                         r = static_call(kvm_x86_mem_enc_reg_region)(kvm, &region);
6132                 break;
6133         }
6134         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
6135                 struct kvm_enc_region region;
6136
6137                 r = -EFAULT;
6138                 if (copy_from_user(&region, argp, sizeof(region)))
6139                         goto out;
6140
6141                 r = -ENOTTY;
6142                 if (kvm_x86_ops.mem_enc_unreg_region)
6143                         r = static_call(kvm_x86_mem_enc_unreg_region)(kvm, &region);
6144                 break;
6145         }
6146         case KVM_HYPERV_EVENTFD: {
6147                 struct kvm_hyperv_eventfd hvevfd;
6148
6149                 r = -EFAULT;
6150                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
6151                         goto out;
6152                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
6153                 break;
6154         }
6155         case KVM_SET_PMU_EVENT_FILTER:
6156                 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
6157                 break;
6158         case KVM_X86_SET_MSR_FILTER:
6159                 r = kvm_vm_ioctl_set_msr_filter(kvm, argp);
6160                 break;
6161         default:
6162                 r = -ENOTTY;
6163         }
6164 out:
6165         return r;
6166 }
6167
6168 static void kvm_init_msr_list(void)
6169 {
6170         struct x86_pmu_capability x86_pmu;
6171         u32 dummy[2];
6172         unsigned i;
6173
6174         BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
6175                          "Please update the fixed PMCs in msrs_to_saved_all[]");
6176
6177         perf_get_x86_pmu_capability(&x86_pmu);
6178
6179         num_msrs_to_save = 0;
6180         num_emulated_msrs = 0;
6181         num_msr_based_features = 0;
6182
6183         for (i = 0; i < ARRAY_SIZE(msrs_to_save_all); i++) {
6184                 if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
6185                         continue;
6186
6187                 /*
6188                  * Even MSRs that are valid in the host may not be exposed
6189                  * to the guests in some cases.
6190                  */
6191                 switch (msrs_to_save_all[i]) {
6192                 case MSR_IA32_BNDCFGS:
6193                         if (!kvm_mpx_supported())
6194                                 continue;
6195                         break;
6196                 case MSR_TSC_AUX:
6197                         if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP) &&
6198                             !kvm_cpu_cap_has(X86_FEATURE_RDPID))
6199                                 continue;
6200                         break;
6201                 case MSR_IA32_UMWAIT_CONTROL:
6202                         if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG))
6203                                 continue;
6204                         break;
6205                 case MSR_IA32_RTIT_CTL:
6206                 case MSR_IA32_RTIT_STATUS:
6207                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT))
6208                                 continue;
6209                         break;
6210                 case MSR_IA32_RTIT_CR3_MATCH:
6211                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6212                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
6213                                 continue;
6214                         break;
6215                 case MSR_IA32_RTIT_OUTPUT_BASE:
6216                 case MSR_IA32_RTIT_OUTPUT_MASK:
6217                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6218                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
6219                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
6220                                 continue;
6221                         break;
6222                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
6223                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6224                                 msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=
6225                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
6226                                 continue;
6227                         break;
6228                 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
6229                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
6230                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6231                                 continue;
6232                         break;
6233                 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
6234                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
6235                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6236                                 continue;
6237                         break;
6238                 default:
6239                         break;
6240                 }
6241
6242                 msrs_to_save[num_msrs_to_save++] = msrs_to_save_all[i];
6243         }
6244
6245         for (i = 0; i < ARRAY_SIZE(emulated_msrs_all); i++) {
6246                 if (!static_call(kvm_x86_has_emulated_msr)(NULL, emulated_msrs_all[i]))
6247                         continue;
6248
6249                 emulated_msrs[num_emulated_msrs++] = emulated_msrs_all[i];
6250         }
6251
6252         for (i = 0; i < ARRAY_SIZE(msr_based_features_all); i++) {
6253                 struct kvm_msr_entry msr;
6254
6255                 msr.index = msr_based_features_all[i];
6256                 if (kvm_get_msr_feature(&msr))
6257                         continue;
6258
6259                 msr_based_features[num_msr_based_features++] = msr_based_features_all[i];
6260         }
6261 }
6262
6263 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
6264                            const void *v)
6265 {
6266         int handled = 0;
6267         int n;
6268
6269         do {
6270                 n = min(len, 8);
6271                 if (!(lapic_in_kernel(vcpu) &&
6272                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
6273                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
6274                         break;
6275                 handled += n;
6276                 addr += n;
6277                 len -= n;
6278                 v += n;
6279         } while (len);
6280
6281         return handled;
6282 }
6283
6284 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
6285 {
6286         int handled = 0;
6287         int n;
6288
6289         do {
6290                 n = min(len, 8);
6291                 if (!(lapic_in_kernel(vcpu) &&
6292                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
6293                                          addr, n, v))
6294                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
6295                         break;
6296                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
6297                 handled += n;
6298                 addr += n;
6299                 len -= n;
6300                 v += n;
6301         } while (len);
6302
6303         return handled;
6304 }
6305
6306 static void kvm_set_segment(struct kvm_vcpu *vcpu,
6307                         struct kvm_segment *var, int seg)
6308 {
6309         static_call(kvm_x86_set_segment)(vcpu, var, seg);
6310 }
6311
6312 void kvm_get_segment(struct kvm_vcpu *vcpu,
6313                      struct kvm_segment *var, int seg)
6314 {
6315         static_call(kvm_x86_get_segment)(vcpu, var, seg);
6316 }
6317
6318 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
6319                            struct x86_exception *exception)
6320 {
6321         gpa_t t_gpa;
6322
6323         BUG_ON(!mmu_is_nested(vcpu));
6324
6325         /* NPT walks are always user-walks */
6326         access |= PFERR_USER_MASK;
6327         t_gpa  = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
6328
6329         return t_gpa;
6330 }
6331
6332 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
6333                               struct x86_exception *exception)
6334 {
6335         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6336         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6337 }
6338 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_read);
6339
6340  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
6341                                 struct x86_exception *exception)
6342 {
6343         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6344         access |= PFERR_FETCH_MASK;
6345         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6346 }
6347
6348 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
6349                                struct x86_exception *exception)
6350 {
6351         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6352         access |= PFERR_WRITE_MASK;
6353         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6354 }
6355 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_write);
6356
6357 /* uses this to access any guest's mapped memory without checking CPL */
6358 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
6359                                 struct x86_exception *exception)
6360 {
6361         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
6362 }
6363
6364 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6365                                       struct kvm_vcpu *vcpu, u32 access,
6366                                       struct x86_exception *exception)
6367 {
6368         void *data = val;
6369         int r = X86EMUL_CONTINUE;
6370
6371         while (bytes) {
6372                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
6373                                                             exception);
6374                 unsigned offset = addr & (PAGE_SIZE-1);
6375                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
6376                 int ret;
6377
6378                 if (gpa == UNMAPPED_GVA)
6379                         return X86EMUL_PROPAGATE_FAULT;
6380                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
6381                                                offset, toread);
6382                 if (ret < 0) {
6383                         r = X86EMUL_IO_NEEDED;
6384                         goto out;
6385                 }
6386
6387                 bytes -= toread;
6388                 data += toread;
6389                 addr += toread;
6390         }
6391 out:
6392         return r;
6393 }
6394
6395 /* used for instruction fetching */
6396 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
6397                                 gva_t addr, void *val, unsigned int bytes,
6398                                 struct x86_exception *exception)
6399 {
6400         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6401         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6402         unsigned offset;
6403         int ret;
6404
6405         /* Inline kvm_read_guest_virt_helper for speed.  */
6406         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
6407                                                     exception);
6408         if (unlikely(gpa == UNMAPPED_GVA))
6409                 return X86EMUL_PROPAGATE_FAULT;
6410
6411         offset = addr & (PAGE_SIZE-1);
6412         if (WARN_ON(offset + bytes > PAGE_SIZE))
6413                 bytes = (unsigned)PAGE_SIZE - offset;
6414         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
6415                                        offset, bytes);
6416         if (unlikely(ret < 0))
6417                 return X86EMUL_IO_NEEDED;
6418
6419         return X86EMUL_CONTINUE;
6420 }
6421
6422 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
6423                                gva_t addr, void *val, unsigned int bytes,
6424                                struct x86_exception *exception)
6425 {
6426         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6427
6428         /*
6429          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
6430          * is returned, but our callers are not ready for that and they blindly
6431          * call kvm_inject_page_fault.  Ensure that they at least do not leak
6432          * uninitialized kernel stack memory into cr2 and error code.
6433          */
6434         memset(exception, 0, sizeof(*exception));
6435         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
6436                                           exception);
6437 }
6438 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
6439
6440 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
6441                              gva_t addr, void *val, unsigned int bytes,
6442                              struct x86_exception *exception, bool system)
6443 {
6444         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6445         u32 access = 0;
6446
6447         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6448                 access |= PFERR_USER_MASK;
6449
6450         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
6451 }
6452
6453 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
6454                 unsigned long addr, void *val, unsigned int bytes)
6455 {
6456         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6457         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
6458
6459         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
6460 }
6461
6462 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6463                                       struct kvm_vcpu *vcpu, u32 access,
6464                                       struct x86_exception *exception)
6465 {
6466         void *data = val;
6467         int r = X86EMUL_CONTINUE;
6468
6469         while (bytes) {
6470                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
6471                                                              access,
6472                                                              exception);
6473                 unsigned offset = addr & (PAGE_SIZE-1);
6474                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
6475                 int ret;
6476
6477                 if (gpa == UNMAPPED_GVA)
6478                         return X86EMUL_PROPAGATE_FAULT;
6479                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
6480                 if (ret < 0) {
6481                         r = X86EMUL_IO_NEEDED;
6482                         goto out;
6483                 }
6484
6485                 bytes -= towrite;
6486                 data += towrite;
6487                 addr += towrite;
6488         }
6489 out:
6490         return r;
6491 }
6492
6493 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
6494                               unsigned int bytes, struct x86_exception *exception,
6495                               bool system)
6496 {
6497         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6498         u32 access = PFERR_WRITE_MASK;
6499
6500         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6501                 access |= PFERR_USER_MASK;
6502
6503         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6504                                            access, exception);
6505 }
6506
6507 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
6508                                 unsigned int bytes, struct x86_exception *exception)
6509 {
6510         /* kvm_write_guest_virt_system can pull in tons of pages. */
6511         vcpu->arch.l1tf_flush_l1d = true;
6512
6513         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6514                                            PFERR_WRITE_MASK, exception);
6515 }
6516 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
6517
6518 int handle_ud(struct kvm_vcpu *vcpu)
6519 {
6520         static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
6521         int emul_type = EMULTYPE_TRAP_UD;
6522         char sig[5]; /* ud2; .ascii "kvm" */
6523         struct x86_exception e;
6524
6525         if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, NULL, 0)))
6526                 return 1;
6527
6528         if (force_emulation_prefix &&
6529             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
6530                                 sig, sizeof(sig), &e) == 0 &&
6531             memcmp(sig, kvm_emulate_prefix, sizeof(sig)) == 0) {
6532                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
6533                 emul_type = EMULTYPE_TRAP_UD_FORCED;
6534         }
6535
6536         return kvm_emulate_instruction(vcpu, emul_type);
6537 }
6538 EXPORT_SYMBOL_GPL(handle_ud);
6539
6540 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6541                             gpa_t gpa, bool write)
6542 {
6543         /* For APIC access vmexit */
6544         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6545                 return 1;
6546
6547         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
6548                 trace_vcpu_match_mmio(gva, gpa, write, true);
6549                 return 1;
6550         }
6551
6552         return 0;
6553 }
6554
6555 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6556                                 gpa_t *gpa, struct x86_exception *exception,
6557                                 bool write)
6558 {
6559         u32 access = ((static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0)
6560                 | (write ? PFERR_WRITE_MASK : 0);
6561
6562         /*
6563          * currently PKRU is only applied to ept enabled guest so
6564          * there is no pkey in EPT page table for L1 guest or EPT
6565          * shadow page table for L2 guest.
6566          */
6567         if (vcpu_match_mmio_gva(vcpu, gva) && (!is_paging(vcpu) ||
6568             !permission_fault(vcpu, vcpu->arch.walk_mmu,
6569                               vcpu->arch.mmio_access, 0, access))) {
6570                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
6571                                         (gva & (PAGE_SIZE - 1));
6572                 trace_vcpu_match_mmio(gva, *gpa, write, false);
6573                 return 1;
6574         }
6575
6576         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6577
6578         if (*gpa == UNMAPPED_GVA)
6579                 return -1;
6580
6581         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
6582 }
6583
6584 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
6585                         const void *val, int bytes)
6586 {
6587         int ret;
6588
6589         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
6590         if (ret < 0)
6591                 return 0;
6592         kvm_page_track_write(vcpu, gpa, val, bytes);
6593         return 1;
6594 }
6595
6596 struct read_write_emulator_ops {
6597         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
6598                                   int bytes);
6599         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
6600                                   void *val, int bytes);
6601         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6602                                int bytes, void *val);
6603         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6604                                     void *val, int bytes);
6605         bool write;
6606 };
6607
6608 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
6609 {
6610         if (vcpu->mmio_read_completed) {
6611                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
6612                                vcpu->mmio_fragments[0].gpa, val);
6613                 vcpu->mmio_read_completed = 0;
6614                 return 1;
6615         }
6616
6617         return 0;
6618 }
6619
6620 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6621                         void *val, int bytes)
6622 {
6623         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
6624 }
6625
6626 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6627                          void *val, int bytes)
6628 {
6629         return emulator_write_phys(vcpu, gpa, val, bytes);
6630 }
6631
6632 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
6633 {
6634         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
6635         return vcpu_mmio_write(vcpu, gpa, bytes, val);
6636 }
6637
6638 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6639                           void *val, int bytes)
6640 {
6641         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
6642         return X86EMUL_IO_NEEDED;
6643 }
6644
6645 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6646                            void *val, int bytes)
6647 {
6648         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
6649
6650         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
6651         return X86EMUL_CONTINUE;
6652 }
6653
6654 static const struct read_write_emulator_ops read_emultor = {
6655         .read_write_prepare = read_prepare,
6656         .read_write_emulate = read_emulate,
6657         .read_write_mmio = vcpu_mmio_read,
6658         .read_write_exit_mmio = read_exit_mmio,
6659 };
6660
6661 static const struct read_write_emulator_ops write_emultor = {
6662         .read_write_emulate = write_emulate,
6663         .read_write_mmio = write_mmio,
6664         .read_write_exit_mmio = write_exit_mmio,
6665         .write = true,
6666 };
6667
6668 static int emulator_read_write_onepage(unsigned long addr, void *val,
6669                                        unsigned int bytes,
6670                                        struct x86_exception *exception,
6671                                        struct kvm_vcpu *vcpu,
6672                                        const struct read_write_emulator_ops *ops)
6673 {
6674         gpa_t gpa;
6675         int handled, ret;
6676         bool write = ops->write;
6677         struct kvm_mmio_fragment *frag;
6678         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6679
6680         /*
6681          * If the exit was due to a NPF we may already have a GPA.
6682          * If the GPA is present, use it to avoid the GVA to GPA table walk.
6683          * Note, this cannot be used on string operations since string
6684          * operation using rep will only have the initial GPA from the NPF
6685          * occurred.
6686          */
6687         if (ctxt->gpa_available && emulator_can_use_gpa(ctxt) &&
6688             (addr & ~PAGE_MASK) == (ctxt->gpa_val & ~PAGE_MASK)) {
6689                 gpa = ctxt->gpa_val;
6690                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
6691         } else {
6692                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
6693                 if (ret < 0)
6694                         return X86EMUL_PROPAGATE_FAULT;
6695         }
6696
6697         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
6698                 return X86EMUL_CONTINUE;
6699
6700         /*
6701          * Is this MMIO handled locally?
6702          */
6703         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
6704         if (handled == bytes)
6705                 return X86EMUL_CONTINUE;
6706
6707         gpa += handled;
6708         bytes -= handled;
6709         val += handled;
6710
6711         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
6712         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
6713         frag->gpa = gpa;
6714         frag->data = val;
6715         frag->len = bytes;
6716         return X86EMUL_CONTINUE;
6717 }
6718
6719 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
6720                         unsigned long addr,
6721                         void *val, unsigned int bytes,
6722                         struct x86_exception *exception,
6723                         const struct read_write_emulator_ops *ops)
6724 {
6725         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6726         gpa_t gpa;
6727         int rc;
6728
6729         if (ops->read_write_prepare &&
6730                   ops->read_write_prepare(vcpu, val, bytes))
6731                 return X86EMUL_CONTINUE;
6732
6733         vcpu->mmio_nr_fragments = 0;
6734
6735         /* Crossing a page boundary? */
6736         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
6737                 int now;
6738
6739                 now = -addr & ~PAGE_MASK;
6740                 rc = emulator_read_write_onepage(addr, val, now, exception,
6741                                                  vcpu, ops);
6742
6743                 if (rc != X86EMUL_CONTINUE)
6744                         return rc;
6745                 addr += now;
6746                 if (ctxt->mode != X86EMUL_MODE_PROT64)
6747                         addr = (u32)addr;
6748                 val += now;
6749                 bytes -= now;
6750         }
6751
6752         rc = emulator_read_write_onepage(addr, val, bytes, exception,
6753                                          vcpu, ops);
6754         if (rc != X86EMUL_CONTINUE)
6755                 return rc;
6756
6757         if (!vcpu->mmio_nr_fragments)
6758                 return rc;
6759
6760         gpa = vcpu->mmio_fragments[0].gpa;
6761
6762         vcpu->mmio_needed = 1;
6763         vcpu->mmio_cur_fragment = 0;
6764
6765         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
6766         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
6767         vcpu->run->exit_reason = KVM_EXIT_MMIO;
6768         vcpu->run->mmio.phys_addr = gpa;
6769
6770         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
6771 }
6772
6773 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
6774                                   unsigned long addr,
6775                                   void *val,
6776                                   unsigned int bytes,
6777                                   struct x86_exception *exception)
6778 {
6779         return emulator_read_write(ctxt, addr, val, bytes,
6780                                    exception, &read_emultor);
6781 }
6782
6783 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
6784                             unsigned long addr,
6785                             const void *val,
6786                             unsigned int bytes,
6787                             struct x86_exception *exception)
6788 {
6789         return emulator_read_write(ctxt, addr, (void *)val, bytes,
6790                                    exception, &write_emultor);
6791 }
6792
6793 #define CMPXCHG_TYPE(t, ptr, old, new) \
6794         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
6795
6796 #ifdef CONFIG_X86_64
6797 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
6798 #else
6799 #  define CMPXCHG64(ptr, old, new) \
6800         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
6801 #endif
6802
6803 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
6804                                      unsigned long addr,
6805                                      const void *old,
6806                                      const void *new,
6807                                      unsigned int bytes,
6808                                      struct x86_exception *exception)
6809 {
6810         struct kvm_host_map map;
6811         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6812         u64 page_line_mask;
6813         gpa_t gpa;
6814         char *kaddr;
6815         bool exchanged;
6816
6817         /* guests cmpxchg8b have to be emulated atomically */
6818         if (bytes > 8 || (bytes & (bytes - 1)))
6819                 goto emul_write;
6820
6821         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
6822
6823         if (gpa == UNMAPPED_GVA ||
6824             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6825                 goto emul_write;
6826
6827         /*
6828          * Emulate the atomic as a straight write to avoid #AC if SLD is
6829          * enabled in the host and the access splits a cache line.
6830          */
6831         if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT))
6832                 page_line_mask = ~(cache_line_size() - 1);
6833         else
6834                 page_line_mask = PAGE_MASK;
6835
6836         if (((gpa + bytes - 1) & page_line_mask) != (gpa & page_line_mask))
6837                 goto emul_write;
6838
6839         if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
6840                 goto emul_write;
6841
6842         kaddr = map.hva + offset_in_page(gpa);
6843
6844         switch (bytes) {
6845         case 1:
6846                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
6847                 break;
6848         case 2:
6849                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
6850                 break;
6851         case 4:
6852                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
6853                 break;
6854         case 8:
6855                 exchanged = CMPXCHG64(kaddr, old, new);
6856                 break;
6857         default:
6858                 BUG();
6859         }
6860
6861         kvm_vcpu_unmap(vcpu, &map, true);
6862
6863         if (!exchanged)
6864                 return X86EMUL_CMPXCHG_FAILED;
6865
6866         kvm_page_track_write(vcpu, gpa, new, bytes);
6867
6868         return X86EMUL_CONTINUE;
6869
6870 emul_write:
6871         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
6872
6873         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
6874 }
6875
6876 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
6877 {
6878         int r = 0, i;
6879
6880         for (i = 0; i < vcpu->arch.pio.count; i++) {
6881                 if (vcpu->arch.pio.in)
6882                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
6883                                             vcpu->arch.pio.size, pd);
6884                 else
6885                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
6886                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
6887                                              pd);
6888                 if (r)
6889                         break;
6890                 pd += vcpu->arch.pio.size;
6891         }
6892         return r;
6893 }
6894
6895 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
6896                                unsigned short port, void *val,
6897                                unsigned int count, bool in)
6898 {
6899         vcpu->arch.pio.port = port;
6900         vcpu->arch.pio.in = in;
6901         vcpu->arch.pio.count  = count;
6902         vcpu->arch.pio.size = size;
6903
6904         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
6905                 vcpu->arch.pio.count = 0;
6906                 return 1;
6907         }
6908
6909         vcpu->run->exit_reason = KVM_EXIT_IO;
6910         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
6911         vcpu->run->io.size = size;
6912         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
6913         vcpu->run->io.count = count;
6914         vcpu->run->io.port = port;
6915
6916         return 0;
6917 }
6918
6919 static int emulator_pio_in(struct kvm_vcpu *vcpu, int size,
6920                            unsigned short port, void *val, unsigned int count)
6921 {
6922         int ret;
6923
6924         if (vcpu->arch.pio.count)
6925                 goto data_avail;
6926
6927         memset(vcpu->arch.pio_data, 0, size * count);
6928
6929         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
6930         if (ret) {
6931 data_avail:
6932                 memcpy(val, vcpu->arch.pio_data, size * count);
6933                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
6934                 vcpu->arch.pio.count = 0;
6935                 return 1;
6936         }
6937
6938         return 0;
6939 }
6940
6941 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
6942                                     int size, unsigned short port, void *val,
6943                                     unsigned int count)
6944 {
6945         return emulator_pio_in(emul_to_vcpu(ctxt), size, port, val, count);
6946
6947 }
6948
6949 static int emulator_pio_out(struct kvm_vcpu *vcpu, int size,
6950                             unsigned short port, const void *val,
6951                             unsigned int count)
6952 {
6953         memcpy(vcpu->arch.pio_data, val, size * count);
6954         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
6955         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
6956 }
6957
6958 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
6959                                      int size, unsigned short port,
6960                                      const void *val, unsigned int count)
6961 {
6962         return emulator_pio_out(emul_to_vcpu(ctxt), size, port, val, count);
6963 }
6964
6965 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
6966 {
6967         return static_call(kvm_x86_get_segment_base)(vcpu, seg);
6968 }
6969
6970 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
6971 {
6972         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
6973 }
6974
6975 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
6976 {
6977         if (!need_emulate_wbinvd(vcpu))
6978                 return X86EMUL_CONTINUE;
6979
6980         if (static_call(kvm_x86_has_wbinvd_exit)()) {
6981                 int cpu = get_cpu();
6982
6983                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
6984                 on_each_cpu_mask(vcpu->arch.wbinvd_dirty_mask,
6985                                 wbinvd_ipi, NULL, 1);
6986                 put_cpu();
6987                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
6988         } else
6989                 wbinvd();
6990         return X86EMUL_CONTINUE;
6991 }
6992
6993 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
6994 {
6995         kvm_emulate_wbinvd_noskip(vcpu);
6996         return kvm_skip_emulated_instruction(vcpu);
6997 }
6998 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
6999
7000
7001
7002 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
7003 {
7004         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
7005 }
7006
7007 static void emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
7008                             unsigned long *dest)
7009 {
7010         kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
7011 }
7012
7013 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
7014                            unsigned long value)
7015 {
7016
7017         return kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
7018 }
7019
7020 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
7021 {
7022         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
7023 }
7024
7025 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
7026 {
7027         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7028         unsigned long value;
7029
7030         switch (cr) {
7031         case 0:
7032                 value = kvm_read_cr0(vcpu);
7033                 break;
7034         case 2:
7035                 value = vcpu->arch.cr2;
7036                 break;
7037         case 3:
7038                 value = kvm_read_cr3(vcpu);
7039                 break;
7040         case 4:
7041                 value = kvm_read_cr4(vcpu);
7042                 break;
7043         case 8:
7044                 value = kvm_get_cr8(vcpu);
7045                 break;
7046         default:
7047                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7048                 return 0;
7049         }
7050
7051         return value;
7052 }
7053
7054 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
7055 {
7056         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7057         int res = 0;
7058
7059         switch (cr) {
7060         case 0:
7061                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
7062                 break;
7063         case 2:
7064                 vcpu->arch.cr2 = val;
7065                 break;
7066         case 3:
7067                 res = kvm_set_cr3(vcpu, val);
7068                 break;
7069         case 4:
7070                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
7071                 break;
7072         case 8:
7073                 res = kvm_set_cr8(vcpu, val);
7074                 break;
7075         default:
7076                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7077                 res = -1;
7078         }
7079
7080         return res;
7081 }
7082
7083 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
7084 {
7085         return static_call(kvm_x86_get_cpl)(emul_to_vcpu(ctxt));
7086 }
7087
7088 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7089 {
7090         static_call(kvm_x86_get_gdt)(emul_to_vcpu(ctxt), dt);
7091 }
7092
7093 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7094 {
7095         static_call(kvm_x86_get_idt)(emul_to_vcpu(ctxt), dt);
7096 }
7097
7098 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7099 {
7100         static_call(kvm_x86_set_gdt)(emul_to_vcpu(ctxt), dt);
7101 }
7102
7103 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7104 {
7105         static_call(kvm_x86_set_idt)(emul_to_vcpu(ctxt), dt);
7106 }
7107
7108 static unsigned long emulator_get_cached_segment_base(
7109         struct x86_emulate_ctxt *ctxt, int seg)
7110 {
7111         return get_segment_base(emul_to_vcpu(ctxt), seg);
7112 }
7113
7114 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
7115                                  struct desc_struct *desc, u32 *base3,
7116                                  int seg)
7117 {
7118         struct kvm_segment var;
7119
7120         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
7121         *selector = var.selector;
7122
7123         if (var.unusable) {
7124                 memset(desc, 0, sizeof(*desc));
7125                 if (base3)
7126                         *base3 = 0;
7127                 return false;
7128         }
7129
7130         if (var.g)
7131                 var.limit >>= 12;
7132         set_desc_limit(desc, var.limit);
7133         set_desc_base(desc, (unsigned long)var.base);
7134 #ifdef CONFIG_X86_64
7135         if (base3)
7136                 *base3 = var.base >> 32;
7137 #endif
7138         desc->type = var.type;
7139         desc->s = var.s;
7140         desc->dpl = var.dpl;
7141         desc->p = var.present;
7142         desc->avl = var.avl;
7143         desc->l = var.l;
7144         desc->d = var.db;
7145         desc->g = var.g;
7146
7147         return true;
7148 }
7149
7150 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
7151                                  struct desc_struct *desc, u32 base3,
7152                                  int seg)
7153 {
7154         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7155         struct kvm_segment var;
7156
7157         var.selector = selector;
7158         var.base = get_desc_base(desc);
7159 #ifdef CONFIG_X86_64
7160         var.base |= ((u64)base3) << 32;
7161 #endif
7162         var.limit = get_desc_limit(desc);
7163         if (desc->g)
7164                 var.limit = (var.limit << 12) | 0xfff;
7165         var.type = desc->type;
7166         var.dpl = desc->dpl;
7167         var.db = desc->d;
7168         var.s = desc->s;
7169         var.l = desc->l;
7170         var.g = desc->g;
7171         var.avl = desc->avl;
7172         var.present = desc->p;
7173         var.unusable = !var.present;
7174         var.padding = 0;
7175
7176         kvm_set_segment(vcpu, &var, seg);
7177         return;
7178 }
7179
7180 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
7181                             u32 msr_index, u64 *pdata)
7182 {
7183         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7184         int r;
7185
7186         r = kvm_get_msr(vcpu, msr_index, pdata);
7187
7188         if (r && kvm_get_msr_user_space(vcpu, msr_index, r)) {
7189                 /* Bounce to user space */
7190                 return X86EMUL_IO_NEEDED;
7191         }
7192
7193         return r;
7194 }
7195
7196 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
7197                             u32 msr_index, u64 data)
7198 {
7199         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7200         int r;
7201
7202         r = kvm_set_msr(vcpu, msr_index, data);
7203
7204         if (r && kvm_set_msr_user_space(vcpu, msr_index, data, r)) {
7205                 /* Bounce to user space */
7206                 return X86EMUL_IO_NEEDED;
7207         }
7208
7209         return r;
7210 }
7211
7212 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
7213 {
7214         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7215
7216         return vcpu->arch.smbase;
7217 }
7218
7219 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
7220 {
7221         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7222
7223         vcpu->arch.smbase = smbase;
7224 }
7225
7226 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
7227                               u32 pmc)
7228 {
7229         return kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt), pmc);
7230 }
7231
7232 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
7233                              u32 pmc, u64 *pdata)
7234 {
7235         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
7236 }
7237
7238 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
7239 {
7240         emul_to_vcpu(ctxt)->arch.halt_request = 1;
7241 }
7242
7243 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
7244                               struct x86_instruction_info *info,
7245                               enum x86_intercept_stage stage)
7246 {
7247         return static_call(kvm_x86_check_intercept)(emul_to_vcpu(ctxt), info, stage,
7248                                             &ctxt->exception);
7249 }
7250
7251 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
7252                               u32 *eax, u32 *ebx, u32 *ecx, u32 *edx,
7253                               bool exact_only)
7254 {
7255         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, exact_only);
7256 }
7257
7258 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt *ctxt)
7259 {
7260         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_LM);
7261 }
7262
7263 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt *ctxt)
7264 {
7265         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_MOVBE);
7266 }
7267
7268 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)
7269 {
7270         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_FXSR);
7271 }
7272
7273 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
7274 {
7275         return kvm_register_read_raw(emul_to_vcpu(ctxt), reg);
7276 }
7277
7278 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
7279 {
7280         kvm_register_write_raw(emul_to_vcpu(ctxt), reg, val);
7281 }
7282
7283 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
7284 {
7285         static_call(kvm_x86_set_nmi_mask)(emul_to_vcpu(ctxt), masked);
7286 }
7287
7288 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
7289 {
7290         return emul_to_vcpu(ctxt)->arch.hflags;
7291 }
7292
7293 static void emulator_exiting_smm(struct x86_emulate_ctxt *ctxt)
7294 {
7295         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7296
7297         kvm_smm_changed(vcpu, false);
7298 }
7299
7300 static int emulator_leave_smm(struct x86_emulate_ctxt *ctxt,
7301                                   const char *smstate)
7302 {
7303         return static_call(kvm_x86_leave_smm)(emul_to_vcpu(ctxt), smstate);
7304 }
7305
7306 static void emulator_triple_fault(struct x86_emulate_ctxt *ctxt)
7307 {
7308         kvm_make_request(KVM_REQ_TRIPLE_FAULT, emul_to_vcpu(ctxt));
7309 }
7310
7311 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
7312 {
7313         return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
7314 }
7315
7316 static const struct x86_emulate_ops emulate_ops = {
7317         .read_gpr            = emulator_read_gpr,
7318         .write_gpr           = emulator_write_gpr,
7319         .read_std            = emulator_read_std,
7320         .write_std           = emulator_write_std,
7321         .read_phys           = kvm_read_guest_phys_system,
7322         .fetch               = kvm_fetch_guest_virt,
7323         .read_emulated       = emulator_read_emulated,
7324         .write_emulated      = emulator_write_emulated,
7325         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
7326         .invlpg              = emulator_invlpg,
7327         .pio_in_emulated     = emulator_pio_in_emulated,
7328         .pio_out_emulated    = emulator_pio_out_emulated,
7329         .get_segment         = emulator_get_segment,
7330         .set_segment         = emulator_set_segment,
7331         .get_cached_segment_base = emulator_get_cached_segment_base,
7332         .get_gdt             = emulator_get_gdt,
7333         .get_idt             = emulator_get_idt,
7334         .set_gdt             = emulator_set_gdt,
7335         .set_idt             = emulator_set_idt,
7336         .get_cr              = emulator_get_cr,
7337         .set_cr              = emulator_set_cr,
7338         .cpl                 = emulator_get_cpl,
7339         .get_dr              = emulator_get_dr,
7340         .set_dr              = emulator_set_dr,
7341         .get_smbase          = emulator_get_smbase,
7342         .set_smbase          = emulator_set_smbase,
7343         .set_msr             = emulator_set_msr,
7344         .get_msr             = emulator_get_msr,
7345         .check_pmc           = emulator_check_pmc,
7346         .read_pmc            = emulator_read_pmc,
7347         .halt                = emulator_halt,
7348         .wbinvd              = emulator_wbinvd,
7349         .fix_hypercall       = emulator_fix_hypercall,
7350         .intercept           = emulator_intercept,
7351         .get_cpuid           = emulator_get_cpuid,
7352         .guest_has_long_mode = emulator_guest_has_long_mode,
7353         .guest_has_movbe     = emulator_guest_has_movbe,
7354         .guest_has_fxsr      = emulator_guest_has_fxsr,
7355         .set_nmi_mask        = emulator_set_nmi_mask,
7356         .get_hflags          = emulator_get_hflags,
7357         .exiting_smm         = emulator_exiting_smm,
7358         .leave_smm           = emulator_leave_smm,
7359         .triple_fault        = emulator_triple_fault,
7360         .set_xcr             = emulator_set_xcr,
7361 };
7362
7363 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
7364 {
7365         u32 int_shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
7366         /*
7367          * an sti; sti; sequence only disable interrupts for the first
7368          * instruction. So, if the last instruction, be it emulated or
7369          * not, left the system with the INT_STI flag enabled, it
7370          * means that the last instruction is an sti. We should not
7371          * leave the flag on in this case. The same goes for mov ss
7372          */
7373         if (int_shadow & mask)
7374                 mask = 0;
7375         if (unlikely(int_shadow || mask)) {
7376                 static_call(kvm_x86_set_interrupt_shadow)(vcpu, mask);
7377                 if (!mask)
7378                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7379         }
7380 }
7381
7382 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
7383 {
7384         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7385         if (ctxt->exception.vector == PF_VECTOR)
7386                 return kvm_inject_emulated_page_fault(vcpu, &ctxt->exception);
7387
7388         if (ctxt->exception.error_code_valid)
7389                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
7390                                       ctxt->exception.error_code);
7391         else
7392                 kvm_queue_exception(vcpu, ctxt->exception.vector);
7393         return false;
7394 }
7395
7396 static struct x86_emulate_ctxt *alloc_emulate_ctxt(struct kvm_vcpu *vcpu)
7397 {
7398         struct x86_emulate_ctxt *ctxt;
7399
7400         ctxt = kmem_cache_zalloc(x86_emulator_cache, GFP_KERNEL_ACCOUNT);
7401         if (!ctxt) {
7402                 pr_err("kvm: failed to allocate vcpu's emulator\n");
7403                 return NULL;
7404         }
7405
7406         ctxt->vcpu = vcpu;
7407         ctxt->ops = &emulate_ops;
7408         vcpu->arch.emulate_ctxt = ctxt;
7409
7410         return ctxt;
7411 }
7412
7413 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
7414 {
7415         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7416         int cs_db, cs_l;
7417
7418         static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
7419
7420         ctxt->gpa_available = false;
7421         ctxt->eflags = kvm_get_rflags(vcpu);
7422         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
7423
7424         ctxt->eip = kvm_rip_read(vcpu);
7425         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
7426                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
7427                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
7428                      cs_db                              ? X86EMUL_MODE_PROT32 :
7429                                                           X86EMUL_MODE_PROT16;
7430         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
7431         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
7432         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
7433
7434         ctxt->interruptibility = 0;
7435         ctxt->have_exception = false;
7436         ctxt->exception.vector = -1;
7437         ctxt->perm_ok = false;
7438
7439         init_decode_cache(ctxt);
7440         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7441 }
7442
7443 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
7444 {
7445         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7446         int ret;
7447
7448         init_emulate_ctxt(vcpu);
7449
7450         ctxt->op_bytes = 2;
7451         ctxt->ad_bytes = 2;
7452         ctxt->_eip = ctxt->eip + inc_eip;
7453         ret = emulate_int_real(ctxt, irq);
7454
7455         if (ret != X86EMUL_CONTINUE) {
7456                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
7457         } else {
7458                 ctxt->eip = ctxt->_eip;
7459                 kvm_rip_write(vcpu, ctxt->eip);
7460                 kvm_set_rflags(vcpu, ctxt->eflags);
7461         }
7462 }
7463 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
7464
7465 static void prepare_emulation_failure_exit(struct kvm_vcpu *vcpu)
7466 {
7467         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7468         u32 insn_size = ctxt->fetch.end - ctxt->fetch.data;
7469         struct kvm_run *run = vcpu->run;
7470
7471         run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7472         run->emulation_failure.suberror = KVM_INTERNAL_ERROR_EMULATION;
7473         run->emulation_failure.ndata = 0;
7474         run->emulation_failure.flags = 0;
7475
7476         if (insn_size) {
7477                 run->emulation_failure.ndata = 3;
7478                 run->emulation_failure.flags |=
7479                         KVM_INTERNAL_ERROR_EMULATION_FLAG_INSTRUCTION_BYTES;
7480                 run->emulation_failure.insn_size = insn_size;
7481                 memset(run->emulation_failure.insn_bytes, 0x90,
7482                        sizeof(run->emulation_failure.insn_bytes));
7483                 memcpy(run->emulation_failure.insn_bytes,
7484                        ctxt->fetch.data, insn_size);
7485         }
7486 }
7487
7488 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
7489 {
7490         struct kvm *kvm = vcpu->kvm;
7491
7492         ++vcpu->stat.insn_emulation_fail;
7493         trace_kvm_emulate_insn_failed(vcpu);
7494
7495         if (emulation_type & EMULTYPE_VMWARE_GP) {
7496                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7497                 return 1;
7498         }
7499
7500         if (kvm->arch.exit_on_emulation_error ||
7501             (emulation_type & EMULTYPE_SKIP)) {
7502                 prepare_emulation_failure_exit(vcpu);
7503                 return 0;
7504         }
7505
7506         kvm_queue_exception(vcpu, UD_VECTOR);
7507
7508         if (!is_guest_mode(vcpu) && static_call(kvm_x86_get_cpl)(vcpu) == 0) {
7509                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7510                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
7511                 vcpu->run->internal.ndata = 0;
7512                 return 0;
7513         }
7514
7515         return 1;
7516 }
7517
7518 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7519                                   bool write_fault_to_shadow_pgtable,
7520                                   int emulation_type)
7521 {
7522         gpa_t gpa = cr2_or_gpa;
7523         kvm_pfn_t pfn;
7524
7525         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7526                 return false;
7527
7528         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7529             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7530                 return false;
7531
7532         if (!vcpu->arch.mmu->direct_map) {
7533                 /*
7534                  * Write permission should be allowed since only
7535                  * write access need to be emulated.
7536                  */
7537                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7538
7539                 /*
7540                  * If the mapping is invalid in guest, let cpu retry
7541                  * it to generate fault.
7542                  */
7543                 if (gpa == UNMAPPED_GVA)
7544                         return true;
7545         }
7546
7547         /*
7548          * Do not retry the unhandleable instruction if it faults on the
7549          * readonly host memory, otherwise it will goto a infinite loop:
7550          * retry instruction -> write #PF -> emulation fail -> retry
7551          * instruction -> ...
7552          */
7553         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
7554
7555         /*
7556          * If the instruction failed on the error pfn, it can not be fixed,
7557          * report the error to userspace.
7558          */
7559         if (is_error_noslot_pfn(pfn))
7560                 return false;
7561
7562         kvm_release_pfn_clean(pfn);
7563
7564         /* The instructions are well-emulated on direct mmu. */
7565         if (vcpu->arch.mmu->direct_map) {
7566                 unsigned int indirect_shadow_pages;
7567
7568                 write_lock(&vcpu->kvm->mmu_lock);
7569                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
7570                 write_unlock(&vcpu->kvm->mmu_lock);
7571
7572                 if (indirect_shadow_pages)
7573                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7574
7575                 return true;
7576         }
7577
7578         /*
7579          * if emulation was due to access to shadowed page table
7580          * and it failed try to unshadow page and re-enter the
7581          * guest to let CPU execute the instruction.
7582          */
7583         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7584
7585         /*
7586          * If the access faults on its page table, it can not
7587          * be fixed by unprotecting shadow page and it should
7588          * be reported to userspace.
7589          */
7590         return !write_fault_to_shadow_pgtable;
7591 }
7592
7593 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
7594                               gpa_t cr2_or_gpa,  int emulation_type)
7595 {
7596         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7597         unsigned long last_retry_eip, last_retry_addr, gpa = cr2_or_gpa;
7598
7599         last_retry_eip = vcpu->arch.last_retry_eip;
7600         last_retry_addr = vcpu->arch.last_retry_addr;
7601
7602         /*
7603          * If the emulation is caused by #PF and it is non-page_table
7604          * writing instruction, it means the VM-EXIT is caused by shadow
7605          * page protected, we can zap the shadow page and retry this
7606          * instruction directly.
7607          *
7608          * Note: if the guest uses a non-page-table modifying instruction
7609          * on the PDE that points to the instruction, then we will unmap
7610          * the instruction and go to an infinite loop. So, we cache the
7611          * last retried eip and the last fault address, if we meet the eip
7612          * and the address again, we can break out of the potential infinite
7613          * loop.
7614          */
7615         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
7616
7617         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7618                 return false;
7619
7620         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7621             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7622                 return false;
7623
7624         if (x86_page_table_writing_insn(ctxt))
7625                 return false;
7626
7627         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2_or_gpa)
7628                 return false;
7629
7630         vcpu->arch.last_retry_eip = ctxt->eip;
7631         vcpu->arch.last_retry_addr = cr2_or_gpa;
7632
7633         if (!vcpu->arch.mmu->direct_map)
7634                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7635
7636         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7637
7638         return true;
7639 }
7640
7641 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
7642 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
7643
7644 static void kvm_smm_changed(struct kvm_vcpu *vcpu, bool entering_smm)
7645 {
7646         trace_kvm_smm_transition(vcpu->vcpu_id, vcpu->arch.smbase, entering_smm);
7647
7648         if (entering_smm) {
7649                 vcpu->arch.hflags |= HF_SMM_MASK;
7650         } else {
7651                 vcpu->arch.hflags &= ~(HF_SMM_MASK | HF_SMM_INSIDE_NMI_MASK);
7652
7653                 /* Process a latched INIT or SMI, if any.  */
7654                 kvm_make_request(KVM_REQ_EVENT, vcpu);
7655         }
7656
7657         kvm_mmu_reset_context(vcpu);
7658 }
7659
7660 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
7661                                 unsigned long *db)
7662 {
7663         u32 dr6 = 0;
7664         int i;
7665         u32 enable, rwlen;
7666
7667         enable = dr7;
7668         rwlen = dr7 >> 16;
7669         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
7670                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
7671                         dr6 |= (1 << i);
7672         return dr6;
7673 }
7674
7675 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
7676 {
7677         struct kvm_run *kvm_run = vcpu->run;
7678
7679         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
7680                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_ACTIVE_LOW;
7681                 kvm_run->debug.arch.pc = kvm_get_linear_rip(vcpu);
7682                 kvm_run->debug.arch.exception = DB_VECTOR;
7683                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
7684                 return 0;
7685         }
7686         kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
7687         return 1;
7688 }
7689
7690 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
7691 {
7692         unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
7693         int r;
7694
7695         r = static_call(kvm_x86_skip_emulated_instruction)(vcpu);
7696         if (unlikely(!r))
7697                 return 0;
7698
7699         /*
7700          * rflags is the old, "raw" value of the flags.  The new value has
7701          * not been saved yet.
7702          *
7703          * This is correct even for TF set by the guest, because "the
7704          * processor will not generate this exception after the instruction
7705          * that sets the TF flag".
7706          */
7707         if (unlikely(rflags & X86_EFLAGS_TF))
7708                 r = kvm_vcpu_do_singlestep(vcpu);
7709         return r;
7710 }
7711 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
7712
7713 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
7714 {
7715         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
7716             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
7717                 struct kvm_run *kvm_run = vcpu->run;
7718                 unsigned long eip = kvm_get_linear_rip(vcpu);
7719                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7720                                            vcpu->arch.guest_debug_dr7,
7721                                            vcpu->arch.eff_db);
7722
7723                 if (dr6 != 0) {
7724                         kvm_run->debug.arch.dr6 = dr6 | DR6_ACTIVE_LOW;
7725                         kvm_run->debug.arch.pc = eip;
7726                         kvm_run->debug.arch.exception = DB_VECTOR;
7727                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
7728                         *r = 0;
7729                         return true;
7730                 }
7731         }
7732
7733         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
7734             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
7735                 unsigned long eip = kvm_get_linear_rip(vcpu);
7736                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7737                                            vcpu->arch.dr7,
7738                                            vcpu->arch.db);
7739
7740                 if (dr6 != 0) {
7741                         kvm_queue_exception_p(vcpu, DB_VECTOR, dr6);
7742                         *r = 1;
7743                         return true;
7744                 }
7745         }
7746
7747         return false;
7748 }
7749
7750 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
7751 {
7752         switch (ctxt->opcode_len) {
7753         case 1:
7754                 switch (ctxt->b) {
7755                 case 0xe4:      /* IN */
7756                 case 0xe5:
7757                 case 0xec:
7758                 case 0xed:
7759                 case 0xe6:      /* OUT */
7760                 case 0xe7:
7761                 case 0xee:
7762                 case 0xef:
7763                 case 0x6c:      /* INS */
7764                 case 0x6d:
7765                 case 0x6e:      /* OUTS */
7766                 case 0x6f:
7767                         return true;
7768                 }
7769                 break;
7770         case 2:
7771                 switch (ctxt->b) {
7772                 case 0x33:      /* RDPMC */
7773                         return true;
7774                 }
7775                 break;
7776         }
7777
7778         return false;
7779 }
7780
7781 /*
7782  * Decode to be emulated instruction. Return EMULATION_OK if success.
7783  */
7784 int x86_decode_emulated_instruction(struct kvm_vcpu *vcpu, int emulation_type,
7785                                     void *insn, int insn_len)
7786 {
7787         int r = EMULATION_OK;
7788         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7789
7790         init_emulate_ctxt(vcpu);
7791
7792         /*
7793          * We will reenter on the same instruction since we do not set
7794          * complete_userspace_io. This does not handle watchpoints yet,
7795          * those would be handled in the emulate_ops.
7796          */
7797         if (!(emulation_type & EMULTYPE_SKIP) &&
7798             kvm_vcpu_check_breakpoint(vcpu, &r))
7799                 return r;
7800
7801         r = x86_decode_insn(ctxt, insn, insn_len, emulation_type);
7802
7803         trace_kvm_emulate_insn_start(vcpu);
7804         ++vcpu->stat.insn_emulation;
7805
7806         return r;
7807 }
7808 EXPORT_SYMBOL_GPL(x86_decode_emulated_instruction);
7809
7810 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7811                             int emulation_type, void *insn, int insn_len)
7812 {
7813         int r;
7814         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7815         bool writeback = true;
7816         bool write_fault_to_spt;
7817
7818         if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, insn, insn_len)))
7819                 return 1;
7820
7821         vcpu->arch.l1tf_flush_l1d = true;
7822
7823         /*
7824          * Clear write_fault_to_shadow_pgtable here to ensure it is
7825          * never reused.
7826          */
7827         write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
7828         vcpu->arch.write_fault_to_shadow_pgtable = false;
7829
7830         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
7831                 kvm_clear_exception_queue(vcpu);
7832
7833                 r = x86_decode_emulated_instruction(vcpu, emulation_type,
7834                                                     insn, insn_len);
7835                 if (r != EMULATION_OK)  {
7836                         if ((emulation_type & EMULTYPE_TRAP_UD) ||
7837                             (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
7838                                 kvm_queue_exception(vcpu, UD_VECTOR);
7839                                 return 1;
7840                         }
7841                         if (reexecute_instruction(vcpu, cr2_or_gpa,
7842                                                   write_fault_to_spt,
7843                                                   emulation_type))
7844                                 return 1;
7845                         if (ctxt->have_exception) {
7846                                 /*
7847                                  * #UD should result in just EMULATION_FAILED, and trap-like
7848                                  * exception should not be encountered during decode.
7849                                  */
7850                                 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
7851                                              exception_type(ctxt->exception.vector) == EXCPT_TRAP);
7852                                 inject_emulated_exception(vcpu);
7853                                 return 1;
7854                         }
7855                         return handle_emulation_failure(vcpu, emulation_type);
7856                 }
7857         }
7858
7859         if ((emulation_type & EMULTYPE_VMWARE_GP) &&
7860             !is_vmware_backdoor_opcode(ctxt)) {
7861                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7862                 return 1;
7863         }
7864
7865         /*
7866          * Note, EMULTYPE_SKIP is intended for use *only* by vendor callbacks
7867          * for kvm_skip_emulated_instruction().  The caller is responsible for
7868          * updating interruptibility state and injecting single-step #DBs.
7869          */
7870         if (emulation_type & EMULTYPE_SKIP) {
7871                 kvm_rip_write(vcpu, ctxt->_eip);
7872                 if (ctxt->eflags & X86_EFLAGS_RF)
7873                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
7874                 return 1;
7875         }
7876
7877         if (retry_instruction(ctxt, cr2_or_gpa, emulation_type))
7878                 return 1;
7879
7880         /* this is needed for vmware backdoor interface to work since it
7881            changes registers values  during IO operation */
7882         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
7883                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7884                 emulator_invalidate_register_cache(ctxt);
7885         }
7886
7887 restart:
7888         if (emulation_type & EMULTYPE_PF) {
7889                 /* Save the faulting GPA (cr2) in the address field */
7890                 ctxt->exception.address = cr2_or_gpa;
7891
7892                 /* With shadow page tables, cr2 contains a GVA or nGPA. */
7893                 if (vcpu->arch.mmu->direct_map) {
7894                         ctxt->gpa_available = true;
7895                         ctxt->gpa_val = cr2_or_gpa;
7896                 }
7897         } else {
7898                 /* Sanitize the address out of an abundance of paranoia. */
7899                 ctxt->exception.address = 0;
7900         }
7901
7902         r = x86_emulate_insn(ctxt);
7903
7904         if (r == EMULATION_INTERCEPTED)
7905                 return 1;
7906
7907         if (r == EMULATION_FAILED) {
7908                 if (reexecute_instruction(vcpu, cr2_or_gpa, write_fault_to_spt,
7909                                         emulation_type))
7910                         return 1;
7911
7912                 return handle_emulation_failure(vcpu, emulation_type);
7913         }
7914
7915         if (ctxt->have_exception) {
7916                 r = 1;
7917                 if (inject_emulated_exception(vcpu))
7918                         return r;
7919         } else if (vcpu->arch.pio.count) {
7920                 if (!vcpu->arch.pio.in) {
7921                         /* FIXME: return into emulator if single-stepping.  */
7922                         vcpu->arch.pio.count = 0;
7923                 } else {
7924                         writeback = false;
7925                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
7926                 }
7927                 r = 0;
7928         } else if (vcpu->mmio_needed) {
7929                 ++vcpu->stat.mmio_exits;
7930
7931                 if (!vcpu->mmio_is_write)
7932                         writeback = false;
7933                 r = 0;
7934                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7935         } else if (r == EMULATION_RESTART)
7936                 goto restart;
7937         else
7938                 r = 1;
7939
7940         if (writeback) {
7941                 unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
7942                 toggle_interruptibility(vcpu, ctxt->interruptibility);
7943                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7944                 if (!ctxt->have_exception ||
7945                     exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
7946                         kvm_rip_write(vcpu, ctxt->eip);
7947                         if (r && (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
7948                                 r = kvm_vcpu_do_singlestep(vcpu);
7949                         if (kvm_x86_ops.update_emulated_instruction)
7950                                 static_call(kvm_x86_update_emulated_instruction)(vcpu);
7951                         __kvm_set_rflags(vcpu, ctxt->eflags);
7952                 }
7953
7954                 /*
7955                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
7956                  * do nothing, and it will be requested again as soon as
7957                  * the shadow expires.  But we still need to check here,
7958                  * because POPF has no interrupt shadow.
7959                  */
7960                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
7961                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7962         } else
7963                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
7964
7965         return r;
7966 }
7967
7968 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
7969 {
7970         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
7971 }
7972 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
7973
7974 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
7975                                         void *insn, int insn_len)
7976 {
7977         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
7978 }
7979 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
7980
7981 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
7982 {
7983         vcpu->arch.pio.count = 0;
7984         return 1;
7985 }
7986
7987 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
7988 {
7989         vcpu->arch.pio.count = 0;
7990
7991         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
7992                 return 1;
7993
7994         return kvm_skip_emulated_instruction(vcpu);
7995 }
7996
7997 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
7998                             unsigned short port)
7999 {
8000         unsigned long val = kvm_rax_read(vcpu);
8001         int ret = emulator_pio_out(vcpu, size, port, &val, 1);
8002
8003         if (ret)
8004                 return ret;
8005
8006         /*
8007          * Workaround userspace that relies on old KVM behavior of %rip being
8008          * incremented prior to exiting to userspace to handle "OUT 0x7e".
8009          */
8010         if (port == 0x7e &&
8011             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
8012                 vcpu->arch.complete_userspace_io =
8013                         complete_fast_pio_out_port_0x7e;
8014                 kvm_skip_emulated_instruction(vcpu);
8015         } else {
8016                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
8017                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
8018         }
8019         return 0;
8020 }
8021
8022 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
8023 {
8024         unsigned long val;
8025
8026         /* We should only ever be called with arch.pio.count equal to 1 */
8027         BUG_ON(vcpu->arch.pio.count != 1);
8028
8029         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
8030                 vcpu->arch.pio.count = 0;
8031                 return 1;
8032         }
8033
8034         /* For size less than 4 we merge, else we zero extend */
8035         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
8036
8037         /*
8038          * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
8039          * the copy and tracing
8040          */
8041         emulator_pio_in(vcpu, vcpu->arch.pio.size, vcpu->arch.pio.port, &val, 1);
8042         kvm_rax_write(vcpu, val);
8043
8044         return kvm_skip_emulated_instruction(vcpu);
8045 }
8046
8047 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
8048                            unsigned short port)
8049 {
8050         unsigned long val;
8051         int ret;
8052
8053         /* For size less than 4 we merge, else we zero extend */
8054         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
8055
8056         ret = emulator_pio_in(vcpu, size, port, &val, 1);
8057         if (ret) {
8058                 kvm_rax_write(vcpu, val);
8059                 return ret;
8060         }
8061
8062         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
8063         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
8064
8065         return 0;
8066 }
8067
8068 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
8069 {
8070         int ret;
8071
8072         if (in)
8073                 ret = kvm_fast_pio_in(vcpu, size, port);
8074         else
8075                 ret = kvm_fast_pio_out(vcpu, size, port);
8076         return ret && kvm_skip_emulated_instruction(vcpu);
8077 }
8078 EXPORT_SYMBOL_GPL(kvm_fast_pio);
8079
8080 static int kvmclock_cpu_down_prep(unsigned int cpu)
8081 {
8082         __this_cpu_write(cpu_tsc_khz, 0);
8083         return 0;
8084 }
8085
8086 static void tsc_khz_changed(void *data)
8087 {
8088         struct cpufreq_freqs *freq = data;
8089         unsigned long khz = 0;
8090
8091         if (data)
8092                 khz = freq->new;
8093         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8094                 khz = cpufreq_quick_get(raw_smp_processor_id());
8095         if (!khz)
8096                 khz = tsc_khz;
8097         __this_cpu_write(cpu_tsc_khz, khz);
8098 }
8099
8100 #ifdef CONFIG_X86_64
8101 static void kvm_hyperv_tsc_notifier(void)
8102 {
8103         struct kvm *kvm;
8104         struct kvm_vcpu *vcpu;
8105         int cpu;
8106         unsigned long flags;
8107
8108         mutex_lock(&kvm_lock);
8109         list_for_each_entry(kvm, &vm_list, vm_list)
8110                 kvm_make_mclock_inprogress_request(kvm);
8111
8112         hyperv_stop_tsc_emulation();
8113
8114         /* TSC frequency always matches when on Hyper-V */
8115         for_each_present_cpu(cpu)
8116                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
8117         kvm_max_guest_tsc_khz = tsc_khz;
8118
8119         list_for_each_entry(kvm, &vm_list, vm_list) {
8120                 struct kvm_arch *ka = &kvm->arch;
8121
8122                 spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
8123                 pvclock_update_vm_gtod_copy(kvm);
8124                 spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
8125
8126                 kvm_for_each_vcpu(cpu, vcpu, kvm)
8127                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8128
8129                 kvm_for_each_vcpu(cpu, vcpu, kvm)
8130                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
8131         }
8132         mutex_unlock(&kvm_lock);
8133 }
8134 #endif
8135
8136 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
8137 {
8138         struct kvm *kvm;
8139         struct kvm_vcpu *vcpu;
8140         int i, send_ipi = 0;
8141
8142         /*
8143          * We allow guests to temporarily run on slowing clocks,
8144          * provided we notify them after, or to run on accelerating
8145          * clocks, provided we notify them before.  Thus time never
8146          * goes backwards.
8147          *
8148          * However, we have a problem.  We can't atomically update
8149          * the frequency of a given CPU from this function; it is
8150          * merely a notifier, which can be called from any CPU.
8151          * Changing the TSC frequency at arbitrary points in time
8152          * requires a recomputation of local variables related to
8153          * the TSC for each VCPU.  We must flag these local variables
8154          * to be updated and be sure the update takes place with the
8155          * new frequency before any guests proceed.
8156          *
8157          * Unfortunately, the combination of hotplug CPU and frequency
8158          * change creates an intractable locking scenario; the order
8159          * of when these callouts happen is undefined with respect to
8160          * CPU hotplug, and they can race with each other.  As such,
8161          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
8162          * undefined; you can actually have a CPU frequency change take
8163          * place in between the computation of X and the setting of the
8164          * variable.  To protect against this problem, all updates of
8165          * the per_cpu tsc_khz variable are done in an interrupt
8166          * protected IPI, and all callers wishing to update the value
8167          * must wait for a synchronous IPI to complete (which is trivial
8168          * if the caller is on the CPU already).  This establishes the
8169          * necessary total order on variable updates.
8170          *
8171          * Note that because a guest time update may take place
8172          * anytime after the setting of the VCPU's request bit, the
8173          * correct TSC value must be set before the request.  However,
8174          * to ensure the update actually makes it to any guest which
8175          * starts running in hardware virtualization between the set
8176          * and the acquisition of the spinlock, we must also ping the
8177          * CPU after setting the request bit.
8178          *
8179          */
8180
8181         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8182
8183         mutex_lock(&kvm_lock);
8184         list_for_each_entry(kvm, &vm_list, vm_list) {
8185                 kvm_for_each_vcpu(i, vcpu, kvm) {
8186                         if (vcpu->cpu != cpu)
8187                                 continue;
8188                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8189                         if (vcpu->cpu != raw_smp_processor_id())
8190                                 send_ipi = 1;
8191                 }
8192         }
8193         mutex_unlock(&kvm_lock);
8194
8195         if (freq->old < freq->new && send_ipi) {
8196                 /*
8197                  * We upscale the frequency.  Must make the guest
8198                  * doesn't see old kvmclock values while running with
8199                  * the new frequency, otherwise we risk the guest sees
8200                  * time go backwards.
8201                  *
8202                  * In case we update the frequency for another cpu
8203                  * (which might be in guest context) send an interrupt
8204                  * to kick the cpu out of guest context.  Next time
8205                  * guest context is entered kvmclock will be updated,
8206                  * so the guest will not see stale values.
8207                  */
8208                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8209         }
8210 }
8211
8212 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
8213                                      void *data)
8214 {
8215         struct cpufreq_freqs *freq = data;
8216         int cpu;
8217
8218         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
8219                 return 0;
8220         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
8221                 return 0;
8222
8223         for_each_cpu(cpu, freq->policy->cpus)
8224                 __kvmclock_cpufreq_notifier(freq, cpu);
8225
8226         return 0;
8227 }
8228
8229 static struct notifier_block kvmclock_cpufreq_notifier_block = {
8230         .notifier_call  = kvmclock_cpufreq_notifier
8231 };
8232
8233 static int kvmclock_cpu_online(unsigned int cpu)
8234 {
8235         tsc_khz_changed(NULL);
8236         return 0;
8237 }
8238
8239 static void kvm_timer_init(void)
8240 {
8241         max_tsc_khz = tsc_khz;
8242
8243         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
8244 #ifdef CONFIG_CPU_FREQ
8245                 struct cpufreq_policy *policy;
8246                 int cpu;
8247
8248                 cpu = get_cpu();
8249                 policy = cpufreq_cpu_get(cpu);
8250                 if (policy) {
8251                         if (policy->cpuinfo.max_freq)
8252                                 max_tsc_khz = policy->cpuinfo.max_freq;
8253                         cpufreq_cpu_put(policy);
8254                 }
8255                 put_cpu();
8256 #endif
8257                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
8258                                           CPUFREQ_TRANSITION_NOTIFIER);
8259         }
8260
8261         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
8262                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
8263 }
8264
8265 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
8266 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
8267
8268 int kvm_is_in_guest(void)
8269 {
8270         return __this_cpu_read(current_vcpu) != NULL;
8271 }
8272
8273 static int kvm_is_user_mode(void)
8274 {
8275         int user_mode = 3;
8276
8277         if (__this_cpu_read(current_vcpu))
8278                 user_mode = static_call(kvm_x86_get_cpl)(__this_cpu_read(current_vcpu));
8279
8280         return user_mode != 0;
8281 }
8282
8283 static unsigned long kvm_get_guest_ip(void)
8284 {
8285         unsigned long ip = 0;
8286
8287         if (__this_cpu_read(current_vcpu))
8288                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
8289
8290         return ip;
8291 }
8292
8293 static void kvm_handle_intel_pt_intr(void)
8294 {
8295         struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
8296
8297         kvm_make_request(KVM_REQ_PMI, vcpu);
8298         __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
8299                         (unsigned long *)&vcpu->arch.pmu.global_status);
8300 }
8301
8302 static struct perf_guest_info_callbacks kvm_guest_cbs = {
8303         .is_in_guest            = kvm_is_in_guest,
8304         .is_user_mode           = kvm_is_user_mode,
8305         .get_guest_ip           = kvm_get_guest_ip,
8306         .handle_intel_pt_intr   = kvm_handle_intel_pt_intr,
8307 };
8308
8309 #ifdef CONFIG_X86_64
8310 static void pvclock_gtod_update_fn(struct work_struct *work)
8311 {
8312         struct kvm *kvm;
8313
8314         struct kvm_vcpu *vcpu;
8315         int i;
8316
8317         mutex_lock(&kvm_lock);
8318         list_for_each_entry(kvm, &vm_list, vm_list)
8319                 kvm_for_each_vcpu(i, vcpu, kvm)
8320                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
8321         atomic_set(&kvm_guest_has_master_clock, 0);
8322         mutex_unlock(&kvm_lock);
8323 }
8324
8325 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
8326
8327 /*
8328  * Indirection to move queue_work() out of the tk_core.seq write held
8329  * region to prevent possible deadlocks against time accessors which
8330  * are invoked with work related locks held.
8331  */
8332 static void pvclock_irq_work_fn(struct irq_work *w)
8333 {
8334         queue_work(system_long_wq, &pvclock_gtod_work);
8335 }
8336
8337 static DEFINE_IRQ_WORK(pvclock_irq_work, pvclock_irq_work_fn);
8338
8339 /*
8340  * Notification about pvclock gtod data update.
8341  */
8342 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
8343                                void *priv)
8344 {
8345         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
8346         struct timekeeper *tk = priv;
8347
8348         update_pvclock_gtod(tk);
8349
8350         /*
8351          * Disable master clock if host does not trust, or does not use,
8352          * TSC based clocksource. Delegate queue_work() to irq_work as
8353          * this is invoked with tk_core.seq write held.
8354          */
8355         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
8356             atomic_read(&kvm_guest_has_master_clock) != 0)
8357                 irq_work_queue(&pvclock_irq_work);
8358         return 0;
8359 }
8360
8361 static struct notifier_block pvclock_gtod_notifier = {
8362         .notifier_call = pvclock_gtod_notify,
8363 };
8364 #endif
8365
8366 int kvm_arch_init(void *opaque)
8367 {
8368         struct kvm_x86_init_ops *ops = opaque;
8369         int r;
8370
8371         if (kvm_x86_ops.hardware_enable) {
8372                 printk(KERN_ERR "kvm: already loaded the other module\n");
8373                 r = -EEXIST;
8374                 goto out;
8375         }
8376
8377         if (!ops->cpu_has_kvm_support()) {
8378                 pr_err_ratelimited("kvm: no hardware support\n");
8379                 r = -EOPNOTSUPP;
8380                 goto out;
8381         }
8382         if (ops->disabled_by_bios()) {
8383                 pr_err_ratelimited("kvm: disabled by bios\n");
8384                 r = -EOPNOTSUPP;
8385                 goto out;
8386         }
8387
8388         /*
8389          * KVM explicitly assumes that the guest has an FPU and
8390          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
8391          * vCPU's FPU state as a fxregs_state struct.
8392          */
8393         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
8394                 printk(KERN_ERR "kvm: inadequate fpu\n");
8395                 r = -EOPNOTSUPP;
8396                 goto out;
8397         }
8398
8399         r = -ENOMEM;
8400         x86_fpu_cache = kmem_cache_create("x86_fpu", sizeof(struct fpu),
8401                                           __alignof__(struct fpu), SLAB_ACCOUNT,
8402                                           NULL);
8403         if (!x86_fpu_cache) {
8404                 printk(KERN_ERR "kvm: failed to allocate cache for x86 fpu\n");
8405                 goto out;
8406         }
8407
8408         x86_emulator_cache = kvm_alloc_emulator_cache();
8409         if (!x86_emulator_cache) {
8410                 pr_err("kvm: failed to allocate cache for x86 emulator\n");
8411                 goto out_free_x86_fpu_cache;
8412         }
8413
8414         user_return_msrs = alloc_percpu(struct kvm_user_return_msrs);
8415         if (!user_return_msrs) {
8416                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_user_return_msrs\n");
8417                 goto out_free_x86_emulator_cache;
8418         }
8419         kvm_nr_uret_msrs = 0;
8420
8421         r = kvm_mmu_module_init();
8422         if (r)
8423                 goto out_free_percpu;
8424
8425         kvm_timer_init();
8426
8427         perf_register_guest_info_callbacks(&kvm_guest_cbs);
8428
8429         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
8430                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
8431                 supported_xcr0 = host_xcr0 & KVM_SUPPORTED_XCR0;
8432         }
8433
8434         if (pi_inject_timer == -1)
8435                 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
8436 #ifdef CONFIG_X86_64
8437         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
8438
8439         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8440                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
8441 #endif
8442
8443         return 0;
8444
8445 out_free_percpu:
8446         free_percpu(user_return_msrs);
8447 out_free_x86_emulator_cache:
8448         kmem_cache_destroy(x86_emulator_cache);
8449 out_free_x86_fpu_cache:
8450         kmem_cache_destroy(x86_fpu_cache);
8451 out:
8452         return r;
8453 }
8454
8455 void kvm_arch_exit(void)
8456 {
8457 #ifdef CONFIG_X86_64
8458         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8459                 clear_hv_tscchange_cb();
8460 #endif
8461         kvm_lapic_exit();
8462         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
8463
8464         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8465                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
8466                                             CPUFREQ_TRANSITION_NOTIFIER);
8467         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
8468 #ifdef CONFIG_X86_64
8469         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
8470         irq_work_sync(&pvclock_irq_work);
8471         cancel_work_sync(&pvclock_gtod_work);
8472 #endif
8473         kvm_x86_ops.hardware_enable = NULL;
8474         kvm_mmu_module_exit();
8475         free_percpu(user_return_msrs);
8476         kmem_cache_destroy(x86_emulator_cache);
8477         kmem_cache_destroy(x86_fpu_cache);
8478 #ifdef CONFIG_KVM_XEN
8479         static_key_deferred_flush(&kvm_xen_enabled);
8480         WARN_ON(static_branch_unlikely(&kvm_xen_enabled.key));
8481 #endif
8482 }
8483
8484 static int __kvm_vcpu_halt(struct kvm_vcpu *vcpu, int state, int reason)
8485 {
8486         ++vcpu->stat.halt_exits;
8487         if (lapic_in_kernel(vcpu)) {
8488                 vcpu->arch.mp_state = state;
8489                 return 1;
8490         } else {
8491                 vcpu->run->exit_reason = reason;
8492                 return 0;
8493         }
8494 }
8495
8496 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
8497 {
8498         return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_HALTED, KVM_EXIT_HLT);
8499 }
8500 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
8501
8502 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
8503 {
8504         int ret = kvm_skip_emulated_instruction(vcpu);
8505         /*
8506          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
8507          * KVM_EXIT_DEBUG here.
8508          */
8509         return kvm_vcpu_halt(vcpu) && ret;
8510 }
8511 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
8512
8513 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu)
8514 {
8515         int ret = kvm_skip_emulated_instruction(vcpu);
8516
8517         return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_AP_RESET_HOLD, KVM_EXIT_AP_RESET_HOLD) && ret;
8518 }
8519 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold);
8520
8521 #ifdef CONFIG_X86_64
8522 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
8523                                 unsigned long clock_type)
8524 {
8525         struct kvm_clock_pairing clock_pairing;
8526         struct timespec64 ts;
8527         u64 cycle;
8528         int ret;
8529
8530         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
8531                 return -KVM_EOPNOTSUPP;
8532
8533         if (!kvm_get_walltime_and_clockread(&ts, &cycle))
8534                 return -KVM_EOPNOTSUPP;
8535
8536         clock_pairing.sec = ts.tv_sec;
8537         clock_pairing.nsec = ts.tv_nsec;
8538         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
8539         clock_pairing.flags = 0;
8540         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
8541
8542         ret = 0;
8543         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
8544                             sizeof(struct kvm_clock_pairing)))
8545                 ret = -KVM_EFAULT;
8546
8547         return ret;
8548 }
8549 #endif
8550
8551 /*
8552  * kvm_pv_kick_cpu_op:  Kick a vcpu.
8553  *
8554  * @apicid - apicid of vcpu to be kicked.
8555  */
8556 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
8557 {
8558         struct kvm_lapic_irq lapic_irq;
8559
8560         lapic_irq.shorthand = APIC_DEST_NOSHORT;
8561         lapic_irq.dest_mode = APIC_DEST_PHYSICAL;
8562         lapic_irq.level = 0;
8563         lapic_irq.dest_id = apicid;
8564         lapic_irq.msi_redir_hint = false;
8565
8566         lapic_irq.delivery_mode = APIC_DM_REMRD;
8567         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
8568 }
8569
8570 bool kvm_apicv_activated(struct kvm *kvm)
8571 {
8572         return (READ_ONCE(kvm->arch.apicv_inhibit_reasons) == 0);
8573 }
8574 EXPORT_SYMBOL_GPL(kvm_apicv_activated);
8575
8576 static void kvm_apicv_init(struct kvm *kvm)
8577 {
8578         mutex_init(&kvm->arch.apicv_update_lock);
8579
8580         if (enable_apicv)
8581                 clear_bit(APICV_INHIBIT_REASON_DISABLE,
8582                           &kvm->arch.apicv_inhibit_reasons);
8583         else
8584                 set_bit(APICV_INHIBIT_REASON_DISABLE,
8585                         &kvm->arch.apicv_inhibit_reasons);
8586 }
8587
8588 static void kvm_sched_yield(struct kvm_vcpu *vcpu, unsigned long dest_id)
8589 {
8590         struct kvm_vcpu *target = NULL;
8591         struct kvm_apic_map *map;
8592
8593         vcpu->stat.directed_yield_attempted++;
8594
8595         if (single_task_running())
8596                 goto no_yield;
8597
8598         rcu_read_lock();
8599         map = rcu_dereference(vcpu->kvm->arch.apic_map);
8600
8601         if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
8602                 target = map->phys_map[dest_id]->vcpu;
8603
8604         rcu_read_unlock();
8605
8606         if (!target || !READ_ONCE(target->ready))
8607                 goto no_yield;
8608
8609         /* Ignore requests to yield to self */
8610         if (vcpu == target)
8611                 goto no_yield;
8612
8613         if (kvm_vcpu_yield_to(target) <= 0)
8614                 goto no_yield;
8615
8616         vcpu->stat.directed_yield_successful++;
8617
8618 no_yield:
8619         return;
8620 }
8621
8622 static int complete_hypercall_exit(struct kvm_vcpu *vcpu)
8623 {
8624         u64 ret = vcpu->run->hypercall.ret;
8625
8626         if (!is_64_bit_mode(vcpu))
8627                 ret = (u32)ret;
8628         kvm_rax_write(vcpu, ret);
8629         ++vcpu->stat.hypercalls;
8630         return kvm_skip_emulated_instruction(vcpu);
8631 }
8632
8633 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
8634 {
8635         unsigned long nr, a0, a1, a2, a3, ret;
8636         int op_64_bit;
8637
8638         if (kvm_xen_hypercall_enabled(vcpu->kvm))
8639                 return kvm_xen_hypercall(vcpu);
8640
8641         if (kvm_hv_hypercall_enabled(vcpu))
8642                 return kvm_hv_hypercall(vcpu);
8643
8644         nr = kvm_rax_read(vcpu);
8645         a0 = kvm_rbx_read(vcpu);
8646         a1 = kvm_rcx_read(vcpu);
8647         a2 = kvm_rdx_read(vcpu);
8648         a3 = kvm_rsi_read(vcpu);
8649
8650         trace_kvm_hypercall(nr, a0, a1, a2, a3);
8651
8652         op_64_bit = is_64_bit_mode(vcpu);
8653         if (!op_64_bit) {
8654                 nr &= 0xFFFFFFFF;
8655                 a0 &= 0xFFFFFFFF;
8656                 a1 &= 0xFFFFFFFF;
8657                 a2 &= 0xFFFFFFFF;
8658                 a3 &= 0xFFFFFFFF;
8659         }
8660
8661         if (static_call(kvm_x86_get_cpl)(vcpu) != 0) {
8662                 ret = -KVM_EPERM;
8663                 goto out;
8664         }
8665
8666         ret = -KVM_ENOSYS;
8667
8668         switch (nr) {
8669         case KVM_HC_VAPIC_POLL_IRQ:
8670                 ret = 0;
8671                 break;
8672         case KVM_HC_KICK_CPU:
8673                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_UNHALT))
8674                         break;
8675
8676                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
8677                 kvm_sched_yield(vcpu, a1);
8678                 ret = 0;
8679                 break;
8680 #ifdef CONFIG_X86_64
8681         case KVM_HC_CLOCK_PAIRING:
8682                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
8683                 break;
8684 #endif
8685         case KVM_HC_SEND_IPI:
8686                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SEND_IPI))
8687                         break;
8688
8689                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
8690                 break;
8691         case KVM_HC_SCHED_YIELD:
8692                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SCHED_YIELD))
8693                         break;
8694
8695                 kvm_sched_yield(vcpu, a0);
8696                 ret = 0;
8697                 break;
8698         case KVM_HC_MAP_GPA_RANGE: {
8699                 u64 gpa = a0, npages = a1, attrs = a2;
8700
8701                 ret = -KVM_ENOSYS;
8702                 if (!(vcpu->kvm->arch.hypercall_exit_enabled & (1 << KVM_HC_MAP_GPA_RANGE)))
8703                         break;
8704
8705                 if (!PAGE_ALIGNED(gpa) || !npages ||
8706                     gpa_to_gfn(gpa) + npages <= gpa_to_gfn(gpa)) {
8707                         ret = -KVM_EINVAL;
8708                         break;
8709                 }
8710
8711                 vcpu->run->exit_reason        = KVM_EXIT_HYPERCALL;
8712                 vcpu->run->hypercall.nr       = KVM_HC_MAP_GPA_RANGE;
8713                 vcpu->run->hypercall.args[0]  = gpa;
8714                 vcpu->run->hypercall.args[1]  = npages;
8715                 vcpu->run->hypercall.args[2]  = attrs;
8716                 vcpu->run->hypercall.longmode = op_64_bit;
8717                 vcpu->arch.complete_userspace_io = complete_hypercall_exit;
8718                 return 0;
8719         }
8720         default:
8721                 ret = -KVM_ENOSYS;
8722                 break;
8723         }
8724 out:
8725         if (!op_64_bit)
8726                 ret = (u32)ret;
8727         kvm_rax_write(vcpu, ret);
8728
8729         ++vcpu->stat.hypercalls;
8730         return kvm_skip_emulated_instruction(vcpu);
8731 }
8732 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
8733
8734 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
8735 {
8736         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
8737         char instruction[3];
8738         unsigned long rip = kvm_rip_read(vcpu);
8739
8740         static_call(kvm_x86_patch_hypercall)(vcpu, instruction);
8741
8742         return emulator_write_emulated(ctxt, rip, instruction, 3,
8743                 &ctxt->exception);
8744 }
8745
8746 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
8747 {
8748         return vcpu->run->request_interrupt_window &&
8749                 likely(!pic_in_kernel(vcpu->kvm));
8750 }
8751
8752 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
8753 {
8754         struct kvm_run *kvm_run = vcpu->run;
8755
8756         /*
8757          * if_flag is obsolete and useless, so do not bother
8758          * setting it for SEV-ES guests.  Userspace can just
8759          * use kvm_run->ready_for_interrupt_injection.
8760          */
8761         kvm_run->if_flag = !vcpu->arch.guest_state_protected
8762                 && (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
8763
8764         kvm_run->cr8 = kvm_get_cr8(vcpu);
8765         kvm_run->apic_base = kvm_get_apic_base(vcpu);
8766         kvm_run->ready_for_interrupt_injection =
8767                 pic_in_kernel(vcpu->kvm) ||
8768                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
8769
8770         if (is_smm(vcpu))
8771                 kvm_run->flags |= KVM_RUN_X86_SMM;
8772 }
8773
8774 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
8775 {
8776         int max_irr, tpr;
8777
8778         if (!kvm_x86_ops.update_cr8_intercept)
8779                 return;
8780
8781         if (!lapic_in_kernel(vcpu))
8782                 return;
8783
8784         if (vcpu->arch.apicv_active)
8785                 return;
8786
8787         if (!vcpu->arch.apic->vapic_addr)
8788                 max_irr = kvm_lapic_find_highest_irr(vcpu);
8789         else
8790                 max_irr = -1;
8791
8792         if (max_irr != -1)
8793                 max_irr >>= 4;
8794
8795         tpr = kvm_lapic_get_cr8(vcpu);
8796
8797         static_call(kvm_x86_update_cr8_intercept)(vcpu, tpr, max_irr);
8798 }
8799
8800
8801 int kvm_check_nested_events(struct kvm_vcpu *vcpu)
8802 {
8803         if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
8804                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
8805                 return 1;
8806         }
8807
8808         return kvm_x86_ops.nested_ops->check_events(vcpu);
8809 }
8810
8811 static void kvm_inject_exception(struct kvm_vcpu *vcpu)
8812 {
8813         if (vcpu->arch.exception.error_code && !is_protmode(vcpu))
8814                 vcpu->arch.exception.error_code = false;
8815         static_call(kvm_x86_queue_exception)(vcpu);
8816 }
8817
8818 static int inject_pending_event(struct kvm_vcpu *vcpu, bool *req_immediate_exit)
8819 {
8820         int r;
8821         bool can_inject = true;
8822
8823         /* try to reinject previous events if any */
8824
8825         if (vcpu->arch.exception.injected) {
8826                 kvm_inject_exception(vcpu);
8827                 can_inject = false;
8828         }
8829         /*
8830          * Do not inject an NMI or interrupt if there is a pending
8831          * exception.  Exceptions and interrupts are recognized at
8832          * instruction boundaries, i.e. the start of an instruction.
8833          * Trap-like exceptions, e.g. #DB, have higher priority than
8834          * NMIs and interrupts, i.e. traps are recognized before an
8835          * NMI/interrupt that's pending on the same instruction.
8836          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
8837          * priority, but are only generated (pended) during instruction
8838          * execution, i.e. a pending fault-like exception means the
8839          * fault occurred on the *previous* instruction and must be
8840          * serviced prior to recognizing any new events in order to
8841          * fully complete the previous instruction.
8842          */
8843         else if (!vcpu->arch.exception.pending) {
8844                 if (vcpu->arch.nmi_injected) {
8845                         static_call(kvm_x86_set_nmi)(vcpu);
8846                         can_inject = false;
8847                 } else if (vcpu->arch.interrupt.injected) {
8848                         static_call(kvm_x86_set_irq)(vcpu);
8849                         can_inject = false;
8850                 }
8851         }
8852
8853         WARN_ON_ONCE(vcpu->arch.exception.injected &&
8854                      vcpu->arch.exception.pending);
8855
8856         /*
8857          * Call check_nested_events() even if we reinjected a previous event
8858          * in order for caller to determine if it should require immediate-exit
8859          * from L2 to L1 due to pending L1 events which require exit
8860          * from L2 to L1.
8861          */
8862         if (is_guest_mode(vcpu)) {
8863                 r = kvm_check_nested_events(vcpu);
8864                 if (r < 0)
8865                         goto out;
8866         }
8867
8868         /* try to inject new event if pending */
8869         if (vcpu->arch.exception.pending) {
8870                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
8871                                         vcpu->arch.exception.has_error_code,
8872                                         vcpu->arch.exception.error_code);
8873
8874                 vcpu->arch.exception.pending = false;
8875                 vcpu->arch.exception.injected = true;
8876
8877                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
8878                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
8879                                              X86_EFLAGS_RF);
8880
8881                 if (vcpu->arch.exception.nr == DB_VECTOR) {
8882                         kvm_deliver_exception_payload(vcpu);
8883                         if (vcpu->arch.dr7 & DR7_GD) {
8884                                 vcpu->arch.dr7 &= ~DR7_GD;
8885                                 kvm_update_dr7(vcpu);
8886                         }
8887                 }
8888
8889                 kvm_inject_exception(vcpu);
8890                 can_inject = false;
8891         }
8892
8893         /*
8894          * Finally, inject interrupt events.  If an event cannot be injected
8895          * due to architectural conditions (e.g. IF=0) a window-open exit
8896          * will re-request KVM_REQ_EVENT.  Sometimes however an event is pending
8897          * and can architecturally be injected, but we cannot do it right now:
8898          * an interrupt could have arrived just now and we have to inject it
8899          * as a vmexit, or there could already an event in the queue, which is
8900          * indicated by can_inject.  In that case we request an immediate exit
8901          * in order to make progress and get back here for another iteration.
8902          * The kvm_x86_ops hooks communicate this by returning -EBUSY.
8903          */
8904         if (vcpu->arch.smi_pending) {
8905                 r = can_inject ? static_call(kvm_x86_smi_allowed)(vcpu, true) : -EBUSY;
8906                 if (r < 0)
8907                         goto out;
8908                 if (r) {
8909                         vcpu->arch.smi_pending = false;
8910                         ++vcpu->arch.smi_count;
8911                         enter_smm(vcpu);
8912                         can_inject = false;
8913                 } else
8914                         static_call(kvm_x86_enable_smi_window)(vcpu);
8915         }
8916
8917         if (vcpu->arch.nmi_pending) {
8918                 r = can_inject ? static_call(kvm_x86_nmi_allowed)(vcpu, true) : -EBUSY;
8919                 if (r < 0)
8920                         goto out;
8921                 if (r) {
8922                         --vcpu->arch.nmi_pending;
8923                         vcpu->arch.nmi_injected = true;
8924                         static_call(kvm_x86_set_nmi)(vcpu);
8925                         can_inject = false;
8926                         WARN_ON(static_call(kvm_x86_nmi_allowed)(vcpu, true) < 0);
8927                 }
8928                 if (vcpu->arch.nmi_pending)
8929                         static_call(kvm_x86_enable_nmi_window)(vcpu);
8930         }
8931
8932         if (kvm_cpu_has_injectable_intr(vcpu)) {
8933                 r = can_inject ? static_call(kvm_x86_interrupt_allowed)(vcpu, true) : -EBUSY;
8934                 if (r < 0)
8935                         goto out;
8936                 if (r) {
8937                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu), false);
8938                         static_call(kvm_x86_set_irq)(vcpu);
8939                         WARN_ON(static_call(kvm_x86_interrupt_allowed)(vcpu, true) < 0);
8940                 }
8941                 if (kvm_cpu_has_injectable_intr(vcpu))
8942                         static_call(kvm_x86_enable_irq_window)(vcpu);
8943         }
8944
8945         if (is_guest_mode(vcpu) &&
8946             kvm_x86_ops.nested_ops->hv_timer_pending &&
8947             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
8948                 *req_immediate_exit = true;
8949
8950         WARN_ON(vcpu->arch.exception.pending);
8951         return 0;
8952
8953 out:
8954         if (r == -EBUSY) {
8955                 *req_immediate_exit = true;
8956                 r = 0;
8957         }
8958         return r;
8959 }
8960
8961 static void process_nmi(struct kvm_vcpu *vcpu)
8962 {
8963         unsigned limit = 2;
8964
8965         /*
8966          * x86 is limited to one NMI running, and one NMI pending after it.
8967          * If an NMI is already in progress, limit further NMIs to just one.
8968          * Otherwise, allow two (and we'll inject the first one immediately).
8969          */
8970         if (static_call(kvm_x86_get_nmi_mask)(vcpu) || vcpu->arch.nmi_injected)
8971                 limit = 1;
8972
8973         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
8974         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
8975         kvm_make_request(KVM_REQ_EVENT, vcpu);
8976 }
8977
8978 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
8979 {
8980         u32 flags = 0;
8981         flags |= seg->g       << 23;
8982         flags |= seg->db      << 22;
8983         flags |= seg->l       << 21;
8984         flags |= seg->avl     << 20;
8985         flags |= seg->present << 15;
8986         flags |= seg->dpl     << 13;
8987         flags |= seg->s       << 12;
8988         flags |= seg->type    << 8;
8989         return flags;
8990 }
8991
8992 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
8993 {
8994         struct kvm_segment seg;
8995         int offset;
8996
8997         kvm_get_segment(vcpu, &seg, n);
8998         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
8999
9000         if (n < 3)
9001                 offset = 0x7f84 + n * 12;
9002         else
9003                 offset = 0x7f2c + (n - 3) * 12;
9004
9005         put_smstate(u32, buf, offset + 8, seg.base);
9006         put_smstate(u32, buf, offset + 4, seg.limit);
9007         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
9008 }
9009
9010 #ifdef CONFIG_X86_64
9011 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
9012 {
9013         struct kvm_segment seg;
9014         int offset;
9015         u16 flags;
9016
9017         kvm_get_segment(vcpu, &seg, n);
9018         offset = 0x7e00 + n * 16;
9019
9020         flags = enter_smm_get_segment_flags(&seg) >> 8;
9021         put_smstate(u16, buf, offset, seg.selector);
9022         put_smstate(u16, buf, offset + 2, flags);
9023         put_smstate(u32, buf, offset + 4, seg.limit);
9024         put_smstate(u64, buf, offset + 8, seg.base);
9025 }
9026 #endif
9027
9028 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
9029 {
9030         struct desc_ptr dt;
9031         struct kvm_segment seg;
9032         unsigned long val;
9033         int i;
9034
9035         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
9036         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
9037         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
9038         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
9039
9040         for (i = 0; i < 8; i++)
9041                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read_raw(vcpu, i));
9042
9043         kvm_get_dr(vcpu, 6, &val);
9044         put_smstate(u32, buf, 0x7fcc, (u32)val);
9045         kvm_get_dr(vcpu, 7, &val);
9046         put_smstate(u32, buf, 0x7fc8, (u32)val);
9047
9048         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
9049         put_smstate(u32, buf, 0x7fc4, seg.selector);
9050         put_smstate(u32, buf, 0x7f64, seg.base);
9051         put_smstate(u32, buf, 0x7f60, seg.limit);
9052         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
9053
9054         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
9055         put_smstate(u32, buf, 0x7fc0, seg.selector);
9056         put_smstate(u32, buf, 0x7f80, seg.base);
9057         put_smstate(u32, buf, 0x7f7c, seg.limit);
9058         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
9059
9060         static_call(kvm_x86_get_gdt)(vcpu, &dt);
9061         put_smstate(u32, buf, 0x7f74, dt.address);
9062         put_smstate(u32, buf, 0x7f70, dt.size);
9063
9064         static_call(kvm_x86_get_idt)(vcpu, &dt);
9065         put_smstate(u32, buf, 0x7f58, dt.address);
9066         put_smstate(u32, buf, 0x7f54, dt.size);
9067
9068         for (i = 0; i < 6; i++)
9069                 enter_smm_save_seg_32(vcpu, buf, i);
9070
9071         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
9072
9073         /* revision id */
9074         put_smstate(u32, buf, 0x7efc, 0x00020000);
9075         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
9076 }
9077
9078 #ifdef CONFIG_X86_64
9079 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
9080 {
9081         struct desc_ptr dt;
9082         struct kvm_segment seg;
9083         unsigned long val;
9084         int i;
9085
9086         for (i = 0; i < 16; i++)
9087                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read_raw(vcpu, i));
9088
9089         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
9090         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
9091
9092         kvm_get_dr(vcpu, 6, &val);
9093         put_smstate(u64, buf, 0x7f68, val);
9094         kvm_get_dr(vcpu, 7, &val);
9095         put_smstate(u64, buf, 0x7f60, val);
9096
9097         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
9098         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
9099         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
9100
9101         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
9102
9103         /* revision id */
9104         put_smstate(u32, buf, 0x7efc, 0x00020064);
9105
9106         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
9107
9108         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
9109         put_smstate(u16, buf, 0x7e90, seg.selector);
9110         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
9111         put_smstate(u32, buf, 0x7e94, seg.limit);
9112         put_smstate(u64, buf, 0x7e98, seg.base);
9113
9114         static_call(kvm_x86_get_idt)(vcpu, &dt);
9115         put_smstate(u32, buf, 0x7e84, dt.size);
9116         put_smstate(u64, buf, 0x7e88, dt.address);
9117
9118         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
9119         put_smstate(u16, buf, 0x7e70, seg.selector);
9120         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
9121         put_smstate(u32, buf, 0x7e74, seg.limit);
9122         put_smstate(u64, buf, 0x7e78, seg.base);
9123
9124         static_call(kvm_x86_get_gdt)(vcpu, &dt);
9125         put_smstate(u32, buf, 0x7e64, dt.size);
9126         put_smstate(u64, buf, 0x7e68, dt.address);
9127
9128         for (i = 0; i < 6; i++)
9129                 enter_smm_save_seg_64(vcpu, buf, i);
9130 }
9131 #endif
9132
9133 static void enter_smm(struct kvm_vcpu *vcpu)
9134 {
9135         struct kvm_segment cs, ds;
9136         struct desc_ptr dt;
9137         unsigned long cr0;
9138         char buf[512];
9139
9140         memset(buf, 0, 512);
9141 #ifdef CONFIG_X86_64
9142         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9143                 enter_smm_save_state_64(vcpu, buf);
9144         else
9145 #endif
9146                 enter_smm_save_state_32(vcpu, buf);
9147
9148         /*
9149          * Give enter_smm() a chance to make ISA-specific changes to the vCPU
9150          * state (e.g. leave guest mode) after we've saved the state into the
9151          * SMM state-save area.
9152          */
9153         static_call(kvm_x86_enter_smm)(vcpu, buf);
9154
9155         kvm_smm_changed(vcpu, true);
9156         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
9157
9158         if (static_call(kvm_x86_get_nmi_mask)(vcpu))
9159                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
9160         else
9161                 static_call(kvm_x86_set_nmi_mask)(vcpu, true);
9162
9163         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
9164         kvm_rip_write(vcpu, 0x8000);
9165
9166         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
9167         static_call(kvm_x86_set_cr0)(vcpu, cr0);
9168         vcpu->arch.cr0 = cr0;
9169
9170         static_call(kvm_x86_set_cr4)(vcpu, 0);
9171
9172         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
9173         dt.address = dt.size = 0;
9174         static_call(kvm_x86_set_idt)(vcpu, &dt);
9175
9176         kvm_set_dr(vcpu, 7, DR7_FIXED_1);
9177
9178         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
9179         cs.base = vcpu->arch.smbase;
9180
9181         ds.selector = 0;
9182         ds.base = 0;
9183
9184         cs.limit    = ds.limit = 0xffffffff;
9185         cs.type     = ds.type = 0x3;
9186         cs.dpl      = ds.dpl = 0;
9187         cs.db       = ds.db = 0;
9188         cs.s        = ds.s = 1;
9189         cs.l        = ds.l = 0;
9190         cs.g        = ds.g = 1;
9191         cs.avl      = ds.avl = 0;
9192         cs.present  = ds.present = 1;
9193         cs.unusable = ds.unusable = 0;
9194         cs.padding  = ds.padding = 0;
9195
9196         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
9197         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
9198         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
9199         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
9200         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
9201         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
9202
9203 #ifdef CONFIG_X86_64
9204         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9205                 static_call(kvm_x86_set_efer)(vcpu, 0);
9206 #endif
9207
9208         kvm_update_cpuid_runtime(vcpu);
9209         kvm_mmu_reset_context(vcpu);
9210 }
9211
9212 static void process_smi(struct kvm_vcpu *vcpu)
9213 {
9214         vcpu->arch.smi_pending = true;
9215         kvm_make_request(KVM_REQ_EVENT, vcpu);
9216 }
9217
9218 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
9219                                        unsigned long *vcpu_bitmap)
9220 {
9221         cpumask_var_t cpus;
9222
9223         zalloc_cpumask_var(&cpus, GFP_ATOMIC);
9224
9225         kvm_make_vcpus_request_mask(kvm, KVM_REQ_SCAN_IOAPIC,
9226                                     NULL, vcpu_bitmap, cpus);
9227
9228         free_cpumask_var(cpus);
9229 }
9230
9231 void kvm_make_scan_ioapic_request(struct kvm *kvm)
9232 {
9233         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
9234 }
9235
9236 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
9237 {
9238         bool activate;
9239
9240         if (!lapic_in_kernel(vcpu))
9241                 return;
9242
9243         mutex_lock(&vcpu->kvm->arch.apicv_update_lock);
9244
9245         activate = kvm_apicv_activated(vcpu->kvm);
9246         if (vcpu->arch.apicv_active == activate)
9247                 goto out;
9248
9249         vcpu->arch.apicv_active = activate;
9250         kvm_apic_update_apicv(vcpu);
9251         static_call(kvm_x86_refresh_apicv_exec_ctrl)(vcpu);
9252
9253         /*
9254          * When APICv gets disabled, we may still have injected interrupts
9255          * pending. At the same time, KVM_REQ_EVENT may not be set as APICv was
9256          * still active when the interrupt got accepted. Make sure
9257          * inject_pending_event() is called to check for that.
9258          */
9259         if (!vcpu->arch.apicv_active)
9260                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9261
9262 out:
9263         mutex_unlock(&vcpu->kvm->arch.apicv_update_lock);
9264 }
9265 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv);
9266
9267 void __kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
9268 {
9269         unsigned long old, new;
9270
9271         if (!kvm_x86_ops.check_apicv_inhibit_reasons ||
9272             !static_call(kvm_x86_check_apicv_inhibit_reasons)(bit))
9273                 return;
9274
9275         old = new = kvm->arch.apicv_inhibit_reasons;
9276
9277         if (activate)
9278                 __clear_bit(bit, &new);
9279         else
9280                 __set_bit(bit, &new);
9281
9282         if (!!old != !!new) {
9283                 trace_kvm_apicv_update_request(activate, bit);
9284                 kvm_make_all_cpus_request(kvm, KVM_REQ_APICV_UPDATE);
9285                 kvm->arch.apicv_inhibit_reasons = new;
9286                 if (new) {
9287                         unsigned long gfn = gpa_to_gfn(APIC_DEFAULT_PHYS_BASE);
9288                         kvm_zap_gfn_range(kvm, gfn, gfn+1);
9289                 }
9290         } else
9291                 kvm->arch.apicv_inhibit_reasons = new;
9292 }
9293 EXPORT_SYMBOL_GPL(__kvm_request_apicv_update);
9294
9295 void kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
9296 {
9297         mutex_lock(&kvm->arch.apicv_update_lock);
9298         __kvm_request_apicv_update(kvm, activate, bit);
9299         mutex_unlock(&kvm->arch.apicv_update_lock);
9300 }
9301 EXPORT_SYMBOL_GPL(kvm_request_apicv_update);
9302
9303 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
9304 {
9305         if (!kvm_apic_present(vcpu))
9306                 return;
9307
9308         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
9309
9310         if (irqchip_split(vcpu->kvm))
9311                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
9312         else {
9313                 if (vcpu->arch.apicv_active)
9314                         static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9315                 if (ioapic_in_kernel(vcpu->kvm))
9316                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
9317         }
9318
9319         if (is_guest_mode(vcpu))
9320                 vcpu->arch.load_eoi_exitmap_pending = true;
9321         else
9322                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
9323 }
9324
9325 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
9326 {
9327         u64 eoi_exit_bitmap[4];
9328
9329         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
9330                 return;
9331
9332         if (to_hv_vcpu(vcpu))
9333                 bitmap_or((ulong *)eoi_exit_bitmap,
9334                           vcpu->arch.ioapic_handled_vectors,
9335                           to_hv_synic(vcpu)->vec_bitmap, 256);
9336
9337         static_call(kvm_x86_load_eoi_exitmap)(vcpu, eoi_exit_bitmap);
9338 }
9339
9340 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
9341                                             unsigned long start, unsigned long end)
9342 {
9343         unsigned long apic_address;
9344
9345         /*
9346          * The physical address of apic access page is stored in the VMCS.
9347          * Update it when it becomes invalid.
9348          */
9349         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
9350         if (start <= apic_address && apic_address < end)
9351                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
9352 }
9353
9354 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
9355 {
9356         if (!lapic_in_kernel(vcpu))
9357                 return;
9358
9359         if (!kvm_x86_ops.set_apic_access_page_addr)
9360                 return;
9361
9362         static_call(kvm_x86_set_apic_access_page_addr)(vcpu);
9363 }
9364
9365 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
9366 {
9367         smp_send_reschedule(vcpu->cpu);
9368 }
9369 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
9370
9371 /*
9372  * Returns 1 to let vcpu_run() continue the guest execution loop without
9373  * exiting to the userspace.  Otherwise, the value will be returned to the
9374  * userspace.
9375  */
9376 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
9377 {
9378         int r;
9379         bool req_int_win =
9380                 dm_request_for_irq_injection(vcpu) &&
9381                 kvm_cpu_accept_dm_intr(vcpu);
9382         fastpath_t exit_fastpath;
9383
9384         bool req_immediate_exit = false;
9385
9386         /* Forbid vmenter if vcpu dirty ring is soft-full */
9387         if (unlikely(vcpu->kvm->dirty_ring_size &&
9388                      kvm_dirty_ring_soft_full(&vcpu->dirty_ring))) {
9389                 vcpu->run->exit_reason = KVM_EXIT_DIRTY_RING_FULL;
9390                 trace_kvm_dirty_ring_exit(vcpu);
9391                 r = 0;
9392                 goto out;
9393         }
9394
9395         if (kvm_request_pending(vcpu)) {
9396                 if (kvm_check_request(KVM_REQ_VM_BUGGED, vcpu)) {
9397                         r = -EIO;
9398                         goto out;
9399                 }
9400                 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu)) {
9401                         if (unlikely(!kvm_x86_ops.nested_ops->get_nested_state_pages(vcpu))) {
9402                                 r = 0;
9403                                 goto out;
9404                         }
9405                 }
9406                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
9407                         kvm_mmu_unload(vcpu);
9408                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
9409                         __kvm_migrate_timers(vcpu);
9410                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
9411                         kvm_gen_update_masterclock(vcpu->kvm);
9412                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
9413                         kvm_gen_kvmclock_update(vcpu);
9414                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
9415                         r = kvm_guest_time_update(vcpu);
9416                         if (unlikely(r))
9417                                 goto out;
9418                 }
9419                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
9420                         kvm_mmu_sync_roots(vcpu);
9421                 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD, vcpu))
9422                         kvm_mmu_load_pgd(vcpu);
9423                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) {
9424                         kvm_vcpu_flush_tlb_all(vcpu);
9425
9426                         /* Flushing all ASIDs flushes the current ASID... */
9427                         kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
9428                 }
9429                 if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu))
9430                         kvm_vcpu_flush_tlb_current(vcpu);
9431                 if (kvm_check_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu))
9432                         kvm_vcpu_flush_tlb_guest(vcpu);
9433
9434                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
9435                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
9436                         r = 0;
9437                         goto out;
9438                 }
9439                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
9440                         if (is_guest_mode(vcpu)) {
9441                                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
9442                         } else {
9443                                 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
9444                                 vcpu->mmio_needed = 0;
9445                                 r = 0;
9446                                 goto out;
9447                         }
9448                 }
9449                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
9450                         /* Page is swapped out. Do synthetic halt */
9451                         vcpu->arch.apf.halted = true;
9452                         r = 1;
9453                         goto out;
9454                 }
9455                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
9456                         record_steal_time(vcpu);
9457                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
9458                         process_smi(vcpu);
9459                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
9460                         process_nmi(vcpu);
9461                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
9462                         kvm_pmu_handle_event(vcpu);
9463                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
9464                         kvm_pmu_deliver_pmi(vcpu);
9465                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
9466                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
9467                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
9468                                      vcpu->arch.ioapic_handled_vectors)) {
9469                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
9470                                 vcpu->run->eoi.vector =
9471                                                 vcpu->arch.pending_ioapic_eoi;
9472                                 r = 0;
9473                                 goto out;
9474                         }
9475                 }
9476                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
9477                         vcpu_scan_ioapic(vcpu);
9478                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
9479                         vcpu_load_eoi_exitmap(vcpu);
9480                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
9481                         kvm_vcpu_reload_apic_access_page(vcpu);
9482                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
9483                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9484                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
9485                         r = 0;
9486                         goto out;
9487                 }
9488                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
9489                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9490                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
9491                         r = 0;
9492                         goto out;
9493                 }
9494                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
9495                         struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
9496
9497                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
9498                         vcpu->run->hyperv = hv_vcpu->exit;
9499                         r = 0;
9500                         goto out;
9501                 }
9502
9503                 /*
9504                  * KVM_REQ_HV_STIMER has to be processed after
9505                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
9506                  * depend on the guest clock being up-to-date
9507                  */
9508                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
9509                         kvm_hv_process_stimers(vcpu);
9510                 if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu))
9511                         kvm_vcpu_update_apicv(vcpu);
9512                 if (kvm_check_request(KVM_REQ_APF_READY, vcpu))
9513                         kvm_check_async_pf_completion(vcpu);
9514                 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED, vcpu))
9515                         static_call(kvm_x86_msr_filter_changed)(vcpu);
9516
9517                 if (kvm_check_request(KVM_REQ_UPDATE_CPU_DIRTY_LOGGING, vcpu))
9518                         static_call(kvm_x86_update_cpu_dirty_logging)(vcpu);
9519         }
9520
9521         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win ||
9522             kvm_xen_has_interrupt(vcpu)) {
9523                 ++vcpu->stat.req_event;
9524                 r = kvm_apic_accept_events(vcpu);
9525                 if (r < 0) {
9526                         r = 0;
9527                         goto out;
9528                 }
9529                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
9530                         r = 1;
9531                         goto out;
9532                 }
9533
9534                 r = inject_pending_event(vcpu, &req_immediate_exit);
9535                 if (r < 0) {
9536                         r = 0;
9537                         goto out;
9538                 }
9539                 if (req_int_win)
9540                         static_call(kvm_x86_enable_irq_window)(vcpu);
9541
9542                 if (kvm_lapic_enabled(vcpu)) {
9543                         update_cr8_intercept(vcpu);
9544                         kvm_lapic_sync_to_vapic(vcpu);
9545                 }
9546         }
9547
9548         r = kvm_mmu_reload(vcpu);
9549         if (unlikely(r)) {
9550                 goto cancel_injection;
9551         }
9552
9553         preempt_disable();
9554
9555         static_call(kvm_x86_prepare_guest_switch)(vcpu);
9556
9557         /*
9558          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
9559          * IPI are then delayed after guest entry, which ensures that they
9560          * result in virtual interrupt delivery.
9561          */
9562         local_irq_disable();
9563         vcpu->mode = IN_GUEST_MODE;
9564
9565         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9566
9567         /*
9568          * 1) We should set ->mode before checking ->requests.  Please see
9569          * the comment in kvm_vcpu_exiting_guest_mode().
9570          *
9571          * 2) For APICv, we should set ->mode before checking PID.ON. This
9572          * pairs with the memory barrier implicit in pi_test_and_set_on
9573          * (see vmx_deliver_posted_interrupt).
9574          *
9575          * 3) This also orders the write to mode from any reads to the page
9576          * tables done while the VCPU is running.  Please see the comment
9577          * in kvm_flush_remote_tlbs.
9578          */
9579         smp_mb__after_srcu_read_unlock();
9580
9581         /*
9582          * This handles the case where a posted interrupt was
9583          * notified with kvm_vcpu_kick.
9584          */
9585         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
9586                 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9587
9588         if (kvm_vcpu_exit_request(vcpu)) {
9589                 vcpu->mode = OUTSIDE_GUEST_MODE;
9590                 smp_wmb();
9591                 local_irq_enable();
9592                 preempt_enable();
9593                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9594                 r = 1;
9595                 goto cancel_injection;
9596         }
9597
9598         if (req_immediate_exit) {
9599                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9600                 static_call(kvm_x86_request_immediate_exit)(vcpu);
9601         }
9602
9603         fpregs_assert_state_consistent();
9604         if (test_thread_flag(TIF_NEED_FPU_LOAD))
9605                 switch_fpu_return();
9606
9607         if (unlikely(vcpu->arch.switch_db_regs)) {
9608                 set_debugreg(0, 7);
9609                 set_debugreg(vcpu->arch.eff_db[0], 0);
9610                 set_debugreg(vcpu->arch.eff_db[1], 1);
9611                 set_debugreg(vcpu->arch.eff_db[2], 2);
9612                 set_debugreg(vcpu->arch.eff_db[3], 3);
9613         } else if (unlikely(hw_breakpoint_active())) {
9614                 set_debugreg(0, 7);
9615         }
9616
9617         for (;;) {
9618                 exit_fastpath = static_call(kvm_x86_run)(vcpu);
9619                 if (likely(exit_fastpath != EXIT_FASTPATH_REENTER_GUEST))
9620                         break;
9621
9622                 if (unlikely(kvm_vcpu_exit_request(vcpu))) {
9623                         exit_fastpath = EXIT_FASTPATH_EXIT_HANDLED;
9624                         break;
9625                 }
9626
9627                 if (vcpu->arch.apicv_active)
9628                         static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9629         }
9630
9631         /*
9632          * Do this here before restoring debug registers on the host.  And
9633          * since we do this before handling the vmexit, a DR access vmexit
9634          * can (a) read the correct value of the debug registers, (b) set
9635          * KVM_DEBUGREG_WONT_EXIT again.
9636          */
9637         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
9638                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
9639                 static_call(kvm_x86_sync_dirty_debug_regs)(vcpu);
9640                 kvm_update_dr0123(vcpu);
9641                 kvm_update_dr7(vcpu);
9642         }
9643
9644         /*
9645          * If the guest has used debug registers, at least dr7
9646          * will be disabled while returning to the host.
9647          * If we don't have active breakpoints in the host, we don't
9648          * care about the messed up debug address registers. But if
9649          * we have some of them active, restore the old state.
9650          */
9651         if (hw_breakpoint_active())
9652                 hw_breakpoint_restore();
9653
9654         vcpu->arch.last_vmentry_cpu = vcpu->cpu;
9655         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
9656
9657         vcpu->mode = OUTSIDE_GUEST_MODE;
9658         smp_wmb();
9659
9660         static_call(kvm_x86_handle_exit_irqoff)(vcpu);
9661
9662         /*
9663          * Consume any pending interrupts, including the possible source of
9664          * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
9665          * An instruction is required after local_irq_enable() to fully unblock
9666          * interrupts on processors that implement an interrupt shadow, the
9667          * stat.exits increment will do nicely.
9668          */
9669         kvm_before_interrupt(vcpu);
9670         local_irq_enable();
9671         ++vcpu->stat.exits;
9672         local_irq_disable();
9673         kvm_after_interrupt(vcpu);
9674
9675         /*
9676          * Wait until after servicing IRQs to account guest time so that any
9677          * ticks that occurred while running the guest are properly accounted
9678          * to the guest.  Waiting until IRQs are enabled degrades the accuracy
9679          * of accounting via context tracking, but the loss of accuracy is
9680          * acceptable for all known use cases.
9681          */
9682         vtime_account_guest_exit();
9683
9684         if (lapic_in_kernel(vcpu)) {
9685                 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
9686                 if (delta != S64_MIN) {
9687                         trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
9688                         vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
9689                 }
9690         }
9691
9692         local_irq_enable();
9693         preempt_enable();
9694
9695         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9696
9697         /*
9698          * Profile KVM exit RIPs:
9699          */
9700         if (unlikely(prof_on == KVM_PROFILING)) {
9701                 unsigned long rip = kvm_rip_read(vcpu);
9702                 profile_hit(KVM_PROFILING, (void *)rip);
9703         }
9704
9705         if (unlikely(vcpu->arch.tsc_always_catchup))
9706                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
9707
9708         if (vcpu->arch.apic_attention)
9709                 kvm_lapic_sync_from_vapic(vcpu);
9710
9711         r = static_call(kvm_x86_handle_exit)(vcpu, exit_fastpath);
9712         return r;
9713
9714 cancel_injection:
9715         if (req_immediate_exit)
9716                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9717         static_call(kvm_x86_cancel_injection)(vcpu);
9718         if (unlikely(vcpu->arch.apic_attention))
9719                 kvm_lapic_sync_from_vapic(vcpu);
9720 out:
9721         return r;
9722 }
9723
9724 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
9725 {
9726         if (!kvm_arch_vcpu_runnable(vcpu) &&
9727             (!kvm_x86_ops.pre_block || static_call(kvm_x86_pre_block)(vcpu) == 0)) {
9728                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9729                 kvm_vcpu_block(vcpu);
9730                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9731
9732                 if (kvm_x86_ops.post_block)
9733                         static_call(kvm_x86_post_block)(vcpu);
9734
9735                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
9736                         return 1;
9737         }
9738
9739         if (kvm_apic_accept_events(vcpu) < 0)
9740                 return 0;
9741         switch(vcpu->arch.mp_state) {
9742         case KVM_MP_STATE_HALTED:
9743         case KVM_MP_STATE_AP_RESET_HOLD:
9744                 vcpu->arch.pv.pv_unhalted = false;
9745                 vcpu->arch.mp_state =
9746                         KVM_MP_STATE_RUNNABLE;
9747                 fallthrough;
9748         case KVM_MP_STATE_RUNNABLE:
9749                 vcpu->arch.apf.halted = false;
9750                 break;
9751         case KVM_MP_STATE_INIT_RECEIVED:
9752                 break;
9753         default:
9754                 return -EINTR;
9755         }
9756         return 1;
9757 }
9758
9759 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
9760 {
9761         if (is_guest_mode(vcpu))
9762                 kvm_check_nested_events(vcpu);
9763
9764         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
9765                 !vcpu->arch.apf.halted);
9766 }
9767
9768 static int vcpu_run(struct kvm_vcpu *vcpu)
9769 {
9770         int r;
9771         struct kvm *kvm = vcpu->kvm;
9772
9773         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9774         vcpu->arch.l1tf_flush_l1d = true;
9775
9776         for (;;) {
9777                 if (kvm_vcpu_running(vcpu)) {
9778                         r = vcpu_enter_guest(vcpu);
9779                 } else {
9780                         r = vcpu_block(kvm, vcpu);
9781                 }
9782
9783                 if (r <= 0)
9784                         break;
9785
9786                 kvm_clear_request(KVM_REQ_UNBLOCK, vcpu);
9787                 if (kvm_cpu_has_pending_timer(vcpu))
9788                         kvm_inject_pending_timer_irqs(vcpu);
9789
9790                 if (dm_request_for_irq_injection(vcpu) &&
9791                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
9792                         r = 0;
9793                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
9794                         ++vcpu->stat.request_irq_exits;
9795                         break;
9796                 }
9797
9798                 if (__xfer_to_guest_mode_work_pending()) {
9799                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9800                         r = xfer_to_guest_mode_handle_work(vcpu);
9801                         if (r)
9802                                 return r;
9803                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9804                 }
9805         }
9806
9807         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9808
9809         return r;
9810 }
9811
9812 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
9813 {
9814         int r;
9815
9816         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9817         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
9818         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9819         return r;
9820 }
9821
9822 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
9823 {
9824         BUG_ON(!vcpu->arch.pio.count);
9825
9826         return complete_emulated_io(vcpu);
9827 }
9828
9829 /*
9830  * Implements the following, as a state machine:
9831  *
9832  * read:
9833  *   for each fragment
9834  *     for each mmio piece in the fragment
9835  *       write gpa, len
9836  *       exit
9837  *       copy data
9838  *   execute insn
9839  *
9840  * write:
9841  *   for each fragment
9842  *     for each mmio piece in the fragment
9843  *       write gpa, len
9844  *       copy data
9845  *       exit
9846  */
9847 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
9848 {
9849         struct kvm_run *run = vcpu->run;
9850         struct kvm_mmio_fragment *frag;
9851         unsigned len;
9852
9853         BUG_ON(!vcpu->mmio_needed);
9854
9855         /* Complete previous fragment */
9856         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
9857         len = min(8u, frag->len);
9858         if (!vcpu->mmio_is_write)
9859                 memcpy(frag->data, run->mmio.data, len);
9860
9861         if (frag->len <= 8) {
9862                 /* Switch to the next fragment. */
9863                 frag++;
9864                 vcpu->mmio_cur_fragment++;
9865         } else {
9866                 /* Go forward to the next mmio piece. */
9867                 frag->data += len;
9868                 frag->gpa += len;
9869                 frag->len -= len;
9870         }
9871
9872         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
9873                 vcpu->mmio_needed = 0;
9874
9875                 /* FIXME: return into emulator if single-stepping.  */
9876                 if (vcpu->mmio_is_write)
9877                         return 1;
9878                 vcpu->mmio_read_completed = 1;
9879                 return complete_emulated_io(vcpu);
9880         }
9881
9882         run->exit_reason = KVM_EXIT_MMIO;
9883         run->mmio.phys_addr = frag->gpa;
9884         if (vcpu->mmio_is_write)
9885                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
9886         run->mmio.len = min(8u, frag->len);
9887         run->mmio.is_write = vcpu->mmio_is_write;
9888         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
9889         return 0;
9890 }
9891
9892 static void kvm_save_current_fpu(struct fpu *fpu)
9893 {
9894         /*
9895          * If the target FPU state is not resident in the CPU registers, just
9896          * memcpy() from current, else save CPU state directly to the target.
9897          */
9898         if (test_thread_flag(TIF_NEED_FPU_LOAD))
9899                 memcpy(&fpu->state, &current->thread.fpu.state,
9900                        fpu_kernel_xstate_size);
9901         else
9902                 save_fpregs_to_fpstate(fpu);
9903 }
9904
9905 /* Swap (qemu) user FPU context for the guest FPU context. */
9906 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
9907 {
9908         fpregs_lock();
9909
9910         kvm_save_current_fpu(vcpu->arch.user_fpu);
9911
9912         /*
9913          * Guests with protected state can't have it set by the hypervisor,
9914          * so skip trying to set it.
9915          */
9916         if (vcpu->arch.guest_fpu)
9917                 /* PKRU is separately restored in kvm_x86_ops.run. */
9918                 __restore_fpregs_from_fpstate(&vcpu->arch.guest_fpu->state,
9919                                         ~XFEATURE_MASK_PKRU);
9920
9921         fpregs_mark_activate();
9922         fpregs_unlock();
9923
9924         trace_kvm_fpu(1);
9925 }
9926
9927 /* When vcpu_run ends, restore user space FPU context. */
9928 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
9929 {
9930         fpregs_lock();
9931
9932         /*
9933          * Guests with protected state can't have it read by the hypervisor,
9934          * so skip trying to save it.
9935          */
9936         if (vcpu->arch.guest_fpu)
9937                 kvm_save_current_fpu(vcpu->arch.guest_fpu);
9938
9939         restore_fpregs_from_fpstate(&vcpu->arch.user_fpu->state);
9940
9941         fpregs_mark_activate();
9942         fpregs_unlock();
9943
9944         ++vcpu->stat.fpu_reload;
9945         trace_kvm_fpu(0);
9946 }
9947
9948 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
9949 {
9950         struct kvm_run *kvm_run = vcpu->run;
9951         int r;
9952
9953         vcpu_load(vcpu);
9954         kvm_sigset_activate(vcpu);
9955         kvm_run->flags = 0;
9956         kvm_load_guest_fpu(vcpu);
9957
9958         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
9959                 if (kvm_run->immediate_exit) {
9960                         r = -EINTR;
9961                         goto out;
9962                 }
9963                 kvm_vcpu_block(vcpu);
9964                 if (kvm_apic_accept_events(vcpu) < 0) {
9965                         r = 0;
9966                         goto out;
9967                 }
9968                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
9969                 r = -EAGAIN;
9970                 if (signal_pending(current)) {
9971                         r = -EINTR;
9972                         kvm_run->exit_reason = KVM_EXIT_INTR;
9973                         ++vcpu->stat.signal_exits;
9974                 }
9975                 goto out;
9976         }
9977
9978         if ((kvm_run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) ||
9979             (kvm_run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)) {
9980                 r = -EINVAL;
9981                 goto out;
9982         }
9983
9984         if (kvm_run->kvm_dirty_regs) {
9985                 r = sync_regs(vcpu);
9986                 if (r != 0)
9987                         goto out;
9988         }
9989
9990         /* re-sync apic's tpr */
9991         if (!lapic_in_kernel(vcpu)) {
9992                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
9993                         r = -EINVAL;
9994                         goto out;
9995                 }
9996         }
9997
9998         if (unlikely(vcpu->arch.complete_userspace_io)) {
9999                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
10000                 vcpu->arch.complete_userspace_io = NULL;
10001                 r = cui(vcpu);
10002                 if (r <= 0)
10003                         goto out;
10004         } else
10005                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
10006
10007         if (kvm_run->immediate_exit)
10008                 r = -EINTR;
10009         else
10010                 r = vcpu_run(vcpu);
10011
10012 out:
10013         kvm_put_guest_fpu(vcpu);
10014         if (kvm_run->kvm_valid_regs)
10015                 store_regs(vcpu);
10016         post_kvm_run_save(vcpu);
10017         kvm_sigset_deactivate(vcpu);
10018
10019         vcpu_put(vcpu);
10020         return r;
10021 }
10022
10023 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10024 {
10025         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
10026                 /*
10027                  * We are here if userspace calls get_regs() in the middle of
10028                  * instruction emulation. Registers state needs to be copied
10029                  * back from emulation context to vcpu. Userspace shouldn't do
10030                  * that usually, but some bad designed PV devices (vmware
10031                  * backdoor interface) need this to work
10032                  */
10033                 emulator_writeback_register_cache(vcpu->arch.emulate_ctxt);
10034                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
10035         }
10036         regs->rax = kvm_rax_read(vcpu);
10037         regs->rbx = kvm_rbx_read(vcpu);
10038         regs->rcx = kvm_rcx_read(vcpu);
10039         regs->rdx = kvm_rdx_read(vcpu);
10040         regs->rsi = kvm_rsi_read(vcpu);
10041         regs->rdi = kvm_rdi_read(vcpu);
10042         regs->rsp = kvm_rsp_read(vcpu);
10043         regs->rbp = kvm_rbp_read(vcpu);
10044 #ifdef CONFIG_X86_64
10045         regs->r8 = kvm_r8_read(vcpu);
10046         regs->r9 = kvm_r9_read(vcpu);
10047         regs->r10 = kvm_r10_read(vcpu);
10048         regs->r11 = kvm_r11_read(vcpu);
10049         regs->r12 = kvm_r12_read(vcpu);
10050         regs->r13 = kvm_r13_read(vcpu);
10051         regs->r14 = kvm_r14_read(vcpu);
10052         regs->r15 = kvm_r15_read(vcpu);
10053 #endif
10054
10055         regs->rip = kvm_rip_read(vcpu);
10056         regs->rflags = kvm_get_rflags(vcpu);
10057 }
10058
10059 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10060 {
10061         vcpu_load(vcpu);
10062         __get_regs(vcpu, regs);
10063         vcpu_put(vcpu);
10064         return 0;
10065 }
10066
10067 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10068 {
10069         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
10070         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
10071
10072         kvm_rax_write(vcpu, regs->rax);
10073         kvm_rbx_write(vcpu, regs->rbx);
10074         kvm_rcx_write(vcpu, regs->rcx);
10075         kvm_rdx_write(vcpu, regs->rdx);
10076         kvm_rsi_write(vcpu, regs->rsi);
10077         kvm_rdi_write(vcpu, regs->rdi);
10078         kvm_rsp_write(vcpu, regs->rsp);
10079         kvm_rbp_write(vcpu, regs->rbp);
10080 #ifdef CONFIG_X86_64
10081         kvm_r8_write(vcpu, regs->r8);
10082         kvm_r9_write(vcpu, regs->r9);
10083         kvm_r10_write(vcpu, regs->r10);
10084         kvm_r11_write(vcpu, regs->r11);
10085         kvm_r12_write(vcpu, regs->r12);
10086         kvm_r13_write(vcpu, regs->r13);
10087         kvm_r14_write(vcpu, regs->r14);
10088         kvm_r15_write(vcpu, regs->r15);
10089 #endif
10090
10091         kvm_rip_write(vcpu, regs->rip);
10092         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
10093
10094         vcpu->arch.exception.pending = false;
10095
10096         kvm_make_request(KVM_REQ_EVENT, vcpu);
10097 }
10098
10099 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10100 {
10101         vcpu_load(vcpu);
10102         __set_regs(vcpu, regs);
10103         vcpu_put(vcpu);
10104         return 0;
10105 }
10106
10107 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
10108 {
10109         struct kvm_segment cs;
10110
10111         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
10112         *db = cs.db;
10113         *l = cs.l;
10114 }
10115 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
10116
10117 static void __get_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10118 {
10119         struct desc_ptr dt;
10120
10121         if (vcpu->arch.guest_state_protected)
10122                 goto skip_protected_regs;
10123
10124         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10125         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10126         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10127         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10128         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10129         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10130
10131         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10132         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10133
10134         static_call(kvm_x86_get_idt)(vcpu, &dt);
10135         sregs->idt.limit = dt.size;
10136         sregs->idt.base = dt.address;
10137         static_call(kvm_x86_get_gdt)(vcpu, &dt);
10138         sregs->gdt.limit = dt.size;
10139         sregs->gdt.base = dt.address;
10140
10141         sregs->cr2 = vcpu->arch.cr2;
10142         sregs->cr3 = kvm_read_cr3(vcpu);
10143
10144 skip_protected_regs:
10145         sregs->cr0 = kvm_read_cr0(vcpu);
10146         sregs->cr4 = kvm_read_cr4(vcpu);
10147         sregs->cr8 = kvm_get_cr8(vcpu);
10148         sregs->efer = vcpu->arch.efer;
10149         sregs->apic_base = kvm_get_apic_base(vcpu);
10150 }
10151
10152 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10153 {
10154         __get_sregs_common(vcpu, sregs);
10155
10156         if (vcpu->arch.guest_state_protected)
10157                 return;
10158
10159         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
10160                 set_bit(vcpu->arch.interrupt.nr,
10161                         (unsigned long *)sregs->interrupt_bitmap);
10162 }
10163
10164 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
10165 {
10166         int i;
10167
10168         __get_sregs_common(vcpu, (struct kvm_sregs *)sregs2);
10169
10170         if (vcpu->arch.guest_state_protected)
10171                 return;
10172
10173         if (is_pae_paging(vcpu)) {
10174                 for (i = 0 ; i < 4 ; i++)
10175                         sregs2->pdptrs[i] = kvm_pdptr_read(vcpu, i);
10176                 sregs2->flags |= KVM_SREGS2_FLAGS_PDPTRS_VALID;
10177         }
10178 }
10179
10180 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
10181                                   struct kvm_sregs *sregs)
10182 {
10183         vcpu_load(vcpu);
10184         __get_sregs(vcpu, sregs);
10185         vcpu_put(vcpu);
10186         return 0;
10187 }
10188
10189 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
10190                                     struct kvm_mp_state *mp_state)
10191 {
10192         int r;
10193
10194         vcpu_load(vcpu);
10195         if (kvm_mpx_supported())
10196                 kvm_load_guest_fpu(vcpu);
10197
10198         r = kvm_apic_accept_events(vcpu);
10199         if (r < 0)
10200                 goto out;
10201         r = 0;
10202
10203         if ((vcpu->arch.mp_state == KVM_MP_STATE_HALTED ||
10204              vcpu->arch.mp_state == KVM_MP_STATE_AP_RESET_HOLD) &&
10205             vcpu->arch.pv.pv_unhalted)
10206                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
10207         else
10208                 mp_state->mp_state = vcpu->arch.mp_state;
10209
10210 out:
10211         if (kvm_mpx_supported())
10212                 kvm_put_guest_fpu(vcpu);
10213         vcpu_put(vcpu);
10214         return r;
10215 }
10216
10217 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
10218                                     struct kvm_mp_state *mp_state)
10219 {
10220         int ret = -EINVAL;
10221
10222         vcpu_load(vcpu);
10223
10224         if (!lapic_in_kernel(vcpu) &&
10225             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
10226                 goto out;
10227
10228         /*
10229          * KVM_MP_STATE_INIT_RECEIVED means the processor is in
10230          * INIT state; latched init should be reported using
10231          * KVM_SET_VCPU_EVENTS, so reject it here.
10232          */
10233         if ((kvm_vcpu_latch_init(vcpu) || vcpu->arch.smi_pending) &&
10234             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
10235              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
10236                 goto out;
10237
10238         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
10239                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
10240                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
10241         } else
10242                 vcpu->arch.mp_state = mp_state->mp_state;
10243         kvm_make_request(KVM_REQ_EVENT, vcpu);
10244
10245         ret = 0;
10246 out:
10247         vcpu_put(vcpu);
10248         return ret;
10249 }
10250
10251 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
10252                     int reason, bool has_error_code, u32 error_code)
10253 {
10254         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
10255         int ret;
10256
10257         init_emulate_ctxt(vcpu);
10258
10259         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
10260                                    has_error_code, error_code);
10261         if (ret) {
10262                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
10263                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
10264                 vcpu->run->internal.ndata = 0;
10265                 return 0;
10266         }
10267
10268         kvm_rip_write(vcpu, ctxt->eip);
10269         kvm_set_rflags(vcpu, ctxt->eflags);
10270         return 1;
10271 }
10272 EXPORT_SYMBOL_GPL(kvm_task_switch);
10273
10274 static bool kvm_is_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10275 {
10276         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
10277                 /*
10278                  * When EFER.LME and CR0.PG are set, the processor is in
10279                  * 64-bit mode (though maybe in a 32-bit code segment).
10280                  * CR4.PAE and EFER.LMA must be set.
10281                  */
10282                 if (!(sregs->cr4 & X86_CR4_PAE) || !(sregs->efer & EFER_LMA))
10283                         return false;
10284                 if (kvm_vcpu_is_illegal_gpa(vcpu, sregs->cr3))
10285                         return false;
10286         } else {
10287                 /*
10288                  * Not in 64-bit mode: EFER.LMA is clear and the code
10289                  * segment cannot be 64-bit.
10290                  */
10291                 if (sregs->efer & EFER_LMA || sregs->cs.l)
10292                         return false;
10293         }
10294
10295         return kvm_is_valid_cr4(vcpu, sregs->cr4);
10296 }
10297
10298 static int __set_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs,
10299                 int *mmu_reset_needed, bool update_pdptrs)
10300 {
10301         struct msr_data apic_base_msr;
10302         int idx;
10303         struct desc_ptr dt;
10304
10305         if (!kvm_is_valid_sregs(vcpu, sregs))
10306                 return -EINVAL;
10307
10308         apic_base_msr.data = sregs->apic_base;
10309         apic_base_msr.host_initiated = true;
10310         if (kvm_set_apic_base(vcpu, &apic_base_msr))
10311                 return -EINVAL;
10312
10313         if (vcpu->arch.guest_state_protected)
10314                 return 0;
10315
10316         dt.size = sregs->idt.limit;
10317         dt.address = sregs->idt.base;
10318         static_call(kvm_x86_set_idt)(vcpu, &dt);
10319         dt.size = sregs->gdt.limit;
10320         dt.address = sregs->gdt.base;
10321         static_call(kvm_x86_set_gdt)(vcpu, &dt);
10322
10323         vcpu->arch.cr2 = sregs->cr2;
10324         *mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
10325         vcpu->arch.cr3 = sregs->cr3;
10326         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
10327
10328         kvm_set_cr8(vcpu, sregs->cr8);
10329
10330         *mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
10331         static_call(kvm_x86_set_efer)(vcpu, sregs->efer);
10332
10333         *mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
10334         static_call(kvm_x86_set_cr0)(vcpu, sregs->cr0);
10335         vcpu->arch.cr0 = sregs->cr0;
10336
10337         *mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
10338         static_call(kvm_x86_set_cr4)(vcpu, sregs->cr4);
10339
10340         if (update_pdptrs) {
10341                 idx = srcu_read_lock(&vcpu->kvm->srcu);
10342                 if (is_pae_paging(vcpu)) {
10343                         load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
10344                         *mmu_reset_needed = 1;
10345                 }
10346                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
10347         }
10348
10349         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10350         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10351         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10352         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10353         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10354         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10355
10356         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10357         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10358
10359         update_cr8_intercept(vcpu);
10360
10361         /* Older userspace won't unhalt the vcpu on reset. */
10362         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
10363             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
10364             !is_protmode(vcpu))
10365                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10366
10367         return 0;
10368 }
10369
10370 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10371 {
10372         int pending_vec, max_bits;
10373         int mmu_reset_needed = 0;
10374         int ret = __set_sregs_common(vcpu, sregs, &mmu_reset_needed, true);
10375
10376         if (ret)
10377                 return ret;
10378
10379         if (mmu_reset_needed)
10380                 kvm_mmu_reset_context(vcpu);
10381
10382         max_bits = KVM_NR_INTERRUPTS;
10383         pending_vec = find_first_bit(
10384                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
10385
10386         if (pending_vec < max_bits) {
10387                 kvm_queue_interrupt(vcpu, pending_vec, false);
10388                 pr_debug("Set back pending irq %d\n", pending_vec);
10389                 kvm_make_request(KVM_REQ_EVENT, vcpu);
10390         }
10391         return 0;
10392 }
10393
10394 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
10395 {
10396         int mmu_reset_needed = 0;
10397         bool valid_pdptrs = sregs2->flags & KVM_SREGS2_FLAGS_PDPTRS_VALID;
10398         bool pae = (sregs2->cr0 & X86_CR0_PG) && (sregs2->cr4 & X86_CR4_PAE) &&
10399                 !(sregs2->efer & EFER_LMA);
10400         int i, ret;
10401
10402         if (sregs2->flags & ~KVM_SREGS2_FLAGS_PDPTRS_VALID)
10403                 return -EINVAL;
10404
10405         if (valid_pdptrs && (!pae || vcpu->arch.guest_state_protected))
10406                 return -EINVAL;
10407
10408         ret = __set_sregs_common(vcpu, (struct kvm_sregs *)sregs2,
10409                                  &mmu_reset_needed, !valid_pdptrs);
10410         if (ret)
10411                 return ret;
10412
10413         if (valid_pdptrs) {
10414                 for (i = 0; i < 4 ; i++)
10415                         kvm_pdptr_write(vcpu, i, sregs2->pdptrs[i]);
10416
10417                 kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
10418                 mmu_reset_needed = 1;
10419                 vcpu->arch.pdptrs_from_userspace = true;
10420         }
10421         if (mmu_reset_needed)
10422                 kvm_mmu_reset_context(vcpu);
10423         return 0;
10424 }
10425
10426 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
10427                                   struct kvm_sregs *sregs)
10428 {
10429         int ret;
10430
10431         vcpu_load(vcpu);
10432         ret = __set_sregs(vcpu, sregs);
10433         vcpu_put(vcpu);
10434         return ret;
10435 }
10436
10437 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
10438                                         struct kvm_guest_debug *dbg)
10439 {
10440         unsigned long rflags;
10441         int i, r;
10442
10443         if (vcpu->arch.guest_state_protected)
10444                 return -EINVAL;
10445
10446         vcpu_load(vcpu);
10447
10448         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
10449                 r = -EBUSY;
10450                 if (vcpu->arch.exception.pending)
10451                         goto out;
10452                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
10453                         kvm_queue_exception(vcpu, DB_VECTOR);
10454                 else
10455                         kvm_queue_exception(vcpu, BP_VECTOR);
10456         }
10457
10458         /*
10459          * Read rflags as long as potentially injected trace flags are still
10460          * filtered out.
10461          */
10462         rflags = kvm_get_rflags(vcpu);
10463
10464         vcpu->guest_debug = dbg->control;
10465         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
10466                 vcpu->guest_debug = 0;
10467
10468         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
10469                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
10470                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
10471                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
10472         } else {
10473                 for (i = 0; i < KVM_NR_DB_REGS; i++)
10474                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
10475         }
10476         kvm_update_dr7(vcpu);
10477
10478         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
10479                 vcpu->arch.singlestep_rip = kvm_get_linear_rip(vcpu);
10480
10481         /*
10482          * Trigger an rflags update that will inject or remove the trace
10483          * flags.
10484          */
10485         kvm_set_rflags(vcpu, rflags);
10486
10487         static_call(kvm_x86_update_exception_bitmap)(vcpu);
10488
10489         r = 0;
10490
10491 out:
10492         vcpu_put(vcpu);
10493         return r;
10494 }
10495
10496 /*
10497  * Translate a guest virtual address to a guest physical address.
10498  */
10499 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
10500                                     struct kvm_translation *tr)
10501 {
10502         unsigned long vaddr = tr->linear_address;
10503         gpa_t gpa;
10504         int idx;
10505
10506         vcpu_load(vcpu);
10507
10508         idx = srcu_read_lock(&vcpu->kvm->srcu);
10509         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
10510         srcu_read_unlock(&vcpu->kvm->srcu, idx);
10511         tr->physical_address = gpa;
10512         tr->valid = gpa != UNMAPPED_GVA;
10513         tr->writeable = 1;
10514         tr->usermode = 0;
10515
10516         vcpu_put(vcpu);
10517         return 0;
10518 }
10519
10520 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10521 {
10522         struct fxregs_state *fxsave;
10523
10524         if (!vcpu->arch.guest_fpu)
10525                 return 0;
10526
10527         vcpu_load(vcpu);
10528
10529         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
10530         memcpy(fpu->fpr, fxsave->st_space, 128);
10531         fpu->fcw = fxsave->cwd;
10532         fpu->fsw = fxsave->swd;
10533         fpu->ftwx = fxsave->twd;
10534         fpu->last_opcode = fxsave->fop;
10535         fpu->last_ip = fxsave->rip;
10536         fpu->last_dp = fxsave->rdp;
10537         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
10538
10539         vcpu_put(vcpu);
10540         return 0;
10541 }
10542
10543 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10544 {
10545         struct fxregs_state *fxsave;
10546
10547         if (!vcpu->arch.guest_fpu)
10548                 return 0;
10549
10550         vcpu_load(vcpu);
10551
10552         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
10553
10554         memcpy(fxsave->st_space, fpu->fpr, 128);
10555         fxsave->cwd = fpu->fcw;
10556         fxsave->swd = fpu->fsw;
10557         fxsave->twd = fpu->ftwx;
10558         fxsave->fop = fpu->last_opcode;
10559         fxsave->rip = fpu->last_ip;
10560         fxsave->rdp = fpu->last_dp;
10561         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
10562
10563         vcpu_put(vcpu);
10564         return 0;
10565 }
10566
10567 static void store_regs(struct kvm_vcpu *vcpu)
10568 {
10569         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
10570
10571         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
10572                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
10573
10574         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
10575                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
10576
10577         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
10578                 kvm_vcpu_ioctl_x86_get_vcpu_events(
10579                                 vcpu, &vcpu->run->s.regs.events);
10580 }
10581
10582 static int sync_regs(struct kvm_vcpu *vcpu)
10583 {
10584         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
10585                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
10586                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
10587         }
10588         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
10589                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
10590                         return -EINVAL;
10591                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
10592         }
10593         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
10594                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
10595                                 vcpu, &vcpu->run->s.regs.events))
10596                         return -EINVAL;
10597                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
10598         }
10599
10600         return 0;
10601 }
10602
10603 static void fx_init(struct kvm_vcpu *vcpu)
10604 {
10605         if (!vcpu->arch.guest_fpu)
10606                 return;
10607
10608         fpstate_init(&vcpu->arch.guest_fpu->state);
10609         if (boot_cpu_has(X86_FEATURE_XSAVES))
10610                 vcpu->arch.guest_fpu->state.xsave.header.xcomp_bv =
10611                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
10612
10613         /*
10614          * Ensure guest xcr0 is valid for loading
10615          */
10616         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10617
10618         vcpu->arch.cr0 |= X86_CR0_ET;
10619 }
10620
10621 void kvm_free_guest_fpu(struct kvm_vcpu *vcpu)
10622 {
10623         if (vcpu->arch.guest_fpu) {
10624                 kmem_cache_free(x86_fpu_cache, vcpu->arch.guest_fpu);
10625                 vcpu->arch.guest_fpu = NULL;
10626         }
10627 }
10628 EXPORT_SYMBOL_GPL(kvm_free_guest_fpu);
10629
10630 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
10631 {
10632         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
10633                 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
10634                              "guest TSC will not be reliable\n");
10635
10636         return 0;
10637 }
10638
10639 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
10640 {
10641         struct page *page;
10642         int r;
10643
10644         vcpu->arch.last_vmentry_cpu = -1;
10645
10646         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
10647                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10648         else
10649                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
10650
10651         r = kvm_mmu_create(vcpu);
10652         if (r < 0)
10653                 return r;
10654
10655         if (irqchip_in_kernel(vcpu->kvm)) {
10656                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
10657                 if (r < 0)
10658                         goto fail_mmu_destroy;
10659                 if (kvm_apicv_activated(vcpu->kvm))
10660                         vcpu->arch.apicv_active = true;
10661         } else
10662                 static_branch_inc(&kvm_has_noapic_vcpu);
10663
10664         r = -ENOMEM;
10665
10666         page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO);
10667         if (!page)
10668                 goto fail_free_lapic;
10669         vcpu->arch.pio_data = page_address(page);
10670
10671         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
10672                                        GFP_KERNEL_ACCOUNT);
10673         if (!vcpu->arch.mce_banks)
10674                 goto fail_free_pio_data;
10675         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
10676
10677         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
10678                                 GFP_KERNEL_ACCOUNT))
10679                 goto fail_free_mce_banks;
10680
10681         if (!alloc_emulate_ctxt(vcpu))
10682                 goto free_wbinvd_dirty_mask;
10683
10684         vcpu->arch.user_fpu = kmem_cache_zalloc(x86_fpu_cache,
10685                                                 GFP_KERNEL_ACCOUNT);
10686         if (!vcpu->arch.user_fpu) {
10687                 pr_err("kvm: failed to allocate userspace's fpu\n");
10688                 goto free_emulate_ctxt;
10689         }
10690
10691         vcpu->arch.guest_fpu = kmem_cache_zalloc(x86_fpu_cache,
10692                                                  GFP_KERNEL_ACCOUNT);
10693         if (!vcpu->arch.guest_fpu) {
10694                 pr_err("kvm: failed to allocate vcpu's fpu\n");
10695                 goto free_user_fpu;
10696         }
10697         fx_init(vcpu);
10698
10699         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
10700         vcpu->arch.reserved_gpa_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu);
10701
10702         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
10703
10704         kvm_async_pf_hash_reset(vcpu);
10705         kvm_pmu_init(vcpu);
10706
10707         vcpu->arch.pending_external_vector = -1;
10708         vcpu->arch.preempted_in_kernel = false;
10709
10710 #if IS_ENABLED(CONFIG_HYPERV)
10711         vcpu->arch.hv_root_tdp = INVALID_PAGE;
10712 #endif
10713
10714         r = static_call(kvm_x86_vcpu_create)(vcpu);
10715         if (r)
10716                 goto free_guest_fpu;
10717
10718         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
10719         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
10720         kvm_vcpu_mtrr_init(vcpu);
10721         vcpu_load(vcpu);
10722         kvm_set_tsc_khz(vcpu, max_tsc_khz);
10723         kvm_vcpu_reset(vcpu, false);
10724         kvm_init_mmu(vcpu);
10725         vcpu_put(vcpu);
10726         return 0;
10727
10728 free_guest_fpu:
10729         kvm_free_guest_fpu(vcpu);
10730 free_user_fpu:
10731         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
10732 free_emulate_ctxt:
10733         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
10734 free_wbinvd_dirty_mask:
10735         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
10736 fail_free_mce_banks:
10737         kfree(vcpu->arch.mce_banks);
10738 fail_free_pio_data:
10739         free_page((unsigned long)vcpu->arch.pio_data);
10740 fail_free_lapic:
10741         kvm_free_lapic(vcpu);
10742 fail_mmu_destroy:
10743         kvm_mmu_destroy(vcpu);
10744         return r;
10745 }
10746
10747 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
10748 {
10749         struct kvm *kvm = vcpu->kvm;
10750
10751         if (mutex_lock_killable(&vcpu->mutex))
10752                 return;
10753         vcpu_load(vcpu);
10754         kvm_synchronize_tsc(vcpu, 0);
10755         vcpu_put(vcpu);
10756
10757         /* poll control enabled by default */
10758         vcpu->arch.msr_kvm_poll_control = 1;
10759
10760         mutex_unlock(&vcpu->mutex);
10761
10762         if (kvmclock_periodic_sync && vcpu->vcpu_idx == 0)
10763                 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
10764                                                 KVMCLOCK_SYNC_PERIOD);
10765 }
10766
10767 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
10768 {
10769         struct gfn_to_pfn_cache *cache = &vcpu->arch.st.cache;
10770         int idx;
10771
10772         kvm_release_pfn(cache->pfn, cache->dirty, cache);
10773
10774         kvmclock_reset(vcpu);
10775
10776         static_call(kvm_x86_vcpu_free)(vcpu);
10777
10778         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
10779         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
10780         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
10781         kvm_free_guest_fpu(vcpu);
10782
10783         kvm_hv_vcpu_uninit(vcpu);
10784         kvm_pmu_destroy(vcpu);
10785         kfree(vcpu->arch.mce_banks);
10786         kvm_free_lapic(vcpu);
10787         idx = srcu_read_lock(&vcpu->kvm->srcu);
10788         kvm_mmu_destroy(vcpu);
10789         srcu_read_unlock(&vcpu->kvm->srcu, idx);
10790         free_page((unsigned long)vcpu->arch.pio_data);
10791         kvfree(vcpu->arch.cpuid_entries);
10792         if (!lapic_in_kernel(vcpu))
10793                 static_branch_dec(&kvm_has_noapic_vcpu);
10794 }
10795
10796 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
10797 {
10798         unsigned long old_cr0 = kvm_read_cr0(vcpu);
10799         unsigned long new_cr0;
10800         u32 eax, dummy;
10801
10802         kvm_lapic_reset(vcpu, init_event);
10803
10804         vcpu->arch.hflags = 0;
10805
10806         vcpu->arch.smi_pending = 0;
10807         vcpu->arch.smi_count = 0;
10808         atomic_set(&vcpu->arch.nmi_queued, 0);
10809         vcpu->arch.nmi_pending = 0;
10810         vcpu->arch.nmi_injected = false;
10811         kvm_clear_interrupt_queue(vcpu);
10812         kvm_clear_exception_queue(vcpu);
10813
10814         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
10815         kvm_update_dr0123(vcpu);
10816         vcpu->arch.dr6 = DR6_ACTIVE_LOW;
10817         vcpu->arch.dr7 = DR7_FIXED_1;
10818         kvm_update_dr7(vcpu);
10819
10820         vcpu->arch.cr2 = 0;
10821
10822         kvm_make_request(KVM_REQ_EVENT, vcpu);
10823         vcpu->arch.apf.msr_en_val = 0;
10824         vcpu->arch.apf.msr_int_val = 0;
10825         vcpu->arch.st.msr_val = 0;
10826
10827         kvmclock_reset(vcpu);
10828
10829         kvm_clear_async_pf_completion_queue(vcpu);
10830         kvm_async_pf_hash_reset(vcpu);
10831         vcpu->arch.apf.halted = false;
10832
10833         if (vcpu->arch.guest_fpu && kvm_mpx_supported()) {
10834                 void *mpx_state_buffer;
10835
10836                 /*
10837                  * To avoid have the INIT path from kvm_apic_has_events() that be
10838                  * called with loaded FPU and does not let userspace fix the state.
10839                  */
10840                 if (init_event)
10841                         kvm_put_guest_fpu(vcpu);
10842                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10843                                         XFEATURE_BNDREGS);
10844                 if (mpx_state_buffer)
10845                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
10846                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10847                                         XFEATURE_BNDCSR);
10848                 if (mpx_state_buffer)
10849                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
10850                 if (init_event)
10851                         kvm_load_guest_fpu(vcpu);
10852         }
10853
10854         if (!init_event) {
10855                 kvm_pmu_reset(vcpu);
10856                 vcpu->arch.smbase = 0x30000;
10857
10858                 vcpu->arch.msr_misc_features_enables = 0;
10859
10860                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10861         }
10862
10863         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
10864         vcpu->arch.regs_avail = ~0;
10865         vcpu->arch.regs_dirty = ~0;
10866
10867         /*
10868          * Fall back to KVM's default Family/Model/Stepping of 0x600 (P6/Athlon)
10869          * if no CPUID match is found.  Note, it's impossible to get a match at
10870          * RESET since KVM emulates RESET before exposing the vCPU to userspace,
10871          * i.e. it'simpossible for kvm_cpuid() to find a valid entry on RESET.
10872          * But, go through the motions in case that's ever remedied.
10873          */
10874         eax = 1;
10875         if (!kvm_cpuid(vcpu, &eax, &dummy, &dummy, &dummy, true))
10876                 eax = 0x600;
10877         kvm_rdx_write(vcpu, eax);
10878
10879         vcpu->arch.ia32_xss = 0;
10880
10881         static_call(kvm_x86_vcpu_reset)(vcpu, init_event);
10882
10883         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
10884         kvm_rip_write(vcpu, 0xfff0);
10885
10886         /*
10887          * CR0.CD/NW are set on RESET, preserved on INIT.  Note, some versions
10888          * of Intel's SDM list CD/NW as being set on INIT, but they contradict
10889          * (or qualify) that with a footnote stating that CD/NW are preserved.
10890          */
10891         new_cr0 = X86_CR0_ET;
10892         if (init_event)
10893                 new_cr0 |= (old_cr0 & (X86_CR0_NW | X86_CR0_CD));
10894         else
10895                 new_cr0 |= X86_CR0_NW | X86_CR0_CD;
10896
10897         static_call(kvm_x86_set_cr0)(vcpu, new_cr0);
10898         static_call(kvm_x86_set_cr4)(vcpu, 0);
10899         static_call(kvm_x86_set_efer)(vcpu, 0);
10900         static_call(kvm_x86_update_exception_bitmap)(vcpu);
10901
10902         /*
10903          * Reset the MMU context if paging was enabled prior to INIT (which is
10904          * implied if CR0.PG=1 as CR0 will be '0' prior to RESET).  Unlike the
10905          * standard CR0/CR4/EFER modification paths, only CR0.PG needs to be
10906          * checked because it is unconditionally cleared on INIT and all other
10907          * paging related bits are ignored if paging is disabled, i.e. CR0.WP,
10908          * CR4, and EFER changes are all irrelevant if CR0.PG was '0'.
10909          */
10910         if (old_cr0 & X86_CR0_PG)
10911                 kvm_mmu_reset_context(vcpu);
10912
10913         /*
10914          * Intel's SDM states that all TLB entries are flushed on INIT.  AMD's
10915          * APM states the TLBs are untouched by INIT, but it also states that
10916          * the TLBs are flushed on "External initialization of the processor."
10917          * Flush the guest TLB regardless of vendor, there is no meaningful
10918          * benefit in relying on the guest to flush the TLB immediately after
10919          * INIT.  A spurious TLB flush is benign and likely negligible from a
10920          * performance perspective.
10921          */
10922         if (init_event)
10923                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
10924 }
10925 EXPORT_SYMBOL_GPL(kvm_vcpu_reset);
10926
10927 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
10928 {
10929         struct kvm_segment cs;
10930
10931         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
10932         cs.selector = vector << 8;
10933         cs.base = vector << 12;
10934         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
10935         kvm_rip_write(vcpu, 0);
10936 }
10937 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector);
10938
10939 int kvm_arch_hardware_enable(void)
10940 {
10941         struct kvm *kvm;
10942         struct kvm_vcpu *vcpu;
10943         int i;
10944         int ret;
10945         u64 local_tsc;
10946         u64 max_tsc = 0;
10947         bool stable, backwards_tsc = false;
10948
10949         kvm_user_return_msr_cpu_online();
10950         ret = static_call(kvm_x86_hardware_enable)();
10951         if (ret != 0)
10952                 return ret;
10953
10954         local_tsc = rdtsc();
10955         stable = !kvm_check_tsc_unstable();
10956         list_for_each_entry(kvm, &vm_list, vm_list) {
10957                 kvm_for_each_vcpu(i, vcpu, kvm) {
10958                         if (!stable && vcpu->cpu == smp_processor_id())
10959                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
10960                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
10961                                 backwards_tsc = true;
10962                                 if (vcpu->arch.last_host_tsc > max_tsc)
10963                                         max_tsc = vcpu->arch.last_host_tsc;
10964                         }
10965                 }
10966         }
10967
10968         /*
10969          * Sometimes, even reliable TSCs go backwards.  This happens on
10970          * platforms that reset TSC during suspend or hibernate actions, but
10971          * maintain synchronization.  We must compensate.  Fortunately, we can
10972          * detect that condition here, which happens early in CPU bringup,
10973          * before any KVM threads can be running.  Unfortunately, we can't
10974          * bring the TSCs fully up to date with real time, as we aren't yet far
10975          * enough into CPU bringup that we know how much real time has actually
10976          * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
10977          * variables that haven't been updated yet.
10978          *
10979          * So we simply find the maximum observed TSC above, then record the
10980          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
10981          * the adjustment will be applied.  Note that we accumulate
10982          * adjustments, in case multiple suspend cycles happen before some VCPU
10983          * gets a chance to run again.  In the event that no KVM threads get a
10984          * chance to run, we will miss the entire elapsed period, as we'll have
10985          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
10986          * loose cycle time.  This isn't too big a deal, since the loss will be
10987          * uniform across all VCPUs (not to mention the scenario is extremely
10988          * unlikely). It is possible that a second hibernate recovery happens
10989          * much faster than a first, causing the observed TSC here to be
10990          * smaller; this would require additional padding adjustment, which is
10991          * why we set last_host_tsc to the local tsc observed here.
10992          *
10993          * N.B. - this code below runs only on platforms with reliable TSC,
10994          * as that is the only way backwards_tsc is set above.  Also note
10995          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
10996          * have the same delta_cyc adjustment applied if backwards_tsc
10997          * is detected.  Note further, this adjustment is only done once,
10998          * as we reset last_host_tsc on all VCPUs to stop this from being
10999          * called multiple times (one for each physical CPU bringup).
11000          *
11001          * Platforms with unreliable TSCs don't have to deal with this, they
11002          * will be compensated by the logic in vcpu_load, which sets the TSC to
11003          * catchup mode.  This will catchup all VCPUs to real time, but cannot
11004          * guarantee that they stay in perfect synchronization.
11005          */
11006         if (backwards_tsc) {
11007                 u64 delta_cyc = max_tsc - local_tsc;
11008                 list_for_each_entry(kvm, &vm_list, vm_list) {
11009                         kvm->arch.backwards_tsc_observed = true;
11010                         kvm_for_each_vcpu(i, vcpu, kvm) {
11011                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
11012                                 vcpu->arch.last_host_tsc = local_tsc;
11013                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
11014                         }
11015
11016                         /*
11017                          * We have to disable TSC offset matching.. if you were
11018                          * booting a VM while issuing an S4 host suspend....
11019                          * you may have some problem.  Solving this issue is
11020                          * left as an exercise to the reader.
11021                          */
11022                         kvm->arch.last_tsc_nsec = 0;
11023                         kvm->arch.last_tsc_write = 0;
11024                 }
11025
11026         }
11027         return 0;
11028 }
11029
11030 void kvm_arch_hardware_disable(void)
11031 {
11032         static_call(kvm_x86_hardware_disable)();
11033         drop_user_return_notifiers();
11034 }
11035
11036 int kvm_arch_hardware_setup(void *opaque)
11037 {
11038         struct kvm_x86_init_ops *ops = opaque;
11039         int r;
11040
11041         rdmsrl_safe(MSR_EFER, &host_efer);
11042
11043         if (boot_cpu_has(X86_FEATURE_XSAVES))
11044                 rdmsrl(MSR_IA32_XSS, host_xss);
11045
11046         r = ops->hardware_setup();
11047         if (r != 0)
11048                 return r;
11049
11050         memcpy(&kvm_x86_ops, ops->runtime_ops, sizeof(kvm_x86_ops));
11051         kvm_ops_static_call_update();
11052
11053         if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))
11054                 supported_xss = 0;
11055
11056 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
11057         cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
11058 #undef __kvm_cpu_cap_has
11059
11060         if (kvm_has_tsc_control) {
11061                 /*
11062                  * Make sure the user can only configure tsc_khz values that
11063                  * fit into a signed integer.
11064                  * A min value is not calculated because it will always
11065                  * be 1 on all machines.
11066                  */
11067                 u64 max = min(0x7fffffffULL,
11068                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
11069                 kvm_max_guest_tsc_khz = max;
11070
11071                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
11072         }
11073
11074         kvm_init_msr_list();
11075         return 0;
11076 }
11077
11078 void kvm_arch_hardware_unsetup(void)
11079 {
11080         static_call(kvm_x86_hardware_unsetup)();
11081 }
11082
11083 int kvm_arch_check_processor_compat(void *opaque)
11084 {
11085         struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
11086         struct kvm_x86_init_ops *ops = opaque;
11087
11088         WARN_ON(!irqs_disabled());
11089
11090         if (__cr4_reserved_bits(cpu_has, c) !=
11091             __cr4_reserved_bits(cpu_has, &boot_cpu_data))
11092                 return -EIO;
11093
11094         return ops->check_processor_compatibility();
11095 }
11096
11097 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
11098 {
11099         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
11100 }
11101 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
11102
11103 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
11104 {
11105         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
11106 }
11107
11108 __read_mostly DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu);
11109 EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu);
11110
11111 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
11112 {
11113         struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
11114
11115         vcpu->arch.l1tf_flush_l1d = true;
11116         if (pmu->version && unlikely(pmu->event_count)) {
11117                 pmu->need_cleanup = true;
11118                 kvm_make_request(KVM_REQ_PMU, vcpu);
11119         }
11120         static_call(kvm_x86_sched_in)(vcpu, cpu);
11121 }
11122
11123 void kvm_arch_free_vm(struct kvm *kvm)
11124 {
11125         kfree(to_kvm_hv(kvm)->hv_pa_pg);
11126         vfree(kvm);
11127 }
11128
11129
11130 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
11131 {
11132         if (type)
11133                 return -EINVAL;
11134
11135         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
11136         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
11137         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
11138         INIT_LIST_HEAD(&kvm->arch.lpage_disallowed_mmu_pages);
11139         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
11140         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
11141
11142         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
11143         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
11144         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
11145         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
11146                 &kvm->arch.irq_sources_bitmap);
11147
11148         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
11149         mutex_init(&kvm->arch.apic_map_lock);
11150         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
11151
11152         kvm->arch.kvmclock_offset = -get_kvmclock_base_ns();
11153         pvclock_update_vm_gtod_copy(kvm);
11154
11155         kvm->arch.guest_can_read_msr_platform_info = true;
11156
11157 #if IS_ENABLED(CONFIG_HYPERV)
11158         spin_lock_init(&kvm->arch.hv_root_tdp_lock);
11159         kvm->arch.hv_root_tdp = INVALID_PAGE;
11160 #endif
11161
11162         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
11163         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
11164
11165         kvm_apicv_init(kvm);
11166         kvm_hv_init_vm(kvm);
11167         kvm_page_track_init(kvm);
11168         kvm_mmu_init_vm(kvm);
11169         kvm_xen_init_vm(kvm);
11170
11171         return static_call(kvm_x86_vm_init)(kvm);
11172 }
11173
11174 int kvm_arch_post_init_vm(struct kvm *kvm)
11175 {
11176         return kvm_mmu_post_init_vm(kvm);
11177 }
11178
11179 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
11180 {
11181         vcpu_load(vcpu);
11182         kvm_mmu_unload(vcpu);
11183         vcpu_put(vcpu);
11184 }
11185
11186 static void kvm_free_vcpus(struct kvm *kvm)
11187 {
11188         unsigned int i;
11189         struct kvm_vcpu *vcpu;
11190
11191         /*
11192          * Unpin any mmu pages first.
11193          */
11194         kvm_for_each_vcpu(i, vcpu, kvm) {
11195                 kvm_clear_async_pf_completion_queue(vcpu);
11196                 kvm_unload_vcpu_mmu(vcpu);
11197         }
11198         kvm_for_each_vcpu(i, vcpu, kvm)
11199                 kvm_vcpu_destroy(vcpu);
11200
11201         mutex_lock(&kvm->lock);
11202         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
11203                 kvm->vcpus[i] = NULL;
11204
11205         atomic_set(&kvm->online_vcpus, 0);
11206         mutex_unlock(&kvm->lock);
11207 }
11208
11209 void kvm_arch_sync_events(struct kvm *kvm)
11210 {
11211         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
11212         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
11213         kvm_free_pit(kvm);
11214 }
11215
11216 #define  ERR_PTR_USR(e)  ((void __user *)ERR_PTR(e))
11217
11218 /**
11219  * __x86_set_memory_region: Setup KVM internal memory slot
11220  *
11221  * @kvm: the kvm pointer to the VM.
11222  * @id: the slot ID to setup.
11223  * @gpa: the GPA to install the slot (unused when @size == 0).
11224  * @size: the size of the slot. Set to zero to uninstall a slot.
11225  *
11226  * This function helps to setup a KVM internal memory slot.  Specify
11227  * @size > 0 to install a new slot, while @size == 0 to uninstall a
11228  * slot.  The return code can be one of the following:
11229  *
11230  *   HVA:           on success (uninstall will return a bogus HVA)
11231  *   -errno:        on error
11232  *
11233  * The caller should always use IS_ERR() to check the return value
11234  * before use.  Note, the KVM internal memory slots are guaranteed to
11235  * remain valid and unchanged until the VM is destroyed, i.e., the
11236  * GPA->HVA translation will not change.  However, the HVA is a user
11237  * address, i.e. its accessibility is not guaranteed, and must be
11238  * accessed via __copy_{to,from}_user().
11239  */
11240 void __user * __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa,
11241                                       u32 size)
11242 {
11243         int i, r;
11244         unsigned long hva, old_npages;
11245         struct kvm_memslots *slots = kvm_memslots(kvm);
11246         struct kvm_memory_slot *slot;
11247
11248         /* Called with kvm->slots_lock held.  */
11249         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
11250                 return ERR_PTR_USR(-EINVAL);
11251
11252         slot = id_to_memslot(slots, id);
11253         if (size) {
11254                 if (slot && slot->npages)
11255                         return ERR_PTR_USR(-EEXIST);
11256
11257                 /*
11258                  * MAP_SHARED to prevent internal slot pages from being moved
11259                  * by fork()/COW.
11260                  */
11261                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
11262                               MAP_SHARED | MAP_ANONYMOUS, 0);
11263                 if (IS_ERR((void *)hva))
11264                         return (void __user *)hva;
11265         } else {
11266                 if (!slot || !slot->npages)
11267                         return NULL;
11268
11269                 old_npages = slot->npages;
11270                 hva = slot->userspace_addr;
11271         }
11272
11273         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
11274                 struct kvm_userspace_memory_region m;
11275
11276                 m.slot = id | (i << 16);
11277                 m.flags = 0;
11278                 m.guest_phys_addr = gpa;
11279                 m.userspace_addr = hva;
11280                 m.memory_size = size;
11281                 r = __kvm_set_memory_region(kvm, &m);
11282                 if (r < 0)
11283                         return ERR_PTR_USR(r);
11284         }
11285
11286         if (!size)
11287                 vm_munmap(hva, old_npages * PAGE_SIZE);
11288
11289         return (void __user *)hva;
11290 }
11291 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
11292
11293 void kvm_arch_pre_destroy_vm(struct kvm *kvm)
11294 {
11295         kvm_mmu_pre_destroy_vm(kvm);
11296 }
11297
11298 void kvm_arch_destroy_vm(struct kvm *kvm)
11299 {
11300         if (current->mm == kvm->mm) {
11301                 /*
11302                  * Free memory regions allocated on behalf of userspace,
11303                  * unless the the memory map has changed due to process exit
11304                  * or fd copying.
11305                  */
11306                 mutex_lock(&kvm->slots_lock);
11307                 __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
11308                                         0, 0);
11309                 __x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT,
11310                                         0, 0);
11311                 __x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
11312                 mutex_unlock(&kvm->slots_lock);
11313         }
11314         static_call_cond(kvm_x86_vm_destroy)(kvm);
11315         kvm_free_msr_filter(srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1));
11316         kvm_pic_destroy(kvm);
11317         kvm_ioapic_destroy(kvm);
11318         kvm_free_vcpus(kvm);
11319         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
11320         kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
11321         kvm_mmu_uninit_vm(kvm);
11322         kvm_page_track_cleanup(kvm);
11323         kvm_xen_destroy_vm(kvm);
11324         kvm_hv_destroy_vm(kvm);
11325 }
11326
11327 static void memslot_rmap_free(struct kvm_memory_slot *slot)
11328 {
11329         int i;
11330
11331         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
11332                 kvfree(slot->arch.rmap[i]);
11333                 slot->arch.rmap[i] = NULL;
11334         }
11335 }
11336
11337 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
11338 {
11339         int i;
11340
11341         memslot_rmap_free(slot);
11342
11343         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11344                 kvfree(slot->arch.lpage_info[i - 1]);
11345                 slot->arch.lpage_info[i - 1] = NULL;
11346         }
11347
11348         kvm_page_track_free_memslot(slot);
11349 }
11350
11351 static int memslot_rmap_alloc(struct kvm_memory_slot *slot,
11352                               unsigned long npages)
11353 {
11354         const int sz = sizeof(*slot->arch.rmap[0]);
11355         int i;
11356
11357         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
11358                 int level = i + 1;
11359                 int lpages = __kvm_mmu_slot_lpages(slot, npages, level);
11360
11361                 WARN_ON(slot->arch.rmap[i]);
11362
11363                 slot->arch.rmap[i] = kvcalloc(lpages, sz, GFP_KERNEL_ACCOUNT);
11364                 if (!slot->arch.rmap[i]) {
11365                         memslot_rmap_free(slot);
11366                         return -ENOMEM;
11367                 }
11368         }
11369
11370         return 0;
11371 }
11372
11373 int alloc_all_memslots_rmaps(struct kvm *kvm)
11374 {
11375         struct kvm_memslots *slots;
11376         struct kvm_memory_slot *slot;
11377         int r, i;
11378
11379         /*
11380          * Check if memslots alreday have rmaps early before acquiring
11381          * the slots_arch_lock below.
11382          */
11383         if (kvm_memslots_have_rmaps(kvm))
11384                 return 0;
11385
11386         mutex_lock(&kvm->slots_arch_lock);
11387
11388         /*
11389          * Read memslots_have_rmaps again, under the slots arch lock,
11390          * before allocating the rmaps
11391          */
11392         if (kvm_memslots_have_rmaps(kvm)) {
11393                 mutex_unlock(&kvm->slots_arch_lock);
11394                 return 0;
11395         }
11396
11397         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
11398                 slots = __kvm_memslots(kvm, i);
11399                 kvm_for_each_memslot(slot, slots) {
11400                         r = memslot_rmap_alloc(slot, slot->npages);
11401                         if (r) {
11402                                 mutex_unlock(&kvm->slots_arch_lock);
11403                                 return r;
11404                         }
11405                 }
11406         }
11407
11408         /*
11409          * Ensure that memslots_have_rmaps becomes true strictly after
11410          * all the rmap pointers are set.
11411          */
11412         smp_store_release(&kvm->arch.memslots_have_rmaps, true);
11413         mutex_unlock(&kvm->slots_arch_lock);
11414         return 0;
11415 }
11416
11417 static int kvm_alloc_memslot_metadata(struct kvm *kvm,
11418                                       struct kvm_memory_slot *slot,
11419                                       unsigned long npages)
11420 {
11421         int i, r;
11422
11423         /*
11424          * Clear out the previous array pointers for the KVM_MR_MOVE case.  The
11425          * old arrays will be freed by __kvm_set_memory_region() if installing
11426          * the new memslot is successful.
11427          */
11428         memset(&slot->arch, 0, sizeof(slot->arch));
11429
11430         if (kvm_memslots_have_rmaps(kvm)) {
11431                 r = memslot_rmap_alloc(slot, npages);
11432                 if (r)
11433                         return r;
11434         }
11435
11436         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11437                 struct kvm_lpage_info *linfo;
11438                 unsigned long ugfn;
11439                 int lpages;
11440                 int level = i + 1;
11441
11442                 lpages = __kvm_mmu_slot_lpages(slot, npages, level);
11443
11444                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
11445                 if (!linfo)
11446                         goto out_free;
11447
11448                 slot->arch.lpage_info[i - 1] = linfo;
11449
11450                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
11451                         linfo[0].disallow_lpage = 1;
11452                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
11453                         linfo[lpages - 1].disallow_lpage = 1;
11454                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
11455                 /*
11456                  * If the gfn and userspace address are not aligned wrt each
11457                  * other, disable large page support for this slot.
11458                  */
11459                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1)) {
11460                         unsigned long j;
11461
11462                         for (j = 0; j < lpages; ++j)
11463                                 linfo[j].disallow_lpage = 1;
11464                 }
11465         }
11466
11467         if (kvm_page_track_create_memslot(slot, npages))
11468                 goto out_free;
11469
11470         return 0;
11471
11472 out_free:
11473         memslot_rmap_free(slot);
11474
11475         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11476                 kvfree(slot->arch.lpage_info[i - 1]);
11477                 slot->arch.lpage_info[i - 1] = NULL;
11478         }
11479         return -ENOMEM;
11480 }
11481
11482 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
11483 {
11484         struct kvm_vcpu *vcpu;
11485         int i;
11486
11487         /*
11488          * memslots->generation has been incremented.
11489          * mmio generation may have reached its maximum value.
11490          */
11491         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
11492
11493         /* Force re-initialization of steal_time cache */
11494         kvm_for_each_vcpu(i, vcpu, kvm)
11495                 kvm_vcpu_kick(vcpu);
11496 }
11497
11498 int kvm_arch_prepare_memory_region(struct kvm *kvm,
11499                                 struct kvm_memory_slot *memslot,
11500                                 const struct kvm_userspace_memory_region *mem,
11501                                 enum kvm_mr_change change)
11502 {
11503         if (change == KVM_MR_CREATE || change == KVM_MR_MOVE)
11504                 return kvm_alloc_memslot_metadata(kvm, memslot,
11505                                                   mem->memory_size >> PAGE_SHIFT);
11506         return 0;
11507 }
11508
11509
11510 static void kvm_mmu_update_cpu_dirty_logging(struct kvm *kvm, bool enable)
11511 {
11512         struct kvm_arch *ka = &kvm->arch;
11513
11514         if (!kvm_x86_ops.cpu_dirty_log_size)
11515                 return;
11516
11517         if ((enable && ++ka->cpu_dirty_logging_count == 1) ||
11518             (!enable && --ka->cpu_dirty_logging_count == 0))
11519                 kvm_make_all_cpus_request(kvm, KVM_REQ_UPDATE_CPU_DIRTY_LOGGING);
11520
11521         WARN_ON_ONCE(ka->cpu_dirty_logging_count < 0);
11522 }
11523
11524 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
11525                                      struct kvm_memory_slot *old,
11526                                      const struct kvm_memory_slot *new,
11527                                      enum kvm_mr_change change)
11528 {
11529         bool log_dirty_pages = new->flags & KVM_MEM_LOG_DIRTY_PAGES;
11530
11531         /*
11532          * Update CPU dirty logging if dirty logging is being toggled.  This
11533          * applies to all operations.
11534          */
11535         if ((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)
11536                 kvm_mmu_update_cpu_dirty_logging(kvm, log_dirty_pages);
11537
11538         /*
11539          * Nothing more to do for RO slots (which can't be dirtied and can't be
11540          * made writable) or CREATE/MOVE/DELETE of a slot.
11541          *
11542          * For a memslot with dirty logging disabled:
11543          * CREATE:      No dirty mappings will already exist.
11544          * MOVE/DELETE: The old mappings will already have been cleaned up by
11545          *              kvm_arch_flush_shadow_memslot()
11546          *
11547          * For a memslot with dirty logging enabled:
11548          * CREATE:      No shadow pages exist, thus nothing to write-protect
11549          *              and no dirty bits to clear.
11550          * MOVE/DELETE: The old mappings will already have been cleaned up by
11551          *              kvm_arch_flush_shadow_memslot().
11552          */
11553         if ((change != KVM_MR_FLAGS_ONLY) || (new->flags & KVM_MEM_READONLY))
11554                 return;
11555
11556         /*
11557          * READONLY and non-flags changes were filtered out above, and the only
11558          * other flag is LOG_DIRTY_PAGES, i.e. something is wrong if dirty
11559          * logging isn't being toggled on or off.
11560          */
11561         if (WARN_ON_ONCE(!((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)))
11562                 return;
11563
11564         if (!log_dirty_pages) {
11565                 /*
11566                  * Dirty logging tracks sptes in 4k granularity, meaning that
11567                  * large sptes have to be split.  If live migration succeeds,
11568                  * the guest in the source machine will be destroyed and large
11569                  * sptes will be created in the destination.  However, if the
11570                  * guest continues to run in the source machine (for example if
11571                  * live migration fails), small sptes will remain around and
11572                  * cause bad performance.
11573                  *
11574                  * Scan sptes if dirty logging has been stopped, dropping those
11575                  * which can be collapsed into a single large-page spte.  Later
11576                  * page faults will create the large-page sptes.
11577                  */
11578                 kvm_mmu_zap_collapsible_sptes(kvm, new);
11579         } else {
11580                 /*
11581                  * Initially-all-set does not require write protecting any page,
11582                  * because they're all assumed to be dirty.
11583                  */
11584                 if (kvm_dirty_log_manual_protect_and_init_set(kvm))
11585                         return;
11586
11587                 if (kvm_x86_ops.cpu_dirty_log_size) {
11588                         kvm_mmu_slot_leaf_clear_dirty(kvm, new);
11589                         kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_2M);
11590                 } else {
11591                         kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_4K);
11592                 }
11593         }
11594 }
11595
11596 void kvm_arch_commit_memory_region(struct kvm *kvm,
11597                                 const struct kvm_userspace_memory_region *mem,
11598                                 struct kvm_memory_slot *old,
11599                                 const struct kvm_memory_slot *new,
11600                                 enum kvm_mr_change change)
11601 {
11602         if (!kvm->arch.n_requested_mmu_pages)
11603                 kvm_mmu_change_mmu_pages(kvm,
11604                                 kvm_mmu_calculate_default_mmu_pages(kvm));
11605
11606         kvm_mmu_slot_apply_flags(kvm, old, new, change);
11607
11608         /* Free the arrays associated with the old memslot. */
11609         if (change == KVM_MR_MOVE)
11610                 kvm_arch_free_memslot(kvm, old);
11611 }
11612
11613 void kvm_arch_flush_shadow_all(struct kvm *kvm)
11614 {
11615         kvm_mmu_zap_all(kvm);
11616 }
11617
11618 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
11619                                    struct kvm_memory_slot *slot)
11620 {
11621         kvm_page_track_flush_slot(kvm, slot);
11622 }
11623
11624 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
11625 {
11626         return (is_guest_mode(vcpu) &&
11627                         kvm_x86_ops.guest_apic_has_interrupt &&
11628                         static_call(kvm_x86_guest_apic_has_interrupt)(vcpu));
11629 }
11630
11631 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
11632 {
11633         if (!list_empty_careful(&vcpu->async_pf.done))
11634                 return true;
11635
11636         if (kvm_apic_has_events(vcpu))
11637                 return true;
11638
11639         if (vcpu->arch.pv.pv_unhalted)
11640                 return true;
11641
11642         if (vcpu->arch.exception.pending)
11643                 return true;
11644
11645         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
11646             (vcpu->arch.nmi_pending &&
11647              static_call(kvm_x86_nmi_allowed)(vcpu, false)))
11648                 return true;
11649
11650         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
11651             (vcpu->arch.smi_pending &&
11652              static_call(kvm_x86_smi_allowed)(vcpu, false)))
11653                 return true;
11654
11655         if (kvm_arch_interrupt_allowed(vcpu) &&
11656             (kvm_cpu_has_interrupt(vcpu) ||
11657             kvm_guest_apic_has_interrupt(vcpu)))
11658                 return true;
11659
11660         if (kvm_hv_has_stimer_pending(vcpu))
11661                 return true;
11662
11663         if (is_guest_mode(vcpu) &&
11664             kvm_x86_ops.nested_ops->hv_timer_pending &&
11665             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
11666                 return true;
11667
11668         return false;
11669 }
11670
11671 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
11672 {
11673         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
11674 }
11675
11676 bool kvm_arch_dy_has_pending_interrupt(struct kvm_vcpu *vcpu)
11677 {
11678         if (vcpu->arch.apicv_active && static_call(kvm_x86_dy_apicv_has_pending_interrupt)(vcpu))
11679                 return true;
11680
11681         return false;
11682 }
11683
11684 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
11685 {
11686         if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
11687                 return true;
11688
11689         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
11690                 kvm_test_request(KVM_REQ_SMI, vcpu) ||
11691                  kvm_test_request(KVM_REQ_EVENT, vcpu))
11692                 return true;
11693
11694         return kvm_arch_dy_has_pending_interrupt(vcpu);
11695 }
11696
11697 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
11698 {
11699         if (vcpu->arch.guest_state_protected)
11700                 return true;
11701
11702         return vcpu->arch.preempted_in_kernel;
11703 }
11704
11705 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
11706 {
11707         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
11708 }
11709
11710 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
11711 {
11712         return static_call(kvm_x86_interrupt_allowed)(vcpu, false);
11713 }
11714
11715 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
11716 {
11717         /* Can't read the RIP when guest state is protected, just return 0 */
11718         if (vcpu->arch.guest_state_protected)
11719                 return 0;
11720
11721         if (is_64_bit_mode(vcpu))
11722                 return kvm_rip_read(vcpu);
11723         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
11724                      kvm_rip_read(vcpu));
11725 }
11726 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
11727
11728 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
11729 {
11730         return kvm_get_linear_rip(vcpu) == linear_rip;
11731 }
11732 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
11733
11734 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
11735 {
11736         unsigned long rflags;
11737
11738         rflags = static_call(kvm_x86_get_rflags)(vcpu);
11739         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
11740                 rflags &= ~X86_EFLAGS_TF;
11741         return rflags;
11742 }
11743 EXPORT_SYMBOL_GPL(kvm_get_rflags);
11744
11745 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
11746 {
11747         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
11748             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
11749                 rflags |= X86_EFLAGS_TF;
11750         static_call(kvm_x86_set_rflags)(vcpu, rflags);
11751 }
11752
11753 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
11754 {
11755         __kvm_set_rflags(vcpu, rflags);
11756         kvm_make_request(KVM_REQ_EVENT, vcpu);
11757 }
11758 EXPORT_SYMBOL_GPL(kvm_set_rflags);
11759
11760 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
11761 {
11762         int r;
11763
11764         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
11765               work->wakeup_all)
11766                 return;
11767
11768         r = kvm_mmu_reload(vcpu);
11769         if (unlikely(r))
11770                 return;
11771
11772         if (!vcpu->arch.mmu->direct_map &&
11773               work->arch.cr3 != vcpu->arch.mmu->get_guest_pgd(vcpu))
11774                 return;
11775
11776         kvm_mmu_do_page_fault(vcpu, work->cr2_or_gpa, 0, true);
11777 }
11778
11779 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
11780 {
11781         BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU));
11782
11783         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
11784 }
11785
11786 static inline u32 kvm_async_pf_next_probe(u32 key)
11787 {
11788         return (key + 1) & (ASYNC_PF_PER_VCPU - 1);
11789 }
11790
11791 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11792 {
11793         u32 key = kvm_async_pf_hash_fn(gfn);
11794
11795         while (vcpu->arch.apf.gfns[key] != ~0)
11796                 key = kvm_async_pf_next_probe(key);
11797
11798         vcpu->arch.apf.gfns[key] = gfn;
11799 }
11800
11801 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
11802 {
11803         int i;
11804         u32 key = kvm_async_pf_hash_fn(gfn);
11805
11806         for (i = 0; i < ASYNC_PF_PER_VCPU &&
11807                      (vcpu->arch.apf.gfns[key] != gfn &&
11808                       vcpu->arch.apf.gfns[key] != ~0); i++)
11809                 key = kvm_async_pf_next_probe(key);
11810
11811         return key;
11812 }
11813
11814 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11815 {
11816         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
11817 }
11818
11819 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11820 {
11821         u32 i, j, k;
11822
11823         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
11824
11825         if (WARN_ON_ONCE(vcpu->arch.apf.gfns[i] != gfn))
11826                 return;
11827
11828         while (true) {
11829                 vcpu->arch.apf.gfns[i] = ~0;
11830                 do {
11831                         j = kvm_async_pf_next_probe(j);
11832                         if (vcpu->arch.apf.gfns[j] == ~0)
11833                                 return;
11834                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
11835                         /*
11836                          * k lies cyclically in ]i,j]
11837                          * |    i.k.j |
11838                          * |....j i.k.| or  |.k..j i...|
11839                          */
11840                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
11841                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
11842                 i = j;
11843         }
11844 }
11845
11846 static inline int apf_put_user_notpresent(struct kvm_vcpu *vcpu)
11847 {
11848         u32 reason = KVM_PV_REASON_PAGE_NOT_PRESENT;
11849
11850         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &reason,
11851                                       sizeof(reason));
11852 }
11853
11854 static inline int apf_put_user_ready(struct kvm_vcpu *vcpu, u32 token)
11855 {
11856         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
11857
11858         return kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
11859                                              &token, offset, sizeof(token));
11860 }
11861
11862 static inline bool apf_pageready_slot_free(struct kvm_vcpu *vcpu)
11863 {
11864         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
11865         u32 val;
11866
11867         if (kvm_read_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
11868                                          &val, offset, sizeof(val)))
11869                 return false;
11870
11871         return !val;
11872 }
11873
11874 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
11875 {
11876         if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
11877                 return false;
11878
11879         if (!kvm_pv_async_pf_enabled(vcpu) ||
11880             (vcpu->arch.apf.send_user_only && static_call(kvm_x86_get_cpl)(vcpu) == 0))
11881                 return false;
11882
11883         return true;
11884 }
11885
11886 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
11887 {
11888         if (unlikely(!lapic_in_kernel(vcpu) ||
11889                      kvm_event_needs_reinjection(vcpu) ||
11890                      vcpu->arch.exception.pending))
11891                 return false;
11892
11893         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
11894                 return false;
11895
11896         /*
11897          * If interrupts are off we cannot even use an artificial
11898          * halt state.
11899          */
11900         return kvm_arch_interrupt_allowed(vcpu);
11901 }
11902
11903 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
11904                                      struct kvm_async_pf *work)
11905 {
11906         struct x86_exception fault;
11907
11908         trace_kvm_async_pf_not_present(work->arch.token, work->cr2_or_gpa);
11909         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
11910
11911         if (kvm_can_deliver_async_pf(vcpu) &&
11912             !apf_put_user_notpresent(vcpu)) {
11913                 fault.vector = PF_VECTOR;
11914                 fault.error_code_valid = true;
11915                 fault.error_code = 0;
11916                 fault.nested_page_fault = false;
11917                 fault.address = work->arch.token;
11918                 fault.async_page_fault = true;
11919                 kvm_inject_page_fault(vcpu, &fault);
11920                 return true;
11921         } else {
11922                 /*
11923                  * It is not possible to deliver a paravirtualized asynchronous
11924                  * page fault, but putting the guest in an artificial halt state
11925                  * can be beneficial nevertheless: if an interrupt arrives, we
11926                  * can deliver it timely and perhaps the guest will schedule
11927                  * another process.  When the instruction that triggered a page
11928                  * fault is retried, hopefully the page will be ready in the host.
11929                  */
11930                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
11931                 return false;
11932         }
11933 }
11934
11935 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
11936                                  struct kvm_async_pf *work)
11937 {
11938         struct kvm_lapic_irq irq = {
11939                 .delivery_mode = APIC_DM_FIXED,
11940                 .vector = vcpu->arch.apf.vec
11941         };
11942
11943         if (work->wakeup_all)
11944                 work->arch.token = ~0; /* broadcast wakeup */
11945         else
11946                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
11947         trace_kvm_async_pf_ready(work->arch.token, work->cr2_or_gpa);
11948
11949         if ((work->wakeup_all || work->notpresent_injected) &&
11950             kvm_pv_async_pf_enabled(vcpu) &&
11951             !apf_put_user_ready(vcpu, work->arch.token)) {
11952                 vcpu->arch.apf.pageready_pending = true;
11953                 kvm_apic_set_irq(vcpu, &irq, NULL);
11954         }
11955
11956         vcpu->arch.apf.halted = false;
11957         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
11958 }
11959
11960 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu)
11961 {
11962         kvm_make_request(KVM_REQ_APF_READY, vcpu);
11963         if (!vcpu->arch.apf.pageready_pending)
11964                 kvm_vcpu_kick(vcpu);
11965 }
11966
11967 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu)
11968 {
11969         if (!kvm_pv_async_pf_enabled(vcpu))
11970                 return true;
11971         else
11972                 return kvm_lapic_enabled(vcpu) && apf_pageready_slot_free(vcpu);
11973 }
11974
11975 void kvm_arch_start_assignment(struct kvm *kvm)
11976 {
11977         if (atomic_inc_return(&kvm->arch.assigned_device_count) == 1)
11978                 static_call_cond(kvm_x86_start_assignment)(kvm);
11979 }
11980 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
11981
11982 void kvm_arch_end_assignment(struct kvm *kvm)
11983 {
11984         atomic_dec(&kvm->arch.assigned_device_count);
11985 }
11986 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
11987
11988 bool kvm_arch_has_assigned_device(struct kvm *kvm)
11989 {
11990         return atomic_read(&kvm->arch.assigned_device_count);
11991 }
11992 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
11993
11994 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
11995 {
11996         atomic_inc(&kvm->arch.noncoherent_dma_count);
11997 }
11998 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
11999
12000 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
12001 {
12002         atomic_dec(&kvm->arch.noncoherent_dma_count);
12003 }
12004 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
12005
12006 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
12007 {
12008         return atomic_read(&kvm->arch.noncoherent_dma_count);
12009 }
12010 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
12011
12012 bool kvm_arch_has_irq_bypass(void)
12013 {
12014         return true;
12015 }
12016
12017 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
12018                                       struct irq_bypass_producer *prod)
12019 {
12020         struct kvm_kernel_irqfd *irqfd =
12021                 container_of(cons, struct kvm_kernel_irqfd, consumer);
12022         int ret;
12023
12024         irqfd->producer = prod;
12025         kvm_arch_start_assignment(irqfd->kvm);
12026         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm,
12027                                          prod->irq, irqfd->gsi, 1);
12028
12029         if (ret)
12030                 kvm_arch_end_assignment(irqfd->kvm);
12031
12032         return ret;
12033 }
12034
12035 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
12036                                       struct irq_bypass_producer *prod)
12037 {
12038         int ret;
12039         struct kvm_kernel_irqfd *irqfd =
12040                 container_of(cons, struct kvm_kernel_irqfd, consumer);
12041
12042         WARN_ON(irqfd->producer != prod);
12043         irqfd->producer = NULL;
12044
12045         /*
12046          * When producer of consumer is unregistered, we change back to
12047          * remapped mode, so we can re-use the current implementation
12048          * when the irq is masked/disabled or the consumer side (KVM
12049          * int this case doesn't want to receive the interrupts.
12050         */
12051         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm, prod->irq, irqfd->gsi, 0);
12052         if (ret)
12053                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
12054                        " fails: %d\n", irqfd->consumer.token, ret);
12055
12056         kvm_arch_end_assignment(irqfd->kvm);
12057 }
12058
12059 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
12060                                    uint32_t guest_irq, bool set)
12061 {
12062         return static_call(kvm_x86_update_pi_irte)(kvm, host_irq, guest_irq, set);
12063 }
12064
12065 bool kvm_vector_hashing_enabled(void)
12066 {
12067         return vector_hashing;
12068 }
12069
12070 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
12071 {
12072         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
12073 }
12074 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
12075
12076
12077 int kvm_spec_ctrl_test_value(u64 value)
12078 {
12079         /*
12080          * test that setting IA32_SPEC_CTRL to given value
12081          * is allowed by the host processor
12082          */
12083
12084         u64 saved_value;
12085         unsigned long flags;
12086         int ret = 0;
12087
12088         local_irq_save(flags);
12089
12090         if (rdmsrl_safe(MSR_IA32_SPEC_CTRL, &saved_value))
12091                 ret = 1;
12092         else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL, value))
12093                 ret = 1;
12094         else
12095                 wrmsrl(MSR_IA32_SPEC_CTRL, saved_value);
12096
12097         local_irq_restore(flags);
12098
12099         return ret;
12100 }
12101 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value);
12102
12103 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code)
12104 {
12105         struct x86_exception fault;
12106         u32 access = error_code &
12107                 (PFERR_WRITE_MASK | PFERR_FETCH_MASK | PFERR_USER_MASK);
12108
12109         if (!(error_code & PFERR_PRESENT_MASK) ||
12110             vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, &fault) != UNMAPPED_GVA) {
12111                 /*
12112                  * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
12113                  * tables probably do not match the TLB.  Just proceed
12114                  * with the error code that the processor gave.
12115                  */
12116                 fault.vector = PF_VECTOR;
12117                 fault.error_code_valid = true;
12118                 fault.error_code = error_code;
12119                 fault.nested_page_fault = false;
12120                 fault.address = gva;
12121         }
12122         vcpu->arch.walk_mmu->inject_page_fault(vcpu, &fault);
12123 }
12124 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error);
12125
12126 /*
12127  * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
12128  * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
12129  * indicates whether exit to userspace is needed.
12130  */
12131 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
12132                               struct x86_exception *e)
12133 {
12134         if (r == X86EMUL_PROPAGATE_FAULT) {
12135                 kvm_inject_emulated_page_fault(vcpu, e);
12136                 return 1;
12137         }
12138
12139         /*
12140          * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
12141          * while handling a VMX instruction KVM could've handled the request
12142          * correctly by exiting to userspace and performing I/O but there
12143          * doesn't seem to be a real use-case behind such requests, just return
12144          * KVM_EXIT_INTERNAL_ERROR for now.
12145          */
12146         vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
12147         vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
12148         vcpu->run->internal.ndata = 0;
12149
12150         return 0;
12151 }
12152 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure);
12153
12154 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva)
12155 {
12156         bool pcid_enabled;
12157         struct x86_exception e;
12158         struct {
12159                 u64 pcid;
12160                 u64 gla;
12161         } operand;
12162         int r;
12163
12164         r = kvm_read_guest_virt(vcpu, gva, &operand, sizeof(operand), &e);
12165         if (r != X86EMUL_CONTINUE)
12166                 return kvm_handle_memory_failure(vcpu, r, &e);
12167
12168         if (operand.pcid >> 12 != 0) {
12169                 kvm_inject_gp(vcpu, 0);
12170                 return 1;
12171         }
12172
12173         pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
12174
12175         switch (type) {
12176         case INVPCID_TYPE_INDIV_ADDR:
12177                 if ((!pcid_enabled && (operand.pcid != 0)) ||
12178                     is_noncanonical_address(operand.gla, vcpu)) {
12179                         kvm_inject_gp(vcpu, 0);
12180                         return 1;
12181                 }
12182                 kvm_mmu_invpcid_gva(vcpu, operand.gla, operand.pcid);
12183                 return kvm_skip_emulated_instruction(vcpu);
12184
12185         case INVPCID_TYPE_SINGLE_CTXT:
12186                 if (!pcid_enabled && (operand.pcid != 0)) {
12187                         kvm_inject_gp(vcpu, 0);
12188                         return 1;
12189                 }
12190
12191                 kvm_invalidate_pcid(vcpu, operand.pcid);
12192                 return kvm_skip_emulated_instruction(vcpu);
12193
12194         case INVPCID_TYPE_ALL_NON_GLOBAL:
12195                 /*
12196                  * Currently, KVM doesn't mark global entries in the shadow
12197                  * page tables, so a non-global flush just degenerates to a
12198                  * global flush. If needed, we could optimize this later by
12199                  * keeping track of global entries in shadow page tables.
12200                  */
12201
12202                 fallthrough;
12203         case INVPCID_TYPE_ALL_INCL_GLOBAL:
12204                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
12205                 return kvm_skip_emulated_instruction(vcpu);
12206
12207         default:
12208                 BUG(); /* We have already checked above that type <= 3 */
12209         }
12210 }
12211 EXPORT_SYMBOL_GPL(kvm_handle_invpcid);
12212
12213 static int complete_sev_es_emulated_mmio(struct kvm_vcpu *vcpu)
12214 {
12215         struct kvm_run *run = vcpu->run;
12216         struct kvm_mmio_fragment *frag;
12217         unsigned int len;
12218
12219         BUG_ON(!vcpu->mmio_needed);
12220
12221         /* Complete previous fragment */
12222         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
12223         len = min(8u, frag->len);
12224         if (!vcpu->mmio_is_write)
12225                 memcpy(frag->data, run->mmio.data, len);
12226
12227         if (frag->len <= 8) {
12228                 /* Switch to the next fragment. */
12229                 frag++;
12230                 vcpu->mmio_cur_fragment++;
12231         } else {
12232                 /* Go forward to the next mmio piece. */
12233                 frag->data += len;
12234                 frag->gpa += len;
12235                 frag->len -= len;
12236         }
12237
12238         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
12239                 vcpu->mmio_needed = 0;
12240
12241                 // VMG change, at this point, we're always done
12242                 // RIP has already been advanced
12243                 return 1;
12244         }
12245
12246         // More MMIO is needed
12247         run->mmio.phys_addr = frag->gpa;
12248         run->mmio.len = min(8u, frag->len);
12249         run->mmio.is_write = vcpu->mmio_is_write;
12250         if (run->mmio.is_write)
12251                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
12252         run->exit_reason = KVM_EXIT_MMIO;
12253
12254         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12255
12256         return 0;
12257 }
12258
12259 int kvm_sev_es_mmio_write(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12260                           void *data)
12261 {
12262         int handled;
12263         struct kvm_mmio_fragment *frag;
12264
12265         if (!data)
12266                 return -EINVAL;
12267
12268         handled = write_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12269         if (handled == bytes)
12270                 return 1;
12271
12272         bytes -= handled;
12273         gpa += handled;
12274         data += handled;
12275
12276         /*TODO: Check if need to increment number of frags */
12277         frag = vcpu->mmio_fragments;
12278         vcpu->mmio_nr_fragments = 1;
12279         frag->len = bytes;
12280         frag->gpa = gpa;
12281         frag->data = data;
12282
12283         vcpu->mmio_needed = 1;
12284         vcpu->mmio_cur_fragment = 0;
12285
12286         vcpu->run->mmio.phys_addr = gpa;
12287         vcpu->run->mmio.len = min(8u, frag->len);
12288         vcpu->run->mmio.is_write = 1;
12289         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
12290         vcpu->run->exit_reason = KVM_EXIT_MMIO;
12291
12292         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12293
12294         return 0;
12295 }
12296 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write);
12297
12298 int kvm_sev_es_mmio_read(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12299                          void *data)
12300 {
12301         int handled;
12302         struct kvm_mmio_fragment *frag;
12303
12304         if (!data)
12305                 return -EINVAL;
12306
12307         handled = read_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12308         if (handled == bytes)
12309                 return 1;
12310
12311         bytes -= handled;
12312         gpa += handled;
12313         data += handled;
12314
12315         /*TODO: Check if need to increment number of frags */
12316         frag = vcpu->mmio_fragments;
12317         vcpu->mmio_nr_fragments = 1;
12318         frag->len = bytes;
12319         frag->gpa = gpa;
12320         frag->data = data;
12321
12322         vcpu->mmio_needed = 1;
12323         vcpu->mmio_cur_fragment = 0;
12324
12325         vcpu->run->mmio.phys_addr = gpa;
12326         vcpu->run->mmio.len = min(8u, frag->len);
12327         vcpu->run->mmio.is_write = 0;
12328         vcpu->run->exit_reason = KVM_EXIT_MMIO;
12329
12330         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12331
12332         return 0;
12333 }
12334 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read);
12335
12336 static int complete_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
12337 {
12338         memcpy(vcpu->arch.guest_ins_data, vcpu->arch.pio_data,
12339                vcpu->arch.pio.count * vcpu->arch.pio.size);
12340         vcpu->arch.pio.count = 0;
12341
12342         return 1;
12343 }
12344
12345 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
12346                            unsigned int port, void *data,  unsigned int count)
12347 {
12348         int ret;
12349
12350         ret = emulator_pio_out_emulated(vcpu->arch.emulate_ctxt, size, port,
12351                                         data, count);
12352         if (ret)
12353                 return ret;
12354
12355         vcpu->arch.pio.count = 0;
12356
12357         return 0;
12358 }
12359
12360 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
12361                           unsigned int port, void *data, unsigned int count)
12362 {
12363         int ret;
12364
12365         ret = emulator_pio_in_emulated(vcpu->arch.emulate_ctxt, size, port,
12366                                        data, count);
12367         if (ret) {
12368                 vcpu->arch.pio.count = 0;
12369         } else {
12370                 vcpu->arch.guest_ins_data = data;
12371                 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_ins;
12372         }
12373
12374         return 0;
12375 }
12376
12377 int kvm_sev_es_string_io(struct kvm_vcpu *vcpu, unsigned int size,
12378                          unsigned int port, void *data,  unsigned int count,
12379                          int in)
12380 {
12381         return in ? kvm_sev_es_ins(vcpu, size, port, data, count)
12382                   : kvm_sev_es_outs(vcpu, size, port, data, count);
12383 }
12384 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io);
12385
12386 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry);
12387 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
12388 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
12389 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
12390 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
12391 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
12392 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
12393 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
12394 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
12395 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
12396 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
12397 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
12398 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
12399 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
12400 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
12401 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
12402 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
12403 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
12404 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
12405 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
12406 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);
12407 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log);
12408 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request);
12409 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter);
12410 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit);
12411 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter);
12412 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit);