arch/x86/kvm/x86.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * derived from drivers/kvm/kvm_main.c
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  * Copyright (C) 2008 Qumranet, Inc.
   9  * Copyright IBM Corporation, 2008
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *   Yaniv Kamay  <yaniv@qumranet.com>
  15  *   Amit Shah    <amit.shah@qumranet.com>
  16  *   Ben-Ami Yassour <benami@il.ibm.com>
  17  */
  18
  19 #include <linux/kvm_host.h>
  20 #include "irq.h"
  21 #include "ioapic.h"
  22 #include "mmu.h"
  23 #include "i8254.h"
  24 #include "tss.h"
  25 #include "kvm_cache_regs.h"
  26 #include "kvm_emulate.h"
  27 #include "x86.h"
  28 #include "cpuid.h"
  29 #include "pmu.h"
  30 #include "hyperv.h"
  31 #include "lapic.h"
  32 #include "xen.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/export.h>
  40 #include <linux/moduleparam.h>
  41 #include <linux/mman.h>
  42 #include <linux/highmem.h>
  43 #include <linux/iommu.h>
  44 #include <linux/intel-iommu.h>
  45 #include <linux/cpufreq.h>
  46 #include <linux/user-return-notifier.h>
  47 #include <linux/srcu.h>
  48 #include <linux/slab.h>
  49 #include <linux/perf_event.h>
  50 #include <linux/uaccess.h>
  51 #include <linux/hash.h>
  52 #include <linux/pci.h>
  53 #include <linux/timekeeper_internal.h>
  54 #include <linux/pvclock_gtod.h>
  55 #include <linux/kvm_irqfd.h>
  56 #include <linux/irqbypass.h>
  57 #include <linux/sched/stat.h>
  58 #include <linux/sched/isolation.h>
  59 #include <linux/mem_encrypt.h>
  60 #include <linux/entry-kvm.h>
  61
  62 #include <trace/events/kvm.h>
  63
  64 #include <asm/debugreg.h>
  65 #include <asm/msr.h>
  66 #include <asm/desc.h>
  67 #include <asm/mce.h>
  68 #include <linux/kernel_stat.h>
  69 #include <asm/fpu/internal.h> /* Ugh! */
  70 #include <asm/pvclock.h>
  71 #include <asm/div64.h>
  72 #include <asm/irq_remapping.h>
  73 #include <asm/mshyperv.h>
  74 #include <asm/hypervisor.h>
  75 #include <asm/tlbflush.h>
  76 #include <asm/intel_pt.h>
  77 #include <asm/emulate_prefix.h>
  78 #include <clocksource/hyperv_timer.h>
  79
  80 #define CREATE_TRACE_POINTS
  81 #include "trace.h"
  82
  83 #define MAX_IO_MSRS 256
  84 #define KVM_MAX_MCE_BANKS 32
  85 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  86 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  87
  88 #define emul_to_vcpu(ctxt) \
  89         ((struct kvm_vcpu *)(ctxt)->vcpu)
  90
  91 /* EFER defaults:
  92  * - enable syscall per default because its emulated by KVM
  93  * - enable LME and LMA per default on 64 bit KVM
  94  */
  95 #ifdef CONFIG_X86_64
  96 static
  97 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  98 #else
  99 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
 100 #endif
 101
 102 static u64 __read_mostly cr4_reserved_bits = CR4_RESERVED_BITS;
 103
 104 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
 105                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 106
 107 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 108 static void process_nmi(struct kvm_vcpu *vcpu);
 109 static void process_smi(struct kvm_vcpu *vcpu);
 110 static void enter_smm(struct kvm_vcpu *vcpu);
 111 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 112 static void store_regs(struct kvm_vcpu *vcpu);
 113 static int sync_regs(struct kvm_vcpu *vcpu);
 114
 115 struct kvm_x86_ops kvm_x86_ops __read_mostly;
 116 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 117
 118 #define KVM_X86_OP(func)                                             \
 119         DEFINE_STATIC_CALL_NULL(kvm_x86_##func,                      \
 120                                 *(((struct kvm_x86_ops *)0)->func));
 121 #define KVM_X86_OP_NULL KVM_X86_OP
 122 #include <asm/kvm-x86-ops.h>
 123 EXPORT_STATIC_CALL_GPL(kvm_x86_get_cs_db_l_bits);
 124 EXPORT_STATIC_CALL_GPL(kvm_x86_cache_reg);
 125 EXPORT_STATIC_CALL_GPL(kvm_x86_tlb_flush_current);
 126
 127 static bool __read_mostly ignore_msrs = 0;
 128 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 129
 130 bool __read_mostly report_ignored_msrs = true;
 131 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 132 EXPORT_SYMBOL_GPL(report_ignored_msrs);
 133
 134 unsigned int min_timer_period_us = 200;
 135 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 136
 137 static bool __read_mostly kvmclock_periodic_sync = true;
 138 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 139
 140 bool __read_mostly kvm_has_tsc_control;
 141 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 142 u32  __read_mostly kvm_max_guest_tsc_khz;
 143 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 144 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 145 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 146 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 147 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 148 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 149 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 150 bool __read_mostly kvm_has_bus_lock_exit;
 151 EXPORT_SYMBOL_GPL(kvm_has_bus_lock_exit);
 152
 153 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 154 static u32 __read_mostly tsc_tolerance_ppm = 250;
 155 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 156
 157 /*
 158  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 159  * adaptive tuning starting from default advancment of 1000ns.  '0' disables
 160  * advancement entirely.  Any other value is used as-is and disables adaptive
 161  * tuning, i.e. allows priveleged userspace to set an exact advancement time.
 162  */
 163 static int __read_mostly lapic_timer_advance_ns = -1;
 164 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 165
 166 static bool __read_mostly vector_hashing = true;
 167 module_param(vector_hashing, bool, S_IRUGO);
 168
 169 bool __read_mostly enable_vmware_backdoor = false;
 170 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 171 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 172
 173 static bool __read_mostly force_emulation_prefix = false;
 174 module_param(force_emulation_prefix, bool, S_IRUGO);
 175
 176 int __read_mostly pi_inject_timer = -1;
 177 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
 178
 179 /*
 180  * Restoring the host value for MSRs that are only consumed when running in
 181  * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
 182  * returns to userspace, i.e. the kernel can run with the guest's value.
 183  */
 184 #define KVM_MAX_NR_USER_RETURN_MSRS 16
 185
 186 struct kvm_user_return_msrs_global {
 187         int nr;
 188         u32 msrs[KVM_MAX_NR_USER_RETURN_MSRS];
 189 };
 190
 191 struct kvm_user_return_msrs {
 192         struct user_return_notifier urn;
 193         bool registered;
 194         struct kvm_user_return_msr_values {
 195                 u64 host;
 196                 u64 curr;
 197         } values[KVM_MAX_NR_USER_RETURN_MSRS];
 198 };
 199
 200 static struct kvm_user_return_msrs_global __read_mostly user_return_msrs_global;
 201 static struct kvm_user_return_msrs __percpu *user_return_msrs;
 202
 203 #define KVM_SUPPORTED_XCR0     (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
 204                                 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
 205                                 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
 206                                 | XFEATURE_MASK_PKRU)
 207
 208 u64 __read_mostly host_efer;
 209 EXPORT_SYMBOL_GPL(host_efer);
 210
 211 bool __read_mostly allow_smaller_maxphyaddr = 0;
 212 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr);
 213
 214 u64 __read_mostly host_xss;
 215 EXPORT_SYMBOL_GPL(host_xss);
 216 u64 __read_mostly supported_xss;
 217 EXPORT_SYMBOL_GPL(supported_xss);
 218
 219 struct kvm_stats_debugfs_item debugfs_entries[] = {
 220         VCPU_STAT("pf_fixed", pf_fixed),
 221         VCPU_STAT("pf_guest", pf_guest),
 222         VCPU_STAT("tlb_flush", tlb_flush),
 223         VCPU_STAT("invlpg", invlpg),
 224         VCPU_STAT("exits", exits),
 225         VCPU_STAT("io_exits", io_exits),
 226         VCPU_STAT("mmio_exits", mmio_exits),
 227         VCPU_STAT("signal_exits", signal_exits),
 228         VCPU_STAT("irq_window", irq_window_exits),
 229         VCPU_STAT("nmi_window", nmi_window_exits),
 230         VCPU_STAT("halt_exits", halt_exits),
 231         VCPU_STAT("halt_successful_poll", halt_successful_poll),
 232         VCPU_STAT("halt_attempted_poll", halt_attempted_poll),
 233         VCPU_STAT("halt_poll_invalid", halt_poll_invalid),
 234         VCPU_STAT("halt_wakeup", halt_wakeup),
 235         VCPU_STAT("hypercalls", hypercalls),
 236         VCPU_STAT("request_irq", request_irq_exits),
 237         VCPU_STAT("irq_exits", irq_exits),
 238         VCPU_STAT("host_state_reload", host_state_reload),
 239         VCPU_STAT("fpu_reload", fpu_reload),
 240         VCPU_STAT("insn_emulation", insn_emulation),
 241         VCPU_STAT("insn_emulation_fail", insn_emulation_fail),
 242         VCPU_STAT("irq_injections", irq_injections),
 243         VCPU_STAT("nmi_injections", nmi_injections),
 244         VCPU_STAT("req_event", req_event),
 245         VCPU_STAT("l1d_flush", l1d_flush),
 246         VCPU_STAT("halt_poll_success_ns", halt_poll_success_ns),
 247         VCPU_STAT("halt_poll_fail_ns", halt_poll_fail_ns),
 248         VM_STAT("mmu_shadow_zapped", mmu_shadow_zapped),
 249         VM_STAT("mmu_pte_write", mmu_pte_write),
 250         VM_STAT("mmu_pde_zapped", mmu_pde_zapped),
 251         VM_STAT("mmu_flooded", mmu_flooded),
 252         VM_STAT("mmu_recycled", mmu_recycled),
 253         VM_STAT("mmu_cache_miss", mmu_cache_miss),
 254         VM_STAT("mmu_unsync", mmu_unsync),
 255         VM_STAT("remote_tlb_flush", remote_tlb_flush),
 256         VM_STAT("largepages", lpages, .mode = 0444),
 257         VM_STAT("nx_largepages_splitted", nx_lpage_splits, .mode = 0444),
 258         VM_STAT("max_mmu_page_hash_collisions", max_mmu_page_hash_collisions),
 259         { NULL }
 260 };
 261
 262 u64 __read_mostly host_xcr0;
 263 u64 __read_mostly supported_xcr0;
 264 EXPORT_SYMBOL_GPL(supported_xcr0);
 265
 266 static struct kmem_cache *x86_fpu_cache;
 267
 268 static struct kmem_cache *x86_emulator_cache;
 269
 270 /*
 271  * When called, it means the previous get/set msr reached an invalid msr.
 272  * Return true if we want to ignore/silent this failed msr access.
 273  */
 274 static bool kvm_msr_ignored_check(struct kvm_vcpu *vcpu, u32 msr,
 275                                   u64 data, bool write)
 276 {
 277         const char *op = write ? "wrmsr" : "rdmsr";
 278
 279         if (ignore_msrs) {
 280                 if (report_ignored_msrs)
 281                         kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
 282                                       op, msr, data);
 283                 /* Mask the error */
 284                 return true;
 285         } else {
 286                 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
 287                                       op, msr, data);
 288                 return false;
 289         }
 290 }
 291
 292 static struct kmem_cache *kvm_alloc_emulator_cache(void)
 293 {
 294         unsigned int useroffset = offsetof(struct x86_emulate_ctxt, src);
 295         unsigned int size = sizeof(struct x86_emulate_ctxt);
 296
 297         return kmem_cache_create_usercopy("x86_emulator", size,
 298                                           __alignof__(struct x86_emulate_ctxt),
 299                                           SLAB_ACCOUNT, useroffset,
 300                                           size - useroffset, NULL);
 301 }
 302
 303 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 304
 305 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 306 {
 307         int i;
 308         for (i = 0; i < ASYNC_PF_PER_VCPU; i++)
 309                 vcpu->arch.apf.gfns[i] = ~0;
 310 }
 311
 312 static void kvm_on_user_return(struct user_return_notifier *urn)
 313 {
 314         unsigned slot;
 315         struct kvm_user_return_msrs *msrs
 316                 = container_of(urn, struct kvm_user_return_msrs, urn);
 317         struct kvm_user_return_msr_values *values;
 318         unsigned long flags;
 319
 320         /*
 321          * Disabling irqs at this point since the following code could be
 322          * interrupted and executed through kvm_arch_hardware_disable()
 323          */
 324         local_irq_save(flags);
 325         if (msrs->registered) {
 326                 msrs->registered = false;
 327                 user_return_notifier_unregister(urn);
 328         }
 329         local_irq_restore(flags);
 330         for (slot = 0; slot < user_return_msrs_global.nr; ++slot) {
 331                 values = &msrs->values[slot];
 332                 if (values->host != values->curr) {
 333                         wrmsrl(user_return_msrs_global.msrs[slot], values->host);
 334                         values->curr = values->host;
 335                 }
 336         }
 337 }
 338
 339 void kvm_define_user_return_msr(unsigned slot, u32 msr)
 340 {
 341         BUG_ON(slot >= KVM_MAX_NR_USER_RETURN_MSRS);
 342         user_return_msrs_global.msrs[slot] = msr;
 343         if (slot >= user_return_msrs_global.nr)
 344                 user_return_msrs_global.nr = slot + 1;
 345 }
 346 EXPORT_SYMBOL_GPL(kvm_define_user_return_msr);
 347
 348 static void kvm_user_return_msr_cpu_online(void)
 349 {
 350         unsigned int cpu = smp_processor_id();
 351         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 352         u64 value;
 353         int i;
 354
 355         for (i = 0; i < user_return_msrs_global.nr; ++i) {
 356                 rdmsrl_safe(user_return_msrs_global.msrs[i], &value);
 357                 msrs->values[i].host = value;
 358                 msrs->values[i].curr = value;
 359         }
 360 }
 361
 362 int kvm_set_user_return_msr(unsigned slot, u64 value, u64 mask)
 363 {
 364         unsigned int cpu = smp_processor_id();
 365         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 366         int err;
 367
 368         value = (value & mask) | (msrs->values[slot].host & ~mask);
 369         if (value == msrs->values[slot].curr)
 370                 return 0;
 371         err = wrmsrl_safe(user_return_msrs_global.msrs[slot], value);
 372         if (err)
 373                 return 1;
 374
 375         msrs->values[slot].curr = value;
 376         if (!msrs->registered) {
 377                 msrs->urn.on_user_return = kvm_on_user_return;
 378                 user_return_notifier_register(&msrs->urn);
 379                 msrs->registered = true;
 380         }
 381         return 0;
 382 }
 383 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr);
 384
 385 static void drop_user_return_notifiers(void)
 386 {
 387         unsigned int cpu = smp_processor_id();
 388         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 389
 390         if (msrs->registered)
 391                 kvm_on_user_return(&msrs->urn);
 392 }
 393
 394 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 395 {
 396         return vcpu->arch.apic_base;
 397 }
 398 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 399
 400 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 401 {
 402         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 403 }
 404 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 405
 406 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 407 {
 408         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 409         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 410         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) | 0x2ff |
 411                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 412
 413         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 414                 return 1;
 415         if (!msr_info->host_initiated) {
 416                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 417                         return 1;
 418                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 419                         return 1;
 420         }
 421
 422         kvm_lapic_set_base(vcpu, msr_info->data);
 423         kvm_recalculate_apic_map(vcpu->kvm);
 424         return 0;
 425 }
 426 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 427
 428 asmlinkage __visible noinstr void kvm_spurious_fault(void)
 429 {
 430         /* Fault while not rebooting.  We want the trace. */
 431         BUG_ON(!kvm_rebooting);
 432 }
 433 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 434
 435 #define EXCPT_BENIGN            0
 436 #define EXCPT_CONTRIBUTORY      1
 437 #define EXCPT_PF                2
 438
 439 static int exception_class(int vector)
 440 {
 441         switch (vector) {
 442         case PF_VECTOR:
 443                 return EXCPT_PF;
 444         case DE_VECTOR:
 445         case TS_VECTOR:
 446         case NP_VECTOR:
 447         case SS_VECTOR:
 448         case GP_VECTOR:
 449                 return EXCPT_CONTRIBUTORY;
 450         default:
 451                 break;
 452         }
 453         return EXCPT_BENIGN;
 454 }
 455
 456 #define EXCPT_FAULT             0
 457 #define EXCPT_TRAP              1
 458 #define EXCPT_ABORT             2
 459 #define EXCPT_INTERRUPT         3
 460
 461 static int exception_type(int vector)
 462 {
 463         unsigned int mask;
 464
 465         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 466                 return EXCPT_INTERRUPT;
 467
 468         mask = 1 << vector;
 469
 470         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 471         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 472                 return EXCPT_TRAP;
 473
 474         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 475                 return EXCPT_ABORT;
 476
 477         /* Reserved exceptions will result in fault */
 478         return EXCPT_FAULT;
 479 }
 480
 481 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 482 {
 483         unsigned nr = vcpu->arch.exception.nr;
 484         bool has_payload = vcpu->arch.exception.has_payload;
 485         unsigned long payload = vcpu->arch.exception.payload;
 486
 487         if (!has_payload)
 488                 return;
 489
 490         switch (nr) {
 491         case DB_VECTOR:
 492                 /*
 493                  * "Certain debug exceptions may clear bit 0-3.  The
 494                  * remaining contents of the DR6 register are never
 495                  * cleared by the processor".
 496                  */
 497                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 498                 /*
 499                  * In order to reflect the #DB exception payload in guest
 500                  * dr6, three components need to be considered: active low
 501                  * bit, FIXED_1 bits and active high bits (e.g. DR6_BD,
 502                  * DR6_BS and DR6_BT)
 503                  * DR6_ACTIVE_LOW contains the FIXED_1 and active low bits.
 504                  * In the target guest dr6:
 505                  * FIXED_1 bits should always be set.
 506                  * Active low bits should be cleared if 1-setting in payload.
 507                  * Active high bits should be set if 1-setting in payload.
 508                  *
 509                  * Note, the payload is compatible with the pending debug
 510                  * exceptions/exit qualification under VMX, that active_low bits
 511                  * are active high in payload.
 512                  * So they need to be flipped for DR6.
 513                  */
 514                 vcpu->arch.dr6 |= DR6_ACTIVE_LOW;
 515                 vcpu->arch.dr6 |= payload;
 516                 vcpu->arch.dr6 ^= payload & DR6_ACTIVE_LOW;
 517
 518                 /*
 519                  * The #DB payload is defined as compatible with the 'pending
 520                  * debug exceptions' field under VMX, not DR6. While bit 12 is
 521                  * defined in the 'pending debug exceptions' field (enabled
 522                  * breakpoint), it is reserved and must be zero in DR6.
 523                  */
 524                 vcpu->arch.dr6 &= ~BIT(12);
 525                 break;
 526         case PF_VECTOR:
 527                 vcpu->arch.cr2 = payload;
 528                 break;
 529         }
 530
 531         vcpu->arch.exception.has_payload = false;
 532         vcpu->arch.exception.payload = 0;
 533 }
 534 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 535
 536 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 537                 unsigned nr, bool has_error, u32 error_code,
 538                 bool has_payload, unsigned long payload, bool reinject)
 539 {
 540         u32 prev_nr;
 541         int class1, class2;
 542
 543         kvm_make_request(KVM_REQ_EVENT, vcpu);
 544
 545         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 546         queue:
 547                 if (has_error && !is_protmode(vcpu))
 548                         has_error = false;
 549                 if (reinject) {
 550                         /*
 551                          * On vmentry, vcpu->arch.exception.pending is only
 552                          * true if an event injection was blocked by
 553                          * nested_run_pending.  In that case, however,
 554                          * vcpu_enter_guest requests an immediate exit,
 555                          * and the guest shouldn't proceed far enough to
 556                          * need reinjection.
 557                          */
 558                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 559                         vcpu->arch.exception.injected = true;
 560                         if (WARN_ON_ONCE(has_payload)) {
 561                                 /*
 562                                  * A reinjected event has already
 563                                  * delivered its payload.
 564                                  */
 565                                 has_payload = false;
 566                                 payload = 0;
 567                         }
 568                 } else {
 569                         vcpu->arch.exception.pending = true;
 570                         vcpu->arch.exception.injected = false;
 571                 }
 572                 vcpu->arch.exception.has_error_code = has_error;
 573                 vcpu->arch.exception.nr = nr;
 574                 vcpu->arch.exception.error_code = error_code;
 575                 vcpu->arch.exception.has_payload = has_payload;
 576                 vcpu->arch.exception.payload = payload;
 577                 if (!is_guest_mode(vcpu))
 578                         kvm_deliver_exception_payload(vcpu);
 579                 return;
 580         }
 581
 582         /* to check exception */
 583         prev_nr = vcpu->arch.exception.nr;
 584         if (prev_nr == DF_VECTOR) {
 585                 /* triple fault -> shutdown */
 586                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 587                 return;
 588         }
 589         class1 = exception_class(prev_nr);
 590         class2 = exception_class(nr);
 591         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 592                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 593                 /*
 594                  * Generate double fault per SDM Table 5-5.  Set
 595                  * exception.pending = true so that the double fault
 596                  * can trigger a nested vmexit.
 597                  */
 598                 vcpu->arch.exception.pending = true;
 599                 vcpu->arch.exception.injected = false;
 600                 vcpu->arch.exception.has_error_code = true;
 601                 vcpu->arch.exception.nr = DF_VECTOR;
 602                 vcpu->arch.exception.error_code = 0;
 603                 vcpu->arch.exception.has_payload = false;
 604                 vcpu->arch.exception.payload = 0;
 605         } else
 606                 /* replace previous exception with a new one in a hope
 607                    that instruction re-execution will regenerate lost
 608                    exception */
 609                 goto queue;
 610 }
 611
 612 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 613 {
 614         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 615 }
 616 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 617
 618 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 619 {
 620         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 621 }
 622 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 623
 624 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 625                            unsigned long payload)
 626 {
 627         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 628 }
 629 EXPORT_SYMBOL_GPL(kvm_queue_exception_p);
 630
 631 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 632                                     u32 error_code, unsigned long payload)
 633 {
 634         kvm_multiple_exception(vcpu, nr, true, error_code,
 635                                true, payload, false);
 636 }
 637
 638 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 639 {
 640         if (err)
 641                 kvm_inject_gp(vcpu, 0);
 642         else
 643                 return kvm_skip_emulated_instruction(vcpu);
 644
 645         return 1;
 646 }
 647 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 648
 649 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 650 {
 651         ++vcpu->stat.pf_guest;
 652         vcpu->arch.exception.nested_apf =
 653                 is_guest_mode(vcpu) && fault->async_page_fault;
 654         if (vcpu->arch.exception.nested_apf) {
 655                 vcpu->arch.apf.nested_apf_token = fault->address;
 656                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 657         } else {
 658                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 659                                         fault->address);
 660         }
 661 }
 662 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 663
 664 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
 665                                     struct x86_exception *fault)
 666 {
 667         struct kvm_mmu *fault_mmu;
 668         WARN_ON_ONCE(fault->vector != PF_VECTOR);
 669
 670         fault_mmu = fault->nested_page_fault ? vcpu->arch.mmu :
 671                                                vcpu->arch.walk_mmu;
 672
 673         /*
 674          * Invalidate the TLB entry for the faulting address, if it exists,
 675          * else the access will fault indefinitely (and to emulate hardware).
 676          */
 677         if ((fault->error_code & PFERR_PRESENT_MASK) &&
 678             !(fault->error_code & PFERR_RSVD_MASK))
 679                 kvm_mmu_invalidate_gva(vcpu, fault_mmu, fault->address,
 680                                        fault_mmu->root_hpa);
 681
 682         fault_mmu->inject_page_fault(vcpu, fault);
 683         return fault->nested_page_fault;
 684 }
 685 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault);
 686
 687 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 688 {
 689         atomic_inc(&vcpu->arch.nmi_queued);
 690         kvm_make_request(KVM_REQ_NMI, vcpu);
 691 }
 692 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 693
 694 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 695 {
 696         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 697 }
 698 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 699
 700 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 701 {
 702         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 703 }
 704 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 705
 706 /*
 707  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 708  * a #GP and return false.
 709  */
 710 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 711 {
 712         if (static_call(kvm_x86_get_cpl)(vcpu) <= required_cpl)
 713                 return true;
 714         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 715         return false;
 716 }
 717 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 718
 719 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 720 {
 721         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 722                 return true;
 723
 724         kvm_queue_exception(vcpu, UD_VECTOR);
 725         return false;
 726 }
 727 EXPORT_SYMBOL_GPL(kvm_require_dr);
 728
 729 /*
 730  * This function will be used to read from the physical memory of the currently
 731  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 732  * can read from guest physical or from the guest's guest physical memory.
 733  */
 734 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 735                             gfn_t ngfn, void *data, int offset, int len,
 736                             u32 access)
 737 {
 738         struct x86_exception exception;
 739         gfn_t real_gfn;
 740         gpa_t ngpa;
 741
 742         ngpa     = gfn_to_gpa(ngfn);
 743         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 744         if (real_gfn == UNMAPPED_GVA)
 745                 return -EFAULT;
 746
 747         real_gfn = gpa_to_gfn(real_gfn);
 748
 749         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 750 }
 751 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 752
 753 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 754                                void *data, int offset, int len, u32 access)
 755 {
 756         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 757                                        data, offset, len, access);
 758 }
 759
 760 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
 761 {
 762         return rsvd_bits(cpuid_maxphyaddr(vcpu), 63) | rsvd_bits(5, 8) |
 763                rsvd_bits(1, 2);
 764 }
 765
 766 /*
 767  * Load the pae pdptrs.  Return 1 if they are all valid, 0 otherwise.
 768  */
 769 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 770 {
 771         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 772         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 773         int i;
 774         int ret;
 775         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 776
 777         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 778                                       offset * sizeof(u64), sizeof(pdpte),
 779                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 780         if (ret < 0) {
 781                 ret = 0;
 782                 goto out;
 783         }
 784         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 785                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 786                     (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
 787                         ret = 0;
 788                         goto out;
 789                 }
 790         }
 791         ret = 1;
 792
 793         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 794         kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
 795
 796 out:
 797
 798         return ret;
 799 }
 800 EXPORT_SYMBOL_GPL(load_pdptrs);
 801
 802 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 803 {
 804         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 805         int offset;
 806         gfn_t gfn;
 807         int r;
 808
 809         if (!is_pae_paging(vcpu))
 810                 return false;
 811
 812         if (!kvm_register_is_available(vcpu, VCPU_EXREG_PDPTR))
 813                 return true;
 814
 815         gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
 816         offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
 817         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 818                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 819         if (r < 0)
 820                 return true;
 821
 822         return memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 823 }
 824 EXPORT_SYMBOL_GPL(pdptrs_changed);
 825
 826 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0)
 827 {
 828         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 829
 830         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 831                 kvm_clear_async_pf_completion_queue(vcpu);
 832                 kvm_async_pf_hash_reset(vcpu);
 833         }
 834
 835         if ((cr0 ^ old_cr0) & update_bits)
 836                 kvm_mmu_reset_context(vcpu);
 837
 838         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 839             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 840             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 841                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 842 }
 843 EXPORT_SYMBOL_GPL(kvm_post_set_cr0);
 844
 845 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 846 {
 847         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 848         unsigned long pdptr_bits = X86_CR0_CD | X86_CR0_NW | X86_CR0_PG;
 849
 850         cr0 |= X86_CR0_ET;
 851
 852 #ifdef CONFIG_X86_64
 853         if (cr0 & 0xffffffff00000000UL)
 854                 return 1;
 855 #endif
 856
 857         cr0 &= ~CR0_RESERVED_BITS;
 858
 859         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 860                 return 1;
 861
 862         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 863                 return 1;
 864
 865 #ifdef CONFIG_X86_64
 866         if ((vcpu->arch.efer & EFER_LME) && !is_paging(vcpu) &&
 867             (cr0 & X86_CR0_PG)) {
 868                 int cs_db, cs_l;
 869
 870                 if (!is_pae(vcpu))
 871                         return 1;
 872                 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
 873                 if (cs_l)
 874                         return 1;
 875         }
 876 #endif
 877         if (!(vcpu->arch.efer & EFER_LME) && (cr0 & X86_CR0_PG) &&
 878             is_pae(vcpu) && ((cr0 ^ old_cr0) & pdptr_bits) &&
 879             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu)))
 880                 return 1;
 881
 882         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 883                 return 1;
 884
 885         static_call(kvm_x86_set_cr0)(vcpu, cr0);
 886
 887         kvm_post_set_cr0(vcpu, old_cr0, cr0);
 888
 889         return 0;
 890 }
 891 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 892
 893 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 894 {
 895         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 896 }
 897 EXPORT_SYMBOL_GPL(kvm_lmsw);
 898
 899 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu)
 900 {
 901         if (vcpu->arch.guest_state_protected)
 902                 return;
 903
 904         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 905
 906                 if (vcpu->arch.xcr0 != host_xcr0)
 907                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 908
 909                 if (vcpu->arch.xsaves_enabled &&
 910                     vcpu->arch.ia32_xss != host_xss)
 911                         wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss);
 912         }
 913
 914         if (static_cpu_has(X86_FEATURE_PKU) &&
 915             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 916              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU)) &&
 917             vcpu->arch.pkru != vcpu->arch.host_pkru)
 918                 __write_pkru(vcpu->arch.pkru);
 919 }
 920 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);
 921
 922 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)
 923 {
 924         if (vcpu->arch.guest_state_protected)
 925                 return;
 926
 927         if (static_cpu_has(X86_FEATURE_PKU) &&
 928             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 929              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU))) {
 930                 vcpu->arch.pkru = rdpkru();
 931                 if (vcpu->arch.pkru != vcpu->arch.host_pkru)
 932                         __write_pkru(vcpu->arch.host_pkru);
 933         }
 934
 935         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 936
 937                 if (vcpu->arch.xcr0 != host_xcr0)
 938                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 939
 940                 if (vcpu->arch.xsaves_enabled &&
 941                     vcpu->arch.ia32_xss != host_xss)
 942                         wrmsrl(MSR_IA32_XSS, host_xss);
 943         }
 944
 945 }
 946 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state);
 947
 948 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 949 {
 950         u64 xcr0 = xcr;
 951         u64 old_xcr0 = vcpu->arch.xcr0;
 952         u64 valid_bits;
 953
 954         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 955         if (index != XCR_XFEATURE_ENABLED_MASK)
 956                 return 1;
 957         if (!(xcr0 & XFEATURE_MASK_FP))
 958                 return 1;
 959         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 960                 return 1;
 961
 962         /*
 963          * Do not allow the guest to set bits that we do not support
 964          * saving.  However, xcr0 bit 0 is always set, even if the
 965          * emulated CPU does not support XSAVE (see fx_init).
 966          */
 967         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 968         if (xcr0 & ~valid_bits)
 969                 return 1;
 970
 971         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 972             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 973                 return 1;
 974
 975         if (xcr0 & XFEATURE_MASK_AVX512) {
 976                 if (!(xcr0 & XFEATURE_MASK_YMM))
 977                         return 1;
 978                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 979                         return 1;
 980         }
 981         vcpu->arch.xcr0 = xcr0;
 982
 983         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 984                 kvm_update_cpuid_runtime(vcpu);
 985         return 0;
 986 }
 987
 988 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 989 {
 990         if (static_call(kvm_x86_get_cpl)(vcpu) == 0)
 991                 return __kvm_set_xcr(vcpu, index, xcr);
 992
 993         return 1;
 994 }
 995 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 996
 997 bool kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 998 {
 999         if (cr4 & cr4_reserved_bits)
1000                 return false;
1001
1002         if (cr4 & vcpu->arch.cr4_guest_rsvd_bits)
1003                 return false;
1004
1005         return static_call(kvm_x86_is_valid_cr4)(vcpu, cr4);
1006 }
1007 EXPORT_SYMBOL_GPL(kvm_is_valid_cr4);
1008
1009 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4)
1010 {
1011         unsigned long mmu_role_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
1012                                       X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
1013
1014         if (((cr4 ^ old_cr4) & mmu_role_bits) ||
1015             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
1016                 kvm_mmu_reset_context(vcpu);
1017 }
1018 EXPORT_SYMBOL_GPL(kvm_post_set_cr4);
1019
1020 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1021 {
1022         unsigned long old_cr4 = kvm_read_cr4(vcpu);
1023         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
1024                                    X86_CR4_SMEP;
1025
1026         if (!kvm_is_valid_cr4(vcpu, cr4))
1027                 return 1;
1028
1029         if (is_long_mode(vcpu)) {
1030                 if (!(cr4 & X86_CR4_PAE))
1031                         return 1;
1032                 if ((cr4 ^ old_cr4) & X86_CR4_LA57)
1033                         return 1;
1034         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
1035                    && ((cr4 ^ old_cr4) & pdptr_bits)
1036                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
1037                                    kvm_read_cr3(vcpu)))
1038                 return 1;
1039
1040         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
1041                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
1042                         return 1;
1043
1044                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1045                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
1046                         return 1;
1047         }
1048
1049         static_call(kvm_x86_set_cr4)(vcpu, cr4);
1050
1051         kvm_post_set_cr4(vcpu, old_cr4, cr4);
1052
1053         return 0;
1054 }
1055 EXPORT_SYMBOL_GPL(kvm_set_cr4);
1056
1057 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1058 {
1059         bool skip_tlb_flush = false;
1060 #ifdef CONFIG_X86_64
1061         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
1062
1063         if (pcid_enabled) {
1064                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
1065                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
1066         }
1067 #endif
1068
1069         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
1070                 if (!skip_tlb_flush) {
1071                         kvm_mmu_sync_roots(vcpu);
1072                         kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1073                 }
1074                 return 0;
1075         }
1076
1077         if (is_long_mode(vcpu) &&
1078             (cr3 & vcpu->arch.cr3_lm_rsvd_bits))
1079                 return 1;
1080         else if (is_pae_paging(vcpu) &&
1081                  !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
1082                 return 1;
1083
1084         kvm_mmu_new_pgd(vcpu, cr3, skip_tlb_flush, skip_tlb_flush);
1085         vcpu->arch.cr3 = cr3;
1086         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
1087
1088         return 0;
1089 }
1090 EXPORT_SYMBOL_GPL(kvm_set_cr3);
1091
1092 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
1093 {
1094         if (cr8 & CR8_RESERVED_BITS)
1095                 return 1;
1096         if (lapic_in_kernel(vcpu))
1097                 kvm_lapic_set_tpr(vcpu, cr8);
1098         else
1099                 vcpu->arch.cr8 = cr8;
1100         return 0;
1101 }
1102 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1103
1104 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1105 {
1106         if (lapic_in_kernel(vcpu))
1107                 return kvm_lapic_get_cr8(vcpu);
1108         else
1109                 return vcpu->arch.cr8;
1110 }
1111 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1112
1113 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1114 {
1115         int i;
1116
1117         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1118                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1119                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1120                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
1121         }
1122 }
1123
1124 void kvm_update_dr7(struct kvm_vcpu *vcpu)
1125 {
1126         unsigned long dr7;
1127
1128         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1129                 dr7 = vcpu->arch.guest_debug_dr7;
1130         else
1131                 dr7 = vcpu->arch.dr7;
1132         static_call(kvm_x86_set_dr7)(vcpu, dr7);
1133         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1134         if (dr7 & DR7_BP_EN_MASK)
1135                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1136 }
1137 EXPORT_SYMBOL_GPL(kvm_update_dr7);
1138
1139 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1140 {
1141         u64 fixed = DR6_FIXED_1;
1142
1143         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1144                 fixed |= DR6_RTM;
1145         return fixed;
1146 }
1147
1148 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1149 {
1150         size_t size = ARRAY_SIZE(vcpu->arch.db);
1151
1152         switch (dr) {
1153         case 0 ... 3:
1154                 vcpu->arch.db[array_index_nospec(dr, size)] = val;
1155                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1156                         vcpu->arch.eff_db[dr] = val;
1157                 break;
1158         case 4:
1159         case 6:
1160                 if (!kvm_dr6_valid(val))
1161                         return -1; /* #GP */
1162                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1163                 break;
1164         case 5:
1165         default: /* 7 */
1166                 if (!kvm_dr7_valid(val))
1167                         return -1; /* #GP */
1168                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1169                 kvm_update_dr7(vcpu);
1170                 break;
1171         }
1172
1173         return 0;
1174 }
1175
1176 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1177 {
1178         if (__kvm_set_dr(vcpu, dr, val)) {
1179                 kvm_inject_gp(vcpu, 0);
1180                 return 1;
1181         }
1182         return 0;
1183 }
1184 EXPORT_SYMBOL_GPL(kvm_set_dr);
1185
1186 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1187 {
1188         size_t size = ARRAY_SIZE(vcpu->arch.db);
1189
1190         switch (dr) {
1191         case 0 ... 3:
1192                 *val = vcpu->arch.db[array_index_nospec(dr, size)];
1193                 break;
1194         case 4:
1195         case 6:
1196                 *val = vcpu->arch.dr6;
1197                 break;
1198         case 5:
1199         default: /* 7 */
1200                 *val = vcpu->arch.dr7;
1201                 break;
1202         }
1203         return 0;
1204 }
1205 EXPORT_SYMBOL_GPL(kvm_get_dr);
1206
1207 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
1208 {
1209         u32 ecx = kvm_rcx_read(vcpu);
1210         u64 data;
1211         int err;
1212
1213         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
1214         if (err)
1215                 return err;
1216         kvm_rax_write(vcpu, (u32)data);
1217         kvm_rdx_write(vcpu, data >> 32);
1218         return err;
1219 }
1220 EXPORT_SYMBOL_GPL(kvm_rdpmc);
1221
1222 /*
1223  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1224  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1225  *
1226  * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1227  * extract the supported MSRs from the related const lists.
1228  * msrs_to_save is selected from the msrs_to_save_all to reflect the
1229  * capabilities of the host cpu. This capabilities test skips MSRs that are
1230  * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1231  * may depend on host virtualization features rather than host cpu features.
1232  */
1233
1234 static const u32 msrs_to_save_all[] = {
1235         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1236         MSR_STAR,
1237 #ifdef CONFIG_X86_64
1238         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1239 #endif
1240         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1241         MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1242         MSR_IA32_SPEC_CTRL,
1243         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1244         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1245         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1246         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1247         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1248         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1249         MSR_IA32_UMWAIT_CONTROL,
1250
1251         MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1252         MSR_ARCH_PERFMON_FIXED_CTR0 + 2, MSR_ARCH_PERFMON_FIXED_CTR0 + 3,
1253         MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1254         MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1255         MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1256         MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1257         MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1258         MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1259         MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1260         MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1261         MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1262         MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1263         MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1264         MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1265         MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1266         MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1267         MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1268         MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1269         MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1270         MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1271         MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1272         MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1273 };
1274
1275 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
1276 static unsigned num_msrs_to_save;
1277
1278 static const u32 emulated_msrs_all[] = {
1279         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1280         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1281         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1282         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1283         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1284         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1285         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1286         HV_X64_MSR_RESET,
1287         HV_X64_MSR_VP_INDEX,
1288         HV_X64_MSR_VP_RUNTIME,
1289         HV_X64_MSR_SCONTROL,
1290         HV_X64_MSR_STIMER0_CONFIG,
1291         HV_X64_MSR_VP_ASSIST_PAGE,
1292         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1293         HV_X64_MSR_TSC_EMULATION_STATUS,
1294         HV_X64_MSR_SYNDBG_OPTIONS,
1295         HV_X64_MSR_SYNDBG_CONTROL, HV_X64_MSR_SYNDBG_STATUS,
1296         HV_X64_MSR_SYNDBG_SEND_BUFFER, HV_X64_MSR_SYNDBG_RECV_BUFFER,
1297         HV_X64_MSR_SYNDBG_PENDING_BUFFER,
1298
1299         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1300         MSR_KVM_PV_EOI_EN, MSR_KVM_ASYNC_PF_INT, MSR_KVM_ASYNC_PF_ACK,
1301
1302         MSR_IA32_TSC_ADJUST,
1303         MSR_IA32_TSCDEADLINE,
1304         MSR_IA32_ARCH_CAPABILITIES,
1305         MSR_IA32_PERF_CAPABILITIES,
1306         MSR_IA32_MISC_ENABLE,
1307         MSR_IA32_MCG_STATUS,
1308         MSR_IA32_MCG_CTL,
1309         MSR_IA32_MCG_EXT_CTL,
1310         MSR_IA32_SMBASE,
1311         MSR_SMI_COUNT,
1312         MSR_PLATFORM_INFO,
1313         MSR_MISC_FEATURES_ENABLES,
1314         MSR_AMD64_VIRT_SPEC_CTRL,
1315         MSR_IA32_POWER_CTL,
1316         MSR_IA32_UCODE_REV,
1317
1318         /*
1319          * The following list leaves out MSRs whose values are determined
1320          * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1321          * We always support the "true" VMX control MSRs, even if the host
1322          * processor does not, so I am putting these registers here rather
1323          * than in msrs_to_save_all.
1324          */
1325         MSR_IA32_VMX_BASIC,
1326         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1327         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1328         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1329         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1330         MSR_IA32_VMX_MISC,
1331         MSR_IA32_VMX_CR0_FIXED0,
1332         MSR_IA32_VMX_CR4_FIXED0,
1333         MSR_IA32_VMX_VMCS_ENUM,
1334         MSR_IA32_VMX_PROCBASED_CTLS2,
1335         MSR_IA32_VMX_EPT_VPID_CAP,
1336         MSR_IA32_VMX_VMFUNC,
1337
1338         MSR_K7_HWCR,
1339         MSR_KVM_POLL_CONTROL,
1340 };
1341
1342 static u32 emulated_msrs[ARRAY_SIZE(emulated_msrs_all)];
1343 static unsigned num_emulated_msrs;
1344
1345 /*
1346  * List of msr numbers which are used to expose MSR-based features that
1347  * can be used by a hypervisor to validate requested CPU features.
1348  */
1349 static const u32 msr_based_features_all[] = {
1350         MSR_IA32_VMX_BASIC,
1351         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1352         MSR_IA32_VMX_PINBASED_CTLS,
1353         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1354         MSR_IA32_VMX_PROCBASED_CTLS,
1355         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1356         MSR_IA32_VMX_EXIT_CTLS,
1357         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1358         MSR_IA32_VMX_ENTRY_CTLS,
1359         MSR_IA32_VMX_MISC,
1360         MSR_IA32_VMX_CR0_FIXED0,
1361         MSR_IA32_VMX_CR0_FIXED1,
1362         MSR_IA32_VMX_CR4_FIXED0,
1363         MSR_IA32_VMX_CR4_FIXED1,
1364         MSR_IA32_VMX_VMCS_ENUM,
1365         MSR_IA32_VMX_PROCBASED_CTLS2,
1366         MSR_IA32_VMX_EPT_VPID_CAP,
1367         MSR_IA32_VMX_VMFUNC,
1368
1369         MSR_F10H_DECFG,
1370         MSR_IA32_UCODE_REV,
1371         MSR_IA32_ARCH_CAPABILITIES,
1372         MSR_IA32_PERF_CAPABILITIES,
1373 };
1374
1375 static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all)];
1376 static unsigned int num_msr_based_features;
1377
1378 static u64 kvm_get_arch_capabilities(void)
1379 {
1380         u64 data = 0;
1381
1382         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1383                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1384
1385         /*
1386          * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1387          * the nested hypervisor runs with NX huge pages.  If it is not,
1388          * L1 is anyway vulnerable to ITLB_MULTIHIT explots from other
1389          * L1 guests, so it need not worry about its own (L2) guests.
1390          */
1391         data |= ARCH_CAP_PSCHANGE_MC_NO;
1392
1393         /*
1394          * If we're doing cache flushes (either "always" or "cond")
1395          * we will do one whenever the guest does a vmlaunch/vmresume.
1396          * If an outer hypervisor is doing the cache flush for us
1397          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1398          * capability to the guest too, and if EPT is disabled we're not
1399          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1400          * require a nested hypervisor to do a flush of its own.
1401          */
1402         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1403                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1404
1405         if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1406                 data |= ARCH_CAP_RDCL_NO;
1407         if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1408                 data |= ARCH_CAP_SSB_NO;
1409         if (!boot_cpu_has_bug(X86_BUG_MDS))
1410                 data |= ARCH_CAP_MDS_NO;
1411
1412         if (!boot_cpu_has(X86_FEATURE_RTM)) {
1413                 /*
1414                  * If RTM=0 because the kernel has disabled TSX, the host might
1415                  * have TAA_NO or TSX_CTRL.  Clear TAA_NO (the guest sees RTM=0
1416                  * and therefore knows that there cannot be TAA) but keep
1417                  * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1418                  * and we want to allow migrating those guests to tsx=off hosts.
1419                  */
1420                 data &= ~ARCH_CAP_TAA_NO;
1421         } else if (!boot_cpu_has_bug(X86_BUG_TAA)) {
1422                 data |= ARCH_CAP_TAA_NO;
1423         } else {
1424                 /*
1425                  * Nothing to do here; we emulate TSX_CTRL if present on the
1426                  * host so the guest can choose between disabling TSX or
1427                  * using VERW to clear CPU buffers.
1428                  */
1429         }
1430
1431         return data;
1432 }
1433
1434 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1435 {
1436         switch (msr->index) {
1437         case MSR_IA32_ARCH_CAPABILITIES:
1438                 msr->data = kvm_get_arch_capabilities();
1439                 break;
1440         case MSR_IA32_UCODE_REV:
1441                 rdmsrl_safe(msr->index, &msr->data);
1442                 break;
1443         default:
1444                 return static_call(kvm_x86_get_msr_feature)(msr);
1445         }
1446         return 0;
1447 }
1448
1449 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1450 {
1451         struct kvm_msr_entry msr;
1452         int r;
1453
1454         msr.index = index;
1455         r = kvm_get_msr_feature(&msr);
1456
1457         if (r == KVM_MSR_RET_INVALID) {
1458                 /* Unconditionally clear the output for simplicity */
1459                 *data = 0;
1460                 if (kvm_msr_ignored_check(vcpu, index, 0, false))
1461                         r = 0;
1462         }
1463
1464         if (r)
1465                 return r;
1466
1467         *data = msr.data;
1468
1469         return 0;
1470 }
1471
1472 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1473 {
1474         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1475                 return false;
1476
1477         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1478                 return false;
1479
1480         if (efer & (EFER_LME | EFER_LMA) &&
1481             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1482                 return false;
1483
1484         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1485                 return false;
1486
1487         return true;
1488
1489 }
1490 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1491 {
1492         if (efer & efer_reserved_bits)
1493                 return false;
1494
1495         return __kvm_valid_efer(vcpu, efer);
1496 }
1497 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1498
1499 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1500 {
1501         u64 old_efer = vcpu->arch.efer;
1502         u64 efer = msr_info->data;
1503         int r;
1504
1505         if (efer & efer_reserved_bits)
1506                 return 1;
1507
1508         if (!msr_info->host_initiated) {
1509                 if (!__kvm_valid_efer(vcpu, efer))
1510                         return 1;
1511
1512                 if (is_paging(vcpu) &&
1513                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1514                         return 1;
1515         }
1516
1517         efer &= ~EFER_LMA;
1518         efer |= vcpu->arch.efer & EFER_LMA;
1519
1520         r = static_call(kvm_x86_set_efer)(vcpu, efer);
1521         if (r) {
1522                 WARN_ON(r > 0);
1523                 return r;
1524         }
1525
1526         /* Update reserved bits */
1527         if ((efer ^ old_efer) & EFER_NX)
1528                 kvm_mmu_reset_context(vcpu);
1529
1530         return 0;
1531 }
1532
1533 void kvm_enable_efer_bits(u64 mask)
1534 {
1535        efer_reserved_bits &= ~mask;
1536 }
1537 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1538
1539 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type)
1540 {
1541         struct kvm *kvm = vcpu->kvm;
1542         struct msr_bitmap_range *ranges = kvm->arch.msr_filter.ranges;
1543         u32 count = kvm->arch.msr_filter.count;
1544         u32 i;
1545         bool r = kvm->arch.msr_filter.default_allow;
1546         int idx;
1547
1548         /* MSR filtering not set up or x2APIC enabled, allow everything */
1549         if (!count || (index >= 0x800 && index <= 0x8ff))
1550                 return true;
1551
1552         /* Prevent collision with set_msr_filter */
1553         idx = srcu_read_lock(&kvm->srcu);
1554
1555         for (i = 0; i < count; i++) {
1556                 u32 start = ranges[i].base;
1557                 u32 end = start + ranges[i].nmsrs;
1558                 u32 flags = ranges[i].flags;
1559                 unsigned long *bitmap = ranges[i].bitmap;
1560
1561                 if ((index >= start) && (index < end) && (flags & type)) {
1562                         r = !!test_bit(index - start, bitmap);
1563                         break;
1564                 }
1565         }
1566
1567         srcu_read_unlock(&kvm->srcu, idx);
1568
1569         return r;
1570 }
1571 EXPORT_SYMBOL_GPL(kvm_msr_allowed);
1572
1573 /*
1574  * Write @data into the MSR specified by @index.  Select MSR specific fault
1575  * checks are bypassed if @host_initiated is %true.
1576  * Returns 0 on success, non-0 otherwise.
1577  * Assumes vcpu_load() was already called.
1578  */
1579 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1580                          bool host_initiated)
1581 {
1582         struct msr_data msr;
1583
1584         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_WRITE))
1585                 return KVM_MSR_RET_FILTERED;
1586
1587         switch (index) {
1588         case MSR_FS_BASE:
1589         case MSR_GS_BASE:
1590         case MSR_KERNEL_GS_BASE:
1591         case MSR_CSTAR:
1592         case MSR_LSTAR:
1593                 if (is_noncanonical_address(data, vcpu))
1594                         return 1;
1595                 break;
1596         case MSR_IA32_SYSENTER_EIP:
1597         case MSR_IA32_SYSENTER_ESP:
1598                 /*
1599                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1600                  * non-canonical address is written on Intel but not on
1601                  * AMD (which ignores the top 32-bits, because it does
1602                  * not implement 64-bit SYSENTER).
1603                  *
1604                  * 64-bit code should hence be able to write a non-canonical
1605                  * value on AMD.  Making the address canonical ensures that
1606                  * vmentry does not fail on Intel after writing a non-canonical
1607                  * value, and that something deterministic happens if the guest
1608                  * invokes 64-bit SYSENTER.
1609                  */
1610                 data = get_canonical(data, vcpu_virt_addr_bits(vcpu));
1611         }
1612
1613         msr.data = data;
1614         msr.index = index;
1615         msr.host_initiated = host_initiated;
1616
1617         return static_call(kvm_x86_set_msr)(vcpu, &msr);
1618 }
1619
1620 static int kvm_set_msr_ignored_check(struct kvm_vcpu *vcpu,
1621                                      u32 index, u64 data, bool host_initiated)
1622 {
1623         int ret = __kvm_set_msr(vcpu, index, data, host_initiated);
1624
1625         if (ret == KVM_MSR_RET_INVALID)
1626                 if (kvm_msr_ignored_check(vcpu, index, data, true))
1627                         ret = 0;
1628
1629         return ret;
1630 }
1631
1632 /*
1633  * Read the MSR specified by @index into @data.  Select MSR specific fault
1634  * checks are bypassed if @host_initiated is %true.
1635  * Returns 0 on success, non-0 otherwise.
1636  * Assumes vcpu_load() was already called.
1637  */
1638 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1639                   bool host_initiated)
1640 {
1641         struct msr_data msr;
1642         int ret;
1643
1644         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_READ))
1645                 return KVM_MSR_RET_FILTERED;
1646
1647         msr.index = index;
1648         msr.host_initiated = host_initiated;
1649
1650         ret = static_call(kvm_x86_get_msr)(vcpu, &msr);
1651         if (!ret)
1652                 *data = msr.data;
1653         return ret;
1654 }
1655
1656 static int kvm_get_msr_ignored_check(struct kvm_vcpu *vcpu,
1657                                      u32 index, u64 *data, bool host_initiated)
1658 {
1659         int ret = __kvm_get_msr(vcpu, index, data, host_initiated);
1660
1661         if (ret == KVM_MSR_RET_INVALID) {
1662                 /* Unconditionally clear *data for simplicity */
1663                 *data = 0;
1664                 if (kvm_msr_ignored_check(vcpu, index, 0, false))
1665                         ret = 0;
1666         }
1667
1668         return ret;
1669 }
1670
1671 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1672 {
1673         return kvm_get_msr_ignored_check(vcpu, index, data, false);
1674 }
1675 EXPORT_SYMBOL_GPL(kvm_get_msr);
1676
1677 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1678 {
1679         return kvm_set_msr_ignored_check(vcpu, index, data, false);
1680 }
1681 EXPORT_SYMBOL_GPL(kvm_set_msr);
1682
1683 static int complete_emulated_rdmsr(struct kvm_vcpu *vcpu)
1684 {
1685         int err = vcpu->run->msr.error;
1686         if (!err) {
1687                 kvm_rax_write(vcpu, (u32)vcpu->run->msr.data);
1688                 kvm_rdx_write(vcpu, vcpu->run->msr.data >> 32);
1689         }
1690
1691         return static_call(kvm_x86_complete_emulated_msr)(vcpu, err);
1692 }
1693
1694 static int complete_emulated_wrmsr(struct kvm_vcpu *vcpu)
1695 {
1696         return static_call(kvm_x86_complete_emulated_msr)(vcpu, vcpu->run->msr.error);
1697 }
1698
1699 static u64 kvm_msr_reason(int r)
1700 {
1701         switch (r) {
1702         case KVM_MSR_RET_INVALID:
1703                 return KVM_MSR_EXIT_REASON_UNKNOWN;
1704         case KVM_MSR_RET_FILTERED:
1705                 return KVM_MSR_EXIT_REASON_FILTER;
1706         default:
1707                 return KVM_MSR_EXIT_REASON_INVAL;
1708         }
1709 }
1710
1711 static int kvm_msr_user_space(struct kvm_vcpu *vcpu, u32 index,
1712                               u32 exit_reason, u64 data,
1713                               int (*completion)(struct kvm_vcpu *vcpu),
1714                               int r)
1715 {
1716         u64 msr_reason = kvm_msr_reason(r);
1717
1718         /* Check if the user wanted to know about this MSR fault */
1719         if (!(vcpu->kvm->arch.user_space_msr_mask & msr_reason))
1720                 return 0;
1721
1722         vcpu->run->exit_reason = exit_reason;
1723         vcpu->run->msr.error = 0;
1724         memset(vcpu->run->msr.pad, 0, sizeof(vcpu->run->msr.pad));
1725         vcpu->run->msr.reason = msr_reason;
1726         vcpu->run->msr.index = index;
1727         vcpu->run->msr.data = data;
1728         vcpu->arch.complete_userspace_io = completion;
1729
1730         return 1;
1731 }
1732
1733 static int kvm_get_msr_user_space(struct kvm_vcpu *vcpu, u32 index, int r)
1734 {
1735         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_RDMSR, 0,
1736                                    complete_emulated_rdmsr, r);
1737 }
1738
1739 static int kvm_set_msr_user_space(struct kvm_vcpu *vcpu, u32 index, u64 data, int r)
1740 {
1741         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_WRMSR, data,
1742                                    complete_emulated_wrmsr, r);
1743 }
1744
1745 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1746 {
1747         u32 ecx = kvm_rcx_read(vcpu);
1748         u64 data;
1749         int r;
1750
1751         r = kvm_get_msr(vcpu, ecx, &data);
1752
1753         /* MSR read failed? See if we should ask user space */
1754         if (r && kvm_get_msr_user_space(vcpu, ecx, r)) {
1755                 /* Bounce to user space */
1756                 return 0;
1757         }
1758
1759         if (!r) {
1760                 trace_kvm_msr_read(ecx, data);
1761
1762                 kvm_rax_write(vcpu, data & -1u);
1763                 kvm_rdx_write(vcpu, (data >> 32) & -1u);
1764         } else {
1765                 trace_kvm_msr_read_ex(ecx);
1766         }
1767
1768         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1769 }
1770 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
1771
1772 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
1773 {
1774         u32 ecx = kvm_rcx_read(vcpu);
1775         u64 data = kvm_read_edx_eax(vcpu);
1776         int r;
1777
1778         r = kvm_set_msr(vcpu, ecx, data);
1779
1780         /* MSR write failed? See if we should ask user space */
1781         if (r && kvm_set_msr_user_space(vcpu, ecx, data, r))
1782                 /* Bounce to user space */
1783                 return 0;
1784
1785         /* Signal all other negative errors to userspace */
1786         if (r < 0)
1787                 return r;
1788
1789         if (!r)
1790                 trace_kvm_msr_write(ecx, data);
1791         else
1792                 trace_kvm_msr_write_ex(ecx, data);
1793
1794         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1795 }
1796 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
1797
1798 static inline bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu)
1799 {
1800         return vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu) ||
1801                 xfer_to_guest_mode_work_pending();
1802 }
1803
1804 /*
1805  * The fast path for frequent and performance sensitive wrmsr emulation,
1806  * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
1807  * the latency of virtual IPI by avoiding the expensive bits of transitioning
1808  * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
1809  * other cases which must be called after interrupts are enabled on the host.
1810  */
1811 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data)
1812 {
1813         if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(vcpu->arch.apic))
1814                 return 1;
1815
1816         if (((data & APIC_SHORT_MASK) == APIC_DEST_NOSHORT) &&
1817                 ((data & APIC_DEST_MASK) == APIC_DEST_PHYSICAL) &&
1818                 ((data & APIC_MODE_MASK) == APIC_DM_FIXED) &&
1819                 ((u32)(data >> 32) != X2APIC_BROADCAST)) {
1820
1821                 data &= ~(1 << 12);
1822                 kvm_apic_send_ipi(vcpu->arch.apic, (u32)data, (u32)(data >> 32));
1823                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR2, (u32)(data >> 32));
1824                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR, (u32)data);
1825                 trace_kvm_apic_write(APIC_ICR, (u32)data);
1826                 return 0;
1827         }
1828
1829         return 1;
1830 }
1831
1832 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu *vcpu, u64 data)
1833 {
1834         if (!kvm_can_use_hv_timer(vcpu))
1835                 return 1;
1836
1837         kvm_set_lapic_tscdeadline_msr(vcpu, data);
1838         return 0;
1839 }
1840
1841 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
1842 {
1843         u32 msr = kvm_rcx_read(vcpu);
1844         u64 data;
1845         fastpath_t ret = EXIT_FASTPATH_NONE;
1846
1847         switch (msr) {
1848         case APIC_BASE_MSR + (APIC_ICR >> 4):
1849                 data = kvm_read_edx_eax(vcpu);
1850                 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu, data)) {
1851                         kvm_skip_emulated_instruction(vcpu);
1852                         ret = EXIT_FASTPATH_EXIT_HANDLED;
1853                 }
1854                 break;
1855         case MSR_IA32_TSCDEADLINE:
1856                 data = kvm_read_edx_eax(vcpu);
1857                 if (!handle_fastpath_set_tscdeadline(vcpu, data)) {
1858                         kvm_skip_emulated_instruction(vcpu);
1859                         ret = EXIT_FASTPATH_REENTER_GUEST;
1860                 }
1861                 break;
1862         default:
1863                 break;
1864         }
1865
1866         if (ret != EXIT_FASTPATH_NONE)
1867                 trace_kvm_msr_write(msr, data);
1868
1869         return ret;
1870 }
1871 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff);
1872
1873 /*
1874  * Adapt set_msr() to msr_io()'s calling convention
1875  */
1876 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1877 {
1878         return kvm_get_msr_ignored_check(vcpu, index, data, true);
1879 }
1880
1881 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1882 {
1883         return kvm_set_msr_ignored_check(vcpu, index, *data, true);
1884 }
1885
1886 #ifdef CONFIG_X86_64
1887 struct pvclock_clock {
1888         int vclock_mode;
1889         u64 cycle_last;
1890         u64 mask;
1891         u32 mult;
1892         u32 shift;
1893         u64 base_cycles;
1894         u64 offset;
1895 };
1896
1897 struct pvclock_gtod_data {
1898         seqcount_t      seq;
1899
1900         struct pvclock_clock clock; /* extract of a clocksource struct */
1901         struct pvclock_clock raw_clock; /* extract of a clocksource struct */
1902
1903         ktime_t         offs_boot;
1904         u64             wall_time_sec;
1905 };
1906
1907 static struct pvclock_gtod_data pvclock_gtod_data;
1908
1909 static void update_pvclock_gtod(struct timekeeper *tk)
1910 {
1911         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1912
1913         write_seqcount_begin(&vdata->seq);
1914
1915         /* copy pvclock gtod data */
1916         vdata->clock.vclock_mode        = tk->tkr_mono.clock->vdso_clock_mode;
1917         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1918         vdata->clock.mask               = tk->tkr_mono.mask;
1919         vdata->clock.mult               = tk->tkr_mono.mult;
1920         vdata->clock.shift              = tk->tkr_mono.shift;
1921         vdata->clock.base_cycles        = tk->tkr_mono.xtime_nsec;
1922         vdata->clock.offset             = tk->tkr_mono.base;
1923
1924         vdata->raw_clock.vclock_mode    = tk->tkr_raw.clock->vdso_clock_mode;
1925         vdata->raw_clock.cycle_last     = tk->tkr_raw.cycle_last;
1926         vdata->raw_clock.mask           = tk->tkr_raw.mask;
1927         vdata->raw_clock.mult           = tk->tkr_raw.mult;
1928         vdata->raw_clock.shift          = tk->tkr_raw.shift;
1929         vdata->raw_clock.base_cycles    = tk->tkr_raw.xtime_nsec;
1930         vdata->raw_clock.offset         = tk->tkr_raw.base;
1931
1932         vdata->wall_time_sec            = tk->xtime_sec;
1933
1934         vdata->offs_boot                = tk->offs_boot;
1935
1936         write_seqcount_end(&vdata->seq);
1937 }
1938
1939 static s64 get_kvmclock_base_ns(void)
1940 {
1941         /* Count up from boot time, but with the frequency of the raw clock.  */
1942         return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data.offs_boot));
1943 }
1944 #else
1945 static s64 get_kvmclock_base_ns(void)
1946 {
1947         /* Master clock not used, so we can just use CLOCK_BOOTTIME.  */
1948         return ktime_get_boottime_ns();
1949 }
1950 #endif
1951
1952 void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock, int sec_hi_ofs)
1953 {
1954         int version;
1955         int r;
1956         struct pvclock_wall_clock wc;
1957         u32 wc_sec_hi;
1958         u64 wall_nsec;
1959
1960         if (!wall_clock)
1961                 return;
1962
1963         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1964         if (r)
1965                 return;
1966
1967         if (version & 1)
1968                 ++version;  /* first time write, random junk */
1969
1970         ++version;
1971
1972         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1973                 return;
1974
1975         /*
1976          * The guest calculates current wall clock time by adding
1977          * system time (updated by kvm_guest_time_update below) to the
1978          * wall clock specified here.  We do the reverse here.
1979          */
1980         wall_nsec = ktime_get_real_ns() - get_kvmclock_ns(kvm);
1981
1982         wc.nsec = do_div(wall_nsec, 1000000000);
1983         wc.sec = (u32)wall_nsec; /* overflow in 2106 guest time */
1984         wc.version = version;
1985
1986         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1987
1988         if (sec_hi_ofs) {
1989                 wc_sec_hi = wall_nsec >> 32;
1990                 kvm_write_guest(kvm, wall_clock + sec_hi_ofs,
1991                                 &wc_sec_hi, sizeof(wc_sec_hi));
1992         }
1993
1994         version++;
1995         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1996 }
1997
1998 static void kvm_write_system_time(struct kvm_vcpu *vcpu, gpa_t system_time,
1999                                   bool old_msr, bool host_initiated)
2000 {
2001         struct kvm_arch *ka = &vcpu->kvm->arch;
2002
2003         if (vcpu->vcpu_id == 0 && !host_initiated) {
2004                 if (ka->boot_vcpu_runs_old_kvmclock != old_msr)
2005                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2006
2007                 ka->boot_vcpu_runs_old_kvmclock = old_msr;
2008         }
2009
2010         vcpu->arch.time = system_time;
2011         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2012
2013         /* we verify if the enable bit is set... */
2014         vcpu->arch.pv_time_enabled = false;
2015         if (!(system_time & 1))
2016                 return;
2017
2018         if (!kvm_gfn_to_hva_cache_init(vcpu->kvm,
2019                                        &vcpu->arch.pv_time, system_time & ~1ULL,
2020                                        sizeof(struct pvclock_vcpu_time_info)))
2021                 vcpu->arch.pv_time_enabled = true;
2022
2023         return;
2024 }
2025
2026 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
2027 {
2028         do_shl32_div32(dividend, divisor);
2029         return dividend;
2030 }
2031
2032 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
2033                                s8 *pshift, u32 *pmultiplier)
2034 {
2035         uint64_t scaled64;
2036         int32_t  shift = 0;
2037         uint64_t tps64;
2038         uint32_t tps32;
2039
2040         tps64 = base_hz;
2041         scaled64 = scaled_hz;
2042         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
2043                 tps64 >>= 1;
2044                 shift--;
2045         }
2046
2047         tps32 = (uint32_t)tps64;
2048         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
2049                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
2050                         scaled64 >>= 1;
2051                 else
2052                         tps32 <<= 1;
2053                 shift++;
2054         }
2055
2056         *pshift = shift;
2057         *pmultiplier = div_frac(scaled64, tps32);
2058 }
2059
2060 #ifdef CONFIG_X86_64
2061 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
2062 #endif
2063
2064 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
2065 static unsigned long max_tsc_khz;
2066
2067 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
2068 {
2069         u64 v = (u64)khz * (1000000 + ppm);
2070         do_div(v, 1000000);
2071         return v;
2072 }
2073
2074 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
2075 {
2076         u64 ratio;
2077
2078         /* Guest TSC same frequency as host TSC? */
2079         if (!scale) {
2080                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
2081                 return 0;
2082         }
2083
2084         /* TSC scaling supported? */
2085         if (!kvm_has_tsc_control) {
2086                 if (user_tsc_khz > tsc_khz) {
2087                         vcpu->arch.tsc_catchup = 1;
2088                         vcpu->arch.tsc_always_catchup = 1;
2089                         return 0;
2090                 } else {
2091                         pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2092                         return -1;
2093                 }
2094         }
2095
2096         /* TSC scaling required  - calculate ratio */
2097         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
2098                                 user_tsc_khz, tsc_khz);
2099
2100         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
2101                 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2102                                     user_tsc_khz);
2103                 return -1;
2104         }
2105
2106         vcpu->arch.tsc_scaling_ratio = ratio;
2107         return 0;
2108 }
2109
2110 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
2111 {
2112         u32 thresh_lo, thresh_hi;
2113         int use_scaling = 0;
2114
2115         /* tsc_khz can be zero if TSC calibration fails */
2116         if (user_tsc_khz == 0) {
2117                 /* set tsc_scaling_ratio to a safe value */
2118                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
2119                 return -1;
2120         }
2121
2122         /* Compute a scale to convert nanoseconds in TSC cycles */
2123         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
2124                            &vcpu->arch.virtual_tsc_shift,
2125                            &vcpu->arch.virtual_tsc_mult);
2126         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
2127
2128         /*
2129          * Compute the variation in TSC rate which is acceptable
2130          * within the range of tolerance and decide if the
2131          * rate being applied is within that bounds of the hardware
2132          * rate.  If so, no scaling or compensation need be done.
2133          */
2134         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
2135         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
2136         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
2137                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
2138                 use_scaling = 1;
2139         }
2140         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
2141 }
2142
2143 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
2144 {
2145         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
2146                                       vcpu->arch.virtual_tsc_mult,
2147                                       vcpu->arch.virtual_tsc_shift);
2148         tsc += vcpu->arch.this_tsc_write;
2149         return tsc;
2150 }
2151
2152 static inline int gtod_is_based_on_tsc(int mode)
2153 {
2154         return mode == VDSO_CLOCKMODE_TSC || mode == VDSO_CLOCKMODE_HVCLOCK;
2155 }
2156
2157 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
2158 {
2159 #ifdef CONFIG_X86_64
2160         bool vcpus_matched;
2161         struct kvm_arch *ka = &vcpu->kvm->arch;
2162         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2163
2164         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2165                          atomic_read(&vcpu->kvm->online_vcpus));
2166
2167         /*
2168          * Once the masterclock is enabled, always perform request in
2169          * order to update it.
2170          *
2171          * In order to enable masterclock, the host clocksource must be TSC
2172          * and the vcpus need to have matched TSCs.  When that happens,
2173          * perform request to enable masterclock.
2174          */
2175         if (ka->use_master_clock ||
2176             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
2177                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2178
2179         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
2180                             atomic_read(&vcpu->kvm->online_vcpus),
2181                             ka->use_master_clock, gtod->clock.vclock_mode);
2182 #endif
2183 }
2184
2185 /*
2186  * Multiply tsc by a fixed point number represented by ratio.
2187  *
2188  * The most significant 64-N bits (mult) of ratio represent the
2189  * integral part of the fixed point number; the remaining N bits
2190  * (frac) represent the fractional part, ie. ratio represents a fixed
2191  * point number (mult + frac * 2^(-N)).
2192  *
2193  * N equals to kvm_tsc_scaling_ratio_frac_bits.
2194  */
2195 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
2196 {
2197         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
2198 }
2199
2200 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
2201 {
2202         u64 _tsc = tsc;
2203         u64 ratio = vcpu->arch.tsc_scaling_ratio;
2204
2205         if (ratio != kvm_default_tsc_scaling_ratio)
2206                 _tsc = __scale_tsc(ratio, tsc);
2207
2208         return _tsc;
2209 }
2210 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
2211
2212 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
2213 {
2214         u64 tsc;
2215
2216         tsc = kvm_scale_tsc(vcpu, rdtsc());
2217
2218         return target_tsc - tsc;
2219 }
2220
2221 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
2222 {
2223         return vcpu->arch.l1_tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
2224 }
2225 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
2226
2227 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
2228 {
2229         vcpu->arch.l1_tsc_offset = offset;
2230         vcpu->arch.tsc_offset = static_call(kvm_x86_write_l1_tsc_offset)(vcpu, offset);
2231 }
2232
2233 static inline bool kvm_check_tsc_unstable(void)
2234 {
2235 #ifdef CONFIG_X86_64
2236         /*
2237          * TSC is marked unstable when we're running on Hyper-V,
2238          * 'TSC page' clocksource is good.
2239          */
2240         if (pvclock_gtod_data.clock.vclock_mode == VDSO_CLOCKMODE_HVCLOCK)
2241                 return false;
2242 #endif
2243         return check_tsc_unstable();
2244 }
2245
2246 static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 data)
2247 {
2248         struct kvm *kvm = vcpu->kvm;
2249         u64 offset, ns, elapsed;
2250         unsigned long flags;
2251         bool matched;
2252         bool already_matched;
2253         bool synchronizing = false;
2254
2255         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
2256         offset = kvm_compute_tsc_offset(vcpu, data);
2257         ns = get_kvmclock_base_ns();
2258         elapsed = ns - kvm->arch.last_tsc_nsec;
2259
2260         if (vcpu->arch.virtual_tsc_khz) {
2261                 if (data == 0) {
2262                         /*
2263                          * detection of vcpu initialization -- need to sync
2264                          * with other vCPUs. This particularly helps to keep
2265                          * kvm_clock stable after CPU hotplug
2266                          */
2267                         synchronizing = true;
2268                 } else {
2269                         u64 tsc_exp = kvm->arch.last_tsc_write +
2270                                                 nsec_to_cycles(vcpu, elapsed);
2271                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
2272                         /*
2273                          * Special case: TSC write with a small delta (1 second)
2274                          * of virtual cycle time against real time is
2275                          * interpreted as an attempt to synchronize the CPU.
2276                          */
2277                         synchronizing = data < tsc_exp + tsc_hz &&
2278                                         data + tsc_hz > tsc_exp;
2279                 }
2280         }
2281
2282         /*
2283          * For a reliable TSC, we can match TSC offsets, and for an unstable
2284          * TSC, we add elapsed time in this computation.  We could let the
2285          * compensation code attempt to catch up if we fall behind, but
2286          * it's better to try to match offsets from the beginning.
2287          */
2288         if (synchronizing &&
2289             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
2290                 if (!kvm_check_tsc_unstable()) {
2291                         offset = kvm->arch.cur_tsc_offset;
2292                 } else {
2293                         u64 delta = nsec_to_cycles(vcpu, elapsed);
2294                         data += delta;
2295                         offset = kvm_compute_tsc_offset(vcpu, data);
2296                 }
2297                 matched = true;
2298                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
2299         } else {
2300                 /*
2301                  * We split periods of matched TSC writes into generations.
2302                  * For each generation, we track the original measured
2303                  * nanosecond time, offset, and write, so if TSCs are in
2304                  * sync, we can match exact offset, and if not, we can match
2305                  * exact software computation in compute_guest_tsc()
2306                  *
2307                  * These values are tracked in kvm->arch.cur_xxx variables.
2308                  */
2309                 kvm->arch.cur_tsc_generation++;
2310                 kvm->arch.cur_tsc_nsec = ns;
2311                 kvm->arch.cur_tsc_write = data;
2312                 kvm->arch.cur_tsc_offset = offset;
2313                 matched = false;
2314         }
2315
2316         /*
2317          * We also track th most recent recorded KHZ, write and time to
2318          * allow the matching interval to be extended at each write.
2319          */
2320         kvm->arch.last_tsc_nsec = ns;
2321         kvm->arch.last_tsc_write = data;
2322         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
2323
2324         vcpu->arch.last_guest_tsc = data;
2325
2326         /* Keep track of which generation this VCPU has synchronized to */
2327         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
2328         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
2329         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
2330
2331         kvm_vcpu_write_tsc_offset(vcpu, offset);
2332         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
2333
2334         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
2335         if (!matched) {
2336                 kvm->arch.nr_vcpus_matched_tsc = 0;
2337         } else if (!already_matched) {
2338                 kvm->arch.nr_vcpus_matched_tsc++;
2339         }
2340
2341         kvm_track_tsc_matching(vcpu);
2342         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
2343 }
2344
2345 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
2346                                            s64 adjustment)
2347 {
2348         u64 tsc_offset = vcpu->arch.l1_tsc_offset;
2349         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
2350 }
2351
2352 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
2353 {
2354         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
2355                 WARN_ON(adjustment < 0);
2356         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
2357         adjust_tsc_offset_guest(vcpu, adjustment);
2358 }
2359
2360 #ifdef CONFIG_X86_64
2361
2362 static u64 read_tsc(void)
2363 {
2364         u64 ret = (u64)rdtsc_ordered();
2365         u64 last = pvclock_gtod_data.clock.cycle_last;
2366
2367         if (likely(ret >= last))
2368                 return ret;
2369
2370         /*
2371          * GCC likes to generate cmov here, but this branch is extremely
2372          * predictable (it's just a function of time and the likely is
2373          * very likely) and there's a data dependence, so force GCC
2374          * to generate a branch instead.  I don't barrier() because
2375          * we don't actually need a barrier, and if this function
2376          * ever gets inlined it will generate worse code.
2377          */
2378         asm volatile ("");
2379         return last;
2380 }
2381
2382 static inline u64 vgettsc(struct pvclock_clock *clock, u64 *tsc_timestamp,
2383                           int *mode)
2384 {
2385         long v;
2386         u64 tsc_pg_val;
2387
2388         switch (clock->vclock_mode) {
2389         case VDSO_CLOCKMODE_HVCLOCK:
2390                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2391                                                   tsc_timestamp);
2392                 if (tsc_pg_val != U64_MAX) {
2393                         /* TSC page valid */
2394                         *mode = VDSO_CLOCKMODE_HVCLOCK;
2395                         v = (tsc_pg_val - clock->cycle_last) &
2396                                 clock->mask;
2397                 } else {
2398                         /* TSC page invalid */
2399                         *mode = VDSO_CLOCKMODE_NONE;
2400                 }
2401                 break;
2402         case VDSO_CLOCKMODE_TSC:
2403                 *mode = VDSO_CLOCKMODE_TSC;
2404                 *tsc_timestamp = read_tsc();
2405                 v = (*tsc_timestamp - clock->cycle_last) &
2406                         clock->mask;
2407                 break;
2408         default:
2409                 *mode = VDSO_CLOCKMODE_NONE;
2410         }
2411
2412         if (*mode == VDSO_CLOCKMODE_NONE)
2413                 *tsc_timestamp = v = 0;
2414
2415         return v * clock->mult;
2416 }
2417
2418 static int do_monotonic_raw(s64 *t, u64 *tsc_timestamp)
2419 {
2420         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2421         unsigned long seq;
2422         int mode;
2423         u64 ns;
2424
2425         do {
2426                 seq = read_seqcount_begin(&gtod->seq);
2427                 ns = gtod->raw_clock.base_cycles;
2428                 ns += vgettsc(&gtod->raw_clock, tsc_timestamp, &mode);
2429                 ns >>= gtod->raw_clock.shift;
2430                 ns += ktime_to_ns(ktime_add(gtod->raw_clock.offset, gtod->offs_boot));
2431         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2432         *t = ns;
2433
2434         return mode;
2435 }
2436
2437 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2438 {
2439         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2440         unsigned long seq;
2441         int mode;
2442         u64 ns;
2443
2444         do {
2445                 seq = read_seqcount_begin(&gtod->seq);
2446                 ts->tv_sec = gtod->wall_time_sec;
2447                 ns = gtod->clock.base_cycles;
2448                 ns += vgettsc(&gtod->clock, tsc_timestamp, &mode);
2449                 ns >>= gtod->clock.shift;
2450         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2451
2452         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2453         ts->tv_nsec = ns;
2454
2455         return mode;
2456 }
2457
2458 /* returns true if host is using TSC based clocksource */
2459 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2460 {
2461         /* checked again under seqlock below */
2462         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2463                 return false;
2464
2465         return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns,
2466                                                       tsc_timestamp));
2467 }
2468
2469 /* returns true if host is using TSC based clocksource */
2470 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2471                                            u64 *tsc_timestamp)
2472 {
2473         /* checked again under seqlock below */
2474         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2475                 return false;
2476
2477         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2478 }
2479 #endif
2480
2481 /*
2482  *
2483  * Assuming a stable TSC across physical CPUS, and a stable TSC
2484  * across virtual CPUs, the following condition is possible.
2485  * Each numbered line represents an event visible to both
2486  * CPUs at the next numbered event.
2487  *
2488  * "timespecX" represents host monotonic time. "tscX" represents
2489  * RDTSC value.
2490  *
2491  *              VCPU0 on CPU0           |       VCPU1 on CPU1
2492  *
2493  * 1.  read timespec0,tsc0
2494  * 2.                                   | timespec1 = timespec0 + N
2495  *                                      | tsc1 = tsc0 + M
2496  * 3. transition to guest               | transition to guest
2497  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2498  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
2499  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2500  *
2501  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2502  *
2503  *      - ret0 < ret1
2504  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2505  *              ...
2506  *      - 0 < N - M => M < N
2507  *
2508  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2509  * always the case (the difference between two distinct xtime instances
2510  * might be smaller then the difference between corresponding TSC reads,
2511  * when updating guest vcpus pvclock areas).
2512  *
2513  * To avoid that problem, do not allow visibility of distinct
2514  * system_timestamp/tsc_timestamp values simultaneously: use a master
2515  * copy of host monotonic time values. Update that master copy
2516  * in lockstep.
2517  *
2518  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2519  *
2520  */
2521
2522 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2523 {
2524 #ifdef CONFIG_X86_64
2525         struct kvm_arch *ka = &kvm->arch;
2526         int vclock_mode;
2527         bool host_tsc_clocksource, vcpus_matched;
2528
2529         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2530                         atomic_read(&kvm->online_vcpus));
2531
2532         /*
2533          * If the host uses TSC clock, then passthrough TSC as stable
2534          * to the guest.
2535          */
2536         host_tsc_clocksource = kvm_get_time_and_clockread(
2537                                         &ka->master_kernel_ns,
2538                                         &ka->master_cycle_now);
2539
2540         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2541                                 && !ka->backwards_tsc_observed
2542                                 && !ka->boot_vcpu_runs_old_kvmclock;
2543
2544         if (ka->use_master_clock)
2545                 atomic_set(&kvm_guest_has_master_clock, 1);
2546
2547         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2548         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2549                                         vcpus_matched);
2550 #endif
2551 }
2552
2553 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2554 {
2555         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2556 }
2557
2558 static void kvm_gen_update_masterclock(struct kvm *kvm)
2559 {
2560 #ifdef CONFIG_X86_64
2561         int i;
2562         struct kvm_vcpu *vcpu;
2563         struct kvm_arch *ka = &kvm->arch;
2564
2565         spin_lock(&ka->pvclock_gtod_sync_lock);
2566         kvm_make_mclock_inprogress_request(kvm);
2567         /* no guest entries from this point */
2568         pvclock_update_vm_gtod_copy(kvm);
2569
2570         kvm_for_each_vcpu(i, vcpu, kvm)
2571                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2572
2573         /* guest entries allowed */
2574         kvm_for_each_vcpu(i, vcpu, kvm)
2575                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2576
2577         spin_unlock(&ka->pvclock_gtod_sync_lock);
2578 #endif
2579 }
2580
2581 u64 get_kvmclock_ns(struct kvm *kvm)
2582 {
2583         struct kvm_arch *ka = &kvm->arch;
2584         struct pvclock_vcpu_time_info hv_clock;
2585         u64 ret;
2586
2587         spin_lock(&ka->pvclock_gtod_sync_lock);
2588         if (!ka->use_master_clock) {
2589                 spin_unlock(&ka->pvclock_gtod_sync_lock);
2590                 return get_kvmclock_base_ns() + ka->kvmclock_offset;
2591         }
2592
2593         hv_clock.tsc_timestamp = ka->master_cycle_now;
2594         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2595         spin_unlock(&ka->pvclock_gtod_sync_lock);
2596
2597         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2598         get_cpu();
2599
2600         if (__this_cpu_read(cpu_tsc_khz)) {
2601                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2602                                    &hv_clock.tsc_shift,
2603                                    &hv_clock.tsc_to_system_mul);
2604                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2605         } else
2606                 ret = get_kvmclock_base_ns() + ka->kvmclock_offset;
2607
2608         put_cpu();
2609
2610         return ret;
2611 }
2612
2613 static void kvm_setup_pvclock_page(struct kvm_vcpu *v,
2614                                    struct gfn_to_hva_cache *cache,
2615                                    unsigned int offset)
2616 {
2617         struct kvm_vcpu_arch *vcpu = &v->arch;
2618         struct pvclock_vcpu_time_info guest_hv_clock;
2619
2620         if (unlikely(kvm_read_guest_offset_cached(v->kvm, cache,
2621                 &guest_hv_clock, offset, sizeof(guest_hv_clock))))
2622                 return;
2623
2624         /* This VCPU is paused, but it's legal for a guest to read another
2625          * VCPU's kvmclock, so we really have to follow the specification where
2626          * it says that version is odd if data is being modified, and even after
2627          * it is consistent.
2628          *
2629          * Version field updates must be kept separate.  This is because
2630          * kvm_write_guest_cached might use a "rep movs" instruction, and
2631          * writes within a string instruction are weakly ordered.  So there
2632          * are three writes overall.
2633          *
2634          * As a small optimization, only write the version field in the first
2635          * and third write.  The vcpu->pv_time cache is still valid, because the
2636          * version field is the first in the struct.
2637          */
2638         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2639
2640         if (guest_hv_clock.version & 1)
2641                 ++guest_hv_clock.version;  /* first time write, random junk */
2642
2643         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2644         kvm_write_guest_offset_cached(v->kvm, cache,
2645                                       &vcpu->hv_clock, offset,
2646                                       sizeof(vcpu->hv_clock.version));
2647
2648         smp_wmb();
2649
2650         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2651         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2652
2653         if (vcpu->pvclock_set_guest_stopped_request) {
2654                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2655                 vcpu->pvclock_set_guest_stopped_request = false;
2656         }
2657
2658         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2659
2660         kvm_write_guest_offset_cached(v->kvm, cache,
2661                                       &vcpu->hv_clock, offset,
2662                                       sizeof(vcpu->hv_clock));
2663
2664         smp_wmb();
2665
2666         vcpu->hv_clock.version++;
2667         kvm_write_guest_offset_cached(v->kvm, cache,
2668                                      &vcpu->hv_clock, offset,
2669                                      sizeof(vcpu->hv_clock.version));
2670 }
2671
2672 static int kvm_guest_time_update(struct kvm_vcpu *v)
2673 {
2674         unsigned long flags, tgt_tsc_khz;
2675         struct kvm_vcpu_arch *vcpu = &v->arch;
2676         struct kvm_arch *ka = &v->kvm->arch;
2677         s64 kernel_ns;
2678         u64 tsc_timestamp, host_tsc;
2679         u8 pvclock_flags;
2680         bool use_master_clock;
2681
2682         kernel_ns = 0;
2683         host_tsc = 0;
2684
2685         /*
2686          * If the host uses TSC clock, then passthrough TSC as stable
2687          * to the guest.
2688          */
2689         spin_lock(&ka->pvclock_gtod_sync_lock);
2690         use_master_clock = ka->use_master_clock;
2691         if (use_master_clock) {
2692                 host_tsc = ka->master_cycle_now;
2693                 kernel_ns = ka->master_kernel_ns;
2694         }
2695         spin_unlock(&ka->pvclock_gtod_sync_lock);
2696
2697         /* Keep irq disabled to prevent changes to the clock */
2698         local_irq_save(flags);
2699         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2700         if (unlikely(tgt_tsc_khz == 0)) {
2701                 local_irq_restore(flags);
2702                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2703                 return 1;
2704         }
2705         if (!use_master_clock) {
2706                 host_tsc = rdtsc();
2707                 kernel_ns = get_kvmclock_base_ns();
2708         }
2709
2710         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2711
2712         /*
2713          * We may have to catch up the TSC to match elapsed wall clock
2714          * time for two reasons, even if kvmclock is used.
2715          *   1) CPU could have been running below the maximum TSC rate
2716          *   2) Broken TSC compensation resets the base at each VCPU
2717          *      entry to avoid unknown leaps of TSC even when running
2718          *      again on the same CPU.  This may cause apparent elapsed
2719          *      time to disappear, and the guest to stand still or run
2720          *      very slowly.
2721          */
2722         if (vcpu->tsc_catchup) {
2723                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2724                 if (tsc > tsc_timestamp) {
2725                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2726                         tsc_timestamp = tsc;
2727                 }
2728         }
2729
2730         local_irq_restore(flags);
2731
2732         /* With all the info we got, fill in the values */
2733
2734         if (kvm_has_tsc_control)
2735                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
2736
2737         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2738                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2739                                    &vcpu->hv_clock.tsc_shift,
2740                                    &vcpu->hv_clock.tsc_to_system_mul);
2741                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2742         }
2743
2744         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2745         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2746         vcpu->last_guest_tsc = tsc_timestamp;
2747
2748         /* If the host uses TSC clocksource, then it is stable */
2749         pvclock_flags = 0;
2750         if (use_master_clock)
2751                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2752
2753         vcpu->hv_clock.flags = pvclock_flags;
2754
2755         if (vcpu->pv_time_enabled)
2756                 kvm_setup_pvclock_page(v, &vcpu->pv_time, 0);
2757         if (vcpu->xen.vcpu_info_set)
2758                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_info_cache,
2759                                        offsetof(struct compat_vcpu_info, time));
2760         if (vcpu->xen.vcpu_time_info_set)
2761                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_time_info_cache, 0);
2762         if (v == kvm_get_vcpu(v->kvm, 0))
2763                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2764         return 0;
2765 }
2766
2767 /*
2768  * kvmclock updates which are isolated to a given vcpu, such as
2769  * vcpu->cpu migration, should not allow system_timestamp from
2770  * the rest of the vcpus to remain static. Otherwise ntp frequency
2771  * correction applies to one vcpu's system_timestamp but not
2772  * the others.
2773  *
2774  * So in those cases, request a kvmclock update for all vcpus.
2775  * We need to rate-limit these requests though, as they can
2776  * considerably slow guests that have a large number of vcpus.
2777  * The time for a remote vcpu to update its kvmclock is bound
2778  * by the delay we use to rate-limit the updates.
2779  */
2780
2781 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2782
2783 static void kvmclock_update_fn(struct work_struct *work)
2784 {
2785         int i;
2786         struct delayed_work *dwork = to_delayed_work(work);
2787         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2788                                            kvmclock_update_work);
2789         struct kvm *kvm = container_of(ka, struct kvm, arch);
2790         struct kvm_vcpu *vcpu;
2791
2792         kvm_for_each_vcpu(i, vcpu, kvm) {
2793                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2794                 kvm_vcpu_kick(vcpu);
2795         }
2796 }
2797
2798 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2799 {
2800         struct kvm *kvm = v->kvm;
2801
2802         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2803         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2804                                         KVMCLOCK_UPDATE_DELAY);
2805 }
2806
2807 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2808
2809 static void kvmclock_sync_fn(struct work_struct *work)
2810 {
2811         struct delayed_work *dwork = to_delayed_work(work);
2812         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2813                                            kvmclock_sync_work);
2814         struct kvm *kvm = container_of(ka, struct kvm, arch);
2815
2816         if (!kvmclock_periodic_sync)
2817                 return;
2818
2819         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2820         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2821                                         KVMCLOCK_SYNC_PERIOD);
2822 }
2823
2824 /*
2825  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
2826  */
2827 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
2828 {
2829         /* McStatusWrEn enabled? */
2830         if (guest_cpuid_is_amd_or_hygon(vcpu))
2831                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
2832
2833         return false;
2834 }
2835
2836 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2837 {
2838         u64 mcg_cap = vcpu->arch.mcg_cap;
2839         unsigned bank_num = mcg_cap & 0xff;
2840         u32 msr = msr_info->index;
2841         u64 data = msr_info->data;
2842
2843         switch (msr) {
2844         case MSR_IA32_MCG_STATUS:
2845                 vcpu->arch.mcg_status = data;
2846                 break;
2847         case MSR_IA32_MCG_CTL:
2848                 if (!(mcg_cap & MCG_CTL_P) &&
2849                     (data || !msr_info->host_initiated))
2850                         return 1;
2851                 if (data != 0 && data != ~(u64)0)
2852                         return 1;
2853                 vcpu->arch.mcg_ctl = data;
2854                 break;
2855         default:
2856                 if (msr >= MSR_IA32_MC0_CTL &&
2857                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2858                         u32 offset = array_index_nospec(
2859                                 msr - MSR_IA32_MC0_CTL,
2860                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
2861
2862                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2863                          * some Linux kernels though clear bit 10 in bank 4 to
2864                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2865                          * this to avoid an uncatched #GP in the guest
2866                          */
2867                         if ((offset & 0x3) == 0 &&
2868                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2869                                 return -1;
2870
2871                         /* MCi_STATUS */
2872                         if (!msr_info->host_initiated &&
2873                             (offset & 0x3) == 1 && data != 0) {
2874                                 if (!can_set_mci_status(vcpu))
2875                                         return -1;
2876                         }
2877
2878                         vcpu->arch.mce_banks[offset] = data;
2879                         break;
2880                 }
2881                 return 1;
2882         }
2883         return 0;
2884 }
2885
2886 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu *vcpu)
2887 {
2888         u64 mask = KVM_ASYNC_PF_ENABLED | KVM_ASYNC_PF_DELIVERY_AS_INT;
2889
2890         return (vcpu->arch.apf.msr_en_val & mask) == mask;
2891 }
2892
2893 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2894 {
2895         gpa_t gpa = data & ~0x3f;
2896
2897         /* Bits 4:5 are reserved, Should be zero */
2898         if (data & 0x30)
2899                 return 1;
2900
2901         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_VMEXIT) &&
2902             (data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT))
2903                 return 1;
2904
2905         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT) &&
2906             (data & KVM_ASYNC_PF_DELIVERY_AS_INT))
2907                 return 1;
2908
2909         if (!lapic_in_kernel(vcpu))
2910                 return data ? 1 : 0;
2911
2912         vcpu->arch.apf.msr_en_val = data;
2913
2914         if (!kvm_pv_async_pf_enabled(vcpu)) {
2915                 kvm_clear_async_pf_completion_queue(vcpu);
2916                 kvm_async_pf_hash_reset(vcpu);
2917                 return 0;
2918         }
2919
2920         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2921                                         sizeof(u64)))
2922                 return 1;
2923
2924         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2925         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
2926
2927         kvm_async_pf_wakeup_all(vcpu);
2928
2929         return 0;
2930 }
2931
2932 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu *vcpu, u64 data)
2933 {
2934         /* Bits 8-63 are reserved */
2935         if (data >> 8)
2936                 return 1;
2937
2938         if (!lapic_in_kernel(vcpu))
2939                 return 1;
2940
2941         vcpu->arch.apf.msr_int_val = data;
2942
2943         vcpu->arch.apf.vec = data & KVM_ASYNC_PF_VEC_MASK;
2944
2945         return 0;
2946 }
2947
2948 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2949 {
2950         vcpu->arch.pv_time_enabled = false;
2951         vcpu->arch.time = 0;
2952 }
2953
2954 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu *vcpu)
2955 {
2956         ++vcpu->stat.tlb_flush;
2957         static_call(kvm_x86_tlb_flush_all)(vcpu);
2958 }
2959
2960 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu *vcpu)
2961 {
2962         ++vcpu->stat.tlb_flush;
2963         static_call(kvm_x86_tlb_flush_guest)(vcpu);
2964 }
2965
2966 static void record_steal_time(struct kvm_vcpu *vcpu)
2967 {
2968         struct kvm_host_map map;
2969         struct kvm_steal_time *st;
2970
2971         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2972                 return;
2973
2974         /* -EAGAIN is returned in atomic context so we can just return. */
2975         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT,
2976                         &map, &vcpu->arch.st.cache, false))
2977                 return;
2978
2979         st = map.hva +
2980                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
2981
2982         /*
2983          * Doing a TLB flush here, on the guest's behalf, can avoid
2984          * expensive IPIs.
2985          */
2986         if (guest_pv_has(vcpu, KVM_FEATURE_PV_TLB_FLUSH)) {
2987                 trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
2988                                        st->preempted & KVM_VCPU_FLUSH_TLB);
2989                 if (xchg(&st->preempted, 0) & KVM_VCPU_FLUSH_TLB)
2990                         kvm_vcpu_flush_tlb_guest(vcpu);
2991         }
2992
2993         vcpu->arch.st.preempted = 0;
2994
2995         if (st->version & 1)
2996                 st->version += 1;  /* first time write, random junk */
2997
2998         st->version += 1;
2999
3000         smp_wmb();
3001
3002         st->steal += current->sched_info.run_delay -
3003                 vcpu->arch.st.last_steal;
3004         vcpu->arch.st.last_steal = current->sched_info.run_delay;
3005
3006         smp_wmb();
3007
3008         st->version += 1;
3009
3010         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, false);
3011 }
3012
3013 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3014 {
3015         bool pr = false;
3016         u32 msr = msr_info->index;
3017         u64 data = msr_info->data;
3018
3019         if (msr && msr == vcpu->kvm->arch.xen_hvm_config.msr)
3020                 return kvm_xen_write_hypercall_page(vcpu, data);
3021
3022         switch (msr) {
3023         case MSR_AMD64_NB_CFG:
3024         case MSR_IA32_UCODE_WRITE:
3025         case MSR_VM_HSAVE_PA:
3026         case MSR_AMD64_PATCH_LOADER:
3027         case MSR_AMD64_BU_CFG2:
3028         case MSR_AMD64_DC_CFG:
3029         case MSR_F15H_EX_CFG:
3030                 break;
3031
3032         case MSR_IA32_UCODE_REV:
3033                 if (msr_info->host_initiated)
3034                         vcpu->arch.microcode_version = data;
3035                 break;
3036         case MSR_IA32_ARCH_CAPABILITIES:
3037                 if (!msr_info->host_initiated)
3038                         return 1;
3039                 vcpu->arch.arch_capabilities = data;
3040                 break;
3041         case MSR_IA32_PERF_CAPABILITIES: {
3042                 struct kvm_msr_entry msr_ent = {.index = msr, .data = 0};
3043
3044                 if (!msr_info->host_initiated)
3045                         return 1;
3046                 if (guest_cpuid_has(vcpu, X86_FEATURE_PDCM) && kvm_get_msr_feature(&msr_ent))
3047                         return 1;
3048                 if (data & ~msr_ent.data)
3049                         return 1;
3050
3051                 vcpu->arch.perf_capabilities = data;
3052
3053                 return 0;
3054                 }
3055         case MSR_EFER:
3056                 return set_efer(vcpu, msr_info);
3057         case MSR_K7_HWCR:
3058                 data &= ~(u64)0x40;     /* ignore flush filter disable */
3059                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
3060                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
3061
3062                 /* Handle McStatusWrEn */
3063                 if (data == BIT_ULL(18)) {
3064                         vcpu->arch.msr_hwcr = data;
3065                 } else if (data != 0) {
3066                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
3067                                     data);
3068                         return 1;
3069                 }
3070                 break;
3071         case MSR_FAM10H_MMIO_CONF_BASE:
3072                 if (data != 0) {
3073                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
3074                                     "0x%llx\n", data);
3075                         return 1;
3076                 }
3077                 break;
3078         case 0x200 ... 0x2ff:
3079                 return kvm_mtrr_set_msr(vcpu, msr, data);
3080         case MSR_IA32_APICBASE:
3081                 return kvm_set_apic_base(vcpu, msr_info);
3082         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3083                 return kvm_x2apic_msr_write(vcpu, msr, data);
3084         case MSR_IA32_TSCDEADLINE:
3085                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
3086                 break;
3087         case MSR_IA32_TSC_ADJUST:
3088                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
3089                         if (!msr_info->host_initiated) {
3090                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
3091                                 adjust_tsc_offset_guest(vcpu, adj);
3092                         }
3093                         vcpu->arch.ia32_tsc_adjust_msr = data;
3094                 }
3095                 break;
3096         case MSR_IA32_MISC_ENABLE:
3097                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
3098                     ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
3099                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
3100                                 return 1;
3101                         vcpu->arch.ia32_misc_enable_msr = data;
3102                         kvm_update_cpuid_runtime(vcpu);
3103                 } else {
3104                         vcpu->arch.ia32_misc_enable_msr = data;
3105                 }
3106                 break;
3107         case MSR_IA32_SMBASE:
3108                 if (!msr_info->host_initiated)
3109                         return 1;
3110                 vcpu->arch.smbase = data;
3111                 break;
3112         case MSR_IA32_POWER_CTL:
3113                 vcpu->arch.msr_ia32_power_ctl = data;
3114                 break;
3115         case MSR_IA32_TSC:
3116                 if (msr_info->host_initiated) {
3117                         kvm_synchronize_tsc(vcpu, data);
3118                 } else {
3119                         u64 adj = kvm_compute_tsc_offset(vcpu, data) - vcpu->arch.l1_tsc_offset;
3120                         adjust_tsc_offset_guest(vcpu, adj);
3121                         vcpu->arch.ia32_tsc_adjust_msr += adj;
3122                 }
3123                 break;
3124         case MSR_IA32_XSS:
3125                 if (!msr_info->host_initiated &&
3126                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3127                         return 1;
3128                 /*
3129                  * KVM supports exposing PT to the guest, but does not support
3130                  * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3131                  * XSAVES/XRSTORS to save/restore PT MSRs.
3132                  */
3133                 if (data & ~supported_xss)
3134                         return 1;
3135                 vcpu->arch.ia32_xss = data;
3136                 break;
3137         case MSR_SMI_COUNT:
3138                 if (!msr_info->host_initiated)
3139                         return 1;
3140                 vcpu->arch.smi_count = data;
3141                 break;
3142         case MSR_KVM_WALL_CLOCK_NEW:
3143                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3144                         return 1;
3145
3146                 vcpu->kvm->arch.wall_clock = data;
3147                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3148                 break;
3149         case MSR_KVM_WALL_CLOCK:
3150                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3151                         return 1;
3152
3153                 vcpu->kvm->arch.wall_clock = data;
3154                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3155                 break;
3156         case MSR_KVM_SYSTEM_TIME_NEW:
3157                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3158                         return 1;
3159
3160                 kvm_write_system_time(vcpu, data, false, msr_info->host_initiated);
3161                 break;
3162         case MSR_KVM_SYSTEM_TIME:
3163                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3164                         return 1;
3165
3166                 kvm_write_system_time(vcpu, data, true,  msr_info->host_initiated);
3167                 break;
3168         case MSR_KVM_ASYNC_PF_EN:
3169                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3170                         return 1;
3171
3172                 if (kvm_pv_enable_async_pf(vcpu, data))
3173                         return 1;
3174                 break;
3175         case MSR_KVM_ASYNC_PF_INT:
3176                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3177                         return 1;
3178
3179                 if (kvm_pv_enable_async_pf_int(vcpu, data))
3180                         return 1;
3181                 break;
3182         case MSR_KVM_ASYNC_PF_ACK:
3183                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3184                         return 1;
3185                 if (data & 0x1) {
3186                         vcpu->arch.apf.pageready_pending = false;
3187                         kvm_check_async_pf_completion(vcpu);
3188                 }
3189                 break;
3190         case MSR_KVM_STEAL_TIME:
3191                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3192                         return 1;
3193
3194                 if (unlikely(!sched_info_on()))
3195                         return 1;
3196
3197                 if (data & KVM_STEAL_RESERVED_MASK)
3198                         return 1;
3199
3200                 vcpu->arch.st.msr_val = data;
3201
3202                 if (!(data & KVM_MSR_ENABLED))
3203                         break;
3204
3205                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3206
3207                 break;
3208         case MSR_KVM_PV_EOI_EN:
3209                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3210                         return 1;
3211
3212                 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
3213                         return 1;
3214                 break;
3215
3216         case MSR_KVM_POLL_CONTROL:
3217                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3218                         return 1;
3219
3220                 /* only enable bit supported */
3221                 if (data & (-1ULL << 1))
3222                         return 1;
3223
3224                 vcpu->arch.msr_kvm_poll_control = data;
3225                 break;
3226
3227         case MSR_IA32_MCG_CTL:
3228         case MSR_IA32_MCG_STATUS:
3229         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3230                 return set_msr_mce(vcpu, msr_info);
3231
3232         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3233         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3234                 pr = true;
3235                 fallthrough;
3236         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3237         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3238                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3239                         return kvm_pmu_set_msr(vcpu, msr_info);
3240
3241                 if (pr || data != 0)
3242                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
3243                                     "0x%x data 0x%llx\n", msr, data);
3244                 break;
3245         case MSR_K7_CLK_CTL:
3246                 /*
3247                  * Ignore all writes to this no longer documented MSR.
3248                  * Writes are only relevant for old K7 processors,
3249                  * all pre-dating SVM, but a recommended workaround from
3250                  * AMD for these chips. It is possible to specify the
3251                  * affected processor models on the command line, hence
3252                  * the need to ignore the workaround.
3253                  */
3254                 break;
3255         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3256         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3257         case HV_X64_MSR_SYNDBG_OPTIONS:
3258         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3259         case HV_X64_MSR_CRASH_CTL:
3260         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3261         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3262         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3263         case HV_X64_MSR_TSC_EMULATION_STATUS:
3264                 return kvm_hv_set_msr_common(vcpu, msr, data,
3265                                              msr_info->host_initiated);
3266         case MSR_IA32_BBL_CR_CTL3:
3267                 /* Drop writes to this legacy MSR -- see rdmsr
3268                  * counterpart for further detail.
3269                  */
3270                 if (report_ignored_msrs)
3271                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
3272                                 msr, data);
3273                 break;
3274         case MSR_AMD64_OSVW_ID_LENGTH:
3275                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3276                         return 1;
3277                 vcpu->arch.osvw.length = data;
3278                 break;
3279         case MSR_AMD64_OSVW_STATUS:
3280                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3281                         return 1;
3282                 vcpu->arch.osvw.status = data;
3283                 break;
3284         case MSR_PLATFORM_INFO:
3285                 if (!msr_info->host_initiated ||
3286                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
3287                      cpuid_fault_enabled(vcpu)))
3288                         return 1;
3289                 vcpu->arch.msr_platform_info = data;
3290                 break;
3291         case MSR_MISC_FEATURES_ENABLES:
3292                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
3293                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
3294                      !supports_cpuid_fault(vcpu)))
3295                         return 1;
3296                 vcpu->arch.msr_misc_features_enables = data;
3297                 break;
3298         default:
3299                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3300                         return kvm_pmu_set_msr(vcpu, msr_info);
3301                 return KVM_MSR_RET_INVALID;
3302         }
3303         return 0;
3304 }
3305 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
3306
3307 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
3308 {
3309         u64 data;
3310         u64 mcg_cap = vcpu->arch.mcg_cap;
3311         unsigned bank_num = mcg_cap & 0xff;
3312
3313         switch (msr) {
3314         case MSR_IA32_P5_MC_ADDR:
3315         case MSR_IA32_P5_MC_TYPE:
3316                 data = 0;
3317                 break;
3318         case MSR_IA32_MCG_CAP:
3319                 data = vcpu->arch.mcg_cap;
3320                 break;
3321         case MSR_IA32_MCG_CTL:
3322                 if (!(mcg_cap & MCG_CTL_P) && !host)
3323                         return 1;
3324                 data = vcpu->arch.mcg_ctl;
3325                 break;
3326         case MSR_IA32_MCG_STATUS:
3327                 data = vcpu->arch.mcg_status;
3328                 break;
3329         default:
3330                 if (msr >= MSR_IA32_MC0_CTL &&
3331                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3332                         u32 offset = array_index_nospec(
3333                                 msr - MSR_IA32_MC0_CTL,
3334                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3335
3336                         data = vcpu->arch.mce_banks[offset];
3337                         break;
3338                 }
3339                 return 1;
3340         }
3341         *pdata = data;
3342         return 0;
3343 }
3344
3345 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3346 {
3347         switch (msr_info->index) {
3348         case MSR_IA32_PLATFORM_ID:
3349         case MSR_IA32_EBL_CR_POWERON:
3350         case MSR_IA32_LASTBRANCHFROMIP:
3351         case MSR_IA32_LASTBRANCHTOIP:
3352         case MSR_IA32_LASTINTFROMIP:
3353         case MSR_IA32_LASTINTTOIP:
3354         case MSR_K8_SYSCFG:
3355         case MSR_K8_TSEG_ADDR:
3356         case MSR_K8_TSEG_MASK:
3357         case MSR_VM_HSAVE_PA:
3358         case MSR_K8_INT_PENDING_MSG:
3359         case MSR_AMD64_NB_CFG:
3360         case MSR_FAM10H_MMIO_CONF_BASE:
3361         case MSR_AMD64_BU_CFG2:
3362         case MSR_IA32_PERF_CTL:
3363         case MSR_AMD64_DC_CFG:
3364         case MSR_F15H_EX_CFG:
3365         /*
3366          * Intel Sandy Bridge CPUs must support the RAPL (running average power
3367          * limit) MSRs. Just return 0, as we do not want to expose the host
3368          * data here. Do not conditionalize this on CPUID, as KVM does not do
3369          * so for existing CPU-specific MSRs.
3370          */
3371         case MSR_RAPL_POWER_UNIT:
3372         case MSR_PP0_ENERGY_STATUS:     /* Power plane 0 (core) */
3373         case MSR_PP1_ENERGY_STATUS:     /* Power plane 1 (graphics uncore) */
3374         case MSR_PKG_ENERGY_STATUS:     /* Total package */
3375         case MSR_DRAM_ENERGY_STATUS:    /* DRAM controller */
3376                 msr_info->data = 0;
3377                 break;
3378         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
3379         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3380         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3381         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3382         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3383                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3384                         return kvm_pmu_get_msr(vcpu, msr_info);
3385                 msr_info->data = 0;
3386                 break;
3387         case MSR_IA32_UCODE_REV:
3388                 msr_info->data = vcpu->arch.microcode_version;
3389                 break;
3390         case MSR_IA32_ARCH_CAPABILITIES:
3391                 if (!msr_info->host_initiated &&
3392                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
3393                         return 1;
3394                 msr_info->data = vcpu->arch.arch_capabilities;
3395                 break;
3396         case MSR_IA32_PERF_CAPABILITIES:
3397                 if (!msr_info->host_initiated &&
3398                     !guest_cpuid_has(vcpu, X86_FEATURE_PDCM))
3399                         return 1;
3400                 msr_info->data = vcpu->arch.perf_capabilities;
3401                 break;
3402         case MSR_IA32_POWER_CTL:
3403                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
3404                 break;
3405         case MSR_IA32_TSC: {
3406                 /*
3407                  * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3408                  * even when not intercepted. AMD manual doesn't explicitly
3409                  * state this but appears to behave the same.
3410                  *
3411                  * On userspace reads and writes, however, we unconditionally
3412                  * return L1's TSC value to ensure backwards-compatible
3413                  * behavior for migration.
3414                  */
3415                 u64 tsc_offset = msr_info->host_initiated ? vcpu->arch.l1_tsc_offset :
3416                                                             vcpu->arch.tsc_offset;
3417
3418                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc()) + tsc_offset;
3419                 break;
3420         }
3421         case MSR_MTRRcap:
3422         case 0x200 ... 0x2ff:
3423                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
3424         case 0xcd: /* fsb frequency */
3425                 msr_info->data = 3;
3426                 break;
3427                 /*
3428                  * MSR_EBC_FREQUENCY_ID
3429                  * Conservative value valid for even the basic CPU models.
3430                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3431                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3432                  * and 266MHz for model 3, or 4. Set Core Clock
3433                  * Frequency to System Bus Frequency Ratio to 1 (bits
3434                  * 31:24) even though these are only valid for CPU
3435                  * models > 2, however guests may end up dividing or
3436                  * multiplying by zero otherwise.
3437                  */
3438         case MSR_EBC_FREQUENCY_ID:
3439                 msr_info->data = 1 << 24;
3440                 break;
3441         case MSR_IA32_APICBASE:
3442                 msr_info->data = kvm_get_apic_base(vcpu);
3443                 break;
3444         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3445                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
3446         case MSR_IA32_TSCDEADLINE:
3447                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
3448                 break;
3449         case MSR_IA32_TSC_ADJUST:
3450                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
3451                 break;
3452         case MSR_IA32_MISC_ENABLE:
3453                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
3454                 break;
3455         case MSR_IA32_SMBASE:
3456                 if (!msr_info->host_initiated)
3457                         return 1;
3458                 msr_info->data = vcpu->arch.smbase;
3459                 break;
3460         case MSR_SMI_COUNT:
3461                 msr_info->data = vcpu->arch.smi_count;
3462                 break;
3463         case MSR_IA32_PERF_STATUS:
3464                 /* TSC increment by tick */
3465                 msr_info->data = 1000ULL;
3466                 /* CPU multiplier */
3467                 msr_info->data |= (((uint64_t)4ULL) << 40);
3468                 break;
3469         case MSR_EFER:
3470                 msr_info->data = vcpu->arch.efer;
3471                 break;
3472         case MSR_KVM_WALL_CLOCK:
3473                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3474                         return 1;
3475
3476                 msr_info->data = vcpu->kvm->arch.wall_clock;
3477                 break;
3478         case MSR_KVM_WALL_CLOCK_NEW:
3479                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3480                         return 1;
3481
3482                 msr_info->data = vcpu->kvm->arch.wall_clock;
3483                 break;
3484         case MSR_KVM_SYSTEM_TIME:
3485                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3486                         return 1;
3487
3488                 msr_info->data = vcpu->arch.time;
3489                 break;
3490         case MSR_KVM_SYSTEM_TIME_NEW:
3491                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3492                         return 1;
3493
3494                 msr_info->data = vcpu->arch.time;
3495                 break;
3496         case MSR_KVM_ASYNC_PF_EN:
3497                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3498                         return 1;
3499
3500                 msr_info->data = vcpu->arch.apf.msr_en_val;
3501                 break;
3502         case MSR_KVM_ASYNC_PF_INT:
3503                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3504                         return 1;
3505
3506                 msr_info->data = vcpu->arch.apf.msr_int_val;
3507                 break;
3508         case MSR_KVM_ASYNC_PF_ACK:
3509                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3510                         return 1;
3511
3512                 msr_info->data = 0;
3513                 break;
3514         case MSR_KVM_STEAL_TIME:
3515                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3516                         return 1;
3517
3518                 msr_info->data = vcpu->arch.st.msr_val;
3519                 break;
3520         case MSR_KVM_PV_EOI_EN:
3521                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3522                         return 1;
3523
3524                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
3525                 break;
3526         case MSR_KVM_POLL_CONTROL:
3527                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3528                         return 1;
3529
3530                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
3531                 break;
3532         case MSR_IA32_P5_MC_ADDR:
3533         case MSR_IA32_P5_MC_TYPE:
3534         case MSR_IA32_MCG_CAP:
3535         case MSR_IA32_MCG_CTL:
3536         case MSR_IA32_MCG_STATUS:
3537         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3538                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
3539                                    msr_info->host_initiated);
3540         case MSR_IA32_XSS:
3541                 if (!msr_info->host_initiated &&
3542                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3543                         return 1;
3544                 msr_info->data = vcpu->arch.ia32_xss;
3545                 break;
3546         case MSR_K7_CLK_CTL:
3547                 /*
3548                  * Provide expected ramp-up count for K7. All other
3549                  * are set to zero, indicating minimum divisors for
3550                  * every field.
3551                  *
3552                  * This prevents guest kernels on AMD host with CPU
3553                  * type 6, model 8 and higher from exploding due to
3554                  * the rdmsr failing.
3555                  */
3556                 msr_info->data = 0x20000000;
3557                 break;
3558         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3559         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3560         case HV_X64_MSR_SYNDBG_OPTIONS:
3561         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3562         case HV_X64_MSR_CRASH_CTL:
3563         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3564         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3565         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3566         case HV_X64_MSR_TSC_EMULATION_STATUS:
3567                 return kvm_hv_get_msr_common(vcpu,
3568                                              msr_info->index, &msr_info->data,
3569                                              msr_info->host_initiated);
3570         case MSR_IA32_BBL_CR_CTL3:
3571                 /* This legacy MSR exists but isn't fully documented in current
3572                  * silicon.  It is however accessed by winxp in very narrow
3573                  * scenarios where it sets bit #19, itself documented as
3574                  * a "reserved" bit.  Best effort attempt to source coherent
3575                  * read data here should the balance of the register be
3576                  * interpreted by the guest:
3577                  *
3578                  * L2 cache control register 3: 64GB range, 256KB size,
3579                  * enabled, latency 0x1, configured
3580                  */
3581                 msr_info->data = 0xbe702111;
3582                 break;
3583         case MSR_AMD64_OSVW_ID_LENGTH:
3584                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3585                         return 1;
3586                 msr_info->data = vcpu->arch.osvw.length;
3587                 break;
3588         case MSR_AMD64_OSVW_STATUS:
3589                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3590                         return 1;
3591                 msr_info->data = vcpu->arch.osvw.status;
3592                 break;
3593         case MSR_PLATFORM_INFO:
3594                 if (!msr_info->host_initiated &&
3595                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
3596                         return 1;
3597                 msr_info->data = vcpu->arch.msr_platform_info;
3598                 break;
3599         case MSR_MISC_FEATURES_ENABLES:
3600                 msr_info->data = vcpu->arch.msr_misc_features_enables;
3601                 break;
3602         case MSR_K7_HWCR:
3603                 msr_info->data = vcpu->arch.msr_hwcr;
3604                 break;
3605         default:
3606                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3607                         return kvm_pmu_get_msr(vcpu, msr_info);
3608                 return KVM_MSR_RET_INVALID;
3609         }
3610         return 0;
3611 }
3612 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
3613
3614 /*
3615  * Read or write a bunch of msrs. All parameters are kernel addresses.
3616  *
3617  * @return number of msrs set successfully.
3618  */
3619 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
3620                     struct kvm_msr_entry *entries,
3621                     int (*do_msr)(struct kvm_vcpu *vcpu,
3622                                   unsigned index, u64 *data))
3623 {
3624         int i;
3625
3626         for (i = 0; i < msrs->nmsrs; ++i)
3627                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
3628                         break;
3629
3630         return i;
3631 }
3632
3633 /*
3634  * Read or write a bunch of msrs. Parameters are user addresses.
3635  *
3636  * @return number of msrs set successfully.
3637  */
3638 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
3639                   int (*do_msr)(struct kvm_vcpu *vcpu,
3640                                 unsigned index, u64 *data),
3641                   int writeback)
3642 {
3643         struct kvm_msrs msrs;
3644         struct kvm_msr_entry *entries;
3645         int r, n;
3646         unsigned size;
3647
3648         r = -EFAULT;
3649         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
3650                 goto out;
3651
3652         r = -E2BIG;
3653         if (msrs.nmsrs >= MAX_IO_MSRS)
3654                 goto out;
3655
3656         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
3657         entries = memdup_user(user_msrs->entries, size);
3658         if (IS_ERR(entries)) {
3659                 r = PTR_ERR(entries);
3660                 goto out;
3661         }
3662
3663         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
3664         if (r < 0)
3665                 goto out_free;
3666
3667         r = -EFAULT;
3668         if (writeback && copy_to_user(user_msrs->entries, entries, size))
3669                 goto out_free;
3670
3671         r = n;
3672
3673 out_free:
3674         kfree(entries);
3675 out:
3676         return r;
3677 }
3678
3679 static inline bool kvm_can_mwait_in_guest(void)
3680 {
3681         return boot_cpu_has(X86_FEATURE_MWAIT) &&
3682                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
3683                 boot_cpu_has(X86_FEATURE_ARAT);
3684 }
3685
3686 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu *vcpu,
3687                                             struct kvm_cpuid2 __user *cpuid_arg)
3688 {
3689         struct kvm_cpuid2 cpuid;
3690         int r;
3691
3692         r = -EFAULT;
3693         if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3694                 return r;
3695
3696         r = kvm_get_hv_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3697         if (r)
3698                 return r;
3699
3700         r = -EFAULT;
3701         if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3702                 return r;
3703
3704         return 0;
3705 }
3706
3707 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
3708 {
3709         int r = 0;
3710
3711         switch (ext) {
3712         case KVM_CAP_IRQCHIP:
3713         case KVM_CAP_HLT:
3714         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
3715         case KVM_CAP_SET_TSS_ADDR:
3716         case KVM_CAP_EXT_CPUID:
3717         case KVM_CAP_EXT_EMUL_CPUID:
3718         case KVM_CAP_CLOCKSOURCE:
3719         case KVM_CAP_PIT:
3720         case KVM_CAP_NOP_IO_DELAY:
3721         case KVM_CAP_MP_STATE:
3722         case KVM_CAP_SYNC_MMU:
3723         case KVM_CAP_USER_NMI:
3724         case KVM_CAP_REINJECT_CONTROL:
3725         case KVM_CAP_IRQ_INJECT_STATUS:
3726         case KVM_CAP_IOEVENTFD:
3727         case KVM_CAP_IOEVENTFD_NO_LENGTH:
3728         case KVM_CAP_PIT2:
3729         case KVM_CAP_PIT_STATE2:
3730         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
3731         case KVM_CAP_VCPU_EVENTS:
3732         case KVM_CAP_HYPERV:
3733         case KVM_CAP_HYPERV_VAPIC:
3734         case KVM_CAP_HYPERV_SPIN:
3735         case KVM_CAP_HYPERV_SYNIC:
3736         case KVM_CAP_HYPERV_SYNIC2:
3737         case KVM_CAP_HYPERV_VP_INDEX:
3738         case KVM_CAP_HYPERV_EVENTFD:
3739         case KVM_CAP_HYPERV_TLBFLUSH:
3740         case KVM_CAP_HYPERV_SEND_IPI:
3741         case KVM_CAP_HYPERV_CPUID:
3742         case KVM_CAP_SYS_HYPERV_CPUID:
3743         case KVM_CAP_PCI_SEGMENT:
3744         case KVM_CAP_DEBUGREGS:
3745         case KVM_CAP_X86_ROBUST_SINGLESTEP:
3746         case KVM_CAP_XSAVE:
3747         case KVM_CAP_ASYNC_PF:
3748         case KVM_CAP_ASYNC_PF_INT:
3749         case KVM_CAP_GET_TSC_KHZ:
3750         case KVM_CAP_KVMCLOCK_CTRL:
3751         case KVM_CAP_READONLY_MEM:
3752         case KVM_CAP_HYPERV_TIME:
3753         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
3754         case KVM_CAP_TSC_DEADLINE_TIMER:
3755         case KVM_CAP_DISABLE_QUIRKS:
3756         case KVM_CAP_SET_BOOT_CPU_ID:
3757         case KVM_CAP_SPLIT_IRQCHIP:
3758         case KVM_CAP_IMMEDIATE_EXIT:
3759         case KVM_CAP_PMU_EVENT_FILTER:
3760         case KVM_CAP_GET_MSR_FEATURES:
3761         case KVM_CAP_MSR_PLATFORM_INFO:
3762         case KVM_CAP_EXCEPTION_PAYLOAD:
3763         case KVM_CAP_SET_GUEST_DEBUG:
3764         case KVM_CAP_LAST_CPU:
3765         case KVM_CAP_X86_USER_SPACE_MSR:
3766         case KVM_CAP_X86_MSR_FILTER:
3767         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
3768                 r = 1;
3769                 break;
3770         case KVM_CAP_XEN_HVM:
3771                 r = KVM_XEN_HVM_CONFIG_HYPERCALL_MSR |
3772                     KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL |
3773                     KVM_XEN_HVM_CONFIG_SHARED_INFO;
3774                 break;
3775         case KVM_CAP_SYNC_REGS:
3776                 r = KVM_SYNC_X86_VALID_FIELDS;
3777                 break;
3778         case KVM_CAP_ADJUST_CLOCK:
3779                 r = KVM_CLOCK_TSC_STABLE;
3780                 break;
3781         case KVM_CAP_X86_DISABLE_EXITS:
3782                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
3783                       KVM_X86_DISABLE_EXITS_CSTATE;
3784                 if(kvm_can_mwait_in_guest())
3785                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
3786                 break;
3787         case KVM_CAP_X86_SMM:
3788                 /* SMBASE is usually relocated above 1M on modern chipsets,
3789                  * and SMM handlers might indeed rely on 4G segment limits,
3790                  * so do not report SMM to be available if real mode is
3791                  * emulated via vm86 mode.  Still, do not go to great lengths
3792                  * to avoid userspace's usage of the feature, because it is a
3793                  * fringe case that is not enabled except via specific settings
3794                  * of the module parameters.
3795                  */
3796                 r = static_call(kvm_x86_has_emulated_msr)(kvm, MSR_IA32_SMBASE);
3797                 break;
3798         case KVM_CAP_VAPIC:
3799                 r = !static_call(kvm_x86_cpu_has_accelerated_tpr)();
3800                 break;
3801         case KVM_CAP_NR_VCPUS:
3802                 r = KVM_SOFT_MAX_VCPUS;
3803                 break;
3804         case KVM_CAP_MAX_VCPUS:
3805                 r = KVM_MAX_VCPUS;
3806                 break;
3807         case KVM_CAP_MAX_VCPU_ID:
3808                 r = KVM_MAX_VCPU_ID;
3809                 break;
3810         case KVM_CAP_PV_MMU:    /* obsolete */
3811                 r = 0;
3812                 break;
3813         case KVM_CAP_MCE:
3814                 r = KVM_MAX_MCE_BANKS;
3815                 break;
3816         case KVM_CAP_XCRS:
3817                 r = boot_cpu_has(X86_FEATURE_XSAVE);
3818                 break;
3819         case KVM_CAP_TSC_CONTROL:
3820                 r = kvm_has_tsc_control;
3821                 break;
3822         case KVM_CAP_X2APIC_API:
3823                 r = KVM_X2APIC_API_VALID_FLAGS;
3824                 break;
3825         case KVM_CAP_NESTED_STATE:
3826                 r = kvm_x86_ops.nested_ops->get_state ?
3827                         kvm_x86_ops.nested_ops->get_state(NULL, NULL, 0) : 0;
3828                 break;
3829         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
3830                 r = kvm_x86_ops.enable_direct_tlbflush != NULL;
3831                 break;
3832         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
3833                 r = kvm_x86_ops.nested_ops->enable_evmcs != NULL;
3834                 break;
3835         case KVM_CAP_SMALLER_MAXPHYADDR:
3836                 r = (int) allow_smaller_maxphyaddr;
3837                 break;
3838         case KVM_CAP_STEAL_TIME:
3839                 r = sched_info_on();
3840                 break;
3841         case KVM_CAP_X86_BUS_LOCK_EXIT:
3842                 if (kvm_has_bus_lock_exit)
3843                         r = KVM_BUS_LOCK_DETECTION_OFF |
3844                             KVM_BUS_LOCK_DETECTION_EXIT;
3845                 else
3846                         r = 0;
3847                 break;
3848         default:
3849                 break;
3850         }
3851         return r;
3852
3853 }
3854
3855 long kvm_arch_dev_ioctl(struct file *filp,
3856                         unsigned int ioctl, unsigned long arg)
3857 {
3858         void __user *argp = (void __user *)arg;
3859         long r;
3860
3861         switch (ioctl) {
3862         case KVM_GET_MSR_INDEX_LIST: {
3863                 struct kvm_msr_list __user *user_msr_list = argp;
3864                 struct kvm_msr_list msr_list;
3865                 unsigned n;
3866
3867                 r = -EFAULT;
3868                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3869                         goto out;
3870                 n = msr_list.nmsrs;
3871                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
3872                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3873                         goto out;
3874                 r = -E2BIG;
3875                 if (n < msr_list.nmsrs)
3876                         goto out;
3877                 r = -EFAULT;
3878                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
3879                                  num_msrs_to_save * sizeof(u32)))
3880                         goto out;
3881                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
3882                                  &emulated_msrs,
3883                                  num_emulated_msrs * sizeof(u32)))
3884                         goto out;
3885                 r = 0;
3886                 break;
3887         }
3888         case KVM_GET_SUPPORTED_CPUID:
3889         case KVM_GET_EMULATED_CPUID: {
3890                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3891                 struct kvm_cpuid2 cpuid;
3892
3893                 r = -EFAULT;
3894                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3895                         goto out;
3896
3897                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
3898                                             ioctl);
3899                 if (r)
3900                         goto out;
3901
3902                 r = -EFAULT;
3903                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3904                         goto out;
3905                 r = 0;
3906                 break;
3907         }
3908         case KVM_X86_GET_MCE_CAP_SUPPORTED:
3909                 r = -EFAULT;
3910                 if (copy_to_user(argp, &kvm_mce_cap_supported,
3911                                  sizeof(kvm_mce_cap_supported)))
3912                         goto out;
3913                 r = 0;
3914                 break;
3915         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
3916                 struct kvm_msr_list __user *user_msr_list = argp;
3917                 struct kvm_msr_list msr_list;
3918                 unsigned int n;
3919
3920                 r = -EFAULT;
3921                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3922                         goto out;
3923                 n = msr_list.nmsrs;
3924                 msr_list.nmsrs = num_msr_based_features;
3925                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3926                         goto out;
3927                 r = -E2BIG;
3928                 if (n < msr_list.nmsrs)
3929                         goto out;
3930                 r = -EFAULT;
3931                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
3932                                  num_msr_based_features * sizeof(u32)))
3933                         goto out;
3934                 r = 0;
3935                 break;
3936         }
3937         case KVM_GET_MSRS:
3938                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
3939                 break;
3940         case KVM_GET_SUPPORTED_HV_CPUID:
3941                 r = kvm_ioctl_get_supported_hv_cpuid(NULL, argp);
3942                 break;
3943         default:
3944                 r = -EINVAL;
3945                 break;
3946         }
3947 out:
3948         return r;
3949 }
3950
3951 static void wbinvd_ipi(void *garbage)
3952 {
3953         wbinvd();
3954 }
3955
3956 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
3957 {
3958         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
3959 }
3960
3961 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
3962 {
3963         /* Address WBINVD may be executed by guest */
3964         if (need_emulate_wbinvd(vcpu)) {
3965                 if (static_call(kvm_x86_has_wbinvd_exit)())
3966                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
3967                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
3968                         smp_call_function_single(vcpu->cpu,
3969                                         wbinvd_ipi, NULL, 1);
3970         }
3971
3972         static_call(kvm_x86_vcpu_load)(vcpu, cpu);
3973
3974         /* Save host pkru register if supported */
3975         vcpu->arch.host_pkru = read_pkru();
3976
3977         /* Apply any externally detected TSC adjustments (due to suspend) */
3978         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
3979                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
3980                 vcpu->arch.tsc_offset_adjustment = 0;
3981                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3982         }
3983
3984         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
3985                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
3986                                 rdtsc() - vcpu->arch.last_host_tsc;
3987                 if (tsc_delta < 0)
3988                         mark_tsc_unstable("KVM discovered backwards TSC");
3989
3990                 if (kvm_check_tsc_unstable()) {
3991                         u64 offset = kvm_compute_tsc_offset(vcpu,
3992                                                 vcpu->arch.last_guest_tsc);
3993                         kvm_vcpu_write_tsc_offset(vcpu, offset);
3994                         vcpu->arch.tsc_catchup = 1;
3995                 }
3996
3997                 if (kvm_lapic_hv_timer_in_use(vcpu))
3998                         kvm_lapic_restart_hv_timer(vcpu);
3999
4000                 /*
4001                  * On a host with synchronized TSC, there is no need to update
4002                  * kvmclock on vcpu->cpu migration
4003                  */
4004                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
4005                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
4006                 if (vcpu->cpu != cpu)
4007                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
4008                 vcpu->cpu = cpu;
4009         }
4010
4011         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
4012 }
4013
4014 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
4015 {
4016         struct kvm_host_map map;
4017         struct kvm_steal_time *st;
4018         int idx;
4019
4020         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
4021                 return;
4022
4023         if (vcpu->arch.st.preempted)
4024                 return;
4025
4026         /*
4027          * Take the srcu lock as memslots will be accessed to check the gfn
4028          * cache generation against the memslots generation.
4029          */
4030         idx = srcu_read_lock(&vcpu->kvm->srcu);
4031
4032         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT, &map,
4033                         &vcpu->arch.st.cache, true))
4034                 goto out;
4035
4036         st = map.hva +
4037                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
4038
4039         st->preempted = vcpu->arch.st.preempted = KVM_VCPU_PREEMPTED;
4040
4041         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, true);
4042
4043 out:
4044         srcu_read_unlock(&vcpu->kvm->srcu, idx);
4045 }
4046
4047 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
4048 {
4049         if (vcpu->preempted && !vcpu->arch.guest_state_protected)
4050                 vcpu->arch.preempted_in_kernel = !static_call(kvm_x86_get_cpl)(vcpu);
4051
4052         kvm_steal_time_set_preempted(vcpu);
4053         static_call(kvm_x86_vcpu_put)(vcpu);
4054         vcpu->arch.last_host_tsc = rdtsc();
4055         /*
4056          * If userspace has set any breakpoints or watchpoints, dr6 is restored
4057          * on every vmexit, but if not, we might have a stale dr6 from the
4058          * guest. do_debug expects dr6 to be cleared after it runs, do the same.
4059          */
4060         set_debugreg(0, 6);
4061 }
4062
4063 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
4064                                     struct kvm_lapic_state *s)
4065 {
4066         if (vcpu->arch.apicv_active)
4067                 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
4068
4069         return kvm_apic_get_state(vcpu, s);
4070 }
4071
4072 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
4073                                     struct kvm_lapic_state *s)
4074 {
4075         int r;
4076
4077         r = kvm_apic_set_state(vcpu, s);
4078         if (r)
4079                 return r;
4080         update_cr8_intercept(vcpu);
4081
4082         return 0;
4083 }
4084
4085 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
4086 {
4087         /*
4088          * We can accept userspace's request for interrupt injection
4089          * as long as we have a place to store the interrupt number.
4090          * The actual injection will happen when the CPU is able to
4091          * deliver the interrupt.
4092          */
4093         if (kvm_cpu_has_extint(vcpu))
4094                 return false;
4095
4096         /* Acknowledging ExtINT does not happen if LINT0 is masked.  */
4097         return (!lapic_in_kernel(vcpu) ||
4098                 kvm_apic_accept_pic_intr(vcpu));
4099 }
4100
4101 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
4102 {
4103         return kvm_arch_interrupt_allowed(vcpu) &&
4104                 kvm_cpu_accept_dm_intr(vcpu);
4105 }
4106
4107 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
4108                                     struct kvm_interrupt *irq)
4109 {
4110         if (irq->irq >= KVM_NR_INTERRUPTS)
4111                 return -EINVAL;
4112
4113         if (!irqchip_in_kernel(vcpu->kvm)) {
4114                 kvm_queue_interrupt(vcpu, irq->irq, false);
4115                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4116                 return 0;
4117         }
4118
4119         /*
4120          * With in-kernel LAPIC, we only use this to inject EXTINT, so
4121          * fail for in-kernel 8259.
4122          */
4123         if (pic_in_kernel(vcpu->kvm))
4124                 return -ENXIO;
4125
4126         if (vcpu->arch.pending_external_vector != -1)
4127                 return -EEXIST;
4128
4129         vcpu->arch.pending_external_vector = irq->irq;
4130         kvm_make_request(KVM_REQ_EVENT, vcpu);
4131         return 0;
4132 }
4133
4134 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
4135 {
4136         kvm_inject_nmi(vcpu);
4137
4138         return 0;
4139 }
4140
4141 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
4142 {
4143         kvm_make_request(KVM_REQ_SMI, vcpu);
4144
4145         return 0;
4146 }
4147
4148 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
4149                                            struct kvm_tpr_access_ctl *tac)
4150 {
4151         if (tac->flags)
4152                 return -EINVAL;
4153         vcpu->arch.tpr_access_reporting = !!tac->enabled;
4154         return 0;
4155 }
4156
4157 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
4158                                         u64 mcg_cap)
4159 {
4160         int r;
4161         unsigned bank_num = mcg_cap & 0xff, bank;
4162
4163         r = -EINVAL;
4164         if (!bank_num || bank_num > KVM_MAX_MCE_BANKS)
4165                 goto out;
4166         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
4167                 goto out;
4168         r = 0;
4169         vcpu->arch.mcg_cap = mcg_cap;
4170         /* Init IA32_MCG_CTL to all 1s */
4171         if (mcg_cap & MCG_CTL_P)
4172                 vcpu->arch.mcg_ctl = ~(u64)0;
4173         /* Init IA32_MCi_CTL to all 1s */
4174         for (bank = 0; bank < bank_num; bank++)
4175                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
4176
4177         static_call(kvm_x86_setup_mce)(vcpu);
4178 out:
4179         return r;
4180 }
4181
4182 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
4183                                       struct kvm_x86_mce *mce)
4184 {
4185         u64 mcg_cap = vcpu->arch.mcg_cap;
4186         unsigned bank_num = mcg_cap & 0xff;
4187         u64 *banks = vcpu->arch.mce_banks;
4188
4189         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
4190                 return -EINVAL;
4191         /*
4192          * if IA32_MCG_CTL is not all 1s, the uncorrected error
4193          * reporting is disabled
4194          */
4195         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
4196             vcpu->arch.mcg_ctl != ~(u64)0)
4197                 return 0;
4198         banks += 4 * mce->bank;
4199         /*
4200          * if IA32_MCi_CTL is not all 1s, the uncorrected error
4201          * reporting is disabled for the bank
4202          */
4203         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
4204                 return 0;
4205         if (mce->status & MCI_STATUS_UC) {
4206                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
4207                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
4208                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
4209                         return 0;
4210                 }
4211                 if (banks[1] & MCI_STATUS_VAL)
4212                         mce->status |= MCI_STATUS_OVER;
4213                 banks[2] = mce->addr;
4214                 banks[3] = mce->misc;
4215                 vcpu->arch.mcg_status = mce->mcg_status;
4216                 banks[1] = mce->status;
4217                 kvm_queue_exception(vcpu, MC_VECTOR);
4218         } else if (!(banks[1] & MCI_STATUS_VAL)
4219                    || !(banks[1] & MCI_STATUS_UC)) {
4220                 if (banks[1] & MCI_STATUS_VAL)
4221                         mce->status |= MCI_STATUS_OVER;
4222                 banks[2] = mce->addr;
4223                 banks[3] = mce->misc;
4224                 banks[1] = mce->status;
4225         } else
4226                 banks[1] |= MCI_STATUS_OVER;
4227         return 0;
4228 }
4229
4230 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
4231                                                struct kvm_vcpu_events *events)
4232 {
4233         process_nmi(vcpu);
4234
4235         if (kvm_check_request(KVM_REQ_SMI, vcpu))
4236                 process_smi(vcpu);
4237
4238         /*
4239          * In guest mode, payload delivery should be deferred,
4240          * so that the L1 hypervisor can intercept #PF before
4241          * CR2 is modified (or intercept #DB before DR6 is
4242          * modified under nVMX). Unless the per-VM capability,
4243          * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4244          * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4245          * opportunistically defer the exception payload, deliver it if the
4246          * capability hasn't been requested before processing a
4247          * KVM_GET_VCPU_EVENTS.
4248          */
4249         if (!vcpu->kvm->arch.exception_payload_enabled &&
4250             vcpu->arch.exception.pending && vcpu->arch.exception.has_payload)
4251                 kvm_deliver_exception_payload(vcpu);
4252
4253         /*
4254          * The API doesn't provide the instruction length for software
4255          * exceptions, so don't report them. As long as the guest RIP
4256          * isn't advanced, we should expect to encounter the exception
4257          * again.
4258          */
4259         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
4260                 events->exception.injected = 0;
4261                 events->exception.pending = 0;
4262         } else {
4263                 events->exception.injected = vcpu->arch.exception.injected;
4264                 events->exception.pending = vcpu->arch.exception.pending;
4265                 /*
4266                  * For ABI compatibility, deliberately conflate
4267                  * pending and injected exceptions when
4268                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4269                  */
4270                 if (!vcpu->kvm->arch.exception_payload_enabled)
4271                         events->exception.injected |=
4272                                 vcpu->arch.exception.pending;
4273         }
4274         events->exception.nr = vcpu->arch.exception.nr;
4275         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
4276         events->exception.error_code = vcpu->arch.exception.error_code;
4277         events->exception_has_payload = vcpu->arch.exception.has_payload;
4278         events->exception_payload = vcpu->arch.exception.payload;
4279
4280         events->interrupt.injected =
4281                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
4282         events->interrupt.nr = vcpu->arch.interrupt.nr;
4283         events->interrupt.soft = 0;
4284         events->interrupt.shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
4285
4286         events->nmi.injected = vcpu->arch.nmi_injected;
4287         events->nmi.pending = vcpu->arch.nmi_pending != 0;
4288         events->nmi.masked = static_call(kvm_x86_get_nmi_mask)(vcpu);
4289         events->nmi.pad = 0;
4290
4291         events->sipi_vector = 0; /* never valid when reporting to user space */
4292
4293         events->smi.smm = is_smm(vcpu);
4294         events->smi.pending = vcpu->arch.smi_pending;
4295         events->smi.smm_inside_nmi =
4296                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
4297         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
4298
4299         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
4300                          | KVM_VCPUEVENT_VALID_SHADOW
4301                          | KVM_VCPUEVENT_VALID_SMM);
4302         if (vcpu->kvm->arch.exception_payload_enabled)
4303                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
4304
4305         memset(&events->reserved, 0, sizeof(events->reserved));
4306 }
4307
4308 static void kvm_smm_changed(struct kvm_vcpu *vcpu);
4309
4310 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
4311                                               struct kvm_vcpu_events *events)
4312 {
4313         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4314                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4315                               | KVM_VCPUEVENT_VALID_SHADOW
4316                               | KVM_VCPUEVENT_VALID_SMM
4317                               | KVM_VCPUEVENT_VALID_PAYLOAD))
4318                 return -EINVAL;
4319
4320         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
4321                 if (!vcpu->kvm->arch.exception_payload_enabled)
4322                         return -EINVAL;
4323                 if (events->exception.pending)
4324                         events->exception.injected = 0;
4325                 else
4326                         events->exception_has_payload = 0;
4327         } else {
4328                 events->exception.pending = 0;
4329                 events->exception_has_payload = 0;
4330         }
4331
4332         if ((events->exception.injected || events->exception.pending) &&
4333             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
4334                 return -EINVAL;
4335
4336         /* INITs are latched while in SMM */
4337         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
4338             (events->smi.smm || events->smi.pending) &&
4339             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
4340                 return -EINVAL;
4341
4342         process_nmi(vcpu);
4343         vcpu->arch.exception.injected = events->exception.injected;
4344         vcpu->arch.exception.pending = events->exception.pending;
4345         vcpu->arch.exception.nr = events->exception.nr;
4346         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
4347         vcpu->arch.exception.error_code = events->exception.error_code;
4348         vcpu->arch.exception.has_payload = events->exception_has_payload;
4349         vcpu->arch.exception.payload = events->exception_payload;
4350
4351         vcpu->arch.interrupt.injected = events->interrupt.injected;
4352         vcpu->arch.interrupt.nr = events->interrupt.nr;
4353         vcpu->arch.interrupt.soft = events->interrupt.soft;
4354         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
4355                 static_call(kvm_x86_set_interrupt_shadow)(vcpu,
4356                                                 events->interrupt.shadow);
4357
4358         vcpu->arch.nmi_injected = events->nmi.injected;
4359         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
4360                 vcpu->arch.nmi_pending = events->nmi.pending;
4361         static_call(kvm_x86_set_nmi_mask)(vcpu, events->nmi.masked);
4362
4363         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
4364             lapic_in_kernel(vcpu))
4365                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
4366
4367         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
4368                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
4369                         if (events->smi.smm)
4370                                 vcpu->arch.hflags |= HF_SMM_MASK;
4371                         else
4372                                 vcpu->arch.hflags &= ~HF_SMM_MASK;
4373                         kvm_smm_changed(vcpu);
4374                 }
4375
4376                 vcpu->arch.smi_pending = events->smi.pending;
4377
4378                 if (events->smi.smm) {
4379                         if (events->smi.smm_inside_nmi)
4380                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
4381                         else
4382                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
4383                 }
4384
4385                 if (lapic_in_kernel(vcpu)) {
4386                         if (events->smi.latched_init)
4387                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4388                         else
4389                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4390                 }
4391         }
4392
4393         kvm_make_request(KVM_REQ_EVENT, vcpu);
4394
4395         return 0;
4396 }
4397
4398 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
4399                                              struct kvm_debugregs *dbgregs)
4400 {
4401         unsigned long val;
4402
4403         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
4404         kvm_get_dr(vcpu, 6, &val);
4405         dbgregs->dr6 = val;
4406         dbgregs->dr7 = vcpu->arch.dr7;
4407         dbgregs->flags = 0;
4408         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
4409 }
4410
4411 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
4412                                             struct kvm_debugregs *dbgregs)
4413 {
4414         if (dbgregs->flags)
4415                 return -EINVAL;
4416
4417         if (!kvm_dr6_valid(dbgregs->dr6))
4418                 return -EINVAL;
4419         if (!kvm_dr7_valid(dbgregs->dr7))
4420                 return -EINVAL;
4421
4422         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
4423         kvm_update_dr0123(vcpu);
4424         vcpu->arch.dr6 = dbgregs->dr6;
4425         vcpu->arch.dr7 = dbgregs->dr7;
4426         kvm_update_dr7(vcpu);
4427
4428         return 0;
4429 }
4430
4431 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
4432
4433 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
4434 {
4435         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4436         u64 xstate_bv = xsave->header.xfeatures;
4437         u64 valid;
4438
4439         /*
4440          * Copy legacy XSAVE area, to avoid complications with CPUID
4441          * leaves 0 and 1 in the loop below.
4442          */
4443         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
4444
4445         /* Set XSTATE_BV */
4446         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
4447         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
4448
4449         /*
4450          * Copy each region from the possibly compacted offset to the
4451          * non-compacted offset.
4452          */
4453         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4454         while (valid) {
4455                 u64 xfeature_mask = valid & -valid;
4456                 int xfeature_nr = fls64(xfeature_mask) - 1;
4457                 void *src = get_xsave_addr(xsave, xfeature_nr);
4458
4459                 if (src) {
4460                         u32 size, offset, ecx, edx;
4461                         cpuid_count(XSTATE_CPUID, xfeature_nr,
4462                                     &size, &offset, &ecx, &edx);
4463                         if (xfeature_nr == XFEATURE_PKRU)
4464                                 memcpy(dest + offset, &vcpu->arch.pkru,
4465                                        sizeof(vcpu->arch.pkru));
4466                         else
4467                                 memcpy(dest + offset, src, size);
4468
4469                 }
4470
4471                 valid -= xfeature_mask;
4472         }
4473 }
4474
4475 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
4476 {
4477         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4478         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
4479         u64 valid;
4480
4481         /*
4482          * Copy legacy XSAVE area, to avoid complications with CPUID
4483          * leaves 0 and 1 in the loop below.
4484          */
4485         memcpy(xsave, src, XSAVE_HDR_OFFSET);
4486
4487         /* Set XSTATE_BV and possibly XCOMP_BV.  */
4488         xsave->header.xfeatures = xstate_bv;
4489         if (boot_cpu_has(X86_FEATURE_XSAVES))
4490                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
4491
4492         /*
4493          * Copy each region from the non-compacted offset to the
4494          * possibly compacted offset.
4495          */
4496         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4497         while (valid) {
4498                 u64 xfeature_mask = valid & -valid;
4499                 int xfeature_nr = fls64(xfeature_mask) - 1;
4500                 void *dest = get_xsave_addr(xsave, xfeature_nr);
4501
4502                 if (dest) {
4503                         u32 size, offset, ecx, edx;
4504                         cpuid_count(XSTATE_CPUID, xfeature_nr,
4505                                     &size, &offset, &ecx, &edx);
4506                         if (xfeature_nr == XFEATURE_PKRU)
4507                                 memcpy(&vcpu->arch.pkru, src + offset,
4508                                        sizeof(vcpu->arch.pkru));
4509                         else
4510                                 memcpy(dest, src + offset, size);
4511                 }
4512
4513                 valid -= xfeature_mask;
4514         }
4515 }
4516
4517 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
4518                                          struct kvm_xsave *guest_xsave)
4519 {
4520         if (!vcpu->arch.guest_fpu)
4521                 return;
4522
4523         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4524                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
4525                 fill_xsave((u8 *) guest_xsave->region, vcpu);
4526         } else {
4527                 memcpy(guest_xsave->region,
4528                         &vcpu->arch.guest_fpu->state.fxsave,
4529                         sizeof(struct fxregs_state));
4530                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
4531                         XFEATURE_MASK_FPSSE;
4532         }
4533 }
4534
4535 #define XSAVE_MXCSR_OFFSET 24
4536
4537 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
4538                                         struct kvm_xsave *guest_xsave)
4539 {
4540         u64 xstate_bv;
4541         u32 mxcsr;
4542
4543         if (!vcpu->arch.guest_fpu)
4544                 return 0;
4545
4546         xstate_bv = *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
4547         mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
4548
4549         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4550                 /*
4551                  * Here we allow setting states that are not present in
4552                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
4553                  * with old userspace.
4554                  */
4555                 if (xstate_bv & ~supported_xcr0 || mxcsr & ~mxcsr_feature_mask)
4556                         return -EINVAL;
4557                 load_xsave(vcpu, (u8 *)guest_xsave->region);
4558         } else {
4559                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
4560                         mxcsr & ~mxcsr_feature_mask)
4561                         return -EINVAL;
4562                 memcpy(&vcpu->arch.guest_fpu->state.fxsave,
4563                         guest_xsave->region, sizeof(struct fxregs_state));
4564         }
4565         return 0;
4566 }
4567
4568 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
4569                                         struct kvm_xcrs *guest_xcrs)
4570 {
4571         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
4572                 guest_xcrs->nr_xcrs = 0;
4573                 return;
4574         }
4575
4576         guest_xcrs->nr_xcrs = 1;
4577         guest_xcrs->flags = 0;
4578         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
4579         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
4580 }
4581
4582 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
4583                                        struct kvm_xcrs *guest_xcrs)
4584 {
4585         int i, r = 0;
4586
4587         if (!boot_cpu_has(X86_FEATURE_XSAVE))
4588                 return -EINVAL;
4589
4590         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
4591                 return -EINVAL;
4592
4593         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
4594                 /* Only support XCR0 currently */
4595                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
4596                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
4597                                 guest_xcrs->xcrs[i].value);
4598                         break;
4599                 }
4600         if (r)
4601                 r = -EINVAL;
4602         return r;
4603 }
4604
4605 /*
4606  * kvm_set_guest_paused() indicates to the guest kernel that it has been
4607  * stopped by the hypervisor.  This function will be called from the host only.
4608  * EINVAL is returned when the host attempts to set the flag for a guest that
4609  * does not support pv clocks.
4610  */
4611 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
4612 {
4613         if (!vcpu->arch.pv_time_enabled)
4614                 return -EINVAL;
4615         vcpu->arch.pvclock_set_guest_stopped_request = true;
4616         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4617         return 0;
4618 }
4619
4620 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
4621                                      struct kvm_enable_cap *cap)
4622 {
4623         int r;
4624         uint16_t vmcs_version;
4625         void __user *user_ptr;
4626
4627         if (cap->flags)
4628                 return -EINVAL;
4629
4630         switch (cap->cap) {
4631         case KVM_CAP_HYPERV_SYNIC2:
4632                 if (cap->args[0])
4633                         return -EINVAL;
4634                 fallthrough;
4635
4636         case KVM_CAP_HYPERV_SYNIC:
4637                 if (!irqchip_in_kernel(vcpu->kvm))
4638                         return -EINVAL;
4639                 return kvm_hv_activate_synic(vcpu, cap->cap ==
4640                                              KVM_CAP_HYPERV_SYNIC2);
4641         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4642                 if (!kvm_x86_ops.nested_ops->enable_evmcs)
4643                         return -ENOTTY;
4644                 r = kvm_x86_ops.nested_ops->enable_evmcs(vcpu, &vmcs_version);
4645                 if (!r) {
4646                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
4647                         if (copy_to_user(user_ptr, &vmcs_version,
4648                                          sizeof(vmcs_version)))
4649                                 r = -EFAULT;
4650                 }
4651                 return r;
4652         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4653                 if (!kvm_x86_ops.enable_direct_tlbflush)
4654                         return -ENOTTY;
4655
4656                 return static_call(kvm_x86_enable_direct_tlbflush)(vcpu);
4657
4658         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4659                 vcpu->arch.pv_cpuid.enforce = cap->args[0];
4660                 if (vcpu->arch.pv_cpuid.enforce)
4661                         kvm_update_pv_runtime(vcpu);
4662
4663                 return 0;
4664
4665         default:
4666                 return -EINVAL;
4667         }
4668 }
4669
4670 long kvm_arch_vcpu_ioctl(struct file *filp,
4671                          unsigned int ioctl, unsigned long arg)
4672 {
4673         struct kvm_vcpu *vcpu = filp->private_data;
4674         void __user *argp = (void __user *)arg;
4675         int r;
4676         union {
4677                 struct kvm_lapic_state *lapic;
4678                 struct kvm_xsave *xsave;
4679                 struct kvm_xcrs *xcrs;
4680                 void *buffer;
4681         } u;
4682
4683         vcpu_load(vcpu);
4684
4685         u.buffer = NULL;
4686         switch (ioctl) {
4687         case KVM_GET_LAPIC: {
4688                 r = -EINVAL;
4689                 if (!lapic_in_kernel(vcpu))
4690                         goto out;
4691                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
4692                                 GFP_KERNEL_ACCOUNT);
4693
4694                 r = -ENOMEM;
4695                 if (!u.lapic)
4696                         goto out;
4697                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
4698                 if (r)
4699                         goto out;
4700                 r = -EFAULT;
4701                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
4702                         goto out;
4703                 r = 0;
4704                 break;
4705         }
4706         case KVM_SET_LAPIC: {
4707                 r = -EINVAL;
4708                 if (!lapic_in_kernel(vcpu))
4709                         goto out;
4710                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
4711                 if (IS_ERR(u.lapic)) {
4712                         r = PTR_ERR(u.lapic);
4713                         goto out_nofree;
4714                 }
4715
4716                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
4717                 break;
4718         }
4719         case KVM_INTERRUPT: {
4720                 struct kvm_interrupt irq;
4721
4722                 r = -EFAULT;
4723                 if (copy_from_user(&irq, argp, sizeof(irq)))
4724                         goto out;
4725                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
4726                 break;
4727         }
4728         case KVM_NMI: {
4729                 r = kvm_vcpu_ioctl_nmi(vcpu);
4730                 break;
4731         }
4732         case KVM_SMI: {
4733                 r = kvm_vcpu_ioctl_smi(vcpu);
4734                 break;
4735         }
4736         case KVM_SET_CPUID: {
4737                 struct kvm_cpuid __user *cpuid_arg = argp;
4738                 struct kvm_cpuid cpuid;
4739
4740                 r = -EFAULT;
4741                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4742                         goto out;
4743                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4744                 break;
4745         }
4746         case KVM_SET_CPUID2: {
4747                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4748                 struct kvm_cpuid2 cpuid;
4749
4750                 r = -EFAULT;
4751                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4752                         goto out;
4753                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
4754                                               cpuid_arg->entries);
4755                 break;
4756         }
4757         case KVM_GET_CPUID2: {
4758                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4759                 struct kvm_cpuid2 cpuid;
4760
4761                 r = -EFAULT;
4762                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4763                         goto out;
4764                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
4765                                               cpuid_arg->entries);
4766                 if (r)
4767                         goto out;
4768                 r = -EFAULT;
4769                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4770                         goto out;
4771                 r = 0;
4772                 break;
4773         }
4774         case KVM_GET_MSRS: {
4775                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4776                 r = msr_io(vcpu, argp, do_get_msr, 1);
4777                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4778                 break;
4779         }
4780         case KVM_SET_MSRS: {
4781                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4782                 r = msr_io(vcpu, argp, do_set_msr, 0);
4783                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4784                 break;
4785         }
4786         case KVM_TPR_ACCESS_REPORTING: {
4787                 struct kvm_tpr_access_ctl tac;
4788
4789                 r = -EFAULT;
4790                 if (copy_from_user(&tac, argp, sizeof(tac)))
4791                         goto out;
4792                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
4793                 if (r)
4794                         goto out;
4795                 r = -EFAULT;
4796                 if (copy_to_user(argp, &tac, sizeof(tac)))
4797                         goto out;
4798                 r = 0;
4799                 break;
4800         };
4801         case KVM_SET_VAPIC_ADDR: {
4802                 struct kvm_vapic_addr va;
4803                 int idx;
4804
4805                 r = -EINVAL;
4806                 if (!lapic_in_kernel(vcpu))
4807                         goto out;
4808                 r = -EFAULT;
4809                 if (copy_from_user(&va, argp, sizeof(va)))
4810                         goto out;
4811                 idx = srcu_read_lock(&vcpu->kvm->srcu);
4812                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
4813                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4814                 break;
4815         }
4816         case KVM_X86_SETUP_MCE: {
4817                 u64 mcg_cap;
4818
4819                 r = -EFAULT;
4820                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
4821                         goto out;
4822                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
4823                 break;
4824         }
4825         case KVM_X86_SET_MCE: {
4826                 struct kvm_x86_mce mce;
4827
4828                 r = -EFAULT;
4829                 if (copy_from_user(&mce, argp, sizeof(mce)))
4830                         goto out;
4831                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
4832                 break;
4833         }
4834         case KVM_GET_VCPU_EVENTS: {
4835                 struct kvm_vcpu_events events;
4836
4837                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
4838
4839                 r = -EFAULT;
4840                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
4841                         break;
4842                 r = 0;
4843                 break;
4844         }
4845         case KVM_SET_VCPU_EVENTS: {
4846                 struct kvm_vcpu_events events;
4847
4848                 r = -EFAULT;
4849                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
4850                         break;
4851
4852                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
4853                 break;
4854         }
4855         case KVM_GET_DEBUGREGS: {
4856                 struct kvm_debugregs dbgregs;
4857
4858                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
4859
4860                 r = -EFAULT;
4861                 if (copy_to_user(argp, &dbgregs,
4862                                  sizeof(struct kvm_debugregs)))
4863                         break;
4864                 r = 0;
4865                 break;
4866         }
4867         case KVM_SET_DEBUGREGS: {
4868                 struct kvm_debugregs dbgregs;
4869
4870                 r = -EFAULT;
4871                 if (copy_from_user(&dbgregs, argp,
4872                                    sizeof(struct kvm_debugregs)))
4873                         break;
4874
4875                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
4876                 break;
4877         }
4878         case KVM_GET_XSAVE: {
4879                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
4880                 r = -ENOMEM;
4881                 if (!u.xsave)
4882                         break;
4883
4884                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
4885
4886                 r = -EFAULT;
4887                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
4888                         break;
4889                 r = 0;
4890                 break;
4891         }
4892         case KVM_SET_XSAVE: {
4893                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
4894                 if (IS_ERR(u.xsave)) {
4895                         r = PTR_ERR(u.xsave);
4896                         goto out_nofree;
4897                 }
4898
4899                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
4900                 break;
4901         }
4902         case KVM_GET_XCRS: {
4903                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
4904                 r = -ENOMEM;
4905                 if (!u.xcrs)
4906                         break;
4907
4908                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
4909
4910                 r = -EFAULT;
4911                 if (copy_to_user(argp, u.xcrs,
4912                                  sizeof(struct kvm_xcrs)))
4913                         break;
4914                 r = 0;
4915                 break;
4916         }
4917         case KVM_SET_XCRS: {
4918                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
4919                 if (IS_ERR(u.xcrs)) {
4920                         r = PTR_ERR(u.xcrs);
4921                         goto out_nofree;
4922                 }
4923
4924                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
4925                 break;
4926         }
4927         case KVM_SET_TSC_KHZ: {
4928                 u32 user_tsc_khz;
4929
4930                 r = -EINVAL;
4931                 user_tsc_khz = (u32)arg;
4932
4933                 if (kvm_has_tsc_control &&
4934                     user_tsc_khz >= kvm_max_guest_tsc_khz)
4935                         goto out;
4936
4937                 if (user_tsc_khz == 0)
4938                         user_tsc_khz = tsc_khz;
4939
4940                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
4941                         r = 0;
4942
4943                 goto out;
4944         }
4945         case KVM_GET_TSC_KHZ: {
4946                 r = vcpu->arch.virtual_tsc_khz;
4947                 goto out;
4948         }
4949         case KVM_KVMCLOCK_CTRL: {
4950                 r = kvm_set_guest_paused(vcpu);
4951                 goto out;
4952         }
4953         case KVM_ENABLE_CAP: {
4954                 struct kvm_enable_cap cap;
4955
4956                 r = -EFAULT;
4957                 if (copy_from_user(&cap, argp, sizeof(cap)))
4958                         goto out;
4959                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
4960                 break;
4961         }
4962         case KVM_GET_NESTED_STATE: {
4963                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4964                 u32 user_data_size;
4965
4966                 r = -EINVAL;
4967                 if (!kvm_x86_ops.nested_ops->get_state)
4968                         break;
4969
4970                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
4971                 r = -EFAULT;
4972                 if (get_user(user_data_size, &user_kvm_nested_state->size))
4973                         break;
4974
4975                 r = kvm_x86_ops.nested_ops->get_state(vcpu, user_kvm_nested_state,
4976                                                      user_data_size);
4977                 if (r < 0)
4978                         break;
4979
4980                 if (r > user_data_size) {
4981                         if (put_user(r, &user_kvm_nested_state->size))
4982                                 r = -EFAULT;
4983                         else
4984                                 r = -E2BIG;
4985                         break;
4986                 }
4987
4988                 r = 0;
4989                 break;
4990         }
4991         case KVM_SET_NESTED_STATE: {
4992                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4993                 struct kvm_nested_state kvm_state;
4994                 int idx;
4995
4996                 r = -EINVAL;
4997                 if (!kvm_x86_ops.nested_ops->set_state)
4998                         break;
4999
5000                 r = -EFAULT;
5001                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
5002                         break;
5003
5004                 r = -EINVAL;
5005                 if (kvm_state.size < sizeof(kvm_state))
5006                         break;
5007
5008                 if (kvm_state.flags &
5009                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
5010                       | KVM_STATE_NESTED_EVMCS | KVM_STATE_NESTED_MTF_PENDING
5011                       | KVM_STATE_NESTED_GIF_SET))
5012                         break;
5013
5014                 /* nested_run_pending implies guest_mode.  */
5015                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
5016                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
5017                         break;
5018
5019                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5020                 r = kvm_x86_ops.nested_ops->set_state(vcpu, user_kvm_nested_state, &kvm_state);
5021                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5022                 break;
5023         }
5024         case KVM_GET_SUPPORTED_HV_CPUID:
5025                 r = kvm_ioctl_get_supported_hv_cpuid(vcpu, argp);
5026                 break;
5027         case KVM_XEN_VCPU_GET_ATTR: {
5028                 struct kvm_xen_vcpu_attr xva;
5029
5030                 r = -EFAULT;
5031                 if (copy_from_user(&xva, argp, sizeof(xva)))
5032                         goto out;
5033                 r = kvm_xen_vcpu_get_attr(vcpu, &xva);
5034                 if (!r && copy_to_user(argp, &xva, sizeof(xva)))
5035                         r = -EFAULT;
5036                 break;
5037         }
5038         case KVM_XEN_VCPU_SET_ATTR: {
5039                 struct kvm_xen_vcpu_attr xva;
5040
5041                 r = -EFAULT;
5042                 if (copy_from_user(&xva, argp, sizeof(xva)))
5043                         goto out;
5044                 r = kvm_xen_vcpu_set_attr(vcpu, &xva);
5045                 break;
5046         }
5047         default:
5048                 r = -EINVAL;
5049         }
5050 out:
5051         kfree(u.buffer);
5052 out_nofree:
5053         vcpu_put(vcpu);
5054         return r;
5055 }
5056
5057 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
5058 {
5059         return VM_FAULT_SIGBUS;
5060 }
5061
5062 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
5063 {
5064         int ret;
5065
5066         if (addr > (unsigned int)(-3 * PAGE_SIZE))
5067                 return -EINVAL;
5068         ret = static_call(kvm_x86_set_tss_addr)(kvm, addr);
5069         return ret;
5070 }
5071
5072 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
5073                                               u64 ident_addr)
5074 {
5075         return static_call(kvm_x86_set_identity_map_addr)(kvm, ident_addr);
5076 }
5077
5078 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
5079                                          unsigned long kvm_nr_mmu_pages)
5080 {
5081         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
5082                 return -EINVAL;
5083
5084         mutex_lock(&kvm->slots_lock);
5085
5086         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
5087         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
5088
5089         mutex_unlock(&kvm->slots_lock);
5090         return 0;
5091 }
5092
5093 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
5094 {
5095         return kvm->arch.n_max_mmu_pages;
5096 }
5097
5098 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5099 {
5100         struct kvm_pic *pic = kvm->arch.vpic;
5101         int r;
5102
5103         r = 0;
5104         switch (chip->chip_id) {
5105         case KVM_IRQCHIP_PIC_MASTER:
5106                 memcpy(&chip->chip.pic, &pic->pics[0],
5107                         sizeof(struct kvm_pic_state));
5108                 break;
5109         case KVM_IRQCHIP_PIC_SLAVE:
5110                 memcpy(&chip->chip.pic, &pic->pics[1],
5111                         sizeof(struct kvm_pic_state));
5112                 break;
5113         case KVM_IRQCHIP_IOAPIC:
5114                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
5115                 break;
5116         default:
5117                 r = -EINVAL;
5118                 break;
5119         }
5120         return r;
5121 }
5122
5123 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5124 {
5125         struct kvm_pic *pic = kvm->arch.vpic;
5126         int r;
5127
5128         r = 0;
5129         switch (chip->chip_id) {
5130         case KVM_IRQCHIP_PIC_MASTER:
5131                 spin_lock(&pic->lock);
5132                 memcpy(&pic->pics[0], &chip->chip.pic,
5133                         sizeof(struct kvm_pic_state));
5134                 spin_unlock(&pic->lock);
5135                 break;
5136         case KVM_IRQCHIP_PIC_SLAVE:
5137                 spin_lock(&pic->lock);
5138                 memcpy(&pic->pics[1], &chip->chip.pic,
5139                         sizeof(struct kvm_pic_state));
5140                 spin_unlock(&pic->lock);
5141                 break;
5142         case KVM_IRQCHIP_IOAPIC:
5143                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
5144                 break;
5145         default:
5146                 r = -EINVAL;
5147                 break;
5148         }
5149         kvm_pic_update_irq(pic);
5150         return r;
5151 }
5152
5153 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5154 {
5155         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
5156
5157         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
5158
5159         mutex_lock(&kps->lock);
5160         memcpy(ps, &kps->channels, sizeof(*ps));
5161         mutex_unlock(&kps->lock);
5162         return 0;
5163 }
5164
5165 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5166 {
5167         int i;
5168         struct kvm_pit *pit = kvm->arch.vpit;
5169
5170         mutex_lock(&pit->pit_state.lock);
5171         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
5172         for (i = 0; i < 3; i++)
5173                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
5174         mutex_unlock(&pit->pit_state.lock);
5175         return 0;
5176 }
5177
5178 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5179 {
5180         mutex_lock(&kvm->arch.vpit->pit_state.lock);
5181         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
5182                 sizeof(ps->channels));
5183         ps->flags = kvm->arch.vpit->pit_state.flags;
5184         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
5185         memset(&ps->reserved, 0, sizeof(ps->reserved));
5186         return 0;
5187 }
5188
5189 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5190 {
5191         int start = 0;
5192         int i;
5193         u32 prev_legacy, cur_legacy;
5194         struct kvm_pit *pit = kvm->arch.vpit;
5195
5196         mutex_lock(&pit->pit_state.lock);
5197         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
5198         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
5199         if (!prev_legacy && cur_legacy)
5200                 start = 1;
5201         memcpy(&pit->pit_state.channels, &ps->channels,
5202                sizeof(pit->pit_state.channels));
5203         pit->pit_state.flags = ps->flags;
5204         for (i = 0; i < 3; i++)
5205                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
5206                                    start && i == 0);
5207         mutex_unlock(&pit->pit_state.lock);
5208         return 0;
5209 }
5210
5211 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
5212                                  struct kvm_reinject_control *control)
5213 {
5214         struct kvm_pit *pit = kvm->arch.vpit;
5215
5216         /* pit->pit_state.lock was overloaded to prevent userspace from getting
5217          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5218          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
5219          */
5220         mutex_lock(&pit->pit_state.lock);
5221         kvm_pit_set_reinject(pit, control->pit_reinject);
5222         mutex_unlock(&pit->pit_state.lock);
5223
5224         return 0;
5225 }
5226
5227 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
5228 {
5229         /*
5230          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
5231          */
5232         static_call_cond(kvm_x86_flush_log_dirty)(kvm);
5233 }
5234
5235 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
5236                         bool line_status)
5237 {
5238         if (!irqchip_in_kernel(kvm))
5239                 return -ENXIO;
5240
5241         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
5242                                         irq_event->irq, irq_event->level,
5243                                         line_status);
5244         return 0;
5245 }
5246
5247 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
5248                             struct kvm_enable_cap *cap)
5249 {
5250         int r;
5251
5252         if (cap->flags)
5253                 return -EINVAL;
5254
5255         switch (cap->cap) {
5256         case KVM_CAP_DISABLE_QUIRKS:
5257                 kvm->arch.disabled_quirks = cap->args[0];
5258                 r = 0;
5259                 break;
5260         case KVM_CAP_SPLIT_IRQCHIP: {
5261                 mutex_lock(&kvm->lock);
5262                 r = -EINVAL;
5263                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
5264                         goto split_irqchip_unlock;
5265                 r = -EEXIST;
5266                 if (irqchip_in_kernel(kvm))
5267                         goto split_irqchip_unlock;
5268                 if (kvm->created_vcpus)
5269                         goto split_irqchip_unlock;
5270                 r = kvm_setup_empty_irq_routing(kvm);
5271                 if (r)
5272                         goto split_irqchip_unlock;
5273                 /* Pairs with irqchip_in_kernel. */
5274                 smp_wmb();
5275                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
5276                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
5277                 r = 0;
5278 split_irqchip_unlock:
5279                 mutex_unlock(&kvm->lock);
5280                 break;
5281         }
5282         case KVM_CAP_X2APIC_API:
5283                 r = -EINVAL;
5284                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
5285                         break;
5286
5287                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
5288                         kvm->arch.x2apic_format = true;
5289                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
5290                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
5291
5292                 r = 0;
5293                 break;
5294         case KVM_CAP_X86_DISABLE_EXITS:
5295                 r = -EINVAL;
5296                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
5297                         break;
5298
5299                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
5300                         kvm_can_mwait_in_guest())
5301                         kvm->arch.mwait_in_guest = true;
5302                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
5303                         kvm->arch.hlt_in_guest = true;
5304                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
5305                         kvm->arch.pause_in_guest = true;
5306                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
5307                         kvm->arch.cstate_in_guest = true;
5308                 r = 0;
5309                 break;
5310         case KVM_CAP_MSR_PLATFORM_INFO:
5311                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
5312                 r = 0;
5313                 break;
5314         case KVM_CAP_EXCEPTION_PAYLOAD:
5315                 kvm->arch.exception_payload_enabled = cap->args[0];
5316                 r = 0;
5317                 break;
5318         case KVM_CAP_X86_USER_SPACE_MSR:
5319                 kvm->arch.user_space_msr_mask = cap->args[0];
5320                 r = 0;
5321                 break;
5322         case KVM_CAP_X86_BUS_LOCK_EXIT:
5323                 r = -EINVAL;
5324                 if (cap->args[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE)
5325                         break;
5326
5327                 if ((cap->args[0] & KVM_BUS_LOCK_DETECTION_OFF) &&
5328                     (cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT))
5329                         break;
5330
5331                 if (kvm_has_bus_lock_exit &&
5332                     cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT)
5333                         kvm->arch.bus_lock_detection_enabled = true;
5334                 r = 0;
5335                 break;
5336         default:
5337                 r = -EINVAL;
5338                 break;
5339         }
5340         return r;
5341 }
5342
5343 static void kvm_clear_msr_filter(struct kvm *kvm)
5344 {
5345         u32 i;
5346         u32 count = kvm->arch.msr_filter.count;
5347         struct msr_bitmap_range ranges[16];
5348
5349         mutex_lock(&kvm->lock);
5350         kvm->arch.msr_filter.count = 0;
5351         memcpy(ranges, kvm->arch.msr_filter.ranges, count * sizeof(ranges[0]));
5352         mutex_unlock(&kvm->lock);
5353         synchronize_srcu(&kvm->srcu);
5354
5355         for (i = 0; i < count; i++)
5356                 kfree(ranges[i].bitmap);
5357 }
5358
5359 static int kvm_add_msr_filter(struct kvm *kvm, struct kvm_msr_filter_range *user_range)
5360 {
5361         struct msr_bitmap_range *ranges = kvm->arch.msr_filter.ranges;
5362         struct msr_bitmap_range range;
5363         unsigned long *bitmap = NULL;
5364         size_t bitmap_size;
5365         int r;
5366
5367         if (!user_range->nmsrs)
5368                 return 0;
5369
5370         bitmap_size = BITS_TO_LONGS(user_range->nmsrs) * sizeof(long);
5371         if (!bitmap_size || bitmap_size > KVM_MSR_FILTER_MAX_BITMAP_SIZE)
5372                 return -EINVAL;
5373
5374         bitmap = memdup_user((__user u8*)user_range->bitmap, bitmap_size);
5375         if (IS_ERR(bitmap))
5376                 return PTR_ERR(bitmap);
5377
5378         range = (struct msr_bitmap_range) {
5379                 .flags = user_range->flags,
5380                 .base = user_range->base,
5381                 .nmsrs = user_range->nmsrs,
5382                 .bitmap = bitmap,
5383         };
5384
5385         if (range.flags & ~(KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE)) {
5386                 r = -EINVAL;
5387                 goto err;
5388         }
5389
5390         if (!range.flags) {
5391                 r = -EINVAL;
5392                 goto err;
5393         }
5394
5395         /* Everything ok, add this range identifier to our global pool */
5396         ranges[kvm->arch.msr_filter.count] = range;
5397         /* Make sure we filled the array before we tell anyone to walk it */
5398         smp_wmb();
5399         kvm->arch.msr_filter.count++;
5400
5401         return 0;
5402 err:
5403         kfree(bitmap);
5404         return r;
5405 }
5406
5407 static int kvm_vm_ioctl_set_msr_filter(struct kvm *kvm, void __user *argp)
5408 {
5409         struct kvm_msr_filter __user *user_msr_filter = argp;
5410         struct kvm_msr_filter filter;
5411         bool default_allow;
5412         int r = 0;
5413         bool empty = true;
5414         u32 i;
5415
5416         if (copy_from_user(&filter, user_msr_filter, sizeof(filter)))
5417                 return -EFAULT;
5418
5419         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++)
5420                 empty &= !filter.ranges[i].nmsrs;
5421
5422         default_allow = !(filter.flags & KVM_MSR_FILTER_DEFAULT_DENY);
5423         if (empty && !default_allow)
5424                 return -EINVAL;
5425
5426         kvm_clear_msr_filter(kvm);
5427
5428         kvm->arch.msr_filter.default_allow = default_allow;
5429
5430         /*
5431          * Protect from concurrent calls to this function that could trigger
5432          * a TOCTOU violation on kvm->arch.msr_filter.count.
5433          */
5434         mutex_lock(&kvm->lock);
5435         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++) {
5436                 r = kvm_add_msr_filter(kvm, &filter.ranges[i]);
5437                 if (r)
5438                         break;
5439         }
5440
5441         kvm_make_all_cpus_request(kvm, KVM_REQ_MSR_FILTER_CHANGED);
5442         mutex_unlock(&kvm->lock);
5443
5444         return r;
5445 }
5446
5447 long kvm_arch_vm_ioctl(struct file *filp,
5448                        unsigned int ioctl, unsigned long arg)
5449 {
5450         struct kvm *kvm = filp->private_data;
5451         void __user *argp = (void __user *)arg;
5452         int r = -ENOTTY;
5453         /*
5454          * This union makes it completely explicit to gcc-3.x
5455          * that these two variables' stack usage should be
5456          * combined, not added together.
5457          */
5458         union {
5459                 struct kvm_pit_state ps;
5460                 struct kvm_pit_state2 ps2;
5461                 struct kvm_pit_config pit_config;
5462         } u;
5463
5464         switch (ioctl) {
5465         case KVM_SET_TSS_ADDR:
5466                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
5467                 break;
5468         case KVM_SET_IDENTITY_MAP_ADDR: {
5469                 u64 ident_addr;
5470
5471                 mutex_lock(&kvm->lock);
5472                 r = -EINVAL;
5473                 if (kvm->created_vcpus)
5474                         goto set_identity_unlock;
5475                 r = -EFAULT;
5476                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
5477                         goto set_identity_unlock;
5478                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
5479 set_identity_unlock:
5480                 mutex_unlock(&kvm->lock);
5481                 break;
5482         }
5483         case KVM_SET_NR_MMU_PAGES:
5484                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
5485                 break;
5486         case KVM_GET_NR_MMU_PAGES:
5487                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
5488                 break;
5489         case KVM_CREATE_IRQCHIP: {
5490                 mutex_lock(&kvm->lock);
5491
5492                 r = -EEXIST;
5493                 if (irqchip_in_kernel(kvm))
5494                         goto create_irqchip_unlock;
5495
5496                 r = -EINVAL;
5497                 if (kvm->created_vcpus)
5498                         goto create_irqchip_unlock;
5499
5500                 r = kvm_pic_init(kvm);
5501                 if (r)
5502                         goto create_irqchip_unlock;
5503
5504                 r = kvm_ioapic_init(kvm);
5505                 if (r) {
5506                         kvm_pic_destroy(kvm);
5507                         goto create_irqchip_unlock;
5508                 }
5509
5510                 r = kvm_setup_default_irq_routing(kvm);
5511                 if (r) {
5512                         kvm_ioapic_destroy(kvm);
5513                         kvm_pic_destroy(kvm);
5514                         goto create_irqchip_unlock;
5515                 }
5516                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
5517                 smp_wmb();
5518                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
5519         create_irqchip_unlock:
5520                 mutex_unlock(&kvm->lock);
5521                 break;
5522         }
5523         case KVM_CREATE_PIT:
5524                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
5525                 goto create_pit;
5526         case KVM_CREATE_PIT2:
5527                 r = -EFAULT;
5528                 if (copy_from_user(&u.pit_config, argp,
5529                                    sizeof(struct kvm_pit_config)))
5530                         goto out;
5531         create_pit:
5532                 mutex_lock(&kvm->lock);
5533                 r = -EEXIST;
5534                 if (kvm->arch.vpit)
5535                         goto create_pit_unlock;
5536                 r = -ENOMEM;
5537                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
5538                 if (kvm->arch.vpit)
5539                         r = 0;
5540         create_pit_unlock:
5541                 mutex_unlock(&kvm->lock);
5542                 break;
5543         case KVM_GET_IRQCHIP: {
5544                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5545                 struct kvm_irqchip *chip;
5546
5547                 chip = memdup_user(argp, sizeof(*chip));
5548                 if (IS_ERR(chip)) {
5549                         r = PTR_ERR(chip);
5550                         goto out;
5551                 }
5552
5553                 r = -ENXIO;
5554                 if (!irqchip_kernel(kvm))
5555                         goto get_irqchip_out;
5556                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
5557                 if (r)
5558                         goto get_irqchip_out;
5559                 r = -EFAULT;
5560                 if (copy_to_user(argp, chip, sizeof(*chip)))
5561                         goto get_irqchip_out;
5562                 r = 0;
5563         get_irqchip_out:
5564                 kfree(chip);
5565                 break;
5566         }
5567         case KVM_SET_IRQCHIP: {
5568                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5569                 struct kvm_irqchip *chip;
5570
5571                 chip = memdup_user(argp, sizeof(*chip));
5572                 if (IS_ERR(chip)) {
5573                         r = PTR_ERR(chip);
5574                         goto out;
5575                 }
5576
5577                 r = -ENXIO;
5578                 if (!irqchip_kernel(kvm))
5579                         goto set_irqchip_out;
5580                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
5581         set_irqchip_out:
5582                 kfree(chip);
5583                 break;
5584         }
5585         case KVM_GET_PIT: {
5586                 r = -EFAULT;
5587                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
5588                         goto out;
5589                 r = -ENXIO;
5590                 if (!kvm->arch.vpit)
5591                         goto out;
5592                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
5593                 if (r)
5594                         goto out;
5595                 r = -EFAULT;
5596                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
5597                         goto out;
5598                 r = 0;
5599                 break;
5600         }
5601         case KVM_SET_PIT: {
5602                 r = -EFAULT;
5603                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
5604                         goto out;
5605                 mutex_lock(&kvm->lock);
5606                 r = -ENXIO;
5607                 if (!kvm->arch.vpit)
5608                         goto set_pit_out;
5609                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
5610 set_pit_out:
5611                 mutex_unlock(&kvm->lock);
5612                 break;
5613         }
5614         case KVM_GET_PIT2: {
5615                 r = -ENXIO;
5616                 if (!kvm->arch.vpit)
5617                         goto out;
5618                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
5619                 if (r)
5620                         goto out;
5621                 r = -EFAULT;
5622                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
5623                         goto out;
5624                 r = 0;
5625                 break;
5626         }
5627         case KVM_SET_PIT2: {
5628                 r = -EFAULT;
5629                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
5630                         goto out;
5631                 mutex_lock(&kvm->lock);
5632                 r = -ENXIO;
5633                 if (!kvm->arch.vpit)
5634                         goto set_pit2_out;
5635                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
5636 set_pit2_out:
5637                 mutex_unlock(&kvm->lock);
5638                 break;
5639         }
5640         case KVM_REINJECT_CONTROL: {
5641                 struct kvm_reinject_control control;
5642                 r =  -EFAULT;
5643                 if (copy_from_user(&control, argp, sizeof(control)))
5644                         goto out;
5645                 r = -ENXIO;
5646                 if (!kvm->arch.vpit)
5647                         goto out;
5648                 r = kvm_vm_ioctl_reinject(kvm, &control);
5649                 break;
5650         }
5651         case KVM_SET_BOOT_CPU_ID:
5652                 r = 0;
5653                 mutex_lock(&kvm->lock);
5654                 if (kvm->created_vcpus)
5655                         r = -EBUSY;
5656                 else
5657                         kvm->arch.bsp_vcpu_id = arg;
5658                 mutex_unlock(&kvm->lock);
5659                 break;
5660         case KVM_XEN_HVM_CONFIG: {
5661                 struct kvm_xen_hvm_config xhc;
5662                 r = -EFAULT;
5663                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
5664                         goto out;
5665                 r = kvm_xen_hvm_config(kvm, &xhc);
5666                 break;
5667         }
5668         case KVM_XEN_HVM_GET_ATTR: {
5669                 struct kvm_xen_hvm_attr xha;
5670
5671                 r = -EFAULT;
5672                 if (copy_from_user(&xha, argp, sizeof(xha)))
5673                         goto out;
5674                 r = kvm_xen_hvm_get_attr(kvm, &xha);
5675                 if (!r && copy_to_user(argp, &xha, sizeof(xha)))
5676                         r = -EFAULT;
5677                 break;
5678         }
5679         case KVM_XEN_HVM_SET_ATTR: {
5680                 struct kvm_xen_hvm_attr xha;
5681
5682                 r = -EFAULT;
5683                 if (copy_from_user(&xha, argp, sizeof(xha)))
5684                         goto out;
5685                 r = kvm_xen_hvm_set_attr(kvm, &xha);
5686                 break;
5687         }
5688         case KVM_SET_CLOCK: {
5689                 struct kvm_clock_data user_ns;
5690                 u64 now_ns;
5691
5692                 r = -EFAULT;
5693                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
5694                         goto out;
5695
5696                 r = -EINVAL;
5697                 if (user_ns.flags)
5698                         goto out;
5699
5700                 r = 0;
5701                 /*
5702                  * TODO: userspace has to take care of races with VCPU_RUN, so
5703                  * kvm_gen_update_masterclock() can be cut down to locked
5704                  * pvclock_update_vm_gtod_copy().
5705                  */
5706                 kvm_gen_update_masterclock(kvm);
5707                 now_ns = get_kvmclock_ns(kvm);
5708                 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
5709                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
5710                 break;
5711         }
5712         case KVM_GET_CLOCK: {
5713                 struct kvm_clock_data user_ns;
5714                 u64 now_ns;
5715
5716                 now_ns = get_kvmclock_ns(kvm);
5717                 user_ns.clock = now_ns;
5718                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
5719                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
5720
5721                 r = -EFAULT;
5722                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
5723                         goto out;
5724                 r = 0;
5725                 break;
5726         }
5727         case KVM_MEMORY_ENCRYPT_OP: {
5728                 r = -ENOTTY;
5729                 if (kvm_x86_ops.mem_enc_op)
5730                         r = static_call(kvm_x86_mem_enc_op)(kvm, argp);
5731                 break;
5732         }
5733         case KVM_MEMORY_ENCRYPT_REG_REGION: {
5734                 struct kvm_enc_region region;
5735
5736                 r = -EFAULT;
5737                 if (copy_from_user(&region, argp, sizeof(region)))
5738                         goto out;
5739
5740                 r = -ENOTTY;
5741                 if (kvm_x86_ops.mem_enc_reg_region)
5742                         r = static_call(kvm_x86_mem_enc_reg_region)(kvm, &region);
5743                 break;
5744         }
5745         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
5746                 struct kvm_enc_region region;
5747
5748                 r = -EFAULT;
5749                 if (copy_from_user(&region, argp, sizeof(region)))
5750                         goto out;
5751
5752                 r = -ENOTTY;
5753                 if (kvm_x86_ops.mem_enc_unreg_region)
5754                         r = static_call(kvm_x86_mem_enc_unreg_region)(kvm, &region);
5755                 break;
5756         }
5757         case KVM_HYPERV_EVENTFD: {
5758                 struct kvm_hyperv_eventfd hvevfd;
5759
5760                 r = -EFAULT;
5761                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
5762                         goto out;
5763                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
5764                 break;
5765         }
5766         case KVM_SET_PMU_EVENT_FILTER:
5767                 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
5768                 break;
5769         case KVM_X86_SET_MSR_FILTER:
5770                 r = kvm_vm_ioctl_set_msr_filter(kvm, argp);
5771                 break;
5772         default:
5773                 r = -ENOTTY;
5774         }
5775 out:
5776         return r;
5777 }
5778
5779 static void kvm_init_msr_list(void)
5780 {
5781         struct x86_pmu_capability x86_pmu;
5782         u32 dummy[2];
5783         unsigned i;
5784
5785         BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
5786                          "Please update the fixed PMCs in msrs_to_saved_all[]");
5787
5788         perf_get_x86_pmu_capability(&x86_pmu);
5789
5790         num_msrs_to_save = 0;
5791         num_emulated_msrs = 0;
5792         num_msr_based_features = 0;
5793
5794         for (i = 0; i < ARRAY_SIZE(msrs_to_save_all); i++) {
5795                 if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
5796                         continue;
5797
5798                 /*
5799                  * Even MSRs that are valid in the host may not be exposed
5800                  * to the guests in some cases.
5801                  */
5802                 switch (msrs_to_save_all[i]) {
5803                 case MSR_IA32_BNDCFGS:
5804                         if (!kvm_mpx_supported())
5805                                 continue;
5806                         break;
5807                 case MSR_TSC_AUX:
5808                         if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP))
5809                                 continue;
5810                         break;
5811                 case MSR_IA32_UMWAIT_CONTROL:
5812                         if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG))
5813                                 continue;
5814                         break;
5815                 case MSR_IA32_RTIT_CTL:
5816                 case MSR_IA32_RTIT_STATUS:
5817                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT))
5818                                 continue;
5819                         break;
5820                 case MSR_IA32_RTIT_CR3_MATCH:
5821                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
5822                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
5823                                 continue;
5824                         break;
5825                 case MSR_IA32_RTIT_OUTPUT_BASE:
5826                 case MSR_IA32_RTIT_OUTPUT_MASK:
5827                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
5828                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
5829                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
5830                                 continue;
5831                         break;
5832                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
5833                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
5834                                 msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=
5835                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
5836                                 continue;
5837                         break;
5838                 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
5839                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
5840                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
5841                                 continue;
5842                         break;
5843                 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
5844                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
5845                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
5846                                 continue;
5847                         break;
5848                 default:
5849                         break;
5850                 }
5851
5852                 msrs_to_save[num_msrs_to_save++] = msrs_to_save_all[i];
5853         }
5854
5855         for (i = 0; i < ARRAY_SIZE(emulated_msrs_all); i++) {
5856                 if (!static_call(kvm_x86_has_emulated_msr)(NULL, emulated_msrs_all[i]))
5857                         continue;
5858
5859                 emulated_msrs[num_emulated_msrs++] = emulated_msrs_all[i];
5860         }
5861
5862         for (i = 0; i < ARRAY_SIZE(msr_based_features_all); i++) {
5863                 struct kvm_msr_entry msr;
5864
5865                 msr.index = msr_based_features_all[i];
5866                 if (kvm_get_msr_feature(&msr))
5867                         continue;
5868
5869                 msr_based_features[num_msr_based_features++] = msr_based_features_all[i];
5870         }
5871 }
5872
5873 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
5874                            const void *v)
5875 {
5876         int handled = 0;
5877         int n;
5878
5879         do {
5880                 n = min(len, 8);
5881                 if (!(lapic_in_kernel(vcpu) &&
5882                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
5883                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
5884                         break;
5885                 handled += n;
5886                 addr += n;
5887                 len -= n;
5888                 v += n;
5889         } while (len);
5890
5891         return handled;
5892 }
5893
5894 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
5895 {
5896         int handled = 0;
5897         int n;
5898
5899         do {
5900                 n = min(len, 8);
5901                 if (!(lapic_in_kernel(vcpu) &&
5902                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
5903                                          addr, n, v))
5904                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
5905                         break;
5906                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
5907                 handled += n;
5908                 addr += n;
5909                 len -= n;
5910                 v += n;
5911         } while (len);
5912
5913         return handled;
5914 }
5915
5916 static void kvm_set_segment(struct kvm_vcpu *vcpu,
5917                         struct kvm_segment *var, int seg)
5918 {
5919         static_call(kvm_x86_set_segment)(vcpu, var, seg);
5920 }
5921
5922 void kvm_get_segment(struct kvm_vcpu *vcpu,
5923                      struct kvm_segment *var, int seg)
5924 {
5925         static_call(kvm_x86_get_segment)(vcpu, var, seg);
5926 }
5927
5928 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
5929                            struct x86_exception *exception)
5930 {
5931         gpa_t t_gpa;
5932
5933         BUG_ON(!mmu_is_nested(vcpu));
5934
5935         /* NPT walks are always user-walks */
5936         access |= PFERR_USER_MASK;
5937         t_gpa  = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
5938
5939         return t_gpa;
5940 }
5941
5942 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
5943                               struct x86_exception *exception)
5944 {
5945         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
5946         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5947 }
5948
5949  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
5950                                 struct x86_exception *exception)
5951 {
5952         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
5953         access |= PFERR_FETCH_MASK;
5954         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5955 }
5956
5957 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
5958                                struct x86_exception *exception)
5959 {
5960         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
5961         access |= PFERR_WRITE_MASK;
5962         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5963 }
5964
5965 /* uses this to access any guest's mapped memory without checking CPL */
5966 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
5967                                 struct x86_exception *exception)
5968 {
5969         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
5970 }
5971
5972 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
5973                                       struct kvm_vcpu *vcpu, u32 access,
5974                                       struct x86_exception *exception)
5975 {
5976         void *data = val;
5977         int r = X86EMUL_CONTINUE;
5978
5979         while (bytes) {
5980                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
5981                                                             exception);
5982                 unsigned offset = addr & (PAGE_SIZE-1);
5983                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
5984                 int ret;
5985
5986                 if (gpa == UNMAPPED_GVA)
5987                         return X86EMUL_PROPAGATE_FAULT;
5988                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
5989                                                offset, toread);
5990                 if (ret < 0) {
5991                         r = X86EMUL_IO_NEEDED;
5992                         goto out;
5993                 }
5994
5995                 bytes -= toread;
5996                 data += toread;
5997                 addr += toread;
5998         }
5999 out:
6000         return r;
6001 }
6002
6003 /* used for instruction fetching */
6004 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
6005                                 gva_t addr, void *val, unsigned int bytes,
6006                                 struct x86_exception *exception)
6007 {
6008         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6009         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6010         unsigned offset;
6011         int ret;
6012
6013         /* Inline kvm_read_guest_virt_helper for speed.  */
6014         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
6015                                                     exception);
6016         if (unlikely(gpa == UNMAPPED_GVA))
6017                 return X86EMUL_PROPAGATE_FAULT;
6018
6019         offset = addr & (PAGE_SIZE-1);
6020         if (WARN_ON(offset + bytes > PAGE_SIZE))
6021                 bytes = (unsigned)PAGE_SIZE - offset;
6022         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
6023                                        offset, bytes);
6024         if (unlikely(ret < 0))
6025                 return X86EMUL_IO_NEEDED;
6026
6027         return X86EMUL_CONTINUE;
6028 }
6029
6030 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
6031                                gva_t addr, void *val, unsigned int bytes,
6032                                struct x86_exception *exception)
6033 {
6034         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6035
6036         /*
6037          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
6038          * is returned, but our callers are not ready for that and they blindly
6039          * call kvm_inject_page_fault.  Ensure that they at least do not leak
6040          * uninitialized kernel stack memory into cr2 and error code.
6041          */
6042         memset(exception, 0, sizeof(*exception));
6043         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
6044                                           exception);
6045 }
6046 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
6047
6048 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
6049                              gva_t addr, void *val, unsigned int bytes,
6050                              struct x86_exception *exception, bool system)
6051 {
6052         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6053         u32 access = 0;
6054
6055         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6056                 access |= PFERR_USER_MASK;
6057
6058         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
6059 }
6060
6061 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
6062                 unsigned long addr, void *val, unsigned int bytes)
6063 {
6064         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6065         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
6066
6067         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
6068 }
6069
6070 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6071                                       struct kvm_vcpu *vcpu, u32 access,
6072                                       struct x86_exception *exception)
6073 {
6074         void *data = val;
6075         int r = X86EMUL_CONTINUE;
6076
6077         while (bytes) {
6078                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
6079                                                              access,
6080                                                              exception);
6081                 unsigned offset = addr & (PAGE_SIZE-1);
6082                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
6083                 int ret;
6084
6085                 if (gpa == UNMAPPED_GVA)
6086                         return X86EMUL_PROPAGATE_FAULT;
6087                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
6088                 if (ret < 0) {
6089                         r = X86EMUL_IO_NEEDED;
6090                         goto out;
6091                 }
6092
6093                 bytes -= towrite;
6094                 data += towrite;
6095                 addr += towrite;
6096         }
6097 out:
6098         return r;
6099 }
6100
6101 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
6102                               unsigned int bytes, struct x86_exception *exception,
6103                               bool system)
6104 {
6105         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6106         u32 access = PFERR_WRITE_MASK;
6107
6108         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6109                 access |= PFERR_USER_MASK;
6110
6111         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6112                                            access, exception);
6113 }
6114
6115 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
6116                                 unsigned int bytes, struct x86_exception *exception)
6117 {
6118         /* kvm_write_guest_virt_system can pull in tons of pages. */
6119         vcpu->arch.l1tf_flush_l1d = true;
6120
6121         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6122                                            PFERR_WRITE_MASK, exception);
6123 }
6124 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
6125
6126 int handle_ud(struct kvm_vcpu *vcpu)
6127 {
6128         static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
6129         int emul_type = EMULTYPE_TRAP_UD;
6130         char sig[5]; /* ud2; .ascii "kvm" */
6131         struct x86_exception e;
6132
6133         if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, NULL, 0)))
6134                 return 1;
6135
6136         if (force_emulation_prefix &&
6137             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
6138                                 sig, sizeof(sig), &e) == 0 &&
6139             memcmp(sig, kvm_emulate_prefix, sizeof(sig)) == 0) {
6140                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
6141                 emul_type = EMULTYPE_TRAP_UD_FORCED;
6142         }
6143
6144         return kvm_emulate_instruction(vcpu, emul_type);
6145 }
6146 EXPORT_SYMBOL_GPL(handle_ud);
6147
6148 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6149                             gpa_t gpa, bool write)
6150 {
6151         /* For APIC access vmexit */
6152         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6153                 return 1;
6154
6155         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
6156                 trace_vcpu_match_mmio(gva, gpa, write, true);
6157                 return 1;
6158         }
6159
6160         return 0;
6161 }
6162
6163 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6164                                 gpa_t *gpa, struct x86_exception *exception,
6165                                 bool write)
6166 {
6167         u32 access = ((static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0)
6168                 | (write ? PFERR_WRITE_MASK : 0);
6169
6170         /*
6171          * currently PKRU is only applied to ept enabled guest so
6172          * there is no pkey in EPT page table for L1 guest or EPT
6173          * shadow page table for L2 guest.
6174          */
6175         if (vcpu_match_mmio_gva(vcpu, gva)
6176             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
6177                                  vcpu->arch.mmio_access, 0, access)) {
6178                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
6179                                         (gva & (PAGE_SIZE - 1));
6180                 trace_vcpu_match_mmio(gva, *gpa, write, false);
6181                 return 1;
6182         }
6183
6184         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6185
6186         if (*gpa == UNMAPPED_GVA)
6187                 return -1;
6188
6189         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
6190 }
6191
6192 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
6193                         const void *val, int bytes)
6194 {
6195         int ret;
6196
6197         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
6198         if (ret < 0)
6199                 return 0;
6200         kvm_page_track_write(vcpu, gpa, val, bytes);
6201         return 1;
6202 }
6203
6204 struct read_write_emulator_ops {
6205         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
6206                                   int bytes);
6207         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
6208                                   void *val, int bytes);
6209         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6210                                int bytes, void *val);
6211         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6212                                     void *val, int bytes);
6213         bool write;
6214 };
6215
6216 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
6217 {
6218         if (vcpu->mmio_read_completed) {
6219                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
6220                                vcpu->mmio_fragments[0].gpa, val);
6221                 vcpu->mmio_read_completed = 0;
6222                 return 1;
6223         }
6224
6225         return 0;
6226 }
6227
6228 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6229                         void *val, int bytes)
6230 {
6231         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
6232 }
6233
6234 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6235                          void *val, int bytes)
6236 {
6237         return emulator_write_phys(vcpu, gpa, val, bytes);
6238 }
6239
6240 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
6241 {
6242         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
6243         return vcpu_mmio_write(vcpu, gpa, bytes, val);
6244 }
6245
6246 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6247                           void *val, int bytes)
6248 {
6249         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
6250         return X86EMUL_IO_NEEDED;
6251 }
6252
6253 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6254                            void *val, int bytes)
6255 {
6256         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
6257
6258         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
6259         return X86EMUL_CONTINUE;
6260 }
6261
6262 static const struct read_write_emulator_ops read_emultor = {
6263         .read_write_prepare = read_prepare,
6264         .read_write_emulate = read_emulate,
6265         .read_write_mmio = vcpu_mmio_read,
6266         .read_write_exit_mmio = read_exit_mmio,
6267 };
6268
6269 static const struct read_write_emulator_ops write_emultor = {
6270         .read_write_emulate = write_emulate,
6271         .read_write_mmio = write_mmio,
6272         .read_write_exit_mmio = write_exit_mmio,
6273         .write = true,
6274 };
6275
6276 static int emulator_read_write_onepage(unsigned long addr, void *val,
6277                                        unsigned int bytes,
6278                                        struct x86_exception *exception,
6279                                        struct kvm_vcpu *vcpu,
6280                                        const struct read_write_emulator_ops *ops)
6281 {
6282         gpa_t gpa;
6283         int handled, ret;
6284         bool write = ops->write;
6285         struct kvm_mmio_fragment *frag;
6286         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6287
6288         /*
6289          * If the exit was due to a NPF we may already have a GPA.
6290          * If the GPA is present, use it to avoid the GVA to GPA table walk.
6291          * Note, this cannot be used on string operations since string
6292          * operation using rep will only have the initial GPA from the NPF
6293          * occurred.
6294          */
6295         if (ctxt->gpa_available && emulator_can_use_gpa(ctxt) &&
6296             (addr & ~PAGE_MASK) == (ctxt->gpa_val & ~PAGE_MASK)) {
6297                 gpa = ctxt->gpa_val;
6298                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
6299         } else {
6300                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
6301                 if (ret < 0)
6302                         return X86EMUL_PROPAGATE_FAULT;
6303         }
6304
6305         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
6306                 return X86EMUL_CONTINUE;
6307
6308         /*
6309          * Is this MMIO handled locally?
6310          */
6311         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
6312         if (handled == bytes)
6313                 return X86EMUL_CONTINUE;
6314
6315         gpa += handled;
6316         bytes -= handled;
6317         val += handled;
6318
6319         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
6320         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
6321         frag->gpa = gpa;
6322         frag->data = val;
6323         frag->len = bytes;
6324         return X86EMUL_CONTINUE;
6325 }
6326
6327 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
6328                         unsigned long addr,
6329                         void *val, unsigned int bytes,
6330                         struct x86_exception *exception,
6331                         const struct read_write_emulator_ops *ops)
6332 {
6333         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6334         gpa_t gpa;
6335         int rc;
6336
6337         if (ops->read_write_prepare &&
6338                   ops->read_write_prepare(vcpu, val, bytes))
6339                 return X86EMUL_CONTINUE;
6340
6341         vcpu->mmio_nr_fragments = 0;
6342
6343         /* Crossing a page boundary? */
6344         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
6345                 int now;
6346
6347                 now = -addr & ~PAGE_MASK;
6348                 rc = emulator_read_write_onepage(addr, val, now, exception,
6349                                                  vcpu, ops);
6350
6351                 if (rc != X86EMUL_CONTINUE)
6352                         return rc;
6353                 addr += now;
6354                 if (ctxt->mode != X86EMUL_MODE_PROT64)
6355                         addr = (u32)addr;
6356                 val += now;
6357                 bytes -= now;
6358         }
6359
6360         rc = emulator_read_write_onepage(addr, val, bytes, exception,
6361                                          vcpu, ops);
6362         if (rc != X86EMUL_CONTINUE)
6363                 return rc;
6364
6365         if (!vcpu->mmio_nr_fragments)
6366                 return rc;
6367
6368         gpa = vcpu->mmio_fragments[0].gpa;
6369
6370         vcpu->mmio_needed = 1;
6371         vcpu->mmio_cur_fragment = 0;
6372
6373         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
6374         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
6375         vcpu->run->exit_reason = KVM_EXIT_MMIO;
6376         vcpu->run->mmio.phys_addr = gpa;
6377
6378         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
6379 }
6380
6381 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
6382                                   unsigned long addr,
6383                                   void *val,
6384                                   unsigned int bytes,
6385                                   struct x86_exception *exception)
6386 {
6387         return emulator_read_write(ctxt, addr, val, bytes,
6388                                    exception, &read_emultor);
6389 }
6390
6391 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
6392                             unsigned long addr,
6393                             const void *val,
6394                             unsigned int bytes,
6395                             struct x86_exception *exception)
6396 {
6397         return emulator_read_write(ctxt, addr, (void *)val, bytes,
6398                                    exception, &write_emultor);
6399 }
6400
6401 #define CMPXCHG_TYPE(t, ptr, old, new) \
6402         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
6403
6404 #ifdef CONFIG_X86_64
6405 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
6406 #else
6407 #  define CMPXCHG64(ptr, old, new) \
6408         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
6409 #endif
6410
6411 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
6412                                      unsigned long addr,
6413                                      const void *old,
6414                                      const void *new,
6415                                      unsigned int bytes,
6416                                      struct x86_exception *exception)
6417 {
6418         struct kvm_host_map map;
6419         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6420         u64 page_line_mask;
6421         gpa_t gpa;
6422         char *kaddr;
6423         bool exchanged;
6424
6425         /* guests cmpxchg8b have to be emulated atomically */
6426         if (bytes > 8 || (bytes & (bytes - 1)))
6427                 goto emul_write;
6428
6429         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
6430
6431         if (gpa == UNMAPPED_GVA ||
6432             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6433                 goto emul_write;
6434
6435         /*
6436          * Emulate the atomic as a straight write to avoid #AC if SLD is
6437          * enabled in the host and the access splits a cache line.
6438          */
6439         if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT))
6440                 page_line_mask = ~(cache_line_size() - 1);
6441         else
6442                 page_line_mask = PAGE_MASK;
6443
6444         if (((gpa + bytes - 1) & page_line_mask) != (gpa & page_line_mask))
6445                 goto emul_write;
6446
6447         if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
6448                 goto emul_write;
6449
6450         kaddr = map.hva + offset_in_page(gpa);
6451
6452         switch (bytes) {
6453         case 1:
6454                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
6455                 break;
6456         case 2:
6457                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
6458                 break;
6459         case 4:
6460                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
6461                 break;
6462         case 8:
6463                 exchanged = CMPXCHG64(kaddr, old, new);
6464                 break;
6465         default:
6466                 BUG();
6467         }
6468
6469         kvm_vcpu_unmap(vcpu, &map, true);
6470
6471         if (!exchanged)
6472                 return X86EMUL_CMPXCHG_FAILED;
6473
6474         kvm_page_track_write(vcpu, gpa, new, bytes);
6475
6476         return X86EMUL_CONTINUE;
6477
6478 emul_write:
6479         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
6480
6481         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
6482 }
6483
6484 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
6485 {
6486         int r = 0, i;
6487
6488         for (i = 0; i < vcpu->arch.pio.count; i++) {
6489                 if (vcpu->arch.pio.in)
6490                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
6491                                             vcpu->arch.pio.size, pd);
6492                 else
6493                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
6494                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
6495                                              pd);
6496                 if (r)
6497                         break;
6498                 pd += vcpu->arch.pio.size;
6499         }
6500         return r;
6501 }
6502
6503 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
6504                                unsigned short port, void *val,
6505                                unsigned int count, bool in)
6506 {
6507         vcpu->arch.pio.port = port;
6508         vcpu->arch.pio.in = in;
6509         vcpu->arch.pio.count  = count;
6510         vcpu->arch.pio.size = size;
6511
6512         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
6513                 vcpu->arch.pio.count = 0;
6514                 return 1;
6515         }
6516
6517         vcpu->run->exit_reason = KVM_EXIT_IO;
6518         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
6519         vcpu->run->io.size = size;
6520         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
6521         vcpu->run->io.count = count;
6522         vcpu->run->io.port = port;
6523
6524         return 0;
6525 }
6526
6527 static int emulator_pio_in(struct kvm_vcpu *vcpu, int size,
6528                            unsigned short port, void *val, unsigned int count)
6529 {
6530         int ret;
6531
6532         if (vcpu->arch.pio.count)
6533                 goto data_avail;
6534
6535         memset(vcpu->arch.pio_data, 0, size * count);
6536
6537         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
6538         if (ret) {
6539 data_avail:
6540                 memcpy(val, vcpu->arch.pio_data, size * count);
6541                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
6542                 vcpu->arch.pio.count = 0;
6543                 return 1;
6544         }
6545
6546         return 0;
6547 }
6548
6549 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
6550                                     int size, unsigned short port, void *val,
6551                                     unsigned int count)
6552 {
6553         return emulator_pio_in(emul_to_vcpu(ctxt), size, port, val, count);
6554
6555 }
6556
6557 static int emulator_pio_out(struct kvm_vcpu *vcpu, int size,
6558                             unsigned short port, const void *val,
6559                             unsigned int count)
6560 {
6561         memcpy(vcpu->arch.pio_data, val, size * count);
6562         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
6563         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
6564 }
6565
6566 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
6567                                      int size, unsigned short port,
6568                                      const void *val, unsigned int count)
6569 {
6570         return emulator_pio_out(emul_to_vcpu(ctxt), size, port, val, count);
6571 }
6572
6573 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
6574 {
6575         return static_call(kvm_x86_get_segment_base)(vcpu, seg);
6576 }
6577
6578 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
6579 {
6580         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
6581 }
6582
6583 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
6584 {
6585         if (!need_emulate_wbinvd(vcpu))
6586                 return X86EMUL_CONTINUE;
6587
6588         if (static_call(kvm_x86_has_wbinvd_exit)()) {
6589                 int cpu = get_cpu();
6590
6591                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
6592                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
6593                                 wbinvd_ipi, NULL, 1);
6594                 put_cpu();
6595                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
6596         } else
6597                 wbinvd();
6598         return X86EMUL_CONTINUE;
6599 }
6600
6601 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
6602 {
6603         kvm_emulate_wbinvd_noskip(vcpu);
6604         return kvm_skip_emulated_instruction(vcpu);
6605 }
6606 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
6607
6608
6609
6610 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
6611 {
6612         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
6613 }
6614
6615 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
6616                            unsigned long *dest)
6617 {
6618         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
6619 }
6620
6621 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
6622                            unsigned long value)
6623 {
6624
6625         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
6626 }
6627
6628 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
6629 {
6630         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
6631 }
6632
6633 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
6634 {
6635         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6636         unsigned long value;
6637
6638         switch (cr) {
6639         case 0:
6640                 value = kvm_read_cr0(vcpu);
6641                 break;
6642         case 2:
6643                 value = vcpu->arch.cr2;
6644                 break;
6645         case 3:
6646                 value = kvm_read_cr3(vcpu);
6647                 break;
6648         case 4:
6649                 value = kvm_read_cr4(vcpu);
6650                 break;
6651         case 8:
6652                 value = kvm_get_cr8(vcpu);
6653                 break;
6654         default:
6655                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
6656                 return 0;
6657         }
6658
6659         return value;
6660 }
6661
6662 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
6663 {
6664         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6665         int res = 0;
6666
6667         switch (cr) {
6668         case 0:
6669                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
6670                 break;
6671         case 2:
6672                 vcpu->arch.cr2 = val;
6673                 break;
6674         case 3:
6675                 res = kvm_set_cr3(vcpu, val);
6676                 break;
6677         case 4:
6678                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
6679                 break;
6680         case 8:
6681                 res = kvm_set_cr8(vcpu, val);
6682                 break;
6683         default:
6684                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
6685                 res = -1;
6686         }
6687
6688         return res;
6689 }
6690
6691 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
6692 {
6693         return static_call(kvm_x86_get_cpl)(emul_to_vcpu(ctxt));
6694 }
6695
6696 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6697 {
6698         static_call(kvm_x86_get_gdt)(emul_to_vcpu(ctxt), dt);
6699 }
6700
6701 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6702 {
6703         static_call(kvm_x86_get_idt)(emul_to_vcpu(ctxt), dt);
6704 }
6705
6706 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6707 {
6708         static_call(kvm_x86_set_gdt)(emul_to_vcpu(ctxt), dt);
6709 }
6710
6711 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6712 {
6713         static_call(kvm_x86_set_idt)(emul_to_vcpu(ctxt), dt);
6714 }
6715
6716 static unsigned long emulator_get_cached_segment_base(
6717         struct x86_emulate_ctxt *ctxt, int seg)
6718 {
6719         return get_segment_base(emul_to_vcpu(ctxt), seg);
6720 }
6721
6722 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
6723                                  struct desc_struct *desc, u32 *base3,
6724                                  int seg)
6725 {
6726         struct kvm_segment var;
6727
6728         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
6729         *selector = var.selector;
6730
6731         if (var.unusable) {
6732                 memset(desc, 0, sizeof(*desc));
6733                 if (base3)
6734                         *base3 = 0;
6735                 return false;
6736         }
6737
6738         if (var.g)
6739                 var.limit >>= 12;
6740         set_desc_limit(desc, var.limit);
6741         set_desc_base(desc, (unsigned long)var.base);
6742 #ifdef CONFIG_X86_64
6743         if (base3)
6744                 *base3 = var.base >> 32;
6745 #endif
6746         desc->type = var.type;
6747         desc->s = var.s;
6748         desc->dpl = var.dpl;
6749         desc->p = var.present;
6750         desc->avl = var.avl;
6751         desc->l = var.l;
6752         desc->d = var.db;
6753         desc->g = var.g;
6754
6755         return true;
6756 }
6757
6758 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
6759                                  struct desc_struct *desc, u32 base3,
6760                                  int seg)
6761 {
6762         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6763         struct kvm_segment var;
6764
6765         var.selector = selector;
6766         var.base = get_desc_base(desc);
6767 #ifdef CONFIG_X86_64
6768         var.base |= ((u64)base3) << 32;
6769 #endif
6770         var.limit = get_desc_limit(desc);
6771         if (desc->g)
6772                 var.limit = (var.limit << 12) | 0xfff;
6773         var.type = desc->type;
6774         var.dpl = desc->dpl;
6775         var.db = desc->d;
6776         var.s = desc->s;
6777         var.l = desc->l;
6778         var.g = desc->g;
6779         var.avl = desc->avl;
6780         var.present = desc->p;
6781         var.unusable = !var.present;
6782         var.padding = 0;
6783
6784         kvm_set_segment(vcpu, &var, seg);
6785         return;
6786 }
6787
6788 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
6789                             u32 msr_index, u64 *pdata)
6790 {
6791         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6792         int r;
6793
6794         r = kvm_get_msr(vcpu, msr_index, pdata);
6795
6796         if (r && kvm_get_msr_user_space(vcpu, msr_index, r)) {
6797                 /* Bounce to user space */
6798                 return X86EMUL_IO_NEEDED;
6799         }
6800
6801         return r;
6802 }
6803
6804 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
6805                             u32 msr_index, u64 data)
6806 {
6807         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6808         int r;
6809
6810         r = kvm_set_msr(vcpu, msr_index, data);
6811
6812         if (r && kvm_set_msr_user_space(vcpu, msr_index, data, r)) {
6813                 /* Bounce to user space */
6814                 return X86EMUL_IO_NEEDED;
6815         }
6816
6817         return r;
6818 }
6819
6820 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
6821 {
6822         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6823
6824         return vcpu->arch.smbase;
6825 }
6826
6827 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
6828 {
6829         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6830
6831         vcpu->arch.smbase = smbase;
6832 }
6833
6834 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
6835                               u32 pmc)
6836 {
6837         return kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt), pmc);
6838 }
6839
6840 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
6841                              u32 pmc, u64 *pdata)
6842 {
6843         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
6844 }
6845
6846 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
6847 {
6848         emul_to_vcpu(ctxt)->arch.halt_request = 1;
6849 }
6850
6851 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
6852                               struct x86_instruction_info *info,
6853                               enum x86_intercept_stage stage)
6854 {
6855         return static_call(kvm_x86_check_intercept)(emul_to_vcpu(ctxt), info, stage,
6856                                             &ctxt->exception);
6857 }
6858
6859 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
6860                               u32 *eax, u32 *ebx, u32 *ecx, u32 *edx,
6861                               bool exact_only)
6862 {
6863         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, exact_only);
6864 }
6865
6866 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt *ctxt)
6867 {
6868         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_LM);
6869 }
6870
6871 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt *ctxt)
6872 {
6873         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_MOVBE);
6874 }
6875
6876 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)
6877 {
6878         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_FXSR);
6879 }
6880
6881 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
6882 {
6883         return kvm_register_read(emul_to_vcpu(ctxt), reg);
6884 }
6885
6886 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
6887 {
6888         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
6889 }
6890
6891 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
6892 {
6893         static_call(kvm_x86_set_nmi_mask)(emul_to_vcpu(ctxt), masked);
6894 }
6895
6896 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
6897 {
6898         return emul_to_vcpu(ctxt)->arch.hflags;
6899 }
6900
6901 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
6902 {
6903         emul_to_vcpu(ctxt)->arch.hflags = emul_flags;
6904 }
6905
6906 static int emulator_pre_leave_smm(struct x86_emulate_ctxt *ctxt,
6907                                   const char *smstate)
6908 {
6909         return static_call(kvm_x86_pre_leave_smm)(emul_to_vcpu(ctxt), smstate);
6910 }
6911
6912 static void emulator_post_leave_smm(struct x86_emulate_ctxt *ctxt)
6913 {
6914         kvm_smm_changed(emul_to_vcpu(ctxt));
6915 }
6916
6917 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
6918 {
6919         return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
6920 }
6921
6922 static const struct x86_emulate_ops emulate_ops = {
6923         .read_gpr            = emulator_read_gpr,
6924         .write_gpr           = emulator_write_gpr,
6925         .read_std            = emulator_read_std,
6926         .write_std           = emulator_write_std,
6927         .read_phys           = kvm_read_guest_phys_system,
6928         .fetch               = kvm_fetch_guest_virt,
6929         .read_emulated       = emulator_read_emulated,
6930         .write_emulated      = emulator_write_emulated,
6931         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
6932         .invlpg              = emulator_invlpg,
6933         .pio_in_emulated     = emulator_pio_in_emulated,
6934         .pio_out_emulated    = emulator_pio_out_emulated,
6935         .get_segment         = emulator_get_segment,
6936         .set_segment         = emulator_set_segment,
6937         .get_cached_segment_base = emulator_get_cached_segment_base,
6938         .get_gdt             = emulator_get_gdt,
6939         .get_idt             = emulator_get_idt,
6940         .set_gdt             = emulator_set_gdt,
6941         .set_idt             = emulator_set_idt,
6942         .get_cr              = emulator_get_cr,
6943         .set_cr              = emulator_set_cr,
6944         .cpl                 = emulator_get_cpl,
6945         .get_dr              = emulator_get_dr,
6946         .set_dr              = emulator_set_dr,
6947         .get_smbase          = emulator_get_smbase,
6948         .set_smbase          = emulator_set_smbase,
6949         .set_msr             = emulator_set_msr,
6950         .get_msr             = emulator_get_msr,
6951         .check_pmc           = emulator_check_pmc,
6952         .read_pmc            = emulator_read_pmc,
6953         .halt                = emulator_halt,
6954         .wbinvd              = emulator_wbinvd,
6955         .fix_hypercall       = emulator_fix_hypercall,
6956         .intercept           = emulator_intercept,
6957         .get_cpuid           = emulator_get_cpuid,
6958         .guest_has_long_mode = emulator_guest_has_long_mode,
6959         .guest_has_movbe     = emulator_guest_has_movbe,
6960         .guest_has_fxsr      = emulator_guest_has_fxsr,
6961         .set_nmi_mask        = emulator_set_nmi_mask,
6962         .get_hflags          = emulator_get_hflags,
6963         .set_hflags          = emulator_set_hflags,
6964         .pre_leave_smm       = emulator_pre_leave_smm,
6965         .post_leave_smm      = emulator_post_leave_smm,
6966         .set_xcr             = emulator_set_xcr,
6967 };
6968
6969 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
6970 {
6971         u32 int_shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
6972         /*
6973          * an sti; sti; sequence only disable interrupts for the first
6974          * instruction. So, if the last instruction, be it emulated or
6975          * not, left the system with the INT_STI flag enabled, it
6976          * means that the last instruction is an sti. We should not
6977          * leave the flag on in this case. The same goes for mov ss
6978          */
6979         if (int_shadow & mask)
6980                 mask = 0;
6981         if (unlikely(int_shadow || mask)) {
6982                 static_call(kvm_x86_set_interrupt_shadow)(vcpu, mask);
6983                 if (!mask)
6984                         kvm_make_request(KVM_REQ_EVENT, vcpu);
6985         }
6986 }
6987
6988 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
6989 {
6990         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6991         if (ctxt->exception.vector == PF_VECTOR)
6992                 return kvm_inject_emulated_page_fault(vcpu, &ctxt->exception);
6993
6994         if (ctxt->exception.error_code_valid)
6995                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
6996                                       ctxt->exception.error_code);
6997         else
6998                 kvm_queue_exception(vcpu, ctxt->exception.vector);
6999         return false;
7000 }
7001
7002 static struct x86_emulate_ctxt *alloc_emulate_ctxt(struct kvm_vcpu *vcpu)
7003 {
7004         struct x86_emulate_ctxt *ctxt;
7005
7006         ctxt = kmem_cache_zalloc(x86_emulator_cache, GFP_KERNEL_ACCOUNT);
7007         if (!ctxt) {
7008                 pr_err("kvm: failed to allocate vcpu's emulator\n");
7009                 return NULL;
7010         }
7011
7012         ctxt->vcpu = vcpu;
7013         ctxt->ops = &emulate_ops;
7014         vcpu->arch.emulate_ctxt = ctxt;
7015
7016         return ctxt;
7017 }
7018
7019 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
7020 {
7021         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7022         int cs_db, cs_l;
7023
7024         static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
7025
7026         ctxt->gpa_available = false;
7027         ctxt->eflags = kvm_get_rflags(vcpu);
7028         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
7029
7030         ctxt->eip = kvm_rip_read(vcpu);
7031         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
7032                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
7033                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
7034                      cs_db                              ? X86EMUL_MODE_PROT32 :
7035                                                           X86EMUL_MODE_PROT16;
7036         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
7037         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
7038         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
7039
7040         init_decode_cache(ctxt);
7041         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7042 }
7043
7044 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
7045 {
7046         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7047         int ret;
7048
7049         init_emulate_ctxt(vcpu);
7050
7051         ctxt->op_bytes = 2;
7052         ctxt->ad_bytes = 2;
7053         ctxt->_eip = ctxt->eip + inc_eip;
7054         ret = emulate_int_real(ctxt, irq);
7055
7056         if (ret != X86EMUL_CONTINUE) {
7057                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
7058         } else {
7059                 ctxt->eip = ctxt->_eip;
7060                 kvm_rip_write(vcpu, ctxt->eip);
7061                 kvm_set_rflags(vcpu, ctxt->eflags);
7062         }
7063 }
7064 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
7065
7066 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
7067 {
7068         ++vcpu->stat.insn_emulation_fail;
7069         trace_kvm_emulate_insn_failed(vcpu);
7070
7071         if (emulation_type & EMULTYPE_VMWARE_GP) {
7072                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7073                 return 1;
7074         }
7075
7076         if (emulation_type & EMULTYPE_SKIP) {
7077                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7078                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
7079                 vcpu->run->internal.ndata = 0;
7080                 return 0;
7081         }
7082
7083         kvm_queue_exception(vcpu, UD_VECTOR);
7084
7085         if (!is_guest_mode(vcpu) && static_call(kvm_x86_get_cpl)(vcpu) == 0) {
7086                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7087                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
7088                 vcpu->run->internal.ndata = 0;
7089                 return 0;
7090         }
7091
7092         return 1;
7093 }
7094
7095 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7096                                   bool write_fault_to_shadow_pgtable,
7097                                   int emulation_type)
7098 {
7099         gpa_t gpa = cr2_or_gpa;
7100         kvm_pfn_t pfn;
7101
7102         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7103                 return false;
7104
7105         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7106             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7107                 return false;
7108
7109         if (!vcpu->arch.mmu->direct_map) {
7110                 /*
7111                  * Write permission should be allowed since only
7112                  * write access need to be emulated.
7113                  */
7114                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7115
7116                 /*
7117                  * If the mapping is invalid in guest, let cpu retry
7118                  * it to generate fault.
7119                  */
7120                 if (gpa == UNMAPPED_GVA)
7121                         return true;
7122         }
7123
7124         /*
7125          * Do not retry the unhandleable instruction if it faults on the
7126          * readonly host memory, otherwise it will goto a infinite loop:
7127          * retry instruction -> write #PF -> emulation fail -> retry
7128          * instruction -> ...
7129          */
7130         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
7131
7132         /*
7133          * If the instruction failed on the error pfn, it can not be fixed,
7134          * report the error to userspace.
7135          */
7136         if (is_error_noslot_pfn(pfn))
7137                 return false;
7138
7139         kvm_release_pfn_clean(pfn);
7140
7141         /* The instructions are well-emulated on direct mmu. */
7142         if (vcpu->arch.mmu->direct_map) {
7143                 unsigned int indirect_shadow_pages;
7144
7145                 write_lock(&vcpu->kvm->mmu_lock);
7146                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
7147                 write_unlock(&vcpu->kvm->mmu_lock);
7148
7149                 if (indirect_shadow_pages)
7150                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7151
7152                 return true;
7153         }
7154
7155         /*
7156          * if emulation was due to access to shadowed page table
7157          * and it failed try to unshadow page and re-enter the
7158          * guest to let CPU execute the instruction.
7159          */
7160         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7161
7162         /*
7163          * If the access faults on its page table, it can not
7164          * be fixed by unprotecting shadow page and it should
7165          * be reported to userspace.
7166          */
7167         return !write_fault_to_shadow_pgtable;
7168 }
7169
7170 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
7171                               gpa_t cr2_or_gpa,  int emulation_type)
7172 {
7173         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7174         unsigned long last_retry_eip, last_retry_addr, gpa = cr2_or_gpa;
7175
7176         last_retry_eip = vcpu->arch.last_retry_eip;
7177         last_retry_addr = vcpu->arch.last_retry_addr;
7178
7179         /*
7180          * If the emulation is caused by #PF and it is non-page_table
7181          * writing instruction, it means the VM-EXIT is caused by shadow
7182          * page protected, we can zap the shadow page and retry this
7183          * instruction directly.
7184          *
7185          * Note: if the guest uses a non-page-table modifying instruction
7186          * on the PDE that points to the instruction, then we will unmap
7187          * the instruction and go to an infinite loop. So, we cache the
7188          * last retried eip and the last fault address, if we meet the eip
7189          * and the address again, we can break out of the potential infinite
7190          * loop.
7191          */
7192         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
7193
7194         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7195                 return false;
7196
7197         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7198             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7199                 return false;
7200
7201         if (x86_page_table_writing_insn(ctxt))
7202                 return false;
7203
7204         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2_or_gpa)
7205                 return false;
7206
7207         vcpu->arch.last_retry_eip = ctxt->eip;
7208         vcpu->arch.last_retry_addr = cr2_or_gpa;
7209
7210         if (!vcpu->arch.mmu->direct_map)
7211                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7212
7213         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7214
7215         return true;
7216 }
7217
7218 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
7219 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
7220
7221 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
7222 {
7223         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
7224                 /* This is a good place to trace that we are exiting SMM.  */
7225                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
7226
7227                 /* Process a latched INIT or SMI, if any.  */
7228                 kvm_make_request(KVM_REQ_EVENT, vcpu);
7229         }
7230
7231         kvm_mmu_reset_context(vcpu);
7232 }
7233
7234 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
7235                                 unsigned long *db)
7236 {
7237         u32 dr6 = 0;
7238         int i;
7239         u32 enable, rwlen;
7240
7241         enable = dr7;
7242         rwlen = dr7 >> 16;
7243         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
7244                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
7245                         dr6 |= (1 << i);
7246         return dr6;
7247 }
7248
7249 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
7250 {
7251         struct kvm_run *kvm_run = vcpu->run;
7252
7253         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
7254                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_ACTIVE_LOW;
7255                 kvm_run->debug.arch.pc = kvm_get_linear_rip(vcpu);
7256                 kvm_run->debug.arch.exception = DB_VECTOR;
7257                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
7258                 return 0;
7259         }
7260         kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
7261         return 1;
7262 }
7263
7264 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
7265 {
7266         unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
7267         int r;
7268
7269         r = static_call(kvm_x86_skip_emulated_instruction)(vcpu);
7270         if (unlikely(!r))
7271                 return 0;
7272
7273         /*
7274          * rflags is the old, "raw" value of the flags.  The new value has
7275          * not been saved yet.
7276          *
7277          * This is correct even for TF set by the guest, because "the
7278          * processor will not generate this exception after the instruction
7279          * that sets the TF flag".
7280          */
7281         if (unlikely(rflags & X86_EFLAGS_TF))
7282                 r = kvm_vcpu_do_singlestep(vcpu);
7283         return r;
7284 }
7285 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
7286
7287 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
7288 {
7289         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
7290             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
7291                 struct kvm_run *kvm_run = vcpu->run;
7292                 unsigned long eip = kvm_get_linear_rip(vcpu);
7293                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7294                                            vcpu->arch.guest_debug_dr7,
7295                                            vcpu->arch.eff_db);
7296
7297                 if (dr6 != 0) {
7298                         kvm_run->debug.arch.dr6 = dr6 | DR6_ACTIVE_LOW;
7299                         kvm_run->debug.arch.pc = eip;
7300                         kvm_run->debug.arch.exception = DB_VECTOR;
7301                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
7302                         *r = 0;
7303                         return true;
7304                 }
7305         }
7306
7307         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
7308             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
7309                 unsigned long eip = kvm_get_linear_rip(vcpu);
7310                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7311                                            vcpu->arch.dr7,
7312                                            vcpu->arch.db);
7313
7314                 if (dr6 != 0) {
7315                         kvm_queue_exception_p(vcpu, DB_VECTOR, dr6);
7316                         *r = 1;
7317                         return true;
7318                 }
7319         }
7320
7321         return false;
7322 }
7323
7324 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
7325 {
7326         switch (ctxt->opcode_len) {
7327         case 1:
7328                 switch (ctxt->b) {
7329                 case 0xe4:      /* IN */
7330                 case 0xe5:
7331                 case 0xec:
7332                 case 0xed:
7333                 case 0xe6:      /* OUT */
7334                 case 0xe7:
7335                 case 0xee:
7336                 case 0xef:
7337                 case 0x6c:      /* INS */
7338                 case 0x6d:
7339                 case 0x6e:      /* OUTS */
7340                 case 0x6f:
7341                         return true;
7342                 }
7343                 break;
7344         case 2:
7345                 switch (ctxt->b) {
7346                 case 0x33:      /* RDPMC */
7347                         return true;
7348                 }
7349                 break;
7350         }
7351
7352         return false;
7353 }
7354
7355 /*
7356  * Decode to be emulated instruction. Return EMULATION_OK if success.
7357  */
7358 int x86_decode_emulated_instruction(struct kvm_vcpu *vcpu, int emulation_type,
7359                                     void *insn, int insn_len)
7360 {
7361         int r = EMULATION_OK;
7362         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7363
7364         init_emulate_ctxt(vcpu);
7365
7366         /*
7367          * We will reenter on the same instruction since we do not set
7368          * complete_userspace_io. This does not handle watchpoints yet,
7369          * those would be handled in the emulate_ops.
7370          */
7371         if (!(emulation_type & EMULTYPE_SKIP) &&
7372             kvm_vcpu_check_breakpoint(vcpu, &r))
7373                 return r;
7374
7375         ctxt->interruptibility = 0;
7376         ctxt->have_exception = false;
7377         ctxt->exception.vector = -1;
7378         ctxt->perm_ok = false;
7379
7380         ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
7381
7382         r = x86_decode_insn(ctxt, insn, insn_len);
7383
7384         trace_kvm_emulate_insn_start(vcpu);
7385         ++vcpu->stat.insn_emulation;
7386
7387         return r;
7388 }
7389 EXPORT_SYMBOL_GPL(x86_decode_emulated_instruction);
7390
7391 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7392                             int emulation_type, void *insn, int insn_len)
7393 {
7394         int r;
7395         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7396         bool writeback = true;
7397         bool write_fault_to_spt;
7398
7399         if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, insn, insn_len)))
7400                 return 1;
7401
7402         vcpu->arch.l1tf_flush_l1d = true;
7403
7404         /*
7405          * Clear write_fault_to_shadow_pgtable here to ensure it is
7406          * never reused.
7407          */
7408         write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
7409         vcpu->arch.write_fault_to_shadow_pgtable = false;
7410
7411         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
7412                 kvm_clear_exception_queue(vcpu);
7413
7414                 r = x86_decode_emulated_instruction(vcpu, emulation_type,
7415                                                     insn, insn_len);
7416                 if (r != EMULATION_OK)  {
7417                         if ((emulation_type & EMULTYPE_TRAP_UD) ||
7418                             (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
7419                                 kvm_queue_exception(vcpu, UD_VECTOR);
7420                                 return 1;
7421                         }
7422                         if (reexecute_instruction(vcpu, cr2_or_gpa,
7423                                                   write_fault_to_spt,
7424                                                   emulation_type))
7425                                 return 1;
7426                         if (ctxt->have_exception) {
7427                                 /*
7428                                  * #UD should result in just EMULATION_FAILED, and trap-like
7429                                  * exception should not be encountered during decode.
7430                                  */
7431                                 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
7432                                              exception_type(ctxt->exception.vector) == EXCPT_TRAP);
7433                                 inject_emulated_exception(vcpu);
7434                                 return 1;
7435                         }
7436                         return handle_emulation_failure(vcpu, emulation_type);
7437                 }
7438         }
7439
7440         if ((emulation_type & EMULTYPE_VMWARE_GP) &&
7441             !is_vmware_backdoor_opcode(ctxt)) {
7442                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7443                 return 1;
7444         }
7445
7446         /*
7447          * Note, EMULTYPE_SKIP is intended for use *only* by vendor callbacks
7448          * for kvm_skip_emulated_instruction().  The caller is responsible for
7449          * updating interruptibility state and injecting single-step #DBs.
7450          */
7451         if (emulation_type & EMULTYPE_SKIP) {
7452                 kvm_rip_write(vcpu, ctxt->_eip);
7453                 if (ctxt->eflags & X86_EFLAGS_RF)
7454                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
7455                 return 1;
7456         }
7457
7458         if (retry_instruction(ctxt, cr2_or_gpa, emulation_type))
7459                 return 1;
7460
7461         /* this is needed for vmware backdoor interface to work since it
7462            changes registers values  during IO operation */
7463         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
7464                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7465                 emulator_invalidate_register_cache(ctxt);
7466         }
7467
7468 restart:
7469         if (emulation_type & EMULTYPE_PF) {
7470                 /* Save the faulting GPA (cr2) in the address field */
7471                 ctxt->exception.address = cr2_or_gpa;
7472
7473                 /* With shadow page tables, cr2 contains a GVA or nGPA. */
7474                 if (vcpu->arch.mmu->direct_map) {
7475                         ctxt->gpa_available = true;
7476                         ctxt->gpa_val = cr2_or_gpa;
7477                 }
7478         } else {
7479                 /* Sanitize the address out of an abundance of paranoia. */
7480                 ctxt->exception.address = 0;
7481         }
7482
7483         r = x86_emulate_insn(ctxt);
7484
7485         if (r == EMULATION_INTERCEPTED)
7486                 return 1;
7487
7488         if (r == EMULATION_FAILED) {
7489                 if (reexecute_instruction(vcpu, cr2_or_gpa, write_fault_to_spt,
7490                                         emulation_type))
7491                         return 1;
7492
7493                 return handle_emulation_failure(vcpu, emulation_type);
7494         }
7495
7496         if (ctxt->have_exception) {
7497                 r = 1;
7498                 if (inject_emulated_exception(vcpu))
7499                         return r;
7500         } else if (vcpu->arch.pio.count) {
7501                 if (!vcpu->arch.pio.in) {
7502                         /* FIXME: return into emulator if single-stepping.  */
7503                         vcpu->arch.pio.count = 0;
7504                 } else {
7505                         writeback = false;
7506                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
7507                 }
7508                 r = 0;
7509         } else if (vcpu->mmio_needed) {
7510                 ++vcpu->stat.mmio_exits;
7511
7512                 if (!vcpu->mmio_is_write)
7513                         writeback = false;
7514                 r = 0;
7515                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7516         } else if (r == EMULATION_RESTART)
7517                 goto restart;
7518         else
7519                 r = 1;
7520
7521         if (writeback) {
7522                 unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
7523                 toggle_interruptibility(vcpu, ctxt->interruptibility);
7524                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7525                 if (!ctxt->have_exception ||
7526                     exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
7527                         kvm_rip_write(vcpu, ctxt->eip);
7528                         if (r && (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
7529                                 r = kvm_vcpu_do_singlestep(vcpu);
7530                         if (kvm_x86_ops.update_emulated_instruction)
7531                                 static_call(kvm_x86_update_emulated_instruction)(vcpu);
7532                         __kvm_set_rflags(vcpu, ctxt->eflags);
7533                 }
7534
7535                 /*
7536                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
7537                  * do nothing, and it will be requested again as soon as
7538                  * the shadow expires.  But we still need to check here,
7539                  * because POPF has no interrupt shadow.
7540                  */
7541                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
7542                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7543         } else
7544                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
7545
7546         return r;
7547 }
7548
7549 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
7550 {
7551         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
7552 }
7553 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
7554
7555 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
7556                                         void *insn, int insn_len)
7557 {
7558         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
7559 }
7560 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
7561
7562 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
7563 {
7564         vcpu->arch.pio.count = 0;
7565         return 1;
7566 }
7567
7568 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
7569 {
7570         vcpu->arch.pio.count = 0;
7571
7572         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
7573                 return 1;
7574
7575         return kvm_skip_emulated_instruction(vcpu);
7576 }
7577
7578 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
7579                             unsigned short port)
7580 {
7581         unsigned long val = kvm_rax_read(vcpu);
7582         int ret = emulator_pio_out(vcpu, size, port, &val, 1);
7583
7584         if (ret)
7585                 return ret;
7586
7587         /*
7588          * Workaround userspace that relies on old KVM behavior of %rip being
7589          * incremented prior to exiting to userspace to handle "OUT 0x7e".
7590          */
7591         if (port == 0x7e &&
7592             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
7593                 vcpu->arch.complete_userspace_io =
7594                         complete_fast_pio_out_port_0x7e;
7595                 kvm_skip_emulated_instruction(vcpu);
7596         } else {
7597                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
7598                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
7599         }
7600         return 0;
7601 }
7602
7603 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
7604 {
7605         unsigned long val;
7606
7607         /* We should only ever be called with arch.pio.count equal to 1 */
7608         BUG_ON(vcpu->arch.pio.count != 1);
7609
7610         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
7611                 vcpu->arch.pio.count = 0;
7612                 return 1;
7613         }
7614
7615         /* For size less than 4 we merge, else we zero extend */
7616         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
7617
7618         /*
7619          * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
7620          * the copy and tracing
7621          */
7622         emulator_pio_in(vcpu, vcpu->arch.pio.size, vcpu->arch.pio.port, &val, 1);
7623         kvm_rax_write(vcpu, val);
7624
7625         return kvm_skip_emulated_instruction(vcpu);
7626 }
7627
7628 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
7629                            unsigned short port)
7630 {
7631         unsigned long val;
7632         int ret;
7633
7634         /* For size less than 4 we merge, else we zero extend */
7635         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
7636
7637         ret = emulator_pio_in(vcpu, size, port, &val, 1);
7638         if (ret) {
7639                 kvm_rax_write(vcpu, val);
7640                 return ret;
7641         }
7642
7643         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
7644         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
7645
7646         return 0;
7647 }
7648
7649 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
7650 {
7651         int ret;
7652
7653         if (in)
7654                 ret = kvm_fast_pio_in(vcpu, size, port);
7655         else
7656                 ret = kvm_fast_pio_out(vcpu, size, port);
7657         return ret && kvm_skip_emulated_instruction(vcpu);
7658 }
7659 EXPORT_SYMBOL_GPL(kvm_fast_pio);
7660
7661 static int kvmclock_cpu_down_prep(unsigned int cpu)
7662 {
7663         __this_cpu_write(cpu_tsc_khz, 0);
7664         return 0;
7665 }
7666
7667 static void tsc_khz_changed(void *data)
7668 {
7669         struct cpufreq_freqs *freq = data;
7670         unsigned long khz = 0;
7671
7672         if (data)
7673                 khz = freq->new;
7674         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
7675                 khz = cpufreq_quick_get(raw_smp_processor_id());
7676         if (!khz)
7677                 khz = tsc_khz;
7678         __this_cpu_write(cpu_tsc_khz, khz);
7679 }
7680
7681 #ifdef CONFIG_X86_64
7682 static void kvm_hyperv_tsc_notifier(void)
7683 {
7684         struct kvm *kvm;
7685         struct kvm_vcpu *vcpu;
7686         int cpu;
7687
7688         mutex_lock(&kvm_lock);
7689         list_for_each_entry(kvm, &vm_list, vm_list)
7690                 kvm_make_mclock_inprogress_request(kvm);
7691
7692         hyperv_stop_tsc_emulation();
7693
7694         /* TSC frequency always matches when on Hyper-V */
7695         for_each_present_cpu(cpu)
7696                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
7697         kvm_max_guest_tsc_khz = tsc_khz;
7698
7699         list_for_each_entry(kvm, &vm_list, vm_list) {
7700                 struct kvm_arch *ka = &kvm->arch;
7701
7702                 spin_lock(&ka->pvclock_gtod_sync_lock);
7703
7704                 pvclock_update_vm_gtod_copy(kvm);
7705
7706                 kvm_for_each_vcpu(cpu, vcpu, kvm)
7707                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7708
7709                 kvm_for_each_vcpu(cpu, vcpu, kvm)
7710                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
7711
7712                 spin_unlock(&ka->pvclock_gtod_sync_lock);
7713         }
7714         mutex_unlock(&kvm_lock);
7715 }
7716 #endif
7717
7718 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
7719 {
7720         struct kvm *kvm;
7721         struct kvm_vcpu *vcpu;
7722         int i, send_ipi = 0;
7723
7724         /*
7725          * We allow guests to temporarily run on slowing clocks,
7726          * provided we notify them after, or to run on accelerating
7727          * clocks, provided we notify them before.  Thus time never
7728          * goes backwards.
7729          *
7730          * However, we have a problem.  We can't atomically update
7731          * the frequency of a given CPU from this function; it is
7732          * merely a notifier, which can be called from any CPU.
7733          * Changing the TSC frequency at arbitrary points in time
7734          * requires a recomputation of local variables related to
7735          * the TSC for each VCPU.  We must flag these local variables
7736          * to be updated and be sure the update takes place with the
7737          * new frequency before any guests proceed.
7738          *
7739          * Unfortunately, the combination of hotplug CPU and frequency
7740          * change creates an intractable locking scenario; the order
7741          * of when these callouts happen is undefined with respect to
7742          * CPU hotplug, and they can race with each other.  As such,
7743          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
7744          * undefined; you can actually have a CPU frequency change take
7745          * place in between the computation of X and the setting of the
7746          * variable.  To protect against this problem, all updates of
7747          * the per_cpu tsc_khz variable are done in an interrupt
7748          * protected IPI, and all callers wishing to update the value
7749          * must wait for a synchronous IPI to complete (which is trivial
7750          * if the caller is on the CPU already).  This establishes the
7751          * necessary total order on variable updates.
7752          *
7753          * Note that because a guest time update may take place
7754          * anytime after the setting of the VCPU's request bit, the
7755          * correct TSC value must be set before the request.  However,
7756          * to ensure the update actually makes it to any guest which
7757          * starts running in hardware virtualization between the set
7758          * and the acquisition of the spinlock, we must also ping the
7759          * CPU after setting the request bit.
7760          *
7761          */
7762
7763         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
7764
7765         mutex_lock(&kvm_lock);
7766         list_for_each_entry(kvm, &vm_list, vm_list) {
7767                 kvm_for_each_vcpu(i, vcpu, kvm) {
7768                         if (vcpu->cpu != cpu)
7769                                 continue;
7770                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7771                         if (vcpu->cpu != raw_smp_processor_id())
7772                                 send_ipi = 1;
7773                 }
7774         }
7775         mutex_unlock(&kvm_lock);
7776
7777         if (freq->old < freq->new && send_ipi) {
7778                 /*
7779                  * We upscale the frequency.  Must make the guest
7780                  * doesn't see old kvmclock values while running with
7781                  * the new frequency, otherwise we risk the guest sees
7782                  * time go backwards.
7783                  *
7784                  * In case we update the frequency for another cpu
7785                  * (which might be in guest context) send an interrupt
7786                  * to kick the cpu out of guest context.  Next time
7787                  * guest context is entered kvmclock will be updated,
7788                  * so the guest will not see stale values.
7789                  */
7790                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
7791         }
7792 }
7793
7794 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
7795                                      void *data)
7796 {
7797         struct cpufreq_freqs *freq = data;
7798         int cpu;
7799
7800         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
7801                 return 0;
7802         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
7803                 return 0;
7804
7805         for_each_cpu(cpu, freq->policy->cpus)
7806                 __kvmclock_cpufreq_notifier(freq, cpu);
7807
7808         return 0;
7809 }
7810
7811 static struct notifier_block kvmclock_cpufreq_notifier_block = {
7812         .notifier_call  = kvmclock_cpufreq_notifier
7813 };
7814
7815 static int kvmclock_cpu_online(unsigned int cpu)
7816 {
7817         tsc_khz_changed(NULL);
7818         return 0;
7819 }
7820
7821 static void kvm_timer_init(void)
7822 {
7823         max_tsc_khz = tsc_khz;
7824
7825         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
7826 #ifdef CONFIG_CPU_FREQ
7827                 struct cpufreq_policy *policy;
7828                 int cpu;
7829
7830                 cpu = get_cpu();
7831                 policy = cpufreq_cpu_get(cpu);
7832                 if (policy) {
7833                         if (policy->cpuinfo.max_freq)
7834                                 max_tsc_khz = policy->cpuinfo.max_freq;
7835                         cpufreq_cpu_put(policy);
7836                 }
7837                 put_cpu();
7838 #endif
7839                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
7840                                           CPUFREQ_TRANSITION_NOTIFIER);
7841         }
7842
7843         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
7844                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
7845 }
7846
7847 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
7848 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
7849
7850 int kvm_is_in_guest(void)
7851 {
7852         return __this_cpu_read(current_vcpu) != NULL;
7853 }
7854
7855 static int kvm_is_user_mode(void)
7856 {
7857         int user_mode = 3;
7858
7859         if (__this_cpu_read(current_vcpu))
7860                 user_mode = static_call(kvm_x86_get_cpl)(__this_cpu_read(current_vcpu));
7861
7862         return user_mode != 0;
7863 }
7864
7865 static unsigned long kvm_get_guest_ip(void)
7866 {
7867         unsigned long ip = 0;
7868
7869         if (__this_cpu_read(current_vcpu))
7870                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
7871
7872         return ip;
7873 }
7874
7875 static void kvm_handle_intel_pt_intr(void)
7876 {
7877         struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
7878
7879         kvm_make_request(KVM_REQ_PMI, vcpu);
7880         __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
7881                         (unsigned long *)&vcpu->arch.pmu.global_status);
7882 }
7883
7884 static struct perf_guest_info_callbacks kvm_guest_cbs = {
7885         .is_in_guest            = kvm_is_in_guest,
7886         .is_user_mode           = kvm_is_user_mode,
7887         .get_guest_ip           = kvm_get_guest_ip,
7888         .handle_intel_pt_intr   = kvm_handle_intel_pt_intr,
7889 };
7890
7891 #ifdef CONFIG_X86_64
7892 static void pvclock_gtod_update_fn(struct work_struct *work)
7893 {
7894         struct kvm *kvm;
7895
7896         struct kvm_vcpu *vcpu;
7897         int i;
7898
7899         mutex_lock(&kvm_lock);
7900         list_for_each_entry(kvm, &vm_list, vm_list)
7901                 kvm_for_each_vcpu(i, vcpu, kvm)
7902                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7903         atomic_set(&kvm_guest_has_master_clock, 0);
7904         mutex_unlock(&kvm_lock);
7905 }
7906
7907 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
7908
7909 /*
7910  * Notification about pvclock gtod data update.
7911  */
7912 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
7913                                void *priv)
7914 {
7915         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
7916         struct timekeeper *tk = priv;
7917
7918         update_pvclock_gtod(tk);
7919
7920         /* disable master clock if host does not trust, or does not
7921          * use, TSC based clocksource.
7922          */
7923         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
7924             atomic_read(&kvm_guest_has_master_clock) != 0)
7925                 queue_work(system_long_wq, &pvclock_gtod_work);
7926
7927         return 0;
7928 }
7929
7930 static struct notifier_block pvclock_gtod_notifier = {
7931         .notifier_call = pvclock_gtod_notify,
7932 };
7933 #endif
7934
7935 int kvm_arch_init(void *opaque)
7936 {
7937         struct kvm_x86_init_ops *ops = opaque;
7938         int r;
7939
7940         if (kvm_x86_ops.hardware_enable) {
7941                 printk(KERN_ERR "kvm: already loaded the other module\n");
7942                 r = -EEXIST;
7943                 goto out;
7944         }
7945
7946         if (!ops->cpu_has_kvm_support()) {
7947                 pr_err_ratelimited("kvm: no hardware support\n");
7948                 r = -EOPNOTSUPP;
7949                 goto out;
7950         }
7951         if (ops->disabled_by_bios()) {
7952                 pr_err_ratelimited("kvm: disabled by bios\n");
7953                 r = -EOPNOTSUPP;
7954                 goto out;
7955         }
7956
7957         /*
7958          * KVM explicitly assumes that the guest has an FPU and
7959          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
7960          * vCPU's FPU state as a fxregs_state struct.
7961          */
7962         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
7963                 printk(KERN_ERR "kvm: inadequate fpu\n");
7964                 r = -EOPNOTSUPP;
7965                 goto out;
7966         }
7967
7968         r = -ENOMEM;
7969         x86_fpu_cache = kmem_cache_create("x86_fpu", sizeof(struct fpu),
7970                                           __alignof__(struct fpu), SLAB_ACCOUNT,
7971                                           NULL);
7972         if (!x86_fpu_cache) {
7973                 printk(KERN_ERR "kvm: failed to allocate cache for x86 fpu\n");
7974                 goto out;
7975         }
7976
7977         x86_emulator_cache = kvm_alloc_emulator_cache();
7978         if (!x86_emulator_cache) {
7979                 pr_err("kvm: failed to allocate cache for x86 emulator\n");
7980                 goto out_free_x86_fpu_cache;
7981         }
7982
7983         user_return_msrs = alloc_percpu(struct kvm_user_return_msrs);
7984         if (!user_return_msrs) {
7985                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_user_return_msrs\n");
7986                 goto out_free_x86_emulator_cache;
7987         }
7988
7989         r = kvm_mmu_module_init();
7990         if (r)
7991                 goto out_free_percpu;
7992
7993         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
7994                         PT_DIRTY_MASK, PT64_NX_MASK, 0,
7995                         PT_PRESENT_MASK, 0, sme_me_mask);
7996         kvm_timer_init();
7997
7998         perf_register_guest_info_callbacks(&kvm_guest_cbs);
7999
8000         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
8001                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
8002                 supported_xcr0 = host_xcr0 & KVM_SUPPORTED_XCR0;
8003         }
8004
8005         if (pi_inject_timer == -1)
8006                 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
8007 #ifdef CONFIG_X86_64
8008         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
8009
8010         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8011                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
8012 #endif
8013
8014         return 0;
8015
8016 out_free_percpu:
8017         free_percpu(user_return_msrs);
8018 out_free_x86_emulator_cache:
8019         kmem_cache_destroy(x86_emulator_cache);
8020 out_free_x86_fpu_cache:
8021         kmem_cache_destroy(x86_fpu_cache);
8022 out:
8023         return r;
8024 }
8025
8026 void kvm_arch_exit(void)
8027 {
8028 #ifdef CONFIG_X86_64
8029         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8030                 clear_hv_tscchange_cb();
8031 #endif
8032         kvm_lapic_exit();
8033         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
8034
8035         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8036                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
8037                                             CPUFREQ_TRANSITION_NOTIFIER);
8038         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
8039 #ifdef CONFIG_X86_64
8040         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
8041 #endif
8042         kvm_x86_ops.hardware_enable = NULL;
8043         kvm_mmu_module_exit();
8044         free_percpu(user_return_msrs);
8045         kmem_cache_destroy(x86_fpu_cache);
8046         WARN_ON(static_branch_unlikely(&kvm_xen_enabled.key));
8047 }
8048
8049 static int __kvm_vcpu_halt(struct kvm_vcpu *vcpu, int state, int reason)
8050 {
8051         ++vcpu->stat.halt_exits;
8052         if (lapic_in_kernel(vcpu)) {
8053                 vcpu->arch.mp_state = state;
8054                 return 1;
8055         } else {
8056                 vcpu->run->exit_reason = reason;
8057                 return 0;
8058         }
8059 }
8060
8061 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
8062 {
8063         return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_HALTED, KVM_EXIT_HLT);
8064 }
8065 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
8066
8067 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
8068 {
8069         int ret = kvm_skip_emulated_instruction(vcpu);
8070         /*
8071          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
8072          * KVM_EXIT_DEBUG here.
8073          */
8074         return kvm_vcpu_halt(vcpu) && ret;
8075 }
8076 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
8077
8078 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu)
8079 {
8080         int ret = kvm_skip_emulated_instruction(vcpu);
8081
8082         return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_AP_RESET_HOLD, KVM_EXIT_AP_RESET_HOLD) && ret;
8083 }
8084 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold);
8085
8086 #ifdef CONFIG_X86_64
8087 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
8088                                 unsigned long clock_type)
8089 {
8090         struct kvm_clock_pairing clock_pairing;
8091         struct timespec64 ts;
8092         u64 cycle;
8093         int ret;
8094
8095         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
8096                 return -KVM_EOPNOTSUPP;
8097
8098         if (!kvm_get_walltime_and_clockread(&ts, &cycle))
8099                 return -KVM_EOPNOTSUPP;
8100
8101         clock_pairing.sec = ts.tv_sec;
8102         clock_pairing.nsec = ts.tv_nsec;
8103         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
8104         clock_pairing.flags = 0;
8105         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
8106
8107         ret = 0;
8108         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
8109                             sizeof(struct kvm_clock_pairing)))
8110                 ret = -KVM_EFAULT;
8111
8112         return ret;
8113 }
8114 #endif
8115
8116 /*
8117  * kvm_pv_kick_cpu_op:  Kick a vcpu.
8118  *
8119  * @apicid - apicid of vcpu to be kicked.
8120  */
8121 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
8122 {
8123         struct kvm_lapic_irq lapic_irq;
8124
8125         lapic_irq.shorthand = APIC_DEST_NOSHORT;
8126         lapic_irq.dest_mode = APIC_DEST_PHYSICAL;
8127         lapic_irq.level = 0;
8128         lapic_irq.dest_id = apicid;
8129         lapic_irq.msi_redir_hint = false;
8130
8131         lapic_irq.delivery_mode = APIC_DM_REMRD;
8132         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
8133 }
8134
8135 bool kvm_apicv_activated(struct kvm *kvm)
8136 {
8137         return (READ_ONCE(kvm->arch.apicv_inhibit_reasons) == 0);
8138 }
8139 EXPORT_SYMBOL_GPL(kvm_apicv_activated);
8140
8141 void kvm_apicv_init(struct kvm *kvm, bool enable)
8142 {
8143         if (enable)
8144                 clear_bit(APICV_INHIBIT_REASON_DISABLE,
8145                           &kvm->arch.apicv_inhibit_reasons);
8146         else
8147                 set_bit(APICV_INHIBIT_REASON_DISABLE,
8148                         &kvm->arch.apicv_inhibit_reasons);
8149 }
8150 EXPORT_SYMBOL_GPL(kvm_apicv_init);
8151
8152 static void kvm_sched_yield(struct kvm *kvm, unsigned long dest_id)
8153 {
8154         struct kvm_vcpu *target = NULL;
8155         struct kvm_apic_map *map;
8156
8157         rcu_read_lock();
8158         map = rcu_dereference(kvm->arch.apic_map);
8159
8160         if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
8161                 target = map->phys_map[dest_id]->vcpu;
8162
8163         rcu_read_unlock();
8164
8165         if (target && READ_ONCE(target->ready))
8166                 kvm_vcpu_yield_to(target);
8167 }
8168
8169 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
8170 {
8171         unsigned long nr, a0, a1, a2, a3, ret;
8172         int op_64_bit;
8173
8174         if (kvm_xen_hypercall_enabled(vcpu->kvm))
8175                 return kvm_xen_hypercall(vcpu);
8176
8177         if (kvm_hv_hypercall_enabled(vcpu->kvm))
8178                 return kvm_hv_hypercall(vcpu);
8179
8180         nr = kvm_rax_read(vcpu);
8181         a0 = kvm_rbx_read(vcpu);
8182         a1 = kvm_rcx_read(vcpu);
8183         a2 = kvm_rdx_read(vcpu);
8184         a3 = kvm_rsi_read(vcpu);
8185
8186         trace_kvm_hypercall(nr, a0, a1, a2, a3);
8187
8188         op_64_bit = is_64_bit_mode(vcpu);
8189         if (!op_64_bit) {
8190                 nr &= 0xFFFFFFFF;
8191                 a0 &= 0xFFFFFFFF;
8192                 a1 &= 0xFFFFFFFF;
8193                 a2 &= 0xFFFFFFFF;
8194                 a3 &= 0xFFFFFFFF;
8195         }
8196
8197         if (static_call(kvm_x86_get_cpl)(vcpu) != 0) {
8198                 ret = -KVM_EPERM;
8199                 goto out;
8200         }
8201
8202         ret = -KVM_ENOSYS;
8203
8204         switch (nr) {
8205         case KVM_HC_VAPIC_POLL_IRQ:
8206                 ret = 0;
8207                 break;
8208         case KVM_HC_KICK_CPU:
8209                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_UNHALT))
8210                         break;
8211
8212                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
8213                 kvm_sched_yield(vcpu->kvm, a1);
8214                 ret = 0;
8215                 break;
8216 #ifdef CONFIG_X86_64
8217         case KVM_HC_CLOCK_PAIRING:
8218                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
8219                 break;
8220 #endif
8221         case KVM_HC_SEND_IPI:
8222                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SEND_IPI))
8223                         break;
8224
8225                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
8226                 break;
8227         case KVM_HC_SCHED_YIELD:
8228                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SCHED_YIELD))
8229                         break;
8230
8231                 kvm_sched_yield(vcpu->kvm, a0);
8232                 ret = 0;
8233                 break;
8234         default:
8235                 ret = -KVM_ENOSYS;
8236                 break;
8237         }
8238 out:
8239         if (!op_64_bit)
8240                 ret = (u32)ret;
8241         kvm_rax_write(vcpu, ret);
8242
8243         ++vcpu->stat.hypercalls;
8244         return kvm_skip_emulated_instruction(vcpu);
8245 }
8246 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
8247
8248 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
8249 {
8250         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
8251         char instruction[3];
8252         unsigned long rip = kvm_rip_read(vcpu);
8253
8254         static_call(kvm_x86_patch_hypercall)(vcpu, instruction);
8255
8256         return emulator_write_emulated(ctxt, rip, instruction, 3,
8257                 &ctxt->exception);
8258 }
8259
8260 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
8261 {
8262         return vcpu->run->request_interrupt_window &&
8263                 likely(!pic_in_kernel(vcpu->kvm));
8264 }
8265
8266 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
8267 {
8268         struct kvm_run *kvm_run = vcpu->run;
8269
8270         /*
8271          * if_flag is obsolete and useless, so do not bother
8272          * setting it for SEV-ES guests.  Userspace can just
8273          * use kvm_run->ready_for_interrupt_injection.
8274          */
8275         kvm_run->if_flag = !vcpu->arch.guest_state_protected
8276                 && (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
8277
8278         kvm_run->cr8 = kvm_get_cr8(vcpu);
8279         kvm_run->apic_base = kvm_get_apic_base(vcpu);
8280         kvm_run->ready_for_interrupt_injection =
8281                 pic_in_kernel(vcpu->kvm) ||
8282                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
8283
8284         if (is_smm(vcpu))
8285                 kvm_run->flags |= KVM_RUN_X86_SMM;
8286 }
8287
8288 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
8289 {
8290         int max_irr, tpr;
8291
8292         if (!kvm_x86_ops.update_cr8_intercept)
8293                 return;
8294
8295         if (!lapic_in_kernel(vcpu))
8296                 return;
8297
8298         if (vcpu->arch.apicv_active)
8299                 return;
8300
8301         if (!vcpu->arch.apic->vapic_addr)
8302                 max_irr = kvm_lapic_find_highest_irr(vcpu);
8303         else
8304                 max_irr = -1;
8305
8306         if (max_irr != -1)
8307                 max_irr >>= 4;
8308
8309         tpr = kvm_lapic_get_cr8(vcpu);
8310
8311         static_call(kvm_x86_update_cr8_intercept)(vcpu, tpr, max_irr);
8312 }
8313
8314 static void inject_pending_event(struct kvm_vcpu *vcpu, bool *req_immediate_exit)
8315 {
8316         int r;
8317         bool can_inject = true;
8318
8319         /* try to reinject previous events if any */
8320
8321         if (vcpu->arch.exception.injected) {
8322                 static_call(kvm_x86_queue_exception)(vcpu);
8323                 can_inject = false;
8324         }
8325         /*
8326          * Do not inject an NMI or interrupt if there is a pending
8327          * exception.  Exceptions and interrupts are recognized at
8328          * instruction boundaries, i.e. the start of an instruction.
8329          * Trap-like exceptions, e.g. #DB, have higher priority than
8330          * NMIs and interrupts, i.e. traps are recognized before an
8331          * NMI/interrupt that's pending on the same instruction.
8332          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
8333          * priority, but are only generated (pended) during instruction
8334          * execution, i.e. a pending fault-like exception means the
8335          * fault occurred on the *previous* instruction and must be
8336          * serviced prior to recognizing any new events in order to
8337          * fully complete the previous instruction.
8338          */
8339         else if (!vcpu->arch.exception.pending) {
8340                 if (vcpu->arch.nmi_injected) {
8341                         static_call(kvm_x86_set_nmi)(vcpu);
8342                         can_inject = false;
8343                 } else if (vcpu->arch.interrupt.injected) {
8344                         static_call(kvm_x86_set_irq)(vcpu);
8345                         can_inject = false;
8346                 }
8347         }
8348
8349         WARN_ON_ONCE(vcpu->arch.exception.injected &&
8350                      vcpu->arch.exception.pending);
8351
8352         /*
8353          * Call check_nested_events() even if we reinjected a previous event
8354          * in order for caller to determine if it should require immediate-exit
8355          * from L2 to L1 due to pending L1 events which require exit
8356          * from L2 to L1.
8357          */
8358         if (is_guest_mode(vcpu)) {
8359                 r = kvm_x86_ops.nested_ops->check_events(vcpu);
8360                 if (r < 0)
8361                         goto busy;
8362         }
8363
8364         /* try to inject new event if pending */
8365         if (vcpu->arch.exception.pending) {
8366                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
8367                                         vcpu->arch.exception.has_error_code,
8368                                         vcpu->arch.exception.error_code);
8369
8370                 vcpu->arch.exception.pending = false;
8371                 vcpu->arch.exception.injected = true;
8372
8373                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
8374                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
8375                                              X86_EFLAGS_RF);
8376
8377                 if (vcpu->arch.exception.nr == DB_VECTOR) {
8378                         kvm_deliver_exception_payload(vcpu);
8379                         if (vcpu->arch.dr7 & DR7_GD) {
8380                                 vcpu->arch.dr7 &= ~DR7_GD;
8381                                 kvm_update_dr7(vcpu);
8382                         }
8383                 }
8384
8385                 static_call(kvm_x86_queue_exception)(vcpu);
8386                 can_inject = false;
8387         }
8388
8389         /*
8390          * Finally, inject interrupt events.  If an event cannot be injected
8391          * due to architectural conditions (e.g. IF=0) a window-open exit
8392          * will re-request KVM_REQ_EVENT.  Sometimes however an event is pending
8393          * and can architecturally be injected, but we cannot do it right now:
8394          * an interrupt could have arrived just now and we have to inject it
8395          * as a vmexit, or there could already an event in the queue, which is
8396          * indicated by can_inject.  In that case we request an immediate exit
8397          * in order to make progress and get back here for another iteration.
8398          * The kvm_x86_ops hooks communicate this by returning -EBUSY.
8399          */
8400         if (vcpu->arch.smi_pending) {
8401                 r = can_inject ? static_call(kvm_x86_smi_allowed)(vcpu, true) : -EBUSY;
8402                 if (r < 0)
8403                         goto busy;
8404                 if (r) {
8405                         vcpu->arch.smi_pending = false;
8406                         ++vcpu->arch.smi_count;
8407                         enter_smm(vcpu);
8408                         can_inject = false;
8409                 } else
8410                         static_call(kvm_x86_enable_smi_window)(vcpu);
8411         }
8412
8413         if (vcpu->arch.nmi_pending) {
8414                 r = can_inject ? static_call(kvm_x86_nmi_allowed)(vcpu, true) : -EBUSY;
8415                 if (r < 0)
8416                         goto busy;
8417                 if (r) {
8418                         --vcpu->arch.nmi_pending;
8419                         vcpu->arch.nmi_injected = true;
8420                         static_call(kvm_x86_set_nmi)(vcpu);
8421                         can_inject = false;
8422                         WARN_ON(static_call(kvm_x86_nmi_allowed)(vcpu, true) < 0);
8423                 }
8424                 if (vcpu->arch.nmi_pending)
8425                         static_call(kvm_x86_enable_nmi_window)(vcpu);
8426         }
8427
8428         if (kvm_cpu_has_injectable_intr(vcpu)) {
8429                 r = can_inject ? static_call(kvm_x86_interrupt_allowed)(vcpu, true) : -EBUSY;
8430                 if (r < 0)
8431                         goto busy;
8432                 if (r) {
8433                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu), false);
8434                         static_call(kvm_x86_set_irq)(vcpu);
8435                         WARN_ON(static_call(kvm_x86_interrupt_allowed)(vcpu, true) < 0);
8436                 }
8437                 if (kvm_cpu_has_injectable_intr(vcpu))
8438                         static_call(kvm_x86_enable_irq_window)(vcpu);
8439         }
8440
8441         if (is_guest_mode(vcpu) &&
8442             kvm_x86_ops.nested_ops->hv_timer_pending &&
8443             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
8444                 *req_immediate_exit = true;
8445
8446         WARN_ON(vcpu->arch.exception.pending);
8447         return;
8448
8449 busy:
8450         *req_immediate_exit = true;
8451         return;
8452 }
8453
8454 static void process_nmi(struct kvm_vcpu *vcpu)
8455 {
8456         unsigned limit = 2;
8457
8458         /*
8459          * x86 is limited to one NMI running, and one NMI pending after it.
8460          * If an NMI is already in progress, limit further NMIs to just one.
8461          * Otherwise, allow two (and we'll inject the first one immediately).
8462          */
8463         if (static_call(kvm_x86_get_nmi_mask)(vcpu) || vcpu->arch.nmi_injected)
8464                 limit = 1;
8465
8466         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
8467         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
8468         kvm_make_request(KVM_REQ_EVENT, vcpu);
8469 }
8470
8471 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
8472 {
8473         u32 flags = 0;
8474         flags |= seg->g       << 23;
8475         flags |= seg->db      << 22;
8476         flags |= seg->l       << 21;
8477         flags |= seg->avl     << 20;
8478         flags |= seg->present << 15;
8479         flags |= seg->dpl     << 13;
8480         flags |= seg->s       << 12;
8481         flags |= seg->type    << 8;
8482         return flags;
8483 }
8484
8485 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
8486 {
8487         struct kvm_segment seg;
8488         int offset;
8489
8490         kvm_get_segment(vcpu, &seg, n);
8491         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
8492
8493         if (n < 3)
8494                 offset = 0x7f84 + n * 12;
8495         else
8496                 offset = 0x7f2c + (n - 3) * 12;
8497
8498         put_smstate(u32, buf, offset + 8, seg.base);
8499         put_smstate(u32, buf, offset + 4, seg.limit);
8500         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
8501 }
8502
8503 #ifdef CONFIG_X86_64
8504 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
8505 {
8506         struct kvm_segment seg;
8507         int offset;
8508         u16 flags;
8509
8510         kvm_get_segment(vcpu, &seg, n);
8511         offset = 0x7e00 + n * 16;
8512
8513         flags = enter_smm_get_segment_flags(&seg) >> 8;
8514         put_smstate(u16, buf, offset, seg.selector);
8515         put_smstate(u16, buf, offset + 2, flags);
8516         put_smstate(u32, buf, offset + 4, seg.limit);
8517         put_smstate(u64, buf, offset + 8, seg.base);
8518 }
8519 #endif
8520
8521 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
8522 {
8523         struct desc_ptr dt;
8524         struct kvm_segment seg;
8525         unsigned long val;
8526         int i;
8527
8528         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
8529         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
8530         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
8531         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
8532
8533         for (i = 0; i < 8; i++)
8534                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
8535
8536         kvm_get_dr(vcpu, 6, &val);
8537         put_smstate(u32, buf, 0x7fcc, (u32)val);
8538         kvm_get_dr(vcpu, 7, &val);
8539         put_smstate(u32, buf, 0x7fc8, (u32)val);
8540
8541         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
8542         put_smstate(u32, buf, 0x7fc4, seg.selector);
8543         put_smstate(u32, buf, 0x7f64, seg.base);
8544         put_smstate(u32, buf, 0x7f60, seg.limit);
8545         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
8546
8547         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
8548         put_smstate(u32, buf, 0x7fc0, seg.selector);
8549         put_smstate(u32, buf, 0x7f80, seg.base);
8550         put_smstate(u32, buf, 0x7f7c, seg.limit);
8551         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
8552
8553         static_call(kvm_x86_get_gdt)(vcpu, &dt);
8554         put_smstate(u32, buf, 0x7f74, dt.address);
8555         put_smstate(u32, buf, 0x7f70, dt.size);
8556
8557         static_call(kvm_x86_get_idt)(vcpu, &dt);
8558         put_smstate(u32, buf, 0x7f58, dt.address);
8559         put_smstate(u32, buf, 0x7f54, dt.size);
8560
8561         for (i = 0; i < 6; i++)
8562                 enter_smm_save_seg_32(vcpu, buf, i);
8563
8564         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
8565
8566         /* revision id */
8567         put_smstate(u32, buf, 0x7efc, 0x00020000);
8568         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
8569 }
8570
8571 #ifdef CONFIG_X86_64
8572 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
8573 {
8574         struct desc_ptr dt;
8575         struct kvm_segment seg;
8576         unsigned long val;
8577         int i;
8578
8579         for (i = 0; i < 16; i++)
8580                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
8581
8582         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
8583         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
8584
8585         kvm_get_dr(vcpu, 6, &val);
8586         put_smstate(u64, buf, 0x7f68, val);
8587         kvm_get_dr(vcpu, 7, &val);
8588         put_smstate(u64, buf, 0x7f60, val);
8589
8590         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
8591         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
8592         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
8593
8594         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
8595
8596         /* revision id */
8597         put_smstate(u32, buf, 0x7efc, 0x00020064);
8598
8599         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
8600
8601         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
8602         put_smstate(u16, buf, 0x7e90, seg.selector);
8603         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
8604         put_smstate(u32, buf, 0x7e94, seg.limit);
8605         put_smstate(u64, buf, 0x7e98, seg.base);
8606
8607         static_call(kvm_x86_get_idt)(vcpu, &dt);
8608         put_smstate(u32, buf, 0x7e84, dt.size);
8609         put_smstate(u64, buf, 0x7e88, dt.address);
8610
8611         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
8612         put_smstate(u16, buf, 0x7e70, seg.selector);
8613         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
8614         put_smstate(u32, buf, 0x7e74, seg.limit);
8615         put_smstate(u64, buf, 0x7e78, seg.base);
8616
8617         static_call(kvm_x86_get_gdt)(vcpu, &dt);
8618         put_smstate(u32, buf, 0x7e64, dt.size);
8619         put_smstate(u64, buf, 0x7e68, dt.address);
8620
8621         for (i = 0; i < 6; i++)
8622                 enter_smm_save_seg_64(vcpu, buf, i);
8623 }
8624 #endif
8625
8626 static void enter_smm(struct kvm_vcpu *vcpu)
8627 {
8628         struct kvm_segment cs, ds;
8629         struct desc_ptr dt;
8630         char buf[512];
8631         u32 cr0;
8632
8633         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
8634         memset(buf, 0, 512);
8635 #ifdef CONFIG_X86_64
8636         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
8637                 enter_smm_save_state_64(vcpu, buf);
8638         else
8639 #endif
8640                 enter_smm_save_state_32(vcpu, buf);
8641
8642         /*
8643          * Give pre_enter_smm() a chance to make ISA-specific changes to the
8644          * vCPU state (e.g. leave guest mode) after we've saved the state into
8645          * the SMM state-save area.
8646          */
8647         static_call(kvm_x86_pre_enter_smm)(vcpu, buf);
8648
8649         vcpu->arch.hflags |= HF_SMM_MASK;
8650         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
8651
8652         if (static_call(kvm_x86_get_nmi_mask)(vcpu))
8653                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
8654         else
8655                 static_call(kvm_x86_set_nmi_mask)(vcpu, true);
8656
8657         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
8658         kvm_rip_write(vcpu, 0x8000);
8659
8660         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
8661         static_call(kvm_x86_set_cr0)(vcpu, cr0);
8662         vcpu->arch.cr0 = cr0;
8663
8664         static_call(kvm_x86_set_cr4)(vcpu, 0);
8665
8666         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
8667         dt.address = dt.size = 0;
8668         static_call(kvm_x86_set_idt)(vcpu, &dt);
8669
8670         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
8671
8672         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
8673         cs.base = vcpu->arch.smbase;
8674
8675         ds.selector = 0;
8676         ds.base = 0;
8677
8678         cs.limit    = ds.limit = 0xffffffff;
8679         cs.type     = ds.type = 0x3;
8680         cs.dpl      = ds.dpl = 0;
8681         cs.db       = ds.db = 0;
8682         cs.s        = ds.s = 1;
8683         cs.l        = ds.l = 0;
8684         cs.g        = ds.g = 1;
8685         cs.avl      = ds.avl = 0;
8686         cs.present  = ds.present = 1;
8687         cs.unusable = ds.unusable = 0;
8688         cs.padding  = ds.padding = 0;
8689
8690         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
8691         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
8692         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
8693         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
8694         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
8695         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
8696
8697 #ifdef CONFIG_X86_64
8698         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
8699                 static_call(kvm_x86_set_efer)(vcpu, 0);
8700 #endif
8701
8702         kvm_update_cpuid_runtime(vcpu);
8703         kvm_mmu_reset_context(vcpu);
8704 }
8705
8706 static void process_smi(struct kvm_vcpu *vcpu)
8707 {
8708         vcpu->arch.smi_pending = true;
8709         kvm_make_request(KVM_REQ_EVENT, vcpu);
8710 }
8711
8712 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
8713                                        unsigned long *vcpu_bitmap)
8714 {
8715         cpumask_var_t cpus;
8716
8717         zalloc_cpumask_var(&cpus, GFP_ATOMIC);
8718
8719         kvm_make_vcpus_request_mask(kvm, KVM_REQ_SCAN_IOAPIC,
8720                                     NULL, vcpu_bitmap, cpus);
8721
8722         free_cpumask_var(cpus);
8723 }
8724
8725 void kvm_make_scan_ioapic_request(struct kvm *kvm)
8726 {
8727         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
8728 }
8729
8730 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
8731 {
8732         if (!lapic_in_kernel(vcpu))
8733                 return;
8734
8735         vcpu->arch.apicv_active = kvm_apicv_activated(vcpu->kvm);
8736         kvm_apic_update_apicv(vcpu);
8737         static_call(kvm_x86_refresh_apicv_exec_ctrl)(vcpu);
8738 }
8739 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv);
8740
8741 /*
8742  * NOTE: Do not hold any lock prior to calling this.
8743  *
8744  * In particular, kvm_request_apicv_update() expects kvm->srcu not to be
8745  * locked, because it calls __x86_set_memory_region() which does
8746  * synchronize_srcu(&kvm->srcu).
8747  */
8748 void kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
8749 {
8750         struct kvm_vcpu *except;
8751         unsigned long old, new, expected;
8752
8753         if (!kvm_x86_ops.check_apicv_inhibit_reasons ||
8754             !static_call(kvm_x86_check_apicv_inhibit_reasons)(bit))
8755                 return;
8756
8757         old = READ_ONCE(kvm->arch.apicv_inhibit_reasons);
8758         do {
8759                 expected = new = old;
8760                 if (activate)
8761                         __clear_bit(bit, &new);
8762                 else
8763                         __set_bit(bit, &new);
8764                 if (new == old)
8765                         break;
8766                 old = cmpxchg(&kvm->arch.apicv_inhibit_reasons, expected, new);
8767         } while (old != expected);
8768
8769         if (!!old == !!new)
8770                 return;
8771
8772         trace_kvm_apicv_update_request(activate, bit);
8773         if (kvm_x86_ops.pre_update_apicv_exec_ctrl)
8774                 static_call(kvm_x86_pre_update_apicv_exec_ctrl)(kvm, activate);
8775
8776         /*
8777          * Sending request to update APICV for all other vcpus,
8778          * while update the calling vcpu immediately instead of
8779          * waiting for another #VMEXIT to handle the request.
8780          */
8781         except = kvm_get_running_vcpu();
8782         kvm_make_all_cpus_request_except(kvm, KVM_REQ_APICV_UPDATE,
8783                                          except);
8784         if (except)
8785                 kvm_vcpu_update_apicv(except);
8786 }
8787 EXPORT_SYMBOL_GPL(kvm_request_apicv_update);
8788
8789 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
8790 {
8791         if (!kvm_apic_present(vcpu))
8792                 return;
8793
8794         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
8795
8796         if (irqchip_split(vcpu->kvm))
8797                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
8798         else {
8799                 if (vcpu->arch.apicv_active)
8800                         static_call(kvm_x86_sync_pir_to_irr)(vcpu);
8801                 if (ioapic_in_kernel(vcpu->kvm))
8802                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
8803         }
8804
8805         if (is_guest_mode(vcpu))
8806                 vcpu->arch.load_eoi_exitmap_pending = true;
8807         else
8808                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
8809 }
8810
8811 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
8812 {
8813         u64 eoi_exit_bitmap[4];
8814
8815         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
8816                 return;
8817
8818         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
8819                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
8820         static_call(kvm_x86_load_eoi_exitmap)(vcpu, eoi_exit_bitmap);
8821 }
8822
8823 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
8824                                             unsigned long start, unsigned long end)
8825 {
8826         unsigned long apic_address;
8827
8828         /*
8829          * The physical address of apic access page is stored in the VMCS.
8830          * Update it when it becomes invalid.
8831          */
8832         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
8833         if (start <= apic_address && apic_address < end)
8834                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
8835 }
8836
8837 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
8838 {
8839         if (!lapic_in_kernel(vcpu))
8840                 return;
8841
8842         if (!kvm_x86_ops.set_apic_access_page_addr)
8843                 return;
8844
8845         static_call(kvm_x86_set_apic_access_page_addr)(vcpu);
8846 }
8847
8848 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
8849 {
8850         smp_send_reschedule(vcpu->cpu);
8851 }
8852 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
8853
8854 /*
8855  * Returns 1 to let vcpu_run() continue the guest execution loop without
8856  * exiting to the userspace.  Otherwise, the value will be returned to the
8857  * userspace.
8858  */
8859 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
8860 {
8861         int r;
8862         bool req_int_win =
8863                 dm_request_for_irq_injection(vcpu) &&
8864                 kvm_cpu_accept_dm_intr(vcpu);
8865         fastpath_t exit_fastpath;
8866
8867         bool req_immediate_exit = false;
8868
8869         /* Forbid vmenter if vcpu dirty ring is soft-full */
8870         if (unlikely(vcpu->kvm->dirty_ring_size &&
8871                      kvm_dirty_ring_soft_full(&vcpu->dirty_ring))) {
8872                 vcpu->run->exit_reason = KVM_EXIT_DIRTY_RING_FULL;
8873                 trace_kvm_dirty_ring_exit(vcpu);
8874                 r = 0;
8875                 goto out;
8876         }
8877
8878         if (kvm_request_pending(vcpu)) {
8879                 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu)) {
8880                         if (unlikely(!kvm_x86_ops.nested_ops->get_nested_state_pages(vcpu))) {
8881                                 r = 0;
8882                                 goto out;
8883                         }
8884                 }
8885                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
8886                         kvm_mmu_unload(vcpu);
8887                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
8888                         __kvm_migrate_timers(vcpu);
8889                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
8890                         kvm_gen_update_masterclock(vcpu->kvm);
8891                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
8892                         kvm_gen_kvmclock_update(vcpu);
8893                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
8894                         r = kvm_guest_time_update(vcpu);
8895                         if (unlikely(r))
8896                                 goto out;
8897                 }
8898                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
8899                         kvm_mmu_sync_roots(vcpu);
8900                 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD, vcpu))
8901                         kvm_mmu_load_pgd(vcpu);
8902                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) {
8903                         kvm_vcpu_flush_tlb_all(vcpu);
8904
8905                         /* Flushing all ASIDs flushes the current ASID... */
8906                         kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
8907                 }
8908                 if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu))
8909                         kvm_vcpu_flush_tlb_current(vcpu);
8910                 if (kvm_check_request(KVM_REQ_HV_TLB_FLUSH, vcpu))
8911                         kvm_vcpu_flush_tlb_guest(vcpu);
8912
8913                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
8914                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
8915                         r = 0;
8916                         goto out;
8917                 }
8918                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
8919                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
8920                         vcpu->mmio_needed = 0;
8921                         r = 0;
8922                         goto out;
8923                 }
8924                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
8925                         /* Page is swapped out. Do synthetic halt */
8926                         vcpu->arch.apf.halted = true;
8927                         r = 1;
8928                         goto out;
8929                 }
8930                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
8931                         record_steal_time(vcpu);
8932                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
8933                         process_smi(vcpu);
8934                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
8935                         process_nmi(vcpu);
8936                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
8937                         kvm_pmu_handle_event(vcpu);
8938                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
8939                         kvm_pmu_deliver_pmi(vcpu);
8940                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
8941                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
8942                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
8943                                      vcpu->arch.ioapic_handled_vectors)) {
8944                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
8945                                 vcpu->run->eoi.vector =
8946                                                 vcpu->arch.pending_ioapic_eoi;
8947                                 r = 0;
8948                                 goto out;
8949                         }
8950                 }
8951                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
8952                         vcpu_scan_ioapic(vcpu);
8953                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
8954                         vcpu_load_eoi_exitmap(vcpu);
8955                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
8956                         kvm_vcpu_reload_apic_access_page(vcpu);
8957                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
8958                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
8959                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
8960                         r = 0;
8961                         goto out;
8962                 }
8963                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
8964                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
8965                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
8966                         r = 0;
8967                         goto out;
8968                 }
8969                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
8970                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
8971                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
8972                         r = 0;
8973                         goto out;
8974                 }
8975
8976                 /*
8977                  * KVM_REQ_HV_STIMER has to be processed after
8978                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
8979                  * depend on the guest clock being up-to-date
8980                  */
8981                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
8982                         kvm_hv_process_stimers(vcpu);
8983                 if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu))
8984                         kvm_vcpu_update_apicv(vcpu);
8985                 if (kvm_check_request(KVM_REQ_APF_READY, vcpu))
8986                         kvm_check_async_pf_completion(vcpu);
8987                 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED, vcpu))
8988                         static_call(kvm_x86_msr_filter_changed)(vcpu);
8989         }
8990
8991         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win ||
8992             kvm_xen_has_interrupt(vcpu)) {
8993                 ++vcpu->stat.req_event;
8994                 kvm_apic_accept_events(vcpu);
8995                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
8996                         r = 1;
8997                         goto out;
8998                 }
8999
9000                 inject_pending_event(vcpu, &req_immediate_exit);
9001                 if (req_int_win)
9002                         static_call(kvm_x86_enable_irq_window)(vcpu);
9003
9004                 if (kvm_lapic_enabled(vcpu)) {
9005                         update_cr8_intercept(vcpu);
9006                         kvm_lapic_sync_to_vapic(vcpu);
9007                 }
9008         }
9009
9010         r = kvm_mmu_reload(vcpu);
9011         if (unlikely(r)) {
9012                 goto cancel_injection;
9013         }
9014
9015         preempt_disable();
9016
9017         static_call(kvm_x86_prepare_guest_switch)(vcpu);
9018
9019         /*
9020          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
9021          * IPI are then delayed after guest entry, which ensures that they
9022          * result in virtual interrupt delivery.
9023          */
9024         local_irq_disable();
9025         vcpu->mode = IN_GUEST_MODE;
9026
9027         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9028
9029         /*
9030          * 1) We should set ->mode before checking ->requests.  Please see
9031          * the comment in kvm_vcpu_exiting_guest_mode().
9032          *
9033          * 2) For APICv, we should set ->mode before checking PID.ON. This
9034          * pairs with the memory barrier implicit in pi_test_and_set_on
9035          * (see vmx_deliver_posted_interrupt).
9036          *
9037          * 3) This also orders the write to mode from any reads to the page
9038          * tables done while the VCPU is running.  Please see the comment
9039          * in kvm_flush_remote_tlbs.
9040          */
9041         smp_mb__after_srcu_read_unlock();
9042
9043         /*
9044          * This handles the case where a posted interrupt was
9045          * notified with kvm_vcpu_kick.
9046          */
9047         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
9048                 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9049
9050         if (kvm_vcpu_exit_request(vcpu)) {
9051                 vcpu->mode = OUTSIDE_GUEST_MODE;
9052                 smp_wmb();
9053                 local_irq_enable();
9054                 preempt_enable();
9055                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9056                 r = 1;
9057                 goto cancel_injection;
9058         }
9059
9060         if (req_immediate_exit) {
9061                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9062                 static_call(kvm_x86_request_immediate_exit)(vcpu);
9063         }
9064
9065         fpregs_assert_state_consistent();
9066         if (test_thread_flag(TIF_NEED_FPU_LOAD))
9067                 switch_fpu_return();
9068
9069         if (unlikely(vcpu->arch.switch_db_regs)) {
9070                 set_debugreg(0, 7);
9071                 set_debugreg(vcpu->arch.eff_db[0], 0);
9072                 set_debugreg(vcpu->arch.eff_db[1], 1);
9073                 set_debugreg(vcpu->arch.eff_db[2], 2);
9074                 set_debugreg(vcpu->arch.eff_db[3], 3);
9075                 set_debugreg(vcpu->arch.dr6, 6);
9076                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
9077         }
9078
9079         for (;;) {
9080                 exit_fastpath = static_call(kvm_x86_run)(vcpu);
9081                 if (likely(exit_fastpath != EXIT_FASTPATH_REENTER_GUEST))
9082                         break;
9083
9084                 if (unlikely(kvm_vcpu_exit_request(vcpu))) {
9085                         exit_fastpath = EXIT_FASTPATH_EXIT_HANDLED;
9086                         break;
9087                 }
9088
9089                 if (vcpu->arch.apicv_active)
9090                         static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9091         }
9092
9093         /*
9094          * Do this here before restoring debug registers on the host.  And
9095          * since we do this before handling the vmexit, a DR access vmexit
9096          * can (a) read the correct value of the debug registers, (b) set
9097          * KVM_DEBUGREG_WONT_EXIT again.
9098          */
9099         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
9100                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
9101                 static_call(kvm_x86_sync_dirty_debug_regs)(vcpu);
9102                 kvm_update_dr0123(vcpu);
9103                 kvm_update_dr7(vcpu);
9104                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
9105         }
9106
9107         /*
9108          * If the guest has used debug registers, at least dr7
9109          * will be disabled while returning to the host.
9110          * If we don't have active breakpoints in the host, we don't
9111          * care about the messed up debug address registers. But if
9112          * we have some of them active, restore the old state.
9113          */
9114         if (hw_breakpoint_active())
9115                 hw_breakpoint_restore();
9116
9117         vcpu->arch.last_vmentry_cpu = vcpu->cpu;
9118         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
9119
9120         vcpu->mode = OUTSIDE_GUEST_MODE;
9121         smp_wmb();
9122
9123         static_call(kvm_x86_handle_exit_irqoff)(vcpu);
9124
9125         /*
9126          * Consume any pending interrupts, including the possible source of
9127          * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
9128          * An instruction is required after local_irq_enable() to fully unblock
9129          * interrupts on processors that implement an interrupt shadow, the
9130          * stat.exits increment will do nicely.
9131          */
9132         kvm_before_interrupt(vcpu);
9133         local_irq_enable();
9134         ++vcpu->stat.exits;
9135         local_irq_disable();
9136         kvm_after_interrupt(vcpu);
9137
9138         if (lapic_in_kernel(vcpu)) {
9139                 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
9140                 if (delta != S64_MIN) {
9141                         trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
9142                         vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
9143                 }
9144         }
9145
9146         local_irq_enable();
9147         preempt_enable();
9148
9149         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9150
9151         /*
9152          * Profile KVM exit RIPs:
9153          */
9154         if (unlikely(prof_on == KVM_PROFILING)) {
9155                 unsigned long rip = kvm_rip_read(vcpu);
9156                 profile_hit(KVM_PROFILING, (void *)rip);
9157         }
9158
9159         if (unlikely(vcpu->arch.tsc_always_catchup))
9160                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
9161
9162         if (vcpu->arch.apic_attention)
9163                 kvm_lapic_sync_from_vapic(vcpu);
9164
9165         r = static_call(kvm_x86_handle_exit)(vcpu, exit_fastpath);
9166         return r;
9167
9168 cancel_injection:
9169         if (req_immediate_exit)
9170                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9171         static_call(kvm_x86_cancel_injection)(vcpu);
9172         if (unlikely(vcpu->arch.apic_attention))
9173                 kvm_lapic_sync_from_vapic(vcpu);
9174 out:
9175         return r;
9176 }
9177
9178 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
9179 {
9180         if (!kvm_arch_vcpu_runnable(vcpu) &&
9181             (!kvm_x86_ops.pre_block || static_call(kvm_x86_pre_block)(vcpu) == 0)) {
9182                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9183                 kvm_vcpu_block(vcpu);
9184                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9185
9186                 if (kvm_x86_ops.post_block)
9187                         static_call(kvm_x86_post_block)(vcpu);
9188
9189                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
9190                         return 1;
9191         }
9192
9193         kvm_apic_accept_events(vcpu);
9194         switch(vcpu->arch.mp_state) {
9195         case KVM_MP_STATE_HALTED:
9196         case KVM_MP_STATE_AP_RESET_HOLD:
9197                 vcpu->arch.pv.pv_unhalted = false;
9198                 vcpu->arch.mp_state =
9199                         KVM_MP_STATE_RUNNABLE;
9200                 fallthrough;
9201         case KVM_MP_STATE_RUNNABLE:
9202                 vcpu->arch.apf.halted = false;
9203                 break;
9204         case KVM_MP_STATE_INIT_RECEIVED:
9205                 break;
9206         default:
9207                 return -EINTR;
9208         }
9209         return 1;
9210 }
9211
9212 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
9213 {
9214         if (is_guest_mode(vcpu))
9215                 kvm_x86_ops.nested_ops->check_events(vcpu);
9216
9217         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
9218                 !vcpu->arch.apf.halted);
9219 }
9220
9221 static int vcpu_run(struct kvm_vcpu *vcpu)
9222 {
9223         int r;
9224         struct kvm *kvm = vcpu->kvm;
9225
9226         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9227         vcpu->arch.l1tf_flush_l1d = true;
9228
9229         for (;;) {
9230                 if (kvm_vcpu_running(vcpu)) {
9231                         r = vcpu_enter_guest(vcpu);
9232                 } else {
9233                         r = vcpu_block(kvm, vcpu);
9234                 }
9235
9236                 if (r <= 0)
9237                         break;
9238
9239                 kvm_clear_request(KVM_REQ_PENDING_TIMER, vcpu);
9240                 if (kvm_cpu_has_pending_timer(vcpu))
9241                         kvm_inject_pending_timer_irqs(vcpu);
9242
9243                 if (dm_request_for_irq_injection(vcpu) &&
9244                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
9245                         r = 0;
9246                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
9247                         ++vcpu->stat.request_irq_exits;
9248                         break;
9249                 }
9250
9251                 if (__xfer_to_guest_mode_work_pending()) {
9252                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9253                         r = xfer_to_guest_mode_handle_work(vcpu);
9254                         if (r)
9255                                 return r;
9256                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9257                 }
9258         }
9259
9260         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9261
9262         return r;
9263 }
9264
9265 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
9266 {
9267         int r;
9268
9269         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9270         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
9271         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9272         return r;
9273 }
9274
9275 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
9276 {
9277         BUG_ON(!vcpu->arch.pio.count);
9278
9279         return complete_emulated_io(vcpu);
9280 }
9281
9282 /*
9283  * Implements the following, as a state machine:
9284  *
9285  * read:
9286  *   for each fragment
9287  *     for each mmio piece in the fragment
9288  *       write gpa, len
9289  *       exit
9290  *       copy data
9291  *   execute insn
9292  *
9293  * write:
9294  *   for each fragment
9295  *     for each mmio piece in the fragment
9296  *       write gpa, len
9297  *       copy data
9298  *       exit
9299  */
9300 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
9301 {
9302         struct kvm_run *run = vcpu->run;
9303         struct kvm_mmio_fragment *frag;
9304         unsigned len;
9305
9306         BUG_ON(!vcpu->mmio_needed);
9307
9308         /* Complete previous fragment */
9309         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
9310         len = min(8u, frag->len);
9311         if (!vcpu->mmio_is_write)
9312                 memcpy(frag->data, run->mmio.data, len);
9313
9314         if (frag->len <= 8) {
9315                 /* Switch to the next fragment. */
9316                 frag++;
9317                 vcpu->mmio_cur_fragment++;
9318         } else {
9319                 /* Go forward to the next mmio piece. */
9320                 frag->data += len;
9321                 frag->gpa += len;
9322                 frag->len -= len;
9323         }
9324
9325         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
9326                 vcpu->mmio_needed = 0;
9327
9328                 /* FIXME: return into emulator if single-stepping.  */
9329                 if (vcpu->mmio_is_write)
9330                         return 1;
9331                 vcpu->mmio_read_completed = 1;
9332                 return complete_emulated_io(vcpu);
9333         }
9334
9335         run->exit_reason = KVM_EXIT_MMIO;
9336         run->mmio.phys_addr = frag->gpa;
9337         if (vcpu->mmio_is_write)
9338                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
9339         run->mmio.len = min(8u, frag->len);
9340         run->mmio.is_write = vcpu->mmio_is_write;
9341         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
9342         return 0;
9343 }
9344
9345 static void kvm_save_current_fpu(struct fpu *fpu)
9346 {
9347         /*
9348          * If the target FPU state is not resident in the CPU registers, just
9349          * memcpy() from current, else save CPU state directly to the target.
9350          */
9351         if (test_thread_flag(TIF_NEED_FPU_LOAD))
9352                 memcpy(&fpu->state, &current->thread.fpu.state,
9353                        fpu_kernel_xstate_size);
9354         else
9355                 copy_fpregs_to_fpstate(fpu);
9356 }
9357
9358 /* Swap (qemu) user FPU context for the guest FPU context. */
9359 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
9360 {
9361         fpregs_lock();
9362
9363         kvm_save_current_fpu(vcpu->arch.user_fpu);
9364
9365         /*
9366          * Guests with protected state can't have it set by the hypervisor,
9367          * so skip trying to set it.
9368          */
9369         if (vcpu->arch.guest_fpu)
9370                 /* PKRU is separately restored in kvm_x86_ops.run. */
9371                 __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu->state,
9372                                         ~XFEATURE_MASK_PKRU);
9373
9374         fpregs_mark_activate();
9375         fpregs_unlock();
9376
9377         trace_kvm_fpu(1);
9378 }
9379
9380 /* When vcpu_run ends, restore user space FPU context. */
9381 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
9382 {
9383         fpregs_lock();
9384
9385         /*
9386          * Guests with protected state can't have it read by the hypervisor,
9387          * so skip trying to save it.
9388          */
9389         if (vcpu->arch.guest_fpu)
9390                 kvm_save_current_fpu(vcpu->arch.guest_fpu);
9391
9392         copy_kernel_to_fpregs(&vcpu->arch.user_fpu->state);
9393
9394         fpregs_mark_activate();
9395         fpregs_unlock();
9396
9397         ++vcpu->stat.fpu_reload;
9398         trace_kvm_fpu(0);
9399 }
9400
9401 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
9402 {
9403         struct kvm_run *kvm_run = vcpu->run;
9404         int r;
9405
9406         vcpu_load(vcpu);
9407         kvm_sigset_activate(vcpu);
9408         kvm_run->flags = 0;
9409         kvm_load_guest_fpu(vcpu);
9410
9411         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
9412                 if (kvm_run->immediate_exit) {
9413                         r = -EINTR;
9414                         goto out;
9415                 }
9416                 kvm_vcpu_block(vcpu);
9417                 kvm_apic_accept_events(vcpu);
9418                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
9419                 r = -EAGAIN;
9420                 if (signal_pending(current)) {
9421                         r = -EINTR;
9422                         kvm_run->exit_reason = KVM_EXIT_INTR;
9423                         ++vcpu->stat.signal_exits;
9424                 }
9425                 goto out;
9426         }
9427
9428         if (kvm_run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) {
9429                 r = -EINVAL;
9430                 goto out;
9431         }
9432
9433         if (kvm_run->kvm_dirty_regs) {
9434                 r = sync_regs(vcpu);
9435                 if (r != 0)
9436                         goto out;
9437         }
9438
9439         /* re-sync apic's tpr */
9440         if (!lapic_in_kernel(vcpu)) {
9441                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
9442                         r = -EINVAL;
9443                         goto out;
9444                 }
9445         }
9446
9447         if (unlikely(vcpu->arch.complete_userspace_io)) {
9448                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
9449                 vcpu->arch.complete_userspace_io = NULL;
9450                 r = cui(vcpu);
9451                 if (r <= 0)
9452                         goto out;
9453         } else
9454                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
9455
9456         if (kvm_run->immediate_exit)
9457                 r = -EINTR;
9458         else
9459                 r = vcpu_run(vcpu);
9460
9461 out:
9462         kvm_put_guest_fpu(vcpu);
9463         if (kvm_run->kvm_valid_regs)
9464                 store_regs(vcpu);
9465         post_kvm_run_save(vcpu);
9466         kvm_sigset_deactivate(vcpu);
9467
9468         vcpu_put(vcpu);
9469         return r;
9470 }
9471
9472 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9473 {
9474         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
9475                 /*
9476                  * We are here if userspace calls get_regs() in the middle of
9477                  * instruction emulation. Registers state needs to be copied
9478                  * back from emulation context to vcpu. Userspace shouldn't do
9479                  * that usually, but some bad designed PV devices (vmware
9480                  * backdoor interface) need this to work
9481                  */
9482                 emulator_writeback_register_cache(vcpu->arch.emulate_ctxt);
9483                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
9484         }
9485         regs->rax = kvm_rax_read(vcpu);
9486         regs->rbx = kvm_rbx_read(vcpu);
9487         regs->rcx = kvm_rcx_read(vcpu);
9488         regs->rdx = kvm_rdx_read(vcpu);
9489         regs->rsi = kvm_rsi_read(vcpu);
9490         regs->rdi = kvm_rdi_read(vcpu);
9491         regs->rsp = kvm_rsp_read(vcpu);
9492         regs->rbp = kvm_rbp_read(vcpu);
9493 #ifdef CONFIG_X86_64
9494         regs->r8 = kvm_r8_read(vcpu);
9495         regs->r9 = kvm_r9_read(vcpu);
9496         regs->r10 = kvm_r10_read(vcpu);
9497         regs->r11 = kvm_r11_read(vcpu);
9498         regs->r12 = kvm_r12_read(vcpu);
9499         regs->r13 = kvm_r13_read(vcpu);
9500         regs->r14 = kvm_r14_read(vcpu);
9501         regs->r15 = kvm_r15_read(vcpu);
9502 #endif
9503
9504         regs->rip = kvm_rip_read(vcpu);
9505         regs->rflags = kvm_get_rflags(vcpu);
9506 }
9507
9508 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9509 {
9510         vcpu_load(vcpu);
9511         __get_regs(vcpu, regs);
9512         vcpu_put(vcpu);
9513         return 0;
9514 }
9515
9516 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9517 {
9518         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
9519         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
9520
9521         kvm_rax_write(vcpu, regs->rax);
9522         kvm_rbx_write(vcpu, regs->rbx);
9523         kvm_rcx_write(vcpu, regs->rcx);
9524         kvm_rdx_write(vcpu, regs->rdx);
9525         kvm_rsi_write(vcpu, regs->rsi);
9526         kvm_rdi_write(vcpu, regs->rdi);
9527         kvm_rsp_write(vcpu, regs->rsp);
9528         kvm_rbp_write(vcpu, regs->rbp);
9529 #ifdef CONFIG_X86_64
9530         kvm_r8_write(vcpu, regs->r8);
9531         kvm_r9_write(vcpu, regs->r9);
9532         kvm_r10_write(vcpu, regs->r10);
9533         kvm_r11_write(vcpu, regs->r11);
9534         kvm_r12_write(vcpu, regs->r12);
9535         kvm_r13_write(vcpu, regs->r13);
9536         kvm_r14_write(vcpu, regs->r14);
9537         kvm_r15_write(vcpu, regs->r15);
9538 #endif
9539
9540         kvm_rip_write(vcpu, regs->rip);
9541         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
9542
9543         vcpu->arch.exception.pending = false;
9544
9545         kvm_make_request(KVM_REQ_EVENT, vcpu);
9546 }
9547
9548 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9549 {
9550         vcpu_load(vcpu);
9551         __set_regs(vcpu, regs);
9552         vcpu_put(vcpu);
9553         return 0;
9554 }
9555
9556 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
9557 {
9558         struct kvm_segment cs;
9559
9560         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
9561         *db = cs.db;
9562         *l = cs.l;
9563 }
9564 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
9565
9566 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9567 {
9568         struct desc_ptr dt;
9569
9570         if (vcpu->arch.guest_state_protected)
9571                 goto skip_protected_regs;
9572
9573         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
9574         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
9575         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
9576         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
9577         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
9578         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
9579
9580         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
9581         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
9582
9583         static_call(kvm_x86_get_idt)(vcpu, &dt);
9584         sregs->idt.limit = dt.size;
9585         sregs->idt.base = dt.address;
9586         static_call(kvm_x86_get_gdt)(vcpu, &dt);
9587         sregs->gdt.limit = dt.size;
9588         sregs->gdt.base = dt.address;
9589
9590         sregs->cr2 = vcpu->arch.cr2;
9591         sregs->cr3 = kvm_read_cr3(vcpu);
9592
9593 skip_protected_regs:
9594         sregs->cr0 = kvm_read_cr0(vcpu);
9595         sregs->cr4 = kvm_read_cr4(vcpu);
9596         sregs->cr8 = kvm_get_cr8(vcpu);
9597         sregs->efer = vcpu->arch.efer;
9598         sregs->apic_base = kvm_get_apic_base(vcpu);
9599
9600         memset(sregs->interrupt_bitmap, 0, sizeof(sregs->interrupt_bitmap));
9601
9602         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
9603                 set_bit(vcpu->arch.interrupt.nr,
9604                         (unsigned long *)sregs->interrupt_bitmap);
9605 }
9606
9607 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
9608                                   struct kvm_sregs *sregs)
9609 {
9610         vcpu_load(vcpu);
9611         __get_sregs(vcpu, sregs);
9612         vcpu_put(vcpu);
9613         return 0;
9614 }
9615
9616 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
9617                                     struct kvm_mp_state *mp_state)
9618 {
9619         vcpu_load(vcpu);
9620         if (kvm_mpx_supported())
9621                 kvm_load_guest_fpu(vcpu);
9622
9623         kvm_apic_accept_events(vcpu);
9624         if ((vcpu->arch.mp_state == KVM_MP_STATE_HALTED ||
9625              vcpu->arch.mp_state == KVM_MP_STATE_AP_RESET_HOLD) &&
9626             vcpu->arch.pv.pv_unhalted)
9627                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
9628         else
9629                 mp_state->mp_state = vcpu->arch.mp_state;
9630
9631         if (kvm_mpx_supported())
9632                 kvm_put_guest_fpu(vcpu);
9633         vcpu_put(vcpu);
9634         return 0;
9635 }
9636
9637 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
9638                                     struct kvm_mp_state *mp_state)
9639 {
9640         int ret = -EINVAL;
9641
9642         vcpu_load(vcpu);
9643
9644         if (!lapic_in_kernel(vcpu) &&
9645             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
9646                 goto out;
9647
9648         /*
9649          * KVM_MP_STATE_INIT_RECEIVED means the processor is in
9650          * INIT state; latched init should be reported using
9651          * KVM_SET_VCPU_EVENTS, so reject it here.
9652          */
9653         if ((kvm_vcpu_latch_init(vcpu) || vcpu->arch.smi_pending) &&
9654             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
9655              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
9656                 goto out;
9657
9658         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
9659                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
9660                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
9661         } else
9662                 vcpu->arch.mp_state = mp_state->mp_state;
9663         kvm_make_request(KVM_REQ_EVENT, vcpu);
9664
9665         ret = 0;
9666 out:
9667         vcpu_put(vcpu);
9668         return ret;
9669 }
9670
9671 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
9672                     int reason, bool has_error_code, u32 error_code)
9673 {
9674         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
9675         int ret;
9676
9677         init_emulate_ctxt(vcpu);
9678
9679         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
9680                                    has_error_code, error_code);
9681         if (ret) {
9682                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
9683                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
9684                 vcpu->run->internal.ndata = 0;
9685                 return 0;
9686         }
9687
9688         kvm_rip_write(vcpu, ctxt->eip);
9689         kvm_set_rflags(vcpu, ctxt->eflags);
9690         return 1;
9691 }
9692 EXPORT_SYMBOL_GPL(kvm_task_switch);
9693
9694 static bool kvm_is_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9695 {
9696         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
9697                 /*
9698                  * When EFER.LME and CR0.PG are set, the processor is in
9699                  * 64-bit mode (though maybe in a 32-bit code segment).
9700                  * CR4.PAE and EFER.LMA must be set.
9701                  */
9702                 if (!(sregs->cr4 & X86_CR4_PAE) || !(sregs->efer & EFER_LMA))
9703                         return false;
9704                 if (sregs->cr3 & vcpu->arch.cr3_lm_rsvd_bits)
9705                         return false;
9706         } else {
9707                 /*
9708                  * Not in 64-bit mode: EFER.LMA is clear and the code
9709                  * segment cannot be 64-bit.
9710                  */
9711                 if (sregs->efer & EFER_LMA || sregs->cs.l)
9712                         return false;
9713         }
9714
9715         return kvm_is_valid_cr4(vcpu, sregs->cr4);
9716 }
9717
9718 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9719 {
9720         struct msr_data apic_base_msr;
9721         int mmu_reset_needed = 0;
9722         int pending_vec, max_bits, idx;
9723         struct desc_ptr dt;
9724         int ret = -EINVAL;
9725
9726         if (!kvm_is_valid_sregs(vcpu, sregs))
9727                 goto out;
9728
9729         apic_base_msr.data = sregs->apic_base;
9730         apic_base_msr.host_initiated = true;
9731         if (kvm_set_apic_base(vcpu, &apic_base_msr))
9732                 goto out;
9733
9734         if (vcpu->arch.guest_state_protected)
9735                 goto skip_protected_regs;
9736
9737         dt.size = sregs->idt.limit;
9738         dt.address = sregs->idt.base;
9739         static_call(kvm_x86_set_idt)(vcpu, &dt);
9740         dt.size = sregs->gdt.limit;
9741         dt.address = sregs->gdt.base;
9742         static_call(kvm_x86_set_gdt)(vcpu, &dt);
9743
9744         vcpu->arch.cr2 = sregs->cr2;
9745         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
9746         vcpu->arch.cr3 = sregs->cr3;
9747         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
9748
9749         kvm_set_cr8(vcpu, sregs->cr8);
9750
9751         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
9752         static_call(kvm_x86_set_efer)(vcpu, sregs->efer);
9753
9754         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
9755         static_call(kvm_x86_set_cr0)(vcpu, sregs->cr0);
9756         vcpu->arch.cr0 = sregs->cr0;
9757
9758         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
9759         static_call(kvm_x86_set_cr4)(vcpu, sregs->cr4);
9760
9761         idx = srcu_read_lock(&vcpu->kvm->srcu);
9762         if (is_pae_paging(vcpu)) {
9763                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
9764                 mmu_reset_needed = 1;
9765         }
9766         srcu_read_unlock(&vcpu->kvm->srcu, idx);
9767
9768         if (mmu_reset_needed)
9769                 kvm_mmu_reset_context(vcpu);
9770
9771         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
9772         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
9773         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
9774         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
9775         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
9776         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
9777
9778         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
9779         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
9780
9781         update_cr8_intercept(vcpu);
9782
9783         /* Older userspace won't unhalt the vcpu on reset. */
9784         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
9785             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
9786             !is_protmode(vcpu))
9787                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9788
9789 skip_protected_regs:
9790         max_bits = KVM_NR_INTERRUPTS;
9791         pending_vec = find_first_bit(
9792                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
9793         if (pending_vec < max_bits) {
9794                 kvm_queue_interrupt(vcpu, pending_vec, false);
9795                 pr_debug("Set back pending irq %d\n", pending_vec);
9796         }
9797
9798         kvm_make_request(KVM_REQ_EVENT, vcpu);
9799
9800         ret = 0;
9801 out:
9802         return ret;
9803 }
9804
9805 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
9806                                   struct kvm_sregs *sregs)
9807 {
9808         int ret;
9809
9810         vcpu_load(vcpu);
9811         ret = __set_sregs(vcpu, sregs);
9812         vcpu_put(vcpu);
9813         return ret;
9814 }
9815
9816 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
9817                                         struct kvm_guest_debug *dbg)
9818 {
9819         unsigned long rflags;
9820         int i, r;
9821
9822         if (vcpu->arch.guest_state_protected)
9823                 return -EINVAL;
9824
9825         vcpu_load(vcpu);
9826
9827         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
9828                 r = -EBUSY;
9829                 if (vcpu->arch.exception.pending)
9830                         goto out;
9831                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
9832                         kvm_queue_exception(vcpu, DB_VECTOR);
9833                 else
9834                         kvm_queue_exception(vcpu, BP_VECTOR);
9835         }
9836
9837         /*
9838          * Read rflags as long as potentially injected trace flags are still
9839          * filtered out.
9840          */
9841         rflags = kvm_get_rflags(vcpu);
9842
9843         vcpu->guest_debug = dbg->control;
9844         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
9845                 vcpu->guest_debug = 0;
9846
9847         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
9848                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
9849                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
9850                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
9851         } else {
9852                 for (i = 0; i < KVM_NR_DB_REGS; i++)
9853                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
9854         }
9855         kvm_update_dr7(vcpu);
9856
9857         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
9858                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
9859                         get_segment_base(vcpu, VCPU_SREG_CS);
9860
9861         /*
9862          * Trigger an rflags update that will inject or remove the trace
9863          * flags.
9864          */
9865         kvm_set_rflags(vcpu, rflags);
9866
9867         static_call(kvm_x86_update_exception_bitmap)(vcpu);
9868
9869         r = 0;
9870
9871 out:
9872         vcpu_put(vcpu);
9873         return r;
9874 }
9875
9876 /*
9877  * Translate a guest virtual address to a guest physical address.
9878  */
9879 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
9880                                     struct kvm_translation *tr)
9881 {
9882         unsigned long vaddr = tr->linear_address;
9883         gpa_t gpa;
9884         int idx;
9885
9886         vcpu_load(vcpu);
9887
9888         idx = srcu_read_lock(&vcpu->kvm->srcu);
9889         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
9890         srcu_read_unlock(&vcpu->kvm->srcu, idx);
9891         tr->physical_address = gpa;
9892         tr->valid = gpa != UNMAPPED_GVA;
9893         tr->writeable = 1;
9894         tr->usermode = 0;
9895
9896         vcpu_put(vcpu);
9897         return 0;
9898 }
9899
9900 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
9901 {
9902         struct fxregs_state *fxsave;
9903
9904         if (!vcpu->arch.guest_fpu)
9905                 return 0;
9906
9907         vcpu_load(vcpu);
9908
9909         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
9910         memcpy(fpu->fpr, fxsave->st_space, 128);
9911         fpu->fcw = fxsave->cwd;
9912         fpu->fsw = fxsave->swd;
9913         fpu->ftwx = fxsave->twd;
9914         fpu->last_opcode = fxsave->fop;
9915         fpu->last_ip = fxsave->rip;
9916         fpu->last_dp = fxsave->rdp;
9917         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
9918
9919         vcpu_put(vcpu);
9920         return 0;
9921 }
9922
9923 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
9924 {
9925         struct fxregs_state *fxsave;
9926
9927         if (!vcpu->arch.guest_fpu)
9928                 return 0;
9929
9930         vcpu_load(vcpu);
9931
9932         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
9933
9934         memcpy(fxsave->st_space, fpu->fpr, 128);
9935         fxsave->cwd = fpu->fcw;
9936         fxsave->swd = fpu->fsw;
9937         fxsave->twd = fpu->ftwx;
9938         fxsave->fop = fpu->last_opcode;
9939         fxsave->rip = fpu->last_ip;
9940         fxsave->rdp = fpu->last_dp;
9941         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
9942
9943         vcpu_put(vcpu);
9944         return 0;
9945 }
9946
9947 static void store_regs(struct kvm_vcpu *vcpu)
9948 {
9949         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
9950
9951         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
9952                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
9953
9954         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
9955                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
9956
9957         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
9958                 kvm_vcpu_ioctl_x86_get_vcpu_events(
9959                                 vcpu, &vcpu->run->s.regs.events);
9960 }
9961
9962 static int sync_regs(struct kvm_vcpu *vcpu)
9963 {
9964         if (vcpu->run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)
9965                 return -EINVAL;
9966
9967         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
9968                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
9969                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
9970         }
9971         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
9972                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
9973                         return -EINVAL;
9974                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
9975         }
9976         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
9977                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
9978                                 vcpu, &vcpu->run->s.regs.events))
9979                         return -EINVAL;
9980                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
9981         }
9982
9983         return 0;
9984 }
9985
9986 static void fx_init(struct kvm_vcpu *vcpu)
9987 {
9988         if (!vcpu->arch.guest_fpu)
9989                 return;
9990
9991         fpstate_init(&vcpu->arch.guest_fpu->state);
9992         if (boot_cpu_has(X86_FEATURE_XSAVES))
9993                 vcpu->arch.guest_fpu->state.xsave.header.xcomp_bv =
9994                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
9995
9996         /*
9997          * Ensure guest xcr0 is valid for loading
9998          */
9999         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10000
10001         vcpu->arch.cr0 |= X86_CR0_ET;
10002 }
10003
10004 void kvm_free_guest_fpu(struct kvm_vcpu *vcpu)
10005 {
10006         if (vcpu->arch.guest_fpu) {
10007                 kmem_cache_free(x86_fpu_cache, vcpu->arch.guest_fpu);
10008                 vcpu->arch.guest_fpu = NULL;
10009         }
10010 }
10011 EXPORT_SYMBOL_GPL(kvm_free_guest_fpu);
10012
10013 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
10014 {
10015         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
10016                 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
10017                              "guest TSC will not be reliable\n");
10018
10019         return 0;
10020 }
10021
10022 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
10023 {
10024         struct page *page;
10025         int r;
10026
10027         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
10028                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10029         else
10030                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
10031
10032         kvm_set_tsc_khz(vcpu, max_tsc_khz);
10033
10034         r = kvm_mmu_create(vcpu);
10035         if (r < 0)
10036                 return r;
10037
10038         if (irqchip_in_kernel(vcpu->kvm)) {
10039                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
10040                 if (r < 0)
10041                         goto fail_mmu_destroy;
10042                 if (kvm_apicv_activated(vcpu->kvm))
10043                         vcpu->arch.apicv_active = true;
10044         } else
10045                 static_branch_inc(&kvm_has_noapic_vcpu);
10046
10047         r = -ENOMEM;
10048
10049         page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO);
10050         if (!page)
10051                 goto fail_free_lapic;
10052         vcpu->arch.pio_data = page_address(page);
10053
10054         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
10055                                        GFP_KERNEL_ACCOUNT);
10056         if (!vcpu->arch.mce_banks)
10057                 goto fail_free_pio_data;
10058         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
10059
10060         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
10061                                 GFP_KERNEL_ACCOUNT))
10062                 goto fail_free_mce_banks;
10063
10064         if (!alloc_emulate_ctxt(vcpu))
10065                 goto free_wbinvd_dirty_mask;
10066
10067         vcpu->arch.user_fpu = kmem_cache_zalloc(x86_fpu_cache,
10068                                                 GFP_KERNEL_ACCOUNT);
10069         if (!vcpu->arch.user_fpu) {
10070                 pr_err("kvm: failed to allocate userspace's fpu\n");
10071                 goto free_emulate_ctxt;
10072         }
10073
10074         vcpu->arch.guest_fpu = kmem_cache_zalloc(x86_fpu_cache,
10075                                                  GFP_KERNEL_ACCOUNT);
10076         if (!vcpu->arch.guest_fpu) {
10077                 pr_err("kvm: failed to allocate vcpu's fpu\n");
10078                 goto free_user_fpu;
10079         }
10080         fx_init(vcpu);
10081
10082         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
10083
10084         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
10085
10086         kvm_async_pf_hash_reset(vcpu);
10087         kvm_pmu_init(vcpu);
10088
10089         vcpu->arch.pending_external_vector = -1;
10090         vcpu->arch.preempted_in_kernel = false;
10091
10092         kvm_hv_vcpu_init(vcpu);
10093
10094         r = static_call(kvm_x86_vcpu_create)(vcpu);
10095         if (r)
10096                 goto free_guest_fpu;
10097
10098         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
10099         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
10100         kvm_vcpu_mtrr_init(vcpu);
10101         vcpu_load(vcpu);
10102         kvm_vcpu_reset(vcpu, false);
10103         kvm_init_mmu(vcpu, false);
10104         vcpu_put(vcpu);
10105         return 0;
10106
10107 free_guest_fpu:
10108         kvm_free_guest_fpu(vcpu);
10109 free_user_fpu:
10110         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
10111 free_emulate_ctxt:
10112         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
10113 free_wbinvd_dirty_mask:
10114         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
10115 fail_free_mce_banks:
10116         kfree(vcpu->arch.mce_banks);
10117 fail_free_pio_data:
10118         free_page((unsigned long)vcpu->arch.pio_data);
10119 fail_free_lapic:
10120         kvm_free_lapic(vcpu);
10121 fail_mmu_destroy:
10122         kvm_mmu_destroy(vcpu);
10123         return r;
10124 }
10125
10126 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
10127 {
10128         struct kvm *kvm = vcpu->kvm;
10129
10130         kvm_hv_vcpu_postcreate(vcpu);
10131
10132         if (mutex_lock_killable(&vcpu->mutex))
10133                 return;
10134         vcpu_load(vcpu);
10135         kvm_synchronize_tsc(vcpu, 0);
10136         vcpu_put(vcpu);
10137
10138         /* poll control enabled by default */
10139         vcpu->arch.msr_kvm_poll_control = 1;
10140
10141         mutex_unlock(&vcpu->mutex);
10142
10143         if (kvmclock_periodic_sync && vcpu->vcpu_idx == 0)
10144                 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
10145                                                 KVMCLOCK_SYNC_PERIOD);
10146 }
10147
10148 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
10149 {
10150         struct gfn_to_pfn_cache *cache = &vcpu->arch.st.cache;
10151         int idx;
10152
10153         kvm_release_pfn(cache->pfn, cache->dirty, cache);
10154
10155         kvmclock_reset(vcpu);
10156
10157         static_call(kvm_x86_vcpu_free)(vcpu);
10158
10159         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
10160         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
10161         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
10162         kvm_free_guest_fpu(vcpu);
10163
10164         kvm_hv_vcpu_uninit(vcpu);
10165         kvm_pmu_destroy(vcpu);
10166         kfree(vcpu->arch.mce_banks);
10167         kvm_free_lapic(vcpu);
10168         idx = srcu_read_lock(&vcpu->kvm->srcu);
10169         kvm_mmu_destroy(vcpu);
10170         srcu_read_unlock(&vcpu->kvm->srcu, idx);
10171         free_page((unsigned long)vcpu->arch.pio_data);
10172         kvfree(vcpu->arch.cpuid_entries);
10173         if (!lapic_in_kernel(vcpu))
10174                 static_branch_dec(&kvm_has_noapic_vcpu);
10175 }
10176
10177 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
10178 {
10179         kvm_lapic_reset(vcpu, init_event);
10180
10181         vcpu->arch.hflags = 0;
10182
10183         vcpu->arch.smi_pending = 0;
10184         vcpu->arch.smi_count = 0;
10185         atomic_set(&vcpu->arch.nmi_queued, 0);
10186         vcpu->arch.nmi_pending = 0;
10187         vcpu->arch.nmi_injected = false;
10188         kvm_clear_interrupt_queue(vcpu);
10189         kvm_clear_exception_queue(vcpu);
10190
10191         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
10192         kvm_update_dr0123(vcpu);
10193         vcpu->arch.dr6 = DR6_ACTIVE_LOW;
10194         vcpu->arch.dr7 = DR7_FIXED_1;
10195         kvm_update_dr7(vcpu);
10196
10197         vcpu->arch.cr2 = 0;
10198
10199         kvm_make_request(KVM_REQ_EVENT, vcpu);
10200         vcpu->arch.apf.msr_en_val = 0;
10201         vcpu->arch.apf.msr_int_val = 0;
10202         vcpu->arch.st.msr_val = 0;
10203
10204         kvmclock_reset(vcpu);
10205
10206         kvm_clear_async_pf_completion_queue(vcpu);
10207         kvm_async_pf_hash_reset(vcpu);
10208         vcpu->arch.apf.halted = false;
10209
10210         if (vcpu->arch.guest_fpu && kvm_mpx_supported()) {
10211                 void *mpx_state_buffer;
10212
10213                 /*
10214                  * To avoid have the INIT path from kvm_apic_has_events() that be
10215                  * called with loaded FPU and does not let userspace fix the state.
10216                  */
10217                 if (init_event)
10218                         kvm_put_guest_fpu(vcpu);
10219                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10220                                         XFEATURE_BNDREGS);
10221                 if (mpx_state_buffer)
10222                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
10223                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10224                                         XFEATURE_BNDCSR);
10225                 if (mpx_state_buffer)
10226                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
10227                 if (init_event)
10228                         kvm_load_guest_fpu(vcpu);
10229         }
10230
10231         if (!init_event) {
10232                 kvm_pmu_reset(vcpu);
10233                 vcpu->arch.smbase = 0x30000;
10234
10235                 vcpu->arch.msr_misc_features_enables = 0;
10236
10237                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10238         }
10239
10240         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
10241         vcpu->arch.regs_avail = ~0;
10242         vcpu->arch.regs_dirty = ~0;
10243
10244         vcpu->arch.ia32_xss = 0;
10245
10246         static_call(kvm_x86_vcpu_reset)(vcpu, init_event);
10247 }
10248
10249 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
10250 {
10251         struct kvm_segment cs;
10252
10253         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
10254         cs.selector = vector << 8;
10255         cs.base = vector << 12;
10256         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
10257         kvm_rip_write(vcpu, 0);
10258 }
10259 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector);
10260
10261 int kvm_arch_hardware_enable(void)
10262 {
10263         struct kvm *kvm;
10264         struct kvm_vcpu *vcpu;
10265         int i;
10266         int ret;
10267         u64 local_tsc;
10268         u64 max_tsc = 0;
10269         bool stable, backwards_tsc = false;
10270
10271         kvm_user_return_msr_cpu_online();
10272         ret = static_call(kvm_x86_hardware_enable)();
10273         if (ret != 0)
10274                 return ret;
10275
10276         local_tsc = rdtsc();
10277         stable = !kvm_check_tsc_unstable();
10278         list_for_each_entry(kvm, &vm_list, vm_list) {
10279                 kvm_for_each_vcpu(i, vcpu, kvm) {
10280                         if (!stable && vcpu->cpu == smp_processor_id())
10281                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
10282                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
10283                                 backwards_tsc = true;
10284                                 if (vcpu->arch.last_host_tsc > max_tsc)
10285                                         max_tsc = vcpu->arch.last_host_tsc;
10286                         }
10287                 }
10288         }
10289
10290         /*
10291          * Sometimes, even reliable TSCs go backwards.  This happens on
10292          * platforms that reset TSC during suspend or hibernate actions, but
10293          * maintain synchronization.  We must compensate.  Fortunately, we can
10294          * detect that condition here, which happens early in CPU bringup,
10295          * before any KVM threads can be running.  Unfortunately, we can't
10296          * bring the TSCs fully up to date with real time, as we aren't yet far
10297          * enough into CPU bringup that we know how much real time has actually
10298          * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
10299          * variables that haven't been updated yet.
10300          *
10301          * So we simply find the maximum observed TSC above, then record the
10302          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
10303          * the adjustment will be applied.  Note that we accumulate
10304          * adjustments, in case multiple suspend cycles happen before some VCPU
10305          * gets a chance to run again.  In the event that no KVM threads get a
10306          * chance to run, we will miss the entire elapsed period, as we'll have
10307          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
10308          * loose cycle time.  This isn't too big a deal, since the loss will be
10309          * uniform across all VCPUs (not to mention the scenario is extremely
10310          * unlikely). It is possible that a second hibernate recovery happens
10311          * much faster than a first, causing the observed TSC here to be
10312          * smaller; this would require additional padding adjustment, which is
10313          * why we set last_host_tsc to the local tsc observed here.
10314          *
10315          * N.B. - this code below runs only on platforms with reliable TSC,
10316          * as that is the only way backwards_tsc is set above.  Also note
10317          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
10318          * have the same delta_cyc adjustment applied if backwards_tsc
10319          * is detected.  Note further, this adjustment is only done once,
10320          * as we reset last_host_tsc on all VCPUs to stop this from being
10321          * called multiple times (one for each physical CPU bringup).
10322          *
10323          * Platforms with unreliable TSCs don't have to deal with this, they
10324          * will be compensated by the logic in vcpu_load, which sets the TSC to
10325          * catchup mode.  This will catchup all VCPUs to real time, but cannot
10326          * guarantee that they stay in perfect synchronization.
10327          */
10328         if (backwards_tsc) {
10329                 u64 delta_cyc = max_tsc - local_tsc;
10330                 list_for_each_entry(kvm, &vm_list, vm_list) {
10331                         kvm->arch.backwards_tsc_observed = true;
10332                         kvm_for_each_vcpu(i, vcpu, kvm) {
10333                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
10334                                 vcpu->arch.last_host_tsc = local_tsc;
10335                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
10336                         }
10337
10338                         /*
10339                          * We have to disable TSC offset matching.. if you were
10340                          * booting a VM while issuing an S4 host suspend....
10341                          * you may have some problem.  Solving this issue is
10342                          * left as an exercise to the reader.
10343                          */
10344                         kvm->arch.last_tsc_nsec = 0;
10345                         kvm->arch.last_tsc_write = 0;
10346                 }
10347
10348         }
10349         return 0;
10350 }
10351
10352 void kvm_arch_hardware_disable(void)
10353 {
10354         static_call(kvm_x86_hardware_disable)();
10355         drop_user_return_notifiers();
10356 }
10357
10358 int kvm_arch_hardware_setup(void *opaque)
10359 {
10360         struct kvm_x86_init_ops *ops = opaque;
10361         int r;
10362
10363         rdmsrl_safe(MSR_EFER, &host_efer);
10364
10365         if (boot_cpu_has(X86_FEATURE_XSAVES))
10366                 rdmsrl(MSR_IA32_XSS, host_xss);
10367
10368         r = ops->hardware_setup();
10369         if (r != 0)
10370                 return r;
10371
10372         memcpy(&kvm_x86_ops, ops->runtime_ops, sizeof(kvm_x86_ops));
10373         kvm_ops_static_call_update();
10374
10375         if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))
10376                 supported_xss = 0;
10377
10378 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
10379         cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
10380 #undef __kvm_cpu_cap_has
10381
10382         if (kvm_has_tsc_control) {
10383                 /*
10384                  * Make sure the user can only configure tsc_khz values that
10385                  * fit into a signed integer.
10386                  * A min value is not calculated because it will always
10387                  * be 1 on all machines.
10388                  */
10389                 u64 max = min(0x7fffffffULL,
10390                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
10391                 kvm_max_guest_tsc_khz = max;
10392
10393                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
10394         }
10395
10396         kvm_init_msr_list();
10397         return 0;
10398 }
10399
10400 void kvm_arch_hardware_unsetup(void)
10401 {
10402         static_call(kvm_x86_hardware_unsetup)();
10403 }
10404
10405 int kvm_arch_check_processor_compat(void *opaque)
10406 {
10407         struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
10408         struct kvm_x86_init_ops *ops = opaque;
10409
10410         WARN_ON(!irqs_disabled());
10411
10412         if (__cr4_reserved_bits(cpu_has, c) !=
10413             __cr4_reserved_bits(cpu_has, &boot_cpu_data))
10414                 return -EIO;
10415
10416         return ops->check_processor_compatibility();
10417 }
10418
10419 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
10420 {
10421         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
10422 }
10423 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
10424
10425 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
10426 {
10427         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
10428 }
10429
10430 __read_mostly DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu);
10431 EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu);
10432
10433 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
10434 {
10435         struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
10436
10437         vcpu->arch.l1tf_flush_l1d = true;
10438         if (pmu->version && unlikely(pmu->event_count)) {
10439                 pmu->need_cleanup = true;
10440                 kvm_make_request(KVM_REQ_PMU, vcpu);
10441         }
10442         static_call(kvm_x86_sched_in)(vcpu, cpu);
10443 }
10444
10445 void kvm_arch_free_vm(struct kvm *kvm)
10446 {
10447         kfree(kvm->arch.hyperv.hv_pa_pg);
10448         vfree(kvm);
10449 }
10450
10451
10452 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
10453 {
10454         if (type)
10455                 return -EINVAL;
10456
10457         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
10458         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
10459         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
10460         INIT_LIST_HEAD(&kvm->arch.lpage_disallowed_mmu_pages);
10461         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
10462         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
10463
10464         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
10465         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
10466         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
10467         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
10468                 &kvm->arch.irq_sources_bitmap);
10469
10470         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
10471         mutex_init(&kvm->arch.apic_map_lock);
10472         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
10473
10474         kvm->arch.kvmclock_offset = -get_kvmclock_base_ns();
10475         pvclock_update_vm_gtod_copy(kvm);
10476
10477         kvm->arch.guest_can_read_msr_platform_info = true;
10478
10479         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
10480         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
10481
10482         kvm_hv_init_vm(kvm);
10483         kvm_page_track_init(kvm);
10484         kvm_mmu_init_vm(kvm);
10485
10486         return static_call(kvm_x86_vm_init)(kvm);
10487 }
10488
10489 int kvm_arch_post_init_vm(struct kvm *kvm)
10490 {
10491         return kvm_mmu_post_init_vm(kvm);
10492 }
10493
10494 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
10495 {
10496         vcpu_load(vcpu);
10497         kvm_mmu_unload(vcpu);
10498         vcpu_put(vcpu);
10499 }
10500
10501 static void kvm_free_vcpus(struct kvm *kvm)
10502 {
10503         unsigned int i;
10504         struct kvm_vcpu *vcpu;
10505
10506         /*
10507          * Unpin any mmu pages first.
10508          */
10509         kvm_for_each_vcpu(i, vcpu, kvm) {
10510                 kvm_clear_async_pf_completion_queue(vcpu);
10511                 kvm_unload_vcpu_mmu(vcpu);
10512         }
10513         kvm_for_each_vcpu(i, vcpu, kvm)
10514                 kvm_vcpu_destroy(vcpu);
10515
10516         mutex_lock(&kvm->lock);
10517         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
10518                 kvm->vcpus[i] = NULL;
10519
10520         atomic_set(&kvm->online_vcpus, 0);
10521         mutex_unlock(&kvm->lock);
10522 }
10523
10524 void kvm_arch_sync_events(struct kvm *kvm)
10525 {
10526         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
10527         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
10528         kvm_free_pit(kvm);
10529 }
10530
10531 #define  ERR_PTR_USR(e)  ((void __user *)ERR_PTR(e))
10532
10533 /**
10534  * __x86_set_memory_region: Setup KVM internal memory slot
10535  *
10536  * @kvm: the kvm pointer to the VM.
10537  * @id: the slot ID to setup.
10538  * @gpa: the GPA to install the slot (unused when @size == 0).
10539  * @size: the size of the slot. Set to zero to uninstall a slot.
10540  *
10541  * This function helps to setup a KVM internal memory slot.  Specify
10542  * @size > 0 to install a new slot, while @size == 0 to uninstall a
10543  * slot.  The return code can be one of the following:
10544  *
10545  *   HVA:           on success (uninstall will return a bogus HVA)
10546  *   -errno:        on error
10547  *
10548  * The caller should always use IS_ERR() to check the return value
10549  * before use.  Note, the KVM internal memory slots are guaranteed to
10550  * remain valid and unchanged until the VM is destroyed, i.e., the
10551  * GPA->HVA translation will not change.  However, the HVA is a user
10552  * address, i.e. its accessibility is not guaranteed, and must be
10553  * accessed via __copy_{to,from}_user().
10554  */
10555 void __user * __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa,
10556                                       u32 size)
10557 {
10558         int i, r;
10559         unsigned long hva, old_npages;
10560         struct kvm_memslots *slots = kvm_memslots(kvm);
10561         struct kvm_memory_slot *slot;
10562
10563         /* Called with kvm->slots_lock held.  */
10564         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
10565                 return ERR_PTR_USR(-EINVAL);
10566
10567         slot = id_to_memslot(slots, id);
10568         if (size) {
10569                 if (slot && slot->npages)
10570                         return ERR_PTR_USR(-EEXIST);
10571
10572                 /*
10573                  * MAP_SHARED to prevent internal slot pages from being moved
10574                  * by fork()/COW.
10575                  */
10576                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
10577                               MAP_SHARED | MAP_ANONYMOUS, 0);
10578                 if (IS_ERR((void *)hva))
10579                         return (void __user *)hva;
10580         } else {
10581                 if (!slot || !slot->npages)
10582                         return 0;
10583
10584                 old_npages = slot->npages;
10585                 hva = slot->userspace_addr;
10586         }
10587
10588         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
10589                 struct kvm_userspace_memory_region m;
10590
10591                 m.slot = id | (i << 16);
10592                 m.flags = 0;
10593                 m.guest_phys_addr = gpa;
10594                 m.userspace_addr = hva;
10595                 m.memory_size = size;
10596                 r = __kvm_set_memory_region(kvm, &m);
10597                 if (r < 0)
10598                         return ERR_PTR_USR(r);
10599         }
10600
10601         if (!size)
10602                 vm_munmap(hva, old_npages * PAGE_SIZE);
10603
10604         return (void __user *)hva;
10605 }
10606 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
10607
10608 void kvm_arch_pre_destroy_vm(struct kvm *kvm)
10609 {
10610         kvm_mmu_pre_destroy_vm(kvm);
10611 }
10612
10613 void kvm_arch_destroy_vm(struct kvm *kvm)
10614 {
10615         u32 i;
10616
10617         if (current->mm == kvm->mm) {
10618                 /*
10619                  * Free memory regions allocated on behalf of userspace,
10620                  * unless the the memory map has changed due to process exit
10621                  * or fd copying.
10622                  */
10623                 mutex_lock(&kvm->slots_lock);
10624                 __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
10625                                         0, 0);
10626                 __x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT,
10627                                         0, 0);
10628                 __x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
10629                 mutex_unlock(&kvm->slots_lock);
10630         }
10631         static_call_cond(kvm_x86_vm_destroy)(kvm);
10632         for (i = 0; i < kvm->arch.msr_filter.count; i++)
10633                 kfree(kvm->arch.msr_filter.ranges[i].bitmap);
10634         kvm_pic_destroy(kvm);
10635         kvm_ioapic_destroy(kvm);
10636         kvm_free_vcpus(kvm);
10637         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
10638         kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
10639         kvm_mmu_uninit_vm(kvm);
10640         kvm_page_track_cleanup(kvm);
10641         kvm_xen_destroy_vm(kvm);
10642         kvm_hv_destroy_vm(kvm);
10643 }
10644
10645 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
10646 {
10647         int i;
10648
10649         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10650                 kvfree(slot->arch.rmap[i]);
10651                 slot->arch.rmap[i] = NULL;
10652
10653                 if (i == 0)
10654                         continue;
10655
10656                 kvfree(slot->arch.lpage_info[i - 1]);
10657                 slot->arch.lpage_info[i - 1] = NULL;
10658         }
10659
10660         kvm_page_track_free_memslot(slot);
10661 }
10662
10663 static int kvm_alloc_memslot_metadata(struct kvm_memory_slot *slot,
10664                                       unsigned long npages)
10665 {
10666         int i;
10667
10668         /*
10669          * Clear out the previous array pointers for the KVM_MR_MOVE case.  The
10670          * old arrays will be freed by __kvm_set_memory_region() if installing
10671          * the new memslot is successful.
10672          */
10673         memset(&slot->arch, 0, sizeof(slot->arch));
10674
10675         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10676                 struct kvm_lpage_info *linfo;
10677                 unsigned long ugfn;
10678                 int lpages;
10679                 int level = i + 1;
10680
10681                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
10682                                       slot->base_gfn, level) + 1;
10683
10684                 slot->arch.rmap[i] =
10685                         kvcalloc(lpages, sizeof(*slot->arch.rmap[i]),
10686                                  GFP_KERNEL_ACCOUNT);
10687                 if (!slot->arch.rmap[i])
10688                         goto out_free;
10689                 if (i == 0)
10690                         continue;
10691
10692                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
10693                 if (!linfo)
10694                         goto out_free;
10695
10696                 slot->arch.lpage_info[i - 1] = linfo;
10697
10698                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
10699                         linfo[0].disallow_lpage = 1;
10700                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
10701                         linfo[lpages - 1].disallow_lpage = 1;
10702                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
10703                 /*
10704                  * If the gfn and userspace address are not aligned wrt each
10705                  * other, disable large page support for this slot.
10706                  */
10707                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1)) {
10708                         unsigned long j;
10709
10710                         for (j = 0; j < lpages; ++j)
10711                                 linfo[j].disallow_lpage = 1;
10712                 }
10713         }
10714
10715         if (kvm_page_track_create_memslot(slot, npages))
10716                 goto out_free;
10717
10718         return 0;
10719
10720 out_free:
10721         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10722                 kvfree(slot->arch.rmap[i]);
10723                 slot->arch.rmap[i] = NULL;
10724                 if (i == 0)
10725                         continue;
10726
10727                 kvfree(slot->arch.lpage_info[i - 1]);
10728                 slot->arch.lpage_info[i - 1] = NULL;
10729         }
10730         return -ENOMEM;
10731 }
10732
10733 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
10734 {
10735         struct kvm_vcpu *vcpu;
10736         int i;
10737
10738         /*
10739          * memslots->generation has been incremented.
10740          * mmio generation may have reached its maximum value.
10741          */
10742         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
10743
10744         /* Force re-initialization of steal_time cache */
10745         kvm_for_each_vcpu(i, vcpu, kvm)
10746                 kvm_vcpu_kick(vcpu);
10747 }
10748
10749 int kvm_arch_prepare_memory_region(struct kvm *kvm,
10750                                 struct kvm_memory_slot *memslot,
10751                                 const struct kvm_userspace_memory_region *mem,
10752                                 enum kvm_mr_change change)
10753 {
10754         if (change == KVM_MR_CREATE || change == KVM_MR_MOVE)
10755                 return kvm_alloc_memslot_metadata(memslot,
10756                                                   mem->memory_size >> PAGE_SHIFT);
10757         return 0;
10758 }
10759
10760 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
10761                                      struct kvm_memory_slot *old,
10762                                      struct kvm_memory_slot *new,
10763                                      enum kvm_mr_change change)
10764 {
10765         /*
10766          * Nothing to do for RO slots or CREATE/MOVE/DELETE of a slot.
10767          * See comments below.
10768          */
10769         if ((change != KVM_MR_FLAGS_ONLY) || (new->flags & KVM_MEM_READONLY))
10770                 return;
10771
10772         /*
10773          * Dirty logging tracks sptes in 4k granularity, meaning that large
10774          * sptes have to be split.  If live migration is successful, the guest
10775          * in the source machine will be destroyed and large sptes will be
10776          * created in the destination. However, if the guest continues to run
10777          * in the source machine (for example if live migration fails), small
10778          * sptes will remain around and cause bad performance.
10779          *
10780          * Scan sptes if dirty logging has been stopped, dropping those
10781          * which can be collapsed into a single large-page spte.  Later
10782          * page faults will create the large-page sptes.
10783          *
10784          * There is no need to do this in any of the following cases:
10785          * CREATE:      No dirty mappings will already exist.
10786          * MOVE/DELETE: The old mappings will already have been cleaned up by
10787          *              kvm_arch_flush_shadow_memslot()
10788          */
10789         if ((old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
10790             !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
10791                 kvm_mmu_zap_collapsible_sptes(kvm, new);
10792
10793         /*
10794          * Enable or disable dirty logging for the slot.
10795          *
10796          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of the old
10797          * slot have been zapped so no dirty logging updates are needed for
10798          * the old slot.
10799          * For KVM_MR_CREATE and KVM_MR_MOVE, once the new slot is visible
10800          * any mappings that might be created in it will consume the
10801          * properties of the new slot and do not need to be updated here.
10802          *
10803          * When PML is enabled, the kvm_x86_ops dirty logging hooks are
10804          * called to enable/disable dirty logging.
10805          *
10806          * When disabling dirty logging with PML enabled, the D-bit is set
10807          * for sptes in the slot in order to prevent unnecessary GPA
10808          * logging in the PML buffer (and potential PML buffer full VMEXIT).
10809          * This guarantees leaving PML enabled for the guest's lifetime
10810          * won't have any additional overhead from PML when the guest is
10811          * running with dirty logging disabled.
10812          *
10813          * When enabling dirty logging, large sptes are write-protected
10814          * so they can be split on first write.  New large sptes cannot
10815          * be created for this slot until the end of the logging.
10816          * See the comments in fast_page_fault().
10817          * For small sptes, nothing is done if the dirty log is in the
10818          * initial-all-set state.  Otherwise, depending on whether pml
10819          * is enabled the D-bit or the W-bit will be cleared.
10820          */
10821         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
10822                 if (kvm_x86_ops.slot_enable_log_dirty) {
10823                         static_call(kvm_x86_slot_enable_log_dirty)(kvm, new);
10824                 } else {
10825                         int level =
10826                                 kvm_dirty_log_manual_protect_and_init_set(kvm) ?
10827                                 PG_LEVEL_2M : PG_LEVEL_4K;
10828
10829                         /*
10830                          * If we're with initial-all-set, we don't need
10831                          * to write protect any small page because
10832                          * they're reported as dirty already.  However
10833                          * we still need to write-protect huge pages
10834                          * so that the page split can happen lazily on
10835                          * the first write to the huge page.
10836                          */
10837                         kvm_mmu_slot_remove_write_access(kvm, new, level);
10838                 }
10839         } else {
10840                 static_call_cond(kvm_x86_slot_disable_log_dirty)(kvm, new);
10841         }
10842 }
10843
10844 void kvm_arch_commit_memory_region(struct kvm *kvm,
10845                                 const struct kvm_userspace_memory_region *mem,
10846                                 struct kvm_memory_slot *old,
10847                                 const struct kvm_memory_slot *new,
10848                                 enum kvm_mr_change change)
10849 {
10850         if (!kvm->arch.n_requested_mmu_pages)
10851                 kvm_mmu_change_mmu_pages(kvm,
10852                                 kvm_mmu_calculate_default_mmu_pages(kvm));
10853
10854         /*
10855          * FIXME: const-ify all uses of struct kvm_memory_slot.
10856          */
10857         kvm_mmu_slot_apply_flags(kvm, old, (struct kvm_memory_slot *) new, change);
10858
10859         /* Free the arrays associated with the old memslot. */
10860         if (change == KVM_MR_MOVE)
10861                 kvm_arch_free_memslot(kvm, old);
10862 }
10863
10864 void kvm_arch_flush_shadow_all(struct kvm *kvm)
10865 {
10866         kvm_mmu_zap_all(kvm);
10867 }
10868
10869 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
10870                                    struct kvm_memory_slot *slot)
10871 {
10872         kvm_page_track_flush_slot(kvm, slot);
10873 }
10874
10875 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
10876 {
10877         return (is_guest_mode(vcpu) &&
10878                         kvm_x86_ops.guest_apic_has_interrupt &&
10879                         static_call(kvm_x86_guest_apic_has_interrupt)(vcpu));
10880 }
10881
10882 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
10883 {
10884         if (!list_empty_careful(&vcpu->async_pf.done))
10885                 return true;
10886
10887         if (kvm_apic_has_events(vcpu))
10888                 return true;
10889
10890         if (vcpu->arch.pv.pv_unhalted)
10891                 return true;
10892
10893         if (vcpu->arch.exception.pending)
10894                 return true;
10895
10896         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
10897             (vcpu->arch.nmi_pending &&
10898              static_call(kvm_x86_nmi_allowed)(vcpu, false)))
10899                 return true;
10900
10901         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
10902             (vcpu->arch.smi_pending &&
10903              static_call(kvm_x86_smi_allowed)(vcpu, false)))
10904                 return true;
10905
10906         if (kvm_arch_interrupt_allowed(vcpu) &&
10907             (kvm_cpu_has_interrupt(vcpu) ||
10908             kvm_guest_apic_has_interrupt(vcpu)))
10909                 return true;
10910
10911         if (kvm_hv_has_stimer_pending(vcpu))
10912                 return true;
10913
10914         if (is_guest_mode(vcpu) &&
10915             kvm_x86_ops.nested_ops->hv_timer_pending &&
10916             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
10917                 return true;
10918
10919         return false;
10920 }
10921
10922 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
10923 {
10924         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
10925 }
10926
10927 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
10928 {
10929         if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
10930                 return true;
10931
10932         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
10933                 kvm_test_request(KVM_REQ_SMI, vcpu) ||
10934                  kvm_test_request(KVM_REQ_EVENT, vcpu))
10935                 return true;
10936
10937         if (vcpu->arch.apicv_active && static_call(kvm_x86_dy_apicv_has_pending_interrupt)(vcpu))
10938                 return true;
10939
10940         return false;
10941 }
10942
10943 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
10944 {
10945         return vcpu->arch.preempted_in_kernel;
10946 }
10947
10948 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
10949 {
10950         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
10951 }
10952
10953 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
10954 {
10955         return static_call(kvm_x86_interrupt_allowed)(vcpu, false);
10956 }
10957
10958 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
10959 {
10960         /* Can't read the RIP when guest state is protected, just return 0 */
10961         if (vcpu->arch.guest_state_protected)
10962                 return 0;
10963
10964         if (is_64_bit_mode(vcpu))
10965                 return kvm_rip_read(vcpu);
10966         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
10967                      kvm_rip_read(vcpu));
10968 }
10969 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
10970
10971 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
10972 {
10973         return kvm_get_linear_rip(vcpu) == linear_rip;
10974 }
10975 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
10976
10977 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
10978 {
10979         unsigned long rflags;
10980
10981         rflags = static_call(kvm_x86_get_rflags)(vcpu);
10982         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
10983                 rflags &= ~X86_EFLAGS_TF;
10984         return rflags;
10985 }
10986 EXPORT_SYMBOL_GPL(kvm_get_rflags);
10987
10988 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
10989 {
10990         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
10991             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
10992                 rflags |= X86_EFLAGS_TF;
10993         static_call(kvm_x86_set_rflags)(vcpu, rflags);
10994 }
10995
10996 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
10997 {
10998         __kvm_set_rflags(vcpu, rflags);
10999         kvm_make_request(KVM_REQ_EVENT, vcpu);
11000 }
11001 EXPORT_SYMBOL_GPL(kvm_set_rflags);
11002
11003 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
11004 {
11005         int r;
11006
11007         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
11008               work->wakeup_all)
11009                 return;
11010
11011         r = kvm_mmu_reload(vcpu);
11012         if (unlikely(r))
11013                 return;
11014
11015         if (!vcpu->arch.mmu->direct_map &&
11016               work->arch.cr3 != vcpu->arch.mmu->get_guest_pgd(vcpu))
11017                 return;
11018
11019         kvm_mmu_do_page_fault(vcpu, work->cr2_or_gpa, 0, true);
11020 }
11021
11022 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
11023 {
11024         BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU));
11025
11026         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
11027 }
11028
11029 static inline u32 kvm_async_pf_next_probe(u32 key)
11030 {
11031         return (key + 1) & (ASYNC_PF_PER_VCPU - 1);
11032 }
11033
11034 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11035 {
11036         u32 key = kvm_async_pf_hash_fn(gfn);
11037
11038         while (vcpu->arch.apf.gfns[key] != ~0)
11039                 key = kvm_async_pf_next_probe(key);
11040
11041         vcpu->arch.apf.gfns[key] = gfn;
11042 }
11043
11044 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
11045 {
11046         int i;
11047         u32 key = kvm_async_pf_hash_fn(gfn);
11048
11049         for (i = 0; i < ASYNC_PF_PER_VCPU &&
11050                      (vcpu->arch.apf.gfns[key] != gfn &&
11051                       vcpu->arch.apf.gfns[key] != ~0); i++)
11052                 key = kvm_async_pf_next_probe(key);
11053
11054         return key;
11055 }
11056
11057 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11058 {
11059         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
11060 }
11061
11062 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11063 {
11064         u32 i, j, k;
11065
11066         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
11067
11068         if (WARN_ON_ONCE(vcpu->arch.apf.gfns[i] != gfn))
11069                 return;
11070
11071         while (true) {
11072                 vcpu->arch.apf.gfns[i] = ~0;
11073                 do {
11074                         j = kvm_async_pf_next_probe(j);
11075                         if (vcpu->arch.apf.gfns[j] == ~0)
11076                                 return;
11077                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
11078                         /*
11079                          * k lies cyclically in ]i,j]
11080                          * |    i.k.j |
11081                          * |....j i.k.| or  |.k..j i...|
11082                          */
11083                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
11084                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
11085                 i = j;
11086         }
11087 }
11088
11089 static inline int apf_put_user_notpresent(struct kvm_vcpu *vcpu)
11090 {
11091         u32 reason = KVM_PV_REASON_PAGE_NOT_PRESENT;
11092
11093         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &reason,
11094                                       sizeof(reason));
11095 }
11096
11097 static inline int apf_put_user_ready(struct kvm_vcpu *vcpu, u32 token)
11098 {
11099         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
11100
11101         return kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
11102                                              &token, offset, sizeof(token));
11103 }
11104
11105 static inline bool apf_pageready_slot_free(struct kvm_vcpu *vcpu)
11106 {
11107         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
11108         u32 val;
11109
11110         if (kvm_read_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
11111                                          &val, offset, sizeof(val)))
11112                 return false;
11113
11114         return !val;
11115 }
11116
11117 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
11118 {
11119         if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
11120                 return false;
11121
11122         if (!kvm_pv_async_pf_enabled(vcpu) ||
11123             (vcpu->arch.apf.send_user_only && static_call(kvm_x86_get_cpl)(vcpu) == 0))
11124                 return false;
11125
11126         return true;
11127 }
11128
11129 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
11130 {
11131         if (unlikely(!lapic_in_kernel(vcpu) ||
11132                      kvm_event_needs_reinjection(vcpu) ||
11133                      vcpu->arch.exception.pending))
11134                 return false;
11135
11136         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
11137                 return false;
11138
11139         /*
11140          * If interrupts are off we cannot even use an artificial
11141          * halt state.
11142          */
11143         return kvm_arch_interrupt_allowed(vcpu);
11144 }
11145
11146 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
11147                                      struct kvm_async_pf *work)
11148 {
11149         struct x86_exception fault;
11150
11151         trace_kvm_async_pf_not_present(work->arch.token, work->cr2_or_gpa);
11152         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
11153
11154         if (kvm_can_deliver_async_pf(vcpu) &&
11155             !apf_put_user_notpresent(vcpu)) {
11156                 fault.vector = PF_VECTOR;
11157                 fault.error_code_valid = true;
11158                 fault.error_code = 0;
11159                 fault.nested_page_fault = false;
11160                 fault.address = work->arch.token;
11161                 fault.async_page_fault = true;
11162                 kvm_inject_page_fault(vcpu, &fault);
11163                 return true;
11164         } else {
11165                 /*
11166                  * It is not possible to deliver a paravirtualized asynchronous
11167                  * page fault, but putting the guest in an artificial halt state
11168                  * can be beneficial nevertheless: if an interrupt arrives, we
11169                  * can deliver it timely and perhaps the guest will schedule
11170                  * another process.  When the instruction that triggered a page
11171                  * fault is retried, hopefully the page will be ready in the host.
11172                  */
11173                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
11174                 return false;
11175         }
11176 }
11177
11178 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
11179                                  struct kvm_async_pf *work)
11180 {
11181         struct kvm_lapic_irq irq = {
11182                 .delivery_mode = APIC_DM_FIXED,
11183                 .vector = vcpu->arch.apf.vec
11184         };
11185
11186         if (work->wakeup_all)
11187                 work->arch.token = ~0; /* broadcast wakeup */
11188         else
11189                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
11190         trace_kvm_async_pf_ready(work->arch.token, work->cr2_or_gpa);
11191
11192         if ((work->wakeup_all || work->notpresent_injected) &&
11193             kvm_pv_async_pf_enabled(vcpu) &&
11194             !apf_put_user_ready(vcpu, work->arch.token)) {
11195                 vcpu->arch.apf.pageready_pending = true;
11196                 kvm_apic_set_irq(vcpu, &irq, NULL);
11197         }
11198
11199         vcpu->arch.apf.halted = false;
11200         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
11201 }
11202
11203 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu)
11204 {
11205         kvm_make_request(KVM_REQ_APF_READY, vcpu);
11206         if (!vcpu->arch.apf.pageready_pending)
11207                 kvm_vcpu_kick(vcpu);
11208 }
11209
11210 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu)
11211 {
11212         if (!kvm_pv_async_pf_enabled(vcpu))
11213                 return true;
11214         else
11215                 return apf_pageready_slot_free(vcpu);
11216 }
11217
11218 void kvm_arch_start_assignment(struct kvm *kvm)
11219 {
11220         atomic_inc(&kvm->arch.assigned_device_count);
11221 }
11222 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
11223
11224 void kvm_arch_end_assignment(struct kvm *kvm)
11225 {
11226         atomic_dec(&kvm->arch.assigned_device_count);
11227 }
11228 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
11229
11230 bool kvm_arch_has_assigned_device(struct kvm *kvm)
11231 {
11232         return atomic_read(&kvm->arch.assigned_device_count);
11233 }
11234 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
11235
11236 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
11237 {
11238         atomic_inc(&kvm->arch.noncoherent_dma_count);
11239 }
11240 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
11241
11242 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
11243 {
11244         atomic_dec(&kvm->arch.noncoherent_dma_count);
11245 }
11246 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
11247
11248 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
11249 {
11250         return atomic_read(&kvm->arch.noncoherent_dma_count);
11251 }
11252 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
11253
11254 bool kvm_arch_has_irq_bypass(void)
11255 {
11256         return true;
11257 }
11258
11259 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
11260                                       struct irq_bypass_producer *prod)
11261 {
11262         struct kvm_kernel_irqfd *irqfd =
11263                 container_of(cons, struct kvm_kernel_irqfd, consumer);
11264         int ret;
11265
11266         irqfd->producer = prod;
11267         kvm_arch_start_assignment(irqfd->kvm);
11268         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm,
11269                                          prod->irq, irqfd->gsi, 1);
11270
11271         if (ret)
11272                 kvm_arch_end_assignment(irqfd->kvm);
11273
11274         return ret;
11275 }
11276
11277 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
11278                                       struct irq_bypass_producer *prod)
11279 {
11280         int ret;
11281         struct kvm_kernel_irqfd *irqfd =
11282                 container_of(cons, struct kvm_kernel_irqfd, consumer);
11283
11284         WARN_ON(irqfd->producer != prod);
11285         irqfd->producer = NULL;
11286
11287         /*
11288          * When producer of consumer is unregistered, we change back to
11289          * remapped mode, so we can re-use the current implementation
11290          * when the irq is masked/disabled or the consumer side (KVM
11291          * int this case doesn't want to receive the interrupts.
11292         */
11293         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm, prod->irq, irqfd->gsi, 0);
11294         if (ret)
11295                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
11296                        " fails: %d\n", irqfd->consumer.token, ret);
11297
11298         kvm_arch_end_assignment(irqfd->kvm);
11299 }
11300
11301 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
11302                                    uint32_t guest_irq, bool set)
11303 {
11304         return static_call(kvm_x86_update_pi_irte)(kvm, host_irq, guest_irq, set);
11305 }
11306
11307 bool kvm_vector_hashing_enabled(void)
11308 {
11309         return vector_hashing;
11310 }
11311
11312 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
11313 {
11314         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
11315 }
11316 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
11317
11318
11319 int kvm_spec_ctrl_test_value(u64 value)
11320 {
11321         /*
11322          * test that setting IA32_SPEC_CTRL to given value
11323          * is allowed by the host processor
11324          */
11325
11326         u64 saved_value;
11327         unsigned long flags;
11328         int ret = 0;
11329
11330         local_irq_save(flags);
11331
11332         if (rdmsrl_safe(MSR_IA32_SPEC_CTRL, &saved_value))
11333                 ret = 1;
11334         else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL, value))
11335                 ret = 1;
11336         else
11337                 wrmsrl(MSR_IA32_SPEC_CTRL, saved_value);
11338
11339         local_irq_restore(flags);
11340
11341         return ret;
11342 }
11343 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value);
11344
11345 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code)
11346 {
11347         struct x86_exception fault;
11348         u32 access = error_code &
11349                 (PFERR_WRITE_MASK | PFERR_FETCH_MASK | PFERR_USER_MASK);
11350
11351         if (!(error_code & PFERR_PRESENT_MASK) ||
11352             vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, &fault) != UNMAPPED_GVA) {
11353                 /*
11354                  * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
11355                  * tables probably do not match the TLB.  Just proceed
11356                  * with the error code that the processor gave.
11357                  */
11358                 fault.vector = PF_VECTOR;
11359                 fault.error_code_valid = true;
11360                 fault.error_code = error_code;
11361                 fault.nested_page_fault = false;
11362                 fault.address = gva;
11363         }
11364         vcpu->arch.walk_mmu->inject_page_fault(vcpu, &fault);
11365 }
11366 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error);
11367
11368 /*
11369  * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
11370  * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
11371  * indicates whether exit to userspace is needed.
11372  */
11373 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
11374                               struct x86_exception *e)
11375 {
11376         if (r == X86EMUL_PROPAGATE_FAULT) {
11377                 kvm_inject_emulated_page_fault(vcpu, e);
11378                 return 1;
11379         }
11380
11381         /*
11382          * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
11383          * while handling a VMX instruction KVM could've handled the request
11384          * correctly by exiting to userspace and performing I/O but there
11385          * doesn't seem to be a real use-case behind such requests, just return
11386          * KVM_EXIT_INTERNAL_ERROR for now.
11387          */
11388         vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
11389         vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
11390         vcpu->run->internal.ndata = 0;
11391
11392         return 0;
11393 }
11394 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure);
11395
11396 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva)
11397 {
11398         bool pcid_enabled;
11399         struct x86_exception e;
11400         unsigned i;
11401         unsigned long roots_to_free = 0;
11402         struct {
11403                 u64 pcid;
11404                 u64 gla;
11405         } operand;
11406         int r;
11407
11408         r = kvm_read_guest_virt(vcpu, gva, &operand, sizeof(operand), &e);
11409         if (r != X86EMUL_CONTINUE)
11410                 return kvm_handle_memory_failure(vcpu, r, &e);
11411
11412         if (operand.pcid >> 12 != 0) {
11413                 kvm_inject_gp(vcpu, 0);
11414                 return 1;
11415         }
11416
11417         pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
11418
11419         switch (type) {
11420         case INVPCID_TYPE_INDIV_ADDR:
11421                 if ((!pcid_enabled && (operand.pcid != 0)) ||
11422                     is_noncanonical_address(operand.gla, vcpu)) {
11423                         kvm_inject_gp(vcpu, 0);
11424                         return 1;
11425                 }
11426                 kvm_mmu_invpcid_gva(vcpu, operand.gla, operand.pcid);
11427                 return kvm_skip_emulated_instruction(vcpu);
11428
11429         case INVPCID_TYPE_SINGLE_CTXT:
11430                 if (!pcid_enabled && (operand.pcid != 0)) {
11431                         kvm_inject_gp(vcpu, 0);
11432                         return 1;
11433                 }
11434
11435                 if (kvm_get_active_pcid(vcpu) == operand.pcid) {
11436                         kvm_mmu_sync_roots(vcpu);
11437                         kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
11438                 }
11439
11440                 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
11441                         if (kvm_get_pcid(vcpu, vcpu->arch.mmu->prev_roots[i].pgd)
11442                             == operand.pcid)
11443                                 roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
11444
11445                 kvm_mmu_free_roots(vcpu, vcpu->arch.mmu, roots_to_free);
11446                 /*
11447                  * If neither the current cr3 nor any of the prev_roots use the
11448                  * given PCID, then nothing needs to be done here because a
11449                  * resync will happen anyway before switching to any other CR3.
11450                  */
11451
11452                 return kvm_skip_emulated_instruction(vcpu);
11453
11454         case INVPCID_TYPE_ALL_NON_GLOBAL:
11455                 /*
11456                  * Currently, KVM doesn't mark global entries in the shadow
11457                  * page tables, so a non-global flush just degenerates to a
11458                  * global flush. If needed, we could optimize this later by
11459                  * keeping track of global entries in shadow page tables.
11460                  */
11461
11462                 fallthrough;
11463         case INVPCID_TYPE_ALL_INCL_GLOBAL:
11464                 kvm_mmu_unload(vcpu);
11465                 return kvm_skip_emulated_instruction(vcpu);
11466
11467         default:
11468                 BUG(); /* We have already checked above that type <= 3 */
11469         }
11470 }
11471 EXPORT_SYMBOL_GPL(kvm_handle_invpcid);
11472
11473 static int complete_sev_es_emulated_mmio(struct kvm_vcpu *vcpu)
11474 {
11475         struct kvm_run *run = vcpu->run;
11476         struct kvm_mmio_fragment *frag;
11477         unsigned int len;
11478
11479         BUG_ON(!vcpu->mmio_needed);
11480
11481         /* Complete previous fragment */
11482         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
11483         len = min(8u, frag->len);
11484         if (!vcpu->mmio_is_write)
11485                 memcpy(frag->data, run->mmio.data, len);
11486
11487         if (frag->len <= 8) {
11488                 /* Switch to the next fragment. */
11489                 frag++;
11490                 vcpu->mmio_cur_fragment++;
11491         } else {
11492                 /* Go forward to the next mmio piece. */
11493                 frag->data += len;
11494                 frag->gpa += len;
11495                 frag->len -= len;
11496         }
11497
11498         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
11499                 vcpu->mmio_needed = 0;
11500
11501                 // VMG change, at this point, we're always done
11502                 // RIP has already been advanced
11503                 return 1;
11504         }
11505
11506         // More MMIO is needed
11507         run->mmio.phys_addr = frag->gpa;
11508         run->mmio.len = min(8u, frag->len);
11509         run->mmio.is_write = vcpu->mmio_is_write;
11510         if (run->mmio.is_write)
11511                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
11512         run->exit_reason = KVM_EXIT_MMIO;
11513
11514         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
11515
11516         return 0;
11517 }
11518
11519 int kvm_sev_es_mmio_write(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
11520                           void *data)
11521 {
11522         int handled;
11523         struct kvm_mmio_fragment *frag;
11524
11525         if (!data)
11526                 return -EINVAL;
11527
11528         handled = write_emultor.read_write_mmio(vcpu, gpa, bytes, data);
11529         if (handled == bytes)
11530                 return 1;
11531
11532         bytes -= handled;
11533         gpa += handled;
11534         data += handled;
11535
11536         /*TODO: Check if need to increment number of frags */
11537         frag = vcpu->mmio_fragments;
11538         vcpu->mmio_nr_fragments = 1;
11539         frag->len = bytes;
11540         frag->gpa = gpa;
11541         frag->data = data;
11542
11543         vcpu->mmio_needed = 1;
11544         vcpu->mmio_cur_fragment = 0;
11545
11546         vcpu->run->mmio.phys_addr = gpa;
11547         vcpu->run->mmio.len = min(8u, frag->len);
11548         vcpu->run->mmio.is_write = 1;
11549         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
11550         vcpu->run->exit_reason = KVM_EXIT_MMIO;
11551
11552         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
11553
11554         return 0;
11555 }
11556 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write);
11557
11558 int kvm_sev_es_mmio_read(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
11559                          void *data)
11560 {
11561         int handled;
11562         struct kvm_mmio_fragment *frag;
11563
11564         if (!data)
11565                 return -EINVAL;
11566
11567         handled = read_emultor.read_write_mmio(vcpu, gpa, bytes, data);
11568         if (handled == bytes)
11569                 return 1;
11570
11571         bytes -= handled;
11572         gpa += handled;
11573         data += handled;
11574
11575         /*TODO: Check if need to increment number of frags */
11576         frag = vcpu->mmio_fragments;
11577         vcpu->mmio_nr_fragments = 1;
11578         frag->len = bytes;
11579         frag->gpa = gpa;
11580         frag->data = data;
11581
11582         vcpu->mmio_needed = 1;
11583         vcpu->mmio_cur_fragment = 0;
11584
11585         vcpu->run->mmio.phys_addr = gpa;
11586         vcpu->run->mmio.len = min(8u, frag->len);
11587         vcpu->run->mmio.is_write = 0;
11588         vcpu->run->exit_reason = KVM_EXIT_MMIO;
11589
11590         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
11591
11592         return 0;
11593 }
11594 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read);
11595
11596 static int complete_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
11597 {
11598         memcpy(vcpu->arch.guest_ins_data, vcpu->arch.pio_data,
11599                vcpu->arch.pio.count * vcpu->arch.pio.size);
11600         vcpu->arch.pio.count = 0;
11601
11602         return 1;
11603 }
11604
11605 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
11606                            unsigned int port, void *data,  unsigned int count)
11607 {
11608         int ret;
11609
11610         ret = emulator_pio_out_emulated(vcpu->arch.emulate_ctxt, size, port,
11611                                         data, count);
11612         if (ret)
11613                 return ret;
11614
11615         vcpu->arch.pio.count = 0;
11616
11617         return 0;
11618 }
11619
11620 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
11621                           unsigned int port, void *data, unsigned int count)
11622 {
11623         int ret;
11624
11625         ret = emulator_pio_in_emulated(vcpu->arch.emulate_ctxt, size, port,
11626                                        data, count);
11627         if (ret) {
11628                 vcpu->arch.pio.count = 0;
11629         } else {
11630                 vcpu->arch.guest_ins_data = data;
11631                 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_ins;
11632         }
11633
11634         return 0;
11635 }
11636
11637 int kvm_sev_es_string_io(struct kvm_vcpu *vcpu, unsigned int size,
11638                          unsigned int port, void *data,  unsigned int count,
11639                          int in)
11640 {
11641         return in ? kvm_sev_es_ins(vcpu, size, port, data, count)
11642                   : kvm_sev_es_outs(vcpu, size, port, data, count);
11643 }
11644 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io);
11645
11646 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry);
11647 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
11648 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
11649 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
11650 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
11651 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
11652 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
11653 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
11654 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
11655 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
11656 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
11657 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
11658 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
11659 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
11660 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
11661 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
11662 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
11663 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
11664 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
11665 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
11666 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);
11667 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log);
11668 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request);
11669 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter);
11670 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit);
11671 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter);
11672 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit);