1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2020 Intel Corporation
4 * Author: Johannes Berg <johannes@sipsolutions.net>
6 #include <linux/module.h>
8 #include <linux/virtio.h>
9 #include <linux/virtio_config.h>
10 #include <linux/logic_iomem.h>
11 #include <linux/irqdomain.h>
12 #include <linux/virtio_pcidev.h>
13 #include <linux/virtio-uml.h>
14 #include <linux/delay.h>
15 #include <linux/msi.h>
16 #include <asm/unaligned.h>
20 #define MAX_MSI_VECTORS 32
21 #define CFG_SPACE_SIZE 4096
23 /* for MSI-X we have a 32-bit payload */
24 #define MAX_IRQ_MSG_SIZE (sizeof(struct virtio_pcidev_msg) + sizeof(u32))
25 #define NUM_IRQ_MSGS 10
27 #define HANDLE_NO_FREE(ptr) ((void *)((unsigned long)(ptr) | 1))
28 #define HANDLE_IS_NO_FREE(ptr) ((unsigned long)(ptr) & 1)
30 struct um_pci_device {
31 struct virtio_device *vdev;
33 /* for now just standard BARs */
34 u8 resptr[PCI_STD_NUM_BARS];
36 struct virtqueue *cmd_vq, *irq_vq;
38 #define UM_PCI_STAT_WAITING 0
44 struct um_pci_device_reg {
45 struct um_pci_device *dev;
49 static struct pci_host_bridge *bridge;
50 static DEFINE_MUTEX(um_pci_mtx);
51 static struct um_pci_device_reg um_pci_devices[MAX_DEVICES];
52 static struct fwnode_handle *um_pci_fwnode;
53 static struct irq_domain *um_pci_inner_domain;
54 static struct irq_domain *um_pci_msi_domain;
55 static unsigned long um_pci_msi_used[BITS_TO_LONGS(MAX_MSI_VECTORS)];
57 #define UM_VIRT_PCI_MAXDELAY 40000
59 static int um_pci_send_cmd(struct um_pci_device *dev,
60 struct virtio_pcidev_msg *cmd,
61 unsigned int cmd_size,
62 const void *extra, unsigned int extra_size,
63 void *out, unsigned int out_size)
65 struct scatterlist out_sg, extra_sg, in_sg;
66 struct scatterlist *sgs_list[] = {
68 [1] = extra ? &extra_sg : &in_sg,
69 [2] = extra ? &in_sg : NULL,
75 if (WARN_ON(cmd_size < sizeof(*cmd)))
79 case VIRTIO_PCIDEV_OP_CFG_WRITE:
80 case VIRTIO_PCIDEV_OP_MMIO_WRITE:
81 case VIRTIO_PCIDEV_OP_MMIO_MEMSET:
82 /* in PCI, writes are posted, so don't wait */
92 u8 *ncmd = kmalloc(cmd_size + extra_size, GFP_ATOMIC);
95 memcpy(ncmd, cmd, cmd_size);
97 memcpy(ncmd + cmd_size, extra, extra_size);
99 cmd_size += extra_size;
103 /* try without allocating memory */
108 sg_init_one(&out_sg, cmd, cmd_size);
110 sg_init_one(&extra_sg, extra, extra_size);
112 sg_init_one(&in_sg, out, out_size);
114 /* add to internal virtio queue */
115 ret = virtqueue_add_sgs(dev->cmd_vq, sgs_list,
118 posted ? cmd : HANDLE_NO_FREE(cmd),
124 virtqueue_kick(dev->cmd_vq);
128 /* kick and poll for getting a response on the queue */
129 set_bit(UM_PCI_STAT_WAITING, &dev->status);
130 virtqueue_kick(dev->cmd_vq);
133 void *completed = virtqueue_get_buf(dev->cmd_vq, &len);
135 if (completed == HANDLE_NO_FREE(cmd))
138 if (completed && !HANDLE_IS_NO_FREE(completed))
141 if (WARN_ONCE(virtqueue_is_broken(dev->cmd_vq) ||
142 ++delay_count > UM_VIRT_PCI_MAXDELAY,
143 "um virt-pci delay: %d", delay_count)) {
149 clear_bit(UM_PCI_STAT_WAITING, &dev->status);
154 static unsigned long um_pci_cfgspace_read(void *priv, unsigned int offset,
157 struct um_pci_device_reg *reg = priv;
158 struct um_pci_device *dev = reg->dev;
159 struct virtio_pcidev_msg hdr = {
160 .op = VIRTIO_PCIDEV_OP_CFG_READ,
164 /* maximum size - we may only use parts of it */
170 memset(data, 0xff, sizeof(data));
181 WARN(1, "invalid config space read size %d\n", size);
185 if (um_pci_send_cmd(dev, &hdr, sizeof(hdr), NULL, 0,
193 return le16_to_cpup((void *)data);
195 return le32_to_cpup((void *)data);
198 return le64_to_cpup((void *)data);
205 static void um_pci_cfgspace_write(void *priv, unsigned int offset, int size,
208 struct um_pci_device_reg *reg = priv;
209 struct um_pci_device *dev = reg->dev;
211 struct virtio_pcidev_msg hdr;
212 /* maximum size - we may only use parts of it */
216 .op = VIRTIO_PCIDEV_OP_CFG_WRITE,
227 msg.data[0] = (u8)val;
230 put_unaligned_le16(val, (void *)msg.data);
233 put_unaligned_le32(val, (void *)msg.data);
237 put_unaligned_le64(val, (void *)msg.data);
241 WARN(1, "invalid config space write size %d\n", size);
245 WARN_ON(um_pci_send_cmd(dev, &msg.hdr, sizeof(msg), NULL, 0, NULL, 0));
248 static const struct logic_iomem_ops um_pci_device_cfgspace_ops = {
249 .read = um_pci_cfgspace_read,
250 .write = um_pci_cfgspace_write,
253 static void um_pci_bar_copy_from(void *priv, void *buffer,
254 unsigned int offset, int size)
257 struct um_pci_device *dev = container_of(resptr - *resptr,
258 struct um_pci_device,
260 struct virtio_pcidev_msg hdr = {
261 .op = VIRTIO_PCIDEV_OP_MMIO_READ,
267 memset(buffer, 0xff, size);
269 um_pci_send_cmd(dev, &hdr, sizeof(hdr), NULL, 0, buffer, size);
272 static unsigned long um_pci_bar_read(void *priv, unsigned int offset,
275 /* maximum size - we may only use parts of it */
287 WARN(1, "invalid config space read size %d\n", size);
291 um_pci_bar_copy_from(priv, data, offset, size);
297 return le16_to_cpup((void *)data);
299 return le32_to_cpup((void *)data);
302 return le64_to_cpup((void *)data);
309 static void um_pci_bar_copy_to(void *priv, unsigned int offset,
310 const void *buffer, int size)
313 struct um_pci_device *dev = container_of(resptr - *resptr,
314 struct um_pci_device,
316 struct virtio_pcidev_msg hdr = {
317 .op = VIRTIO_PCIDEV_OP_MMIO_WRITE,
323 um_pci_send_cmd(dev, &hdr, sizeof(hdr), buffer, size, NULL, 0);
326 static void um_pci_bar_write(void *priv, unsigned int offset, int size,
329 /* maximum size - we may only use parts of it */
337 put_unaligned_le16(val, (void *)data);
340 put_unaligned_le32(val, (void *)data);
344 put_unaligned_le64(val, (void *)data);
348 WARN(1, "invalid config space write size %d\n", size);
352 um_pci_bar_copy_to(priv, offset, data, size);
355 static void um_pci_bar_set(void *priv, unsigned int offset, u8 value, int size)
358 struct um_pci_device *dev = container_of(resptr - *resptr,
359 struct um_pci_device,
362 struct virtio_pcidev_msg hdr;
366 .op = VIRTIO_PCIDEV_OP_CFG_WRITE,
374 um_pci_send_cmd(dev, &msg.hdr, sizeof(msg), NULL, 0, NULL, 0);
377 static const struct logic_iomem_ops um_pci_device_bar_ops = {
378 .read = um_pci_bar_read,
379 .write = um_pci_bar_write,
380 .set = um_pci_bar_set,
381 .copy_from = um_pci_bar_copy_from,
382 .copy_to = um_pci_bar_copy_to,
385 static void __iomem *um_pci_map_bus(struct pci_bus *bus, unsigned int devfn,
388 struct um_pci_device_reg *dev;
389 unsigned int busn = bus->number;
394 /* not allowing functions for now ... */
398 if (devfn / 8 >= ARRAY_SIZE(um_pci_devices))
401 dev = &um_pci_devices[devfn / 8];
405 return (void __iomem *)((unsigned long)dev->iomem + where);
408 static struct pci_ops um_pci_ops = {
409 .map_bus = um_pci_map_bus,
410 .read = pci_generic_config_read,
411 .write = pci_generic_config_write,
414 static void um_pci_rescan(void)
416 pci_lock_rescan_remove();
417 pci_rescan_bus(bridge->bus);
418 pci_unlock_rescan_remove();
421 static void um_pci_irq_vq_addbuf(struct virtqueue *vq, void *buf, bool kick)
423 struct scatterlist sg[1];
425 sg_init_one(sg, buf, MAX_IRQ_MSG_SIZE);
426 if (virtqueue_add_inbuf(vq, sg, 1, buf, GFP_ATOMIC))
432 static void um_pci_handle_irq_message(struct virtqueue *vq,
433 struct virtio_pcidev_msg *msg)
435 struct virtio_device *vdev = vq->vdev;
436 struct um_pci_device *dev = vdev->priv;
438 /* we should properly chain interrupts, but on ARCH=um we don't care */
441 case VIRTIO_PCIDEV_OP_INT:
442 generic_handle_irq(dev->irq);
444 case VIRTIO_PCIDEV_OP_MSI:
445 /* our MSI message is just the interrupt number */
446 if (msg->size == sizeof(u32))
447 generic_handle_irq(le32_to_cpup((void *)msg->data));
449 generic_handle_irq(le16_to_cpup((void *)msg->data));
451 case VIRTIO_PCIDEV_OP_PME:
452 /* nothing to do - we already woke up due to the message */
455 dev_err(&vdev->dev, "unexpected virt-pci message %d\n", msg->op);
460 static void um_pci_cmd_vq_cb(struct virtqueue *vq)
462 struct virtio_device *vdev = vq->vdev;
463 struct um_pci_device *dev = vdev->priv;
467 if (test_bit(UM_PCI_STAT_WAITING, &dev->status))
470 while ((cmd = virtqueue_get_buf(vq, &len))) {
471 if (WARN_ON(HANDLE_IS_NO_FREE(cmd)))
477 static void um_pci_irq_vq_cb(struct virtqueue *vq)
479 struct virtio_pcidev_msg *msg;
482 while ((msg = virtqueue_get_buf(vq, &len))) {
483 if (len >= sizeof(*msg))
484 um_pci_handle_irq_message(vq, msg);
486 /* recycle the message buffer */
487 um_pci_irq_vq_addbuf(vq, msg, true);
491 static int um_pci_init_vqs(struct um_pci_device *dev)
493 struct virtqueue *vqs[2];
494 static const char *const names[2] = { "cmd", "irq" };
495 vq_callback_t *cbs[2] = { um_pci_cmd_vq_cb, um_pci_irq_vq_cb };
498 err = virtio_find_vqs(dev->vdev, 2, vqs, cbs, names, NULL);
502 dev->cmd_vq = vqs[0];
503 dev->irq_vq = vqs[1];
505 for (i = 0; i < NUM_IRQ_MSGS; i++) {
506 void *msg = kzalloc(MAX_IRQ_MSG_SIZE, GFP_KERNEL);
509 um_pci_irq_vq_addbuf(dev->irq_vq, msg, false);
512 virtqueue_kick(dev->irq_vq);
517 static int um_pci_virtio_probe(struct virtio_device *vdev)
519 struct um_pci_device *dev;
523 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
530 mutex_lock(&um_pci_mtx);
531 for (i = 0; i < MAX_DEVICES; i++) {
532 if (um_pci_devices[i].dev)
541 err = um_pci_init_vqs(dev);
545 dev->irq = irq_alloc_desc(numa_node_id());
550 um_pci_devices[free].dev = dev;
553 mutex_unlock(&um_pci_mtx);
555 device_set_wakeup_enable(&vdev->dev, true);
558 * In order to do suspend-resume properly, don't allow VQs
561 virtio_uml_set_no_vq_suspend(vdev, true);
566 mutex_unlock(&um_pci_mtx);
571 static void um_pci_virtio_remove(struct virtio_device *vdev)
573 struct um_pci_device *dev = vdev->priv;
576 /* Stop all virtqueues */
577 vdev->config->reset(vdev);
578 vdev->config->del_vqs(vdev);
580 device_set_wakeup_enable(&vdev->dev, false);
582 mutex_lock(&um_pci_mtx);
583 for (i = 0; i < MAX_DEVICES; i++) {
584 if (um_pci_devices[i].dev != dev)
586 um_pci_devices[i].dev = NULL;
587 irq_free_desc(dev->irq);
589 mutex_unlock(&um_pci_mtx);
596 static struct virtio_device_id id_table[] = {
597 { CONFIG_UML_PCI_OVER_VIRTIO_DEVICE_ID, VIRTIO_DEV_ANY_ID },
600 MODULE_DEVICE_TABLE(virtio, id_table);
602 static struct virtio_driver um_pci_virtio_driver = {
603 .driver.name = "virtio-pci",
604 .driver.owner = THIS_MODULE,
605 .id_table = id_table,
606 .probe = um_pci_virtio_probe,
607 .remove = um_pci_virtio_remove,
610 static struct resource virt_cfgspace_resource = {
611 .name = "PCI config space",
612 .start = 0xf0000000 - MAX_DEVICES * CFG_SPACE_SIZE,
613 .end = 0xf0000000 - 1,
614 .flags = IORESOURCE_MEM,
617 static long um_pci_map_cfgspace(unsigned long offset, size_t size,
618 const struct logic_iomem_ops **ops,
621 if (WARN_ON(size > CFG_SPACE_SIZE || offset % CFG_SPACE_SIZE))
624 if (offset / CFG_SPACE_SIZE < MAX_DEVICES) {
625 *ops = &um_pci_device_cfgspace_ops;
626 *priv = &um_pci_devices[offset / CFG_SPACE_SIZE];
630 WARN(1, "cannot map offset 0x%lx/0x%zx\n", offset, size);
634 static const struct logic_iomem_region_ops um_pci_cfgspace_ops = {
635 .map = um_pci_map_cfgspace,
638 static struct resource virt_iomem_resource = {
642 .flags = IORESOURCE_MEM,
645 struct um_pci_map_iomem_data {
646 unsigned long offset;
648 const struct logic_iomem_ops **ops;
653 static int um_pci_map_iomem_walk(struct pci_dev *pdev, void *_data)
655 struct um_pci_map_iomem_data *data = _data;
656 struct um_pci_device_reg *reg = &um_pci_devices[pdev->devfn / 8];
657 struct um_pci_device *dev;
663 for (i = 0; i < ARRAY_SIZE(dev->resptr); i++) {
664 struct resource *r = &pdev->resource[i];
666 if ((r->flags & IORESOURCE_TYPE_BITS) != IORESOURCE_MEM)
670 * must be the whole or part of the resource,
671 * not allowed to only overlap
673 if (data->offset < r->start || data->offset > r->end)
675 if (data->offset + data->size - 1 > r->end)
679 *data->ops = &um_pci_device_bar_ops;
681 *data->priv = &dev->resptr[i];
682 data->ret = data->offset - r->start;
684 /* no need to continue */
691 static long um_pci_map_iomem(unsigned long offset, size_t size,
692 const struct logic_iomem_ops **ops,
695 struct um_pci_map_iomem_data data = {
696 /* we want the full address here */
697 .offset = offset + virt_iomem_resource.start,
704 pci_walk_bus(bridge->bus, um_pci_map_iomem_walk, &data);
708 static const struct logic_iomem_region_ops um_pci_iomem_ops = {
709 .map = um_pci_map_iomem,
712 static void um_pci_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
715 * This is a very low address and not actually valid 'physical' memory
716 * in UML, so we can simply map MSI(-X) vectors to there, it cannot be
717 * legitimately written to by the device in any other way.
718 * We use the (virtual) IRQ number here as the message to simplify the
719 * code that receives the message, where for now we simply trust the
720 * device to send the correct message.
723 msg->address_lo = 0xa0000;
724 msg->data = data->irq;
727 static struct irq_chip um_pci_msi_bottom_irq_chip = {
728 .name = "UM virtio MSI",
729 .irq_compose_msi_msg = um_pci_compose_msi_msg,
732 static int um_pci_inner_domain_alloc(struct irq_domain *domain,
733 unsigned int virq, unsigned int nr_irqs,
738 WARN_ON(nr_irqs != 1);
740 mutex_lock(&um_pci_mtx);
741 bit = find_first_zero_bit(um_pci_msi_used, MAX_MSI_VECTORS);
742 if (bit >= MAX_MSI_VECTORS) {
743 mutex_unlock(&um_pci_mtx);
747 set_bit(bit, um_pci_msi_used);
748 mutex_unlock(&um_pci_mtx);
750 irq_domain_set_info(domain, virq, bit, &um_pci_msi_bottom_irq_chip,
751 domain->host_data, handle_simple_irq,
757 static void um_pci_inner_domain_free(struct irq_domain *domain,
758 unsigned int virq, unsigned int nr_irqs)
760 struct irq_data *d = irq_domain_get_irq_data(domain, virq);
762 mutex_lock(&um_pci_mtx);
764 if (!test_bit(d->hwirq, um_pci_msi_used))
765 pr_err("trying to free unused MSI#%lu\n", d->hwirq);
767 __clear_bit(d->hwirq, um_pci_msi_used);
769 mutex_unlock(&um_pci_mtx);
772 static const struct irq_domain_ops um_pci_inner_domain_ops = {
773 .alloc = um_pci_inner_domain_alloc,
774 .free = um_pci_inner_domain_free,
777 static struct irq_chip um_pci_msi_irq_chip = {
778 .name = "UM virtio PCIe MSI",
779 .irq_mask = pci_msi_mask_irq,
780 .irq_unmask = pci_msi_unmask_irq,
783 static struct msi_domain_info um_pci_msi_domain_info = {
784 .flags = MSI_FLAG_USE_DEF_DOM_OPS |
785 MSI_FLAG_USE_DEF_CHIP_OPS |
787 .chip = &um_pci_msi_irq_chip,
790 static struct resource busn_resource = {
794 .flags = IORESOURCE_BUS,
797 static int um_pci_map_irq(const struct pci_dev *pdev, u8 slot, u8 pin)
799 struct um_pci_device_reg *reg = &um_pci_devices[pdev->devfn / 8];
801 if (WARN_ON(!reg->dev))
804 /* Yes, we map all pins to the same IRQ ... doesn't matter for now. */
805 return reg->dev->irq;
808 void *pci_root_bus_fwnode(struct pci_bus *bus)
810 return um_pci_fwnode;
813 int um_pci_init(void)
817 WARN_ON(logic_iomem_add_region(&virt_cfgspace_resource,
818 &um_pci_cfgspace_ops));
819 WARN_ON(logic_iomem_add_region(&virt_iomem_resource,
822 if (WARN(CONFIG_UML_PCI_OVER_VIRTIO_DEVICE_ID < 0,
823 "No virtio device ID configured for PCI - no PCI support\n"))
826 bridge = pci_alloc_host_bridge(0);
830 um_pci_fwnode = irq_domain_alloc_named_fwnode("um-pci");
831 if (!um_pci_fwnode) {
836 um_pci_inner_domain = __irq_domain_add(um_pci_fwnode, MAX_MSI_VECTORS,
838 &um_pci_inner_domain_ops, NULL);
839 if (!um_pci_inner_domain) {
844 um_pci_msi_domain = pci_msi_create_irq_domain(um_pci_fwnode,
845 &um_pci_msi_domain_info,
846 um_pci_inner_domain);
847 if (!um_pci_msi_domain) {
852 pci_add_resource(&bridge->windows, &virt_iomem_resource);
853 pci_add_resource(&bridge->windows, &busn_resource);
854 bridge->ops = &um_pci_ops;
855 bridge->map_irq = um_pci_map_irq;
857 for (i = 0; i < MAX_DEVICES; i++) {
858 resource_size_t start;
860 start = virt_cfgspace_resource.start + i * CFG_SPACE_SIZE;
861 um_pci_devices[i].iomem = ioremap(start, CFG_SPACE_SIZE);
862 if (WARN(!um_pci_devices[i].iomem, "failed to map %d\n", i)) {
868 err = pci_host_probe(bridge);
872 err = register_virtio_driver(&um_pci_virtio_driver);
877 if (um_pci_inner_domain)
878 irq_domain_remove(um_pci_inner_domain);
880 irq_domain_free_fwnode(um_pci_fwnode);
881 pci_free_resource_list(&bridge->windows);
882 pci_free_host_bridge(bridge);
885 module_init(um_pci_init);
887 void um_pci_exit(void)
889 unregister_virtio_driver(&um_pci_virtio_driver);
890 irq_domain_remove(um_pci_msi_domain);
891 irq_domain_remove(um_pci_inner_domain);
892 pci_free_resource_list(&bridge->windows);
893 pci_free_host_bridge(bridge);
895 module_exit(um_pci_exit);