KVM: stats: Support linear and logarithmic histogram statistics
[linux-2.6-microblaze.git] / arch / powerpc / kvm / booke.c
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  *
4  * Copyright IBM Corp. 2007
5  * Copyright 2010-2011 Freescale Semiconductor, Inc.
6  *
7  * Authors: Hollis Blanchard <hollisb@us.ibm.com>
8  *          Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
9  *          Scott Wood <scottwood@freescale.com>
10  *          Varun Sethi <varun.sethi@freescale.com>
11  */
12
13 #include <linux/errno.h>
14 #include <linux/err.h>
15 #include <linux/kvm_host.h>
16 #include <linux/gfp.h>
17 #include <linux/module.h>
18 #include <linux/vmalloc.h>
19 #include <linux/fs.h>
20
21 #include <asm/cputable.h>
22 #include <linux/uaccess.h>
23 #include <asm/interrupt.h>
24 #include <asm/kvm_ppc.h>
25 #include <asm/cacheflush.h>
26 #include <asm/dbell.h>
27 #include <asm/hw_irq.h>
28 #include <asm/irq.h>
29 #include <asm/time.h>
30
31 #include "timing.h"
32 #include "booke.h"
33
34 #define CREATE_TRACE_POINTS
35 #include "trace_booke.h"
36
37 unsigned long kvmppc_booke_handlers;
38
39 const struct _kvm_stats_desc kvm_vm_stats_desc[] = {
40         KVM_GENERIC_VM_STATS(),
41         STATS_DESC_ICOUNTER(VM, num_2M_pages),
42         STATS_DESC_ICOUNTER(VM, num_1G_pages)
43 };
44
45 const struct kvm_stats_header kvm_vm_stats_header = {
46         .name_size = KVM_STATS_NAME_SIZE,
47         .num_desc = ARRAY_SIZE(kvm_vm_stats_desc),
48         .id_offset = sizeof(struct kvm_stats_header),
49         .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
50         .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
51                        sizeof(kvm_vm_stats_desc),
52 };
53
54 const struct _kvm_stats_desc kvm_vcpu_stats_desc[] = {
55         KVM_GENERIC_VCPU_STATS(),
56         STATS_DESC_COUNTER(VCPU, sum_exits),
57         STATS_DESC_COUNTER(VCPU, mmio_exits),
58         STATS_DESC_COUNTER(VCPU, signal_exits),
59         STATS_DESC_COUNTER(VCPU, light_exits),
60         STATS_DESC_COUNTER(VCPU, itlb_real_miss_exits),
61         STATS_DESC_COUNTER(VCPU, itlb_virt_miss_exits),
62         STATS_DESC_COUNTER(VCPU, dtlb_real_miss_exits),
63         STATS_DESC_COUNTER(VCPU, dtlb_virt_miss_exits),
64         STATS_DESC_COUNTER(VCPU, syscall_exits),
65         STATS_DESC_COUNTER(VCPU, isi_exits),
66         STATS_DESC_COUNTER(VCPU, dsi_exits),
67         STATS_DESC_COUNTER(VCPU, emulated_inst_exits),
68         STATS_DESC_COUNTER(VCPU, dec_exits),
69         STATS_DESC_COUNTER(VCPU, ext_intr_exits),
70         STATS_DESC_TIME_NSEC(VCPU, halt_wait_ns),
71         STATS_DESC_COUNTER(VCPU, halt_successful_wait),
72         STATS_DESC_COUNTER(VCPU, dbell_exits),
73         STATS_DESC_COUNTER(VCPU, gdbell_exits),
74         STATS_DESC_COUNTER(VCPU, ld),
75         STATS_DESC_COUNTER(VCPU, st),
76         STATS_DESC_COUNTER(VCPU, pthru_all),
77         STATS_DESC_COUNTER(VCPU, pthru_host),
78         STATS_DESC_COUNTER(VCPU, pthru_bad_aff)
79 };
80
81 const struct kvm_stats_header kvm_vcpu_stats_header = {
82         .name_size = KVM_STATS_NAME_SIZE,
83         .num_desc = ARRAY_SIZE(kvm_vcpu_stats_desc),
84         .id_offset = sizeof(struct kvm_stats_header),
85         .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
86         .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
87                        sizeof(kvm_vcpu_stats_desc),
88 };
89
90 /* TODO: use vcpu_printf() */
91 void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu)
92 {
93         int i;
94
95         printk("pc:   %08lx msr:  %08llx\n", vcpu->arch.regs.nip,
96                         vcpu->arch.shared->msr);
97         printk("lr:   %08lx ctr:  %08lx\n", vcpu->arch.regs.link,
98                         vcpu->arch.regs.ctr);
99         printk("srr0: %08llx srr1: %08llx\n", vcpu->arch.shared->srr0,
100                                             vcpu->arch.shared->srr1);
101
102         printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions);
103
104         for (i = 0; i < 32; i += 4) {
105                 printk("gpr%02d: %08lx %08lx %08lx %08lx\n", i,
106                        kvmppc_get_gpr(vcpu, i),
107                        kvmppc_get_gpr(vcpu, i+1),
108                        kvmppc_get_gpr(vcpu, i+2),
109                        kvmppc_get_gpr(vcpu, i+3));
110         }
111 }
112
113 #ifdef CONFIG_SPE
114 void kvmppc_vcpu_disable_spe(struct kvm_vcpu *vcpu)
115 {
116         preempt_disable();
117         enable_kernel_spe();
118         kvmppc_save_guest_spe(vcpu);
119         disable_kernel_spe();
120         vcpu->arch.shadow_msr &= ~MSR_SPE;
121         preempt_enable();
122 }
123
124 static void kvmppc_vcpu_enable_spe(struct kvm_vcpu *vcpu)
125 {
126         preempt_disable();
127         enable_kernel_spe();
128         kvmppc_load_guest_spe(vcpu);
129         disable_kernel_spe();
130         vcpu->arch.shadow_msr |= MSR_SPE;
131         preempt_enable();
132 }
133
134 static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
135 {
136         if (vcpu->arch.shared->msr & MSR_SPE) {
137                 if (!(vcpu->arch.shadow_msr & MSR_SPE))
138                         kvmppc_vcpu_enable_spe(vcpu);
139         } else if (vcpu->arch.shadow_msr & MSR_SPE) {
140                 kvmppc_vcpu_disable_spe(vcpu);
141         }
142 }
143 #else
144 static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
145 {
146 }
147 #endif
148
149 /*
150  * Load up guest vcpu FP state if it's needed.
151  * It also set the MSR_FP in thread so that host know
152  * we're holding FPU, and then host can help to save
153  * guest vcpu FP state if other threads require to use FPU.
154  * This simulates an FP unavailable fault.
155  *
156  * It requires to be called with preemption disabled.
157  */
158 static inline void kvmppc_load_guest_fp(struct kvm_vcpu *vcpu)
159 {
160 #ifdef CONFIG_PPC_FPU
161         if (!(current->thread.regs->msr & MSR_FP)) {
162                 enable_kernel_fp();
163                 load_fp_state(&vcpu->arch.fp);
164                 disable_kernel_fp();
165                 current->thread.fp_save_area = &vcpu->arch.fp;
166                 current->thread.regs->msr |= MSR_FP;
167         }
168 #endif
169 }
170
171 /*
172  * Save guest vcpu FP state into thread.
173  * It requires to be called with preemption disabled.
174  */
175 static inline void kvmppc_save_guest_fp(struct kvm_vcpu *vcpu)
176 {
177 #ifdef CONFIG_PPC_FPU
178         if (current->thread.regs->msr & MSR_FP)
179                 giveup_fpu(current);
180         current->thread.fp_save_area = NULL;
181 #endif
182 }
183
184 static void kvmppc_vcpu_sync_fpu(struct kvm_vcpu *vcpu)
185 {
186 #if defined(CONFIG_PPC_FPU) && !defined(CONFIG_KVM_BOOKE_HV)
187         /* We always treat the FP bit as enabled from the host
188            perspective, so only need to adjust the shadow MSR */
189         vcpu->arch.shadow_msr &= ~MSR_FP;
190         vcpu->arch.shadow_msr |= vcpu->arch.shared->msr & MSR_FP;
191 #endif
192 }
193
194 /*
195  * Simulate AltiVec unavailable fault to load guest state
196  * from thread to AltiVec unit.
197  * It requires to be called with preemption disabled.
198  */
199 static inline void kvmppc_load_guest_altivec(struct kvm_vcpu *vcpu)
200 {
201 #ifdef CONFIG_ALTIVEC
202         if (cpu_has_feature(CPU_FTR_ALTIVEC)) {
203                 if (!(current->thread.regs->msr & MSR_VEC)) {
204                         enable_kernel_altivec();
205                         load_vr_state(&vcpu->arch.vr);
206                         disable_kernel_altivec();
207                         current->thread.vr_save_area = &vcpu->arch.vr;
208                         current->thread.regs->msr |= MSR_VEC;
209                 }
210         }
211 #endif
212 }
213
214 /*
215  * Save guest vcpu AltiVec state into thread.
216  * It requires to be called with preemption disabled.
217  */
218 static inline void kvmppc_save_guest_altivec(struct kvm_vcpu *vcpu)
219 {
220 #ifdef CONFIG_ALTIVEC
221         if (cpu_has_feature(CPU_FTR_ALTIVEC)) {
222                 if (current->thread.regs->msr & MSR_VEC)
223                         giveup_altivec(current);
224                 current->thread.vr_save_area = NULL;
225         }
226 #endif
227 }
228
229 static void kvmppc_vcpu_sync_debug(struct kvm_vcpu *vcpu)
230 {
231         /* Synchronize guest's desire to get debug interrupts into shadow MSR */
232 #ifndef CONFIG_KVM_BOOKE_HV
233         vcpu->arch.shadow_msr &= ~MSR_DE;
234         vcpu->arch.shadow_msr |= vcpu->arch.shared->msr & MSR_DE;
235 #endif
236
237         /* Force enable debug interrupts when user space wants to debug */
238         if (vcpu->guest_debug) {
239 #ifdef CONFIG_KVM_BOOKE_HV
240                 /*
241                  * Since there is no shadow MSR, sync MSR_DE into the guest
242                  * visible MSR.
243                  */
244                 vcpu->arch.shared->msr |= MSR_DE;
245 #else
246                 vcpu->arch.shadow_msr |= MSR_DE;
247                 vcpu->arch.shared->msr &= ~MSR_DE;
248 #endif
249         }
250 }
251
252 /*
253  * Helper function for "full" MSR writes.  No need to call this if only
254  * EE/CE/ME/DE/RI are changing.
255  */
256 void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr)
257 {
258         u32 old_msr = vcpu->arch.shared->msr;
259
260 #ifdef CONFIG_KVM_BOOKE_HV
261         new_msr |= MSR_GS;
262 #endif
263
264         vcpu->arch.shared->msr = new_msr;
265
266         kvmppc_mmu_msr_notify(vcpu, old_msr);
267         kvmppc_vcpu_sync_spe(vcpu);
268         kvmppc_vcpu_sync_fpu(vcpu);
269         kvmppc_vcpu_sync_debug(vcpu);
270 }
271
272 static void kvmppc_booke_queue_irqprio(struct kvm_vcpu *vcpu,
273                                        unsigned int priority)
274 {
275         trace_kvm_booke_queue_irqprio(vcpu, priority);
276         set_bit(priority, &vcpu->arch.pending_exceptions);
277 }
278
279 void kvmppc_core_queue_dtlb_miss(struct kvm_vcpu *vcpu,
280                                  ulong dear_flags, ulong esr_flags)
281 {
282         vcpu->arch.queued_dear = dear_flags;
283         vcpu->arch.queued_esr = esr_flags;
284         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DTLB_MISS);
285 }
286
287 void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu,
288                                     ulong dear_flags, ulong esr_flags)
289 {
290         vcpu->arch.queued_dear = dear_flags;
291         vcpu->arch.queued_esr = esr_flags;
292         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DATA_STORAGE);
293 }
294
295 void kvmppc_core_queue_itlb_miss(struct kvm_vcpu *vcpu)
296 {
297         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS);
298 }
299
300 void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu, ulong esr_flags)
301 {
302         vcpu->arch.queued_esr = esr_flags;
303         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_INST_STORAGE);
304 }
305
306 static void kvmppc_core_queue_alignment(struct kvm_vcpu *vcpu, ulong dear_flags,
307                                         ulong esr_flags)
308 {
309         vcpu->arch.queued_dear = dear_flags;
310         vcpu->arch.queued_esr = esr_flags;
311         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALIGNMENT);
312 }
313
314 void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong esr_flags)
315 {
316         vcpu->arch.queued_esr = esr_flags;
317         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM);
318 }
319
320 void kvmppc_core_queue_fpunavail(struct kvm_vcpu *vcpu)
321 {
322         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL);
323 }
324
325 #ifdef CONFIG_ALTIVEC
326 void kvmppc_core_queue_vec_unavail(struct kvm_vcpu *vcpu)
327 {
328         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALTIVEC_UNAVAIL);
329 }
330 #endif
331
332 void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
333 {
334         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DECREMENTER);
335 }
336
337 int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
338 {
339         return test_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
340 }
341
342 void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu)
343 {
344         clear_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
345 }
346
347 void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
348                                 struct kvm_interrupt *irq)
349 {
350         unsigned int prio = BOOKE_IRQPRIO_EXTERNAL;
351
352         if (irq->irq == KVM_INTERRUPT_SET_LEVEL)
353                 prio = BOOKE_IRQPRIO_EXTERNAL_LEVEL;
354
355         kvmppc_booke_queue_irqprio(vcpu, prio);
356 }
357
358 void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu)
359 {
360         clear_bit(BOOKE_IRQPRIO_EXTERNAL, &vcpu->arch.pending_exceptions);
361         clear_bit(BOOKE_IRQPRIO_EXTERNAL_LEVEL, &vcpu->arch.pending_exceptions);
362 }
363
364 static void kvmppc_core_queue_watchdog(struct kvm_vcpu *vcpu)
365 {
366         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_WATCHDOG);
367 }
368
369 static void kvmppc_core_dequeue_watchdog(struct kvm_vcpu *vcpu)
370 {
371         clear_bit(BOOKE_IRQPRIO_WATCHDOG, &vcpu->arch.pending_exceptions);
372 }
373
374 void kvmppc_core_queue_debug(struct kvm_vcpu *vcpu)
375 {
376         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DEBUG);
377 }
378
379 void kvmppc_core_dequeue_debug(struct kvm_vcpu *vcpu)
380 {
381         clear_bit(BOOKE_IRQPRIO_DEBUG, &vcpu->arch.pending_exceptions);
382 }
383
384 static void set_guest_srr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
385 {
386         kvmppc_set_srr0(vcpu, srr0);
387         kvmppc_set_srr1(vcpu, srr1);
388 }
389
390 static void set_guest_csrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
391 {
392         vcpu->arch.csrr0 = srr0;
393         vcpu->arch.csrr1 = srr1;
394 }
395
396 static void set_guest_dsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
397 {
398         if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC)) {
399                 vcpu->arch.dsrr0 = srr0;
400                 vcpu->arch.dsrr1 = srr1;
401         } else {
402                 set_guest_csrr(vcpu, srr0, srr1);
403         }
404 }
405
406 static void set_guest_mcsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
407 {
408         vcpu->arch.mcsrr0 = srr0;
409         vcpu->arch.mcsrr1 = srr1;
410 }
411
412 /* Deliver the interrupt of the corresponding priority, if possible. */
413 static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu,
414                                         unsigned int priority)
415 {
416         int allowed = 0;
417         ulong msr_mask = 0;
418         bool update_esr = false, update_dear = false, update_epr = false;
419         ulong crit_raw = vcpu->arch.shared->critical;
420         ulong crit_r1 = kvmppc_get_gpr(vcpu, 1);
421         bool crit;
422         bool keep_irq = false;
423         enum int_class int_class;
424         ulong new_msr = vcpu->arch.shared->msr;
425
426         /* Truncate crit indicators in 32 bit mode */
427         if (!(vcpu->arch.shared->msr & MSR_SF)) {
428                 crit_raw &= 0xffffffff;
429                 crit_r1 &= 0xffffffff;
430         }
431
432         /* Critical section when crit == r1 */
433         crit = (crit_raw == crit_r1);
434         /* ... and we're in supervisor mode */
435         crit = crit && !(vcpu->arch.shared->msr & MSR_PR);
436
437         if (priority == BOOKE_IRQPRIO_EXTERNAL_LEVEL) {
438                 priority = BOOKE_IRQPRIO_EXTERNAL;
439                 keep_irq = true;
440         }
441
442         if ((priority == BOOKE_IRQPRIO_EXTERNAL) && vcpu->arch.epr_flags)
443                 update_epr = true;
444
445         switch (priority) {
446         case BOOKE_IRQPRIO_DTLB_MISS:
447         case BOOKE_IRQPRIO_DATA_STORAGE:
448         case BOOKE_IRQPRIO_ALIGNMENT:
449                 update_dear = true;
450                 fallthrough;
451         case BOOKE_IRQPRIO_INST_STORAGE:
452         case BOOKE_IRQPRIO_PROGRAM:
453                 update_esr = true;
454                 fallthrough;
455         case BOOKE_IRQPRIO_ITLB_MISS:
456         case BOOKE_IRQPRIO_SYSCALL:
457         case BOOKE_IRQPRIO_FP_UNAVAIL:
458 #ifdef CONFIG_SPE_POSSIBLE
459         case BOOKE_IRQPRIO_SPE_UNAVAIL:
460         case BOOKE_IRQPRIO_SPE_FP_DATA:
461         case BOOKE_IRQPRIO_SPE_FP_ROUND:
462 #endif
463 #ifdef CONFIG_ALTIVEC
464         case BOOKE_IRQPRIO_ALTIVEC_UNAVAIL:
465         case BOOKE_IRQPRIO_ALTIVEC_ASSIST:
466 #endif
467         case BOOKE_IRQPRIO_AP_UNAVAIL:
468                 allowed = 1;
469                 msr_mask = MSR_CE | MSR_ME | MSR_DE;
470                 int_class = INT_CLASS_NONCRIT;
471                 break;
472         case BOOKE_IRQPRIO_WATCHDOG:
473         case BOOKE_IRQPRIO_CRITICAL:
474         case BOOKE_IRQPRIO_DBELL_CRIT:
475                 allowed = vcpu->arch.shared->msr & MSR_CE;
476                 allowed = allowed && !crit;
477                 msr_mask = MSR_ME;
478                 int_class = INT_CLASS_CRIT;
479                 break;
480         case BOOKE_IRQPRIO_MACHINE_CHECK:
481                 allowed = vcpu->arch.shared->msr & MSR_ME;
482                 allowed = allowed && !crit;
483                 int_class = INT_CLASS_MC;
484                 break;
485         case BOOKE_IRQPRIO_DECREMENTER:
486         case BOOKE_IRQPRIO_FIT:
487                 keep_irq = true;
488                 fallthrough;
489         case BOOKE_IRQPRIO_EXTERNAL:
490         case BOOKE_IRQPRIO_DBELL:
491                 allowed = vcpu->arch.shared->msr & MSR_EE;
492                 allowed = allowed && !crit;
493                 msr_mask = MSR_CE | MSR_ME | MSR_DE;
494                 int_class = INT_CLASS_NONCRIT;
495                 break;
496         case BOOKE_IRQPRIO_DEBUG:
497                 allowed = vcpu->arch.shared->msr & MSR_DE;
498                 allowed = allowed && !crit;
499                 msr_mask = MSR_ME;
500                 if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC))
501                         int_class = INT_CLASS_DBG;
502                 else
503                         int_class = INT_CLASS_CRIT;
504
505                 break;
506         }
507
508         if (allowed) {
509                 switch (int_class) {
510                 case INT_CLASS_NONCRIT:
511                         set_guest_srr(vcpu, vcpu->arch.regs.nip,
512                                       vcpu->arch.shared->msr);
513                         break;
514                 case INT_CLASS_CRIT:
515                         set_guest_csrr(vcpu, vcpu->arch.regs.nip,
516                                        vcpu->arch.shared->msr);
517                         break;
518                 case INT_CLASS_DBG:
519                         set_guest_dsrr(vcpu, vcpu->arch.regs.nip,
520                                        vcpu->arch.shared->msr);
521                         break;
522                 case INT_CLASS_MC:
523                         set_guest_mcsrr(vcpu, vcpu->arch.regs.nip,
524                                         vcpu->arch.shared->msr);
525                         break;
526                 }
527
528                 vcpu->arch.regs.nip = vcpu->arch.ivpr |
529                                         vcpu->arch.ivor[priority];
530                 if (update_esr)
531                         kvmppc_set_esr(vcpu, vcpu->arch.queued_esr);
532                 if (update_dear)
533                         kvmppc_set_dar(vcpu, vcpu->arch.queued_dear);
534                 if (update_epr) {
535                         if (vcpu->arch.epr_flags & KVMPPC_EPR_USER)
536                                 kvm_make_request(KVM_REQ_EPR_EXIT, vcpu);
537                         else if (vcpu->arch.epr_flags & KVMPPC_EPR_KERNEL) {
538                                 BUG_ON(vcpu->arch.irq_type != KVMPPC_IRQ_MPIC);
539                                 kvmppc_mpic_set_epr(vcpu);
540                         }
541                 }
542
543                 new_msr &= msr_mask;
544 #if defined(CONFIG_64BIT)
545                 if (vcpu->arch.epcr & SPRN_EPCR_ICM)
546                         new_msr |= MSR_CM;
547 #endif
548                 kvmppc_set_msr(vcpu, new_msr);
549
550                 if (!keep_irq)
551                         clear_bit(priority, &vcpu->arch.pending_exceptions);
552         }
553
554 #ifdef CONFIG_KVM_BOOKE_HV
555         /*
556          * If an interrupt is pending but masked, raise a guest doorbell
557          * so that we are notified when the guest enables the relevant
558          * MSR bit.
559          */
560         if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_EE)
561                 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_NONCRIT);
562         if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_CE)
563                 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_CRIT);
564         if (vcpu->arch.pending_exceptions & BOOKE_IRQPRIO_MACHINE_CHECK)
565                 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_MC);
566 #endif
567
568         return allowed;
569 }
570
571 /*
572  * Return the number of jiffies until the next timeout.  If the timeout is
573  * longer than the NEXT_TIMER_MAX_DELTA, then return NEXT_TIMER_MAX_DELTA
574  * because the larger value can break the timer APIs.
575  */
576 static unsigned long watchdog_next_timeout(struct kvm_vcpu *vcpu)
577 {
578         u64 tb, wdt_tb, wdt_ticks = 0;
579         u64 nr_jiffies = 0;
580         u32 period = TCR_GET_WP(vcpu->arch.tcr);
581
582         wdt_tb = 1ULL << (63 - period);
583         tb = get_tb();
584         /*
585          * The watchdog timeout will hapeen when TB bit corresponding
586          * to watchdog will toggle from 0 to 1.
587          */
588         if (tb & wdt_tb)
589                 wdt_ticks = wdt_tb;
590
591         wdt_ticks += wdt_tb - (tb & (wdt_tb - 1));
592
593         /* Convert timebase ticks to jiffies */
594         nr_jiffies = wdt_ticks;
595
596         if (do_div(nr_jiffies, tb_ticks_per_jiffy))
597                 nr_jiffies++;
598
599         return min_t(unsigned long long, nr_jiffies, NEXT_TIMER_MAX_DELTA);
600 }
601
602 static void arm_next_watchdog(struct kvm_vcpu *vcpu)
603 {
604         unsigned long nr_jiffies;
605         unsigned long flags;
606
607         /*
608          * If TSR_ENW and TSR_WIS are not set then no need to exit to
609          * userspace, so clear the KVM_REQ_WATCHDOG request.
610          */
611         if ((vcpu->arch.tsr & (TSR_ENW | TSR_WIS)) != (TSR_ENW | TSR_WIS))
612                 kvm_clear_request(KVM_REQ_WATCHDOG, vcpu);
613
614         spin_lock_irqsave(&vcpu->arch.wdt_lock, flags);
615         nr_jiffies = watchdog_next_timeout(vcpu);
616         /*
617          * If the number of jiffies of watchdog timer >= NEXT_TIMER_MAX_DELTA
618          * then do not run the watchdog timer as this can break timer APIs.
619          */
620         if (nr_jiffies < NEXT_TIMER_MAX_DELTA)
621                 mod_timer(&vcpu->arch.wdt_timer, jiffies + nr_jiffies);
622         else
623                 del_timer(&vcpu->arch.wdt_timer);
624         spin_unlock_irqrestore(&vcpu->arch.wdt_lock, flags);
625 }
626
627 void kvmppc_watchdog_func(struct timer_list *t)
628 {
629         struct kvm_vcpu *vcpu = from_timer(vcpu, t, arch.wdt_timer);
630         u32 tsr, new_tsr;
631         int final;
632
633         do {
634                 new_tsr = tsr = vcpu->arch.tsr;
635                 final = 0;
636
637                 /* Time out event */
638                 if (tsr & TSR_ENW) {
639                         if (tsr & TSR_WIS)
640                                 final = 1;
641                         else
642                                 new_tsr = tsr | TSR_WIS;
643                 } else {
644                         new_tsr = tsr | TSR_ENW;
645                 }
646         } while (cmpxchg(&vcpu->arch.tsr, tsr, new_tsr) != tsr);
647
648         if (new_tsr & TSR_WIS) {
649                 smp_wmb();
650                 kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
651                 kvm_vcpu_kick(vcpu);
652         }
653
654         /*
655          * If this is final watchdog expiry and some action is required
656          * then exit to userspace.
657          */
658         if (final && (vcpu->arch.tcr & TCR_WRC_MASK) &&
659             vcpu->arch.watchdog_enabled) {
660                 smp_wmb();
661                 kvm_make_request(KVM_REQ_WATCHDOG, vcpu);
662                 kvm_vcpu_kick(vcpu);
663         }
664
665         /*
666          * Stop running the watchdog timer after final expiration to
667          * prevent the host from being flooded with timers if the
668          * guest sets a short period.
669          * Timers will resume when TSR/TCR is updated next time.
670          */
671         if (!final)
672                 arm_next_watchdog(vcpu);
673 }
674
675 static void update_timer_ints(struct kvm_vcpu *vcpu)
676 {
677         if ((vcpu->arch.tcr & TCR_DIE) && (vcpu->arch.tsr & TSR_DIS))
678                 kvmppc_core_queue_dec(vcpu);
679         else
680                 kvmppc_core_dequeue_dec(vcpu);
681
682         if ((vcpu->arch.tcr & TCR_WIE) && (vcpu->arch.tsr & TSR_WIS))
683                 kvmppc_core_queue_watchdog(vcpu);
684         else
685                 kvmppc_core_dequeue_watchdog(vcpu);
686 }
687
688 static void kvmppc_core_check_exceptions(struct kvm_vcpu *vcpu)
689 {
690         unsigned long *pending = &vcpu->arch.pending_exceptions;
691         unsigned int priority;
692
693         priority = __ffs(*pending);
694         while (priority < BOOKE_IRQPRIO_MAX) {
695                 if (kvmppc_booke_irqprio_deliver(vcpu, priority))
696                         break;
697
698                 priority = find_next_bit(pending,
699                                          BITS_PER_BYTE * sizeof(*pending),
700                                          priority + 1);
701         }
702
703         /* Tell the guest about our interrupt status */
704         vcpu->arch.shared->int_pending = !!*pending;
705 }
706
707 /* Check pending exceptions and deliver one, if possible. */
708 int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)
709 {
710         int r = 0;
711         WARN_ON_ONCE(!irqs_disabled());
712
713         kvmppc_core_check_exceptions(vcpu);
714
715         if (kvm_request_pending(vcpu)) {
716                 /* Exception delivery raised request; start over */
717                 return 1;
718         }
719
720         if (vcpu->arch.shared->msr & MSR_WE) {
721                 local_irq_enable();
722                 kvm_vcpu_block(vcpu);
723                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
724                 hard_irq_disable();
725
726                 kvmppc_set_exit_type(vcpu, EMULATED_MTMSRWE_EXITS);
727                 r = 1;
728         }
729
730         return r;
731 }
732
733 int kvmppc_core_check_requests(struct kvm_vcpu *vcpu)
734 {
735         int r = 1; /* Indicate we want to get back into the guest */
736
737         if (kvm_check_request(KVM_REQ_PENDING_TIMER, vcpu))
738                 update_timer_ints(vcpu);
739 #if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC)
740         if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
741                 kvmppc_core_flush_tlb(vcpu);
742 #endif
743
744         if (kvm_check_request(KVM_REQ_WATCHDOG, vcpu)) {
745                 vcpu->run->exit_reason = KVM_EXIT_WATCHDOG;
746                 r = 0;
747         }
748
749         if (kvm_check_request(KVM_REQ_EPR_EXIT, vcpu)) {
750                 vcpu->run->epr.epr = 0;
751                 vcpu->arch.epr_needed = true;
752                 vcpu->run->exit_reason = KVM_EXIT_EPR;
753                 r = 0;
754         }
755
756         return r;
757 }
758
759 int kvmppc_vcpu_run(struct kvm_vcpu *vcpu)
760 {
761         int ret, s;
762         struct debug_reg debug;
763
764         if (!vcpu->arch.sane) {
765                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
766                 return -EINVAL;
767         }
768
769         s = kvmppc_prepare_to_enter(vcpu);
770         if (s <= 0) {
771                 ret = s;
772                 goto out;
773         }
774         /* interrupts now hard-disabled */
775
776 #ifdef CONFIG_PPC_FPU
777         /* Save userspace FPU state in stack */
778         enable_kernel_fp();
779
780         /*
781          * Since we can't trap on MSR_FP in GS-mode, we consider the guest
782          * as always using the FPU.
783          */
784         kvmppc_load_guest_fp(vcpu);
785 #endif
786
787 #ifdef CONFIG_ALTIVEC
788         /* Save userspace AltiVec state in stack */
789         if (cpu_has_feature(CPU_FTR_ALTIVEC))
790                 enable_kernel_altivec();
791         /*
792          * Since we can't trap on MSR_VEC in GS-mode, we consider the guest
793          * as always using the AltiVec.
794          */
795         kvmppc_load_guest_altivec(vcpu);
796 #endif
797
798         /* Switch to guest debug context */
799         debug = vcpu->arch.dbg_reg;
800         switch_booke_debug_regs(&debug);
801         debug = current->thread.debug;
802         current->thread.debug = vcpu->arch.dbg_reg;
803
804         vcpu->arch.pgdir = vcpu->kvm->mm->pgd;
805         kvmppc_fix_ee_before_entry();
806
807         ret = __kvmppc_vcpu_run(vcpu);
808
809         /* No need for guest_exit. It's done in handle_exit.
810            We also get here with interrupts enabled. */
811
812         /* Switch back to user space debug context */
813         switch_booke_debug_regs(&debug);
814         current->thread.debug = debug;
815
816 #ifdef CONFIG_PPC_FPU
817         kvmppc_save_guest_fp(vcpu);
818 #endif
819
820 #ifdef CONFIG_ALTIVEC
821         kvmppc_save_guest_altivec(vcpu);
822 #endif
823
824 out:
825         vcpu->mode = OUTSIDE_GUEST_MODE;
826         return ret;
827 }
828
829 static int emulation_exit(struct kvm_vcpu *vcpu)
830 {
831         enum emulation_result er;
832
833         er = kvmppc_emulate_instruction(vcpu);
834         switch (er) {
835         case EMULATE_DONE:
836                 /* don't overwrite subtypes, just account kvm_stats */
837                 kvmppc_account_exit_stat(vcpu, EMULATED_INST_EXITS);
838                 /* Future optimization: only reload non-volatiles if
839                  * they were actually modified by emulation. */
840                 return RESUME_GUEST_NV;
841
842         case EMULATE_AGAIN:
843                 return RESUME_GUEST;
844
845         case EMULATE_FAIL:
846                 printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n",
847                        __func__, vcpu->arch.regs.nip, vcpu->arch.last_inst);
848                 /* For debugging, encode the failing instruction and
849                  * report it to userspace. */
850                 vcpu->run->hw.hardware_exit_reason = ~0ULL << 32;
851                 vcpu->run->hw.hardware_exit_reason |= vcpu->arch.last_inst;
852                 kvmppc_core_queue_program(vcpu, ESR_PIL);
853                 return RESUME_HOST;
854
855         case EMULATE_EXIT_USER:
856                 return RESUME_HOST;
857
858         default:
859                 BUG();
860         }
861 }
862
863 static int kvmppc_handle_debug(struct kvm_vcpu *vcpu)
864 {
865         struct kvm_run *run = vcpu->run;
866         struct debug_reg *dbg_reg = &(vcpu->arch.dbg_reg);
867         u32 dbsr = vcpu->arch.dbsr;
868
869         if (vcpu->guest_debug == 0) {
870                 /*
871                  * Debug resources belong to Guest.
872                  * Imprecise debug event is not injected
873                  */
874                 if (dbsr & DBSR_IDE) {
875                         dbsr &= ~DBSR_IDE;
876                         if (!dbsr)
877                                 return RESUME_GUEST;
878                 }
879
880                 if (dbsr && (vcpu->arch.shared->msr & MSR_DE) &&
881                             (vcpu->arch.dbg_reg.dbcr0 & DBCR0_IDM))
882                         kvmppc_core_queue_debug(vcpu);
883
884                 /* Inject a program interrupt if trap debug is not allowed */
885                 if ((dbsr & DBSR_TIE) && !(vcpu->arch.shared->msr & MSR_DE))
886                         kvmppc_core_queue_program(vcpu, ESR_PTR);
887
888                 return RESUME_GUEST;
889         }
890
891         /*
892          * Debug resource owned by userspace.
893          * Clear guest dbsr (vcpu->arch.dbsr)
894          */
895         vcpu->arch.dbsr = 0;
896         run->debug.arch.status = 0;
897         run->debug.arch.address = vcpu->arch.regs.nip;
898
899         if (dbsr & (DBSR_IAC1 | DBSR_IAC2 | DBSR_IAC3 | DBSR_IAC4)) {
900                 run->debug.arch.status |= KVMPPC_DEBUG_BREAKPOINT;
901         } else {
902                 if (dbsr & (DBSR_DAC1W | DBSR_DAC2W))
903                         run->debug.arch.status |= KVMPPC_DEBUG_WATCH_WRITE;
904                 else if (dbsr & (DBSR_DAC1R | DBSR_DAC2R))
905                         run->debug.arch.status |= KVMPPC_DEBUG_WATCH_READ;
906                 if (dbsr & (DBSR_DAC1R | DBSR_DAC1W))
907                         run->debug.arch.address = dbg_reg->dac1;
908                 else if (dbsr & (DBSR_DAC2R | DBSR_DAC2W))
909                         run->debug.arch.address = dbg_reg->dac2;
910         }
911
912         return RESUME_HOST;
913 }
914
915 static void kvmppc_fill_pt_regs(struct pt_regs *regs)
916 {
917         ulong r1, ip, msr, lr;
918
919         asm("mr %0, 1" : "=r"(r1));
920         asm("mflr %0" : "=r"(lr));
921         asm("mfmsr %0" : "=r"(msr));
922         asm("bl 1f; 1: mflr %0" : "=r"(ip));
923
924         memset(regs, 0, sizeof(*regs));
925         regs->gpr[1] = r1;
926         regs->nip = ip;
927         regs->msr = msr;
928         regs->link = lr;
929 }
930
931 /*
932  * For interrupts needed to be handled by host interrupt handlers,
933  * corresponding host handler are called from here in similar way
934  * (but not exact) as they are called from low level handler
935  * (such as from arch/powerpc/kernel/head_fsl_booke.S).
936  */
937 static void kvmppc_restart_interrupt(struct kvm_vcpu *vcpu,
938                                      unsigned int exit_nr)
939 {
940         struct pt_regs regs;
941
942         switch (exit_nr) {
943         case BOOKE_INTERRUPT_EXTERNAL:
944                 kvmppc_fill_pt_regs(&regs);
945                 do_IRQ(&regs);
946                 break;
947         case BOOKE_INTERRUPT_DECREMENTER:
948                 kvmppc_fill_pt_regs(&regs);
949                 timer_interrupt(&regs);
950                 break;
951 #if defined(CONFIG_PPC_DOORBELL)
952         case BOOKE_INTERRUPT_DOORBELL:
953                 kvmppc_fill_pt_regs(&regs);
954                 doorbell_exception(&regs);
955                 break;
956 #endif
957         case BOOKE_INTERRUPT_MACHINE_CHECK:
958                 /* FIXME */
959                 break;
960         case BOOKE_INTERRUPT_PERFORMANCE_MONITOR:
961                 kvmppc_fill_pt_regs(&regs);
962                 performance_monitor_exception(&regs);
963                 break;
964         case BOOKE_INTERRUPT_WATCHDOG:
965                 kvmppc_fill_pt_regs(&regs);
966 #ifdef CONFIG_BOOKE_WDT
967                 WatchdogException(&regs);
968 #else
969                 unknown_exception(&regs);
970 #endif
971                 break;
972         case BOOKE_INTERRUPT_CRITICAL:
973                 kvmppc_fill_pt_regs(&regs);
974                 unknown_exception(&regs);
975                 break;
976         case BOOKE_INTERRUPT_DEBUG:
977                 /* Save DBSR before preemption is enabled */
978                 vcpu->arch.dbsr = mfspr(SPRN_DBSR);
979                 kvmppc_clear_dbsr();
980                 break;
981         }
982 }
983
984 static int kvmppc_resume_inst_load(struct kvm_vcpu *vcpu,
985                                   enum emulation_result emulated, u32 last_inst)
986 {
987         switch (emulated) {
988         case EMULATE_AGAIN:
989                 return RESUME_GUEST;
990
991         case EMULATE_FAIL:
992                 pr_debug("%s: load instruction from guest address %lx failed\n",
993                        __func__, vcpu->arch.regs.nip);
994                 /* For debugging, encode the failing instruction and
995                  * report it to userspace. */
996                 vcpu->run->hw.hardware_exit_reason = ~0ULL << 32;
997                 vcpu->run->hw.hardware_exit_reason |= last_inst;
998                 kvmppc_core_queue_program(vcpu, ESR_PIL);
999                 return RESUME_HOST;
1000
1001         default:
1002                 BUG();
1003         }
1004 }
1005
1006 /**
1007  * kvmppc_handle_exit
1008  *
1009  * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV)
1010  */
1011 int kvmppc_handle_exit(struct kvm_vcpu *vcpu, unsigned int exit_nr)
1012 {
1013         struct kvm_run *run = vcpu->run;
1014         int r = RESUME_HOST;
1015         int s;
1016         int idx;
1017         u32 last_inst = KVM_INST_FETCH_FAILED;
1018         enum emulation_result emulated = EMULATE_DONE;
1019
1020         /* update before a new last_exit_type is rewritten */
1021         kvmppc_update_timing_stats(vcpu);
1022
1023         /* restart interrupts if they were meant for the host */
1024         kvmppc_restart_interrupt(vcpu, exit_nr);
1025
1026         /*
1027          * get last instruction before being preempted
1028          * TODO: for e6500 check also BOOKE_INTERRUPT_LRAT_ERROR & ESR_DATA
1029          */
1030         switch (exit_nr) {
1031         case BOOKE_INTERRUPT_DATA_STORAGE:
1032         case BOOKE_INTERRUPT_DTLB_MISS:
1033         case BOOKE_INTERRUPT_HV_PRIV:
1034                 emulated = kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst);
1035                 break;
1036         case BOOKE_INTERRUPT_PROGRAM:
1037                 /* SW breakpoints arrive as illegal instructions on HV */
1038                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP)
1039                         emulated = kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst);
1040                 break;
1041         default:
1042                 break;
1043         }
1044
1045         trace_kvm_exit(exit_nr, vcpu);
1046         guest_exit_irqoff();
1047
1048         local_irq_enable();
1049
1050         run->exit_reason = KVM_EXIT_UNKNOWN;
1051         run->ready_for_interrupt_injection = 1;
1052
1053         if (emulated != EMULATE_DONE) {
1054                 r = kvmppc_resume_inst_load(vcpu, emulated, last_inst);
1055                 goto out;
1056         }
1057
1058         switch (exit_nr) {
1059         case BOOKE_INTERRUPT_MACHINE_CHECK:
1060                 printk("MACHINE CHECK: %lx\n", mfspr(SPRN_MCSR));
1061                 kvmppc_dump_vcpu(vcpu);
1062                 /* For debugging, send invalid exit reason to user space */
1063                 run->hw.hardware_exit_reason = ~1ULL << 32;
1064                 run->hw.hardware_exit_reason |= mfspr(SPRN_MCSR);
1065                 r = RESUME_HOST;
1066                 break;
1067
1068         case BOOKE_INTERRUPT_EXTERNAL:
1069                 kvmppc_account_exit(vcpu, EXT_INTR_EXITS);
1070                 r = RESUME_GUEST;
1071                 break;
1072
1073         case BOOKE_INTERRUPT_DECREMENTER:
1074                 kvmppc_account_exit(vcpu, DEC_EXITS);
1075                 r = RESUME_GUEST;
1076                 break;
1077
1078         case BOOKE_INTERRUPT_WATCHDOG:
1079                 r = RESUME_GUEST;
1080                 break;
1081
1082         case BOOKE_INTERRUPT_DOORBELL:
1083                 kvmppc_account_exit(vcpu, DBELL_EXITS);
1084                 r = RESUME_GUEST;
1085                 break;
1086
1087         case BOOKE_INTERRUPT_GUEST_DBELL_CRIT:
1088                 kvmppc_account_exit(vcpu, GDBELL_EXITS);
1089
1090                 /*
1091                  * We are here because there is a pending guest interrupt
1092                  * which could not be delivered as MSR_CE or MSR_ME was not
1093                  * set.  Once we break from here we will retry delivery.
1094                  */
1095                 r = RESUME_GUEST;
1096                 break;
1097
1098         case BOOKE_INTERRUPT_GUEST_DBELL:
1099                 kvmppc_account_exit(vcpu, GDBELL_EXITS);
1100
1101                 /*
1102                  * We are here because there is a pending guest interrupt
1103                  * which could not be delivered as MSR_EE was not set.  Once
1104                  * we break from here we will retry delivery.
1105                  */
1106                 r = RESUME_GUEST;
1107                 break;
1108
1109         case BOOKE_INTERRUPT_PERFORMANCE_MONITOR:
1110                 r = RESUME_GUEST;
1111                 break;
1112
1113         case BOOKE_INTERRUPT_HV_PRIV:
1114                 r = emulation_exit(vcpu);
1115                 break;
1116
1117         case BOOKE_INTERRUPT_PROGRAM:
1118                 if ((vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP) &&
1119                         (last_inst == KVMPPC_INST_SW_BREAKPOINT)) {
1120                         /*
1121                          * We are here because of an SW breakpoint instr,
1122                          * so lets return to host to handle.
1123                          */
1124                         r = kvmppc_handle_debug(vcpu);
1125                         run->exit_reason = KVM_EXIT_DEBUG;
1126                         kvmppc_account_exit(vcpu, DEBUG_EXITS);
1127                         break;
1128                 }
1129
1130                 if (vcpu->arch.shared->msr & (MSR_PR | MSR_GS)) {
1131                         /*
1132                          * Program traps generated by user-level software must
1133                          * be handled by the guest kernel.
1134                          *
1135                          * In GS mode, hypervisor privileged instructions trap
1136                          * on BOOKE_INTERRUPT_HV_PRIV, not here, so these are
1137                          * actual program interrupts, handled by the guest.
1138                          */
1139                         kvmppc_core_queue_program(vcpu, vcpu->arch.fault_esr);
1140                         r = RESUME_GUEST;
1141                         kvmppc_account_exit(vcpu, USR_PR_INST);
1142                         break;
1143                 }
1144
1145                 r = emulation_exit(vcpu);
1146                 break;
1147
1148         case BOOKE_INTERRUPT_FP_UNAVAIL:
1149                 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL);
1150                 kvmppc_account_exit(vcpu, FP_UNAVAIL);
1151                 r = RESUME_GUEST;
1152                 break;
1153
1154 #ifdef CONFIG_SPE
1155         case BOOKE_INTERRUPT_SPE_UNAVAIL: {
1156                 if (vcpu->arch.shared->msr & MSR_SPE)
1157                         kvmppc_vcpu_enable_spe(vcpu);
1158                 else
1159                         kvmppc_booke_queue_irqprio(vcpu,
1160                                                    BOOKE_IRQPRIO_SPE_UNAVAIL);
1161                 r = RESUME_GUEST;
1162                 break;
1163         }
1164
1165         case BOOKE_INTERRUPT_SPE_FP_DATA:
1166                 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_DATA);
1167                 r = RESUME_GUEST;
1168                 break;
1169
1170         case BOOKE_INTERRUPT_SPE_FP_ROUND:
1171                 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_ROUND);
1172                 r = RESUME_GUEST;
1173                 break;
1174 #elif defined(CONFIG_SPE_POSSIBLE)
1175         case BOOKE_INTERRUPT_SPE_UNAVAIL:
1176                 /*
1177                  * Guest wants SPE, but host kernel doesn't support it.  Send
1178                  * an "unimplemented operation" program check to the guest.
1179                  */
1180                 kvmppc_core_queue_program(vcpu, ESR_PUO | ESR_SPV);
1181                 r = RESUME_GUEST;
1182                 break;
1183
1184         /*
1185          * These really should never happen without CONFIG_SPE,
1186          * as we should never enable the real MSR[SPE] in the guest.
1187          */
1188         case BOOKE_INTERRUPT_SPE_FP_DATA:
1189         case BOOKE_INTERRUPT_SPE_FP_ROUND:
1190                 printk(KERN_CRIT "%s: unexpected SPE interrupt %u at %08lx\n",
1191                        __func__, exit_nr, vcpu->arch.regs.nip);
1192                 run->hw.hardware_exit_reason = exit_nr;
1193                 r = RESUME_HOST;
1194                 break;
1195 #endif /* CONFIG_SPE_POSSIBLE */
1196
1197 /*
1198  * On cores with Vector category, KVM is loaded only if CONFIG_ALTIVEC,
1199  * see kvmppc_core_check_processor_compat().
1200  */
1201 #ifdef CONFIG_ALTIVEC
1202         case BOOKE_INTERRUPT_ALTIVEC_UNAVAIL:
1203                 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALTIVEC_UNAVAIL);
1204                 r = RESUME_GUEST;
1205                 break;
1206
1207         case BOOKE_INTERRUPT_ALTIVEC_ASSIST:
1208                 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALTIVEC_ASSIST);
1209                 r = RESUME_GUEST;
1210                 break;
1211 #endif
1212
1213         case BOOKE_INTERRUPT_DATA_STORAGE:
1214                 kvmppc_core_queue_data_storage(vcpu, vcpu->arch.fault_dear,
1215                                                vcpu->arch.fault_esr);
1216                 kvmppc_account_exit(vcpu, DSI_EXITS);
1217                 r = RESUME_GUEST;
1218                 break;
1219
1220         case BOOKE_INTERRUPT_INST_STORAGE:
1221                 kvmppc_core_queue_inst_storage(vcpu, vcpu->arch.fault_esr);
1222                 kvmppc_account_exit(vcpu, ISI_EXITS);
1223                 r = RESUME_GUEST;
1224                 break;
1225
1226         case BOOKE_INTERRUPT_ALIGNMENT:
1227                 kvmppc_core_queue_alignment(vcpu, vcpu->arch.fault_dear,
1228                                             vcpu->arch.fault_esr);
1229                 r = RESUME_GUEST;
1230                 break;
1231
1232 #ifdef CONFIG_KVM_BOOKE_HV
1233         case BOOKE_INTERRUPT_HV_SYSCALL:
1234                 if (!(vcpu->arch.shared->msr & MSR_PR)) {
1235                         kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
1236                 } else {
1237                         /*
1238                          * hcall from guest userspace -- send privileged
1239                          * instruction program check.
1240                          */
1241                         kvmppc_core_queue_program(vcpu, ESR_PPR);
1242                 }
1243
1244                 r = RESUME_GUEST;
1245                 break;
1246 #else
1247         case BOOKE_INTERRUPT_SYSCALL:
1248                 if (!(vcpu->arch.shared->msr & MSR_PR) &&
1249                     (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) {
1250                         /* KVM PV hypercalls */
1251                         kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
1252                         r = RESUME_GUEST;
1253                 } else {
1254                         /* Guest syscalls */
1255                         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SYSCALL);
1256                 }
1257                 kvmppc_account_exit(vcpu, SYSCALL_EXITS);
1258                 r = RESUME_GUEST;
1259                 break;
1260 #endif
1261
1262         case BOOKE_INTERRUPT_DTLB_MISS: {
1263                 unsigned long eaddr = vcpu->arch.fault_dear;
1264                 int gtlb_index;
1265                 gpa_t gpaddr;
1266                 gfn_t gfn;
1267
1268 #ifdef CONFIG_KVM_E500V2
1269                 if (!(vcpu->arch.shared->msr & MSR_PR) &&
1270                     (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) {
1271                         kvmppc_map_magic(vcpu);
1272                         kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
1273                         r = RESUME_GUEST;
1274
1275                         break;
1276                 }
1277 #endif
1278
1279                 /* Check the guest TLB. */
1280                 gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr);
1281                 if (gtlb_index < 0) {
1282                         /* The guest didn't have a mapping for it. */
1283                         kvmppc_core_queue_dtlb_miss(vcpu,
1284                                                     vcpu->arch.fault_dear,
1285                                                     vcpu->arch.fault_esr);
1286                         kvmppc_mmu_dtlb_miss(vcpu);
1287                         kvmppc_account_exit(vcpu, DTLB_REAL_MISS_EXITS);
1288                         r = RESUME_GUEST;
1289                         break;
1290                 }
1291
1292                 idx = srcu_read_lock(&vcpu->kvm->srcu);
1293
1294                 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
1295                 gfn = gpaddr >> PAGE_SHIFT;
1296
1297                 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
1298                         /* The guest TLB had a mapping, but the shadow TLB
1299                          * didn't, and it is RAM. This could be because:
1300                          * a) the entry is mapping the host kernel, or
1301                          * b) the guest used a large mapping which we're faking
1302                          * Either way, we need to satisfy the fault without
1303                          * invoking the guest. */
1304                         kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
1305                         kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
1306                         r = RESUME_GUEST;
1307                 } else {
1308                         /* Guest has mapped and accessed a page which is not
1309                          * actually RAM. */
1310                         vcpu->arch.paddr_accessed = gpaddr;
1311                         vcpu->arch.vaddr_accessed = eaddr;
1312                         r = kvmppc_emulate_mmio(vcpu);
1313                         kvmppc_account_exit(vcpu, MMIO_EXITS);
1314                 }
1315
1316                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1317                 break;
1318         }
1319
1320         case BOOKE_INTERRUPT_ITLB_MISS: {
1321                 unsigned long eaddr = vcpu->arch.regs.nip;
1322                 gpa_t gpaddr;
1323                 gfn_t gfn;
1324                 int gtlb_index;
1325
1326                 r = RESUME_GUEST;
1327
1328                 /* Check the guest TLB. */
1329                 gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr);
1330                 if (gtlb_index < 0) {
1331                         /* The guest didn't have a mapping for it. */
1332                         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS);
1333                         kvmppc_mmu_itlb_miss(vcpu);
1334                         kvmppc_account_exit(vcpu, ITLB_REAL_MISS_EXITS);
1335                         break;
1336                 }
1337
1338                 kvmppc_account_exit(vcpu, ITLB_VIRT_MISS_EXITS);
1339
1340                 idx = srcu_read_lock(&vcpu->kvm->srcu);
1341
1342                 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
1343                 gfn = gpaddr >> PAGE_SHIFT;
1344
1345                 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
1346                         /* The guest TLB had a mapping, but the shadow TLB
1347                          * didn't. This could be because:
1348                          * a) the entry is mapping the host kernel, or
1349                          * b) the guest used a large mapping which we're faking
1350                          * Either way, we need to satisfy the fault without
1351                          * invoking the guest. */
1352                         kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
1353                 } else {
1354                         /* Guest mapped and leaped at non-RAM! */
1355                         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_MACHINE_CHECK);
1356                 }
1357
1358                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1359                 break;
1360         }
1361
1362         case BOOKE_INTERRUPT_DEBUG: {
1363                 r = kvmppc_handle_debug(vcpu);
1364                 if (r == RESUME_HOST)
1365                         run->exit_reason = KVM_EXIT_DEBUG;
1366                 kvmppc_account_exit(vcpu, DEBUG_EXITS);
1367                 break;
1368         }
1369
1370         default:
1371                 printk(KERN_EMERG "exit_nr %d\n", exit_nr);
1372                 BUG();
1373         }
1374
1375 out:
1376         /*
1377          * To avoid clobbering exit_reason, only check for signals if we
1378          * aren't already exiting to userspace for some other reason.
1379          */
1380         if (!(r & RESUME_HOST)) {
1381                 s = kvmppc_prepare_to_enter(vcpu);
1382                 if (s <= 0)
1383                         r = (s << 2) | RESUME_HOST | (r & RESUME_FLAG_NV);
1384                 else {
1385                         /* interrupts now hard-disabled */
1386                         kvmppc_fix_ee_before_entry();
1387                         kvmppc_load_guest_fp(vcpu);
1388                         kvmppc_load_guest_altivec(vcpu);
1389                 }
1390         }
1391
1392         return r;
1393 }
1394
1395 static void kvmppc_set_tsr(struct kvm_vcpu *vcpu, u32 new_tsr)
1396 {
1397         u32 old_tsr = vcpu->arch.tsr;
1398
1399         vcpu->arch.tsr = new_tsr;
1400
1401         if ((old_tsr ^ vcpu->arch.tsr) & (TSR_ENW | TSR_WIS))
1402                 arm_next_watchdog(vcpu);
1403
1404         update_timer_ints(vcpu);
1405 }
1406
1407 int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu)
1408 {
1409         /* setup watchdog timer once */
1410         spin_lock_init(&vcpu->arch.wdt_lock);
1411         timer_setup(&vcpu->arch.wdt_timer, kvmppc_watchdog_func, 0);
1412
1413         /*
1414          * Clear DBSR.MRR to avoid guest debug interrupt as
1415          * this is of host interest
1416          */
1417         mtspr(SPRN_DBSR, DBSR_MRR);
1418         return 0;
1419 }
1420
1421 void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu)
1422 {
1423         del_timer_sync(&vcpu->arch.wdt_timer);
1424 }
1425
1426 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
1427 {
1428         int i;
1429
1430         vcpu_load(vcpu);
1431
1432         regs->pc = vcpu->arch.regs.nip;
1433         regs->cr = kvmppc_get_cr(vcpu);
1434         regs->ctr = vcpu->arch.regs.ctr;
1435         regs->lr = vcpu->arch.regs.link;
1436         regs->xer = kvmppc_get_xer(vcpu);
1437         regs->msr = vcpu->arch.shared->msr;
1438         regs->srr0 = kvmppc_get_srr0(vcpu);
1439         regs->srr1 = kvmppc_get_srr1(vcpu);
1440         regs->pid = vcpu->arch.pid;
1441         regs->sprg0 = kvmppc_get_sprg0(vcpu);
1442         regs->sprg1 = kvmppc_get_sprg1(vcpu);
1443         regs->sprg2 = kvmppc_get_sprg2(vcpu);
1444         regs->sprg3 = kvmppc_get_sprg3(vcpu);
1445         regs->sprg4 = kvmppc_get_sprg4(vcpu);
1446         regs->sprg5 = kvmppc_get_sprg5(vcpu);
1447         regs->sprg6 = kvmppc_get_sprg6(vcpu);
1448         regs->sprg7 = kvmppc_get_sprg7(vcpu);
1449
1450         for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
1451                 regs->gpr[i] = kvmppc_get_gpr(vcpu, i);
1452
1453         vcpu_put(vcpu);
1454         return 0;
1455 }
1456
1457 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
1458 {
1459         int i;
1460
1461         vcpu_load(vcpu);
1462
1463         vcpu->arch.regs.nip = regs->pc;
1464         kvmppc_set_cr(vcpu, regs->cr);
1465         vcpu->arch.regs.ctr = regs->ctr;
1466         vcpu->arch.regs.link = regs->lr;
1467         kvmppc_set_xer(vcpu, regs->xer);
1468         kvmppc_set_msr(vcpu, regs->msr);
1469         kvmppc_set_srr0(vcpu, regs->srr0);
1470         kvmppc_set_srr1(vcpu, regs->srr1);
1471         kvmppc_set_pid(vcpu, regs->pid);
1472         kvmppc_set_sprg0(vcpu, regs->sprg0);
1473         kvmppc_set_sprg1(vcpu, regs->sprg1);
1474         kvmppc_set_sprg2(vcpu, regs->sprg2);
1475         kvmppc_set_sprg3(vcpu, regs->sprg3);
1476         kvmppc_set_sprg4(vcpu, regs->sprg4);
1477         kvmppc_set_sprg5(vcpu, regs->sprg5);
1478         kvmppc_set_sprg6(vcpu, regs->sprg6);
1479         kvmppc_set_sprg7(vcpu, regs->sprg7);
1480
1481         for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
1482                 kvmppc_set_gpr(vcpu, i, regs->gpr[i]);
1483
1484         vcpu_put(vcpu);
1485         return 0;
1486 }
1487
1488 static void get_sregs_base(struct kvm_vcpu *vcpu,
1489                            struct kvm_sregs *sregs)
1490 {
1491         u64 tb = get_tb();
1492
1493         sregs->u.e.features |= KVM_SREGS_E_BASE;
1494
1495         sregs->u.e.csrr0 = vcpu->arch.csrr0;
1496         sregs->u.e.csrr1 = vcpu->arch.csrr1;
1497         sregs->u.e.mcsr = vcpu->arch.mcsr;
1498         sregs->u.e.esr = kvmppc_get_esr(vcpu);
1499         sregs->u.e.dear = kvmppc_get_dar(vcpu);
1500         sregs->u.e.tsr = vcpu->arch.tsr;
1501         sregs->u.e.tcr = vcpu->arch.tcr;
1502         sregs->u.e.dec = kvmppc_get_dec(vcpu, tb);
1503         sregs->u.e.tb = tb;
1504         sregs->u.e.vrsave = vcpu->arch.vrsave;
1505 }
1506
1507 static int set_sregs_base(struct kvm_vcpu *vcpu,
1508                           struct kvm_sregs *sregs)
1509 {
1510         if (!(sregs->u.e.features & KVM_SREGS_E_BASE))
1511                 return 0;
1512
1513         vcpu->arch.csrr0 = sregs->u.e.csrr0;
1514         vcpu->arch.csrr1 = sregs->u.e.csrr1;
1515         vcpu->arch.mcsr = sregs->u.e.mcsr;
1516         kvmppc_set_esr(vcpu, sregs->u.e.esr);
1517         kvmppc_set_dar(vcpu, sregs->u.e.dear);
1518         vcpu->arch.vrsave = sregs->u.e.vrsave;
1519         kvmppc_set_tcr(vcpu, sregs->u.e.tcr);
1520
1521         if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_DEC) {
1522                 vcpu->arch.dec = sregs->u.e.dec;
1523                 kvmppc_emulate_dec(vcpu);
1524         }
1525
1526         if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_TSR)
1527                 kvmppc_set_tsr(vcpu, sregs->u.e.tsr);
1528
1529         return 0;
1530 }
1531
1532 static void get_sregs_arch206(struct kvm_vcpu *vcpu,
1533                               struct kvm_sregs *sregs)
1534 {
1535         sregs->u.e.features |= KVM_SREGS_E_ARCH206;
1536
1537         sregs->u.e.pir = vcpu->vcpu_id;
1538         sregs->u.e.mcsrr0 = vcpu->arch.mcsrr0;
1539         sregs->u.e.mcsrr1 = vcpu->arch.mcsrr1;
1540         sregs->u.e.decar = vcpu->arch.decar;
1541         sregs->u.e.ivpr = vcpu->arch.ivpr;
1542 }
1543
1544 static int set_sregs_arch206(struct kvm_vcpu *vcpu,
1545                              struct kvm_sregs *sregs)
1546 {
1547         if (!(sregs->u.e.features & KVM_SREGS_E_ARCH206))
1548                 return 0;
1549
1550         if (sregs->u.e.pir != vcpu->vcpu_id)
1551                 return -EINVAL;
1552
1553         vcpu->arch.mcsrr0 = sregs->u.e.mcsrr0;
1554         vcpu->arch.mcsrr1 = sregs->u.e.mcsrr1;
1555         vcpu->arch.decar = sregs->u.e.decar;
1556         vcpu->arch.ivpr = sregs->u.e.ivpr;
1557
1558         return 0;
1559 }
1560
1561 int kvmppc_get_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
1562 {
1563         sregs->u.e.features |= KVM_SREGS_E_IVOR;
1564
1565         sregs->u.e.ivor_low[0] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL];
1566         sregs->u.e.ivor_low[1] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK];
1567         sregs->u.e.ivor_low[2] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE];
1568         sregs->u.e.ivor_low[3] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE];
1569         sregs->u.e.ivor_low[4] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL];
1570         sregs->u.e.ivor_low[5] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT];
1571         sregs->u.e.ivor_low[6] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM];
1572         sregs->u.e.ivor_low[7] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL];
1573         sregs->u.e.ivor_low[8] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL];
1574         sregs->u.e.ivor_low[9] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL];
1575         sregs->u.e.ivor_low[10] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER];
1576         sregs->u.e.ivor_low[11] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT];
1577         sregs->u.e.ivor_low[12] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG];
1578         sregs->u.e.ivor_low[13] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS];
1579         sregs->u.e.ivor_low[14] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS];
1580         sregs->u.e.ivor_low[15] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG];
1581         return 0;
1582 }
1583
1584 int kvmppc_set_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
1585 {
1586         if (!(sregs->u.e.features & KVM_SREGS_E_IVOR))
1587                 return 0;
1588
1589         vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = sregs->u.e.ivor_low[0];
1590         vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = sregs->u.e.ivor_low[1];
1591         vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = sregs->u.e.ivor_low[2];
1592         vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = sregs->u.e.ivor_low[3];
1593         vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = sregs->u.e.ivor_low[4];
1594         vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = sregs->u.e.ivor_low[5];
1595         vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = sregs->u.e.ivor_low[6];
1596         vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = sregs->u.e.ivor_low[7];
1597         vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = sregs->u.e.ivor_low[8];
1598         vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = sregs->u.e.ivor_low[9];
1599         vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = sregs->u.e.ivor_low[10];
1600         vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = sregs->u.e.ivor_low[11];
1601         vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = sregs->u.e.ivor_low[12];
1602         vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = sregs->u.e.ivor_low[13];
1603         vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = sregs->u.e.ivor_low[14];
1604         vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = sregs->u.e.ivor_low[15];
1605
1606         return 0;
1607 }
1608
1609 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
1610                                   struct kvm_sregs *sregs)
1611 {
1612         int ret;
1613
1614         vcpu_load(vcpu);
1615
1616         sregs->pvr = vcpu->arch.pvr;
1617
1618         get_sregs_base(vcpu, sregs);
1619         get_sregs_arch206(vcpu, sregs);
1620         ret = vcpu->kvm->arch.kvm_ops->get_sregs(vcpu, sregs);
1621
1622         vcpu_put(vcpu);
1623         return ret;
1624 }
1625
1626 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
1627                                   struct kvm_sregs *sregs)
1628 {
1629         int ret = -EINVAL;
1630
1631         vcpu_load(vcpu);
1632         if (vcpu->arch.pvr != sregs->pvr)
1633                 goto out;
1634
1635         ret = set_sregs_base(vcpu, sregs);
1636         if (ret < 0)
1637                 goto out;
1638
1639         ret = set_sregs_arch206(vcpu, sregs);
1640         if (ret < 0)
1641                 goto out;
1642
1643         ret = vcpu->kvm->arch.kvm_ops->set_sregs(vcpu, sregs);
1644
1645 out:
1646         vcpu_put(vcpu);
1647         return ret;
1648 }
1649
1650 int kvmppc_get_one_reg(struct kvm_vcpu *vcpu, u64 id,
1651                         union kvmppc_one_reg *val)
1652 {
1653         int r = 0;
1654
1655         switch (id) {
1656         case KVM_REG_PPC_IAC1:
1657                 *val = get_reg_val(id, vcpu->arch.dbg_reg.iac1);
1658                 break;
1659         case KVM_REG_PPC_IAC2:
1660                 *val = get_reg_val(id, vcpu->arch.dbg_reg.iac2);
1661                 break;
1662 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
1663         case KVM_REG_PPC_IAC3:
1664                 *val = get_reg_val(id, vcpu->arch.dbg_reg.iac3);
1665                 break;
1666         case KVM_REG_PPC_IAC4:
1667                 *val = get_reg_val(id, vcpu->arch.dbg_reg.iac4);
1668                 break;
1669 #endif
1670         case KVM_REG_PPC_DAC1:
1671                 *val = get_reg_val(id, vcpu->arch.dbg_reg.dac1);
1672                 break;
1673         case KVM_REG_PPC_DAC2:
1674                 *val = get_reg_val(id, vcpu->arch.dbg_reg.dac2);
1675                 break;
1676         case KVM_REG_PPC_EPR: {
1677                 u32 epr = kvmppc_get_epr(vcpu);
1678                 *val = get_reg_val(id, epr);
1679                 break;
1680         }
1681 #if defined(CONFIG_64BIT)
1682         case KVM_REG_PPC_EPCR:
1683                 *val = get_reg_val(id, vcpu->arch.epcr);
1684                 break;
1685 #endif
1686         case KVM_REG_PPC_TCR:
1687                 *val = get_reg_val(id, vcpu->arch.tcr);
1688                 break;
1689         case KVM_REG_PPC_TSR:
1690                 *val = get_reg_val(id, vcpu->arch.tsr);
1691                 break;
1692         case KVM_REG_PPC_DEBUG_INST:
1693                 *val = get_reg_val(id, KVMPPC_INST_SW_BREAKPOINT);
1694                 break;
1695         case KVM_REG_PPC_VRSAVE:
1696                 *val = get_reg_val(id, vcpu->arch.vrsave);
1697                 break;
1698         default:
1699                 r = vcpu->kvm->arch.kvm_ops->get_one_reg(vcpu, id, val);
1700                 break;
1701         }
1702
1703         return r;
1704 }
1705
1706 int kvmppc_set_one_reg(struct kvm_vcpu *vcpu, u64 id,
1707                         union kvmppc_one_reg *val)
1708 {
1709         int r = 0;
1710
1711         switch (id) {
1712         case KVM_REG_PPC_IAC1:
1713                 vcpu->arch.dbg_reg.iac1 = set_reg_val(id, *val);
1714                 break;
1715         case KVM_REG_PPC_IAC2:
1716                 vcpu->arch.dbg_reg.iac2 = set_reg_val(id, *val);
1717                 break;
1718 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
1719         case KVM_REG_PPC_IAC3:
1720                 vcpu->arch.dbg_reg.iac3 = set_reg_val(id, *val);
1721                 break;
1722         case KVM_REG_PPC_IAC4:
1723                 vcpu->arch.dbg_reg.iac4 = set_reg_val(id, *val);
1724                 break;
1725 #endif
1726         case KVM_REG_PPC_DAC1:
1727                 vcpu->arch.dbg_reg.dac1 = set_reg_val(id, *val);
1728                 break;
1729         case KVM_REG_PPC_DAC2:
1730                 vcpu->arch.dbg_reg.dac2 = set_reg_val(id, *val);
1731                 break;
1732         case KVM_REG_PPC_EPR: {
1733                 u32 new_epr = set_reg_val(id, *val);
1734                 kvmppc_set_epr(vcpu, new_epr);
1735                 break;
1736         }
1737 #if defined(CONFIG_64BIT)
1738         case KVM_REG_PPC_EPCR: {
1739                 u32 new_epcr = set_reg_val(id, *val);
1740                 kvmppc_set_epcr(vcpu, new_epcr);
1741                 break;
1742         }
1743 #endif
1744         case KVM_REG_PPC_OR_TSR: {
1745                 u32 tsr_bits = set_reg_val(id, *val);
1746                 kvmppc_set_tsr_bits(vcpu, tsr_bits);
1747                 break;
1748         }
1749         case KVM_REG_PPC_CLEAR_TSR: {
1750                 u32 tsr_bits = set_reg_val(id, *val);
1751                 kvmppc_clr_tsr_bits(vcpu, tsr_bits);
1752                 break;
1753         }
1754         case KVM_REG_PPC_TSR: {
1755                 u32 tsr = set_reg_val(id, *val);
1756                 kvmppc_set_tsr(vcpu, tsr);
1757                 break;
1758         }
1759         case KVM_REG_PPC_TCR: {
1760                 u32 tcr = set_reg_val(id, *val);
1761                 kvmppc_set_tcr(vcpu, tcr);
1762                 break;
1763         }
1764         case KVM_REG_PPC_VRSAVE:
1765                 vcpu->arch.vrsave = set_reg_val(id, *val);
1766                 break;
1767         default:
1768                 r = vcpu->kvm->arch.kvm_ops->set_one_reg(vcpu, id, val);
1769                 break;
1770         }
1771
1772         return r;
1773 }
1774
1775 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
1776 {
1777         return -EOPNOTSUPP;
1778 }
1779
1780 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
1781 {
1782         return -EOPNOTSUPP;
1783 }
1784
1785 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
1786                                   struct kvm_translation *tr)
1787 {
1788         int r;
1789
1790         vcpu_load(vcpu);
1791         r = kvmppc_core_vcpu_translate(vcpu, tr);
1792         vcpu_put(vcpu);
1793         return r;
1794 }
1795
1796 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
1797 {
1798
1799 }
1800
1801 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
1802 {
1803         return -EOPNOTSUPP;
1804 }
1805
1806 void kvmppc_core_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
1807 {
1808 }
1809
1810 int kvmppc_core_prepare_memory_region(struct kvm *kvm,
1811                                       struct kvm_memory_slot *memslot,
1812                                       const struct kvm_userspace_memory_region *mem,
1813                                       enum kvm_mr_change change)
1814 {
1815         return 0;
1816 }
1817
1818 void kvmppc_core_commit_memory_region(struct kvm *kvm,
1819                                 const struct kvm_userspace_memory_region *mem,
1820                                 const struct kvm_memory_slot *old,
1821                                 const struct kvm_memory_slot *new,
1822                                 enum kvm_mr_change change)
1823 {
1824 }
1825
1826 void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot)
1827 {
1828 }
1829
1830 void kvmppc_set_epcr(struct kvm_vcpu *vcpu, u32 new_epcr)
1831 {
1832 #if defined(CONFIG_64BIT)
1833         vcpu->arch.epcr = new_epcr;
1834 #ifdef CONFIG_KVM_BOOKE_HV
1835         vcpu->arch.shadow_epcr &= ~SPRN_EPCR_GICM;
1836         if (vcpu->arch.epcr  & SPRN_EPCR_ICM)
1837                 vcpu->arch.shadow_epcr |= SPRN_EPCR_GICM;
1838 #endif
1839 #endif
1840 }
1841
1842 void kvmppc_set_tcr(struct kvm_vcpu *vcpu, u32 new_tcr)
1843 {
1844         vcpu->arch.tcr = new_tcr;
1845         arm_next_watchdog(vcpu);
1846         update_timer_ints(vcpu);
1847 }
1848
1849 void kvmppc_set_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits)
1850 {
1851         set_bits(tsr_bits, &vcpu->arch.tsr);
1852         smp_wmb();
1853         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1854         kvm_vcpu_kick(vcpu);
1855 }
1856
1857 void kvmppc_clr_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits)
1858 {
1859         clear_bits(tsr_bits, &vcpu->arch.tsr);
1860
1861         /*
1862          * We may have stopped the watchdog due to
1863          * being stuck on final expiration.
1864          */
1865         if (tsr_bits & (TSR_ENW | TSR_WIS))
1866                 arm_next_watchdog(vcpu);
1867
1868         update_timer_ints(vcpu);
1869 }
1870
1871 void kvmppc_decrementer_func(struct kvm_vcpu *vcpu)
1872 {
1873         if (vcpu->arch.tcr & TCR_ARE) {
1874                 vcpu->arch.dec = vcpu->arch.decar;
1875                 kvmppc_emulate_dec(vcpu);
1876         }
1877
1878         kvmppc_set_tsr_bits(vcpu, TSR_DIS);
1879 }
1880
1881 static int kvmppc_booke_add_breakpoint(struct debug_reg *dbg_reg,
1882                                        uint64_t addr, int index)
1883 {
1884         switch (index) {
1885         case 0:
1886                 dbg_reg->dbcr0 |= DBCR0_IAC1;
1887                 dbg_reg->iac1 = addr;
1888                 break;
1889         case 1:
1890                 dbg_reg->dbcr0 |= DBCR0_IAC2;
1891                 dbg_reg->iac2 = addr;
1892                 break;
1893 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
1894         case 2:
1895                 dbg_reg->dbcr0 |= DBCR0_IAC3;
1896                 dbg_reg->iac3 = addr;
1897                 break;
1898         case 3:
1899                 dbg_reg->dbcr0 |= DBCR0_IAC4;
1900                 dbg_reg->iac4 = addr;
1901                 break;
1902 #endif
1903         default:
1904                 return -EINVAL;
1905         }
1906
1907         dbg_reg->dbcr0 |= DBCR0_IDM;
1908         return 0;
1909 }
1910
1911 static int kvmppc_booke_add_watchpoint(struct debug_reg *dbg_reg, uint64_t addr,
1912                                        int type, int index)
1913 {
1914         switch (index) {
1915         case 0:
1916                 if (type & KVMPPC_DEBUG_WATCH_READ)
1917                         dbg_reg->dbcr0 |= DBCR0_DAC1R;
1918                 if (type & KVMPPC_DEBUG_WATCH_WRITE)
1919                         dbg_reg->dbcr0 |= DBCR0_DAC1W;
1920                 dbg_reg->dac1 = addr;
1921                 break;
1922         case 1:
1923                 if (type & KVMPPC_DEBUG_WATCH_READ)
1924                         dbg_reg->dbcr0 |= DBCR0_DAC2R;
1925                 if (type & KVMPPC_DEBUG_WATCH_WRITE)
1926                         dbg_reg->dbcr0 |= DBCR0_DAC2W;
1927                 dbg_reg->dac2 = addr;
1928                 break;
1929         default:
1930                 return -EINVAL;
1931         }
1932
1933         dbg_reg->dbcr0 |= DBCR0_IDM;
1934         return 0;
1935 }
1936 void kvm_guest_protect_msr(struct kvm_vcpu *vcpu, ulong prot_bitmap, bool set)
1937 {
1938         /* XXX: Add similar MSR protection for BookE-PR */
1939 #ifdef CONFIG_KVM_BOOKE_HV
1940         BUG_ON(prot_bitmap & ~(MSRP_UCLEP | MSRP_DEP | MSRP_PMMP));
1941         if (set) {
1942                 if (prot_bitmap & MSR_UCLE)
1943                         vcpu->arch.shadow_msrp |= MSRP_UCLEP;
1944                 if (prot_bitmap & MSR_DE)
1945                         vcpu->arch.shadow_msrp |= MSRP_DEP;
1946                 if (prot_bitmap & MSR_PMM)
1947                         vcpu->arch.shadow_msrp |= MSRP_PMMP;
1948         } else {
1949                 if (prot_bitmap & MSR_UCLE)
1950                         vcpu->arch.shadow_msrp &= ~MSRP_UCLEP;
1951                 if (prot_bitmap & MSR_DE)
1952                         vcpu->arch.shadow_msrp &= ~MSRP_DEP;
1953                 if (prot_bitmap & MSR_PMM)
1954                         vcpu->arch.shadow_msrp &= ~MSRP_PMMP;
1955         }
1956 #endif
1957 }
1958
1959 int kvmppc_xlate(struct kvm_vcpu *vcpu, ulong eaddr, enum xlate_instdata xlid,
1960                  enum xlate_readwrite xlrw, struct kvmppc_pte *pte)
1961 {
1962         int gtlb_index;
1963         gpa_t gpaddr;
1964
1965 #ifdef CONFIG_KVM_E500V2
1966         if (!(vcpu->arch.shared->msr & MSR_PR) &&
1967             (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) {
1968                 pte->eaddr = eaddr;
1969                 pte->raddr = (vcpu->arch.magic_page_pa & PAGE_MASK) |
1970                              (eaddr & ~PAGE_MASK);
1971                 pte->vpage = eaddr >> PAGE_SHIFT;
1972                 pte->may_read = true;
1973                 pte->may_write = true;
1974                 pte->may_execute = true;
1975
1976                 return 0;
1977         }
1978 #endif
1979
1980         /* Check the guest TLB. */
1981         switch (xlid) {
1982         case XLATE_INST:
1983                 gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr);
1984                 break;
1985         case XLATE_DATA:
1986                 gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr);
1987                 break;
1988         default:
1989                 BUG();
1990         }
1991
1992         /* Do we have a TLB entry at all? */
1993         if (gtlb_index < 0)
1994                 return -ENOENT;
1995
1996         gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
1997
1998         pte->eaddr = eaddr;
1999         pte->raddr = (gpaddr & PAGE_MASK) | (eaddr & ~PAGE_MASK);
2000         pte->vpage = eaddr >> PAGE_SHIFT;
2001
2002         /* XXX read permissions from the guest TLB */
2003         pte->may_read = true;
2004         pte->may_write = true;
2005         pte->may_execute = true;
2006
2007         return 0;
2008 }
2009
2010 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
2011                                          struct kvm_guest_debug *dbg)
2012 {
2013         struct debug_reg *dbg_reg;
2014         int n, b = 0, w = 0;
2015         int ret = 0;
2016
2017         vcpu_load(vcpu);
2018
2019         if (!(dbg->control & KVM_GUESTDBG_ENABLE)) {
2020                 vcpu->arch.dbg_reg.dbcr0 = 0;
2021                 vcpu->guest_debug = 0;
2022                 kvm_guest_protect_msr(vcpu, MSR_DE, false);
2023                 goto out;
2024         }
2025
2026         kvm_guest_protect_msr(vcpu, MSR_DE, true);
2027         vcpu->guest_debug = dbg->control;
2028         vcpu->arch.dbg_reg.dbcr0 = 0;
2029
2030         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
2031                 vcpu->arch.dbg_reg.dbcr0 |= DBCR0_IDM | DBCR0_IC;
2032
2033         /* Code below handles only HW breakpoints */
2034         dbg_reg = &(vcpu->arch.dbg_reg);
2035
2036 #ifdef CONFIG_KVM_BOOKE_HV
2037         /*
2038          * On BookE-HV (e500mc) the guest is always executed with MSR.GS=1
2039          * DBCR1 and DBCR2 are set to trigger debug events when MSR.PR is 0
2040          */
2041         dbg_reg->dbcr1 = 0;
2042         dbg_reg->dbcr2 = 0;
2043 #else
2044         /*
2045          * On BookE-PR (e500v2) the guest is always executed with MSR.PR=1
2046          * We set DBCR1 and DBCR2 to only trigger debug events when MSR.PR
2047          * is set.
2048          */
2049         dbg_reg->dbcr1 = DBCR1_IAC1US | DBCR1_IAC2US | DBCR1_IAC3US |
2050                           DBCR1_IAC4US;
2051         dbg_reg->dbcr2 = DBCR2_DAC1US | DBCR2_DAC2US;
2052 #endif
2053
2054         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
2055                 goto out;
2056
2057         ret = -EINVAL;
2058         for (n = 0; n < (KVMPPC_BOOKE_IAC_NUM + KVMPPC_BOOKE_DAC_NUM); n++) {
2059                 uint64_t addr = dbg->arch.bp[n].addr;
2060                 uint32_t type = dbg->arch.bp[n].type;
2061
2062                 if (type == KVMPPC_DEBUG_NONE)
2063                         continue;
2064
2065                 if (type & ~(KVMPPC_DEBUG_WATCH_READ |
2066                              KVMPPC_DEBUG_WATCH_WRITE |
2067                              KVMPPC_DEBUG_BREAKPOINT))
2068                         goto out;
2069
2070                 if (type & KVMPPC_DEBUG_BREAKPOINT) {
2071                         /* Setting H/W breakpoint */
2072                         if (kvmppc_booke_add_breakpoint(dbg_reg, addr, b++))
2073                                 goto out;
2074                 } else {
2075                         /* Setting H/W watchpoint */
2076                         if (kvmppc_booke_add_watchpoint(dbg_reg, addr,
2077                                                         type, w++))
2078                                 goto out;
2079                 }
2080         }
2081
2082         ret = 0;
2083 out:
2084         vcpu_put(vcpu);
2085         return ret;
2086 }
2087
2088 void kvmppc_booke_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2089 {
2090         vcpu->cpu = smp_processor_id();
2091         current->thread.kvm_vcpu = vcpu;
2092 }
2093
2094 void kvmppc_booke_vcpu_put(struct kvm_vcpu *vcpu)
2095 {
2096         current->thread.kvm_vcpu = NULL;
2097         vcpu->cpu = -1;
2098
2099         /* Clear pending debug event in DBSR */
2100         kvmppc_clear_dbsr();
2101 }
2102
2103 int kvmppc_core_init_vm(struct kvm *kvm)
2104 {
2105         return kvm->arch.kvm_ops->init_vm(kvm);
2106 }
2107
2108 int kvmppc_core_vcpu_create(struct kvm_vcpu *vcpu)
2109 {
2110         int i;
2111         int r;
2112
2113         r = vcpu->kvm->arch.kvm_ops->vcpu_create(vcpu);
2114         if (r)
2115                 return r;
2116
2117         /* Initial guest state: 16MB mapping 0 -> 0, PC = 0, MSR = 0, R1 = 16MB */
2118         vcpu->arch.regs.nip = 0;
2119         vcpu->arch.shared->pir = vcpu->vcpu_id;
2120         kvmppc_set_gpr(vcpu, 1, (16<<20) - 8); /* -8 for the callee-save LR slot */
2121         kvmppc_set_msr(vcpu, 0);
2122
2123 #ifndef CONFIG_KVM_BOOKE_HV
2124         vcpu->arch.shadow_msr = MSR_USER | MSR_IS | MSR_DS;
2125         vcpu->arch.shadow_pid = 1;
2126         vcpu->arch.shared->msr = 0;
2127 #endif
2128
2129         /* Eye-catching numbers so we know if the guest takes an interrupt
2130          * before it's programmed its own IVPR/IVORs. */
2131         vcpu->arch.ivpr = 0x55550000;
2132         for (i = 0; i < BOOKE_IRQPRIO_MAX; i++)
2133                 vcpu->arch.ivor[i] = 0x7700 | i * 4;
2134
2135         kvmppc_init_timing_stats(vcpu);
2136
2137         r = kvmppc_core_vcpu_setup(vcpu);
2138         if (r)
2139                 vcpu->kvm->arch.kvm_ops->vcpu_free(vcpu);
2140         kvmppc_sanity_check(vcpu);
2141         return r;
2142 }
2143
2144 void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu)
2145 {
2146         vcpu->kvm->arch.kvm_ops->vcpu_free(vcpu);
2147 }
2148
2149 void kvmppc_core_destroy_vm(struct kvm *kvm)
2150 {
2151         kvm->arch.kvm_ops->destroy_vm(kvm);
2152 }
2153
2154 void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2155 {
2156         vcpu->kvm->arch.kvm_ops->vcpu_load(vcpu, cpu);
2157 }
2158
2159 void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu)
2160 {
2161         vcpu->kvm->arch.kvm_ops->vcpu_put(vcpu);
2162 }
2163
2164 int __init kvmppc_booke_init(void)
2165 {
2166 #ifndef CONFIG_KVM_BOOKE_HV
2167         unsigned long ivor[16];
2168         unsigned long *handler = kvmppc_booke_handler_addr;
2169         unsigned long max_ivor = 0;
2170         unsigned long handler_len;
2171         int i;
2172
2173         /* We install our own exception handlers by hijacking IVPR. IVPR must
2174          * be 16-bit aligned, so we need a 64KB allocation. */
2175         kvmppc_booke_handlers = __get_free_pages(GFP_KERNEL | __GFP_ZERO,
2176                                                  VCPU_SIZE_ORDER);
2177         if (!kvmppc_booke_handlers)
2178                 return -ENOMEM;
2179
2180         /* XXX make sure our handlers are smaller than Linux's */
2181
2182         /* Copy our interrupt handlers to match host IVORs. That way we don't
2183          * have to swap the IVORs on every guest/host transition. */
2184         ivor[0] = mfspr(SPRN_IVOR0);
2185         ivor[1] = mfspr(SPRN_IVOR1);
2186         ivor[2] = mfspr(SPRN_IVOR2);
2187         ivor[3] = mfspr(SPRN_IVOR3);
2188         ivor[4] = mfspr(SPRN_IVOR4);
2189         ivor[5] = mfspr(SPRN_IVOR5);
2190         ivor[6] = mfspr(SPRN_IVOR6);
2191         ivor[7] = mfspr(SPRN_IVOR7);
2192         ivor[8] = mfspr(SPRN_IVOR8);
2193         ivor[9] = mfspr(SPRN_IVOR9);
2194         ivor[10] = mfspr(SPRN_IVOR10);
2195         ivor[11] = mfspr(SPRN_IVOR11);
2196         ivor[12] = mfspr(SPRN_IVOR12);
2197         ivor[13] = mfspr(SPRN_IVOR13);
2198         ivor[14] = mfspr(SPRN_IVOR14);
2199         ivor[15] = mfspr(SPRN_IVOR15);
2200
2201         for (i = 0; i < 16; i++) {
2202                 if (ivor[i] > max_ivor)
2203                         max_ivor = i;
2204
2205                 handler_len = handler[i + 1] - handler[i];
2206                 memcpy((void *)kvmppc_booke_handlers + ivor[i],
2207                        (void *)handler[i], handler_len);
2208         }
2209
2210         handler_len = handler[max_ivor + 1] - handler[max_ivor];
2211         flush_icache_range(kvmppc_booke_handlers, kvmppc_booke_handlers +
2212                            ivor[max_ivor] + handler_len);
2213 #endif /* !BOOKE_HV */
2214         return 0;
2215 }
2216
2217 void __exit kvmppc_booke_exit(void)
2218 {
2219         free_pages(kvmppc_booke_handlers, VCPU_SIZE_ORDER);
2220         kvm_exit();
2221 }