1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Common boot and setup code for both 32-bit and 64-bit.
4 * Extracted from arch/powerpc/kernel/setup_64.c.
6 * Copyright (C) 2001 PPC64 Team, IBM Corp
11 #include <linux/export.h>
12 #include <linux/panic_notifier.h>
13 #include <linux/string.h>
14 #include <linux/sched.h>
15 #include <linux/init.h>
16 #include <linux/kernel.h>
17 #include <linux/reboot.h>
18 #include <linux/delay.h>
19 #include <linux/initrd.h>
20 #include <linux/platform_device.h>
21 #include <linux/seq_file.h>
22 #include <linux/ioport.h>
23 #include <linux/console.h>
24 #include <linux/screen_info.h>
25 #include <linux/root_dev.h>
26 #include <linux/cpu.h>
27 #include <linux/unistd.h>
28 #include <linux/serial.h>
29 #include <linux/serial_8250.h>
30 #include <linux/percpu.h>
31 #include <linux/memblock.h>
32 #include <linux/of_irq.h>
33 #include <linux/of_fdt.h>
34 #include <linux/of_platform.h>
35 #include <linux/hugetlb.h>
36 #include <linux/pgtable.h>
39 #include <asm/processor.h>
40 #include <asm/vdso_datapage.h>
43 #include <asm/machdep.h>
45 #include <asm/cputable.h>
46 #include <asm/sections.h>
47 #include <asm/firmware.h>
48 #include <asm/btext.h>
49 #include <asm/nvram.h>
50 #include <asm/setup.h>
52 #include <asm/iommu.h>
53 #include <asm/serial.h>
54 #include <asm/cache.h>
58 #include <asm/cputhreads.h>
59 #include <mm/mmu_decl.h>
60 #include <asm/fadump.h>
62 #include <asm/hugetlb.h>
63 #include <asm/livepatch.h>
64 #include <asm/mmu_context.h>
65 #include <asm/cpu_has_feature.h>
66 #include <asm/kasan.h>
72 #define DBG(fmt...) udbg_printf(fmt)
77 /* The main machine-dep calls structure
79 struct machdep_calls ppc_md;
80 EXPORT_SYMBOL(ppc_md);
81 struct machdep_calls *machine_id;
82 EXPORT_SYMBOL(machine_id);
85 EXPORT_SYMBOL_GPL(boot_cpuid);
88 * These are used in binfmt_elf.c to put aux entries on the stack
89 * for each elf executable being started.
95 * This still seems to be needed... -- paulus
97 struct screen_info screen_info = {
100 .orig_video_cols = 80,
101 .orig_video_lines = 25,
102 .orig_video_isVGA = 1,
103 .orig_video_points = 16
105 #if defined(CONFIG_FB_VGA16_MODULE)
106 EXPORT_SYMBOL(screen_info);
109 /* Variables required to store legacy IO irq routing */
110 int of_i8042_kbd_irq;
111 EXPORT_SYMBOL_GPL(of_i8042_kbd_irq);
112 int of_i8042_aux_irq;
113 EXPORT_SYMBOL_GPL(of_i8042_aux_irq);
115 #ifdef __DO_IRQ_CANON
116 /* XXX should go elsewhere eventually */
117 int ppc_do_canonicalize_irqs;
118 EXPORT_SYMBOL(ppc_do_canonicalize_irqs);
121 #ifdef CONFIG_CRASH_CORE
122 /* This keeps a track of which one is the crashing cpu. */
123 int crashing_cpu = -1;
126 /* also used by kexec */
127 void machine_shutdown(void)
130 * if fadump is active, cleanup the fadump registration before we
135 if (ppc_md.machine_shutdown)
136 ppc_md.machine_shutdown();
139 static void machine_hang(void)
141 pr_emerg("System Halted, OK to turn off power\n");
147 void machine_restart(char *cmd)
155 do_kernel_restart(cmd);
161 void machine_power_off(void)
164 do_kernel_power_off();
168 /* Used by the G5 thermal driver */
169 EXPORT_SYMBOL_GPL(machine_power_off);
171 void (*pm_power_off)(void);
172 EXPORT_SYMBOL_GPL(pm_power_off);
174 #ifdef CONFIG_ARCH_RANDOM
175 bool __must_check arch_get_random_seed_long(unsigned long *v)
177 if (ppc_md.get_random_seed)
178 return ppc_md.get_random_seed(v);
182 EXPORT_SYMBOL(arch_get_random_seed_long);
186 void machine_halt(void)
197 DEFINE_PER_CPU(unsigned int, cpu_pvr);
200 static void show_cpuinfo_summary(struct seq_file *m)
202 struct device_node *root;
203 const char *model = NULL;
204 unsigned long bogosum = 0;
207 if (IS_ENABLED(CONFIG_SMP) && IS_ENABLED(CONFIG_PPC32)) {
208 for_each_online_cpu(i)
209 bogosum += loops_per_jiffy;
210 seq_printf(m, "total bogomips\t: %lu.%02lu\n",
211 bogosum / (500000 / HZ), bogosum / (5000 / HZ) % 100);
213 seq_printf(m, "timebase\t: %lu\n", ppc_tb_freq);
215 seq_printf(m, "platform\t: %s\n", ppc_md.name);
216 root = of_find_node_by_path("/");
218 model = of_get_property(root, "model", NULL);
220 seq_printf(m, "model\t\t: %s\n", model);
223 if (ppc_md.show_cpuinfo != NULL)
224 ppc_md.show_cpuinfo(m);
226 /* Display the amount of memory */
227 if (IS_ENABLED(CONFIG_PPC32))
228 seq_printf(m, "Memory\t\t: %d MB\n",
229 (unsigned int)(total_memory / (1024 * 1024)));
232 static int show_cpuinfo(struct seq_file *m, void *v)
234 unsigned long cpu_id = (unsigned long)v - 1;
236 unsigned long proc_freq;
241 pvr = per_cpu(cpu_pvr, cpu_id);
243 pvr = mfspr(SPRN_PVR);
245 maj = (pvr >> 8) & 0xFF;
248 seq_printf(m, "processor\t: %lu\ncpu\t\t: ", cpu_id);
250 if (cur_cpu_spec->pvr_mask && cur_cpu_spec->cpu_name)
251 seq_puts(m, cur_cpu_spec->cpu_name);
253 seq_printf(m, "unknown (%08x)", pvr);
255 if (cpu_has_feature(CPU_FTR_ALTIVEC))
256 seq_puts(m, ", altivec supported");
261 if (cpu_has_feature(CPU_FTR_TAU)) {
262 if (IS_ENABLED(CONFIG_TAU_AVERAGE)) {
263 /* more straightforward, but potentially misleading */
264 seq_printf(m, "temperature \t: %u C (uncalibrated)\n",
267 /* show the actual temp sensor range */
269 temp = cpu_temp_both(cpu_id);
270 seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n",
271 temp & 0xff, temp >> 16);
274 #endif /* CONFIG_TAU */
277 * Platforms that have variable clock rates, should implement
278 * the method ppc_md.get_proc_freq() that reports the clock
279 * rate of a given cpu. The rest can use ppc_proc_freq to
280 * report the clock rate that is same across all cpus.
282 if (ppc_md.get_proc_freq)
283 proc_freq = ppc_md.get_proc_freq(cpu_id);
285 proc_freq = ppc_proc_freq;
288 seq_printf(m, "clock\t\t: %lu.%06luMHz\n",
289 proc_freq / 1000000, proc_freq % 1000000);
291 /* If we are a Freescale core do a simple check so
292 * we don't have to keep adding cases in the future */
293 if (PVR_VER(pvr) & 0x8000) {
294 switch (PVR_VER(pvr)) {
295 case 0x8000: /* 7441/7450/7451, Voyager */
296 case 0x8001: /* 7445/7455, Apollo 6 */
297 case 0x8002: /* 7447/7457, Apollo 7 */
298 case 0x8003: /* 7447A, Apollo 7 PM */
299 case 0x8004: /* 7448, Apollo 8 */
300 case 0x800c: /* 7410, Nitro */
301 maj = ((pvr >> 8) & 0xF);
304 default: /* e500/book-e */
310 switch (PVR_VER(pvr)) {
311 case 0x1008: /* 740P/750P ?? */
312 maj = ((pvr >> 8) & 0xFF) - 1;
315 case 0x004e: /* POWER9 bits 12-15 give chip type */
316 case 0x0080: /* POWER10 bit 12 gives SMT8/4 */
317 maj = (pvr >> 8) & 0x0F;
321 maj = (pvr >> 8) & 0xFF;
327 seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n",
328 maj, min, PVR_VER(pvr), PVR_REV(pvr));
330 if (IS_ENABLED(CONFIG_PPC32))
331 seq_printf(m, "bogomips\t: %lu.%02lu\n", loops_per_jiffy / (500000 / HZ),
332 (loops_per_jiffy / (5000 / HZ)) % 100);
336 /* If this is the last cpu, print the summary */
337 if (cpumask_next(cpu_id, cpu_online_mask) >= nr_cpu_ids)
338 show_cpuinfo_summary(m);
343 static void *c_start(struct seq_file *m, loff_t *pos)
345 if (*pos == 0) /* just in case, cpu 0 is not the first */
346 *pos = cpumask_first(cpu_online_mask);
348 *pos = cpumask_next(*pos - 1, cpu_online_mask);
349 if ((*pos) < nr_cpu_ids)
350 return (void *)(unsigned long)(*pos + 1);
354 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
357 return c_start(m, pos);
360 static void c_stop(struct seq_file *m, void *v)
364 const struct seq_operations cpuinfo_op = {
368 .show = show_cpuinfo,
371 void __init check_for_initrd(void)
373 #ifdef CONFIG_BLK_DEV_INITRD
374 DBG(" -> check_for_initrd() initrd_start=0x%lx initrd_end=0x%lx\n",
375 initrd_start, initrd_end);
377 /* If we were passed an initrd, set the ROOT_DEV properly if the values
378 * look sensible. If not, clear initrd reference.
380 if (is_kernel_addr(initrd_start) && is_kernel_addr(initrd_end) &&
381 initrd_end > initrd_start)
382 ROOT_DEV = Root_RAM0;
384 initrd_start = initrd_end = 0;
387 pr_info("Found initrd at 0x%lx:0x%lx\n", initrd_start, initrd_end);
389 DBG(" <- check_for_initrd()\n");
390 #endif /* CONFIG_BLK_DEV_INITRD */
395 int threads_per_core, threads_per_subcore, threads_shift __read_mostly;
396 cpumask_t threads_core_mask __read_mostly;
397 EXPORT_SYMBOL_GPL(threads_per_core);
398 EXPORT_SYMBOL_GPL(threads_per_subcore);
399 EXPORT_SYMBOL_GPL(threads_shift);
400 EXPORT_SYMBOL_GPL(threads_core_mask);
402 static void __init cpu_init_thread_core_maps(int tpc)
406 threads_per_core = tpc;
407 threads_per_subcore = tpc;
408 cpumask_clear(&threads_core_mask);
410 /* This implementation only supports power of 2 number of threads
411 * for simplicity and performance
413 threads_shift = ilog2(tpc);
414 BUG_ON(tpc != (1 << threads_shift));
416 for (i = 0; i < tpc; i++)
417 cpumask_set_cpu(i, &threads_core_mask);
419 printk(KERN_INFO "CPU maps initialized for %d thread%s per core\n",
420 tpc, tpc > 1 ? "s" : "");
421 printk(KERN_DEBUG " (thread shift is %d)\n", threads_shift);
425 u32 *cpu_to_phys_id = NULL;
428 * setup_cpu_maps - initialize the following cpu maps:
432 * Having the possible map set up early allows us to restrict allocations
433 * of things like irqstacks to nr_cpu_ids rather than NR_CPUS.
435 * We do not initialize the online map here; cpus set their own bits in
436 * cpu_online_mask as they come up.
438 * This function is valid only for Open Firmware systems. finish_device_tree
439 * must be called before using this.
441 * While we're here, we may as well set the "physical" cpu ids in the paca.
443 * NOTE: This must match the parsing done in early_init_dt_scan_cpus.
445 void __init smp_setup_cpu_maps(void)
447 struct device_node *dn;
451 DBG("smp_setup_cpu_maps()\n");
453 cpu_to_phys_id = memblock_alloc(nr_cpu_ids * sizeof(u32),
456 panic("%s: Failed to allocate %zu bytes align=0x%zx\n",
457 __func__, nr_cpu_ids * sizeof(u32), __alignof__(u32));
459 for_each_node_by_type(dn, "cpu") {
460 const __be32 *intserv;
464 DBG(" * %pOF...\n", dn);
466 intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s",
469 DBG(" ibm,ppc-interrupt-server#s -> %lu threads\n",
470 (len / sizeof(int)));
472 DBG(" no ibm,ppc-interrupt-server#s -> 1 thread\n");
473 intserv = of_get_property(dn, "reg", &len);
475 cpu_be = cpu_to_be32(cpu);
476 /* XXX: what is this? uninitialized?? */
477 intserv = &cpu_be; /* assume logical == phys */
482 nthreads = len / sizeof(int);
484 for (j = 0; j < nthreads && cpu < nr_cpu_ids; j++) {
487 DBG(" thread %d -> cpu %d (hard id %d)\n",
488 j, cpu, be32_to_cpu(intserv[j]));
490 avail = of_device_is_available(dn);
492 avail = !of_property_match_string(dn,
493 "enable-method", "spin-table");
495 set_cpu_present(cpu, avail);
496 set_cpu_possible(cpu, true);
497 cpu_to_phys_id[cpu] = be32_to_cpu(intserv[j]);
501 if (cpu >= nr_cpu_ids) {
507 /* If no SMT supported, nthreads is forced to 1 */
508 if (!cpu_has_feature(CPU_FTR_SMT)) {
509 DBG(" SMT disabled ! nthreads forced to 1\n");
515 * On pSeries LPAR, we need to know how many cpus
516 * could possibly be added to this partition.
518 if (firmware_has_feature(FW_FEATURE_LPAR) &&
519 (dn = of_find_node_by_path("/rtas"))) {
520 int num_addr_cell, num_size_cell, maxcpus;
523 num_addr_cell = of_n_addr_cells(dn);
524 num_size_cell = of_n_size_cells(dn);
526 ireg = of_get_property(dn, "ibm,lrdr-capacity", NULL);
531 maxcpus = be32_to_cpup(ireg + num_addr_cell + num_size_cell);
533 /* Double maxcpus for processors which have SMT capability */
534 if (cpu_has_feature(CPU_FTR_SMT))
537 if (maxcpus > nr_cpu_ids) {
539 "Partition configured for %d cpus, "
540 "operating system maximum is %u.\n",
541 maxcpus, nr_cpu_ids);
542 maxcpus = nr_cpu_ids;
544 printk(KERN_INFO "Partition configured for %d cpus.\n",
547 for (cpu = 0; cpu < maxcpus; cpu++)
548 set_cpu_possible(cpu, true);
552 vdso_data->processorCount = num_present_cpus();
553 #endif /* CONFIG_PPC64 */
555 /* Initialize CPU <=> thread mapping/
557 * WARNING: We assume that the number of threads is the same for
558 * every CPU in the system. If that is not the case, then some code
559 * here will have to be reworked
561 cpu_init_thread_core_maps(nthreads);
563 /* Now that possible cpus are set, set nr_cpu_ids for later use */
568 #endif /* CONFIG_SMP */
570 #ifdef CONFIG_PCSPKR_PLATFORM
571 static __init int add_pcspkr(void)
573 struct device_node *np;
574 struct platform_device *pd;
577 np = of_find_compatible_node(NULL, NULL, "pnpPNP,100");
582 pd = platform_device_alloc("pcspkr", -1);
586 ret = platform_device_add(pd);
588 platform_device_put(pd);
592 device_initcall(add_pcspkr);
593 #endif /* CONFIG_PCSPKR_PLATFORM */
595 static __init void probe_machine(void)
597 extern struct machdep_calls __machine_desc_start;
598 extern struct machdep_calls __machine_desc_end;
602 * Iterate all ppc_md structures until we find the proper
603 * one for the current machine type
605 DBG("Probing machine type ...\n");
608 * Check ppc_md is empty, if not we have a bug, ie, we setup an
609 * entry before probe_machine() which will be overwritten
611 for (i = 0; i < (sizeof(ppc_md) / sizeof(void *)); i++) {
612 if (((void **)&ppc_md)[i]) {
613 printk(KERN_ERR "Entry %d in ppc_md non empty before"
614 " machine probe !\n", i);
618 for (machine_id = &__machine_desc_start;
619 machine_id < &__machine_desc_end;
621 DBG(" %s ...", machine_id->name);
622 memcpy(&ppc_md, machine_id, sizeof(struct machdep_calls));
623 if (ppc_md.probe()) {
629 /* What can we do if we didn't find ? */
630 if (machine_id >= &__machine_desc_end) {
631 pr_err("No suitable machine description found !\n");
635 printk(KERN_INFO "Using %s machine description\n", ppc_md.name);
638 /* Match a class of boards, not a specific device configuration. */
639 int check_legacy_ioport(unsigned long base_port)
641 struct device_node *parent, *np = NULL;
646 if (!(np = of_find_compatible_node(NULL, NULL, "pnpPNP,303")))
647 np = of_find_compatible_node(NULL, NULL, "pnpPNP,f03");
649 parent = of_get_parent(np);
651 of_i8042_kbd_irq = irq_of_parse_and_map(parent, 0);
652 if (!of_i8042_kbd_irq)
653 of_i8042_kbd_irq = 1;
655 of_i8042_aux_irq = irq_of_parse_and_map(parent, 1);
656 if (!of_i8042_aux_irq)
657 of_i8042_aux_irq = 12;
663 np = of_find_node_by_type(NULL, "8042");
664 /* Pegasos has no device_type on its 8042 node, look for the
667 np = of_find_node_by_name(NULL, "8042");
669 of_i8042_kbd_irq = 1;
670 of_i8042_aux_irq = 12;
673 case FDC_BASE: /* FDC1 */
674 np = of_find_node_by_type(NULL, "fdc");
677 /* ipmi is supposed to fail here */
682 parent = of_get_parent(np);
684 if (of_node_is_type(parent, "isa"))
691 EXPORT_SYMBOL(check_legacy_ioport);
694 * Panic notifiers setup
696 * We have 3 notifiers for powerpc, each one from a different "nature":
698 * - ppc_panic_fadump_handler() is a hypervisor notifier, which hard-disables
699 * IRQs and deal with the Firmware-Assisted dump, when it is configured;
700 * should run early in the panic path.
702 * - dump_kernel_offset() is an informative notifier, just showing the KASLR
703 * offset if we have RANDOMIZE_BASE set.
705 * - ppc_panic_platform_handler() is a low-level handler that's registered
706 * only if the platform wishes to perform final actions in the panic path,
707 * hence it should run late and might not even return. Currently, only
708 * pseries and ps3 platforms register callbacks.
710 static int ppc_panic_fadump_handler(struct notifier_block *this,
711 unsigned long event, void *ptr)
714 * panic does a local_irq_disable, but we really
715 * want interrupts to be hard disabled.
720 * If firmware-assisted dump has been registered then trigger
721 * its callback and let the firmware handles everything else.
723 crash_fadump(NULL, ptr);
728 static int dump_kernel_offset(struct notifier_block *self, unsigned long v,
731 pr_emerg("Kernel Offset: 0x%lx from 0x%lx\n",
732 kaslr_offset(), KERNELBASE);
737 static int ppc_panic_platform_handler(struct notifier_block *this,
738 unsigned long event, void *ptr)
741 * This handler is only registered if we have a panic callback
742 * on ppc_md, hence NULL check is not needed.
743 * Also, it may not return, so it runs really late on panic path.
750 static struct notifier_block ppc_fadump_block = {
751 .notifier_call = ppc_panic_fadump_handler,
752 .priority = INT_MAX, /* run early, to notify the firmware ASAP */
755 static struct notifier_block kernel_offset_notifier = {
756 .notifier_call = dump_kernel_offset,
759 static struct notifier_block ppc_panic_block = {
760 .notifier_call = ppc_panic_platform_handler,
761 .priority = INT_MIN, /* may not return; must be done last */
764 void __init setup_panic(void)
766 /* Hard-disables IRQs + deal with FW-assisted dump (fadump) */
767 atomic_notifier_chain_register(&panic_notifier_list,
770 if (IS_ENABLED(CONFIG_RANDOMIZE_BASE) && kaslr_offset() > 0)
771 atomic_notifier_chain_register(&panic_notifier_list,
772 &kernel_offset_notifier);
774 /* Low-level platform-specific routines that should run on panic */
776 atomic_notifier_chain_register(&panic_notifier_list,
780 #ifdef CONFIG_CHECK_CACHE_COHERENCY
782 * For platforms that have configurable cache-coherency. This function
783 * checks that the cache coherency setting of the kernel matches the setting
784 * left by the firmware, as indicated in the device tree. Since a mismatch
785 * will eventually result in DMA failures, we print * and error and call
786 * BUG() in that case.
789 #define KERNEL_COHERENCY (!IS_ENABLED(CONFIG_NOT_COHERENT_CACHE))
791 static int __init check_cache_coherency(void)
793 struct device_node *np;
795 bool devtree_coherency;
797 np = of_find_node_by_path("/");
798 prop = of_get_property(np, "coherency-off", NULL);
801 devtree_coherency = prop ? false : true;
803 if (devtree_coherency != KERNEL_COHERENCY) {
805 "kernel coherency:%s != device tree_coherency:%s\n",
806 KERNEL_COHERENCY ? "on" : "off",
807 devtree_coherency ? "on" : "off");
814 late_initcall(check_cache_coherency);
815 #endif /* CONFIG_CHECK_CACHE_COHERENCY */
817 void ppc_printk_progress(char *s, unsigned short hex)
822 static __init void print_system_info(void)
824 pr_info("-----------------------------------------------------\n");
825 pr_info("phys_mem_size = 0x%llx\n",
826 (unsigned long long)memblock_phys_mem_size());
828 pr_info("dcache_bsize = 0x%x\n", dcache_bsize);
829 pr_info("icache_bsize = 0x%x\n", icache_bsize);
831 pr_info("cpu_features = 0x%016lx\n", cur_cpu_spec->cpu_features);
832 pr_info(" possible = 0x%016lx\n",
833 (unsigned long)CPU_FTRS_POSSIBLE);
834 pr_info(" always = 0x%016lx\n",
835 (unsigned long)CPU_FTRS_ALWAYS);
836 pr_info("cpu_user_features = 0x%08x 0x%08x\n",
837 cur_cpu_spec->cpu_user_features,
838 cur_cpu_spec->cpu_user_features2);
839 pr_info("mmu_features = 0x%08x\n", cur_cpu_spec->mmu_features);
841 pr_info("firmware_features = 0x%016lx\n", powerpc_firmware_features);
842 #ifdef CONFIG_PPC_BOOK3S
843 pr_info("vmalloc start = 0x%lx\n", KERN_VIRT_START);
844 pr_info("IO start = 0x%lx\n", KERN_IO_START);
845 pr_info("vmemmap start = 0x%lx\n", (unsigned long)vmemmap);
849 if (!early_radix_enabled())
850 print_system_hash_info();
852 if (PHYSICAL_START > 0)
853 pr_info("physical_start = 0x%llx\n",
854 (unsigned long long)PHYSICAL_START);
855 pr_info("-----------------------------------------------------\n");
859 static void __init smp_setup_pacas(void)
863 for_each_possible_cpu(cpu) {
864 if (cpu == smp_processor_id())
867 set_hard_smp_processor_id(cpu, cpu_to_phys_id[cpu]);
870 memblock_free(cpu_to_phys_id, nr_cpu_ids * sizeof(u32));
871 cpu_to_phys_id = NULL;
876 * Called into from start_kernel this initializes memblock, which is used
877 * to manage page allocation until mem_init is called.
879 void __init setup_arch(char **cmdline_p)
883 *cmdline_p = boot_command_line;
885 /* Set a half-reasonable default so udelay does something sensible */
886 loops_per_jiffy = 500000000 / HZ;
888 /* Unflatten the device-tree passed by prom_init or kexec */
889 unflatten_device_tree();
892 * Initialize cache line/block info from device-tree (on ppc64) or
893 * just cputable (on ppc32).
895 initialize_cache_info();
897 /* Initialize RTAS if available. */
900 /* Check if we have an initrd provided via the device-tree. */
903 /* Probe the machine type, establish ppc_md. */
906 /* Setup panic notifier if requested by the platform. */
910 * Configure ppc_md.power_save (ppc32 only, 64-bit machines do
911 * it from their respective probe() function.
915 /* Discover standard serial ports. */
916 find_legacy_serial_ports();
918 /* Register early console with the printk subsystem. */
919 register_early_udbg_console();
921 /* Setup the various CPU maps based on the device-tree. */
922 smp_setup_cpu_maps();
924 /* Initialize xmon. */
927 /* Check the SMT related command line arguments (ppc64). */
930 /* Parse memory topology */
931 mem_topology_setup();
934 * Release secondary cpus out of their spinloops at 0x60 now that
935 * we can map physical -> logical CPU ids.
937 * Freescale Book3e parts spin in a loop provided by firmware,
938 * so smp_release_cpus() does nothing for them.
943 /* On BookE, setup per-core TLB data structures. */
944 setup_tlb_core_data();
947 /* Print various info about the machine that has been gathered so far. */
950 /* Reserve large chunks of memory for use by CMA for KVM. */
953 /* Reserve large chunks of memory for us by CMA for hugetlb */
954 gigantic_hugetlb_cma_reserve();
956 klp_init_thread_info(&init_task);
958 setup_initial_init_mm(_stext, _etext, _edata, _end);
960 mm_iommu_init(&init_mm);
961 irqstack_early_init();
962 exc_lvl_early_init();
963 emergency_stack_init();
970 early_memtest(min_low_pfn << PAGE_SHIFT, max_low_pfn << PAGE_SHIFT);
972 if (ppc_md.setup_arch)
975 setup_barrier_nospec();
980 /* Initialize the MMU context management stuff. */
983 /* Interrupt code needs to be 64K-aligned. */
984 if (IS_ENABLED(CONFIG_PPC64) && (unsigned long)_stext & 0xffff)
985 panic("Kernelbase not 64K-aligned (0x%lx)!\n",
986 (unsigned long)_stext);