1 # SPDX-License-Identifier: GPL-2.0
5 select ARCH_32BIT_OFF_T if !64BIT
6 select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
7 select ARCH_HAS_DEBUG_VIRTUAL if !64BIT
8 select ARCH_HAS_FORTIFY_SOURCE
10 select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE if !EVA
11 select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
12 select ARCH_HAS_STRNCPY_FROM_USER
13 select ARCH_HAS_STRNLEN_USER
14 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
15 select ARCH_HAS_UBSAN_SANITIZE_ALL
16 select ARCH_HAS_GCOV_PROFILE_ALL
17 select ARCH_KEEP_MEMBLOCK
18 select ARCH_SUPPORTS_UPROBES
19 select ARCH_USE_BUILTIN_BSWAP
20 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
21 select ARCH_USE_MEMTEST
22 select ARCH_USE_QUEUED_RWLOCKS
23 select ARCH_USE_QUEUED_SPINLOCKS
24 select ARCH_SUPPORTS_HUGETLBFS if CPU_SUPPORTS_HUGEPAGES
25 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
26 select ARCH_WANT_IPC_PARSE_VERSION
27 select ARCH_WANT_LD_ORPHAN_WARN
28 select BUILDTIME_TABLE_SORT
29 select CLONE_BACKWARDS
30 select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
31 select CPU_PM if CPU_IDLE
32 select GENERIC_ATOMIC64 if !64BIT
33 select GENERIC_CMOS_UPDATE
34 select GENERIC_CPU_AUTOPROBE
35 select GENERIC_FIND_FIRST_BIT
36 select GENERIC_GETTIMEOFDAY
38 select GENERIC_IRQ_PROBE
39 select GENERIC_IRQ_SHOW
40 select GENERIC_ISA_DMA if EISA
41 select GENERIC_LIB_ASHLDI3
42 select GENERIC_LIB_ASHRDI3
43 select GENERIC_LIB_CMPDI2
44 select GENERIC_LIB_LSHRDI3
45 select GENERIC_LIB_UCMPDI2
46 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
47 select GENERIC_SMP_IDLE_THREAD
48 select GENERIC_TIME_VSYSCALL
49 select GUP_GET_PTE_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
50 select HANDLE_DOMAIN_IRQ
51 select HAVE_ARCH_COMPILER_H
52 select HAVE_ARCH_JUMP_LABEL
53 select HAVE_ARCH_KGDB if MIPS_FP_SUPPORT
54 select HAVE_ARCH_MMAP_RND_BITS if MMU
55 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
56 select HAVE_ARCH_SECCOMP_FILTER
57 select HAVE_ARCH_TRACEHOOK
58 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
59 select HAVE_ASM_MODVERSIONS
60 select HAVE_CBPF_JIT if !64BIT && !CPU_MICROMIPS
61 select HAVE_CONTEXT_TRACKING
63 select HAVE_C_RECORDMCOUNT
64 select HAVE_DEBUG_KMEMLEAK
65 select HAVE_DEBUG_STACKOVERFLOW
66 select HAVE_DMA_CONTIGUOUS
67 select HAVE_DYNAMIC_FTRACE
68 select HAVE_EBPF_JIT if 64BIT && !CPU_MICROMIPS && TARGET_ISA_REV >= 2
69 select HAVE_EXIT_THREAD
71 select HAVE_FTRACE_MCOUNT_RECORD
72 select HAVE_FUNCTION_GRAPH_TRACER
73 select HAVE_FUNCTION_TRACER
74 select HAVE_GCC_PLUGINS
75 select HAVE_GENERIC_VDSO
76 select HAVE_IOREMAP_PROT
77 select HAVE_IRQ_EXIT_ON_IRQ_STACK
78 select HAVE_IRQ_TIME_ACCOUNTING
80 select HAVE_KRETPROBES
81 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
82 select HAVE_MOD_ARCH_SPECIFIC
84 select HAVE_PERF_EVENTS
86 select HAVE_PERF_USER_STACK_DUMP
87 select HAVE_REGS_AND_STACK_ACCESS_API
89 select HAVE_SPARSE_SYSCALL_NR
90 select HAVE_STACKPROTECTOR
91 select HAVE_SYSCALL_TRACEPOINTS
92 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
93 select IRQ_FORCED_THREADING
95 select MODULES_USE_ELF_REL if MODULES
96 select MODULES_USE_ELF_RELA if MODULES && 64BIT
97 select PERF_USE_VMALLOC
98 select PCI_MSI_ARCH_FALLBACKS if PCI_MSI
100 select SYSCTL_EXCEPTION_TRACE
102 select ARCH_HAS_ELFCORE_COMPAT
104 config MIPS_FIXUP_BIGPHYS_ADDR
112 select SYS_SUPPORTS_32BIT_KERNEL
113 select SYS_SUPPORTS_LITTLE_ENDIAN
114 select SYS_SUPPORTS_ZBOOT
115 select DMA_NONCOHERENT
116 select ARCH_HAS_SYNC_DMA_FOR_CPU
121 select GENERIC_IRQ_CHIP
122 select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
124 select CPU_SUPPORTS_CPUFREQ
125 select MIPS_EXTERNAL_TIMER
127 menu "Machine selection"
131 default MIPS_GENERIC_KERNEL
133 config MIPS_GENERIC_KERNEL
134 bool "Generic board-agnostic MIPS kernel"
135 select ARCH_HAS_SETUP_DMA_OPS
140 select CLKSRC_MIPS_GIC
142 select CPU_MIPSR2_IRQ_EI
143 select CPU_MIPSR2_IRQ_VI
145 select DMA_NONCOHERENT
148 select MIPS_AUTO_PFN_OFFSET
149 select MIPS_CPU_SCACHE
151 select MIPS_L1_CACHE_SHIFT_7
152 select NO_EXCEPT_FILL
153 select PCI_DRIVERS_GENERIC
156 select SYS_HAS_CPU_MIPS32_R1
157 select SYS_HAS_CPU_MIPS32_R2
158 select SYS_HAS_CPU_MIPS32_R6
159 select SYS_HAS_CPU_MIPS64_R1
160 select SYS_HAS_CPU_MIPS64_R2
161 select SYS_HAS_CPU_MIPS64_R6
162 select SYS_SUPPORTS_32BIT_KERNEL
163 select SYS_SUPPORTS_64BIT_KERNEL
164 select SYS_SUPPORTS_BIG_ENDIAN
165 select SYS_SUPPORTS_HIGHMEM
166 select SYS_SUPPORTS_LITTLE_ENDIAN
167 select SYS_SUPPORTS_MICROMIPS
168 select SYS_SUPPORTS_MIPS16
169 select SYS_SUPPORTS_MIPS_CPS
170 select SYS_SUPPORTS_MULTITHREADING
171 select SYS_SUPPORTS_RELOCATABLE
172 select SYS_SUPPORTS_SMARTMIPS
173 select SYS_SUPPORTS_ZBOOT
175 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
176 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
177 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
178 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
179 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
180 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
183 Select this to build a kernel which aims to support multiple boards,
184 generally using a flattened device tree passed from the bootloader
185 using the boot protocol defined in the UHI (Unified Hosting
186 Interface) specification.
189 bool "Alchemy processor based machines"
190 select PHYS_ADDR_T_64BIT
194 select DMA_NONCOHERENT # Au1000,1500,1100 aren't, rest is
195 select MIPS_FIXUP_BIGPHYS_ADDR if PCI
196 select SYS_HAS_CPU_MIPS32_R1
197 select SYS_SUPPORTS_32BIT_KERNEL
198 select SYS_SUPPORTS_APM_EMULATION
200 select SYS_SUPPORTS_ZBOOT
204 bool "Texas Instruments AR7"
207 select DMA_NONCOHERENT
211 select NO_EXCEPT_FILL
213 select SYS_HAS_CPU_MIPS32_R1
214 select SYS_HAS_EARLY_PRINTK
215 select SYS_SUPPORTS_32BIT_KERNEL
216 select SYS_SUPPORTS_LITTLE_ENDIAN
217 select SYS_SUPPORTS_MIPS16
218 select SYS_SUPPORTS_ZBOOT_UART16550
222 Support for the Texas Instruments AR7 System-on-a-Chip
223 family: TNETD7100, 7200 and 7300.
226 bool "Atheros AR231x/AR531x SoC support"
229 select DMA_NONCOHERENT
232 select SYS_HAS_CPU_MIPS32_R1
233 select SYS_SUPPORTS_BIG_ENDIAN
234 select SYS_SUPPORTS_32BIT_KERNEL
235 select SYS_HAS_EARLY_PRINTK
237 Support for Atheros AR231x and Atheros AR531x based boards
240 bool "Atheros AR71XX/AR724X/AR913X based boards"
241 select ARCH_HAS_RESET_CONTROLLER
245 select DMA_NONCOHERENT
250 select SYS_HAS_CPU_MIPS32_R2
251 select SYS_HAS_EARLY_PRINTK
252 select SYS_SUPPORTS_32BIT_KERNEL
253 select SYS_SUPPORTS_BIG_ENDIAN
254 select SYS_SUPPORTS_MIPS16
255 select SYS_SUPPORTS_ZBOOT_UART_PROM
257 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
259 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
262 bool "Broadcom Generic BMIPS kernel"
263 select ARCH_HAS_RESET_CONTROLLER
264 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
265 select ARCH_HAS_PHYS_TO_DMA
267 select NO_EXCEPT_FILL
273 select BCM6345_L1_IRQ
274 select BCM7038_L1_IRQ
275 select BCM7120_L2_IRQ
276 select BRCMSTB_L2_IRQ
278 select DMA_NONCOHERENT
279 select SYS_SUPPORTS_32BIT_KERNEL
280 select SYS_SUPPORTS_LITTLE_ENDIAN
281 select SYS_SUPPORTS_BIG_ENDIAN
282 select SYS_SUPPORTS_HIGHMEM
283 select SYS_HAS_CPU_BMIPS32_3300
284 select SYS_HAS_CPU_BMIPS4350
285 select SYS_HAS_CPU_BMIPS4380
286 select SYS_HAS_CPU_BMIPS5000
288 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
289 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
290 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
291 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
292 select HARDIRQS_SW_RESEND
294 Build a generic DT-based kernel image that boots on select
295 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
296 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
297 must be set appropriately for your board.
300 bool "Broadcom BCM47XX based boards"
304 select DMA_NONCOHERENT
307 select SYS_HAS_CPU_MIPS32_R1
308 select NO_EXCEPT_FILL
309 select SYS_SUPPORTS_32BIT_KERNEL
310 select SYS_SUPPORTS_LITTLE_ENDIAN
311 select SYS_SUPPORTS_MIPS16
312 select SYS_SUPPORTS_ZBOOT
313 select SYS_HAS_EARLY_PRINTK
314 select USE_GENERIC_EARLY_PRINTK_8250
316 select LEDS_GPIO_REGISTER
319 select BCM47XX_SSB if !BCM47XX_BCMA
321 Support for BCM47XX based boards
324 bool "Broadcom BCM63XX based boards"
329 select DMA_NONCOHERENT
331 select SYS_SUPPORTS_32BIT_KERNEL
332 select SYS_SUPPORTS_BIG_ENDIAN
333 select SYS_HAS_EARLY_PRINTK
336 select MIPS_L1_CACHE_SHIFT_4
337 select HAVE_LEGACY_CLK
339 Support for BCM63XX based boards
346 select DMA_NONCOHERENT
352 select PCI_GT64XXX_PCI0
353 select SYS_HAS_CPU_NEVADA
354 select SYS_HAS_EARLY_PRINTK
355 select SYS_SUPPORTS_32BIT_KERNEL
356 select SYS_SUPPORTS_64BIT_KERNEL
357 select SYS_SUPPORTS_LITTLE_ENDIAN
358 select USE_GENERIC_EARLY_PRINTK_8250
360 config MACH_DECSTATION
364 select CEVT_R4K if CPU_R4X00
366 select CSRC_R4K if CPU_R4X00
367 select CPU_DADDI_WORKAROUNDS if 64BIT
368 select CPU_R4000_WORKAROUNDS if 64BIT
369 select CPU_R4400_WORKAROUNDS if 64BIT
370 select DMA_NONCOHERENT
373 select SYS_HAS_CPU_R3000
374 select SYS_HAS_CPU_R4X00
375 select SYS_SUPPORTS_32BIT_KERNEL
376 select SYS_SUPPORTS_64BIT_KERNEL
377 select SYS_SUPPORTS_LITTLE_ENDIAN
378 select SYS_SUPPORTS_128HZ
379 select SYS_SUPPORTS_256HZ
380 select SYS_SUPPORTS_1024HZ
381 select MIPS_L1_CACHE_SHIFT_4
383 This enables support for DEC's MIPS based workstations. For details
384 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
385 DECstation porting pages on <http://decstation.unix-ag.org/>.
387 If you have one of the following DECstation Models you definitely
388 want to choose R4xx0 for the CPU Type:
395 otherwise choose R3000.
398 bool "Jazz family of machines"
401 select ARCH_MIGHT_HAVE_PC_PARPORT
402 select ARCH_MIGHT_HAVE_PC_SERIO
406 select ARCH_MAY_HAVE_PC_FDC
409 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
410 select GENERIC_ISA_DMA
411 select HAVE_PCSPKR_PLATFORM
416 select SYS_HAS_CPU_R4X00
417 select SYS_SUPPORTS_32BIT_KERNEL
418 select SYS_SUPPORTS_64BIT_KERNEL
419 select SYS_SUPPORTS_100HZ
420 select SYS_SUPPORTS_LITTLE_ENDIAN
422 This a family of machines based on the MIPS R4030 chipset which was
423 used by several vendors to build RISC/os and Windows NT workstations.
424 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
425 Olivetti M700-10 workstations.
427 config MACH_INGENIC_SOC
428 bool "Ingenic SoC based machines"
431 select SYS_SUPPORTS_ZBOOT_UART16550
432 select CPU_SUPPORTS_CPUFREQ
433 select MIPS_EXTERNAL_TIMER
436 bool "Lantiq based platforms"
437 select DMA_NONCOHERENT
441 select SYS_HAS_CPU_MIPS32_R1
442 select SYS_HAS_CPU_MIPS32_R2
443 select SYS_SUPPORTS_BIG_ENDIAN
444 select SYS_SUPPORTS_32BIT_KERNEL
445 select SYS_SUPPORTS_MIPS16
446 select SYS_SUPPORTS_MULTITHREADING
447 select SYS_SUPPORTS_VPE_LOADER
448 select SYS_HAS_EARLY_PRINTK
452 select HAVE_LEGACY_CLK
455 select PINCTRL_LANTIQ
456 select ARCH_HAS_RESET_CONTROLLER
457 select RESET_CONTROLLER
459 config MACH_LOONGSON32
460 bool "Loongson 32-bit family of machines"
461 select SYS_SUPPORTS_ZBOOT
463 This enables support for the Loongson-1 family of machines.
465 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
466 the Institute of Computing Technology (ICT), Chinese Academy of
469 config MACH_LOONGSON2EF
470 bool "Loongson-2E/F family of machines"
471 select SYS_SUPPORTS_ZBOOT
473 This enables the support of early Loongson-2E/F family of machines.
475 config MACH_LOONGSON64
476 bool "Loongson 64-bit family of machines"
477 select ARCH_SPARSEMEM_ENABLE
478 select ARCH_MIGHT_HAVE_PC_PARPORT
479 select ARCH_MIGHT_HAVE_PC_SERIO
480 select GENERIC_ISA_DMA_SUPPORT_BROKEN
490 select NO_EXCEPT_FILL
491 select NR_CPUS_DEFAULT_64
492 select USE_GENERIC_EARLY_PRINTK_8250
493 select PCI_DRIVERS_GENERIC
494 select SYS_HAS_CPU_LOONGSON64
495 select SYS_HAS_EARLY_PRINTK
496 select SYS_SUPPORTS_SMP
497 select SYS_SUPPORTS_HOTPLUG_CPU
498 select SYS_SUPPORTS_NUMA
499 select SYS_SUPPORTS_64BIT_KERNEL
500 select SYS_SUPPORTS_HIGHMEM
501 select SYS_SUPPORTS_LITTLE_ENDIAN
502 select SYS_SUPPORTS_ZBOOT
503 select SYS_SUPPORTS_RELOCATABLE
508 select PCI_HOST_GENERIC
510 This enables the support of Loongson-2/3 family of machines.
512 Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
513 GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
514 and Loongson-2F which will be removed), developed by the Institute
515 of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
518 bool "MIPS Malta board"
519 select ARCH_MAY_HAVE_PC_FDC
520 select ARCH_MIGHT_HAVE_PC_PARPORT
521 select ARCH_MIGHT_HAVE_PC_SERIO
526 select CLKSRC_MIPS_GIC
529 select DMA_NONCOHERENT
530 select GENERIC_ISA_DMA
531 select HAVE_PCSPKR_PLATFORM
537 select MIPS_CPU_SCACHE
539 select MIPS_L1_CACHE_SHIFT_6
541 select PCI_GT64XXX_PCI0
544 select SYS_HAS_CPU_MIPS32_R1
545 select SYS_HAS_CPU_MIPS32_R2
546 select SYS_HAS_CPU_MIPS32_R3_5
547 select SYS_HAS_CPU_MIPS32_R5
548 select SYS_HAS_CPU_MIPS32_R6
549 select SYS_HAS_CPU_MIPS64_R1
550 select SYS_HAS_CPU_MIPS64_R2
551 select SYS_HAS_CPU_MIPS64_R6
552 select SYS_HAS_CPU_NEVADA
553 select SYS_HAS_CPU_RM7000
554 select SYS_SUPPORTS_32BIT_KERNEL
555 select SYS_SUPPORTS_64BIT_KERNEL
556 select SYS_SUPPORTS_BIG_ENDIAN
557 select SYS_SUPPORTS_HIGHMEM
558 select SYS_SUPPORTS_LITTLE_ENDIAN
559 select SYS_SUPPORTS_MICROMIPS
560 select SYS_SUPPORTS_MIPS16
561 select SYS_SUPPORTS_MIPS_CMP
562 select SYS_SUPPORTS_MIPS_CPS
563 select SYS_SUPPORTS_MULTITHREADING
564 select SYS_SUPPORTS_RELOCATABLE
565 select SYS_SUPPORTS_SMARTMIPS
566 select SYS_SUPPORTS_VPE_LOADER
567 select SYS_SUPPORTS_ZBOOT
569 select WAR_ICACHE_REFILLS
570 select ZONE_DMA32 if 64BIT
572 This enables support for the MIPS Technologies Malta evaluation
576 bool "Microchip PIC32 Family"
578 This enables support for the Microchip PIC32 family of platforms.
580 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
584 bool "NEC VR4100 series based machines"
587 select SYS_HAS_CPU_VR41XX
588 select SYS_SUPPORTS_MIPS16
591 config MACH_NINTENDO64
592 bool "Nintendo 64 console"
595 select SYS_HAS_CPU_R4300
596 select SYS_SUPPORTS_BIG_ENDIAN
597 select SYS_SUPPORTS_ZBOOT
598 select SYS_SUPPORTS_32BIT_KERNEL
599 select SYS_SUPPORTS_64BIT_KERNEL
600 select DMA_NONCOHERENT
604 bool "Ralink based machines"
609 select DMA_NONCOHERENT
612 select SYS_HAS_CPU_MIPS32_R1
613 select SYS_HAS_CPU_MIPS32_R2
614 select SYS_SUPPORTS_32BIT_KERNEL
615 select SYS_SUPPORTS_LITTLE_ENDIAN
616 select SYS_SUPPORTS_MIPS16
617 select SYS_SUPPORTS_ZBOOT
618 select SYS_HAS_EARLY_PRINTK
619 select ARCH_HAS_RESET_CONTROLLER
620 select RESET_CONTROLLER
622 config MACH_REALTEK_RTL
623 bool "Realtek RTL838x/RTL839x based machines"
625 select DMA_NONCOHERENT
629 select SYS_HAS_CPU_MIPS32_R1
630 select SYS_HAS_CPU_MIPS32_R2
631 select SYS_SUPPORTS_BIG_ENDIAN
632 select SYS_SUPPORTS_32BIT_KERNEL
633 select SYS_SUPPORTS_MIPS16
634 select SYS_SUPPORTS_MULTITHREADING
635 select SYS_SUPPORTS_VPE_LOADER
636 select SYS_HAS_EARLY_PRINTK
637 select SYS_HAS_EARLY_PRINTK_8250
638 select USE_GENERIC_EARLY_PRINTK_8250
644 bool "SGI IP22 (Indy/Indigo2)"
649 select ARCH_MIGHT_HAVE_PC_SERIO
653 select DEFAULT_SGI_PARTITION
654 select DMA_NONCOHERENT
658 select IP22_CPU_SCACHE
660 select GENERIC_ISA_DMA_SUPPORT_BROKEN
662 select SGI_HAS_INDYDOG
668 select SYS_HAS_CPU_R4X00
669 select SYS_HAS_CPU_R5000
670 select SYS_HAS_EARLY_PRINTK
671 select SYS_SUPPORTS_32BIT_KERNEL
672 select SYS_SUPPORTS_64BIT_KERNEL
673 select SYS_SUPPORTS_BIG_ENDIAN
674 select WAR_R4600_V1_INDEX_ICACHEOP
675 select WAR_R4600_V1_HIT_CACHEOP
676 select WAR_R4600_V2_HIT_CACHEOP
677 select MIPS_L1_CACHE_SHIFT_7
679 This are the SGI Indy, Challenge S and Indigo2, as well as certain
680 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
681 that runs on these, say Y here.
684 bool "SGI IP27 (Origin200/2000)"
685 select ARCH_HAS_PHYS_TO_DMA
686 select ARCH_SPARSEMEM_ENABLE
689 select ARC_CMDLINE_ONLY
691 select DEFAULT_SGI_PARTITION
693 select SYS_HAS_EARLY_PRINTK
696 select IRQ_DOMAIN_HIERARCHY
697 select NR_CPUS_DEFAULT_64
698 select PCI_DRIVERS_GENERIC
699 select PCI_XTALK_BRIDGE
700 select SYS_HAS_CPU_R10000
701 select SYS_SUPPORTS_64BIT_KERNEL
702 select SYS_SUPPORTS_BIG_ENDIAN
703 select SYS_SUPPORTS_NUMA
704 select SYS_SUPPORTS_SMP
705 select WAR_R10000_LLSC
706 select MIPS_L1_CACHE_SHIFT_7
709 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
710 workstations. To compile a Linux kernel that runs on these, say Y
714 bool "SGI IP28 (Indigo2 R10k)"
719 select ARCH_MIGHT_HAVE_PC_SERIO
723 select DEFAULT_SGI_PARTITION
724 select DMA_NONCOHERENT
725 select GENERIC_ISA_DMA_SUPPORT_BROKEN
731 select SGI_HAS_INDYDOG
737 select SYS_HAS_CPU_R10000
738 select SYS_HAS_EARLY_PRINTK
739 select SYS_SUPPORTS_64BIT_KERNEL
740 select SYS_SUPPORTS_BIG_ENDIAN
741 select WAR_R10000_LLSC
742 select MIPS_L1_CACHE_SHIFT_7
744 This is the SGI Indigo2 with R10000 processor. To compile a Linux
745 kernel that runs on these, say Y here.
748 bool "SGI IP30 (Octane/Octane2)"
749 select ARCH_HAS_PHYS_TO_DMA
756 select SYNC_R4K if SMP
760 select IRQ_DOMAIN_HIERARCHY
761 select NR_CPUS_DEFAULT_2
762 select PCI_DRIVERS_GENERIC
763 select PCI_XTALK_BRIDGE
764 select SYS_HAS_EARLY_PRINTK
765 select SYS_HAS_CPU_R10000
766 select SYS_SUPPORTS_64BIT_KERNEL
767 select SYS_SUPPORTS_BIG_ENDIAN
768 select SYS_SUPPORTS_SMP
769 select WAR_R10000_LLSC
770 select MIPS_L1_CACHE_SHIFT_7
773 These are the SGI Octane and Octane2 graphics workstations. To
774 compile a Linux kernel that runs on these, say Y here.
780 select ARCH_HAS_PHYS_TO_DMA
786 select DMA_NONCOHERENT
789 select R5000_CPU_SCACHE
790 select RM7000_CPU_SCACHE
791 select SYS_HAS_CPU_R5000
792 select SYS_HAS_CPU_R10000 if BROKEN
793 select SYS_HAS_CPU_RM7000
794 select SYS_HAS_CPU_NEVADA
795 select SYS_SUPPORTS_64BIT_KERNEL
796 select SYS_SUPPORTS_BIG_ENDIAN
797 select WAR_ICACHE_REFILLS
799 If you want this kernel to run on SGI O2 workstation, say Y here.
802 bool "Sibyte BCM91120C-CRhine"
804 select SIBYTE_BCM1120
806 select SYS_HAS_CPU_SB1
807 select SYS_SUPPORTS_BIG_ENDIAN
808 select SYS_SUPPORTS_LITTLE_ENDIAN
811 bool "Sibyte BCM91120x-Carmel"
813 select SIBYTE_BCM1120
815 select SYS_HAS_CPU_SB1
816 select SYS_SUPPORTS_BIG_ENDIAN
817 select SYS_SUPPORTS_LITTLE_ENDIAN
820 bool "Sibyte BCM91125C-CRhone"
822 select SIBYTE_BCM1125
824 select SYS_HAS_CPU_SB1
825 select SYS_SUPPORTS_BIG_ENDIAN
826 select SYS_SUPPORTS_HIGHMEM
827 select SYS_SUPPORTS_LITTLE_ENDIAN
830 bool "Sibyte BCM91125E-Rhone"
832 select SIBYTE_BCM1125H
834 select SYS_HAS_CPU_SB1
835 select SYS_SUPPORTS_BIG_ENDIAN
836 select SYS_SUPPORTS_LITTLE_ENDIAN
839 bool "Sibyte BCM91250A-SWARM"
841 select HAVE_PATA_PLATFORM
844 select SYS_HAS_CPU_SB1
845 select SYS_SUPPORTS_BIG_ENDIAN
846 select SYS_SUPPORTS_HIGHMEM
847 select SYS_SUPPORTS_LITTLE_ENDIAN
848 select ZONE_DMA32 if 64BIT
849 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
851 config SIBYTE_LITTLESUR
852 bool "Sibyte BCM91250C2-LittleSur"
854 select HAVE_PATA_PLATFORM
857 select SYS_HAS_CPU_SB1
858 select SYS_SUPPORTS_BIG_ENDIAN
859 select SYS_SUPPORTS_HIGHMEM
860 select SYS_SUPPORTS_LITTLE_ENDIAN
861 select ZONE_DMA32 if 64BIT
863 config SIBYTE_SENTOSA
864 bool "Sibyte BCM91250E-Sentosa"
868 select SYS_HAS_CPU_SB1
869 select SYS_SUPPORTS_BIG_ENDIAN
870 select SYS_SUPPORTS_LITTLE_ENDIAN
871 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
874 bool "Sibyte BCM91480B-BigSur"
876 select NR_CPUS_DEFAULT_4
877 select SIBYTE_BCM1x80
879 select SYS_HAS_CPU_SB1
880 select SYS_SUPPORTS_BIG_ENDIAN
881 select SYS_SUPPORTS_HIGHMEM
882 select SYS_SUPPORTS_LITTLE_ENDIAN
883 select ZONE_DMA32 if 64BIT
884 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
887 bool "SNI RM200/300/400"
890 select FW_ARC if CPU_LITTLE_ENDIAN
891 select FW_ARC32 if CPU_LITTLE_ENDIAN
892 select FW_SNIPROM if CPU_BIG_ENDIAN
893 select ARCH_MAY_HAVE_PC_FDC
894 select ARCH_MIGHT_HAVE_PC_PARPORT
895 select ARCH_MIGHT_HAVE_PC_SERIO
899 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
900 select DMA_NONCOHERENT
901 select GENERIC_ISA_DMA
903 select HAVE_PCSPKR_PLATFORM
909 select MIPS_L1_CACHE_SHIFT_6
910 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
911 select SYS_HAS_CPU_R4X00
912 select SYS_HAS_CPU_R5000
913 select SYS_HAS_CPU_R10000
914 select R5000_CPU_SCACHE
915 select SYS_HAS_EARLY_PRINTK
916 select SYS_SUPPORTS_32BIT_KERNEL
917 select SYS_SUPPORTS_64BIT_KERNEL
918 select SYS_SUPPORTS_BIG_ENDIAN
919 select SYS_SUPPORTS_HIGHMEM
920 select SYS_SUPPORTS_LITTLE_ENDIAN
921 select WAR_R4600_V2_HIT_CACHEOP
923 The SNI RM200/300/400 are MIPS-based machines manufactured by
924 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
925 Technology and now in turn merged with Fujitsu. Say Y here to
926 support this machine type.
929 bool "Toshiba TX39 series based machines"
932 bool "Toshiba TX49 series based machines"
933 select WAR_TX49XX_ICACHE_INDEX_INV
935 config MIKROTIK_RB532
936 bool "Mikrotik RB532 boards"
939 select DMA_NONCOHERENT
942 select SYS_HAS_CPU_MIPS32_R1
943 select SYS_SUPPORTS_32BIT_KERNEL
944 select SYS_SUPPORTS_LITTLE_ENDIAN
948 select MIPS_L1_CACHE_SHIFT_4
950 Support the Mikrotik(tm) RouterBoard 532 series,
951 based on the IDT RC32434 SoC.
953 config CAVIUM_OCTEON_SOC
954 bool "Cavium Networks Octeon SoC based boards"
956 select ARCH_HAS_PHYS_TO_DMA
958 select PHYS_ADDR_T_64BIT
959 select SYS_SUPPORTS_64BIT_KERNEL
960 select SYS_SUPPORTS_BIG_ENDIAN
962 select EDAC_ATOMIC_SCRUB
963 select SYS_SUPPORTS_LITTLE_ENDIAN
964 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
965 select SYS_HAS_EARLY_PRINTK
966 select SYS_HAS_CPU_CAVIUM_OCTEON
968 select HAVE_PLAT_DELAY
969 select HAVE_PLAT_FW_INIT_CMDLINE
970 select HAVE_PLAT_MEMCPY
974 select ARCH_SPARSEMEM_ENABLE
975 select SYS_SUPPORTS_SMP
976 select NR_CPUS_DEFAULT_64
977 select MIPS_NR_CPU_NR_MAP_1024
980 select MTD_COMPLEX_MAPPINGS
982 select SYS_SUPPORTS_RELOCATABLE
984 This option supports all of the Octeon reference boards from Cavium
985 Networks. It builds a kernel that dynamically determines the Octeon
986 CPU type and supports all known board reference implementations.
987 Some of the supported boards are:
994 Say Y here for most Octeon reference boards.
997 bool "Netlogic XLR/XLS based systems"
1000 select SYS_HAS_CPU_XLR
1001 select SYS_SUPPORTS_SMP
1003 select SWAP_IO_SPACE
1004 select SYS_SUPPORTS_32BIT_KERNEL
1005 select SYS_SUPPORTS_64BIT_KERNEL
1006 select PHYS_ADDR_T_64BIT
1007 select SYS_SUPPORTS_BIG_ENDIAN
1008 select SYS_SUPPORTS_HIGHMEM
1009 select NR_CPUS_DEFAULT_32
1013 select ZONE_DMA32 if 64BIT
1015 select SYS_HAS_EARLY_PRINTK
1016 select SYS_SUPPORTS_ZBOOT
1017 select SYS_SUPPORTS_ZBOOT_UART16550
1019 Support for systems based on Netlogic XLR and XLS processors.
1020 Say Y here if you have a XLR or XLS based board.
1022 config NLM_XLP_BOARD
1023 bool "Netlogic XLP based systems"
1026 select SYS_HAS_CPU_XLP
1027 select SYS_SUPPORTS_SMP
1029 select SYS_SUPPORTS_32BIT_KERNEL
1030 select SYS_SUPPORTS_64BIT_KERNEL
1031 select PHYS_ADDR_T_64BIT
1033 select SYS_SUPPORTS_BIG_ENDIAN
1034 select SYS_SUPPORTS_LITTLE_ENDIAN
1035 select SYS_SUPPORTS_HIGHMEM
1036 select NR_CPUS_DEFAULT_32
1040 select ZONE_DMA32 if 64BIT
1042 select SYS_HAS_EARLY_PRINTK
1044 select SYS_SUPPORTS_ZBOOT
1045 select SYS_SUPPORTS_ZBOOT_UART16550
1047 This board is based on Netlogic XLP Processor.
1048 Say Y here if you have a XLP based board.
1052 source "arch/mips/alchemy/Kconfig"
1053 source "arch/mips/ath25/Kconfig"
1054 source "arch/mips/ath79/Kconfig"
1055 source "arch/mips/bcm47xx/Kconfig"
1056 source "arch/mips/bcm63xx/Kconfig"
1057 source "arch/mips/bmips/Kconfig"
1058 source "arch/mips/generic/Kconfig"
1059 source "arch/mips/ingenic/Kconfig"
1060 source "arch/mips/jazz/Kconfig"
1061 source "arch/mips/lantiq/Kconfig"
1062 source "arch/mips/pic32/Kconfig"
1063 source "arch/mips/ralink/Kconfig"
1064 source "arch/mips/sgi-ip27/Kconfig"
1065 source "arch/mips/sibyte/Kconfig"
1066 source "arch/mips/txx9/Kconfig"
1067 source "arch/mips/vr41xx/Kconfig"
1068 source "arch/mips/cavium-octeon/Kconfig"
1069 source "arch/mips/loongson2ef/Kconfig"
1070 source "arch/mips/loongson32/Kconfig"
1071 source "arch/mips/loongson64/Kconfig"
1072 source "arch/mips/netlogic/Kconfig"
1076 config GENERIC_HWEIGHT
1080 config GENERIC_CALIBRATE_DELAY
1084 config SCHED_OMIT_FRAME_POINTER
1089 # Select some configuration options automatically based on user selections.
1094 config ARCH_MAY_HAVE_PC_FDC
1125 select CLOCKSOURCE_WATCHDOG if CPU_FREQ
1131 config MIPS_CLOCK_VSYSCALL
1132 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
1141 config ARCH_SUPPORTS_UPROBES
1144 config DMA_PERDEV_COHERENT
1146 select ARCH_HAS_SETUP_DMA_OPS
1147 select DMA_NONCOHERENT
1149 config DMA_NONCOHERENT
1152 # MIPS allows mixing "slightly different" Cacheability and Coherency
1153 # Attribute bits. It is believed that the uncached access through
1154 # KSEG1 and the implementation specific "uncached accelerated" used
1155 # by pgprot_writcombine can be mixed, and the latter sometimes provides
1156 # significant advantages.
1158 select ARCH_HAS_DMA_WRITE_COMBINE
1159 select ARCH_HAS_DMA_PREP_COHERENT
1160 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
1161 select ARCH_HAS_DMA_SET_UNCACHED
1162 select DMA_NONCOHERENT_MMAP
1163 select NEED_DMA_MAP_STATE
1165 config SYS_HAS_EARLY_PRINTK
1168 config SYS_SUPPORTS_HOTPLUG_CPU
1171 config MIPS_BONITO64
1180 config NO_IOPORT_MAP
1184 def_bool CPU_NO_LOAD_STORE_LR
1186 config GENERIC_ISA_DMA
1188 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
1191 config GENERIC_ISA_DMA_SUPPORT_BROKEN
1193 select GENERIC_ISA_DMA
1195 config HAVE_PLAT_DELAY
1198 config HAVE_PLAT_FW_INIT_CMDLINE
1201 config HAVE_PLAT_MEMCPY
1207 config SYS_SUPPORTS_RELOCATABLE
1210 Selected if the platform supports relocating the kernel.
1211 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
1212 to allow access to command line and entropy sources.
1214 config MIPS_CBPF_JIT
1216 depends on BPF_JIT && HAVE_CBPF_JIT
1218 config MIPS_EBPF_JIT
1220 depends on BPF_JIT && HAVE_EBPF_JIT
1224 # Endianness selection. Sufficiently obscure so many users don't know what to
1225 # answer,so we try hard to limit the available choices. Also the use of a
1226 # choice statement should be more obvious to the user.
1229 prompt "Endianness selection"
1231 Some MIPS machines can be configured for either little or big endian
1232 byte order. These modes require different kernels and a different
1233 Linux distribution. In general there is one preferred byteorder for a
1234 particular system but some systems are just as commonly used in the
1235 one or the other endianness.
1237 config CPU_BIG_ENDIAN
1239 depends on SYS_SUPPORTS_BIG_ENDIAN
1241 config CPU_LITTLE_ENDIAN
1242 bool "Little endian"
1243 depends on SYS_SUPPORTS_LITTLE_ENDIAN
1250 config SYS_SUPPORTS_APM_EMULATION
1253 config SYS_SUPPORTS_BIG_ENDIAN
1256 config SYS_SUPPORTS_LITTLE_ENDIAN
1259 config MIPS_HUGE_TLB_SUPPORT
1260 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1274 config PCI_GT64XXX_PCI0
1277 config PCI_XTALK_BRIDGE
1280 config NO_EXCEPT_FILL
1286 config SWAP_IO_SPACE
1289 config SGI_HAS_INDYDOG
1301 config SGI_HAS_ZILOG
1304 config SGI_HAS_I8042
1307 config DEFAULT_SGI_PARTITION
1319 config MIPS_L1_CACHE_SHIFT_4
1322 config MIPS_L1_CACHE_SHIFT_5
1325 config MIPS_L1_CACHE_SHIFT_6
1328 config MIPS_L1_CACHE_SHIFT_7
1331 config MIPS_L1_CACHE_SHIFT
1333 default "7" if MIPS_L1_CACHE_SHIFT_7
1334 default "6" if MIPS_L1_CACHE_SHIFT_6
1335 default "5" if MIPS_L1_CACHE_SHIFT_5
1336 default "4" if MIPS_L1_CACHE_SHIFT_4
1339 config ARC_CMDLINE_ONLY
1343 bool "ARC console support"
1344 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
1358 menu "CPU selection"
1364 config CPU_LOONGSON64
1365 bool "Loongson 64-bit CPU"
1366 depends on SYS_HAS_CPU_LOONGSON64
1367 select ARCH_HAS_PHYS_TO_DMA
1369 select CPU_HAS_PREFETCH
1370 select CPU_SUPPORTS_64BIT_KERNEL
1371 select CPU_SUPPORTS_HIGHMEM
1372 select CPU_SUPPORTS_HUGEPAGES
1373 select CPU_SUPPORTS_MSA
1374 select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT
1375 select CPU_MIPSR2_IRQ_VI
1376 select WEAK_ORDERING
1377 select WEAK_REORDERING_BEYOND_LLSC
1378 select MIPS_ASID_BITS_VARIABLE
1379 select MIPS_PGD_C0_CONTEXT
1380 select MIPS_L1_CACHE_SHIFT_6
1385 The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
1386 cores implements the MIPS64R2 instruction set with many extensions,
1387 including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
1388 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
1389 Loongson-2E/2F is not covered here and will be removed in future.
1391 config LOONGSON3_ENHANCEMENT
1392 bool "New Loongson-3 CPU Enhancements"
1394 depends on CPU_LOONGSON64
1396 New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
1397 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
1398 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
1399 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
1400 Fast TLB refill support, etc.
1402 This option enable those enhancements which are not probed at run
1403 time. If you want a generic kernel to run on all Loongson 3 machines,
1404 please say 'N' here. If you want a high-performance kernel to run on
1405 new Loongson-3 machines only, please say 'Y' here.
1407 config CPU_LOONGSON3_WORKAROUNDS
1408 bool "Old Loongson-3 LLSC Workarounds"
1410 depends on CPU_LOONGSON64
1412 Loongson-3 processors have the llsc issues which require workarounds.
1413 Without workarounds the system may hang unexpectedly.
1415 Newer Loongson-3 will fix these issues and no workarounds are needed.
1416 The workarounds have no significant side effect on them but may
1417 decrease the performance of the system so this option should be
1418 disabled unless the kernel is intended to be run on old systems.
1420 If unsure, please say Y.
1422 config CPU_LOONGSON3_CPUCFG_EMULATION
1423 bool "Emulate the CPUCFG instruction on older Loongson cores"
1425 depends on CPU_LOONGSON64
1427 Loongson-3A R4 and newer have the CPUCFG instruction available for
1428 userland to query CPU capabilities, much like CPUID on x86. This
1429 option provides emulation of the instruction on older Loongson
1430 cores, back to Loongson-3A1000.
1432 If unsure, please say Y.
1434 config CPU_LOONGSON2E
1436 depends on SYS_HAS_CPU_LOONGSON2E
1437 select CPU_LOONGSON2EF
1439 The Loongson 2E processor implements the MIPS III instruction set
1440 with many extensions.
1442 It has an internal FPGA northbridge, which is compatible to
1445 config CPU_LOONGSON2F
1447 depends on SYS_HAS_CPU_LOONGSON2F
1448 select CPU_LOONGSON2EF
1451 The Loongson 2F processor implements the MIPS III instruction set
1452 with many extensions.
1454 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
1455 have a similar programming interface with FPGA northbridge used in
1458 config CPU_LOONGSON1B
1460 depends on SYS_HAS_CPU_LOONGSON1B
1461 select CPU_LOONGSON32
1462 select LEDS_GPIO_REGISTER
1464 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1465 Release 1 instruction set and part of the MIPS32 Release 2
1468 config CPU_LOONGSON1C
1470 depends on SYS_HAS_CPU_LOONGSON1C
1471 select CPU_LOONGSON32
1472 select LEDS_GPIO_REGISTER
1474 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
1475 Release 1 instruction set and part of the MIPS32 Release 2
1478 config CPU_MIPS32_R1
1479 bool "MIPS32 Release 1"
1480 depends on SYS_HAS_CPU_MIPS32_R1
1481 select CPU_HAS_PREFETCH
1482 select CPU_SUPPORTS_32BIT_KERNEL
1483 select CPU_SUPPORTS_HIGHMEM
1485 Choose this option to build a kernel for release 1 or later of the
1486 MIPS32 architecture. Most modern embedded systems with a 32-bit
1487 MIPS processor are based on a MIPS32 processor. If you know the
1488 specific type of processor in your system, choose those that one
1489 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1490 Release 2 of the MIPS32 architecture is available since several
1491 years so chances are you even have a MIPS32 Release 2 processor
1492 in which case you should choose CPU_MIPS32_R2 instead for better
1495 config CPU_MIPS32_R2
1496 bool "MIPS32 Release 2"
1497 depends on SYS_HAS_CPU_MIPS32_R2
1498 select CPU_HAS_PREFETCH
1499 select CPU_SUPPORTS_32BIT_KERNEL
1500 select CPU_SUPPORTS_HIGHMEM
1501 select CPU_SUPPORTS_MSA
1504 Choose this option to build a kernel for release 2 or later of the
1505 MIPS32 architecture. Most modern embedded systems with a 32-bit
1506 MIPS processor are based on a MIPS32 processor. If you know the
1507 specific type of processor in your system, choose those that one
1508 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1510 config CPU_MIPS32_R5
1511 bool "MIPS32 Release 5"
1512 depends on SYS_HAS_CPU_MIPS32_R5
1513 select CPU_HAS_PREFETCH
1514 select CPU_SUPPORTS_32BIT_KERNEL
1515 select CPU_SUPPORTS_HIGHMEM
1516 select CPU_SUPPORTS_MSA
1518 select MIPS_O32_FP64_SUPPORT
1520 Choose this option to build a kernel for release 5 or later of the
1521 MIPS32 architecture. New MIPS processors, starting with the Warrior
1522 family, are based on a MIPS32r5 processor. If you own an older
1523 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1525 config CPU_MIPS32_R6
1526 bool "MIPS32 Release 6"
1527 depends on SYS_HAS_CPU_MIPS32_R6
1528 select CPU_HAS_PREFETCH
1529 select CPU_NO_LOAD_STORE_LR
1530 select CPU_SUPPORTS_32BIT_KERNEL
1531 select CPU_SUPPORTS_HIGHMEM
1532 select CPU_SUPPORTS_MSA
1534 select MIPS_O32_FP64_SUPPORT
1536 Choose this option to build a kernel for release 6 or later of the
1537 MIPS32 architecture. New MIPS processors, starting with the Warrior
1538 family, are based on a MIPS32r6 processor. If you own an older
1539 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1541 config CPU_MIPS64_R1
1542 bool "MIPS64 Release 1"
1543 depends on SYS_HAS_CPU_MIPS64_R1
1544 select CPU_HAS_PREFETCH
1545 select CPU_SUPPORTS_32BIT_KERNEL
1546 select CPU_SUPPORTS_64BIT_KERNEL
1547 select CPU_SUPPORTS_HIGHMEM
1548 select CPU_SUPPORTS_HUGEPAGES
1550 Choose this option to build a kernel for release 1 or later of the
1551 MIPS64 architecture. Many modern embedded systems with a 64-bit
1552 MIPS processor are based on a MIPS64 processor. If you know the
1553 specific type of processor in your system, choose those that one
1554 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1555 Release 2 of the MIPS64 architecture is available since several
1556 years so chances are you even have a MIPS64 Release 2 processor
1557 in which case you should choose CPU_MIPS64_R2 instead for better
1560 config CPU_MIPS64_R2
1561 bool "MIPS64 Release 2"
1562 depends on SYS_HAS_CPU_MIPS64_R2
1563 select CPU_HAS_PREFETCH
1564 select CPU_SUPPORTS_32BIT_KERNEL
1565 select CPU_SUPPORTS_64BIT_KERNEL
1566 select CPU_SUPPORTS_HIGHMEM
1567 select CPU_SUPPORTS_HUGEPAGES
1568 select CPU_SUPPORTS_MSA
1571 Choose this option to build a kernel for release 2 or later of the
1572 MIPS64 architecture. Many modern embedded systems with a 64-bit
1573 MIPS processor are based on a MIPS64 processor. If you know the
1574 specific type of processor in your system, choose those that one
1575 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1577 config CPU_MIPS64_R5
1578 bool "MIPS64 Release 5"
1579 depends on SYS_HAS_CPU_MIPS64_R5
1580 select CPU_HAS_PREFETCH
1581 select CPU_SUPPORTS_32BIT_KERNEL
1582 select CPU_SUPPORTS_64BIT_KERNEL
1583 select CPU_SUPPORTS_HIGHMEM
1584 select CPU_SUPPORTS_HUGEPAGES
1585 select CPU_SUPPORTS_MSA
1586 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1589 Choose this option to build a kernel for release 5 or later of the
1590 MIPS64 architecture. This is a intermediate MIPS architecture
1591 release partly implementing release 6 features. Though there is no
1592 any hardware known to be based on this release.
1594 config CPU_MIPS64_R6
1595 bool "MIPS64 Release 6"
1596 depends on SYS_HAS_CPU_MIPS64_R6
1597 select CPU_HAS_PREFETCH
1598 select CPU_NO_LOAD_STORE_LR
1599 select CPU_SUPPORTS_32BIT_KERNEL
1600 select CPU_SUPPORTS_64BIT_KERNEL
1601 select CPU_SUPPORTS_HIGHMEM
1602 select CPU_SUPPORTS_HUGEPAGES
1603 select CPU_SUPPORTS_MSA
1604 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1607 Choose this option to build a kernel for release 6 or later of the
1608 MIPS64 architecture. New MIPS processors, starting with the Warrior
1609 family, are based on a MIPS64r6 processor. If you own an older
1610 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
1613 bool "MIPS Warrior P5600"
1614 depends on SYS_HAS_CPU_P5600
1615 select CPU_HAS_PREFETCH
1616 select CPU_SUPPORTS_32BIT_KERNEL
1617 select CPU_SUPPORTS_HIGHMEM
1618 select CPU_SUPPORTS_MSA
1619 select CPU_SUPPORTS_CPUFREQ
1620 select CPU_MIPSR2_IRQ_VI
1621 select CPU_MIPSR2_IRQ_EI
1623 select MIPS_O32_FP64_SUPPORT
1625 Choose this option to build a kernel for MIPS Warrior P5600 CPU.
1626 It's based on MIPS32r5 ISA with XPA, EVA, dual/quad issue exec pipes,
1627 MMU with two-levels TLB, UCA, MSA, MDU core level features and system
1628 level features like up to six P5600 calculation cores, CM2 with L2
1629 cache, IOCU/IOMMU (though might be unused depending on the system-
1630 specific IP core configuration), GIC, CPC, virtualisation module,
1635 depends on SYS_HAS_CPU_R3000
1638 select CPU_SUPPORTS_32BIT_KERNEL
1639 select CPU_SUPPORTS_HIGHMEM
1641 Please make sure to pick the right CPU type. Linux/MIPS is not
1642 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
1643 *not* work on R4000 machines and vice versa. However, since most
1644 of the supported machines have an R4000 (or similar) CPU, R4x00
1645 might be a safe bet. If the resulting kernel does not work,
1646 try to recompile with R3000.
1650 depends on SYS_HAS_CPU_TX39XX
1651 select CPU_SUPPORTS_32BIT_KERNEL
1656 depends on SYS_HAS_CPU_VR41XX
1657 select CPU_SUPPORTS_32BIT_KERNEL
1658 select CPU_SUPPORTS_64BIT_KERNEL
1660 The options selects support for the NEC VR4100 series of processors.
1661 Only choose this option if you have one of these processors as a
1662 kernel built with this option will not run on any other type of
1663 processor or vice versa.
1667 depends on SYS_HAS_CPU_R4300
1668 select CPU_SUPPORTS_32BIT_KERNEL
1669 select CPU_SUPPORTS_64BIT_KERNEL
1670 select CPU_HAS_LOAD_STORE_LR
1672 MIPS Technologies R4300-series processors.
1676 depends on SYS_HAS_CPU_R4X00
1677 select CPU_SUPPORTS_32BIT_KERNEL
1678 select CPU_SUPPORTS_64BIT_KERNEL
1679 select CPU_SUPPORTS_HUGEPAGES
1681 MIPS Technologies R4000-series processors other than 4300, including
1682 the R4000, R4400, R4600, and 4700.
1686 depends on SYS_HAS_CPU_TX49XX
1687 select CPU_HAS_PREFETCH
1688 select CPU_SUPPORTS_32BIT_KERNEL
1689 select CPU_SUPPORTS_64BIT_KERNEL
1690 select CPU_SUPPORTS_HUGEPAGES
1694 depends on SYS_HAS_CPU_R5000
1695 select CPU_SUPPORTS_32BIT_KERNEL
1696 select CPU_SUPPORTS_64BIT_KERNEL
1697 select CPU_SUPPORTS_HUGEPAGES
1699 MIPS Technologies R5000-series processors other than the Nevada.
1703 depends on SYS_HAS_CPU_R5500
1704 select CPU_SUPPORTS_32BIT_KERNEL
1705 select CPU_SUPPORTS_64BIT_KERNEL
1706 select CPU_SUPPORTS_HUGEPAGES
1708 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1713 depends on SYS_HAS_CPU_NEVADA
1714 select CPU_SUPPORTS_32BIT_KERNEL
1715 select CPU_SUPPORTS_64BIT_KERNEL
1716 select CPU_SUPPORTS_HUGEPAGES
1718 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
1722 depends on SYS_HAS_CPU_R10000
1723 select CPU_HAS_PREFETCH
1724 select CPU_SUPPORTS_32BIT_KERNEL
1725 select CPU_SUPPORTS_64BIT_KERNEL
1726 select CPU_SUPPORTS_HIGHMEM
1727 select CPU_SUPPORTS_HUGEPAGES
1729 MIPS Technologies R10000-series processors.
1733 depends on SYS_HAS_CPU_RM7000
1734 select CPU_HAS_PREFETCH
1735 select CPU_SUPPORTS_32BIT_KERNEL
1736 select CPU_SUPPORTS_64BIT_KERNEL
1737 select CPU_SUPPORTS_HIGHMEM
1738 select CPU_SUPPORTS_HUGEPAGES
1742 depends on SYS_HAS_CPU_SB1
1743 select CPU_SUPPORTS_32BIT_KERNEL
1744 select CPU_SUPPORTS_64BIT_KERNEL
1745 select CPU_SUPPORTS_HIGHMEM
1746 select CPU_SUPPORTS_HUGEPAGES
1747 select WEAK_ORDERING
1749 config CPU_CAVIUM_OCTEON
1750 bool "Cavium Octeon processor"
1751 depends on SYS_HAS_CPU_CAVIUM_OCTEON
1752 select CPU_HAS_PREFETCH
1753 select CPU_SUPPORTS_64BIT_KERNEL
1754 select WEAK_ORDERING
1755 select CPU_SUPPORTS_HIGHMEM
1756 select CPU_SUPPORTS_HUGEPAGES
1757 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1758 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1759 select MIPS_L1_CACHE_SHIFT_7
1762 The Cavium Octeon processor is a highly integrated chip containing
1763 many ethernet hardware widgets for networking tasks. The processor
1764 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1765 Full details can be found at http://www.caviumnetworks.com.
1768 bool "Broadcom BMIPS"
1769 depends on SYS_HAS_CPU_BMIPS
1771 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
1772 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1773 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1774 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1775 select CPU_SUPPORTS_32BIT_KERNEL
1776 select DMA_NONCOHERENT
1778 select SWAP_IO_SPACE
1779 select WEAK_ORDERING
1780 select CPU_SUPPORTS_HIGHMEM
1781 select CPU_HAS_PREFETCH
1782 select CPU_SUPPORTS_CPUFREQ
1783 select MIPS_EXTERNAL_TIMER
1785 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
1788 bool "Netlogic XLR SoC"
1789 depends on SYS_HAS_CPU_XLR
1790 select CPU_SUPPORTS_32BIT_KERNEL
1791 select CPU_SUPPORTS_64BIT_KERNEL
1792 select CPU_SUPPORTS_HIGHMEM
1793 select CPU_SUPPORTS_HUGEPAGES
1794 select WEAK_ORDERING
1795 select WEAK_REORDERING_BEYOND_LLSC
1797 Netlogic Microsystems XLR/XLS processors.
1800 bool "Netlogic XLP SoC"
1801 depends on SYS_HAS_CPU_XLP
1802 select CPU_SUPPORTS_32BIT_KERNEL
1803 select CPU_SUPPORTS_64BIT_KERNEL
1804 select CPU_SUPPORTS_HIGHMEM
1805 select WEAK_ORDERING
1806 select WEAK_REORDERING_BEYOND_LLSC
1807 select CPU_HAS_PREFETCH
1809 select CPU_SUPPORTS_HUGEPAGES
1810 select MIPS_ASID_BITS_VARIABLE
1812 Netlogic Microsystems XLP processors.
1815 config CPU_MIPS32_3_5_FEATURES
1816 bool "MIPS32 Release 3.5 Features"
1817 depends on SYS_HAS_CPU_MIPS32_R3_5
1818 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6 || \
1821 Choose this option to build a kernel for release 2 or later of the
1822 MIPS32 architecture including features from the 3.5 release such as
1823 support for Enhanced Virtual Addressing (EVA).
1825 config CPU_MIPS32_3_5_EVA
1826 bool "Enhanced Virtual Addressing (EVA)"
1827 depends on CPU_MIPS32_3_5_FEATURES
1831 Choose this option if you want to enable the Enhanced Virtual
1832 Addressing (EVA) on your MIPS32 core (such as proAptiv).
1833 One of its primary benefits is an increase in the maximum size
1834 of lowmem (up to 3GB). If unsure, say 'N' here.
1836 config CPU_MIPS32_R5_FEATURES
1837 bool "MIPS32 Release 5 Features"
1838 depends on SYS_HAS_CPU_MIPS32_R5
1839 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_P5600
1841 Choose this option to build a kernel for release 2 or later of the
1842 MIPS32 architecture including features from release 5 such as
1843 support for Extended Physical Addressing (XPA).
1845 config CPU_MIPS32_R5_XPA
1846 bool "Extended Physical Addressing (XPA)"
1847 depends on CPU_MIPS32_R5_FEATURES
1849 depends on !PAGE_SIZE_4KB
1850 depends on SYS_SUPPORTS_HIGHMEM
1853 select PHYS_ADDR_T_64BIT
1856 Choose this option if you want to enable the Extended Physical
1857 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1858 benefit is to increase physical addressing equal to or greater
1859 than 40 bits. Note that this has the side effect of turning on
1860 64-bit addressing which in turn makes the PTEs 64-bit in size.
1861 If unsure, say 'N' here.
1864 config CPU_NOP_WORKAROUNDS
1867 config CPU_JUMP_WORKAROUNDS
1870 config CPU_LOONGSON2F_WORKAROUNDS
1871 bool "Loongson 2F Workarounds"
1873 select CPU_NOP_WORKAROUNDS
1874 select CPU_JUMP_WORKAROUNDS
1876 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1877 require workarounds. Without workarounds the system may hang
1878 unexpectedly. For more information please refer to the gas
1879 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1881 Loongson 2F03 and later have fixed these issues and no workarounds
1882 are needed. The workarounds have no significant side effect on them
1883 but may decrease the performance of the system so this option should
1884 be disabled unless the kernel is intended to be run on 2F01 or 2F02
1887 If unsure, please say Y.
1888 endif # CPU_LOONGSON2F
1890 config SYS_SUPPORTS_ZBOOT
1892 select HAVE_KERNEL_GZIP
1893 select HAVE_KERNEL_BZIP2
1894 select HAVE_KERNEL_LZ4
1895 select HAVE_KERNEL_LZMA
1896 select HAVE_KERNEL_LZO
1897 select HAVE_KERNEL_XZ
1898 select HAVE_KERNEL_ZSTD
1900 config SYS_SUPPORTS_ZBOOT_UART16550
1902 select SYS_SUPPORTS_ZBOOT
1904 config SYS_SUPPORTS_ZBOOT_UART_PROM
1906 select SYS_SUPPORTS_ZBOOT
1908 config CPU_LOONGSON2EF
1910 select CPU_SUPPORTS_32BIT_KERNEL
1911 select CPU_SUPPORTS_64BIT_KERNEL
1912 select CPU_SUPPORTS_HIGHMEM
1913 select CPU_SUPPORTS_HUGEPAGES
1914 select ARCH_HAS_PHYS_TO_DMA
1916 config CPU_LOONGSON32
1920 select CPU_HAS_PREFETCH
1921 select CPU_SUPPORTS_32BIT_KERNEL
1922 select CPU_SUPPORTS_HIGHMEM
1923 select CPU_SUPPORTS_CPUFREQ
1925 config CPU_BMIPS32_3300
1926 select SMP_UP if SMP
1929 config CPU_BMIPS4350
1931 select SYS_SUPPORTS_SMP
1932 select SYS_SUPPORTS_HOTPLUG_CPU
1934 config CPU_BMIPS4380
1936 select MIPS_L1_CACHE_SHIFT_6
1937 select SYS_SUPPORTS_SMP
1938 select SYS_SUPPORTS_HOTPLUG_CPU
1941 config CPU_BMIPS5000
1943 select MIPS_CPU_SCACHE
1944 select MIPS_L1_CACHE_SHIFT_7
1945 select SYS_SUPPORTS_SMP
1946 select SYS_SUPPORTS_HOTPLUG_CPU
1949 config SYS_HAS_CPU_LOONGSON64
1951 select CPU_SUPPORTS_CPUFREQ
1954 config SYS_HAS_CPU_LOONGSON2E
1957 config SYS_HAS_CPU_LOONGSON2F
1959 select CPU_SUPPORTS_CPUFREQ
1960 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
1962 config SYS_HAS_CPU_LOONGSON1B
1965 config SYS_HAS_CPU_LOONGSON1C
1968 config SYS_HAS_CPU_MIPS32_R1
1971 config SYS_HAS_CPU_MIPS32_R2
1974 config SYS_HAS_CPU_MIPS32_R3_5
1977 config SYS_HAS_CPU_MIPS32_R5
1979 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1981 config SYS_HAS_CPU_MIPS32_R6
1983 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1985 config SYS_HAS_CPU_MIPS64_R1
1988 config SYS_HAS_CPU_MIPS64_R2
1991 config SYS_HAS_CPU_MIPS64_R6
1993 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1995 config SYS_HAS_CPU_P5600
1997 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1999 config SYS_HAS_CPU_R3000
2002 config SYS_HAS_CPU_TX39XX
2005 config SYS_HAS_CPU_VR41XX
2008 config SYS_HAS_CPU_R4300
2011 config SYS_HAS_CPU_R4X00
2014 config SYS_HAS_CPU_TX49XX
2017 config SYS_HAS_CPU_R5000
2020 config SYS_HAS_CPU_R5500
2023 config SYS_HAS_CPU_NEVADA
2026 config SYS_HAS_CPU_R10000
2028 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2030 config SYS_HAS_CPU_RM7000
2033 config SYS_HAS_CPU_SB1
2036 config SYS_HAS_CPU_CAVIUM_OCTEON
2039 config SYS_HAS_CPU_BMIPS
2042 config SYS_HAS_CPU_BMIPS32_3300
2044 select SYS_HAS_CPU_BMIPS
2046 config SYS_HAS_CPU_BMIPS4350
2048 select SYS_HAS_CPU_BMIPS
2050 config SYS_HAS_CPU_BMIPS4380
2052 select SYS_HAS_CPU_BMIPS
2054 config SYS_HAS_CPU_BMIPS5000
2056 select SYS_HAS_CPU_BMIPS
2057 select ARCH_HAS_SYNC_DMA_FOR_CPU
2059 config SYS_HAS_CPU_XLR
2062 config SYS_HAS_CPU_XLP
2066 # CPU may reorder R->R, R->W, W->R, W->W
2067 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
2069 config WEAK_ORDERING
2073 # CPU may reorder reads and writes beyond LL/SC
2074 # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
2076 config WEAK_REORDERING_BEYOND_LLSC
2081 # These two indicate any level of the MIPS32 and MIPS64 architecture
2085 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R5 || \
2086 CPU_MIPS32_R6 || CPU_P5600
2090 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \
2091 CPU_MIPS64_R6 || CPU_LOONGSON64 || CPU_CAVIUM_OCTEON
2094 # These indicate the revision of the architecture
2098 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
2102 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
2104 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2109 default y if CPU_MIPS32_R5 || CPU_MIPS64_R5 || CPU_P5600
2111 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2116 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
2118 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2119 select HAVE_ARCH_BITREVERSE
2120 select MIPS_ASID_BITS_VARIABLE
2121 select MIPS_CRC_SUPPORT
2124 config TARGET_ISA_REV
2126 default 1 if CPU_MIPSR1
2127 default 2 if CPU_MIPSR2
2128 default 5 if CPU_MIPSR5
2129 default 6 if CPU_MIPSR6
2132 Reflects the ISA revision being targeted by the kernel build. This
2133 is effectively the Kconfig equivalent of MIPS_ISA_REV.
2141 config SYS_SUPPORTS_32BIT_KERNEL
2143 config SYS_SUPPORTS_64BIT_KERNEL
2145 config CPU_SUPPORTS_32BIT_KERNEL
2147 config CPU_SUPPORTS_64BIT_KERNEL
2149 config CPU_SUPPORTS_CPUFREQ
2151 config CPU_SUPPORTS_ADDRWINCFG
2153 config CPU_SUPPORTS_HUGEPAGES
2155 depends on !(32BIT && (ARCH_PHYS_ADDR_T_64BIT || EVA))
2156 config MIPS_PGD_C0_CONTEXT
2159 default y if (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP
2162 # Set to y for ptrace access to watch registers.
2164 config HARDWARE_WATCHPOINTS
2166 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
2171 prompt "Kernel code model"
2173 You should only select this option if you have a workload that
2174 actually benefits from 64-bit processing or if your machine has
2175 large memory. You will only be presented a single option in this
2176 menu if your system does not support both 32-bit and 64-bit kernels.
2179 bool "32-bit kernel"
2180 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
2183 Select this option if you want to build a 32-bit kernel.
2186 bool "64-bit kernel"
2187 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
2189 Select this option if you want to build a 64-bit kernel.
2193 config MIPS_VA_BITS_48
2194 bool "48 bits virtual memory"
2197 Support a maximum at least 48 bits of application virtual
2198 memory. Default is 40 bits or less, depending on the CPU.
2199 For page sizes 16k and above, this option results in a small
2200 memory overhead for page tables. For 4k page size, a fourth
2201 level of page tables is added which imposes both a memory
2202 overhead as well as slower TLB fault handling.
2207 prompt "Kernel page size"
2208 default PAGE_SIZE_4KB
2210 config PAGE_SIZE_4KB
2212 depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64
2214 This option select the standard 4kB Linux page size. On some
2215 R3000-family processors this is the only available page size. Using
2216 4kB page size will minimize memory consumption and is therefore
2217 recommended for low memory systems.
2219 config PAGE_SIZE_8KB
2221 depends on CPU_CAVIUM_OCTEON
2222 depends on !MIPS_VA_BITS_48
2224 Using 8kB page size will result in higher performance kernel at
2225 the price of higher memory consumption. This option is available
2226 only on cnMIPS processors. Note that you will need a suitable Linux
2227 distribution to support this.
2229 config PAGE_SIZE_16KB
2231 depends on !CPU_R3000 && !CPU_TX39XX
2233 Using 16kB page size will result in higher performance kernel at
2234 the price of higher memory consumption. This option is available on
2235 all non-R3000 family processors. Note that you will need a suitable
2236 Linux distribution to support this.
2238 config PAGE_SIZE_32KB
2240 depends on CPU_CAVIUM_OCTEON
2241 depends on !MIPS_VA_BITS_48
2243 Using 32kB page size will result in higher performance kernel at
2244 the price of higher memory consumption. This option is available
2245 only on cnMIPS cores. Note that you will need a suitable Linux
2246 distribution to support this.
2248 config PAGE_SIZE_64KB
2250 depends on !CPU_R3000 && !CPU_TX39XX
2252 Using 64kB page size will result in higher performance kernel at
2253 the price of higher memory consumption. This option is available on
2254 all non-R3000 family processor. Not that at the time of this
2255 writing this option is still high experimental.
2259 config FORCE_MAX_ZONEORDER
2260 int "Maximum zone order"
2261 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2262 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2263 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2264 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2265 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2266 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2270 The kernel memory allocator divides physically contiguous memory
2271 blocks into "zones", where each zone is a power of two number of
2272 pages. This option selects the largest power of two that the kernel
2273 keeps in the memory allocator. If you need to allocate very large
2274 blocks of physically contiguous memory, then you may need to
2275 increase this value.
2277 This config option is actually maximum order plus one. For example,
2278 a value of 11 means that the largest free memory block is 2^10 pages.
2280 The page size is not necessarily 4KB. Keep this in mind
2281 when choosing a value for this option.
2286 config IP22_CPU_SCACHE
2291 # Support for a MIPS32 / MIPS64 style S-caches
2293 config MIPS_CPU_SCACHE
2297 config R5000_CPU_SCACHE
2301 config RM7000_CPU_SCACHE
2305 config SIBYTE_DMA_PAGEOPS
2306 bool "Use DMA to clear/copy pages"
2309 Instead of using the CPU to zero and copy pages, use a Data Mover
2310 channel. These DMA channels are otherwise unused by the standard
2311 SiByte Linux port. Seems to give a small performance benefit.
2313 config CPU_HAS_PREFETCH
2316 config CPU_GENERIC_DUMP_TLB
2318 default y if !(CPU_R3000 || CPU_TX39XX)
2320 config MIPS_FP_SUPPORT
2321 bool "Floating Point support" if EXPERT
2324 Select y to include support for floating point in the kernel
2325 including initialization of FPU hardware, FP context save & restore
2326 and emulation of an FPU where necessary. Without this support any
2327 userland program attempting to use floating point instructions will
2330 If you know that your userland will not attempt to use floating point
2331 instructions then you can say n here to shrink the kernel a little.
2335 config CPU_R2300_FPU
2337 depends on MIPS_FP_SUPPORT
2338 default y if CPU_R3000 || CPU_TX39XX
2345 depends on MIPS_FP_SUPPORT
2346 default y if !CPU_R2300_FPU
2348 config CPU_R4K_CACHE_TLB
2350 default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
2353 bool "MIPS MT SMP support (1 TC on each available VPE)"
2355 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
2356 select CPU_MIPSR2_IRQ_VI
2357 select CPU_MIPSR2_IRQ_EI
2362 select SYS_SUPPORTS_SMP
2363 select SYS_SUPPORTS_SCHED_SMT
2364 select MIPS_PERF_SHARED_TC_COUNTERS
2366 This is a kernel model which is known as SMVP. This is supported
2367 on cores with the MT ASE and uses the available VPEs to implement
2368 virtual processors which supports SMP. This is equivalent to the
2369 Intel Hyperthreading feature. For further information go to
2370 <http://www.imgtec.com/mips/mips-multithreading.asp>.
2376 bool "SMT (multithreading) scheduler support"
2377 depends on SYS_SUPPORTS_SCHED_SMT
2380 SMT scheduler support improves the CPU scheduler's decision making
2381 when dealing with MIPS MT enabled cores at a cost of slightly
2382 increased overhead in some places. If unsure say N here.
2384 config SYS_SUPPORTS_SCHED_SMT
2387 config SYS_SUPPORTS_MULTITHREADING
2390 config MIPS_MT_FPAFF
2391 bool "Dynamic FPU affinity for FP-intensive threads"
2393 depends on MIPS_MT_SMP
2395 config MIPSR2_TO_R6_EMULATOR
2396 bool "MIPS R2-to-R6 emulator"
2397 depends on CPU_MIPSR6
2398 depends on MIPS_FP_SUPPORT
2401 Choose this option if you want to run non-R6 MIPS userland code.
2402 Even if you say 'Y' here, the emulator will still be disabled by
2403 default. You can enable it using the 'mipsr2emu' kernel option.
2404 The only reason this is a build-time option is to save ~14K from the
2407 config SYS_SUPPORTS_VPE_LOADER
2409 depends on SYS_SUPPORTS_MULTITHREADING
2411 Indicates that the platform supports the VPE loader, and provides
2414 config MIPS_VPE_LOADER
2415 bool "VPE loader support."
2416 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
2417 select CPU_MIPSR2_IRQ_VI
2418 select CPU_MIPSR2_IRQ_EI
2421 Includes a loader for loading an elf relocatable object
2422 onto another VPE and running it.
2424 config MIPS_VPE_LOADER_CMP
2427 depends on MIPS_VPE_LOADER && MIPS_CMP
2429 config MIPS_VPE_LOADER_MT
2432 depends on MIPS_VPE_LOADER && !MIPS_CMP
2434 config MIPS_VPE_LOADER_TOM
2435 bool "Load VPE program into memory hidden from linux"
2436 depends on MIPS_VPE_LOADER
2439 The loader can use memory that is present but has been hidden from
2440 Linux using the kernel command line option "mem=xxMB". It's up to
2441 you to ensure the amount you put in the option and the space your
2442 program requires is less or equal to the amount physically present.
2444 config MIPS_VPE_APSP_API
2445 bool "Enable support for AP/SP API (RTLX)"
2446 depends on MIPS_VPE_LOADER
2448 config MIPS_VPE_APSP_API_CMP
2451 depends on MIPS_VPE_APSP_API && MIPS_CMP
2453 config MIPS_VPE_APSP_API_MT
2456 depends on MIPS_VPE_APSP_API && !MIPS_CMP
2459 bool "MIPS CMP framework support (DEPRECATED)"
2460 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
2463 select SYS_SUPPORTS_SMP
2464 select WEAK_ORDERING
2467 Select this if you are using a bootloader which implements the "CMP
2468 framework" protocol (ie. YAMON) and want your kernel to make use of
2469 its ability to start secondary CPUs.
2471 Unless you have a specific need, you should use CONFIG_MIPS_CPS
2475 bool "MIPS Coherent Processing System support"
2476 depends on SYS_SUPPORTS_MIPS_CPS
2478 select MIPS_CPS_PM if HOTPLUG_CPU
2480 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
2481 select SYS_SUPPORTS_HOTPLUG_CPU
2482 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
2483 select SYS_SUPPORTS_SMP
2484 select WEAK_ORDERING
2485 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
2487 Select this if you wish to run an SMP kernel across multiple cores
2488 within a MIPS Coherent Processing System. When this option is
2489 enabled the kernel will probe for other cores and boot them with
2490 no external assistance. It is safe to enable this when hardware
2491 support is unavailable.
2504 config SB1_PASS_2_WORKAROUNDS
2506 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
2509 config SB1_PASS_2_1_WORKAROUNDS
2511 depends on CPU_SB1 && CPU_SB1_PASS_2
2515 prompt "SmartMIPS or microMIPS ASE support"
2517 config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
2520 Select this if you want neither microMIPS nor SmartMIPS support
2522 config CPU_HAS_SMARTMIPS
2523 depends on SYS_SUPPORTS_SMARTMIPS
2526 SmartMIPS is a extension of the MIPS32 architecture aimed at
2527 increased security at both hardware and software level for
2528 smartcards. Enabling this option will allow proper use of the
2529 SmartMIPS instructions by Linux applications. However a kernel with
2530 this option will not work on a MIPS core without SmartMIPS core. If
2531 you don't know you probably don't have SmartMIPS and should say N
2534 config CPU_MICROMIPS
2535 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
2538 When this option is enabled the kernel will be built using the
2544 bool "Support for the MIPS SIMD Architecture"
2545 depends on CPU_SUPPORTS_MSA
2546 depends on MIPS_FP_SUPPORT
2547 depends on 64BIT || MIPS_O32_FP64_SUPPORT
2549 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2550 and a set of SIMD instructions to operate on them. When this option
2551 is enabled the kernel will support allocating & switching MSA
2552 vector register contexts. If you know that your kernel will only be
2553 running on CPUs which do not support MSA or that your userland will
2554 not be making use of it then you may wish to say N here to reduce
2555 the size & complexity of your kernel.
2566 depends on !CPU_DIEI_BROKEN
2569 config CPU_DIEI_BROKEN
2575 config CPU_NO_LOAD_STORE_LR
2578 CPU lacks support for unaligned load and store instructions:
2579 LWL, LWR, SWL, SWR (Load/store word left/right).
2580 LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit
2584 # Vectored interrupt mode is an R2 feature
2586 config CPU_MIPSR2_IRQ_VI
2590 # Extended interrupt mode is an R2 feature
2592 config CPU_MIPSR2_IRQ_EI
2597 depends on !CPU_R3000
2603 config CPU_DADDI_WORKAROUNDS
2606 config CPU_R4000_WORKAROUNDS
2608 select CPU_R4400_WORKAROUNDS
2610 config CPU_R4400_WORKAROUNDS
2613 config CPU_R4X00_BUGS64
2615 default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
2617 config MIPS_ASID_SHIFT
2619 default 6 if CPU_R3000 || CPU_TX39XX
2622 config MIPS_ASID_BITS
2624 default 0 if MIPS_ASID_BITS_VARIABLE
2625 default 6 if CPU_R3000 || CPU_TX39XX
2628 config MIPS_ASID_BITS_VARIABLE
2631 config MIPS_CRC_SUPPORT
2634 # R4600 erratum. Due to the lack of errata information the exact
2635 # technical details aren't known. I've experimentally found that disabling
2636 # interrupts during indexed I-cache flushes seems to be sufficient to deal
2638 config WAR_R4600_V1_INDEX_ICACHEOP
2641 # Pleasures of the R4600 V1.x. Cite from the IDT R4600 V1.7 errata:
2643 # 18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D,
2644 # Hit_Invalidate_D and Create_Dirty_Excl_D should only be
2645 # executed if there is no other dcache activity. If the dcache is
2646 # accessed for another instruction immediately preceding when these
2647 # cache instructions are executing, it is possible that the dcache
2648 # tag match outputs used by these cache instructions will be
2649 # incorrect. These cache instructions should be preceded by at least
2650 # four instructions that are not any kind of load or store
2653 # This is not allowed: lw
2657 # cache Hit_Writeback_Invalidate_D
2659 # This is allowed: lw
2664 # cache Hit_Writeback_Invalidate_D
2665 config WAR_R4600_V1_HIT_CACHEOP
2668 # Writeback and invalidate the primary cache dcache before DMA.
2670 # R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Inv_D,
2671 # Hit_Writeback_D, Hit_Invalidate_D and Create_Dirty_Exclusive_D will only
2672 # operate correctly if the internal data cache refill buffer is empty. These
2673 # CACHE instructions should be separated from any potential data cache miss
2674 # by a load instruction to an uncached address to empty the response buffer."
2675 # (Revision 2.0 device errata from IDT available on https://www.idt.com/
2677 config WAR_R4600_V2_HIT_CACHEOP
2680 # From TX49/H2 manual: "If the instruction (i.e. CACHE) is issued for
2681 # the line which this instruction itself exists, the following
2682 # operation is not guaranteed."
2684 # Workaround: do two phase flushing for Index_Invalidate_I
2685 config WAR_TX49XX_ICACHE_INDEX_INV
2688 # The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra
2689 # opposes it being called that) where invalid instructions in the same
2690 # I-cache line worth of instructions being fetched may case spurious
2692 config WAR_ICACHE_REFILLS
2695 # On the R10000 up to version 2.6 (not sure about 2.7) there is a bug that
2696 # may cause ll / sc and lld / scd sequences to execute non-atomically.
2697 config WAR_R10000_LLSC
2700 # 34K core erratum: "Problems Executing the TLBR Instruction"
2701 config WAR_MIPS34K_MISSED_ITLB
2705 # - Highmem only makes sense for the 32-bit kernel.
2706 # - The current highmem code will only work properly on physically indexed
2707 # caches such as R3000, SB1, R7000 or those that look like they're virtually
2708 # indexed such as R4000/R4400 SC and MC versions or R10000. So for the
2709 # moment we protect the user and offer the highmem option only on machines
2710 # where it's known to be safe. This will not offer highmem on a few systems
2711 # such as MIPS32 and MIPS64 CPUs which may have virtual and physically
2712 # indexed CPUs but we're playing safe.
2713 # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2714 # know they might have memory configurations that could make use of highmem
2718 bool "High Memory Support"
2719 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2722 config CPU_SUPPORTS_HIGHMEM
2725 config SYS_SUPPORTS_HIGHMEM
2728 config SYS_SUPPORTS_SMARTMIPS
2731 config SYS_SUPPORTS_MICROMIPS
2734 config SYS_SUPPORTS_MIPS16
2737 This option must be set if a kernel might be executed on a MIPS16-
2738 enabled CPU even if MIPS16 is not actually being used. In other
2739 words, it makes the kernel MIPS16-tolerant.
2741 config CPU_SUPPORTS_MSA
2744 config ARCH_FLATMEM_ENABLE
2746 depends on !NUMA && !CPU_LOONGSON2EF
2748 config ARCH_SPARSEMEM_ENABLE
2750 select SPARSEMEM_STATIC if !SGI_IP27
2754 depends on SYS_SUPPORTS_NUMA
2757 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2758 Access). This option improves performance on systems with more
2759 than two nodes; on two node systems it is generally better to
2760 leave it disabled; on single node systems leave this option
2763 config SYS_SUPPORTS_NUMA
2766 config HAVE_SETUP_PER_CPU_AREA
2770 config NEED_PER_CPU_EMBED_FIRST_CHUNK
2775 bool "Relocatable kernel"
2776 depends on SYS_SUPPORTS_RELOCATABLE
2777 depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || \
2778 CPU_MIPS32_R5 || CPU_MIPS64_R5 || \
2779 CPU_MIPS32_R6 || CPU_MIPS64_R6 || \
2780 CPU_P5600 || CAVIUM_OCTEON_SOC || \
2783 This builds a kernel image that retains relocation information
2784 so it can be loaded someplace besides the default 1MB.
2785 The relocations make the kernel binary about 15% larger,
2786 but are discarded at runtime
2788 config RELOCATION_TABLE_SIZE
2789 hex "Relocation table size"
2790 depends on RELOCATABLE
2791 range 0x0 0x01000000
2792 default "0x00200000" if CPU_LOONGSON64
2793 default "0x00100000"
2795 A table of relocation data will be appended to the kernel binary
2796 and parsed at boot to fix up the relocated kernel.
2798 This option allows the amount of space reserved for the table to be
2799 adjusted, although the default of 1Mb should be ok in most cases.
2801 The build will fail and a valid size suggested if this is too small.
2803 If unsure, leave at the default value.
2805 config RANDOMIZE_BASE
2806 bool "Randomize the address of the kernel image"
2807 depends on RELOCATABLE
2809 Randomizes the physical and virtual address at which the
2810 kernel image is loaded, as a security feature that
2811 deters exploit attempts relying on knowledge of the location
2812 of kernel internals.
2814 Entropy is generated using any coprocessor 0 registers available.
2816 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
2820 config RANDOMIZE_BASE_MAX_OFFSET
2821 hex "Maximum kASLR offset" if EXPERT
2822 depends on RANDOMIZE_BASE
2823 range 0x0 0x40000000 if EVA || 64BIT
2824 range 0x0 0x08000000
2825 default "0x01000000"
2827 When kASLR is active, this provides the maximum offset that will
2828 be applied to the kernel image. It should be set according to the
2829 amount of physical RAM available in the target system minus
2830 PHYSICAL_START and must be a power of 2.
2832 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
2833 EVA or 64-bit. The default is 16Mb.
2840 config HW_PERF_EVENTS
2841 bool "Enable hardware performance counter support for perf events"
2842 depends on PERF_EVENTS && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON64)
2845 Enable hardware performance counter support for perf events. If
2846 disabled, perf events will use software events only.
2849 bool "Enable DMI scanning"
2850 depends on MACH_LOONGSON64
2851 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
2854 Enabled scanning of DMI to identify machine quirks. Say Y
2855 here unless you have verified that your setup is not
2856 affected by entries in the DMI blacklist. Required by PNP
2860 bool "Multi-Processing support"
2861 depends on SYS_SUPPORTS_SMP
2863 This enables support for systems with more than one CPU. If you have
2864 a system with only one CPU, say N. If you have a system with more
2865 than one CPU, say Y.
2867 If you say N here, the kernel will run on uni- and multiprocessor
2868 machines, but will use only one CPU of a multiprocessor machine. If
2869 you say Y here, the kernel will run on many, but not all,
2870 uniprocessor machines. On a uniprocessor machine, the kernel
2871 will run faster if you say N here.
2873 People using multiprocessor machines who say Y here should also say
2874 Y to "Enhanced Real Time Clock Support", below.
2876 See also the SMP-HOWTO available at
2877 <https://www.tldp.org/docs.html#howto>.
2879 If you don't know what to do here, say N.
2882 bool "Support for hot-pluggable CPUs"
2883 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
2885 Say Y here to allow turning CPUs off and on. CPUs can be
2886 controlled through /sys/devices/system/cpu.
2887 (Note: power management support will enable this option
2888 automatically on SMP systems. )
2889 Say N if you want to disable CPU hotplug.
2894 config SYS_SUPPORTS_MIPS_CMP
2897 config SYS_SUPPORTS_MIPS_CPS
2900 config SYS_SUPPORTS_SMP
2903 config NR_CPUS_DEFAULT_4
2906 config NR_CPUS_DEFAULT_8
2909 config NR_CPUS_DEFAULT_16
2912 config NR_CPUS_DEFAULT_32
2915 config NR_CPUS_DEFAULT_64
2919 int "Maximum number of CPUs (2-256)"
2922 default "4" if NR_CPUS_DEFAULT_4
2923 default "8" if NR_CPUS_DEFAULT_8
2924 default "16" if NR_CPUS_DEFAULT_16
2925 default "32" if NR_CPUS_DEFAULT_32
2926 default "64" if NR_CPUS_DEFAULT_64
2928 This allows you to specify the maximum number of CPUs which this
2929 kernel will support. The maximum supported value is 32 for 32-bit
2930 kernel and 64 for 64-bit kernels; the minimum value which makes
2931 sense is 1 for Qemu (useful only for kernel debugging purposes)
2932 and 2 for all others.
2934 This is purely to save memory - each supported CPU adds
2935 approximately eight kilobytes to the kernel image. For best
2936 performance should round up your number of processors to the next
2939 config MIPS_PERF_SHARED_TC_COUNTERS
2942 config MIPS_NR_CPU_NR_MAP_1024
2945 config MIPS_NR_CPU_NR_MAP
2948 default 1024 if MIPS_NR_CPU_NR_MAP_1024
2949 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
2952 # Timer Interrupt Frequency Configuration
2956 prompt "Timer frequency"
2959 Allows the configuration of the timer frequency.
2962 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
2965 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
2968 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
2971 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
2974 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
2977 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
2980 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
2983 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
2987 config SYS_SUPPORTS_24HZ
2990 config SYS_SUPPORTS_48HZ
2993 config SYS_SUPPORTS_100HZ
2996 config SYS_SUPPORTS_128HZ
2999 config SYS_SUPPORTS_250HZ
3002 config SYS_SUPPORTS_256HZ
3005 config SYS_SUPPORTS_1000HZ
3008 config SYS_SUPPORTS_1024HZ
3011 config SYS_SUPPORTS_ARBIT_HZ
3013 default y if !SYS_SUPPORTS_24HZ && \
3014 !SYS_SUPPORTS_48HZ && \
3015 !SYS_SUPPORTS_100HZ && \
3016 !SYS_SUPPORTS_128HZ && \
3017 !SYS_SUPPORTS_250HZ && \
3018 !SYS_SUPPORTS_256HZ && \
3019 !SYS_SUPPORTS_1000HZ && \
3020 !SYS_SUPPORTS_1024HZ
3026 default 100 if HZ_100
3027 default 128 if HZ_128
3028 default 250 if HZ_250
3029 default 256 if HZ_256
3030 default 1000 if HZ_1000
3031 default 1024 if HZ_1024
3034 def_bool HIGH_RES_TIMERS
3037 bool "Kexec system call"
3040 kexec is a system call that implements the ability to shutdown your
3041 current kernel, and to start another kernel. It is like a reboot
3042 but it is independent of the system firmware. And like a reboot
3043 you can start any kernel with it, not just Linux.
3045 The name comes from the similarity to the exec system call.
3047 It is an ongoing process to be certain the hardware in a machine
3048 is properly shutdown, so do not be surprised if this code does not
3049 initially work for you. As of this writing the exact hardware
3050 interface is strongly in flux, so no good recommendation can be
3054 bool "Kernel crash dumps"
3056 Generate crash dump after being started by kexec.
3057 This should be normally only set in special crash dump kernels
3058 which are loaded in the main kernel with kexec-tools into
3059 a specially reserved region and then later executed after
3060 a crash by kdump/kexec. The crash dump kernel must be compiled
3061 to a memory address not used by the main kernel or firmware using
3064 config PHYSICAL_START
3065 hex "Physical address where the kernel is loaded"
3066 default "0xffffffff84000000"
3067 depends on CRASH_DUMP
3069 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
3070 If you plan to use kernel for capturing the crash dump change
3071 this value to start of the reserved region (the "X" value as
3072 specified in the "crashkernel=YM@XM" command line boot parameter
3073 passed to the panic-ed kernel).
3075 config MIPS_O32_FP64_SUPPORT
3076 bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
3077 depends on 32BIT || MIPS32_O32
3079 When this is enabled, the kernel will support use of 64-bit floating
3080 point registers with binaries using the O32 ABI along with the
3081 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
3082 32-bit MIPS systems this support is at the cost of increasing the
3083 size and complexity of the compiled FPU emulator. Thus if you are
3084 running a MIPS32 system and know that none of your userland binaries
3085 will require 64-bit floating point, you may wish to reduce the size
3086 of your kernel & potentially improve FP emulation performance by
3089 Although binutils currently supports use of this flag the details
3090 concerning its effect upon the O32 ABI in userland are still being
3091 worked on. In order to avoid userland becoming dependent upon current
3092 behaviour before the details have been finalised, this option should
3093 be considered experimental and only enabled by those working upon
3101 select OF_EARLY_FLATTREE
3111 prompt "Kernel appended dtb support" if USE_OF
3112 default MIPS_NO_APPENDED_DTB
3114 config MIPS_NO_APPENDED_DTB
3117 Do not enable appended dtb support.
3119 config MIPS_ELF_APPENDED_DTB
3122 With this option, the boot code will look for a device tree binary
3123 DTB) included in the vmlinux ELF section .appended_dtb. By default
3124 it is empty and the DTB can be appended using binutils command
3127 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
3129 This is meant as a backward compatibility convenience for those
3130 systems with a bootloader that can't be upgraded to accommodate
3131 the documented boot protocol using a device tree.
3133 config MIPS_RAW_APPENDED_DTB
3134 bool "vmlinux.bin or vmlinuz.bin"
3136 With this option, the boot code will look for a device tree binary
3137 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
3138 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
3140 This is meant as a backward compatibility convenience for those
3141 systems with a bootloader that can't be upgraded to accommodate
3142 the documented boot protocol using a device tree.
3144 Beware that there is very little in terms of protection against
3145 this option being confused by leftover garbage in memory that might
3146 look like a DTB header after a reboot if no actual DTB is appended
3147 to vmlinux.bin. Do not leave this option active in a production kernel
3148 if you don't intend to always append a DTB.
3152 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
3153 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
3154 !MACH_LOONGSON64 && !MIPS_MALTA && \
3156 default MIPS_CMDLINE_FROM_BOOTLOADER
3158 config MIPS_CMDLINE_FROM_DTB
3160 bool "Dtb kernel arguments if available"
3162 config MIPS_CMDLINE_DTB_EXTEND
3164 bool "Extend dtb kernel arguments with bootloader arguments"
3166 config MIPS_CMDLINE_FROM_BOOTLOADER
3167 bool "Bootloader kernel arguments if available"
3169 config MIPS_CMDLINE_BUILTIN_EXTEND
3170 depends on CMDLINE_BOOL
3171 bool "Extend builtin kernel arguments with bootloader arguments"
3176 config LOCKDEP_SUPPORT
3180 config STACKTRACE_SUPPORT
3184 config PGTABLE_LEVELS
3186 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
3187 default 3 if 64BIT && !PAGE_SIZE_64KB
3190 config MIPS_AUTO_PFN_OFFSET
3193 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
3195 config PCI_DRIVERS_GENERIC
3196 select PCI_DOMAINS_GENERIC if PCI
3199 config PCI_DRIVERS_LEGACY
3200 def_bool !PCI_DRIVERS_GENERIC
3201 select NO_GENERIC_PCI_IOPORT_MAP
3202 select PCI_DOMAINS if PCI
3205 # ISA support is now enabled via select. Too many systems still have the one
3206 # or other ISA chip on the board that users don't know about so don't expect
3207 # users to choose the right thing ...
3213 bool "TURBOchannel support"
3214 depends on MACH_DECSTATION
3216 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
3217 processors. TURBOchannel programming specifications are available
3219 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
3221 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
3222 Linux driver support status is documented at:
3223 <http://www.linux-mips.org/wiki/DECstation>
3229 config ARCH_MMAP_RND_BITS_MIN
3233 config ARCH_MMAP_RND_BITS_MAX
3237 config ARCH_MMAP_RND_COMPAT_BITS_MIN
3240 config ARCH_MMAP_RND_COMPAT_BITS_MAX
3247 select MIPS_EXTERNAL_TIMER
3253 config MIPS32_COMPAT
3259 config SYSVIPC_COMPAT
3263 bool "Kernel support for o32 binaries"
3265 select ARCH_WANT_OLD_COMPAT_IPC
3267 select MIPS32_COMPAT
3268 select SYSVIPC_COMPAT if SYSVIPC
3270 Select this option if you want to run o32 binaries. These are pure
3271 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
3272 existing binaries are in this format.
3277 bool "Kernel support for n32 binaries"
3279 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
3281 select MIPS32_COMPAT
3282 select SYSVIPC_COMPAT if SYSVIPC
3284 Select this option if you want to run n32 binaries. These are
3285 64-bit binaries using 32-bit quantities for addressing and certain
3286 data that would normally be 64-bit. They are used in special
3291 menu "Power management options"
3293 config ARCH_HIBERNATION_POSSIBLE
3295 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3297 config ARCH_SUSPEND_POSSIBLE
3299 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3301 source "kernel/power/Kconfig"
3305 config MIPS_EXTERNAL_TIMER
3308 menu "CPU Power Management"
3310 if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
3311 source "drivers/cpufreq/Kconfig"
3314 source "drivers/cpuidle/Kconfig"
3318 source "drivers/firmware/Kconfig"
3320 source "arch/mips/kvm/Kconfig"
3322 source "arch/mips/vdso/Kconfig"