1 // SPDX-License-Identifier: GPL-2.0-only
3 * Stand-alone page-table allocator for hyp stage-1 and guest stage-2.
4 * No bombay mix was harmed in the writing of this file.
6 * Copyright (C) 2020 Google LLC
7 * Author: Will Deacon <will@kernel.org>
10 #include <linux/bitfield.h>
11 #include <asm/kvm_pgtable.h>
12 #include <asm/stage2_pgtable.h>
15 #define KVM_PTE_TYPE BIT(1)
16 #define KVM_PTE_TYPE_BLOCK 0
17 #define KVM_PTE_TYPE_PAGE 1
18 #define KVM_PTE_TYPE_TABLE 1
20 #define KVM_PTE_LEAF_ATTR_LO GENMASK(11, 2)
22 #define KVM_PTE_LEAF_ATTR_LO_S1_ATTRIDX GENMASK(4, 2)
23 #define KVM_PTE_LEAF_ATTR_LO_S1_AP GENMASK(7, 6)
24 #define KVM_PTE_LEAF_ATTR_LO_S1_AP_RO 3
25 #define KVM_PTE_LEAF_ATTR_LO_S1_AP_RW 1
26 #define KVM_PTE_LEAF_ATTR_LO_S1_SH GENMASK(9, 8)
27 #define KVM_PTE_LEAF_ATTR_LO_S1_SH_IS 3
28 #define KVM_PTE_LEAF_ATTR_LO_S1_AF BIT(10)
30 #define KVM_PTE_LEAF_ATTR_LO_S2_MEMATTR GENMASK(5, 2)
31 #define KVM_PTE_LEAF_ATTR_LO_S2_S2AP_R BIT(6)
32 #define KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W BIT(7)
33 #define KVM_PTE_LEAF_ATTR_LO_S2_SH GENMASK(9, 8)
34 #define KVM_PTE_LEAF_ATTR_LO_S2_SH_IS 3
35 #define KVM_PTE_LEAF_ATTR_LO_S2_AF BIT(10)
37 #define KVM_PTE_LEAF_ATTR_HI GENMASK(63, 51)
39 #define KVM_PTE_LEAF_ATTR_HI_SW GENMASK(58, 55)
41 #define KVM_PTE_LEAF_ATTR_HI_S1_XN BIT(54)
43 #define KVM_PTE_LEAF_ATTR_HI_S2_XN BIT(54)
45 #define KVM_PTE_LEAF_ATTR_S2_PERMS (KVM_PTE_LEAF_ATTR_LO_S2_S2AP_R | \
46 KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W | \
47 KVM_PTE_LEAF_ATTR_HI_S2_XN)
49 #define KVM_INVALID_PTE_OWNER_MASK GENMASK(9, 2)
50 #define KVM_MAX_OWNER_ID 1
52 struct kvm_pgtable_walk_data {
53 struct kvm_pgtable *pgt;
54 struct kvm_pgtable_walker *walker;
60 #define KVM_PHYS_INVALID (-1ULL)
62 static bool kvm_phys_is_valid(u64 phys)
64 return phys < BIT(id_aa64mmfr0_parange_to_phys_shift(ID_AA64MMFR0_PARANGE_MAX));
67 static bool kvm_block_mapping_supported(u64 addr, u64 end, u64 phys, u32 level)
69 u64 granule = kvm_granule_size(level);
71 if (!kvm_level_supports_block_mapping(level))
74 if (granule > (end - addr))
77 if (kvm_phys_is_valid(phys) && !IS_ALIGNED(phys, granule))
80 return IS_ALIGNED(addr, granule);
83 static u32 kvm_pgtable_idx(struct kvm_pgtable_walk_data *data, u32 level)
85 u64 shift = kvm_granule_shift(level);
86 u64 mask = BIT(PAGE_SHIFT - 3) - 1;
88 return (data->addr >> shift) & mask;
91 static u32 __kvm_pgd_page_idx(struct kvm_pgtable *pgt, u64 addr)
93 u64 shift = kvm_granule_shift(pgt->start_level - 1); /* May underflow */
94 u64 mask = BIT(pgt->ia_bits) - 1;
96 return (addr & mask) >> shift;
99 static u32 kvm_pgd_page_idx(struct kvm_pgtable_walk_data *data)
101 return __kvm_pgd_page_idx(data->pgt, data->addr);
104 static u32 kvm_pgd_pages(u32 ia_bits, u32 start_level)
106 struct kvm_pgtable pgt = {
108 .start_level = start_level,
111 return __kvm_pgd_page_idx(&pgt, -1ULL) + 1;
114 static bool kvm_pte_table(kvm_pte_t pte, u32 level)
116 if (level == KVM_PGTABLE_MAX_LEVELS - 1)
119 if (!kvm_pte_valid(pte))
122 return FIELD_GET(KVM_PTE_TYPE, pte) == KVM_PTE_TYPE_TABLE;
125 static kvm_pte_t kvm_phys_to_pte(u64 pa)
127 kvm_pte_t pte = pa & KVM_PTE_ADDR_MASK;
129 if (PAGE_SHIFT == 16)
130 pte |= FIELD_PREP(KVM_PTE_ADDR_51_48, pa >> 48);
135 static kvm_pte_t *kvm_pte_follow(kvm_pte_t pte, struct kvm_pgtable_mm_ops *mm_ops)
137 return mm_ops->phys_to_virt(kvm_pte_to_phys(pte));
140 static void kvm_clear_pte(kvm_pte_t *ptep)
142 WRITE_ONCE(*ptep, 0);
145 static void kvm_set_table_pte(kvm_pte_t *ptep, kvm_pte_t *childp,
146 struct kvm_pgtable_mm_ops *mm_ops)
148 kvm_pte_t old = *ptep, pte = kvm_phys_to_pte(mm_ops->virt_to_phys(childp));
150 pte |= FIELD_PREP(KVM_PTE_TYPE, KVM_PTE_TYPE_TABLE);
151 pte |= KVM_PTE_VALID;
153 WARN_ON(kvm_pte_valid(old));
154 smp_store_release(ptep, pte);
157 static kvm_pte_t kvm_init_valid_leaf_pte(u64 pa, kvm_pte_t attr, u32 level)
159 kvm_pte_t pte = kvm_phys_to_pte(pa);
160 u64 type = (level == KVM_PGTABLE_MAX_LEVELS - 1) ? KVM_PTE_TYPE_PAGE :
163 pte |= attr & (KVM_PTE_LEAF_ATTR_LO | KVM_PTE_LEAF_ATTR_HI);
164 pte |= FIELD_PREP(KVM_PTE_TYPE, type);
165 pte |= KVM_PTE_VALID;
170 static kvm_pte_t kvm_init_invalid_leaf_owner(u8 owner_id)
172 return FIELD_PREP(KVM_INVALID_PTE_OWNER_MASK, owner_id);
175 static int kvm_pgtable_visitor_cb(struct kvm_pgtable_walk_data *data, u64 addr,
176 u32 level, kvm_pte_t *ptep,
177 enum kvm_pgtable_walk_flags flag)
179 struct kvm_pgtable_walker *walker = data->walker;
180 return walker->cb(addr, data->end, level, ptep, flag, walker->arg);
183 static int __kvm_pgtable_walk(struct kvm_pgtable_walk_data *data,
184 kvm_pte_t *pgtable, u32 level);
186 static inline int __kvm_pgtable_visit(struct kvm_pgtable_walk_data *data,
187 kvm_pte_t *ptep, u32 level)
190 u64 addr = data->addr;
191 kvm_pte_t *childp, pte = *ptep;
192 bool table = kvm_pte_table(pte, level);
193 enum kvm_pgtable_walk_flags flags = data->walker->flags;
195 if (table && (flags & KVM_PGTABLE_WALK_TABLE_PRE)) {
196 ret = kvm_pgtable_visitor_cb(data, addr, level, ptep,
197 KVM_PGTABLE_WALK_TABLE_PRE);
200 if (!table && (flags & KVM_PGTABLE_WALK_LEAF)) {
201 ret = kvm_pgtable_visitor_cb(data, addr, level, ptep,
202 KVM_PGTABLE_WALK_LEAF);
204 table = kvm_pte_table(pte, level);
211 data->addr = ALIGN_DOWN(data->addr, kvm_granule_size(level));
212 data->addr += kvm_granule_size(level);
216 childp = kvm_pte_follow(pte, data->pgt->mm_ops);
217 ret = __kvm_pgtable_walk(data, childp, level + 1);
221 if (flags & KVM_PGTABLE_WALK_TABLE_POST) {
222 ret = kvm_pgtable_visitor_cb(data, addr, level, ptep,
223 KVM_PGTABLE_WALK_TABLE_POST);
230 static int __kvm_pgtable_walk(struct kvm_pgtable_walk_data *data,
231 kvm_pte_t *pgtable, u32 level)
236 if (WARN_ON_ONCE(level >= KVM_PGTABLE_MAX_LEVELS))
239 for (idx = kvm_pgtable_idx(data, level); idx < PTRS_PER_PTE; ++idx) {
240 kvm_pte_t *ptep = &pgtable[idx];
242 if (data->addr >= data->end)
245 ret = __kvm_pgtable_visit(data, ptep, level);
253 static int _kvm_pgtable_walk(struct kvm_pgtable_walk_data *data)
257 struct kvm_pgtable *pgt = data->pgt;
258 u64 limit = BIT(pgt->ia_bits);
260 if (data->addr > limit || data->end > limit)
266 for (idx = kvm_pgd_page_idx(data); data->addr < data->end; ++idx) {
267 kvm_pte_t *ptep = &pgt->pgd[idx * PTRS_PER_PTE];
269 ret = __kvm_pgtable_walk(data, ptep, pgt->start_level);
277 int kvm_pgtable_walk(struct kvm_pgtable *pgt, u64 addr, u64 size,
278 struct kvm_pgtable_walker *walker)
280 struct kvm_pgtable_walk_data walk_data = {
282 .addr = ALIGN_DOWN(addr, PAGE_SIZE),
283 .end = PAGE_ALIGN(walk_data.addr + size),
287 return _kvm_pgtable_walk(&walk_data);
290 struct leaf_walk_data {
295 static int leaf_walker(u64 addr, u64 end, u32 level, kvm_pte_t *ptep,
296 enum kvm_pgtable_walk_flags flag, void * const arg)
298 struct leaf_walk_data *data = arg;
306 int kvm_pgtable_get_leaf(struct kvm_pgtable *pgt, u64 addr,
307 kvm_pte_t *ptep, u32 *level)
309 struct leaf_walk_data data;
310 struct kvm_pgtable_walker walker = {
312 .flags = KVM_PGTABLE_WALK_LEAF,
317 ret = kvm_pgtable_walk(pgt, ALIGN_DOWN(addr, PAGE_SIZE),
329 struct hyp_map_data {
332 struct kvm_pgtable_mm_ops *mm_ops;
335 static int hyp_set_prot_attr(enum kvm_pgtable_prot prot, kvm_pte_t *ptep)
337 bool device = prot & KVM_PGTABLE_PROT_DEVICE;
338 u32 mtype = device ? MT_DEVICE_nGnRE : MT_NORMAL;
339 kvm_pte_t attr = FIELD_PREP(KVM_PTE_LEAF_ATTR_LO_S1_ATTRIDX, mtype);
340 u32 sh = KVM_PTE_LEAF_ATTR_LO_S1_SH_IS;
341 u32 ap = (prot & KVM_PGTABLE_PROT_W) ? KVM_PTE_LEAF_ATTR_LO_S1_AP_RW :
342 KVM_PTE_LEAF_ATTR_LO_S1_AP_RO;
344 if (!(prot & KVM_PGTABLE_PROT_R))
347 if (prot & KVM_PGTABLE_PROT_X) {
348 if (prot & KVM_PGTABLE_PROT_W)
354 attr |= KVM_PTE_LEAF_ATTR_HI_S1_XN;
357 attr |= FIELD_PREP(KVM_PTE_LEAF_ATTR_LO_S1_AP, ap);
358 attr |= FIELD_PREP(KVM_PTE_LEAF_ATTR_LO_S1_SH, sh);
359 attr |= KVM_PTE_LEAF_ATTR_LO_S1_AF;
360 attr |= prot & KVM_PTE_LEAF_ATTR_HI_SW;
366 enum kvm_pgtable_prot kvm_pgtable_hyp_pte_prot(kvm_pte_t pte)
368 enum kvm_pgtable_prot prot = pte & KVM_PTE_LEAF_ATTR_HI_SW;
371 if (!kvm_pte_valid(pte))
374 if (!(pte & KVM_PTE_LEAF_ATTR_HI_S1_XN))
375 prot |= KVM_PGTABLE_PROT_X;
377 ap = FIELD_GET(KVM_PTE_LEAF_ATTR_LO_S1_AP, pte);
378 if (ap == KVM_PTE_LEAF_ATTR_LO_S1_AP_RO)
379 prot |= KVM_PGTABLE_PROT_R;
380 else if (ap == KVM_PTE_LEAF_ATTR_LO_S1_AP_RW)
381 prot |= KVM_PGTABLE_PROT_RW;
386 static bool hyp_pte_needs_update(kvm_pte_t old, kvm_pte_t new)
389 * Tolerate KVM recreating the exact same mapping, or changing software
390 * bits if the existing mapping was valid.
395 if (!kvm_pte_valid(old))
398 return !WARN_ON((old ^ new) & ~KVM_PTE_LEAF_ATTR_HI_SW);
401 static bool hyp_map_walker_try_leaf(u64 addr, u64 end, u32 level,
402 kvm_pte_t *ptep, struct hyp_map_data *data)
404 kvm_pte_t new, old = *ptep;
405 u64 granule = kvm_granule_size(level), phys = data->phys;
407 if (!kvm_block_mapping_supported(addr, end, phys, level))
410 new = kvm_init_valid_leaf_pte(phys, data->attr, level);
411 if (hyp_pte_needs_update(old, new))
412 smp_store_release(ptep, new);
414 data->phys += granule;
418 static int hyp_map_walker(u64 addr, u64 end, u32 level, kvm_pte_t *ptep,
419 enum kvm_pgtable_walk_flags flag, void * const arg)
422 struct hyp_map_data *data = arg;
423 struct kvm_pgtable_mm_ops *mm_ops = data->mm_ops;
425 if (hyp_map_walker_try_leaf(addr, end, level, ptep, arg))
428 if (WARN_ON(level == KVM_PGTABLE_MAX_LEVELS - 1))
431 childp = (kvm_pte_t *)mm_ops->zalloc_page(NULL);
435 kvm_set_table_pte(ptep, childp, mm_ops);
439 int kvm_pgtable_hyp_map(struct kvm_pgtable *pgt, u64 addr, u64 size, u64 phys,
440 enum kvm_pgtable_prot prot)
443 struct hyp_map_data map_data = {
444 .phys = ALIGN_DOWN(phys, PAGE_SIZE),
445 .mm_ops = pgt->mm_ops,
447 struct kvm_pgtable_walker walker = {
448 .cb = hyp_map_walker,
449 .flags = KVM_PGTABLE_WALK_LEAF,
453 ret = hyp_set_prot_attr(prot, &map_data.attr);
457 ret = kvm_pgtable_walk(pgt, addr, size, &walker);
463 int kvm_pgtable_hyp_init(struct kvm_pgtable *pgt, u32 va_bits,
464 struct kvm_pgtable_mm_ops *mm_ops)
466 u64 levels = ARM64_HW_PGTABLE_LEVELS(va_bits);
468 pgt->pgd = (kvm_pte_t *)mm_ops->zalloc_page(NULL);
472 pgt->ia_bits = va_bits;
473 pgt->start_level = KVM_PGTABLE_MAX_LEVELS - levels;
474 pgt->mm_ops = mm_ops;
476 pgt->force_pte_cb = NULL;
481 static int hyp_free_walker(u64 addr, u64 end, u32 level, kvm_pte_t *ptep,
482 enum kvm_pgtable_walk_flags flag, void * const arg)
484 struct kvm_pgtable_mm_ops *mm_ops = arg;
486 mm_ops->put_page((void *)kvm_pte_follow(*ptep, mm_ops));
490 void kvm_pgtable_hyp_destroy(struct kvm_pgtable *pgt)
492 struct kvm_pgtable_walker walker = {
493 .cb = hyp_free_walker,
494 .flags = KVM_PGTABLE_WALK_TABLE_POST,
498 WARN_ON(kvm_pgtable_walk(pgt, 0, BIT(pgt->ia_bits), &walker));
499 pgt->mm_ops->put_page(pgt->pgd);
503 struct stage2_map_data {
511 struct kvm_s2_mmu *mmu;
514 struct kvm_pgtable_mm_ops *mm_ops;
516 /* Force mappings to page granularity */
520 u64 kvm_get_vtcr(u64 mmfr0, u64 mmfr1, u32 phys_shift)
522 u64 vtcr = VTCR_EL2_FLAGS;
525 vtcr |= kvm_get_parange(mmfr0) << VTCR_EL2_PS_SHIFT;
526 vtcr |= VTCR_EL2_T0SZ(phys_shift);
528 * Use a minimum 2 level page table to prevent splitting
529 * host PMD huge pages at stage2.
531 lvls = stage2_pgtable_levels(phys_shift);
534 vtcr |= VTCR_EL2_LVLS_TO_SL0(lvls);
537 * Enable the Hardware Access Flag management, unconditionally
538 * on all CPUs. The features is RES0 on CPUs without the support
539 * and must be ignored by the CPUs.
543 /* Set the vmid bits */
544 vtcr |= (get_vmid_bits(mmfr1) == 16) ?
551 static bool stage2_has_fwb(struct kvm_pgtable *pgt)
553 if (!cpus_have_const_cap(ARM64_HAS_STAGE2_FWB))
556 return !(pgt->flags & KVM_PGTABLE_S2_NOFWB);
559 #define KVM_S2_MEMATTR(pgt, attr) PAGE_S2_MEMATTR(attr, stage2_has_fwb(pgt))
561 static int stage2_set_prot_attr(struct kvm_pgtable *pgt, enum kvm_pgtable_prot prot,
564 bool device = prot & KVM_PGTABLE_PROT_DEVICE;
565 kvm_pte_t attr = device ? KVM_S2_MEMATTR(pgt, DEVICE_nGnRE) :
566 KVM_S2_MEMATTR(pgt, NORMAL);
567 u32 sh = KVM_PTE_LEAF_ATTR_LO_S2_SH_IS;
569 if (!(prot & KVM_PGTABLE_PROT_X))
570 attr |= KVM_PTE_LEAF_ATTR_HI_S2_XN;
574 if (prot & KVM_PGTABLE_PROT_R)
575 attr |= KVM_PTE_LEAF_ATTR_LO_S2_S2AP_R;
577 if (prot & KVM_PGTABLE_PROT_W)
578 attr |= KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W;
580 attr |= FIELD_PREP(KVM_PTE_LEAF_ATTR_LO_S2_SH, sh);
581 attr |= KVM_PTE_LEAF_ATTR_LO_S2_AF;
582 attr |= prot & KVM_PTE_LEAF_ATTR_HI_SW;
588 enum kvm_pgtable_prot kvm_pgtable_stage2_pte_prot(kvm_pte_t pte)
590 enum kvm_pgtable_prot prot = pte & KVM_PTE_LEAF_ATTR_HI_SW;
592 if (!kvm_pte_valid(pte))
595 if (pte & KVM_PTE_LEAF_ATTR_LO_S2_S2AP_R)
596 prot |= KVM_PGTABLE_PROT_R;
597 if (pte & KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W)
598 prot |= KVM_PGTABLE_PROT_W;
599 if (!(pte & KVM_PTE_LEAF_ATTR_HI_S2_XN))
600 prot |= KVM_PGTABLE_PROT_X;
605 static bool stage2_pte_needs_update(kvm_pte_t old, kvm_pte_t new)
607 if (!kvm_pte_valid(old) || !kvm_pte_valid(new))
610 return ((old ^ new) & (~KVM_PTE_LEAF_ATTR_S2_PERMS));
613 static bool stage2_pte_is_counted(kvm_pte_t pte)
616 * The refcount tracks valid entries as well as invalid entries if they
617 * encode ownership of a page to another entity than the page-table
618 * owner, whose id is 0.
623 static void stage2_put_pte(kvm_pte_t *ptep, struct kvm_s2_mmu *mmu, u64 addr,
624 u32 level, struct kvm_pgtable_mm_ops *mm_ops)
627 * Clear the existing PTE, and perform break-before-make with
628 * TLB maintenance if it was valid.
630 if (kvm_pte_valid(*ptep)) {
632 kvm_call_hyp(__kvm_tlb_flush_vmid_ipa, mmu, addr, level);
635 mm_ops->put_page(ptep);
638 static bool stage2_pte_cacheable(struct kvm_pgtable *pgt, kvm_pte_t pte)
640 u64 memattr = pte & KVM_PTE_LEAF_ATTR_LO_S2_MEMATTR;
641 return memattr == KVM_S2_MEMATTR(pgt, NORMAL);
644 static bool stage2_pte_executable(kvm_pte_t pte)
646 return !(pte & KVM_PTE_LEAF_ATTR_HI_S2_XN);
649 static bool stage2_leaf_mapping_allowed(u64 addr, u64 end, u32 level,
650 struct stage2_map_data *data)
652 if (data->force_pte && (level < (KVM_PGTABLE_MAX_LEVELS - 1)))
655 return kvm_block_mapping_supported(addr, end, data->phys, level);
658 static int stage2_map_walker_try_leaf(u64 addr, u64 end, u32 level,
660 struct stage2_map_data *data)
662 kvm_pte_t new, old = *ptep;
663 u64 granule = kvm_granule_size(level), phys = data->phys;
664 struct kvm_pgtable *pgt = data->mmu->pgt;
665 struct kvm_pgtable_mm_ops *mm_ops = data->mm_ops;
667 if (!stage2_leaf_mapping_allowed(addr, end, level, data))
670 if (kvm_phys_is_valid(phys))
671 new = kvm_init_valid_leaf_pte(phys, data->attr, level);
673 new = kvm_init_invalid_leaf_owner(data->owner_id);
675 if (stage2_pte_is_counted(old)) {
677 * Skip updating the PTE if we are trying to recreate the exact
678 * same mapping or only change the access permissions. Instead,
679 * the vCPU will exit one more time from guest if still needed
680 * and then go through the path of relaxing permissions.
682 if (!stage2_pte_needs_update(old, new))
685 stage2_put_pte(ptep, data->mmu, addr, level, mm_ops);
688 /* Perform CMOs before installation of the guest stage-2 PTE */
689 if (mm_ops->dcache_clean_inval_poc && stage2_pte_cacheable(pgt, new))
690 mm_ops->dcache_clean_inval_poc(kvm_pte_follow(new, mm_ops),
693 if (mm_ops->icache_inval_pou && stage2_pte_executable(new))
694 mm_ops->icache_inval_pou(kvm_pte_follow(new, mm_ops), granule);
696 smp_store_release(ptep, new);
697 if (stage2_pte_is_counted(new))
698 mm_ops->get_page(ptep);
699 if (kvm_phys_is_valid(phys))
700 data->phys += granule;
704 static int stage2_map_walk_table_pre(u64 addr, u64 end, u32 level,
706 struct stage2_map_data *data)
711 if (!stage2_leaf_mapping_allowed(addr, end, level, data))
714 data->childp = kvm_pte_follow(*ptep, data->mm_ops);
718 * Invalidate the whole stage-2, as we may have numerous leaf
719 * entries below us which would otherwise need invalidating
722 kvm_call_hyp(__kvm_tlb_flush_vmid, data->mmu);
727 static int stage2_map_walk_leaf(u64 addr, u64 end, u32 level, kvm_pte_t *ptep,
728 struct stage2_map_data *data)
730 struct kvm_pgtable_mm_ops *mm_ops = data->mm_ops;
731 kvm_pte_t *childp, pte = *ptep;
735 if (stage2_pte_is_counted(pte))
736 mm_ops->put_page(ptep);
741 ret = stage2_map_walker_try_leaf(addr, end, level, ptep, data);
745 if (WARN_ON(level == KVM_PGTABLE_MAX_LEVELS - 1))
751 childp = mm_ops->zalloc_page(data->memcache);
756 * If we've run into an existing block mapping then replace it with
757 * a table. Accesses beyond 'end' that fall within the new table
758 * will be mapped lazily.
760 if (stage2_pte_is_counted(pte))
761 stage2_put_pte(ptep, data->mmu, addr, level, mm_ops);
763 kvm_set_table_pte(ptep, childp, mm_ops);
764 mm_ops->get_page(ptep);
769 static int stage2_map_walk_table_post(u64 addr, u64 end, u32 level,
771 struct stage2_map_data *data)
773 struct kvm_pgtable_mm_ops *mm_ops = data->mm_ops;
780 if (data->anchor == ptep) {
781 childp = data->childp;
784 ret = stage2_map_walk_leaf(addr, end, level, ptep, data);
786 childp = kvm_pte_follow(*ptep, mm_ops);
789 mm_ops->put_page(childp);
790 mm_ops->put_page(ptep);
796 * This is a little fiddly, as we use all three of the walk flags. The idea
797 * is that the TABLE_PRE callback runs for table entries on the way down,
798 * looking for table entries which we could conceivably replace with a
799 * block entry for this mapping. If it finds one, then it sets the 'anchor'
800 * field in 'struct stage2_map_data' to point at the table entry, before
801 * clearing the entry to zero and descending into the now detached table.
803 * The behaviour of the LEAF callback then depends on whether or not the
804 * anchor has been set. If not, then we're not using a block mapping higher
805 * up the table and we perform the mapping at the existing leaves instead.
806 * If, on the other hand, the anchor _is_ set, then we drop references to
807 * all valid leaves so that the pages beneath the anchor can be freed.
809 * Finally, the TABLE_POST callback does nothing if the anchor has not
810 * been set, but otherwise frees the page-table pages while walking back up
811 * the page-table, installing the block entry when it revisits the anchor
812 * pointer and clearing the anchor to NULL.
814 static int stage2_map_walker(u64 addr, u64 end, u32 level, kvm_pte_t *ptep,
815 enum kvm_pgtable_walk_flags flag, void * const arg)
817 struct stage2_map_data *data = arg;
820 case KVM_PGTABLE_WALK_TABLE_PRE:
821 return stage2_map_walk_table_pre(addr, end, level, ptep, data);
822 case KVM_PGTABLE_WALK_LEAF:
823 return stage2_map_walk_leaf(addr, end, level, ptep, data);
824 case KVM_PGTABLE_WALK_TABLE_POST:
825 return stage2_map_walk_table_post(addr, end, level, ptep, data);
831 int kvm_pgtable_stage2_map(struct kvm_pgtable *pgt, u64 addr, u64 size,
832 u64 phys, enum kvm_pgtable_prot prot,
836 struct stage2_map_data map_data = {
837 .phys = ALIGN_DOWN(phys, PAGE_SIZE),
840 .mm_ops = pgt->mm_ops,
841 .force_pte = pgt->force_pte_cb && pgt->force_pte_cb(addr, addr + size, prot),
843 struct kvm_pgtable_walker walker = {
844 .cb = stage2_map_walker,
845 .flags = KVM_PGTABLE_WALK_TABLE_PRE |
846 KVM_PGTABLE_WALK_LEAF |
847 KVM_PGTABLE_WALK_TABLE_POST,
851 if (WARN_ON((pgt->flags & KVM_PGTABLE_S2_IDMAP) && (addr != phys)))
854 ret = stage2_set_prot_attr(pgt, prot, &map_data.attr);
858 ret = kvm_pgtable_walk(pgt, addr, size, &walker);
863 int kvm_pgtable_stage2_set_owner(struct kvm_pgtable *pgt, u64 addr, u64 size,
864 void *mc, u8 owner_id)
867 struct stage2_map_data map_data = {
868 .phys = KVM_PHYS_INVALID,
871 .mm_ops = pgt->mm_ops,
872 .owner_id = owner_id,
875 struct kvm_pgtable_walker walker = {
876 .cb = stage2_map_walker,
877 .flags = KVM_PGTABLE_WALK_TABLE_PRE |
878 KVM_PGTABLE_WALK_LEAF |
879 KVM_PGTABLE_WALK_TABLE_POST,
883 if (owner_id > KVM_MAX_OWNER_ID)
886 ret = kvm_pgtable_walk(pgt, addr, size, &walker);
890 static int stage2_unmap_walker(u64 addr, u64 end, u32 level, kvm_pte_t *ptep,
891 enum kvm_pgtable_walk_flags flag,
894 struct kvm_pgtable *pgt = arg;
895 struct kvm_s2_mmu *mmu = pgt->mmu;
896 struct kvm_pgtable_mm_ops *mm_ops = pgt->mm_ops;
897 kvm_pte_t pte = *ptep, *childp = NULL;
898 bool need_flush = false;
900 if (!kvm_pte_valid(pte)) {
901 if (stage2_pte_is_counted(pte)) {
903 mm_ops->put_page(ptep);
908 if (kvm_pte_table(pte, level)) {
909 childp = kvm_pte_follow(pte, mm_ops);
911 if (mm_ops->page_count(childp) != 1)
913 } else if (stage2_pte_cacheable(pgt, pte)) {
914 need_flush = !stage2_has_fwb(pgt);
918 * This is similar to the map() path in that we unmap the entire
919 * block entry and rely on the remaining portions being faulted
922 stage2_put_pte(ptep, mmu, addr, level, mm_ops);
925 kvm_pte_t *pte_follow = kvm_pte_follow(pte, mm_ops);
927 dcache_clean_inval_poc((unsigned long)pte_follow,
928 (unsigned long)pte_follow +
929 kvm_granule_size(level));
933 mm_ops->put_page(childp);
938 int kvm_pgtable_stage2_unmap(struct kvm_pgtable *pgt, u64 addr, u64 size)
940 struct kvm_pgtable_walker walker = {
941 .cb = stage2_unmap_walker,
943 .flags = KVM_PGTABLE_WALK_LEAF | KVM_PGTABLE_WALK_TABLE_POST,
946 return kvm_pgtable_walk(pgt, addr, size, &walker);
949 struct stage2_attr_data {
954 struct kvm_pgtable_mm_ops *mm_ops;
957 static int stage2_attr_walker(u64 addr, u64 end, u32 level, kvm_pte_t *ptep,
958 enum kvm_pgtable_walk_flags flag,
961 kvm_pte_t pte = *ptep;
962 struct stage2_attr_data *data = arg;
963 struct kvm_pgtable_mm_ops *mm_ops = data->mm_ops;
965 if (!kvm_pte_valid(pte))
970 pte &= ~data->attr_clr;
971 pte |= data->attr_set;
974 * We may race with the CPU trying to set the access flag here,
975 * but worst-case the access flag update gets lost and will be
976 * set on the next access instead.
978 if (data->pte != pte) {
980 * Invalidate instruction cache before updating the guest
981 * stage-2 PTE if we are going to add executable permission.
983 if (mm_ops->icache_inval_pou &&
984 stage2_pte_executable(pte) && !stage2_pte_executable(*ptep))
985 mm_ops->icache_inval_pou(kvm_pte_follow(pte, mm_ops),
986 kvm_granule_size(level));
987 WRITE_ONCE(*ptep, pte);
993 static int stage2_update_leaf_attrs(struct kvm_pgtable *pgt, u64 addr,
994 u64 size, kvm_pte_t attr_set,
995 kvm_pte_t attr_clr, kvm_pte_t *orig_pte,
999 kvm_pte_t attr_mask = KVM_PTE_LEAF_ATTR_LO | KVM_PTE_LEAF_ATTR_HI;
1000 struct stage2_attr_data data = {
1001 .attr_set = attr_set & attr_mask,
1002 .attr_clr = attr_clr & attr_mask,
1003 .mm_ops = pgt->mm_ops,
1005 struct kvm_pgtable_walker walker = {
1006 .cb = stage2_attr_walker,
1008 .flags = KVM_PGTABLE_WALK_LEAF,
1011 ret = kvm_pgtable_walk(pgt, addr, size, &walker);
1016 *orig_pte = data.pte;
1019 *level = data.level;
1023 int kvm_pgtable_stage2_wrprotect(struct kvm_pgtable *pgt, u64 addr, u64 size)
1025 return stage2_update_leaf_attrs(pgt, addr, size, 0,
1026 KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W,
1030 kvm_pte_t kvm_pgtable_stage2_mkyoung(struct kvm_pgtable *pgt, u64 addr)
1033 stage2_update_leaf_attrs(pgt, addr, 1, KVM_PTE_LEAF_ATTR_LO_S2_AF, 0,
1039 kvm_pte_t kvm_pgtable_stage2_mkold(struct kvm_pgtable *pgt, u64 addr)
1042 stage2_update_leaf_attrs(pgt, addr, 1, 0, KVM_PTE_LEAF_ATTR_LO_S2_AF,
1045 * "But where's the TLBI?!", you scream.
1046 * "Over in the core code", I sigh.
1048 * See the '->clear_flush_young()' callback on the KVM mmu notifier.
1053 bool kvm_pgtable_stage2_is_young(struct kvm_pgtable *pgt, u64 addr)
1056 stage2_update_leaf_attrs(pgt, addr, 1, 0, 0, &pte, NULL);
1057 return pte & KVM_PTE_LEAF_ATTR_LO_S2_AF;
1060 int kvm_pgtable_stage2_relax_perms(struct kvm_pgtable *pgt, u64 addr,
1061 enum kvm_pgtable_prot prot)
1065 kvm_pte_t set = 0, clr = 0;
1067 if (prot & KVM_PTE_LEAF_ATTR_HI_SW)
1070 if (prot & KVM_PGTABLE_PROT_R)
1071 set |= KVM_PTE_LEAF_ATTR_LO_S2_S2AP_R;
1073 if (prot & KVM_PGTABLE_PROT_W)
1074 set |= KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W;
1076 if (prot & KVM_PGTABLE_PROT_X)
1077 clr |= KVM_PTE_LEAF_ATTR_HI_S2_XN;
1079 ret = stage2_update_leaf_attrs(pgt, addr, 1, set, clr, NULL, &level);
1081 kvm_call_hyp(__kvm_tlb_flush_vmid_ipa, pgt->mmu, addr, level);
1085 static int stage2_flush_walker(u64 addr, u64 end, u32 level, kvm_pte_t *ptep,
1086 enum kvm_pgtable_walk_flags flag,
1089 struct kvm_pgtable *pgt = arg;
1090 struct kvm_pgtable_mm_ops *mm_ops = pgt->mm_ops;
1091 kvm_pte_t pte = *ptep;
1092 kvm_pte_t *pte_follow;
1094 if (!kvm_pte_valid(pte) || !stage2_pte_cacheable(pgt, pte))
1097 pte_follow = kvm_pte_follow(pte, mm_ops);
1098 dcache_clean_inval_poc((unsigned long)pte_follow,
1099 (unsigned long)pte_follow +
1100 kvm_granule_size(level));
1104 int kvm_pgtable_stage2_flush(struct kvm_pgtable *pgt, u64 addr, u64 size)
1106 struct kvm_pgtable_walker walker = {
1107 .cb = stage2_flush_walker,
1108 .flags = KVM_PGTABLE_WALK_LEAF,
1112 if (stage2_has_fwb(pgt))
1115 return kvm_pgtable_walk(pgt, addr, size, &walker);
1119 int __kvm_pgtable_stage2_init(struct kvm_pgtable *pgt, struct kvm_arch *arch,
1120 struct kvm_pgtable_mm_ops *mm_ops,
1121 enum kvm_pgtable_stage2_flags flags,
1122 kvm_pgtable_force_pte_cb_t force_pte_cb)
1125 u64 vtcr = arch->vtcr;
1126 u32 ia_bits = VTCR_EL2_IPA(vtcr);
1127 u32 sl0 = FIELD_GET(VTCR_EL2_SL0_MASK, vtcr);
1128 u32 start_level = VTCR_EL2_TGRAN_SL0_BASE - sl0;
1130 pgd_sz = kvm_pgd_pages(ia_bits, start_level) * PAGE_SIZE;
1131 pgt->pgd = mm_ops->zalloc_pages_exact(pgd_sz);
1135 pgt->ia_bits = ia_bits;
1136 pgt->start_level = start_level;
1137 pgt->mm_ops = mm_ops;
1138 pgt->mmu = &arch->mmu;
1140 pgt->force_pte_cb = force_pte_cb;
1142 /* Ensure zeroed PGD pages are visible to the hardware walker */
1147 static int stage2_free_walker(u64 addr, u64 end, u32 level, kvm_pte_t *ptep,
1148 enum kvm_pgtable_walk_flags flag,
1151 struct kvm_pgtable_mm_ops *mm_ops = arg;
1152 kvm_pte_t pte = *ptep;
1154 if (!stage2_pte_is_counted(pte))
1157 mm_ops->put_page(ptep);
1159 if (kvm_pte_table(pte, level))
1160 mm_ops->put_page(kvm_pte_follow(pte, mm_ops));
1165 void kvm_pgtable_stage2_destroy(struct kvm_pgtable *pgt)
1168 struct kvm_pgtable_walker walker = {
1169 .cb = stage2_free_walker,
1170 .flags = KVM_PGTABLE_WALK_LEAF |
1171 KVM_PGTABLE_WALK_TABLE_POST,
1175 WARN_ON(kvm_pgtable_walk(pgt, 0, BIT(pgt->ia_bits), &walker));
1176 pgd_sz = kvm_pgd_pages(pgt->ia_bits, pgt->start_level) * PAGE_SIZE;
1177 pgt->mm_ops->free_pages_exact(pgt->pgd, pgd_sz);