arch/arm64/boot/dts/renesas/salvator-common.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for common parts of Salvator-X board variants
   4  *
   5  * Copyright (C) 2015-2016 Renesas Electronics Corp.
   6  */
   7
   8 /*
   9  * SSI-AK4613
  10  *
  11  * This command is required when Playback/Capture
  12  *
  13  *      amixer set "DVC Out" 100%
  14  *      amixer set "DVC In" 100%
  15  *
  16  * You can use Mute
  17  *
  18  *      amixer set "DVC Out Mute" on
  19  *      amixer set "DVC In Mute" on
  20  *
  21  * You can use Volume Ramp
  22  *
  23  *      amixer set "DVC Out Ramp Up Rate"   "0.125 dB/64 steps"
  24  *      amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps"
  25  *      amixer set "DVC Out Ramp" on
  26  *      aplay xxx.wav &
  27  *      amixer set "DVC Out"  80%  // Volume Down
  28  *      amixer set "DVC Out" 100%  // Volume Up
  29  */
  30
  31 #include <dt-bindings/gpio/gpio.h>
  32 #include <dt-bindings/input/input.h>
  33
  34 / {
  35         aliases {
  36                 serial0 = &scif2;
  37                 serial1 = &hscif1;
  38                 ethernet0 = &avb;
  39                 mmc0 = &sdhi2;
  40                 mmc1 = &sdhi0;
  41                 mmc2 = &sdhi3;
  42         };
  43
  44         chosen {
  45                 bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
  46                 stdout-path = "serial0:115200n8";
  47         };
  48
  49         audio_clkout: audio-clkout {
  50                 /*
  51                  * This is same as <&rcar_sound 0>
  52                  * but needed to avoid cs2000/rcar_sound probe dead-lock
  53                  */
  54                 compatible = "fixed-clock";
  55                 #clock-cells = <0>;
  56                 clock-frequency = <12288000>;
  57         };
  58
  59         backlight: backlight {
  60                 compatible = "pwm-backlight";
  61                 pwms = <&pwm1 0 50000>;
  62
  63                 brightness-levels = <256 128 64 16 8 4 0>;
  64                 default-brightness-level = <6>;
  65
  66                 power-supply = <&reg_12v>;
  67                 enable-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
  68         };
  69
  70         cvbs-in {
  71                 compatible = "composite-video-connector";
  72                 label = "CVBS IN";
  73
  74                 port {
  75                         cvbs_con: endpoint {
  76                                 remote-endpoint = <&adv7482_ain7>;
  77                         };
  78                 };
  79         };
  80
  81         hdmi-in {
  82                 compatible = "hdmi-connector";
  83                 label = "HDMI IN";
  84                 type = "a";
  85
  86                 port {
  87                         hdmi_in_con: endpoint {
  88                                 remote-endpoint = <&adv7482_hdmi>;
  89                         };
  90                 };
  91         };
  92
  93         hdmi0-out {
  94                 compatible = "hdmi-connector";
  95                 label = "HDMI0 OUT";
  96                 type = "a";
  97
  98                 port {
  99                         hdmi0_con: endpoint {
 100                         };
 101                 };
 102         };
 103
 104         hdmi1-out {
 105                 compatible = "hdmi-connector";
 106                 label = "HDMI1 OUT";
 107                 type = "a";
 108
 109                 port {
 110                         hdmi1_con: endpoint {
 111                         };
 112                 };
 113         };
 114
 115         keys {
 116                 compatible = "gpio-keys";
 117
 118                 pinctrl-0 = <&keys_pins>;
 119                 pinctrl-names = "default";
 120
 121                 key-1 {
 122                         gpios = <&gpio5 17 GPIO_ACTIVE_LOW>;
 123                         linux,code = <KEY_1>;
 124                         label = "SW4-1";
 125                         wakeup-source;
 126                         debounce-interval = <20>;
 127                 };
 128                 key-2 {
 129                         gpios = <&gpio5 20 GPIO_ACTIVE_LOW>;
 130                         linux,code = <KEY_2>;
 131                         label = "SW4-2";
 132                         wakeup-source;
 133                         debounce-interval = <20>;
 134                 };
 135                 key-3 {
 136                         gpios = <&gpio5 22 GPIO_ACTIVE_LOW>;
 137                         linux,code = <KEY_3>;
 138                         label = "SW4-3";
 139                         wakeup-source;
 140                         debounce-interval = <20>;
 141                 };
 142                 key-4 {
 143                         gpios = <&gpio5 23 GPIO_ACTIVE_LOW>;
 144                         linux,code = <KEY_4>;
 145                         label = "SW4-4";
 146                         wakeup-source;
 147                         debounce-interval = <20>;
 148                 };
 149                 key-a {
 150                         gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
 151                         linux,code = <KEY_A>;
 152                         label = "TSW0";
 153                         wakeup-source;
 154                         debounce-interval = <20>;
 155                 };
 156                 key-b {
 157                         gpios = <&gpio6 12 GPIO_ACTIVE_LOW>;
 158                         linux,code = <KEY_B>;
 159                         label = "TSW1";
 160                         wakeup-source;
 161                         debounce-interval = <20>;
 162                 };
 163                 key-c {
 164                         gpios = <&gpio6 13 GPIO_ACTIVE_LOW>;
 165                         linux,code = <KEY_C>;
 166                         label = "TSW2";
 167                         wakeup-source;
 168                         debounce-interval = <20>;
 169                 };
 170         };
 171
 172         reg_1p8v: regulator0 {
 173                 compatible = "regulator-fixed";
 174                 regulator-name = "fixed-1.8V";
 175                 regulator-min-microvolt = <1800000>;
 176                 regulator-max-microvolt = <1800000>;
 177                 regulator-boot-on;
 178                 regulator-always-on;
 179         };
 180
 181         reg_3p3v: regulator1 {
 182                 compatible = "regulator-fixed";
 183                 regulator-name = "fixed-3.3V";
 184                 regulator-min-microvolt = <3300000>;
 185                 regulator-max-microvolt = <3300000>;
 186                 regulator-boot-on;
 187                 regulator-always-on;
 188         };
 189
 190         reg_12v: regulator2 {
 191                 compatible = "regulator-fixed";
 192                 regulator-name = "fixed-12V";
 193                 regulator-min-microvolt = <12000000>;
 194                 regulator-max-microvolt = <12000000>;
 195                 regulator-boot-on;
 196                 regulator-always-on;
 197         };
 198
 199         sound_card: sound {
 200                 compatible = "audio-graph-card";
 201
 202                 label = "rcar-sound";
 203
 204                 dais = <&rsnd_port0     /* ak4613 */
 205                         &rsnd_port1     /* HDMI0  */
 206 #ifdef SOC_HAS_HDMI1
 207                         &rsnd_port2     /* HDMI1  */
 208 #endif
 209                         >;
 210         };
 211
 212         vbus0_usb2: regulator-vbus0-usb2 {
 213                 compatible = "regulator-fixed";
 214
 215                 regulator-name = "USB20_VBUS0";
 216                 regulator-min-microvolt = <5000000>;
 217                 regulator-max-microvolt = <5000000>;
 218
 219                 gpio = <&gpio6 16 GPIO_ACTIVE_HIGH>;
 220                 enable-active-high;
 221         };
 222
 223         vcc_sdhi0: regulator-vcc-sdhi0 {
 224                 compatible = "regulator-fixed";
 225
 226                 regulator-name = "SDHI0 Vcc";
 227                 regulator-min-microvolt = <3300000>;
 228                 regulator-max-microvolt = <3300000>;
 229
 230                 gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
 231                 enable-active-high;
 232         };
 233
 234         vccq_sdhi0: regulator-vccq-sdhi0 {
 235                 compatible = "regulator-gpio";
 236
 237                 regulator-name = "SDHI0 VccQ";
 238                 regulator-min-microvolt = <1800000>;
 239                 regulator-max-microvolt = <3300000>;
 240
 241                 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
 242                 gpios-states = <1>;
 243                 states = <3300000 1>, <1800000 0>;
 244         };
 245
 246         vcc_sdhi3: regulator-vcc-sdhi3 {
 247                 compatible = "regulator-fixed";
 248
 249                 regulator-name = "SDHI3 Vcc";
 250                 regulator-min-microvolt = <3300000>;
 251                 regulator-max-microvolt = <3300000>;
 252
 253                 gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>;
 254                 enable-active-high;
 255         };
 256
 257         vccq_sdhi3: regulator-vccq-sdhi3 {
 258                 compatible = "regulator-gpio";
 259
 260                 regulator-name = "SDHI3 VccQ";
 261                 regulator-min-microvolt = <1800000>;
 262                 regulator-max-microvolt = <3300000>;
 263
 264                 gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
 265                 gpios-states = <1>;
 266                 states = <3300000 1>, <1800000 0>;
 267         };
 268
 269         vga {
 270                 compatible = "vga-connector";
 271
 272                 port {
 273                         vga_in: endpoint {
 274                                 remote-endpoint = <&adv7123_out>;
 275                         };
 276                 };
 277         };
 278
 279         vga-encoder {
 280                 compatible = "adi,adv7123";
 281
 282                 ports {
 283                         #address-cells = <1>;
 284                         #size-cells = <0>;
 285
 286                         port@0 {
 287                                 reg = <0>;
 288                                 adv7123_in: endpoint {
 289                                         remote-endpoint = <&du_out_rgb>;
 290                                 };
 291                         };
 292                         port@1 {
 293                                 reg = <1>;
 294                                 adv7123_out: endpoint {
 295                                         remote-endpoint = <&vga_in>;
 296                                 };
 297                         };
 298                 };
 299         };
 300
 301         x12_clk: x12 {
 302                 compatible = "fixed-clock";
 303                 #clock-cells = <0>;
 304                 clock-frequency = <24576000>;
 305         };
 306
 307         /* External DU dot clocks */
 308         x21_clk: x21-clock {
 309                 compatible = "fixed-clock";
 310                 #clock-cells = <0>;
 311                 clock-frequency = <33000000>;
 312         };
 313
 314         x22_clk: x22-clock {
 315                 compatible = "fixed-clock";
 316                 #clock-cells = <0>;
 317                 clock-frequency = <33000000>;
 318         };
 319
 320         x23_clk: x23-clock {
 321                 compatible = "fixed-clock";
 322                 #clock-cells = <0>;
 323                 clock-frequency = <25000000>;
 324         };
 325 };
 326
 327 &a57_0 {
 328         cpu-supply = <&dvfs>;
 329 };
 330
 331 &audio_clk_a {
 332         clock-frequency = <22579200>;
 333 };
 334
 335 &avb {
 336         pinctrl-0 = <&avb_pins>;
 337         pinctrl-names = "default";
 338         phy-handle = <&phy0>;
 339         tx-internal-delay-ps = <2000>;
 340         status = "okay";
 341
 342         phy0: ethernet-phy@0 {
 343                 rxc-skew-ps = <1500>;
 344                 reg = <0>;
 345                 interrupt-parent = <&gpio2>;
 346                 interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
 347                 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
 348         };
 349 };
 350
 351 &csi20 {
 352         status = "okay";
 353
 354         ports {
 355                 port@0 {
 356                         csi20_in: endpoint {
 357                                 clock-lanes = <0>;
 358                                 data-lanes = <1>;
 359                                 remote-endpoint = <&adv7482_txb>;
 360                         };
 361                 };
 362         };
 363 };
 364
 365 &csi40 {
 366         status = "okay";
 367
 368         ports {
 369                 port@0 {
 370                         csi40_in: endpoint {
 371                                 clock-lanes = <0>;
 372                                 data-lanes = <1 2 3 4>;
 373                                 remote-endpoint = <&adv7482_txa>;
 374                         };
 375                 };
 376         };
 377 };
 378
 379 &du {
 380         pinctrl-0 = <&du_pins>;
 381         pinctrl-names = "default";
 382         status = "okay";
 383
 384         ports {
 385                 port@0 {
 386                         endpoint {
 387                                 remote-endpoint = <&adv7123_in>;
 388                         };
 389                 };
 390         };
 391 };
 392
 393 &ehci0 {
 394         dr_mode = "otg";
 395         status = "okay";
 396 };
 397
 398 &ehci1 {
 399         status = "okay";
 400 };
 401
 402 &extalr_clk {
 403         clock-frequency = <32768>;
 404 };
 405
 406 &hdmi0 {
 407         status = "okay";
 408
 409         ports {
 410                 port@1 {
 411                         reg = <1>;
 412                         rcar_dw_hdmi0_out: endpoint {
 413                                 remote-endpoint = <&hdmi0_con>;
 414                         };
 415                 };
 416                 port@2 {
 417                         reg = <2>;
 418                         dw_hdmi0_snd_in: endpoint {
 419                                 remote-endpoint = <&rsnd_endpoint1>;
 420                         };
 421                 };
 422         };
 423 };
 424
 425 &hdmi0_con {
 426         remote-endpoint = <&rcar_dw_hdmi0_out>;
 427 };
 428
 429 #ifdef SOC_HAS_HDMI1
 430 &hdmi1 {
 431         status = "okay";
 432
 433         ports {
 434                 port@1 {
 435                         reg = <1>;
 436                         rcar_dw_hdmi1_out: endpoint {
 437                                 remote-endpoint = <&hdmi1_con>;
 438                         };
 439                 };
 440                 port@2 {
 441                         reg = <2>;
 442                         dw_hdmi1_snd_in: endpoint {
 443                                 remote-endpoint = <&rsnd_endpoint2>;
 444                         };
 445                 };
 446         };
 447 };
 448
 449 &hdmi1_con {
 450         remote-endpoint = <&rcar_dw_hdmi1_out>;
 451 };
 452 #endif /* SOC_HAS_HDMI1 */
 453
 454 &hscif1 {
 455         pinctrl-0 = <&hscif1_pins>;
 456         pinctrl-names = "default";
 457
 458         uart-has-rtscts;
 459         /* Please only enable hscif1 or scif1 */
 460         status = "okay";
 461 };
 462
 463 &hsusb {
 464         dr_mode = "otg";
 465         status = "okay";
 466 };
 467
 468 &i2c2 {
 469         pinctrl-0 = <&i2c2_pins>;
 470         pinctrl-names = "default";
 471
 472         status = "okay";
 473
 474         clock-frequency = <100000>;
 475
 476         ak4613: codec@10 {
 477                 compatible = "asahi-kasei,ak4613";
 478                 #sound-dai-cells = <0>;
 479                 reg = <0x10>;
 480                 clocks = <&rcar_sound 3>;
 481
 482                 asahi-kasei,in1-single-end;
 483                 asahi-kasei,in2-single-end;
 484                 asahi-kasei,out1-single-end;
 485                 asahi-kasei,out2-single-end;
 486                 asahi-kasei,out3-single-end;
 487                 asahi-kasei,out4-single-end;
 488                 asahi-kasei,out5-single-end;
 489                 asahi-kasei,out6-single-end;
 490
 491                 port {
 492                         ak4613_endpoint: endpoint {
 493                                 remote-endpoint = <&rsnd_endpoint0>;
 494                         };
 495                 };
 496         };
 497
 498         cs2000: clk_multiplier@4f {
 499                 #clock-cells = <0>;
 500                 compatible = "cirrus,cs2000-cp";
 501                 reg = <0x4f>;
 502                 clocks = <&audio_clkout>, <&x12_clk>;
 503                 clock-names = "clk_in", "ref_clk";
 504
 505                 assigned-clocks = <&cs2000>;
 506                 assigned-clock-rates = <24576000>; /* 1/1 divide */
 507         };
 508 };
 509
 510 &i2c4 {
 511         status = "okay";
 512
 513         pca9654: gpio@20 {
 514                 compatible = "onnn,pca9654";
 515                 reg = <0x20>;
 516                 gpio-controller;
 517                 #gpio-cells = <2>;
 518         };
 519
 520         video-receiver@70 {
 521                 compatible = "adi,adv7482";
 522                 reg = <0x70 0x71 0x72 0x73 0x74 0x75
 523                        0x60 0x61 0x62 0x63 0x64 0x65>;
 524                 reg-names = "main", "dpll", "cp", "hdmi", "edid", "repeater",
 525                             "infoframe", "cbus", "cec", "sdp", "txa", "txb" ;
 526
 527                 #address-cells = <1>;
 528                 #size-cells = <0>;
 529
 530                 interrupt-parent = <&gpio6>;
 531                 interrupt-names = "intrq1", "intrq2";
 532                 interrupts = <30 IRQ_TYPE_LEVEL_LOW>,
 533                              <31 IRQ_TYPE_LEVEL_LOW>;
 534
 535                 port@7 {
 536                         reg = <7>;
 537
 538                         adv7482_ain7: endpoint {
 539                                 remote-endpoint = <&cvbs_con>;
 540                         };
 541                 };
 542
 543                 port@8 {
 544                         reg = <8>;
 545
 546                         adv7482_hdmi: endpoint {
 547                                 remote-endpoint = <&hdmi_in_con>;
 548                         };
 549                 };
 550
 551                 port@a {
 552                         reg = <10>;
 553
 554                         adv7482_txa: endpoint {
 555                                 clock-lanes = <0>;
 556                                 data-lanes = <1 2 3 4>;
 557                                 remote-endpoint = <&csi40_in>;
 558                         };
 559                 };
 560
 561                 port@b {
 562                         reg = <11>;
 563
 564                         adv7482_txb: endpoint {
 565                                 clock-lanes = <0>;
 566                                 data-lanes = <1>;
 567                                 remote-endpoint = <&csi20_in>;
 568                         };
 569                 };
 570         };
 571
 572         csa_vdd: adc@7c {
 573                 compatible = "maxim,max9611";
 574                 reg = <0x7c>;
 575
 576                 shunt-resistor-micro-ohms = <5000>;
 577         };
 578
 579         csa_dvfs: adc@7f {
 580                 compatible = "maxim,max9611";
 581                 reg = <0x7f>;
 582
 583                 shunt-resistor-micro-ohms = <5000>;
 584         };
 585 };
 586
 587 &i2c_dvfs {
 588         status = "okay";
 589
 590         clock-frequency = <400000>;
 591
 592         pmic: pmic@30 {
 593                 pinctrl-0 = <&irq0_pins>;
 594                 pinctrl-names = "default";
 595
 596                 compatible = "rohm,bd9571mwv";
 597                 reg = <0x30>;
 598                 interrupt-parent = <&intc_ex>;
 599                 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
 600                 interrupt-controller;
 601                 #interrupt-cells = <2>;
 602                 gpio-controller;
 603                 #gpio-cells = <2>;
 604                 rohm,ddr-backup-power = <0xf>;
 605                 rohm,rstbmode-level;
 606
 607                 regulators {
 608                         dvfs: dvfs {
 609                                 regulator-name = "dvfs";
 610                                 regulator-min-microvolt = <750000>;
 611                                 regulator-max-microvolt = <1030000>;
 612                                 regulator-boot-on;
 613                                 regulator-always-on;
 614                         };
 615                 };
 616         };
 617
 618         eeprom@50 {
 619                 compatible = "rohm,br24t01", "atmel,24c01";
 620                 reg = <0x50>;
 621                 pagesize = <8>;
 622         };
 623 };
 624
 625 &ohci0 {
 626         dr_mode = "otg";
 627         status = "okay";
 628 };
 629
 630 &ohci1 {
 631         status = "okay";
 632 };
 633
 634 &pcie_bus_clk {
 635         clock-frequency = <100000000>;
 636 };
 637
 638 &pciec0 {
 639         status = "okay";
 640 };
 641
 642 &pciec1 {
 643         status = "okay";
 644 };
 645
 646 &pfc {
 647         pinctrl-0 = <&scif_clk_pins>;
 648         pinctrl-names = "default";
 649
 650         avb_pins: avb {
 651                 mux {
 652                         groups = "avb_link", "avb_mdio", "avb_mii";
 653                         function = "avb";
 654                 };
 655
 656                 pins_mdio {
 657                         groups = "avb_mdio";
 658                         drive-strength = <24>;
 659                 };
 660
 661                 pins_mii_tx {
 662                         pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
 663                                "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
 664                         drive-strength = <12>;
 665                 };
 666         };
 667
 668         du_pins: du {
 669                 groups = "du_rgb888", "du_sync", "du_oddf", "du_clk_out_0";
 670                 function = "du";
 671         };
 672
 673         hscif1_pins: hscif1 {
 674                 groups = "hscif1_data_a", "hscif1_ctrl_a";
 675                 function = "hscif1";
 676         };
 677
 678         i2c2_pins: i2c2 {
 679                 groups = "i2c2_a";
 680                 function = "i2c2";
 681         };
 682
 683         irq0_pins: irq0 {
 684                 groups = "intc_ex_irq0";
 685                 function = "intc_ex";
 686         };
 687
 688         keys_pins: keys {
 689                 pins = "GP_5_17", "GP_5_20", "GP_5_22";
 690                 bias-pull-up;
 691         };
 692
 693         pwm1_pins: pwm1 {
 694                 groups = "pwm1_a";
 695                 function = "pwm1";
 696         };
 697
 698         scif1_pins: scif1 {
 699                 groups = "scif1_data_a", "scif1_ctrl";
 700                 function = "scif1";
 701         };
 702
 703         scif2_pins: scif2 {
 704                 groups = "scif2_data_a";
 705                 function = "scif2";
 706         };
 707
 708         scif_clk_pins: scif_clk {
 709                 groups = "scif_clk_a";
 710                 function = "scif_clk";
 711         };
 712
 713         sdhi0_pins: sd0 {
 714                 groups = "sdhi0_data4", "sdhi0_ctrl";
 715                 function = "sdhi0";
 716                 power-source = <3300>;
 717         };
 718
 719         sdhi0_pins_uhs: sd0_uhs {
 720                 groups = "sdhi0_data4", "sdhi0_ctrl";
 721                 function = "sdhi0";
 722                 power-source = <1800>;
 723         };
 724
 725         sdhi2_pins: sd2 {
 726                 groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
 727                 function = "sdhi2";
 728                 power-source = <1800>;
 729         };
 730
 731         sdhi3_pins: sd3 {
 732                 groups = "sdhi3_data4", "sdhi3_ctrl";
 733                 function = "sdhi3";
 734                 power-source = <3300>;
 735         };
 736
 737         sdhi3_pins_uhs: sd3_uhs {
 738                 groups = "sdhi3_data4", "sdhi3_ctrl";
 739                 function = "sdhi3";
 740                 power-source = <1800>;
 741         };
 742
 743         sound_pins: sound {
 744                 groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
 745                 function = "ssi";
 746         };
 747
 748         sound_clk_pins: sound_clk {
 749                 groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
 750                          "audio_clkout_a", "audio_clkout3_a";
 751                 function = "audio_clk";
 752         };
 753
 754         usb0_pins: usb0 {
 755                 groups = "usb0";
 756                 function = "usb0";
 757         };
 758
 759         usb1_pins: usb1 {
 760                 mux {
 761                         groups = "usb1";
 762                         function = "usb1";
 763                 };
 764
 765                 ovc {
 766                         pins = "GP_6_27";
 767                         bias-pull-up;
 768                 };
 769
 770                 pwen {
 771                         pins = "GP_6_26";
 772                         bias-pull-down;
 773                 };
 774         };
 775
 776         usb30_pins: usb30 {
 777                 groups = "usb30";
 778                 function = "usb30";
 779         };
 780 };
 781
 782 &pwm1 {
 783         pinctrl-0 = <&pwm1_pins>;
 784         pinctrl-names = "default";
 785
 786         status = "okay";
 787 };
 788
 789 &rcar_sound {
 790         pinctrl-0 = <&sound_pins>, <&sound_clk_pins>;
 791         pinctrl-names = "default";
 792
 793         /* Single DAI */
 794         #sound-dai-cells = <0>;
 795
 796         /* audio_clkout0/1/2/3 */
 797         #clock-cells = <1>;
 798         clock-frequency = <12288000 11289600>;
 799
 800         status = "okay";
 801
 802         /* update <audio_clk_b> to <cs2000> */
 803         clocks = <&cpg CPG_MOD 1005>,
 804                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
 805                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
 806                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
 807                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
 808                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
 809                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
 810                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
 811                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
 812                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
 813                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
 814                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
 815                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
 816                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
 817                  <&audio_clk_a>, <&cs2000>,
 818                  <&audio_clk_c>,
 819                  <&cpg CPG_CORE CPG_AUDIO_CLK_I>;
 820
 821         ports {
 822                 #address-cells = <1>;
 823                 #size-cells = <0>;
 824                 rsnd_port0: port@0 {
 825                         reg = <0>;
 826                         rsnd_endpoint0: endpoint {
 827                                 remote-endpoint = <&ak4613_endpoint>;
 828
 829                                 dai-format = "left_j";
 830                                 bitclock-master = <&rsnd_endpoint0>;
 831                                 frame-master = <&rsnd_endpoint0>;
 832
 833                                 playback = <&ssi0>, <&src0>, <&dvc0>;
 834                                 capture  = <&ssi1>, <&src1>, <&dvc1>;
 835                         };
 836                 };
 837
 838                 rsnd_port1: port@1 {
 839                         reg = <1>;
 840                         rsnd_endpoint1: endpoint {
 841                                 remote-endpoint = <&dw_hdmi0_snd_in>;
 842
 843                                 dai-format = "i2s";
 844                                 bitclock-master = <&rsnd_endpoint1>;
 845                                 frame-master = <&rsnd_endpoint1>;
 846
 847                                 playback = <&ssi2>;
 848                         };
 849                 };
 850
 851 #ifdef SOC_HAS_HDMI1
 852                 rsnd_port2: port@2 {
 853                         reg = <2>;
 854                         rsnd_endpoint2: endpoint {
 855                                 remote-endpoint = <&dw_hdmi1_snd_in>;
 856
 857                                 dai-format = "i2s";
 858                                 bitclock-master = <&rsnd_endpoint2>;
 859                                 frame-master = <&rsnd_endpoint2>;
 860
 861                                 playback = <&ssi3>;
 862                         };
 863                 };
 864 #endif /* SOC_HAS_HDMI1 */
 865         };
 866 };
 867
 868 &rwdt {
 869         timeout-sec = <60>;
 870         status = "okay";
 871 };
 872
 873 #ifdef SOC_HAS_SATA
 874 &sata {
 875         status = "okay";
 876 };
 877 #endif /* SOC_HAS_SATA */
 878
 879 &scif1 {
 880         pinctrl-0 = <&scif1_pins>;
 881         pinctrl-names = "default";
 882
 883         uart-has-rtscts;
 884         /* Please only enable hscif1 or scif1 */
 885         /* status = "okay"; */
 886 };
 887
 888 &scif2 {
 889         pinctrl-0 = <&scif2_pins>;
 890         pinctrl-names = "default";
 891
 892         status = "okay";
 893 };
 894
 895 &scif_clk {
 896         clock-frequency = <14745600>;
 897 };
 898
 899 &sdhi0 {
 900         pinctrl-0 = <&sdhi0_pins>;
 901         pinctrl-1 = <&sdhi0_pins_uhs>;
 902         pinctrl-names = "default", "state_uhs";
 903
 904         vmmc-supply = <&vcc_sdhi0>;
 905         vqmmc-supply = <&vccq_sdhi0>;
 906         cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
 907         wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
 908         bus-width = <4>;
 909         sd-uhs-sdr50;
 910         sd-uhs-sdr104;
 911         status = "okay";
 912 };
 913
 914 &sdhi2 {
 915         /* used for on-board 8bit eMMC */
 916         pinctrl-0 = <&sdhi2_pins>;
 917         pinctrl-1 = <&sdhi2_pins>;
 918         pinctrl-names = "default", "state_uhs";
 919
 920         vmmc-supply = <&reg_3p3v>;
 921         vqmmc-supply = <&reg_1p8v>;
 922         bus-width = <8>;
 923         mmc-hs200-1_8v;
 924         mmc-hs400-1_8v;
 925         no-sd;
 926         no-sdio;
 927         non-removable;
 928         fixed-emmc-driver-type = <1>;
 929         full-pwr-cycle-in-suspend;
 930         status = "okay";
 931 };
 932
 933 &sdhi3 {
 934         pinctrl-0 = <&sdhi3_pins>;
 935         pinctrl-1 = <&sdhi3_pins_uhs>;
 936         pinctrl-names = "default", "state_uhs";
 937
 938         vmmc-supply = <&vcc_sdhi3>;
 939         vqmmc-supply = <&vccq_sdhi3>;
 940         cd-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
 941         wp-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
 942         bus-width = <4>;
 943         sd-uhs-sdr50;
 944         sd-uhs-sdr104;
 945         status = "okay";
 946 };
 947
 948 &ssi1 {
 949         shared-pin;
 950 };
 951
 952 &usb_extal_clk {
 953         clock-frequency = <50000000>;
 954 };
 955
 956 &usb2_phy0 {
 957         pinctrl-0 = <&usb0_pins>;
 958         pinctrl-names = "default";
 959
 960         vbus-supply = <&vbus0_usb2>;
 961         status = "okay";
 962 };
 963
 964 &usb2_phy1 {
 965         pinctrl-0 = <&usb1_pins>;
 966         pinctrl-names = "default";
 967
 968         status = "okay";
 969 };
 970
 971 &usb3_peri0 {
 972         phys = <&usb3_phy0>;
 973         phy-names = "usb";
 974
 975         companion = <&xhci0>;
 976
 977         status = "okay";
 978 };
 979
 980 &usb3_phy0 {
 981         status = "okay";
 982 };
 983
 984 &usb3s0_clk {
 985         clock-frequency = <100000000>;
 986 };
 987
 988 &vin0 {
 989         status = "okay";
 990 };
 991
 992 &vin1 {
 993         status = "okay";
 994 };
 995
 996 &vin2 {
 997         status = "okay";
 998 };
 999
1000 &vin3 {
1001         status = "okay";
1002 };
1003
1004 &vin4 {
1005         status = "okay";
1006 };
1007
1008 &vin5 {
1009         status = "okay";
1010 };
1011
1012 &vin6 {
1013         status = "okay";
1014 };
1015
1016 &vin7 {
1017         status = "okay";
1018 };
1019
1020 &xhci0 {
1021         pinctrl-0 = <&usb30_pins>;
1022         pinctrl-names = "default";
1023
1024         status = "okay";
1025 };
1026
1027 #ifdef SOC_HAS_USB2_CH2
1028 &ehci2 {
1029         status = "okay";
1030 };
1031
1032 &ohci2 {
1033         status = "okay";
1034 };
1035
1036 &pfc {
1037         usb2_pins: usb2 {
1038                 groups = "usb2";
1039                 function = "usb2";
1040         };
1041 };
1042
1043 &usb2_phy2 {
1044         pinctrl-0 = <&usb2_pins>;
1045         pinctrl-names = "default";
1046
1047         status = "okay";
1048 };
1049 #endif /* SOC_HAS_USB2_CH2 */