arch/arm64/boot/dts/renesas/r8a77990.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the R-Car E3 (R8A77990) SoC
   4  *
   5  * Copyright (C) 2018-2019 Renesas Electronics Corp.
   6  */
   7
   8 #include <dt-bindings/clock/r8a77990-cpg-mssr.h>
   9 #include <dt-bindings/interrupt-controller/arm-gic.h>
  10 #include <dt-bindings/power/r8a77990-sysc.h>
  11
  12 / {
  13         compatible = "renesas,r8a77990";
  14         #address-cells = <2>;
  15         #size-cells = <2>;
  16
  17         aliases {
  18                 i2c0 = &i2c0;
  19                 i2c1 = &i2c1;
  20                 i2c2 = &i2c2;
  21                 i2c3 = &i2c3;
  22                 i2c4 = &i2c4;
  23                 i2c5 = &i2c5;
  24                 i2c6 = &i2c6;
  25                 i2c7 = &i2c7;
  26         };
  27
  28         /*
  29          * The external audio clocks are configured as 0 Hz fixed frequency
  30          * clocks by default.
  31          * Boards that provide audio clocks should override them.
  32          */
  33         audio_clk_a: audio_clk_a {
  34                 compatible = "fixed-clock";
  35                 #clock-cells = <0>;
  36                 clock-frequency = <0>;
  37         };
  38
  39         audio_clk_b: audio_clk_b {
  40                 compatible = "fixed-clock";
  41                 #clock-cells = <0>;
  42                 clock-frequency = <0>;
  43         };
  44
  45         audio_clk_c: audio_clk_c {
  46                 compatible = "fixed-clock";
  47                 #clock-cells = <0>;
  48                 clock-frequency = <0>;
  49         };
  50
  51         /* External CAN clock - to be overridden by boards that provide it */
  52         can_clk: can {
  53                 compatible = "fixed-clock";
  54                 #clock-cells = <0>;
  55                 clock-frequency = <0>;
  56         };
  57
  58         cluster1_opp: opp_table10 {
  59                 compatible = "operating-points-v2";
  60                 opp-shared;
  61                 opp-800000000 {
  62                         opp-hz = /bits/ 64 <800000000>;
  63                         opp-microvolt = <820000>;
  64                         clock-latency-ns = <300000>;
  65                 };
  66                 opp-1000000000 {
  67                         opp-hz = /bits/ 64 <1000000000>;
  68                         opp-microvolt = <820000>;
  69                         clock-latency-ns = <300000>;
  70                 };
  71                 opp-1200000000 {
  72                         opp-hz = /bits/ 64 <1200000000>;
  73                         opp-microvolt = <820000>;
  74                         clock-latency-ns = <300000>;
  75                         opp-suspend;
  76                 };
  77         };
  78
  79         cpus {
  80                 #address-cells = <1>;
  81                 #size-cells = <0>;
  82
  83                 a53_0: cpu@0 {
  84                         compatible = "arm,cortex-a53";
  85                         reg = <0>;
  86                         device_type = "cpu";
  87                         #cooling-cells = <2>;
  88                         power-domains = <&sysc R8A77990_PD_CA53_CPU0>;
  89                         next-level-cache = <&L2_CA53>;
  90                         enable-method = "psci";
  91                         cpu-idle-states = <&CPU_SLEEP_0>;
  92                         dynamic-power-coefficient = <277>;
  93                         clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>;
  94                         operating-points-v2 = <&cluster1_opp>;
  95                 };
  96
  97                 a53_1: cpu@1 {
  98                         compatible = "arm,cortex-a53";
  99                         reg = <1>;
 100                         device_type = "cpu";
 101                         power-domains = <&sysc R8A77990_PD_CA53_CPU1>;
 102                         next-level-cache = <&L2_CA53>;
 103                         enable-method = "psci";
 104                         cpu-idle-states = <&CPU_SLEEP_0>;
 105                         clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>;
 106                         operating-points-v2 = <&cluster1_opp>;
 107                 };
 108
 109                 L2_CA53: cache-controller-0 {
 110                         compatible = "cache";
 111                         power-domains = <&sysc R8A77990_PD_CA53_SCU>;
 112                         cache-unified;
 113                         cache-level = <2>;
 114                 };
 115
 116                 idle-states {
 117                         entry-method = "psci";
 118
 119                         CPU_SLEEP_0: cpu-sleep-0 {
 120                                 compatible = "arm,idle-state";
 121                                 arm,psci-suspend-param = <0x0010000>;
 122                                 local-timer-stop;
 123                                 entry-latency-us = <700>;
 124                                 exit-latency-us = <700>;
 125                                 min-residency-us = <5000>;
 126                         };
 127                 };
 128         };
 129
 130         extal_clk: extal {
 131                 compatible = "fixed-clock";
 132                 #clock-cells = <0>;
 133                 /* This value must be overridden by the board */
 134                 clock-frequency = <0>;
 135         };
 136
 137         /* External PCIe clock - can be overridden by the board */
 138         pcie_bus_clk: pcie_bus {
 139                 compatible = "fixed-clock";
 140                 #clock-cells = <0>;
 141                 clock-frequency = <0>;
 142         };
 143
 144         pmu_a53 {
 145                 compatible = "arm,cortex-a53-pmu";
 146                 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
 147                                       <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
 148                 interrupt-affinity = <&a53_0>, <&a53_1>;
 149         };
 150
 151         psci {
 152                 compatible = "arm,psci-1.0", "arm,psci-0.2";
 153                 method = "smc";
 154         };
 155
 156         /* External SCIF clock - to be overridden by boards that provide it */
 157         scif_clk: scif {
 158                 compatible = "fixed-clock";
 159                 #clock-cells = <0>;
 160                 clock-frequency = <0>;
 161         };
 162
 163         soc: soc {
 164                 compatible = "simple-bus";
 165                 interrupt-parent = <&gic>;
 166                 #address-cells = <2>;
 167                 #size-cells = <2>;
 168                 ranges;
 169
 170                 rwdt: watchdog@e6020000 {
 171                         compatible = "renesas,r8a77990-wdt",
 172                                      "renesas,rcar-gen3-wdt";
 173                         reg = <0 0xe6020000 0 0x0c>;
 174                         clocks = <&cpg CPG_MOD 402>;
 175                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 176                         resets = <&cpg 402>;
 177                         status = "disabled";
 178                 };
 179
 180                 gpio0: gpio@e6050000 {
 181                         compatible = "renesas,gpio-r8a77990",
 182                                      "renesas,rcar-gen3-gpio";
 183                         reg = <0 0xe6050000 0 0x50>;
 184                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 185                         #gpio-cells = <2>;
 186                         gpio-controller;
 187                         gpio-ranges = <&pfc 0 0 18>;
 188                         #interrupt-cells = <2>;
 189                         interrupt-controller;
 190                         clocks = <&cpg CPG_MOD 912>;
 191                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 192                         resets = <&cpg 912>;
 193                 };
 194
 195                 gpio1: gpio@e6051000 {
 196                         compatible = "renesas,gpio-r8a77990",
 197                                      "renesas,rcar-gen3-gpio";
 198                         reg = <0 0xe6051000 0 0x50>;
 199                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 200                         #gpio-cells = <2>;
 201                         gpio-controller;
 202                         gpio-ranges = <&pfc 0 32 23>;
 203                         #interrupt-cells = <2>;
 204                         interrupt-controller;
 205                         clocks = <&cpg CPG_MOD 911>;
 206                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 207                         resets = <&cpg 911>;
 208                 };
 209
 210                 gpio2: gpio@e6052000 {
 211                         compatible = "renesas,gpio-r8a77990",
 212                                      "renesas,rcar-gen3-gpio";
 213                         reg = <0 0xe6052000 0 0x50>;
 214                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 215                         #gpio-cells = <2>;
 216                         gpio-controller;
 217                         gpio-ranges = <&pfc 0 64 26>;
 218                         #interrupt-cells = <2>;
 219                         interrupt-controller;
 220                         clocks = <&cpg CPG_MOD 910>;
 221                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 222                         resets = <&cpg 910>;
 223                 };
 224
 225                 gpio3: gpio@e6053000 {
 226                         compatible = "renesas,gpio-r8a77990",
 227                                      "renesas,rcar-gen3-gpio";
 228                         reg = <0 0xe6053000 0 0x50>;
 229                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 230                         #gpio-cells = <2>;
 231                         gpio-controller;
 232                         gpio-ranges = <&pfc 0 96 16>;
 233                         #interrupt-cells = <2>;
 234                         interrupt-controller;
 235                         clocks = <&cpg CPG_MOD 909>;
 236                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 237                         resets = <&cpg 909>;
 238                 };
 239
 240                 gpio4: gpio@e6054000 {
 241                         compatible = "renesas,gpio-r8a77990",
 242                                      "renesas,rcar-gen3-gpio";
 243                         reg = <0 0xe6054000 0 0x50>;
 244                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 245                         #gpio-cells = <2>;
 246                         gpio-controller;
 247                         gpio-ranges = <&pfc 0 128 11>;
 248                         #interrupt-cells = <2>;
 249                         interrupt-controller;
 250                         clocks = <&cpg CPG_MOD 908>;
 251                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 252                         resets = <&cpg 908>;
 253                 };
 254
 255                 gpio5: gpio@e6055000 {
 256                         compatible = "renesas,gpio-r8a77990",
 257                                      "renesas,rcar-gen3-gpio";
 258                         reg = <0 0xe6055000 0 0x50>;
 259                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 260                         #gpio-cells = <2>;
 261                         gpio-controller;
 262                         gpio-ranges = <&pfc 0 160 20>;
 263                         #interrupt-cells = <2>;
 264                         interrupt-controller;
 265                         clocks = <&cpg CPG_MOD 907>;
 266                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 267                         resets = <&cpg 907>;
 268                 };
 269
 270                 gpio6: gpio@e6055400 {
 271                         compatible = "renesas,gpio-r8a77990",
 272                                      "renesas,rcar-gen3-gpio";
 273                         reg = <0 0xe6055400 0 0x50>;
 274                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 275                         #gpio-cells = <2>;
 276                         gpio-controller;
 277                         gpio-ranges = <&pfc 0 192 18>;
 278                         #interrupt-cells = <2>;
 279                         interrupt-controller;
 280                         clocks = <&cpg CPG_MOD 906>;
 281                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 282                         resets = <&cpg 906>;
 283                 };
 284
 285                 pfc: pinctrl@e6060000 {
 286                         compatible = "renesas,pfc-r8a77990";
 287                         reg = <0 0xe6060000 0 0x508>;
 288                 };
 289
 290                 i2c_dvfs: i2c@e60b0000 {
 291                         #address-cells = <1>;
 292                         #size-cells = <0>;
 293                         compatible = "renesas,iic-r8a77990",
 294                                      "renesas,rcar-gen3-iic",
 295                                      "renesas,rmobile-iic";
 296                         reg = <0 0xe60b0000 0 0x425>;
 297                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 298                         clocks = <&cpg CPG_MOD 926>;
 299                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 300                         resets = <&cpg 926>;
 301                         dmas = <&dmac0 0x11>, <&dmac0 0x10>;
 302                         dma-names = "tx", "rx";
 303                         status = "disabled";
 304                 };
 305
 306                 cmt0: timer@e60f0000 {
 307                         compatible = "renesas,r8a77990-cmt0",
 308                                      "renesas,rcar-gen3-cmt0";
 309                         reg = <0 0xe60f0000 0 0x1004>;
 310                         interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
 311                                      <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
 312                         clocks = <&cpg CPG_MOD 303>;
 313                         clock-names = "fck";
 314                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 315                         resets = <&cpg 303>;
 316                         status = "disabled";
 317                 };
 318
 319                 cmt1: timer@e6130000 {
 320                         compatible = "renesas,r8a77990-cmt1",
 321                                      "renesas,rcar-gen3-cmt1";
 322                         reg = <0 0xe6130000 0 0x1004>;
 323                         interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
 324                                      <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
 325                                      <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
 326                                      <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
 327                                      <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
 328                                      <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
 329                                      <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
 330                                      <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
 331                         clocks = <&cpg CPG_MOD 302>;
 332                         clock-names = "fck";
 333                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 334                         resets = <&cpg 302>;
 335                         status = "disabled";
 336                 };
 337
 338                 cmt2: timer@e6140000 {
 339                         compatible = "renesas,r8a77990-cmt1",
 340                                      "renesas,rcar-gen3-cmt1";
 341                         reg = <0 0xe6140000 0 0x1004>;
 342                         interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
 343                                      <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
 344                                      <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
 345                                      <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
 346                                      <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
 347                                      <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
 348                                      <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
 349                                      <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
 350                         clocks = <&cpg CPG_MOD 301>;
 351                         clock-names = "fck";
 352                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 353                         resets = <&cpg 301>;
 354                         status = "disabled";
 355                 };
 356
 357                 cmt3: timer@e6148000 {
 358                         compatible = "renesas,r8a77990-cmt1",
 359                                      "renesas,rcar-gen3-cmt1";
 360                         reg = <0 0xe6148000 0 0x1004>;
 361                         interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
 362                                      <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
 363                                      <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
 364                                      <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
 365                                      <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
 366                                      <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
 367                                      <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
 368                                      <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
 369                         clocks = <&cpg CPG_MOD 300>;
 370                         clock-names = "fck";
 371                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 372                         resets = <&cpg 300>;
 373                         status = "disabled";
 374                 };
 375
 376                 cpg: clock-controller@e6150000 {
 377                         compatible = "renesas,r8a77990-cpg-mssr";
 378                         reg = <0 0xe6150000 0 0x1000>;
 379                         clocks = <&extal_clk>;
 380                         clock-names = "extal";
 381                         #clock-cells = <2>;
 382                         #power-domain-cells = <0>;
 383                         #reset-cells = <1>;
 384                 };
 385
 386                 rst: reset-controller@e6160000 {
 387                         compatible = "renesas,r8a77990-rst";
 388                         reg = <0 0xe6160000 0 0x0200>;
 389                 };
 390
 391                 sysc: system-controller@e6180000 {
 392                         compatible = "renesas,r8a77990-sysc";
 393                         reg = <0 0xe6180000 0 0x0400>;
 394                         #power-domain-cells = <1>;
 395                 };
 396
 397                 thermal: thermal@e6190000 {
 398                         compatible = "renesas,thermal-r8a77990";
 399                         reg = <0 0xe6190000 0 0x10>, <0 0xe6190100 0 0x38>;
 400                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
 401                                      <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
 402                                      <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 403                         clocks = <&cpg CPG_MOD 522>;
 404                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 405                         resets = <&cpg 522>;
 406                         #thermal-sensor-cells = <0>;
 407                 };
 408
 409                 intc_ex: interrupt-controller@e61c0000 {
 410                         compatible = "renesas,intc-ex-r8a77990", "renesas,irqc";
 411                         #interrupt-cells = <2>;
 412                         interrupt-controller;
 413                         reg = <0 0xe61c0000 0 0x200>;
 414                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
 415                                      <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
 416                                      <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
 417                                      <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
 418                                      <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
 419                                      <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
 420                         clocks = <&cpg CPG_MOD 407>;
 421                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 422                         resets = <&cpg 407>;
 423                 };
 424
 425                 tmu0: timer@e61e0000 {
 426                         compatible = "renesas,tmu-r8a77990", "renesas,tmu";
 427                         reg = <0 0xe61e0000 0 0x30>;
 428                         interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
 429                                      <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
 430                                      <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
 431                         clocks = <&cpg CPG_MOD 125>;
 432                         clock-names = "fck";
 433                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 434                         resets = <&cpg 125>;
 435                         status = "disabled";
 436                 };
 437
 438                 tmu1: timer@e6fc0000 {
 439                         compatible = "renesas,tmu-r8a77990", "renesas,tmu";
 440                         reg = <0 0xe6fc0000 0 0x30>;
 441                         interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
 442                                      <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
 443                                      <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
 444                         clocks = <&cpg CPG_MOD 124>;
 445                         clock-names = "fck";
 446                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 447                         resets = <&cpg 124>;
 448                         status = "disabled";
 449                 };
 450
 451                 tmu2: timer@e6fd0000 {
 452                         compatible = "renesas,tmu-r8a77990", "renesas,tmu";
 453                         reg = <0 0xe6fd0000 0 0x30>;
 454                         interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
 455                                      <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
 456                                      <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
 457                         clocks = <&cpg CPG_MOD 123>;
 458                         clock-names = "fck";
 459                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 460                         resets = <&cpg 123>;
 461                         status = "disabled";
 462                 };
 463
 464                 tmu3: timer@e6fe0000 {
 465                         compatible = "renesas,tmu-r8a77990", "renesas,tmu";
 466                         reg = <0 0xe6fe0000 0 0x30>;
 467                         interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
 468                                      <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
 469                                      <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
 470                         clocks = <&cpg CPG_MOD 122>;
 471                         clock-names = "fck";
 472                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 473                         resets = <&cpg 122>;
 474                         status = "disabled";
 475                 };
 476
 477                 tmu4: timer@ffc00000 {
 478                         compatible = "renesas,tmu-r8a77990", "renesas,tmu";
 479                         reg = <0 0xffc00000 0 0x30>;
 480                         interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
 481                                      <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
 482                                      <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
 483                         clocks = <&cpg CPG_MOD 121>;
 484                         clock-names = "fck";
 485                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 486                         resets = <&cpg 121>;
 487                         status = "disabled";
 488                 };
 489
 490                 i2c0: i2c@e6500000 {
 491                         #address-cells = <1>;
 492                         #size-cells = <0>;
 493                         compatible = "renesas,i2c-r8a77990",
 494                                      "renesas,rcar-gen3-i2c";
 495                         reg = <0 0xe6500000 0 0x40>;
 496                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 497                         clocks = <&cpg CPG_MOD 931>;
 498                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 499                         resets = <&cpg 931>;
 500                         dmas = <&dmac1 0x91>, <&dmac1 0x90>,
 501                                <&dmac2 0x91>, <&dmac2 0x90>;
 502                         dma-names = "tx", "rx", "tx", "rx";
 503                         i2c-scl-internal-delay-ns = <110>;
 504                         status = "disabled";
 505                 };
 506
 507                 i2c1: i2c@e6508000 {
 508                         #address-cells = <1>;
 509                         #size-cells = <0>;
 510                         compatible = "renesas,i2c-r8a77990",
 511                                      "renesas,rcar-gen3-i2c";
 512                         reg = <0 0xe6508000 0 0x40>;
 513                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 514                         clocks = <&cpg CPG_MOD 930>;
 515                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 516                         resets = <&cpg 930>;
 517                         dmas = <&dmac1 0x93>, <&dmac1 0x92>,
 518                                <&dmac2 0x93>, <&dmac2 0x92>;
 519                         dma-names = "tx", "rx", "tx", "rx";
 520                         i2c-scl-internal-delay-ns = <6>;
 521                         status = "disabled";
 522                 };
 523
 524                 i2c2: i2c@e6510000 {
 525                         #address-cells = <1>;
 526                         #size-cells = <0>;
 527                         compatible = "renesas,i2c-r8a77990",
 528                                      "renesas,rcar-gen3-i2c";
 529                         reg = <0 0xe6510000 0 0x40>;
 530                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 531                         clocks = <&cpg CPG_MOD 929>;
 532                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 533                         resets = <&cpg 929>;
 534                         dmas = <&dmac1 0x95>, <&dmac1 0x94>,
 535                                <&dmac2 0x95>, <&dmac2 0x94>;
 536                         dma-names = "tx", "rx", "tx", "rx";
 537                         i2c-scl-internal-delay-ns = <6>;
 538                         status = "disabled";
 539                 };
 540
 541                 i2c3: i2c@e66d0000 {
 542                         #address-cells = <1>;
 543                         #size-cells = <0>;
 544                         compatible = "renesas,i2c-r8a77990",
 545                                      "renesas,rcar-gen3-i2c";
 546                         reg = <0 0xe66d0000 0 0x40>;
 547                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 548                         clocks = <&cpg CPG_MOD 928>;
 549                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 550                         resets = <&cpg 928>;
 551                         dmas = <&dmac0 0x97>, <&dmac0 0x96>;
 552                         dma-names = "tx", "rx";
 553                         i2c-scl-internal-delay-ns = <110>;
 554                         status = "disabled";
 555                 };
 556
 557                 i2c4: i2c@e66d8000 {
 558                         #address-cells = <1>;
 559                         #size-cells = <0>;
 560                         compatible = "renesas,i2c-r8a77990",
 561                                      "renesas,rcar-gen3-i2c";
 562                         reg = <0 0xe66d8000 0 0x40>;
 563                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 564                         clocks = <&cpg CPG_MOD 927>;
 565                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 566                         resets = <&cpg 927>;
 567                         dmas = <&dmac0 0x99>, <&dmac0 0x98>;
 568                         dma-names = "tx", "rx";
 569                         i2c-scl-internal-delay-ns = <6>;
 570                         status = "disabled";
 571                 };
 572
 573                 i2c5: i2c@e66e0000 {
 574                         #address-cells = <1>;
 575                         #size-cells = <0>;
 576                         compatible = "renesas,i2c-r8a77990",
 577                                      "renesas,rcar-gen3-i2c";
 578                         reg = <0 0xe66e0000 0 0x40>;
 579                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 580                         clocks = <&cpg CPG_MOD 919>;
 581                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 582                         resets = <&cpg 919>;
 583                         dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
 584                         dma-names = "tx", "rx";
 585                         i2c-scl-internal-delay-ns = <6>;
 586                         status = "disabled";
 587                 };
 588
 589                 i2c6: i2c@e66e8000 {
 590                         #address-cells = <1>;
 591                         #size-cells = <0>;
 592                         compatible = "renesas,i2c-r8a77990",
 593                                      "renesas,rcar-gen3-i2c";
 594                         reg = <0 0xe66e8000 0 0x40>;
 595                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 596                         clocks = <&cpg CPG_MOD 918>;
 597                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 598                         resets = <&cpg 918>;
 599                         dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
 600                         dma-names = "tx", "rx";
 601                         i2c-scl-internal-delay-ns = <6>;
 602                         status = "disabled";
 603                 };
 604
 605                 i2c7: i2c@e6690000 {
 606                         #address-cells = <1>;
 607                         #size-cells = <0>;
 608                         compatible = "renesas,i2c-r8a77990",
 609                                      "renesas,rcar-gen3-i2c";
 610                         reg = <0 0xe6690000 0 0x40>;
 611                         interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
 612                         clocks = <&cpg CPG_MOD 1003>;
 613                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 614                         resets = <&cpg 1003>;
 615                         i2c-scl-internal-delay-ns = <6>;
 616                         status = "disabled";
 617                 };
 618
 619                 hscif0: serial@e6540000 {
 620                         compatible = "renesas,hscif-r8a77990",
 621                                      "renesas,rcar-gen3-hscif",
 622                                      "renesas,hscif";
 623                         reg = <0 0xe6540000 0 0x60>;
 624                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 625                         clocks = <&cpg CPG_MOD 520>,
 626                                  <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
 627                                  <&scif_clk>;
 628                         clock-names = "fck", "brg_int", "scif_clk";
 629                         dmas = <&dmac1 0x31>, <&dmac1 0x30>,
 630                                <&dmac2 0x31>, <&dmac2 0x30>;
 631                         dma-names = "tx", "rx", "tx", "rx";
 632                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 633                         resets = <&cpg 520>;
 634                         status = "disabled";
 635                 };
 636
 637                 hscif1: serial@e6550000 {
 638                         compatible = "renesas,hscif-r8a77990",
 639                                      "renesas,rcar-gen3-hscif",
 640                                      "renesas,hscif";
 641                         reg = <0 0xe6550000 0 0x60>;
 642                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 643                         clocks = <&cpg CPG_MOD 519>,
 644                                  <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
 645                                  <&scif_clk>;
 646                         clock-names = "fck", "brg_int", "scif_clk";
 647                         dmas = <&dmac1 0x33>, <&dmac1 0x32>,
 648                                <&dmac2 0x33>, <&dmac2 0x32>;
 649                         dma-names = "tx", "rx", "tx", "rx";
 650                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 651                         resets = <&cpg 519>;
 652                         status = "disabled";
 653                 };
 654
 655                 hscif2: serial@e6560000 {
 656                         compatible = "renesas,hscif-r8a77990",
 657                                      "renesas,rcar-gen3-hscif",
 658                                      "renesas,hscif";
 659                         reg = <0 0xe6560000 0 0x60>;
 660                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 661                         clocks = <&cpg CPG_MOD 518>,
 662                                  <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
 663                                  <&scif_clk>;
 664                         clock-names = "fck", "brg_int", "scif_clk";
 665                         dmas = <&dmac1 0x35>, <&dmac1 0x34>,
 666                                <&dmac2 0x35>, <&dmac2 0x34>;
 667                         dma-names = "tx", "rx", "tx", "rx";
 668                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 669                         resets = <&cpg 518>;
 670                         status = "disabled";
 671                 };
 672
 673                 hscif3: serial@e66a0000 {
 674                         compatible = "renesas,hscif-r8a77990",
 675                                      "renesas,rcar-gen3-hscif",
 676                                      "renesas,hscif";
 677                         reg = <0 0xe66a0000 0 0x60>;
 678                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 679                         clocks = <&cpg CPG_MOD 517>,
 680                                  <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
 681                                  <&scif_clk>;
 682                         clock-names = "fck", "brg_int", "scif_clk";
 683                         dmas = <&dmac0 0x37>, <&dmac0 0x36>;
 684                         dma-names = "tx", "rx";
 685                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 686                         resets = <&cpg 517>;
 687                         status = "disabled";
 688                 };
 689
 690                 hscif4: serial@e66b0000 {
 691                         compatible = "renesas,hscif-r8a77990",
 692                                      "renesas,rcar-gen3-hscif",
 693                                      "renesas,hscif";
 694                         reg = <0 0xe66b0000 0 0x60>;
 695                         interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
 696                         clocks = <&cpg CPG_MOD 516>,
 697                                  <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
 698                                  <&scif_clk>;
 699                         clock-names = "fck", "brg_int", "scif_clk";
 700                         dmas = <&dmac0 0x39>, <&dmac0 0x38>;
 701                         dma-names = "tx", "rx";
 702                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 703                         resets = <&cpg 516>;
 704                         status = "disabled";
 705                 };
 706
 707                 hsusb: usb@e6590000 {
 708                         compatible = "renesas,usbhs-r8a77990",
 709                                      "renesas,rcar-gen3-usbhs";
 710                         reg = <0 0xe6590000 0 0x200>;
 711                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
 712                         clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
 713                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
 714                                <&usb_dmac1 0>, <&usb_dmac1 1>;
 715                         dma-names = "ch0", "ch1", "ch2", "ch3";
 716                         renesas,buswait = <11>;
 717                         phys = <&usb2_phy0 3>;
 718                         phy-names = "usb";
 719                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 720                         resets = <&cpg 704>, <&cpg 703>;
 721                         status = "disabled";
 722                 };
 723
 724                 usb_dmac0: dma-controller@e65a0000 {
 725                         compatible = "renesas,r8a77990-usb-dmac",
 726                                      "renesas,usb-dmac";
 727                         reg = <0 0xe65a0000 0 0x100>;
 728                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
 729                                      <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 730                         interrupt-names = "ch0", "ch1";
 731                         clocks = <&cpg CPG_MOD 330>;
 732                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 733                         resets = <&cpg 330>;
 734                         #dma-cells = <1>;
 735                         dma-channels = <2>;
 736                 };
 737
 738                 usb_dmac1: dma-controller@e65b0000 {
 739                         compatible = "renesas,r8a77990-usb-dmac",
 740                                      "renesas,usb-dmac";
 741                         reg = <0 0xe65b0000 0 0x100>;
 742                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
 743                                      <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 744                         interrupt-names = "ch0", "ch1";
 745                         clocks = <&cpg CPG_MOD 331>;
 746                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 747                         resets = <&cpg 331>;
 748                         #dma-cells = <1>;
 749                         dma-channels = <2>;
 750                 };
 751
 752                 arm_cc630p: crypto@e6601000 {
 753                         compatible = "arm,cryptocell-630p-ree";
 754                         interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
 755                         reg = <0x0 0xe6601000 0 0x1000>;
 756                         clocks = <&cpg CPG_MOD 229>;
 757                         resets = <&cpg 229>;
 758                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 759                 };
 760
 761                 dmac0: dma-controller@e6700000 {
 762                         compatible = "renesas,dmac-r8a77990",
 763                                      "renesas,rcar-dmac";
 764                         reg = <0 0xe6700000 0 0x10000>;
 765                         interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
 766                                      <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
 767                                      <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
 768                                      <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
 769                                      <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
 770                                      <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
 771                                      <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
 772                                      <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
 773                                      <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
 774                                      <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
 775                                      <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
 776                                      <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
 777                                      <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
 778                                      <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
 779                                      <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
 780                                      <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
 781                                      <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
 782                         interrupt-names = "error",
 783                                         "ch0", "ch1", "ch2", "ch3",
 784                                         "ch4", "ch5", "ch6", "ch7",
 785                                         "ch8", "ch9", "ch10", "ch11",
 786                                         "ch12", "ch13", "ch14", "ch15";
 787                         clocks = <&cpg CPG_MOD 219>;
 788                         clock-names = "fck";
 789                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 790                         resets = <&cpg 219>;
 791                         #dma-cells = <1>;
 792                         dma-channels = <16>;
 793                         iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
 794                                <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
 795                                <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
 796                                <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
 797                                <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
 798                                <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
 799                                <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
 800                                <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
 801                 };
 802
 803                 dmac1: dma-controller@e7300000 {
 804                         compatible = "renesas,dmac-r8a77990",
 805                                      "renesas,rcar-dmac";
 806                         reg = <0 0xe7300000 0 0x10000>;
 807                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
 808                                      <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
 809                                      <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
 810                                      <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
 811                                      <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
 812                                      <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
 813                                      <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
 814                                      <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
 815                                      <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
 816                                      <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
 817                                      <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
 818                                      <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
 819                                      <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
 820                                      <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
 821                                      <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
 822                                      <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
 823                                      <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
 824                         interrupt-names = "error",
 825                                         "ch0", "ch1", "ch2", "ch3",
 826                                         "ch4", "ch5", "ch6", "ch7",
 827                                         "ch8", "ch9", "ch10", "ch11",
 828                                         "ch12", "ch13", "ch14", "ch15";
 829                         clocks = <&cpg CPG_MOD 218>;
 830                         clock-names = "fck";
 831                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 832                         resets = <&cpg 218>;
 833                         #dma-cells = <1>;
 834                         dma-channels = <16>;
 835                         iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
 836                                <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
 837                                <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
 838                                <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
 839                                <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
 840                                <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
 841                                <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
 842                                <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
 843                 };
 844
 845                 dmac2: dma-controller@e7310000 {
 846                         compatible = "renesas,dmac-r8a77990",
 847                                      "renesas,rcar-dmac";
 848                         reg = <0 0xe7310000 0 0x10000>;
 849                         interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
 850                                      <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
 851                                      <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
 852                                      <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
 853                                      <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
 854                                      <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
 855                                      <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
 856                                      <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
 857                                      <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
 858                                      <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
 859                                      <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
 860                                      <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
 861                                      <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
 862                                      <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
 863                                      <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
 864                                      <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
 865                                      <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
 866                         interrupt-names = "error",
 867                                         "ch0", "ch1", "ch2", "ch3",
 868                                         "ch4", "ch5", "ch6", "ch7",
 869                                         "ch8", "ch9", "ch10", "ch11",
 870                                         "ch12", "ch13", "ch14", "ch15";
 871                         clocks = <&cpg CPG_MOD 217>;
 872                         clock-names = "fck";
 873                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 874                         resets = <&cpg 217>;
 875                         #dma-cells = <1>;
 876                         dma-channels = <16>;
 877                         iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
 878                                <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
 879                                <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
 880                                <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
 881                                <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
 882                                <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
 883                                <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
 884                                <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
 885                 };
 886
 887                 ipmmu_ds0: iommu@e6740000 {
 888                         compatible = "renesas,ipmmu-r8a77990";
 889                         reg = <0 0xe6740000 0 0x1000>;
 890                         renesas,ipmmu-main = <&ipmmu_mm 0>;
 891                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 892                         #iommu-cells = <1>;
 893                 };
 894
 895                 ipmmu_ds1: iommu@e7740000 {
 896                         compatible = "renesas,ipmmu-r8a77990";
 897                         reg = <0 0xe7740000 0 0x1000>;
 898                         renesas,ipmmu-main = <&ipmmu_mm 1>;
 899                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 900                         #iommu-cells = <1>;
 901                 };
 902
 903                 ipmmu_hc: iommu@e6570000 {
 904                         compatible = "renesas,ipmmu-r8a77990";
 905                         reg = <0 0xe6570000 0 0x1000>;
 906                         renesas,ipmmu-main = <&ipmmu_mm 2>;
 907                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 908                         #iommu-cells = <1>;
 909                 };
 910
 911                 ipmmu_mm: iommu@e67b0000 {
 912                         compatible = "renesas,ipmmu-r8a77990";
 913                         reg = <0 0xe67b0000 0 0x1000>;
 914                         interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
 915                                      <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
 916                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 917                         #iommu-cells = <1>;
 918                 };
 919
 920                 ipmmu_mp: iommu@ec670000 {
 921                         compatible = "renesas,ipmmu-r8a77990";
 922                         reg = <0 0xec670000 0 0x1000>;
 923                         renesas,ipmmu-main = <&ipmmu_mm 4>;
 924                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 925                         #iommu-cells = <1>;
 926                 };
 927
 928                 ipmmu_pv0: iommu@fd800000 {
 929                         compatible = "renesas,ipmmu-r8a77990";
 930                         reg = <0 0xfd800000 0 0x1000>;
 931                         renesas,ipmmu-main = <&ipmmu_mm 6>;
 932                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 933                         #iommu-cells = <1>;
 934                 };
 935
 936                 ipmmu_rt: iommu@ffc80000 {
 937                         compatible = "renesas,ipmmu-r8a77990";
 938                         reg = <0 0xffc80000 0 0x1000>;
 939                         renesas,ipmmu-main = <&ipmmu_mm 10>;
 940                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 941                         #iommu-cells = <1>;
 942                 };
 943
 944                 ipmmu_vc0: iommu@fe6b0000 {
 945                         compatible = "renesas,ipmmu-r8a77990";
 946                         reg = <0 0xfe6b0000 0 0x1000>;
 947                         renesas,ipmmu-main = <&ipmmu_mm 12>;
 948                         power-domains = <&sysc R8A77990_PD_A3VC>;
 949                         #iommu-cells = <1>;
 950                 };
 951
 952                 ipmmu_vi0: iommu@febd0000 {
 953                         compatible = "renesas,ipmmu-r8a77990";
 954                         reg = <0 0xfebd0000 0 0x1000>;
 955                         renesas,ipmmu-main = <&ipmmu_mm 14>;
 956                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 957                         #iommu-cells = <1>;
 958                 };
 959
 960                 ipmmu_vp0: iommu@fe990000 {
 961                         compatible = "renesas,ipmmu-r8a77990";
 962                         reg = <0 0xfe990000 0 0x1000>;
 963                         renesas,ipmmu-main = <&ipmmu_mm 16>;
 964                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 965                         #iommu-cells = <1>;
 966                 };
 967
 968                 avb: ethernet@e6800000 {
 969                         compatible = "renesas,etheravb-r8a77990",
 970                                      "renesas,etheravb-rcar-gen3";
 971                         reg = <0 0xe6800000 0 0x800>;
 972                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
 973                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
 974                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
 975                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
 976                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
 977                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
 978                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
 979                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
 980                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
 981                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
 982                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
 983                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
 984                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
 985                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
 986                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
 987                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
 988                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
 989                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
 990                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
 991                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
 992                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
 993                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
 994                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
 995                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
 996                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
 997                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
 998                                           "ch4", "ch5", "ch6", "ch7",
 999                                           "ch8", "ch9", "ch10", "ch11",
1000                                           "ch12", "ch13", "ch14", "ch15",
1001                                           "ch16", "ch17", "ch18", "ch19",
1002                                           "ch20", "ch21", "ch22", "ch23",
1003                                           "ch24";
1004                         clocks = <&cpg CPG_MOD 812>;
1005                         clock-names = "fck";
1006                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1007                         resets = <&cpg 812>;
1008                         phy-mode = "rgmii";
1009                         rx-internal-delay-ps = <0>;
1010                         iommus = <&ipmmu_ds0 16>;
1011                         #address-cells = <1>;
1012                         #size-cells = <0>;
1013                         status = "disabled";
1014                 };
1015
1016                 can0: can@e6c30000 {
1017                         compatible = "renesas,can-r8a77990",
1018                                      "renesas,rcar-gen3-can";
1019                         reg = <0 0xe6c30000 0 0x1000>;
1020                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1021                         clocks = <&cpg CPG_MOD 916>,
1022                                <&cpg CPG_CORE R8A77990_CLK_CANFD>,
1023                                <&can_clk>;
1024                         clock-names = "clkp1", "clkp2", "can_clk";
1025                         assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>;
1026                         assigned-clock-rates = <40000000>;
1027                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1028                         resets = <&cpg 916>;
1029                         status = "disabled";
1030                 };
1031
1032                 can1: can@e6c38000 {
1033                         compatible = "renesas,can-r8a77990",
1034                                      "renesas,rcar-gen3-can";
1035                         reg = <0 0xe6c38000 0 0x1000>;
1036                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1037                         clocks = <&cpg CPG_MOD 915>,
1038                                <&cpg CPG_CORE R8A77990_CLK_CANFD>,
1039                                <&can_clk>;
1040                         clock-names = "clkp1", "clkp2", "can_clk";
1041                         assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>;
1042                         assigned-clock-rates = <40000000>;
1043                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1044                         resets = <&cpg 915>;
1045                         status = "disabled";
1046                 };
1047
1048                 canfd: can@e66c0000 {
1049                         compatible = "renesas,r8a77990-canfd",
1050                                      "renesas,rcar-gen3-canfd";
1051                         reg = <0 0xe66c0000 0 0x8000>;
1052                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
1053                                    <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1054                         clocks = <&cpg CPG_MOD 914>,
1055                                <&cpg CPG_CORE R8A77990_CLK_CANFD>,
1056                                <&can_clk>;
1057                         clock-names = "fck", "canfd", "can_clk";
1058                         assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>;
1059                         assigned-clock-rates = <40000000>;
1060                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1061                         resets = <&cpg 914>;
1062                         status = "disabled";
1063
1064                         channel0 {
1065                                 status = "disabled";
1066                         };
1067
1068                         channel1 {
1069                                 status = "disabled";
1070                         };
1071                 };
1072
1073                 pwm0: pwm@e6e30000 {
1074                         compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1075                         reg = <0 0xe6e30000 0 0x8>;
1076                         clocks = <&cpg CPG_MOD 523>;
1077                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1078                         resets = <&cpg 523>;
1079                         #pwm-cells = <2>;
1080                         status = "disabled";
1081                 };
1082
1083                 pwm1: pwm@e6e31000 {
1084                         compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1085                         reg = <0 0xe6e31000 0 0x8>;
1086                         clocks = <&cpg CPG_MOD 523>;
1087                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1088                         resets = <&cpg 523>;
1089                         #pwm-cells = <2>;
1090                         status = "disabled";
1091                 };
1092
1093                 pwm2: pwm@e6e32000 {
1094                         compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1095                         reg = <0 0xe6e32000 0 0x8>;
1096                         clocks = <&cpg CPG_MOD 523>;
1097                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1098                         resets = <&cpg 523>;
1099                         #pwm-cells = <2>;
1100                         status = "disabled";
1101                 };
1102
1103                 pwm3: pwm@e6e33000 {
1104                         compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1105                         reg = <0 0xe6e33000 0 0x8>;
1106                         clocks = <&cpg CPG_MOD 523>;
1107                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1108                         resets = <&cpg 523>;
1109                         #pwm-cells = <2>;
1110                         status = "disabled";
1111                 };
1112
1113                 pwm4: pwm@e6e34000 {
1114                         compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1115                         reg = <0 0xe6e34000 0 0x8>;
1116                         clocks = <&cpg CPG_MOD 523>;
1117                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1118                         resets = <&cpg 523>;
1119                         #pwm-cells = <2>;
1120                         status = "disabled";
1121                 };
1122
1123                 pwm5: pwm@e6e35000 {
1124                         compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1125                         reg = <0 0xe6e35000 0 0x8>;
1126                         clocks = <&cpg CPG_MOD 523>;
1127                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1128                         resets = <&cpg 523>;
1129                         #pwm-cells = <2>;
1130                         status = "disabled";
1131                 };
1132
1133                 pwm6: pwm@e6e36000 {
1134                         compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1135                         reg = <0 0xe6e36000 0 0x8>;
1136                         clocks = <&cpg CPG_MOD 523>;
1137                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1138                         resets = <&cpg 523>;
1139                         #pwm-cells = <2>;
1140                         status = "disabled";
1141                 };
1142
1143                 scif0: serial@e6e60000 {
1144                         compatible = "renesas,scif-r8a77990",
1145                                      "renesas,rcar-gen3-scif", "renesas,scif";
1146                         reg = <0 0xe6e60000 0 64>;
1147                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1148                         clocks = <&cpg CPG_MOD 207>,
1149                                  <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1150                                  <&scif_clk>;
1151                         clock-names = "fck", "brg_int", "scif_clk";
1152                         dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1153                                <&dmac2 0x51>, <&dmac2 0x50>;
1154                         dma-names = "tx", "rx", "tx", "rx";
1155                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1156                         resets = <&cpg 207>;
1157                         status = "disabled";
1158                 };
1159
1160                 scif1: serial@e6e68000 {
1161                         compatible = "renesas,scif-r8a77990",
1162                                      "renesas,rcar-gen3-scif", "renesas,scif";
1163                         reg = <0 0xe6e68000 0 64>;
1164                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1165                         clocks = <&cpg CPG_MOD 206>,
1166                                  <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1167                                  <&scif_clk>;
1168                         clock-names = "fck", "brg_int", "scif_clk";
1169                         dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1170                                <&dmac2 0x53>, <&dmac2 0x52>;
1171                         dma-names = "tx", "rx", "tx", "rx";
1172                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1173                         resets = <&cpg 206>;
1174                         status = "disabled";
1175                 };
1176
1177                 scif2: serial@e6e88000 {
1178                         compatible = "renesas,scif-r8a77990",
1179                                      "renesas,rcar-gen3-scif", "renesas,scif";
1180                         reg = <0 0xe6e88000 0 64>;
1181                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1182                         clocks = <&cpg CPG_MOD 310>,
1183                                  <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1184                                  <&scif_clk>;
1185                         clock-names = "fck", "brg_int", "scif_clk";
1186                         dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1187                                <&dmac2 0x13>, <&dmac2 0x12>;
1188                         dma-names = "tx", "rx", "tx", "rx";
1189                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1190                         resets = <&cpg 310>;
1191                         status = "disabled";
1192                 };
1193
1194                 scif3: serial@e6c50000 {
1195                         compatible = "renesas,scif-r8a77990",
1196                                      "renesas,rcar-gen3-scif", "renesas,scif";
1197                         reg = <0 0xe6c50000 0 64>;
1198                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1199                         clocks = <&cpg CPG_MOD 204>,
1200                                  <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1201                                  <&scif_clk>;
1202                         clock-names = "fck", "brg_int", "scif_clk";
1203                         dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1204                         dma-names = "tx", "rx";
1205                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1206                         resets = <&cpg 204>;
1207                         status = "disabled";
1208                 };
1209
1210                 scif4: serial@e6c40000 {
1211                         compatible = "renesas,scif-r8a77990",
1212                                      "renesas,rcar-gen3-scif", "renesas,scif";
1213                         reg = <0 0xe6c40000 0 64>;
1214                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1215                         clocks = <&cpg CPG_MOD 203>,
1216                                  <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1217                                  <&scif_clk>;
1218                         clock-names = "fck", "brg_int", "scif_clk";
1219                         dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1220                         dma-names = "tx", "rx";
1221                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1222                         resets = <&cpg 203>;
1223                         status = "disabled";
1224                 };
1225
1226                 scif5: serial@e6f30000 {
1227                         compatible = "renesas,scif-r8a77990",
1228                                      "renesas,rcar-gen3-scif", "renesas,scif";
1229                         reg = <0 0xe6f30000 0 64>;
1230                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1231                         clocks = <&cpg CPG_MOD 202>,
1232                                  <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1233                                  <&scif_clk>;
1234                         clock-names = "fck", "brg_int", "scif_clk";
1235                         dmas = <&dmac0 0x5b>, <&dmac0 0x5a>;
1236                         dma-names = "tx", "rx";
1237                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1238                         resets = <&cpg 202>;
1239                         status = "disabled";
1240                 };
1241
1242                 msiof0: spi@e6e90000 {
1243                         compatible = "renesas,msiof-r8a77990",
1244                                      "renesas,rcar-gen3-msiof";
1245                         reg = <0 0xe6e90000 0 0x0064>;
1246                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1247                         clocks = <&cpg CPG_MOD 211>;
1248                         dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1249                                <&dmac2 0x41>, <&dmac2 0x40>;
1250                         dma-names = "tx", "rx", "tx", "rx";
1251                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1252                         resets = <&cpg 211>;
1253                         #address-cells = <1>;
1254                         #size-cells = <0>;
1255                         status = "disabled";
1256                 };
1257
1258                 msiof1: spi@e6ea0000 {
1259                         compatible = "renesas,msiof-r8a77990",
1260                                      "renesas,rcar-gen3-msiof";
1261                         reg = <0 0xe6ea0000 0 0x0064>;
1262                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1263                         clocks = <&cpg CPG_MOD 210>;
1264                         dmas = <&dmac0 0x43>, <&dmac0 0x42>;
1265                         dma-names = "tx", "rx";
1266                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1267                         resets = <&cpg 210>;
1268                         #address-cells = <1>;
1269                         #size-cells = <0>;
1270                         status = "disabled";
1271                 };
1272
1273                 msiof2: spi@e6c00000 {
1274                         compatible = "renesas,msiof-r8a77990",
1275                                      "renesas,rcar-gen3-msiof";
1276                         reg = <0 0xe6c00000 0 0x0064>;
1277                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1278                         clocks = <&cpg CPG_MOD 209>;
1279                         dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1280                         dma-names = "tx", "rx";
1281                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1282                         resets = <&cpg 209>;
1283                         #address-cells = <1>;
1284                         #size-cells = <0>;
1285                         status = "disabled";
1286                 };
1287
1288                 msiof3: spi@e6c10000 {
1289                         compatible = "renesas,msiof-r8a77990",
1290                                      "renesas,rcar-gen3-msiof";
1291                         reg = <0 0xe6c10000 0 0x0064>;
1292                         interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1293                         clocks = <&cpg CPG_MOD 208>;
1294                         dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1295                         dma-names = "tx", "rx";
1296                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1297                         resets = <&cpg 208>;
1298                         #address-cells = <1>;
1299                         #size-cells = <0>;
1300                         status = "disabled";
1301                 };
1302
1303                 vin4: video@e6ef4000 {
1304                         compatible = "renesas,vin-r8a77990";
1305                         reg = <0 0xe6ef4000 0 0x1000>;
1306                         interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1307                         clocks = <&cpg CPG_MOD 807>;
1308                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1309                         resets = <&cpg 807>;
1310                         renesas,id = <4>;
1311                         status = "disabled";
1312
1313                         ports {
1314                                 #address-cells = <1>;
1315                                 #size-cells = <0>;
1316
1317                                 port@1 {
1318                                         #address-cells = <1>;
1319                                         #size-cells = <0>;
1320
1321                                         reg = <1>;
1322
1323                                         vin4csi40: endpoint@2 {
1324                                                 reg = <2>;
1325                                                 remote-endpoint= <&csi40vin4>;
1326                                         };
1327                                 };
1328                         };
1329                 };
1330
1331                 vin5: video@e6ef5000 {
1332                         compatible = "renesas,vin-r8a77990";
1333                         reg = <0 0xe6ef5000 0 0x1000>;
1334                         interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1335                         clocks = <&cpg CPG_MOD 806>;
1336                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1337                         resets = <&cpg 806>;
1338                         renesas,id = <5>;
1339                         status = "disabled";
1340
1341                         ports {
1342                                 #address-cells = <1>;
1343                                 #size-cells = <0>;
1344
1345                                 port@1 {
1346                                         #address-cells = <1>;
1347                                         #size-cells = <0>;
1348
1349                                         reg = <1>;
1350
1351                                         vin5csi40: endpoint@2 {
1352                                                 reg = <2>;
1353                                                 remote-endpoint= <&csi40vin5>;
1354                                         };
1355                                 };
1356                         };
1357                 };
1358
1359                 drif00: rif@e6f40000 {
1360                         compatible = "renesas,r8a77990-drif",
1361                                      "renesas,rcar-gen3-drif";
1362                         reg = <0 0xe6f40000 0 0x84>;
1363                         interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
1364                         clocks = <&cpg CPG_MOD 515>;
1365                         clock-names = "fck";
1366                         dmas = <&dmac1 0x20>, <&dmac2 0x20>;
1367                         dma-names = "rx", "rx";
1368                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1369                         resets = <&cpg 515>;
1370                         renesas,bonding = <&drif01>;
1371                         status = "disabled";
1372                 };
1373
1374                 drif01: rif@e6f50000 {
1375                         compatible = "renesas,r8a77990-drif",
1376                                      "renesas,rcar-gen3-drif";
1377                         reg = <0 0xe6f50000 0 0x84>;
1378                         interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
1379                         clocks = <&cpg CPG_MOD 514>;
1380                         clock-names = "fck";
1381                         dmas = <&dmac1 0x22>, <&dmac2 0x22>;
1382                         dma-names = "rx", "rx";
1383                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1384                         resets = <&cpg 514>;
1385                         renesas,bonding = <&drif00>;
1386                         status = "disabled";
1387                 };
1388
1389                 drif10: rif@e6f60000 {
1390                         compatible = "renesas,r8a77990-drif",
1391                                      "renesas,rcar-gen3-drif";
1392                         reg = <0 0xe6f60000 0 0x84>;
1393                         interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
1394                         clocks = <&cpg CPG_MOD 513>;
1395                         clock-names = "fck";
1396                         dmas = <&dmac1 0x24>, <&dmac2 0x24>;
1397                         dma-names = "rx", "rx";
1398                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1399                         resets = <&cpg 513>;
1400                         renesas,bonding = <&drif11>;
1401                         status = "disabled";
1402                 };
1403
1404                 drif11: rif@e6f70000 {
1405                         compatible = "renesas,r8a77990-drif",
1406                                      "renesas,rcar-gen3-drif";
1407                         reg = <0 0xe6f70000 0 0x84>;
1408                         interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
1409                         clocks = <&cpg CPG_MOD 512>;
1410                         clock-names = "fck";
1411                         dmas = <&dmac1 0x26>, <&dmac2 0x26>;
1412                         dma-names = "rx", "rx";
1413                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1414                         resets = <&cpg 512>;
1415                         renesas,bonding = <&drif10>;
1416                         status = "disabled";
1417                 };
1418
1419                 drif20: rif@e6f80000 {
1420                         compatible = "renesas,r8a77990-drif",
1421                                      "renesas,rcar-gen3-drif";
1422                         reg = <0 0xe6f80000 0 0x84>;
1423                         interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
1424                         clocks = <&cpg CPG_MOD 511>;
1425                         clock-names = "fck";
1426                         dmas = <&dmac0 0x28>;
1427                         dma-names = "rx";
1428                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1429                         resets = <&cpg 511>;
1430                         renesas,bonding = <&drif21>;
1431                         status = "disabled";
1432                 };
1433
1434                 drif21: rif@e6f90000 {
1435                         compatible = "renesas,r8a77990-drif",
1436                                      "renesas,rcar-gen3-drif";
1437                         reg = <0 0xe6f90000 0 0x84>;
1438                         interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
1439                         clocks = <&cpg CPG_MOD 510>;
1440                         clock-names = "fck";
1441                         dmas = <&dmac0 0x2a>;
1442                         dma-names = "rx";
1443                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1444                         resets = <&cpg 510>;
1445                         renesas,bonding = <&drif20>;
1446                         status = "disabled";
1447                 };
1448
1449                 drif30: rif@e6fa0000 {
1450                         compatible = "renesas,r8a77990-drif",
1451                                      "renesas,rcar-gen3-drif";
1452                         reg = <0 0xe6fa0000 0 0x84>;
1453                         interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
1454                         clocks = <&cpg CPG_MOD 509>;
1455                         clock-names = "fck";
1456                         dmas = <&dmac0 0x2c>;
1457                         dma-names = "rx";
1458                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1459                         resets = <&cpg 509>;
1460                         renesas,bonding = <&drif31>;
1461                         status = "disabled";
1462                 };
1463
1464                 drif31: rif@e6fb0000 {
1465                         compatible = "renesas,r8a77990-drif",
1466                                      "renesas,rcar-gen3-drif";
1467                         reg = <0 0xe6fb0000 0 0x84>;
1468                         interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
1469                         clocks = <&cpg CPG_MOD 508>;
1470                         clock-names = "fck";
1471                         dmas = <&dmac0 0x2e>;
1472                         dma-names = "rx";
1473                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1474                         resets = <&cpg 508>;
1475                         renesas,bonding = <&drif30>;
1476                         status = "disabled";
1477                 };
1478
1479                 rcar_sound: sound@ec500000 {
1480                         /*
1481                          * #sound-dai-cells is required
1482                          *
1483                          * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1484                          * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1485                          */
1486                         /*
1487                          * #clock-cells is required for audio_clkout0/1/2/3
1488                          *
1489                          * clkout       : #clock-cells = <0>;   <&rcar_sound>;
1490                          * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
1491                          */
1492                         compatible =  "renesas,rcar_sound-r8a77990", "renesas,rcar_sound-gen3";
1493                         reg =   <0 0xec500000 0 0x1000>, /* SCU */
1494                                 <0 0xec5a0000 0 0x100>,  /* ADG */
1495                                 <0 0xec540000 0 0x1000>, /* SSIU */
1496                                 <0 0xec541000 0 0x280>,  /* SSI */
1497                                 <0 0xec760000 0 0x200>;  /* Audio DMAC peri peri*/
1498                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1499
1500                         clocks = <&cpg CPG_MOD 1005>,
1501                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1502                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1503                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1504                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1505                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1506                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1507                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1508                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1509                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1510                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1511                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1512                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1513                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1514                                  <&audio_clk_a>, <&audio_clk_b>,
1515                                  <&audio_clk_c>,
1516                                  <&cpg CPG_CORE R8A77990_CLK_ZA2>;
1517                         clock-names = "ssi-all",
1518                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1519                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1520                                       "ssi.1", "ssi.0",
1521                                       "src.9", "src.8", "src.7", "src.6",
1522                                       "src.5", "src.4", "src.3", "src.2",
1523                                       "src.1", "src.0",
1524                                       "mix.1", "mix.0",
1525                                       "ctu.1", "ctu.0",
1526                                       "dvc.0", "dvc.1",
1527                                       "clk_a", "clk_b", "clk_c", "clk_i";
1528                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1529                         resets = <&cpg 1005>,
1530                                  <&cpg 1006>, <&cpg 1007>,
1531                                  <&cpg 1008>, <&cpg 1009>,
1532                                  <&cpg 1010>, <&cpg 1011>,
1533                                  <&cpg 1012>, <&cpg 1013>,
1534                                  <&cpg 1014>, <&cpg 1015>;
1535                         reset-names = "ssi-all",
1536                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1537                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1538                                       "ssi.1", "ssi.0";
1539                         status = "disabled";
1540
1541                         rcar_sound,ctu {
1542                                 ctu00: ctu-0 { };
1543                                 ctu01: ctu-1 { };
1544                                 ctu02: ctu-2 { };
1545                                 ctu03: ctu-3 { };
1546                                 ctu10: ctu-4 { };
1547                                 ctu11: ctu-5 { };
1548                                 ctu12: ctu-6 { };
1549                                 ctu13: ctu-7 { };
1550                         };
1551
1552                         rcar_sound,dvc {
1553                                 dvc0: dvc-0 {
1554                                         dmas = <&audma0 0xbc>;
1555                                         dma-names = "tx";
1556                                 };
1557                                 dvc1: dvc-1 {
1558                                         dmas = <&audma0 0xbe>;
1559                                         dma-names = "tx";
1560                                 };
1561                         };
1562
1563                         rcar_sound,mix {
1564                                 mix0: mix-0 { };
1565                                 mix1: mix-1 { };
1566                         };
1567
1568                         rcar_sound,src {
1569                                 src0: src-0 {
1570                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1571                                         dmas = <&audma0 0x85>, <&audma0 0x9a>;
1572                                         dma-names = "rx", "tx";
1573                                 };
1574                                 src1: src-1 {
1575                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1576                                         dmas = <&audma0 0x87>, <&audma0 0x9c>;
1577                                         dma-names = "rx", "tx";
1578                                 };
1579                                 src2: src-2 {
1580                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1581                                         dmas = <&audma0 0x89>, <&audma0 0x9e>;
1582                                         dma-names = "rx", "tx";
1583                                 };
1584                                 src3: src-3 {
1585                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1586                                         dmas = <&audma0 0x8b>, <&audma0 0xa0>;
1587                                         dma-names = "rx", "tx";
1588                                 };
1589                                 src4: src-4 {
1590                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1591                                         dmas = <&audma0 0x8d>, <&audma0 0xb0>;
1592                                         dma-names = "rx", "tx";
1593                                 };
1594                                 src5: src-5 {
1595                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1596                                         dmas = <&audma0 0x8f>, <&audma0 0xb2>;
1597                                         dma-names = "rx", "tx";
1598                                 };
1599                                 src6: src-6 {
1600                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1601                                         dmas = <&audma0 0x91>, <&audma0 0xb4>;
1602                                         dma-names = "rx", "tx";
1603                                 };
1604                                 src7: src-7 {
1605                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1606                                         dmas = <&audma0 0x93>, <&audma0 0xb6>;
1607                                         dma-names = "rx", "tx";
1608                                 };
1609                                 src8: src-8 {
1610                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1611                                         dmas = <&audma0 0x95>, <&audma0 0xb8>;
1612                                         dma-names = "rx", "tx";
1613                                 };
1614                                 src9: src-9 {
1615                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1616                                         dmas = <&audma0 0x97>, <&audma0 0xba>;
1617                                         dma-names = "rx", "tx";
1618                                 };
1619                         };
1620
1621                         rcar_sound,ssi {
1622                                 ssi0: ssi-0 {
1623                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1624                                         dmas = <&audma0 0x01>, <&audma0 0x02>,
1625                                                <&audma0 0x15>, <&audma0 0x16>;
1626                                         dma-names = "rx", "tx", "rxu", "txu";
1627                                 };
1628                                 ssi1: ssi-1 {
1629                                         interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1630                                         dmas = <&audma0 0x03>, <&audma0 0x04>,
1631                                                <&audma0 0x49>, <&audma0 0x4a>;
1632                                         dma-names = "rx", "tx", "rxu", "txu";
1633                                 };
1634                                 ssi2: ssi-2 {
1635                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1636                                         dmas = <&audma0 0x05>, <&audma0 0x06>,
1637                                                <&audma0 0x63>, <&audma0 0x64>;
1638                                         dma-names = "rx", "tx", "rxu", "txu";
1639                                 };
1640                                 ssi3: ssi-3 {
1641                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1642                                         dmas = <&audma0 0x07>, <&audma0 0x08>,
1643                                                <&audma0 0x6f>, <&audma0 0x70>;
1644                                         dma-names = "rx", "tx", "rxu", "txu";
1645                                 };
1646                                 ssi4: ssi-4 {
1647                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1648                                         dmas = <&audma0 0x09>, <&audma0 0x0a>,
1649                                                <&audma0 0x71>, <&audma0 0x72>;
1650                                         dma-names = "rx", "tx", "rxu", "txu";
1651                                 };
1652                                 ssi5: ssi-5 {
1653                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1654                                         dmas = <&audma0 0x0b>, <&audma0 0x0c>,
1655                                                <&audma0 0x73>, <&audma0 0x74>;
1656                                         dma-names = "rx", "tx", "rxu", "txu";
1657                                 };
1658                                 ssi6: ssi-6 {
1659                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1660                                         dmas = <&audma0 0x0d>, <&audma0 0x0e>,
1661                                                <&audma0 0x75>, <&audma0 0x76>;
1662                                         dma-names = "rx", "tx", "rxu", "txu";
1663                                 };
1664                                 ssi7: ssi-7 {
1665                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1666                                         dmas = <&audma0 0x0f>, <&audma0 0x10>,
1667                                                <&audma0 0x79>, <&audma0 0x7a>;
1668                                         dma-names = "rx", "tx", "rxu", "txu";
1669                                 };
1670                                 ssi8: ssi-8 {
1671                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1672                                         dmas = <&audma0 0x11>, <&audma0 0x12>,
1673                                                <&audma0 0x7b>, <&audma0 0x7c>;
1674                                         dma-names = "rx", "tx", "rxu", "txu";
1675                                 };
1676                                 ssi9: ssi-9 {
1677                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1678                                         dmas = <&audma0 0x13>, <&audma0 0x14>,
1679                                                <&audma0 0x7d>, <&audma0 0x7e>;
1680                                         dma-names = "rx", "tx", "rxu", "txu";
1681                                 };
1682                         };
1683                 };
1684
1685                 audma0: dma-controller@ec700000 {
1686                         compatible = "renesas,dmac-r8a77990",
1687                                      "renesas,rcar-dmac";
1688                         reg = <0 0xec700000 0 0x10000>;
1689                         interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
1690                                      <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
1691                                      <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
1692                                      <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
1693                                      <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
1694                                      <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
1695                                      <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
1696                                      <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
1697                                      <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
1698                                      <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
1699                                      <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
1700                                      <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
1701                                      <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
1702                                      <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
1703                                      <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
1704                                      <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
1705                                      <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
1706                         interrupt-names = "error",
1707                                         "ch0", "ch1", "ch2", "ch3",
1708                                         "ch4", "ch5", "ch6", "ch7",
1709                                         "ch8", "ch9", "ch10", "ch11",
1710                                         "ch12", "ch13", "ch14", "ch15";
1711                         clocks = <&cpg CPG_MOD 502>;
1712                         clock-names = "fck";
1713                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1714                         resets = <&cpg 502>;
1715                         #dma-cells = <1>;
1716                         dma-channels = <16>;
1717                         iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
1718                                  <&ipmmu_mp 2>, <&ipmmu_mp 3>,
1719                                  <&ipmmu_mp 4>, <&ipmmu_mp 5>,
1720                                  <&ipmmu_mp 6>, <&ipmmu_mp 7>,
1721                                  <&ipmmu_mp 8>, <&ipmmu_mp 9>,
1722                                  <&ipmmu_mp 10>, <&ipmmu_mp 11>,
1723                                  <&ipmmu_mp 12>, <&ipmmu_mp 13>,
1724                                  <&ipmmu_mp 14>, <&ipmmu_mp 15>;
1725                 };
1726
1727                 xhci0: usb@ee000000 {
1728                         compatible = "renesas,xhci-r8a77990",
1729                                      "renesas,rcar-gen3-xhci";
1730                         reg = <0 0xee000000 0 0xc00>;
1731                         interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
1732                         clocks = <&cpg CPG_MOD 328>;
1733                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1734                         resets = <&cpg 328>;
1735                         status = "disabled";
1736                 };
1737
1738                 usb3_peri0: usb@ee020000 {
1739                         compatible = "renesas,r8a77990-usb3-peri",
1740                                      "renesas,rcar-gen3-usb3-peri";
1741                         reg = <0 0xee020000 0 0x400>;
1742                         interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
1743                         clocks = <&cpg CPG_MOD 328>;
1744                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1745                         resets = <&cpg 328>;
1746                         status = "disabled";
1747                 };
1748
1749                 ohci0: usb@ee080000 {
1750                         compatible = "generic-ohci";
1751                         reg = <0 0xee080000 0 0x100>;
1752                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1753                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1754                         phys = <&usb2_phy0 1>;
1755                         phy-names = "usb";
1756                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1757                         resets = <&cpg 703>, <&cpg 704>;
1758                         status = "disabled";
1759                 };
1760
1761                 ehci0: usb@ee080100 {
1762                         compatible = "generic-ehci";
1763                         reg = <0 0xee080100 0 0x100>;
1764                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1765                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1766                         phys = <&usb2_phy0 2>;
1767                         phy-names = "usb";
1768                         companion = <&ohci0>;
1769                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1770                         resets = <&cpg 703>, <&cpg 704>;
1771                         status = "disabled";
1772                 };
1773
1774                 usb2_phy0: usb-phy@ee080200 {
1775                         compatible = "renesas,usb2-phy-r8a77990",
1776                                      "renesas,rcar-gen3-usb2-phy";
1777                         reg = <0 0xee080200 0 0x700>;
1778                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1779                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1780                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1781                         resets = <&cpg 703>, <&cpg 704>;
1782                         #phy-cells = <1>;
1783                         status = "disabled";
1784                 };
1785
1786                 sdhi0: mmc@ee100000 {
1787                         compatible = "renesas,sdhi-r8a77990",
1788                                      "renesas,rcar-gen3-sdhi";
1789                         reg = <0 0xee100000 0 0x2000>;
1790                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1791                         clocks = <&cpg CPG_MOD 314>;
1792                         max-frequency = <200000000>;
1793                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1794                         resets = <&cpg 314>;
1795                         iommus = <&ipmmu_ds1 32>;
1796                         status = "disabled";
1797                 };
1798
1799                 sdhi1: mmc@ee120000 {
1800                         compatible = "renesas,sdhi-r8a77990",
1801                                      "renesas,rcar-gen3-sdhi";
1802                         reg = <0 0xee120000 0 0x2000>;
1803                         interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1804                         clocks = <&cpg CPG_MOD 313>;
1805                         max-frequency = <200000000>;
1806                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1807                         resets = <&cpg 313>;
1808                         iommus = <&ipmmu_ds1 33>;
1809                         status = "disabled";
1810                 };
1811
1812                 sdhi3: mmc@ee160000 {
1813                         compatible = "renesas,sdhi-r8a77990",
1814                                      "renesas,rcar-gen3-sdhi";
1815                         reg = <0 0xee160000 0 0x2000>;
1816                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1817                         clocks = <&cpg CPG_MOD 311>;
1818                         max-frequency = <200000000>;
1819                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1820                         resets = <&cpg 311>;
1821                         iommus = <&ipmmu_ds1 35>;
1822                         status = "disabled";
1823                 };
1824
1825                 gic: interrupt-controller@f1010000 {
1826                         compatible = "arm,gic-400";
1827                         #interrupt-cells = <3>;
1828                         #address-cells = <0>;
1829                         interrupt-controller;
1830                         reg = <0x0 0xf1010000 0 0x1000>,
1831                               <0x0 0xf1020000 0 0x20000>,
1832                               <0x0 0xf1040000 0 0x20000>,
1833                               <0x0 0xf1060000 0 0x20000>;
1834                         interrupts = <GIC_PPI 9
1835                                         (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
1836                         clocks = <&cpg CPG_MOD 408>;
1837                         clock-names = "clk";
1838                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1839                         resets = <&cpg 408>;
1840                 };
1841
1842                 pciec0: pcie@fe000000 {
1843                         compatible = "renesas,pcie-r8a77990",
1844                                      "renesas,pcie-rcar-gen3";
1845                         reg = <0 0xfe000000 0 0x80000>;
1846                         #address-cells = <3>;
1847                         #size-cells = <2>;
1848                         bus-range = <0x00 0xff>;
1849                         device_type = "pci";
1850                         ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
1851                                  <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
1852                                  <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
1853                                  <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1854                         /* Map all possible DDR as inbound ranges */
1855                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
1856                         interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1857                                      <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1858                                      <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1859                         #interrupt-cells = <1>;
1860                         interrupt-map-mask = <0 0 0 0>;
1861                         interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1862                         clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1863                         clock-names = "pcie", "pcie_bus";
1864                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1865                         resets = <&cpg 319>;
1866                         status = "disabled";
1867                 };
1868
1869                 vspb0: vsp@fe960000 {
1870                         compatible = "renesas,vsp2";
1871                         reg = <0 0xfe960000 0 0x8000>;
1872                         interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1873                         clocks = <&cpg CPG_MOD 626>;
1874                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1875                         resets = <&cpg 626>;
1876                         renesas,fcp = <&fcpvb0>;
1877                 };
1878
1879                 fcpvb0: fcp@fe96f000 {
1880                         compatible = "renesas,fcpv";
1881                         reg = <0 0xfe96f000 0 0x200>;
1882                         clocks = <&cpg CPG_MOD 607>;
1883                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1884                         resets = <&cpg 607>;
1885                         iommus = <&ipmmu_vp0 5>;
1886                 };
1887
1888                 vspi0: vsp@fe9a0000 {
1889                         compatible = "renesas,vsp2";
1890                         reg = <0 0xfe9a0000 0 0x8000>;
1891                         interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
1892                         clocks = <&cpg CPG_MOD 631>;
1893                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1894                         resets = <&cpg 631>;
1895                         renesas,fcp = <&fcpvi0>;
1896                 };
1897
1898                 fcpvi0: fcp@fe9af000 {
1899                         compatible = "renesas,fcpv";
1900                         reg = <0 0xfe9af000 0 0x200>;
1901                         clocks = <&cpg CPG_MOD 611>;
1902                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1903                         resets = <&cpg 611>;
1904                         iommus = <&ipmmu_vp0 8>;
1905                 };
1906
1907                 vspd0: vsp@fea20000 {
1908                         compatible = "renesas,vsp2";
1909                         reg = <0 0xfea20000 0 0x7000>;
1910                         interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
1911                         clocks = <&cpg CPG_MOD 623>;
1912                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1913                         resets = <&cpg 623>;
1914                         renesas,fcp = <&fcpvd0>;
1915                 };
1916
1917                 fcpvd0: fcp@fea27000 {
1918                         compatible = "renesas,fcpv";
1919                         reg = <0 0xfea27000 0 0x200>;
1920                         clocks = <&cpg CPG_MOD 603>;
1921                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1922                         resets = <&cpg 603>;
1923                         iommus = <&ipmmu_vi0 8>;
1924                 };
1925
1926                 vspd1: vsp@fea28000 {
1927                         compatible = "renesas,vsp2";
1928                         reg = <0 0xfea28000 0 0x7000>;
1929                         interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
1930                         clocks = <&cpg CPG_MOD 622>;
1931                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1932                         resets = <&cpg 622>;
1933                         renesas,fcp = <&fcpvd1>;
1934                 };
1935
1936                 fcpvd1: fcp@fea2f000 {
1937                         compatible = "renesas,fcpv";
1938                         reg = <0 0xfea2f000 0 0x200>;
1939                         clocks = <&cpg CPG_MOD 602>;
1940                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1941                         resets = <&cpg 602>;
1942                         iommus = <&ipmmu_vi0 9>;
1943                 };
1944
1945                 cmm0: cmm@fea40000 {
1946                         compatible = "renesas,r8a77990-cmm",
1947                                      "renesas,rcar-gen3-cmm";
1948                         reg = <0 0xfea40000 0 0x1000>;
1949                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1950                         clocks = <&cpg CPG_MOD 711>;
1951                         resets = <&cpg 711>;
1952                 };
1953
1954                 cmm1: cmm@fea50000 {
1955                         compatible = "renesas,r8a77990-cmm",
1956                                      "renesas,rcar-gen3-cmm";
1957                         reg = <0 0xfea50000 0 0x1000>;
1958                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1959                         clocks = <&cpg CPG_MOD 710>;
1960                         resets = <&cpg 710>;
1961                 };
1962
1963                 csi40: csi2@feaa0000 {
1964                         compatible = "renesas,r8a77990-csi2";
1965                         reg = <0 0xfeaa0000 0 0x10000>;
1966                         interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1967                         clocks = <&cpg CPG_MOD 716>;
1968                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1969                         resets = <&cpg 716>;
1970                         status = "disabled";
1971
1972                         ports {
1973                                 #address-cells = <1>;
1974                                 #size-cells = <0>;
1975
1976                                 port@0 {
1977                                         reg = <0>;
1978                                 };
1979
1980                                 port@1 {
1981                                         #address-cells = <1>;
1982                                         #size-cells = <0>;
1983
1984                                         reg = <1>;
1985
1986                                         csi40vin4: endpoint@0 {
1987                                                 reg = <0>;
1988                                                 remote-endpoint = <&vin4csi40>;
1989                                         };
1990                                         csi40vin5: endpoint@1 {
1991                                                 reg = <1>;
1992                                                 remote-endpoint = <&vin5csi40>;
1993                                         };
1994                                 };
1995                         };
1996                 };
1997
1998                 du: display@feb00000 {
1999                         compatible = "renesas,du-r8a77990";
2000                         reg = <0 0xfeb00000 0 0x40000>;
2001                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
2002                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
2003                         clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
2004                         clock-names = "du.0", "du.1";
2005                         resets = <&cpg 724>;
2006                         reset-names = "du.0";
2007
2008                         renesas,cmms = <&cmm0>, <&cmm1>;
2009                         renesas,vsps = <&vspd0 0>, <&vspd1 0>;
2010
2011                         status = "disabled";
2012
2013                         ports {
2014                                 #address-cells = <1>;
2015                                 #size-cells = <0>;
2016
2017                                 port@0 {
2018                                         reg = <0>;
2019                                         du_out_rgb: endpoint {
2020                                         };
2021                                 };
2022
2023                                 port@1 {
2024                                         reg = <1>;
2025                                         du_out_lvds0: endpoint {
2026                                                 remote-endpoint = <&lvds0_in>;
2027                                         };
2028                                 };
2029
2030                                 port@2 {
2031                                         reg = <2>;
2032                                         du_out_lvds1: endpoint {
2033                                                 remote-endpoint = <&lvds1_in>;
2034                                         };
2035                                 };
2036                         };
2037                 };
2038
2039                 lvds0: lvds-encoder@feb90000 {
2040                         compatible = "renesas,r8a77990-lvds";
2041                         reg = <0 0xfeb90000 0 0x20>;
2042                         clocks = <&cpg CPG_MOD 727>;
2043                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
2044                         resets = <&cpg 727>;
2045                         status = "disabled";
2046
2047                         renesas,companion = <&lvds1>;
2048
2049                         ports {
2050                                 #address-cells = <1>;
2051                                 #size-cells = <0>;
2052
2053                                 port@0 {
2054                                         reg = <0>;
2055                                         lvds0_in: endpoint {
2056                                                 remote-endpoint = <&du_out_lvds0>;
2057                                         };
2058                                 };
2059
2060                                 port@1 {
2061                                         reg = <1>;
2062                                         lvds0_out: endpoint {
2063                                         };
2064                                 };
2065                         };
2066                 };
2067
2068                 lvds1: lvds-encoder@feb90100 {
2069                         compatible = "renesas,r8a77990-lvds";
2070                         reg = <0 0xfeb90100 0 0x20>;
2071                         clocks = <&cpg CPG_MOD 727>;
2072                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
2073                         resets = <&cpg 726>;
2074                         status = "disabled";
2075
2076                         ports {
2077                                 #address-cells = <1>;
2078                                 #size-cells = <0>;
2079
2080                                 port@0 {
2081                                         reg = <0>;
2082                                         lvds1_in: endpoint {
2083                                                 remote-endpoint = <&du_out_lvds1>;
2084                                         };
2085                                 };
2086
2087                                 port@1 {
2088                                         reg = <1>;
2089                                         lvds1_out: endpoint {
2090                                         };
2091                                 };
2092                         };
2093                 };
2094
2095                 prr: chipid@fff00044 {
2096                         compatible = "renesas,prr";
2097                         reg = <0 0xfff00044 0 4>;
2098                 };
2099         };
2100
2101         thermal-zones {
2102                 cpu-thermal {
2103                         polling-delay-passive = <250>;
2104                         polling-delay = <0>;
2105                         thermal-sensors = <&thermal 0>;
2106                         sustainable-power = <717>;
2107
2108                         cooling-maps {
2109                                 map0 {
2110                                         trip = <&target>;
2111                                         cooling-device = <&a53_0 0 2>;
2112                                         contribution = <1024>;
2113                                 };
2114                         };
2115
2116                         trips {
2117                                 sensor1_crit: sensor1-crit {
2118                                         temperature = <120000>;
2119                                         hysteresis = <2000>;
2120                                         type = "critical";
2121                                 };
2122
2123                                 target: trip-point1 {
2124                                         temperature = <100000>;
2125                                         hysteresis = <2000>;
2126                                         type = "passive";
2127                                 };
2128                         };
2129                 };
2130         };
2131
2132         timer {
2133                 compatible = "arm,armv8-timer";
2134                 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2135                                       <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2136                                       <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2137                                       <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
2138         };
2139 };