1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the Ebisu board with R-Car E3
5 * Copyright (C) 2018 Renesas Electronics Corp.
9 #include "r8a77990.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
14 model = "Renesas Ebisu board based on r8a77990";
15 compatible = "renesas,ebisu", "renesas,r8a77990";
26 bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
27 stdout-path = "serial0:115200n8";
30 audio_clkout: audio-clkout {
32 * This is same as <&rcar_sound 0>
33 * but needed to avoid cs2000/rcar_sound probe dead-lock
35 compatible = "fixed-clock";
37 clock-frequency = <11289600>;
40 backlight: backlight {
41 compatible = "pwm-backlight";
42 pwms = <&pwm3 0 50000>;
44 brightness-levels = <512 511 505 494 473 440 392 327 241 133 0>;
45 default-brightness-level = <10>;
47 power-supply = <®_12p0v>;
51 compatible = "composite-video-connector";
56 remote-endpoint = <&adv7482_ain7>;
62 compatible = "hdmi-connector";
67 hdmi_in_con: endpoint {
68 remote-endpoint = <&adv7482_hdmi>;
74 compatible = "hdmi-connector";
78 hdmi_con_out: endpoint {
79 remote-endpoint = <&adv7511_out>;
85 compatible = "gpio-keys";
87 pinctrl-0 = <&keys_pins>;
88 pinctrl-names = "default";
91 gpios = <&gpio5 10 GPIO_ACTIVE_LOW>;
95 debounce-interval = <20>;
98 gpios = <&gpio5 11 GPIO_ACTIVE_LOW>;
102 debounce-interval = <20>;
105 gpios = <&gpio5 12 GPIO_ACTIVE_LOW>;
106 linux,code = <KEY_3>;
109 debounce-interval = <20>;
112 gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
113 linux,code = <KEY_4>;
116 debounce-interval = <20>;
121 compatible = "thine,thc63lvd1024";
122 vcc-supply = <®_3p3v>;
125 #address-cells = <1>;
130 thc63lvd1024_in: endpoint {
131 remote-endpoint = <&lvds0_out>;
137 thc63lvd1024_out: endpoint {
138 remote-endpoint = <&adv7511_in>;
145 device_type = "memory";
146 /* first 128MB is reserved for secure area. */
147 reg = <0x0 0x48000000 0x0 0x38000000>;
150 reg_1p8v: regulator0 {
151 compatible = "regulator-fixed";
152 regulator-name = "fixed-1.8V";
153 regulator-min-microvolt = <1800000>;
154 regulator-max-microvolt = <1800000>;
159 reg_3p3v: regulator1 {
160 compatible = "regulator-fixed";
161 regulator-name = "fixed-3.3V";
162 regulator-min-microvolt = <3300000>;
163 regulator-max-microvolt = <3300000>;
168 reg_12p0v: regulator2 {
169 compatible = "regulator-fixed";
170 regulator-name = "D12.0V";
171 regulator-min-microvolt = <12000000>;
172 regulator-max-microvolt = <12000000>;
178 compatible = "simple-audio-card";
180 simple-audio-card,name = "rsnd-ak4613";
181 simple-audio-card,format = "left_j";
182 simple-audio-card,bitclock-master = <&sndcpu>;
183 simple-audio-card,frame-master = <&sndcpu>;
185 sndcodec: simple-audio-card,codec {
186 sound-dai = <&ak4613>;
189 sndcpu: simple-audio-card,cpu {
190 sound-dai = <&rcar_sound>;
194 vbus0_usb2: regulator-vbus0-usb2 {
195 compatible = "regulator-fixed";
197 regulator-name = "USB20_VBUS_CN";
198 regulator-min-microvolt = <5000000>;
199 regulator-max-microvolt = <5000000>;
201 gpio = <&gpio6 4 GPIO_ACTIVE_HIGH>;
205 vcc_sdhi0: regulator-vcc-sdhi0 {
206 compatible = "regulator-fixed";
208 regulator-name = "SDHI0 Vcc";
209 regulator-min-microvolt = <3300000>;
210 regulator-max-microvolt = <3300000>;
212 gpio = <&gpio5 17 GPIO_ACTIVE_HIGH>;
216 vccq_sdhi0: regulator-vccq-sdhi0 {
217 compatible = "regulator-gpio";
219 regulator-name = "SDHI0 VccQ";
220 regulator-min-microvolt = <1800000>;
221 regulator-max-microvolt = <3300000>;
223 gpios = <&gpio5 18 GPIO_ACTIVE_HIGH>;
225 states = <3300000 1>, <1800000 0>;
228 vcc_sdhi1: regulator-vcc-sdhi1 {
229 compatible = "regulator-fixed";
231 regulator-name = "SDHI1 Vcc";
232 regulator-min-microvolt = <3300000>;
233 regulator-max-microvolt = <3300000>;
235 gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>;
239 vccq_sdhi1: regulator-vccq-sdhi1 {
240 compatible = "regulator-gpio";
242 regulator-name = "SDHI1 VccQ";
243 regulator-min-microvolt = <1800000>;
244 regulator-max-microvolt = <3300000>;
246 gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>;
248 states = <3300000 1>, <1800000 0>;
252 compatible = "vga-connector";
256 remote-endpoint = <&adv7123_out>;
262 compatible = "adi,adv7123";
265 #address-cells = <1>;
270 adv7123_in: endpoint {
271 remote-endpoint = <&du_out_rgb>;
276 adv7123_out: endpoint {
277 remote-endpoint = <&vga_in>;
284 compatible = "fixed-clock";
286 clock-frequency = <24576000>;
290 compatible = "fixed-clock";
292 clock-frequency = <74250000>;
297 clock-frequency = <22579200>;
301 pinctrl-0 = <&avb_pins>;
302 pinctrl-names = "default";
303 phy-handle = <&phy0>;
306 phy0: ethernet-phy@0 {
307 rxc-skew-ps = <1500>;
309 interrupt-parent = <&gpio2>;
310 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
311 reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
313 * TX clock internal delay mode is required for reliable
314 * 1Gbps communication using the KSZ9031RNX phy present on
315 * the Ebisu board, however, TX clock internal delay mode
316 * isn't supported on r8a77990. Thus, limit speed to
317 * 100Mbps for reliable communication.
324 pinctrl-0 = <&canfd0_pins>;
325 pinctrl-names = "default";
341 remote-endpoint = <&adv7482_txa>;
348 pinctrl-0 = <&du_pins>;
349 pinctrl-names = "default";
352 clocks = <&cpg CPG_MOD 724>,
355 clock-names = "du.0", "du.1", "dclkin.0";
360 remote-endpoint = <&adv7123_in>;
372 clock-frequency = <48000000>;
383 io_expander: gpio@20 {
384 compatible = "onnn,pca9654";
388 interrupt-parent = <&gpio2>;
389 interrupts = <22 IRQ_TYPE_LEVEL_LOW>;
393 compatible = "adi,adv7511w";
395 interrupt-parent = <&gpio1>;
396 interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
398 adi,input-depth = <8>;
399 adi,input-colorspace = "rgb";
400 adi,input-clock = "1x";
403 #address-cells = <1>;
408 adv7511_in: endpoint {
409 remote-endpoint = <&thc63lvd1024_out>;
415 adv7511_out: endpoint {
416 remote-endpoint = <&hdmi_con_out>;
423 compatible = "adi,adv7482";
426 #address-cells = <1>;
429 interrupt-parent = <&gpio0>;
430 interrupt-names = "intrq1", "intrq2";
431 interrupts = <7 IRQ_TYPE_LEVEL_LOW>,
432 <17 IRQ_TYPE_LEVEL_LOW>;
437 adv7482_ain7: endpoint {
438 remote-endpoint = <&cvbs_con>;
445 adv7482_hdmi: endpoint {
446 remote-endpoint = <&hdmi_in_con>;
453 adv7482_txa: endpoint {
456 remote-endpoint = <&csi40_in>;
466 compatible = "asahi-kasei,ak4613";
467 #sound-dai-cells = <0>;
469 clocks = <&rcar_sound 3>;
471 asahi-kasei,in1-single-end;
472 asahi-kasei,in2-single-end;
473 asahi-kasei,out1-single-end;
474 asahi-kasei,out2-single-end;
475 asahi-kasei,out3-single-end;
476 asahi-kasei,out4-single-end;
477 asahi-kasei,out5-single-end;
478 asahi-kasei,out6-single-end;
481 cs2000: clk-multiplier@4f {
483 compatible = "cirrus,cs2000-cp";
485 clocks = <&audio_clkout>, <&x12_clk>;
486 clock-names = "clk_in", "ref_clk";
488 assigned-clocks = <&cs2000>;
489 assigned-clock-rates = <24576000>; /* 1/1 divide */
496 clock-frequency = <400000>;
499 pinctrl-0 = <&irq0_pins>;
500 pinctrl-names = "default";
502 compatible = "rohm,bd9571mwv";
504 interrupt-parent = <&intc_ex>;
505 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
506 interrupt-controller;
507 #interrupt-cells = <2>;
510 rohm,ddr-backup-power = <0x1>;
515 compatible = "rohm,br24t01", "atmel,24c01";
524 clocks = <&cpg CPG_MOD 727>,
527 clock-names = "fck", "dclkin.0", "extal";
531 lvds0_out: endpoint {
532 remote-endpoint = <&thc63lvd1024_in>;
540 * Even though the LVDS1 output is not connected, the encoder must be
541 * enabled to supply a pixel clock to the DU for the DPAD output when
546 clocks = <&cpg CPG_MOD 727>,
549 clock-names = "fck", "dclkin.0", "extal";
558 clock-frequency = <100000000>;
567 groups = "avb_link", "avb_mii";
571 canfd0_pins: canfd0 {
572 groups = "canfd0_data";
577 groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
582 groups = "intc_ex_irq0";
583 function = "intc_ex";
587 pins = "GP_5_10", "GP_5_11", "GP_5_12", "GP_5_13";
602 groups = "scif2_data_a";
607 groups = "sdhi0_data4", "sdhi0_ctrl";
609 power-source = <3300>;
612 sdhi0_pins_uhs: sd0_uhs {
613 groups = "sdhi0_data4", "sdhi0_ctrl";
615 power-source = <1800>;
619 groups = "sdhi1_data4", "sdhi1_ctrl";
621 power-source = <3300>;
624 sdhi1_pins_uhs: sd1_uhs {
625 groups = "sdhi1_data4", "sdhi1_ctrl";
627 power-source = <1800>;
631 groups = "sdhi3_data8", "sdhi3_ctrl", "sdhi3_ds";
633 power-source = <1800>;
636 sound_clk_pins: sound_clk {
637 groups = "audio_clk_a", "audio_clk_b_a", "audio_clk_c_a",
638 "audio_clkout_a", "audio_clkout1_a";
639 function = "audio_clk";
643 groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data";
648 groups = "usb0_b", "usb0_id";
659 pinctrl-0 = <&pwm3_pins>;
660 pinctrl-names = "default";
666 pinctrl-0 = <&pwm5_pins>;
667 pinctrl-names = "default";
673 pinctrl-0 = <&sound_pins>, <&sound_clk_pins>;
674 pinctrl-names = "default";
677 #sound-dai-cells = <0>;
679 /* audio_clkout0/1/2/3 */
681 clock-frequency = <12288000 11289600>;
685 /* update <audio_clk_b> to <cs2000> */
686 clocks = <&cpg CPG_MOD 1005>,
687 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
688 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
689 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
690 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
691 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
692 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
693 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
694 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
695 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
696 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
697 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
698 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
699 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
700 <&audio_clk_a>, <&cs2000>, <&audio_clk_c>,
701 <&cpg CPG_CORE R8A77990_CLK_ZA2>;
705 playback = <&ssi0>, <&src0>, <&dvc0>;
706 capture = <&ssi1>, <&src1>, <&dvc1>;
718 pinctrl-0 = <&scif2_pins>;
719 pinctrl-names = "default";
725 pinctrl-0 = <&sdhi0_pins>;
726 pinctrl-1 = <&sdhi0_pins_uhs>;
727 pinctrl-names = "default", "state_uhs";
729 vmmc-supply = <&vcc_sdhi0>;
730 vqmmc-supply = <&vccq_sdhi0>;
731 cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
732 wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
740 pinctrl-0 = <&sdhi1_pins>;
741 pinctrl-1 = <&sdhi1_pins_uhs>;
742 pinctrl-names = "default", "state_uhs";
744 vmmc-supply = <&vcc_sdhi1>;
745 vqmmc-supply = <&vccq_sdhi1>;
746 cd-gpios = <&gpio3 14 GPIO_ACTIVE_LOW>;
754 /* used for on-board 8bit eMMC */
755 pinctrl-0 = <&sdhi3_pins>;
756 pinctrl-1 = <&sdhi3_pins>;
757 pinctrl-names = "default", "state_uhs";
759 vmmc-supply = <®_3p3v>;
760 vqmmc-supply = <®_1p8v>;
767 full-pwr-cycle-in-suspend;
776 pinctrl-0 = <&usb0_pins>;
777 pinctrl-names = "default";
779 vbus-supply = <&vbus0_usb2>;
784 companion = <&xhci0>;
797 pinctrl-0 = <&usb30_pins>;
798 pinctrl-names = "default";