arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the Ebisu board with R-Car E3
   4  *
   5  * Copyright (C) 2018 Renesas Electronics Corp.
   6  */
   7
   8 /dts-v1/;
   9 #include "r8a77990.dtsi"
  10 #include <dt-bindings/gpio/gpio.h>
  11 #include <dt-bindings/input/input.h>
  12
  13 / {
  14         model = "Renesas Ebisu board based on r8a77990";
  15         compatible = "renesas,ebisu", "renesas,r8a77990";
  16
  17         aliases {
  18                 serial0 = &scif2;
  19                 ethernet0 = &avb;
  20                 mmc0 = &sdhi3;
  21                 mmc1 = &sdhi0;
  22                 mmc2 = &sdhi1;
  23         };
  24
  25         chosen {
  26                 bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
  27                 stdout-path = "serial0:115200n8";
  28         };
  29
  30         audio_clkout: audio-clkout {
  31                 /*
  32                  * This is same as <&rcar_sound 0>
  33                  * but needed to avoid cs2000/rcar_sound probe dead-lock
  34                  */
  35                 compatible = "fixed-clock";
  36                 #clock-cells = <0>;
  37                 clock-frequency = <11289600>;
  38         };
  39
  40         backlight: backlight {
  41                 compatible = "pwm-backlight";
  42                 pwms = <&pwm3 0 50000>;
  43
  44                 brightness-levels = <512 511 505 494 473 440 392 327 241 133 0>;
  45                 default-brightness-level = <10>;
  46
  47                 power-supply = <&reg_12p0v>;
  48         };
  49
  50         cvbs-in {
  51                 compatible = "composite-video-connector";
  52                 label = "CVBS IN";
  53
  54                 port {
  55                         cvbs_con: endpoint {
  56                                 remote-endpoint = <&adv7482_ain7>;
  57                         };
  58                 };
  59         };
  60
  61         hdmi-in {
  62                 compatible = "hdmi-connector";
  63                 label = "HDMI IN";
  64                 type = "a";
  65
  66                 port {
  67                         hdmi_in_con: endpoint {
  68                                 remote-endpoint = <&adv7482_hdmi>;
  69                         };
  70                 };
  71         };
  72
  73         hdmi-out {
  74                 compatible = "hdmi-connector";
  75                 type = "a";
  76
  77                 port {
  78                         hdmi_con_out: endpoint {
  79                                 remote-endpoint = <&adv7511_out>;
  80                         };
  81                 };
  82         };
  83
  84         keys {
  85                 compatible = "gpio-keys";
  86
  87                 pinctrl-0 = <&keys_pins>;
  88                 pinctrl-names = "default";
  89
  90                 key-1 {
  91                         gpios = <&gpio5 10 GPIO_ACTIVE_LOW>;
  92                         linux,code = <KEY_1>;
  93                         label = "SW4-1";
  94                         wakeup-source;
  95                         debounce-interval = <20>;
  96                 };
  97                 key-2 {
  98                         gpios = <&gpio5 11 GPIO_ACTIVE_LOW>;
  99                         linux,code = <KEY_2>;
 100                         label = "SW4-2";
 101                         wakeup-source;
 102                         debounce-interval = <20>;
 103                 };
 104                 key-3 {
 105                         gpios = <&gpio5 12 GPIO_ACTIVE_LOW>;
 106                         linux,code = <KEY_3>;
 107                         label = "SW4-3";
 108                         wakeup-source;
 109                         debounce-interval = <20>;
 110                 };
 111                 key-4 {
 112                         gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
 113                         linux,code = <KEY_4>;
 114                         label = "SW4-4";
 115                         wakeup-source;
 116                         debounce-interval = <20>;
 117                 };
 118         };
 119
 120         lvds-decoder {
 121                 compatible = "thine,thc63lvd1024";
 122                 vcc-supply = <&reg_3p3v>;
 123
 124                 ports {
 125                         #address-cells = <1>;
 126                         #size-cells = <0>;
 127
 128                         port@0 {
 129                                 reg = <0>;
 130                                 thc63lvd1024_in: endpoint {
 131                                         remote-endpoint = <&lvds0_out>;
 132                                 };
 133                         };
 134
 135                         port@2 {
 136                                 reg = <2>;
 137                                 thc63lvd1024_out: endpoint {
 138                                         remote-endpoint = <&adv7511_in>;
 139                                 };
 140                         };
 141                 };
 142         };
 143
 144         memory@48000000 {
 145                 device_type = "memory";
 146                 /* first 128MB is reserved for secure area. */
 147                 reg = <0x0 0x48000000 0x0 0x38000000>;
 148         };
 149
 150         reg_1p8v: regulator0 {
 151                 compatible = "regulator-fixed";
 152                 regulator-name = "fixed-1.8V";
 153                 regulator-min-microvolt = <1800000>;
 154                 regulator-max-microvolt = <1800000>;
 155                 regulator-boot-on;
 156                 regulator-always-on;
 157         };
 158
 159         reg_3p3v: regulator1 {
 160                 compatible = "regulator-fixed";
 161                 regulator-name = "fixed-3.3V";
 162                 regulator-min-microvolt = <3300000>;
 163                 regulator-max-microvolt = <3300000>;
 164                 regulator-boot-on;
 165                 regulator-always-on;
 166         };
 167
 168         reg_12p0v: regulator2 {
 169                 compatible = "regulator-fixed";
 170                 regulator-name = "D12.0V";
 171                 regulator-min-microvolt = <12000000>;
 172                 regulator-max-microvolt = <12000000>;
 173                 regulator-boot-on;
 174                 regulator-always-on;
 175         };
 176
 177         rsnd_ak4613: sound {
 178                 compatible = "simple-audio-card";
 179
 180                 simple-audio-card,name = "rsnd-ak4613";
 181                 simple-audio-card,format = "left_j";
 182                 simple-audio-card,bitclock-master = <&sndcpu>;
 183                 simple-audio-card,frame-master = <&sndcpu>;
 184
 185                 sndcodec: simple-audio-card,codec {
 186                         sound-dai = <&ak4613>;
 187                 };
 188
 189                 sndcpu: simple-audio-card,cpu {
 190                         sound-dai = <&rcar_sound>;
 191                 };
 192         };
 193
 194         vbus0_usb2: regulator-vbus0-usb2 {
 195                 compatible = "regulator-fixed";
 196
 197                 regulator-name = "USB20_VBUS_CN";
 198                 regulator-min-microvolt = <5000000>;
 199                 regulator-max-microvolt = <5000000>;
 200
 201                 gpio = <&gpio6 4 GPIO_ACTIVE_HIGH>;
 202                 enable-active-high;
 203         };
 204
 205         vcc_sdhi0: regulator-vcc-sdhi0 {
 206                 compatible = "regulator-fixed";
 207
 208                 regulator-name = "SDHI0 Vcc";
 209                 regulator-min-microvolt = <3300000>;
 210                 regulator-max-microvolt = <3300000>;
 211
 212                 gpio = <&gpio5 17 GPIO_ACTIVE_HIGH>;
 213                 enable-active-high;
 214         };
 215
 216         vccq_sdhi0: regulator-vccq-sdhi0 {
 217                 compatible = "regulator-gpio";
 218
 219                 regulator-name = "SDHI0 VccQ";
 220                 regulator-min-microvolt = <1800000>;
 221                 regulator-max-microvolt = <3300000>;
 222
 223                 gpios = <&gpio5 18 GPIO_ACTIVE_HIGH>;
 224                 gpios-states = <1>;
 225                 states = <3300000 1>, <1800000 0>;
 226         };
 227
 228         vcc_sdhi1: regulator-vcc-sdhi1 {
 229                 compatible = "regulator-fixed";
 230
 231                 regulator-name = "SDHI1 Vcc";
 232                 regulator-min-microvolt = <3300000>;
 233                 regulator-max-microvolt = <3300000>;
 234
 235                 gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>;
 236                 enable-active-high;
 237         };
 238
 239         vccq_sdhi1: regulator-vccq-sdhi1 {
 240                 compatible = "regulator-gpio";
 241
 242                 regulator-name = "SDHI1 VccQ";
 243                 regulator-min-microvolt = <1800000>;
 244                 regulator-max-microvolt = <3300000>;
 245
 246                 gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>;
 247                 gpios-states = <1>;
 248                 states = <3300000 1>, <1800000 0>;
 249         };
 250
 251         vga {
 252                 compatible = "vga-connector";
 253
 254                 port {
 255                         vga_in: endpoint {
 256                                 remote-endpoint = <&adv7123_out>;
 257                         };
 258                 };
 259         };
 260
 261         vga-encoder {
 262                 compatible = "adi,adv7123";
 263
 264                 ports {
 265                         #address-cells = <1>;
 266                         #size-cells = <0>;
 267
 268                         port@0 {
 269                                 reg = <0>;
 270                                 adv7123_in: endpoint {
 271                                         remote-endpoint = <&du_out_rgb>;
 272                                 };
 273                         };
 274                         port@1 {
 275                                 reg = <1>;
 276                                 adv7123_out: endpoint {
 277                                         remote-endpoint = <&vga_in>;
 278                                 };
 279                         };
 280                 };
 281         };
 282
 283         x12_clk: x12 {
 284                 compatible = "fixed-clock";
 285                 #clock-cells = <0>;
 286                 clock-frequency = <24576000>;
 287         };
 288
 289         x13_clk: x13 {
 290                 compatible = "fixed-clock";
 291                 #clock-cells = <0>;
 292                 clock-frequency = <74250000>;
 293         };
 294 };
 295
 296 &audio_clk_a {
 297         clock-frequency = <22579200>;
 298 };
 299
 300 &avb {
 301         pinctrl-0 = <&avb_pins>;
 302         pinctrl-names = "default";
 303         phy-handle = <&phy0>;
 304         status = "okay";
 305
 306         phy0: ethernet-phy@0 {
 307                 rxc-skew-ps = <1500>;
 308                 reg = <0>;
 309                 interrupt-parent = <&gpio2>;
 310                 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
 311                 reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
 312                 /*
 313                  * TX clock internal delay mode is required for reliable
 314                  * 1Gbps communication using the KSZ9031RNX phy present on
 315                  * the Ebisu board, however, TX clock internal delay mode
 316                  * isn't supported on r8a77990.  Thus, limit speed to
 317                  * 100Mbps for reliable communication.
 318                  */
 319                 max-speed = <100>;
 320         };
 321 };
 322
 323 &canfd {
 324         pinctrl-0 = <&canfd0_pins>;
 325         pinctrl-names = "default";
 326         status = "okay";
 327
 328         channel0 {
 329                 status = "okay";
 330         };
 331 };
 332
 333 &csi40 {
 334         status = "okay";
 335
 336         ports {
 337                 port@0 {
 338                         csi40_in: endpoint {
 339                                 clock-lanes = <0>;
 340                                 data-lanes = <1 2>;
 341                                 remote-endpoint = <&adv7482_txa>;
 342                         };
 343                 };
 344         };
 345 };
 346
 347 &du {
 348         pinctrl-0 = <&du_pins>;
 349         pinctrl-names = "default";
 350         status = "okay";
 351
 352         clocks = <&cpg CPG_MOD 724>,
 353                  <&cpg CPG_MOD 723>,
 354                  <&x13_clk>;
 355         clock-names = "du.0", "du.1", "dclkin.0";
 356
 357         ports {
 358                 port@0 {
 359                         endpoint {
 360                                 remote-endpoint = <&adv7123_in>;
 361                         };
 362                 };
 363         };
 364 };
 365
 366 &ehci0 {
 367         dr_mode = "otg";
 368         status = "okay";
 369 };
 370
 371 &extal_clk {
 372         clock-frequency = <48000000>;
 373 };
 374
 375 &hsusb {
 376         dr_mode = "otg";
 377         status = "okay";
 378 };
 379
 380 &i2c0 {
 381         status = "okay";
 382
 383         io_expander: gpio@20 {
 384                 compatible = "onnn,pca9654";
 385                 reg = <0x20>;
 386                 gpio-controller;
 387                 #gpio-cells = <2>;
 388                 interrupt-parent = <&gpio2>;
 389                 interrupts = <22 IRQ_TYPE_LEVEL_LOW>;
 390         };
 391
 392         hdmi-encoder@39 {
 393                 compatible = "adi,adv7511w";
 394                 reg = <0x39>;
 395                 interrupt-parent = <&gpio1>;
 396                 interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
 397
 398                 adi,input-depth = <8>;
 399                 adi,input-colorspace = "rgb";
 400                 adi,input-clock = "1x";
 401
 402                 ports {
 403                         #address-cells = <1>;
 404                         #size-cells = <0>;
 405
 406                         port@0 {
 407                                 reg = <0>;
 408                                 adv7511_in: endpoint {
 409                                         remote-endpoint = <&thc63lvd1024_out>;
 410                                 };
 411                         };
 412
 413                         port@1 {
 414                                 reg = <1>;
 415                                 adv7511_out: endpoint {
 416                                         remote-endpoint = <&hdmi_con_out>;
 417                                 };
 418                         };
 419                 };
 420         };
 421
 422         video-receiver@70 {
 423                 compatible = "adi,adv7482";
 424                 reg = <0x70>;
 425
 426                 #address-cells = <1>;
 427                 #size-cells = <0>;
 428
 429                 interrupt-parent = <&gpio0>;
 430                 interrupt-names = "intrq1", "intrq2";
 431                 interrupts = <7 IRQ_TYPE_LEVEL_LOW>,
 432                              <17 IRQ_TYPE_LEVEL_LOW>;
 433
 434                 port@7 {
 435                         reg = <7>;
 436
 437                         adv7482_ain7: endpoint {
 438                                 remote-endpoint = <&cvbs_con>;
 439                         };
 440                 };
 441
 442                 port@8 {
 443                         reg = <8>;
 444
 445                         adv7482_hdmi: endpoint {
 446                                 remote-endpoint = <&hdmi_in_con>;
 447                         };
 448                 };
 449
 450                 port@a {
 451                         reg = <10>;
 452
 453                         adv7482_txa: endpoint {
 454                                 clock-lanes = <0>;
 455                                 data-lanes = <1 2>;
 456                                 remote-endpoint = <&csi40_in>;
 457                         };
 458                 };
 459         };
 460 };
 461
 462 &i2c3 {
 463         status = "okay";
 464
 465         ak4613: codec@10 {
 466                 compatible = "asahi-kasei,ak4613";
 467                 #sound-dai-cells = <0>;
 468                 reg = <0x10>;
 469                 clocks = <&rcar_sound 3>;
 470
 471                 asahi-kasei,in1-single-end;
 472                 asahi-kasei,in2-single-end;
 473                 asahi-kasei,out1-single-end;
 474                 asahi-kasei,out2-single-end;
 475                 asahi-kasei,out3-single-end;
 476                 asahi-kasei,out4-single-end;
 477                 asahi-kasei,out5-single-end;
 478                 asahi-kasei,out6-single-end;
 479         };
 480
 481         cs2000: clk-multiplier@4f {
 482                 #clock-cells = <0>;
 483                 compatible = "cirrus,cs2000-cp";
 484                 reg = <0x4f>;
 485                 clocks = <&audio_clkout>, <&x12_clk>;
 486                 clock-names = "clk_in", "ref_clk";
 487
 488                 assigned-clocks = <&cs2000>;
 489                 assigned-clock-rates = <24576000>; /* 1/1 divide */
 490         };
 491 };
 492
 493 &i2c_dvfs {
 494         status = "okay";
 495
 496         clock-frequency = <400000>;
 497
 498         pmic: pmic@30 {
 499                 pinctrl-0 = <&irq0_pins>;
 500                 pinctrl-names = "default";
 501
 502                 compatible = "rohm,bd9571mwv";
 503                 reg = <0x30>;
 504                 interrupt-parent = <&intc_ex>;
 505                 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
 506                 interrupt-controller;
 507                 #interrupt-cells = <2>;
 508                 gpio-controller;
 509                 #gpio-cells = <2>;
 510                 rohm,ddr-backup-power = <0x1>;
 511                 rohm,rstbmode-level;
 512         };
 513
 514         eeprom@50 {
 515                 compatible = "rohm,br24t01", "atmel,24c01";
 516                 reg = <0x50>;
 517                 pagesize = <8>;
 518         };
 519 };
 520
 521 &lvds0 {
 522         status = "okay";
 523
 524         clocks = <&cpg CPG_MOD 727>,
 525                  <&x13_clk>,
 526                  <&extal_clk>;
 527         clock-names = "fck", "dclkin.0", "extal";
 528
 529         ports {
 530                 port@1 {
 531                         lvds0_out: endpoint {
 532                                 remote-endpoint = <&thc63lvd1024_in>;
 533                         };
 534                 };
 535         };
 536 };
 537
 538 &lvds1 {
 539         /*
 540          * Even though the LVDS1 output is not connected, the encoder must be
 541          * enabled to supply a pixel clock to the DU for the DPAD output when
 542          * LVDS0 is in use.
 543          */
 544         status = "okay";
 545
 546         clocks = <&cpg CPG_MOD 727>,
 547                  <&x13_clk>,
 548                  <&extal_clk>;
 549         clock-names = "fck", "dclkin.0", "extal";
 550 };
 551
 552 &ohci0 {
 553         dr_mode = "otg";
 554         status = "okay";
 555 };
 556
 557 &pcie_bus_clk {
 558         clock-frequency = <100000000>;
 559 };
 560
 561 &pciec0 {
 562         status = "okay";
 563 };
 564
 565 &pfc {
 566         avb_pins: avb {
 567                 groups = "avb_link", "avb_mii";
 568                 function = "avb";
 569         };
 570
 571         canfd0_pins: canfd0 {
 572                 groups = "canfd0_data";
 573                 function = "canfd0";
 574         };
 575
 576         du_pins: du {
 577                 groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
 578                 function = "du";
 579         };
 580
 581         irq0_pins: irq0 {
 582                 groups = "intc_ex_irq0";
 583                 function = "intc_ex";
 584         };
 585
 586         keys_pins: keys {
 587                 pins = "GP_5_10", "GP_5_11", "GP_5_12", "GP_5_13";
 588                 bias-pull-up;
 589         };
 590
 591         pwm3_pins: pwm3 {
 592                 groups = "pwm3_b";
 593                 function = "pwm3";
 594         };
 595
 596         pwm5_pins: pwm5 {
 597                 groups = "pwm5_a";
 598                 function = "pwm5";
 599         };
 600
 601         scif2_pins: scif2 {
 602                 groups = "scif2_data_a";
 603                 function = "scif2";
 604         };
 605
 606         sdhi0_pins: sd0 {
 607                 groups = "sdhi0_data4", "sdhi0_ctrl";
 608                 function = "sdhi0";
 609                 power-source = <3300>;
 610         };
 611
 612         sdhi0_pins_uhs: sd0_uhs {
 613                 groups = "sdhi0_data4", "sdhi0_ctrl";
 614                 function = "sdhi0";
 615                 power-source = <1800>;
 616         };
 617
 618         sdhi1_pins: sd1 {
 619                 groups = "sdhi1_data4", "sdhi1_ctrl";
 620                 function = "sdhi1";
 621                 power-source = <3300>;
 622         };
 623
 624         sdhi1_pins_uhs: sd1_uhs {
 625                 groups = "sdhi1_data4", "sdhi1_ctrl";
 626                 function = "sdhi1";
 627                 power-source = <1800>;
 628         };
 629
 630         sdhi3_pins: sd3 {
 631                 groups = "sdhi3_data8", "sdhi3_ctrl", "sdhi3_ds";
 632                 function = "sdhi3";
 633                 power-source = <1800>;
 634         };
 635
 636         sound_clk_pins: sound_clk {
 637                 groups = "audio_clk_a", "audio_clk_b_a", "audio_clk_c_a",
 638                          "audio_clkout_a", "audio_clkout1_a";
 639                 function = "audio_clk";
 640         };
 641
 642         sound_pins: sound {
 643                 groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data";
 644                 function = "ssi";
 645         };
 646
 647         usb0_pins: usb {
 648                 groups = "usb0_b", "usb0_id";
 649                 function = "usb0";
 650         };
 651
 652         usb30_pins: usb30 {
 653                 groups = "usb30";
 654                 function = "usb30";
 655         };
 656 };
 657
 658 &pwm3 {
 659         pinctrl-0 = <&pwm3_pins>;
 660         pinctrl-names = "default";
 661
 662         status = "okay";
 663 };
 664
 665 &pwm5 {
 666         pinctrl-0 = <&pwm5_pins>;
 667         pinctrl-names = "default";
 668
 669         status = "okay";
 670 };
 671
 672 &rcar_sound {
 673         pinctrl-0 = <&sound_pins>, <&sound_clk_pins>;
 674         pinctrl-names = "default";
 675
 676         /* Single DAI */
 677         #sound-dai-cells = <0>;
 678
 679         /* audio_clkout0/1/2/3 */
 680         #clock-cells = <1>;
 681         clock-frequency = <12288000 11289600>;
 682
 683         status = "okay";
 684
 685         /* update <audio_clk_b> to <cs2000> */
 686         clocks = <&cpg CPG_MOD 1005>,
 687                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
 688                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
 689                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
 690                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
 691                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
 692                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
 693                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
 694                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
 695                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
 696                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
 697                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
 698                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
 699                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
 700                  <&audio_clk_a>, <&cs2000>, <&audio_clk_c>,
 701                  <&cpg CPG_CORE R8A77990_CLK_ZA2>;
 702
 703         rcar_sound,dai {
 704                 dai0 {
 705                         playback = <&ssi0>, <&src0>, <&dvc0>;
 706                         capture  = <&ssi1>, <&src1>, <&dvc1>;
 707                 };
 708         };
 709
 710 };
 711
 712 &rwdt {
 713         timeout-sec = <60>;
 714         status = "okay";
 715 };
 716
 717 &scif2 {
 718         pinctrl-0 = <&scif2_pins>;
 719         pinctrl-names = "default";
 720
 721         status = "okay";
 722 };
 723
 724 &sdhi0 {
 725         pinctrl-0 = <&sdhi0_pins>;
 726         pinctrl-1 = <&sdhi0_pins_uhs>;
 727         pinctrl-names = "default", "state_uhs";
 728
 729         vmmc-supply = <&vcc_sdhi0>;
 730         vqmmc-supply = <&vccq_sdhi0>;
 731         cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
 732         wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
 733         bus-width = <4>;
 734         sd-uhs-sdr50;
 735         sd-uhs-sdr104;
 736         status = "okay";
 737 };
 738
 739 &sdhi1 {
 740         pinctrl-0 = <&sdhi1_pins>;
 741         pinctrl-1 = <&sdhi1_pins_uhs>;
 742         pinctrl-names = "default", "state_uhs";
 743
 744         vmmc-supply = <&vcc_sdhi1>;
 745         vqmmc-supply = <&vccq_sdhi1>;
 746         cd-gpios = <&gpio3 14 GPIO_ACTIVE_LOW>;
 747         bus-width = <4>;
 748         sd-uhs-sdr50;
 749         sd-uhs-sdr104;
 750         status = "okay";
 751 };
 752
 753 &sdhi3 {
 754         /* used for on-board 8bit eMMC */
 755         pinctrl-0 = <&sdhi3_pins>;
 756         pinctrl-1 = <&sdhi3_pins>;
 757         pinctrl-names = "default", "state_uhs";
 758
 759         vmmc-supply = <&reg_3p3v>;
 760         vqmmc-supply = <&reg_1p8v>;
 761         mmc-hs200-1_8v;
 762         mmc-hs400-1_8v;
 763         bus-width = <8>;
 764         no-sd;
 765         no-sdio;
 766         non-removable;
 767         full-pwr-cycle-in-suspend;
 768         status = "okay";
 769 };
 770
 771 &ssi1 {
 772         shared-pin;
 773 };
 774
 775 &usb2_phy0 {
 776         pinctrl-0 = <&usb0_pins>;
 777         pinctrl-names = "default";
 778
 779         vbus-supply = <&vbus0_usb2>;
 780         status = "okay";
 781 };
 782
 783 &usb3_peri0 {
 784         companion = <&xhci0>;
 785         status = "okay";
 786 };
 787
 788 &vin4 {
 789         status = "okay";
 790 };
 791
 792 &vin5 {
 793         status = "okay";
 794 };
 795
 796 &xhci0 {
 797         pinctrl-0 = <&usb30_pins>;
 798         pinctrl-names = "default";
 799
 800         status = "okay";
 801 };